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7606 Commits

Author SHA1 Message Date
Dylan Baker
8346d1d7b8 docs: Add sha256 sums for 20.2.6 2020-12-16 13:53:03 -08:00
Dylan Baker
7b866d516a VERSION: bump for 20.2.6 2020-12-16 13:41:19 -08:00
Dylan Baker
8c0cc44b28 docs: add release notes for 20.2.6 2020-12-16 13:41:05 -08:00
Daniel Schürmann
87bfed33e9 aco/spill: only prevent rematerializable vars from being DCE'd if they haven't been renamed
The small DCE of the spiller only removes the original instructions
of rematerialized variables in case they are unused. If a variable
has been renamed, it cannot match any original instruction anymore.
Thus, the lookup is then unnecessary and can be omitted.

No fossil-db changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8055>
(cherry picked from commit ef4101d6d7)
2020-12-16 13:17:58 -08:00
Dylan Baker
17ea1b0540 .pick_status.json: Update to 2d78e28ba7 2020-12-16 13:17:55 -08:00
Dylan Baker
ccfd607740 docs: add sha256 sums for 20.2.5 2020-12-16 10:16:23 -08:00
Dylan Baker
7e62e9a4be VERSION: bump for 20.2.5 2020-12-16 09:42:03 -08:00
Dylan Baker
053ab72148 docs: add release notes for 20.2.5 2020-12-16 09:41:49 -08:00
Marek Olšák
825369ce07 radeonsi: disable SDMA on gfx6-7 and gfx10.3 to decrease CPU overhead
same as gfx8-10

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7055>
(cherry picked from commit 205f1d79e2)
2020-12-15 11:21:19 -08:00
Dave Airlie
82d0490662 radeonsi: fix regression on gpus using the radeon winsys.
For GPUs using the radeon kernel driver, num_se was never
getting initialised.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3939
Fixes: f2977a162a ("ac: fix min/max_good_num_cu_per_sa on gfx10.3 with disabled SEs")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7954>
(cherry picked from commit 7c075bae56)
2020-12-15 11:21:10 -08:00
Robin Ole Heinemann
d741a0714a anv: Add DRM_RDWR flag in anv_gem_handle_to_fd
The DRM_RDWR flag is needed for mmap with PROT_WRITE to work.

Cc: mesa-stable
Signed-off-by: Robin Ole Heinemann <robin.ole.heinemann@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8075>
(cherry picked from commit df76963a5c)
2020-12-15 11:02:23 -08:00
Dylan Baker
786273a03b .pick_status.json: Update to ada9be1ec9 2020-12-15 11:02:16 -08:00
Rhys Perry
e7d790faa7 spirv: fix GLSLstd450Modf/GLSLstd450Frexp when the destination is vector
We can't write to an individual component in a function_temp vector, so we
have to use vtn_variable_store() which does a load+insert+store.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3484
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6231>
2020-12-14 10:44:48 -08:00
Marek Olšák
b3e977dd6b ac: fix min/max_good_num_cu_per_sa on gfx10.3 with disabled SEs
Fixes: 9538b9a68e - radeonsi: add support for Sienna Cichlid

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
2020-12-14 10:44:48 -08:00
Michel Dänzer
493400cf1e ac: Don't negate strstr return values in ac_query_gpu_info
strstr returns a pointer to the needle sub-string within the haystack
string if the latter contains the former, or NULL otherwise. So this
essentially always set info->is_pro_graphics = true, since probably no
marketing name ever contains all of these sub-strings.

Fixes: b635dff256 "ac: fix detection of Pro graphics"
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7675>
2020-12-14 10:44:48 -08:00
Marek Olšák
9374a1ecfe ac: fix detection of Pro graphics
Fixes: bfb928759 "ac: add radeon_info::is_pro_graphics"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
2020-12-14 10:44:48 -08:00
Marek Olšák
44d0d449b1 radeonsi: determine correctly if switching from normal launch to fast launch
Fixes: 3da91b3327 - radeonsi/ngg: add VGT_FLUSH when enabling fast launch

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
2020-12-14 10:44:48 -08:00
Bas Nieuwenhuizen
13a6dd3f15 radv: Fix exporting/importing multisample images.
Otherwise FMASK metadata segfaults and on import we disable it ...

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7358>
2020-12-14 10:44:48 -08:00
Bas Nieuwenhuizen
5fc85c38e7 radv: Fix budget calculations with large BAR.
If we don't have a non-visible VRAM heap, we should be counting
our non-visible VRAM allocations to the visible-VRAM heap.

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6827>
2020-12-14 10:44:48 -08:00
Bas Nieuwenhuizen
44e3895e1c radv: Skip tiny non-visible VRAM heap.
When I enable "Above 4G decoding" in my BIOS I still get 16 MiB of
non-visible VRAM on my 8G VRAM GPU ...

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6827>
2020-12-14 10:44:48 -08:00
Danylo Piliaiev
1587141c4c nir/lower_returns: Append missing phis' sources after "break" insertion
After we lowered `return` into `break` - the control flow is changed and
the block with this change has a new successor, which means that in this
new successor phis should have additional source.

Since the instructions that use phis in the successor are predicated -
it's ok for a new phi source to be undef.

If `return` is lowered in a nested loop, `break` is inserted in the outer
loops, so all new blocks with break require the same changes to phis
described above.

Examples of NIR before lowering:

  block block_0:
  loop {
     block block_1:
     if ssa_2 {
       block block_2:
       return
       // succs: block_6
     } else {
       block block_2:
       break;
       // succs: block_5
     }
     block block_4:
  }
  block block_5:
  // preds: block_3
  vec1 32 ssa_4 = phi block_3: ssa_1
  // succs: block_6
  block block_6:

Here converting return to break should add block_2 to the phis
of block_5.

 block block_0:
 loop {
    block block_1:
    loop {
       block block_2:
       if ssa_2 {
         block block_3:
         return
         // succs: block_8
       } else {
         block block_4:
         break;
         // succs: block_6
       }
       block block_5:
    }
    block block_6:
    break;
    // succs: block_7
 }
 block block_7:
 // preds: block_6
 vec1 32 ssa_4 = phi block_6: ssa_1
 // succs: block_8
 block block_8:

Here converting return to break will insert conditional break in
the outer loop, changing block_6 predcessors.

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3322
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3498
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6186>
2020-12-14 10:44:48 -08:00
Samuel Pitoiset
c2bc10a600 radv: disable SQTT support for unsupported GPUs
Like GFX10.3 which is currently broken.

Cc: 20.2 20.3
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7786>
(cherry picked from commit b589df9862)
2020-12-14 09:42:43 -08:00
Samuel Pitoiset
436f9bd6f5 radv: ignore other blend targets if dual-source blending is enabled
Using more blend targets than specified by maxFragmentDualSrcAttachments
is invalid per the Vulkan spec.

I'm usually not a fan to workaround game bugs inside the driver but
it's really easy for us to ignore MRT1+ in the driver and that
prevents wrong behaviour.

Cc: 20.2, 20.3
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7684>
(cherry picked from commit bc7f442d8e)
2020-12-14 09:42:43 -08:00
Samuel Pitoiset
4c5d644bdb aco: fix combining max(-min(a, b), c) if a or b uses the neg modifier
No fossils-db changes.

Cc: 20.2, 20.3
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7657>
(cherry picked from commit 0fcd379184)
2020-12-14 09:42:43 -08:00
Samuel Pitoiset
60e001e95f radv: don't count unusable vertices to the NGG LDS size
Ported from RadeonSI.

To get optimal LDS usage since the previous change.

Cc: 20.2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7566>
(cherry picked from commit f777d00a75)
2020-12-14 09:42:43 -08:00
Samuel Pitoiset
e9f13397d9 radv: fix applying the NGG minimum vertex count requirement
Ported from RadeonSI.

The restriction was applied too late.

Cc: 20.2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7566>
(cherry picked from commit c5e8f6700b)
2020-12-14 09:42:43 -08:00
Samuel Pitoiset
4dfd91217a radv: do VGT_FLUSH when switching NGG -> legacy on Sienna Cichlid
Ported from RadeonSI.

Cc: 20.2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7566>
(cherry picked from commit 0790105f2f)
2020-12-14 09:42:43 -08:00
Samuel Pitoiset
9bd698c5e5 radv: fix optimizing needed states if some are marked as dynamic
From the Vulkan spec 1.2.157:

    "VK_DYNAMIC_STATE_STENCIL_TEST_ENABLE_EXT specifies that the
     stencilTestEnable state in VkPipelineDepthStencilStateCreateInfo
     will be ignored and must be set dynamically with
     vkCmdSetStencilTestEnableEXT before any draw call."

So, stencilTestEnable should be ignored if dynamic. While we are
at it, fix depthBoundsTestEnable too.

Cc: 20.2
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3633
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7112>
(cherry picked from commit bb00a6860e)
2020-12-14 09:42:43 -08:00
Samuel Pitoiset
ef7ecc9fa2 radv: fix ignoring the vertex attribute stride if set as dynamic
The vertex attribute stride should be ignored, so make sure it's
initialized to zero if dynamic to avoid computing a wrong offset.

The fact that each element of pStrides must be greater than or equal
to the maximum extent of all vertex input attributes fetched saves us
one user SGPR for the dynamic stride.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3627
Cc: 20.2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7101>
(cherry picked from commit 48b988e35f)
2020-12-14 09:42:43 -08:00
Daniel Schürmann
02cd25463d aco: fix DCE of rematerializable phi operands
Otherwise, if a phi gets spilled, the operand might be considered unused.

Fixes: d48d72e98a ('aco: Initial commit of independent AMD compiler')

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8055>
(cherry picked from commit 0bccfd86f6)
2020-12-14 09:32:43 -08:00
Simon Ser
af6cadcc89 radv: fix access to uninitialized radeon_bo_metadata
If the image tiling is set to VK_IMAGE_TILING_LINEAR,
buffer_set_metadata will read an uninitialized radeon_bo_metadata.

Signed-off-by: Simon Ser <contact@emersion.fr>
Fixes: d5fd8cd46e ("radv: Allow non-dedicated linear images and buffer.")
Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7898>
(cherry picked from commit ad19b0714a)
2020-12-14 09:32:42 -08:00
Mike Blumenkrantz
5ac08afcfc st/pbo: fix pbo uploads without PIPE_CAP_TGSI_VS_LAYER_VIEWPORT
the code here tries to be too smart and only use a geometry shader if there's
actually multiple layers being uploaded, but the fragment shader also unconditionally
reads gl_Layer as long as the pipe cap for gs is set, which means that
in the case when the gs is dynamically disabled due to uploading a
single-layer surface, the fs has no input to read for gl_Layer and everything breaks

always using a gs isn't ideal, but it's considerably more work to manage multiple
fs variants based on layer usage

Fixes: c99f2fe70e ("st/mesa: implement PBO upload for multiple layers")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8067>
(cherry picked from commit 614c77772a)
2020-12-14 09:32:41 -08:00
Mike Blumenkrantz
2ac5dec4f1 zink: really fix direct image mapping offset (I mean it this time)
I got confused and:
* used the vkformat instead of the pipe format for getting format description
* incorrectly calculated bpp

but this time it's definitely 100% fixed I promise

Fixes: 456b57802e ("zink: fix direct image mapping offset")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8074>
(cherry picked from commit dfd0f042e0)
2020-12-14 09:32:41 -08:00
Mike Blumenkrantz
76870cfae2 zink: fix direct image mapping offset
the x and y offsets here were improperly calculated without taking into account:
* layer/level offset
* x/y coord bpp

Fixes: 8d46e35d16 ("zink: introduce opengl over vulkan")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8058>
(cherry picked from commit 456b57802e)
2020-12-14 09:32:40 -08:00
Dylan Baker
5534e540a4 .pick_status.json: Update to a7fb3954a1 2020-12-14 09:32:37 -08:00
Daniel Schürmann
69dd154c27 aco/ra: use get_reg_specified() for p_extract_vector
On GFX6/7, it might violate validation rules, otherwise.

Fixes: 51f4b22fee ('aco: don't allow unaligned subdword accesses on GFX6/7')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8047>
(cherry picked from commit fd49ba59a3)
2020-12-11 09:40:10 -08:00
Timur Kristóf
07562fcf66 aco: Use program->num_waves as maximum in scheduler.
The scheduler doesn't take SGPR use into account, which can be
a limiting factor on older GPUs. This patch fixes a CTS test crash
on GFX6.

CC: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8040>
(cherry picked from commit 731f8fc9dd)
2020-12-11 09:40:09 -08:00
cheyang
a82561ec7f android: fix build failure with libbacktrace
because 848e7b94 commit cause.it  modify u_debug_stack_android.cpp
location from src/gallium/auxiliary/util to src/util but Android.mk
not modify

Fixes: 848e7b94 ("Move stack debug functions to src/util")
Signed-off-by: cheyang <cheyang@bytedance.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7851>
(cherry picked from commit 83d1e2efd0)
2020-12-11 09:40:08 -08:00
Dylan Baker
15f44439fd .pick_status.json: Update to 84c8a35aa2 2020-12-11 09:40:05 -08:00
Michel Dänzer
d5f1553ded ci: .lava-test:amd64 template needs arm_build
It uses the arm_build image, but didn't depend on the job which ensures
it exists. So jobs using the template could run before the arm_build job
had finished, and fail if the image didn't exist.

Fixes: 6c8b921572 "ci: Build kernels and rootfs for x86 devices"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3632
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8003>
(cherry picked from commit 5d073b5aa1)
2020-12-10 12:38:11 -08:00
Tapani Pälli
5bbaec9d46 anv: fix calculation of buffer size in case dynamic size is used
VK spec got clarification about the pSizes parameter.

Fixes set of new tests:
   dEQP-VK.pipeline.extended_dynamic_state*with_offset*

v2: move offset subtract to be part of size calculation (Jason)

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3871
Fixes: b9a05447a1 ("anv: dynamic vertex input binding stride and size support")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7439>
(cherry picked from commit 5998a6543a)
2020-12-10 12:38:10 -08:00
Dylan Baker
1622143115 .pick_status.json: Update to cf3fc79cd0 2020-12-10 12:38:06 -08:00
Bas Nieuwenhuizen
2922cea29f radv: Deal with unused attachments in mip flush
Fixes: 4cce4d22a7 ("radv: Fix a hang on CB change by adding flushes.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7813>
(cherry picked from commit aed8d30b50)
2020-12-09 19:41:24 -08:00
Bas Nieuwenhuizen
5741e39344 radv: Fix a hang on CB change by adding flushes.
This workaround fixes a hang while loading a renderdoc trace for me.

Since the workload does 1 mip per cmdbuffer it is quite hard to confirm
what exactly the conditions for the hang are but this is the most
restrictive set I found and it corresponds to a workaround in AMDVLK as
well.

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7210>
(cherry picked from commit 4cce4d22a7)
2020-12-09 19:41:14 -08:00
Witold Baryluk
bd32ac29bb zink: Cap PIPE_SHADER_CAP_MAX_CONST_BUFFERS to 32
PIPE_MAX_CONSTANT_BUFFERS is 32, however many Vulkan implementations
has maxPerStageDescriptorUniformBuffers that exceeds it, for example:

radv 8388606,
anv 64
nvidia 1048580 for RTX 2000 and up.

and, together with the current zink logic, the returned value
will exceed the maximum allowed value for the cap.

This causes cso_destroy_context to pass big values back to zink
(via zink_set_constant_buffer), resulting in access beyond end of
allocated buffer for all UBOs.

Cap the cap to PIPE_MAX_CONSTANT_BUFFERS (32), not INT_MAX.

Add an assert to verify future drivers.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: daaf5f1d18 ("gallium: Fix leak of currently bound UBOs at CSO context destruction.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7976>
(cherry picked from commit e2b4247e40)
2020-12-09 19:33:58 -08:00
Eric Anholt
5a468a3ca2 softpipe: Fix swizzled texture gather of int textures.
We need to pick 1u vs 1.0f based on the type of the texture, just like for
normal samples.  Move the decision up to the create_sampler_view, and use
that value from both sampler paths.

Cc: mesa-stable
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8012>
(cherry picked from commit 4ba884b814)
2020-12-09 19:32:36 -08:00
Jonathan Gray
fe9eef31b4 aco: use UINT64_C on 64 bit constant arguments
avoids errors seen when building on OpenBSD/amd64

../src/amd/compiler/aco_instruction_selection.cpp:1677:62: error: ambiguous conversion for functional-style cast from 'unsigned long' to 'aco::Operand'
            bld.vop3(aco_opcode::v_mul_f64, Definition(dst), Operand(0x3FF0000000000000lu), tmp);
                                                             ^~~~~~~~~~~~~~~~~~~~~~~~~~~
glibc uses unsigned long for uint64_t on LP64 archs and unsigned long long for
uint64_t on ILP32 archs.  On OpenBSD unsigned long long is used for uint64_t
on all archs.

The Operand constructors are uint8_t uint16_t uint32_t uint64_t
use UINT64_C so lu or llu suffix will be used as needed.

Fixes: df645fa369 ("aco: implement VK_KHR_shader_float_controls")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7944>
(cherry picked from commit ebfb9e1817)
2020-12-09 19:29:30 -08:00
Nanley Chery
7957019352 iris: Fix resource ptr in resolve_sampler_views
Use the sampler view's iris_resource instead of its pipe_resource. For
stencil views of a depth-stencil resource, this enables the stencil
resource to cause a depth cache flush when needed.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3287
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7996>
(cherry picked from commit 1f7427f972)
2020-12-09 19:08:10 -08:00
Boris Brezillon
d11cd6b220 panfrost: Make sure we always add a reader -> write dependency when needed
We shouldn't reset the ->writer field when a reader comes in because we
want subsequent readers to have a dependency on the writer too. Let's
add a new field encoding the last access type and use it to replace the
writer != NULL test.

Reported-by: Roman Elshin
Fixes: c6ebff3ecd ("panfrost: Remove panfrost_bo_access type")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7831>
(cherry picked from commit 387221e4f2)
2020-12-09 19:08:06 -08:00
Andrii Simiklit
c8162aa73a iris: update depth value for stages after fast clear depth
This should fix an outdated depth value visible from the shader side.

v1: (Nanley Chery)
- fix commit message

v2: (Nanley Chery)
- replace `fixes` tag by `mesa-stable`

Closes: #3883
Cc: 20.3 20.2 <mesa-stable>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7838>
(cherry picked from commit bdd09066fa)
2020-12-09 19:08:05 -08:00
Mauro Rossi
7665dc409c android: spirv: fix '::' typo in gen rules
among all Android gen rules '::' was used only here to declare dependencies;
mesa development and stable branch are worth receiving the fix

Fixes the following building errors with Android 7:

obj/STATIC_LIBRARIES/libmesa_nir_intermediates/spirv/gl_spirv.P:184: *** target file
gen/STATIC_LIBRARIES/libmesa_nir_intermediates/spirv/vtn_generator_ids.h' has both : and :: entries.  Stop.

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Fixes: 1070bba19e ("android: fix SPIR-V -> NIR build")
Reported-by: youling257 <youling257@gmail.com>
(cherry picked from commit 185df8ef07)
2020-12-09 19:08:04 -08:00
Dylan Baker
caa597bb32 .pick_status.json: Update to 3f0da800eb 2020-12-09 19:07:55 -08:00
yshi18
fba1d74ed8 iris: fix memleak for query_buffer_uploader
In the Chrome WebGL Aquarium  stress test, 20 instances of Chrome will run
Aquarium  simultaneously over 20+ hours. That causes Chrome crash.
During the stress, glBeginQueryIndexed is called frequently.

1.Each query will only use 32 bytes from query_buffer_uploader. After the offset
exceed 4096, it will alloc new buffer for query_buffer_uploader->buffer
and release the old buffer.

2.But iris_begin_query will call u_upload_alloc when the offset changed, and it
will increase the query_buffer_uploader->buffer->reference.count every time
when it called u_upload_alloc.

3.So when u_upload_release_buffer try to release the resource of
query_buffer_uploader->buffer, its reference.count is
already equal to 129. pipe_reference_described will only decrease its reference
count to 128.So it never called old_dst->screen->resource_destroy.

4.The old resouce bo will never be freeed. And chrome will called mmap every time
when it alloc new resource bo.

5. Chrome process map too many vmas in its process. Its map count exceed the
sysctl_max_map_count which is 65530 defined in kernel.

6. When iris_begin_query want to alloc new resource bo, it will meet NULL pointer
because mmap return failed. Finally chrome crashed when it access this NULL resource
bo.

The fix is decrease the reference count in iris_destroy_query.

Patch is verified by chrome webgl Aquarium test case for more than 72 hours.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Yang Shi <yang.a.shi@intel.com>
Reviewed-by: Alex Zuo <alex.zuo@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7890>
(cherry picked from commit 3aaac40b12)
2020-12-08 09:46:41 -08:00
Samuel Pitoiset
ce0804ccc2 radv: disable alphaToOne feature
The feature was exposed but completely ignored by the driver. Other
AMD drivers don't expose it as well, probably because it's complicated
to implement alpha-to-coverage properly. Let's disable it.

Cc: mesa-stable.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7966>
(cherry picked from commit 59b1578176)
2020-12-08 09:46:38 -08:00
Erik Faye-Lund
49f2b5f5e0 gallium: do not reset buffers for unsupported stages
There's no good reason why drivers that doesn't grok geometry,
tesselation or compute shaders needs to deal with them.

This fixes a crash on a lot of Piglit tests for Zink.

Fixes: daaf5f1d18 ("gallium: Fix leak of currently bound UBOs at CSO context destruction.")
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7971>
(cherry picked from commit 3abac03d49)
2020-12-08 09:46:35 -08:00
Dylan Baker
de2bac90cc .pick_status.json: Update to f93b7d14d6 2020-12-08 09:46:32 -08:00
Samuel Pitoiset
0cd6e6d3a1 radv: fix exporting multiviews with NGG
If a subpass uses multiview but the fragment shader doesn't load it
we still have to export it.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7815>
(cherry picked from commit fadcf13c8b)
2020-12-07 12:05:36 -08:00
Samuel Pitoiset
24565ec137 radv: mark GFX10.3 as a non-conformant Vulkan implementation
In theory, GFX10.3 is not considered to be a conformant Vulkan
implementation because we didn't submit a conformance submission
package.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7913>
(cherry picked from commit 5cacb56041)
2020-12-07 12:05:36 -08:00
Vinson Lee
1012f0851d meson: Fix Clang microsoft-enum-value detection.
Fixes: 3aee462781 ("meson: add windows compiler checks and libraries")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7543>
(cherry picked from commit bb46a010bb)
2020-12-07 09:24:36 -08:00
Rhys Perry
857b9f428e aco: don't assume src=lower when splitting self-intersecting copies
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 09c584caeb ("aco: split self-intersecting copies instead of swapping")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7798>
(cherry picked from commit 2c40846ab6)
2020-12-07 09:24:35 -08:00
Marcin Ślusarz
07a6a627b3 iris: store copy of the border color in the border color hash table
Color can be allocated on the stack since 809a81ec3a.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3909
Fixes: 809a81ec3a ("iris: Properly support alpha and luminance-alpha formats")

Debugged-by: Filip Strömbäck
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7885>
(cherry picked from commit 90515f90c8)
2020-12-07 09:24:34 -08:00
Dylan Baker
99769eb716 .pick_status.json: Update to ec3828add3 2020-12-07 09:24:22 -08:00
Dylan Baker
8bb5a993b2 relnotes: Add sha256sums for 20.2.4 2020-12-04 12:53:31 -08:00
Dylan Baker
24257bfe63 bump version for 20.2.4 release 2020-12-04 12:11:14 -08:00
Dylan Baker
bfff15f032 docs: add release notes for 20.2.4 2020-12-04 12:10:59 -08:00
Eric Anholt
fbc6a5280f freedreno: Break out of "should we free the entry" loop once we've freed.
Fixes a use-after-free of the state on the next iteration when it was
probably just destroyed.

Fixes: 6de01faac5 ("freedreno/a6xx: invalidate tex state cache entries on rebind")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7695>
(cherry picked from commit d3c67d7e7e)
2020-12-03 10:52:51 -08:00
Eric Anholt
5f9912a4dd gallium: Fix leak of currently bound UBOs at CSO context destruction.
Cc: mesa-stable
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7695>
(cherry picked from commit daaf5f1d18)
2020-12-03 10:52:12 -08:00
Eric Anholt
17d19582f2 gallivm: Fix max const buffer count.
llvmpipe was reporting 32 max const buffers, while sizing its arrays to 16
according to gallivm's #define.

Fixes: 1d35f77228 ("gallivm,llvmpipe,draw: Support multiple constant buffers.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7695>
(cherry picked from commit d90107a200)
2020-12-03 10:52:11 -08:00
Eric Anholt
d6fd7acf9b gallium: Fix leak of bound SSBOs at CSO context destruction.
Cc: mesa-stable
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7695>
(cherry picked from commit 634384e4a0)
2020-12-03 10:52:10 -08:00
Eric Anholt
bcc8db867e freedreno: Fix leak of u_transfer_helper.
Fixes: d1465b3aee ("freedreno: use u_transfer_helper")
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7695>
(cherry picked from commit 9cc8fc7bbc)
2020-12-03 10:52:10 -08:00
Daniel Stone
81bddb2fb1 freedreno: Add missing dependency to build
computerator depends on ir3_parser.h, which is a generated file, but
this dependency is not expressed in the build.

Fixes: 1e8808a4a0 ("freedreno/ir3: refactor out helper to compile shader from asm")
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7870>
(cherry picked from commit 9eee405484)
2020-12-03 10:52:09 -08:00
James Park
b313702aeb radv: Fix leak in radv_amdgpu_winsys_destroy()
Fixes: fa97061a82 ("radv/winsys: Add binary syncobj ABI changes for timeline semaphores.")

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7866>
(cherry picked from commit 6ec0953e22)

 Conflicts:
	src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
2020-12-03 10:51:54 -08:00
Marek Olšák
3b2f3e626f radeonsi: disable WGP mode on gfx10.3 to prevent hangs
I think that reducing the CU mask to 1 disabled CU per SA broke the WGP mode
on VanGogh, causing a hang. To be sure, disable it on all chips.

Fixes: 9538b9a68e - radeonsi: add support for Sienna Cichlid

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7721>
(cherry picked from commit 69c927debe)
2020-12-03 10:49:06 -08:00
Marek Olšák
cd94b261fc radeonsi: fix a nasty bug in si_pm4.c
If you did:
  si_pm4_set_reg(pm4, reg, val0);
  si_pm4_cmd_add(pm4, val1);
  si_pm4 set_reg(pm4, reg + 4, val1);

it wrote val0 to reg, val1 to reg + 4, and val2 to reg + 8.

This fixes it by clearing last_opcode in si_pm4_cmd_add, so that
si_pm4_set_reg doesn't try to combine set_reg calls across si_pm4_cmd_add.

Fixes: da78d50bc8 - radeonsi: make si_pm4_cmd_begin/end static and simplify all usages

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7721>
(cherry picked from commit 0d4f1dcd15)
2020-12-03 10:49:05 -08:00
Marek Olšák
2f493068ec radeonsi: fix a memory leak in si_create_dcc_retile_cs
Fixes: 1f21396431 - radeonsi: add support for displayable DCC for multi-RB chips

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7721>
(cherry picked from commit e64d5cc4d6)
2020-12-03 10:49:05 -08:00
Lucas Stach
a9f4a65402 etnaviv: fix disabling of INT filter for real
Missing a copy of the pipe_sampler_state into the etna_sampler_state object
lead to the texture_use_int_filter() to always see a max_anisotropy of 0, so
the INT filter wasn't disabled when necessary. Also state emission should
never change the state objects, as this might also lead to stale information
being kept around the in the state object.

Fixes: 89a41dae77 (etnaviv: do not use int filter when
                     anisotropic filtering is used)

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7638>
2020-12-03 10:47:16 -08:00
Rhys Perry
25b8f1c15a aco: fix fp16 *0.5 omod
We were testing for -0.5 instead.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 1210e0bd62 ("aco: create 16-bit input and output modifiers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7605>
2020-12-03 10:45:10 -08:00
Rhys Perry
e902dd8696 aco: disable omod if the sign of zeros should be preserved
The RDNA ISA doc says that omod doesn't preserve -0.0 in 6.2.2. LLVM
appears to always disable omod in this situation, but clamp is unaffected.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: df645fa369 ("aco: implement VK_KHR_shader_float_controls")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7605>
2020-12-03 10:45:10 -08:00
Rhys Perry
944bdf259c aco: disallow various v_add_u32 opts if modifiers are used
Check for clamp, SDWA or DPP. The optimization isn't possible with SDWA
and DPP, so it would have been skipped anyway. Doing any of these with a
clamp modifier present would be incorrect.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
2020-12-03 10:45:10 -08:00
Rhys Perry
7ea1f6ff78 aco: fix combine_constant_comparison_ordering() NaN check with 16/64-bit
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
2020-12-03 10:45:10 -08:00
Rhys Perry
d3dec24a9b aco: don't combine precise max(min()) to med3
fossil-db (Navi):
Totals from 241 (0.18% of 137413) affected shaders:
CodeSize: 856280 -> 856308 (+0.00%); split: -0.00%, +0.00%
Instrs: 164220 -> 164514 (+0.18%); split: -0.00%, +0.18%
Cycles: 1031916 -> 1033092 (+0.11%); split: -0.00%, +0.11%
VMEM: 77855 -> 78514 (+0.85%); split: +0.85%, -0.01%
SMEM: 20501 -> 20593 (+0.45%); split: +0.46%, -0.01%
Copies: 9791 -> 9790 (-0.01%); split: -0.03%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
2020-12-03 10:45:10 -08:00
Dylan Baker
eaf61d8a65 pick-ui: don't grab the mouse
It's super annoying
2020-12-03 10:41:27 -08:00
Dylan Baker
751c242e86 .pick_status.json: Update to 872c4bcd27 2020-12-03 10:41:09 -08:00
Marek Olšák
e0cf53b127 ac/nir: fix a typo in ac_are_tessfactors_def_in_all_invocs
I think it only made the pass return false if there was a barrier

Fixes: 2832bc972b - ac/nir_to_llvm: add ac_are_tessfactors_def_in_all_invocs()

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623>
(cherry picked from commit 9659384744)
2020-12-02 15:07:06 -08:00
Dylan Baker
64b117c49f amd/llvm: run clang-format
So that code applies cleanly from master. This uses the same
.clang-format settings that master does

Equivalent to 82d2d73e03, which has other
changes.
2020-12-02 15:06:58 -08:00
Tapani Pälli
62eb2f4941 iris: initialize shared screen->vtbl only once
Screen is shared among contexts, other context might be already using
vtbl while another initializes it again.

 ==45872== Possible data race during write of size 8 at 0x5DDAE78 by thread #549
 ==45872== Locks held: 1, at address 0x5D1B6F8
 ==45872==    at 0x6D66D91: gen9_init_state (iris_state.c:7816)
 ==45872==    by 0x6BA0A31: iris_create_context (iris_context.c:342)
 ==45872==    by 0x621F390: st_api_create_context (st_manager.c:917)
 ==45872==    by 0x620E6F9: dri_create_context (dri_context.c:163)
 ==45872==    by 0x6A40DB1: driCreateContextAttribs (dri_util.c:480)
 ==45872==    by 0x540B963: dri2_create_context (egl_dri2.c:1583)
 ==45872==    by 0x53FB84E: eglCreateContext (eglapi.c:821)
 ==45872==
 ==45872== This conflicts with a previous read of size 8 by thread #544
 ==45872== Locks held: 1, at address 0x5F6E0E0
 ==45872==    at 0x6CB779E: blorp_alloc_binding_table (iris_blorp.c:167)
 ==45872==    by 0x6CAEF70: blorp_emit_surface_states (blorp_genX_exec.h:1540)
 ==45872==    by 0x6CB67F9: blorp_exec (blorp_genX_exec.h:2016)
 ==45872==    by 0x6CB7AFE: iris_blorp_exec (iris_blorp.c:307)
 ==45872==    by 0x70F5916: try_blorp_blit (blorp_blit.c:2145)
 ==45872==    by 0x70F5FCA: do_blorp_blit (blorp_blit.c:2273)
 ==45872==    by 0x70F778F: blorp_copy (blorp_blit.c:2803)
 ==45872==    by 0x6BB9EB6: iris_copy_region (iris_blit.c:725)

v2: move as genX(init_screen_state) (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7544>
(cherry picked from commit 460287adca)

Conflicts:
	src/gallium/drivers/iris/iris_screen.c
2020-12-01 12:45:39 -08:00
Christian Gmeiner
3577ac21ba etnaviv/drm: fix evil-twin etna_drm_table_lock
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7832>
(cherry picked from commit aad0c7c6b8)
2020-12-01 11:25:34 -08:00
Marek Olšák
127a1b1244 mesa: call FLUSH_VERTICES before changing sampler uniforms
Fixes: 9545139ce5 "mesa: skip FLUSH_VERTICES() if no samplers were changed"

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6946>
(cherry picked from commit 0a2117bc9e)
2020-12-01 11:25:33 -08:00
Rhys Perry
17f0681ff9 nir: fix sampler_lod_parameters_pan indices
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: deaebc82a7 "nir: Add load_sampler_lod_paramaters_pan intrinsic"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
(cherry picked from commit f6407b9b7d)
2020-12-01 11:25:28 -08:00
Danylo Piliaiev
099633b6af freedreno/a6xx: Fix typo in height alignment calculation in a6xx layout
Fixes KHR-GL31.texture_size_promotion.functional

Fixes: e49748521e
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7792>
(cherry picked from commit a569ffeb83)
2020-12-01 11:25:28 -08:00
Lionel Landwerlin
ec53c72f58 anv: fix descriptor pool leak in VMA object
Quoting the spec :

   "When a pool is destroyed, all descriptor sets allocated from the
    pool are implicitly freed and become invalid. Descriptor sets
    allocated from a given pool do not need to be freed before
    destroying that descriptor pool."

This implies we might leak nodes allocated in the vma object.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0a6d2593b8 ("anv: Allocate descriptor buffers from the BO cache")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7796>
(cherry picked from commit 5d55ca9c30)
2020-12-01 11:25:27 -08:00
Timur Kristóf
bfc05f365c aco/optimizer: Only set scc_needed when it is actually needed.
Not every p_cbranch uses the SCC, but our optimizer thought so.

Fixes: 8a32f57fff
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7677>
(cherry picked from commit 8bd3fefb74)
2020-12-01 11:25:26 -08:00
Pierre-Eric Pelloux-Prayer
2a74f0ceb6 radeonsi/gfx10: flush gfx cs on ngg -> legacy transition
with a sequence like this:

  glClear(STENCIL)
  glBeginTransformFeedback()
  ...
  glEndTransformFeedback()
  glClear(STENCIL)

The second clear sometimes may produce an unexpected result.

Calling si_flush_gfx_cs() when doing ngg -> legacy transition seems to be a
valid workaround (both for the synthetic reproducer and the real Blender bug).

Using flush flags or events (BOTTOM_OF_PIPE_TS, RESET_TO_LOWEST_VGT) didn't help.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2941
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7750>
(cherry picked from commit 0b3bd7c516)
2020-12-01 11:25:25 -08:00
Rhys Perry
99aec40f08 nir/unsigned_upper_bound: fix buffer overflow in search_phi_bcsel
It should only recurse if there's enough space to add the phi sources.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 72ac3f6026 ("nir: add nir_unsigned_upper_bound and nir_addition_might_overflow")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7748>
(cherry picked from commit 65fbae16e3)
2020-12-01 11:25:24 -08:00
Dave Airlie
160d7e80e9 llvmpipe/setup: move point stats collection earlier.
You have to count the stats pre-culling here.

Just like dc261cdd42 did for lines.

VK-GL-CTS dEQP-VK.query_pool.statistics_query.clipping_primitives*point_list

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
(cherry picked from commit 2ed54033de)
2020-12-01 11:25:21 -08:00
Erik Faye-Lund
1b6579613a zink: fix layered resolves
Until recently, we ended up using u_blitter here, because
info->render_condition_enable was always true here. But when we recently
fixed that overly broad check, this broke.

So let's fix layered-resolves, by actually checking if the resource has
layers respect them in that case, similar to what we do in blit_native.

Fixes: 19906022e2 ("zink: more accurately track supported blits")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3843
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7737>
(cherry picked from commit 2ac396e2e5)
2020-12-01 11:25:20 -08:00
Eric Engestrom
25412edb13 gitlab-ci: drop deprecated platforms that snuck in when nobody was watching
... even though I did review that commit. My bad :]

Fixes: c56f09124b ("gitlab-ci: Move classic driver testing to a new meson-classic job")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5844>
(cherry picked from commit 4da8323a14)
2020-12-01 11:25:18 -08:00
Ian Romanick
85a5106ca5 intel/compiler: Rotate instructions ROR and ROL cannot have source modifiers
I checked the Bspec for both Gen11 and Gen12, and it appears that rotate
instructions cannot have source modifiers or saturate modifer.  Saturate
was already handled.

Fixes: 1e92e83856 ("intel/compiler: Emit ROR and ROL instruction")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7650>
(cherry picked from commit 6edc2a3d40)
2020-12-01 11:25:17 -08:00
Dylan Baker
45509d12b1 .pick_status.json: Update to 89f6b72f19 2020-12-01 10:02:50 -08:00
SureshGuttula
fc699c4aba radeon/vcn : Corrected dpb_size calculation for VP9_2
Currently dpb_size for VP9 profile0 and profile2 is same eventhough
for profile2 dpb_size is  multiplied by extra 3/2 and we are
seeing VM_L2_PROTECTION_FAULT error and ring vcn_dec timeout because
of less dpb_size for VP9_2.

This patch will correct dpb_size for VP9_2 and fixes the issue.

Signed-off-by: SureshGuttula <suresh.guttula@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7480>
(cherry picked from commit 956228da3a)
2020-12-01 10:02:42 -08:00
SureshGuttula
7cb4663c57 gallium: update abs_delta segementation parameter
This patch updates segmentation_abs_or_delta_update value based on
VP9 bitstream header info.

Netflix videos are showing corrupted output when codec is HW vp9
and segemantion enabled.This change will fix the corruption issue.

Signed-off-by: SureshGuttula <suresh.guttula@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7290>
(cherry picked from commit bef6007c3a)
2020-12-01 10:01:15 -08:00
Krunal Patel
10c2cddf56 radeon/vce: Bitrate not updated when changing framerate
Issue: Encoding parameters not updated after changing FrameRate

Root Cause:
In rvce_begin_frame, need_rate_control was enabled if the target_bitrate,
quant_i_frames, quant_p_frames, quant_b_frames or rate_ctrl_method
changes. Due to this the rate_control() was not updating the encoder
parameters with new framerate, peak_bits_per_picture_integer and
avg_target_bits_per_picture

Fix:
Added the condition where we will check if there is a change in
other parameters and enable need_rate_control. Eventually updating the
encoder parameters with new framerate and bitrate.

Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7696>
(cherry picked from commit 35613c752f)
2020-11-25 10:00:00 -08:00
Dylan Baker
d6a3111a99 .pick_status.json: Update to a92f597b98 2020-11-23 11:21:30 -08:00
Dylan Baker
c17b0e37f9 docs: Add relnotes for 20.2.3 2020-11-23 11:20:23 -08:00
Dylan Baker
8440307a61 version: bump version to 20.2.3 2020-11-23 11:03:03 -08:00
Dylan Baker
0cf22886be docs: add release notes for 20.2.3 2020-11-23 11:02:26 -08:00
Kenneth Graunke
b603373448 intel/fs: Fix sampler message headers on Gen11+ when using scratch
Icelake's sampler message header introduces a field in m0.3 bit 0
which controls whether the sampler state pointer should be relative
to bindless sampler state base address or dynamic state base address.

g0.3 bit 0 is part of the per-thread scratch space field.  On older
hardware, we were able to copy that along because the sampler ignored
bits 4:0.  Now, however, we need to mask them out.

Fixes various textureGatherOffsets piglit tests when forcing the FS
to run with 2048 bytes of per-thread scratch space (which is a
per-thread scratch space encoding of 1, meaning bit 0 will be set).

Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6735>
(cherry picked from commit 31290f9806)
2020-11-19 11:04:48 -08:00
Marek Olšák
6b6f850afd radeonsi: fix scan_instruction for bindless inc_wrap/dec_wrap atomics
Fixes: 25fff591c1 - radeonsi: add support for nir atomic_inc_wrap/atomic_dec_wrap

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
(cherry picked from commit ff22fcf450)
2020-11-19 11:04:48 -08:00
Marek Olšák
5c7eb3da12 radeonsi: only do VGT_FLUSH for fast launch if previous draw was normal launch
Fixes: 3da91b3327 - radeonsi/ngg: add VGT_FLUSH when enabling fast launch

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
(cherry picked from commit 8d2876a343)
2020-11-19 11:04:48 -08:00
Marek Olšák
547332b50f radeonsi: do VGT_FLUSH when switching NGG -> legacy on Sienna Cichlid
Other chips don't need this.

Fixes: 9538b9a68e - radeonsi: add support for Sienna Cichlid

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
(cherry picked from commit c4ebdf9ee7)
2020-11-19 11:04:48 -08:00
Chad Versace
6a6f94e9ec anv/image: Fix isl_surf_usage_flags for stencil images
Respect VkImageStencilUsageCreateInfoEXT.

CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit b50275a4b6)
2020-11-19 11:04:48 -08:00
Chad Versace
8d5be4e02e anv/image: Check DISJOINT in vkGetPhysicalDeviceImageFormatProperties2 (v2)
The code did not return error when VK_IMAGE_CREATE_DISJOINT_BIT was
incompatible with the other input params.

If the Vulkan spec forbids a set of input params for vkCreateImage,
but permits them for vkGetPhysicalDeviceImageFormatProperties2,
then vkGetPhysicalDeviceImageFormatProperties2 must reject those input
params with failure.

- v2: Clearer commit message.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v2)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 51a19c83b0)
2020-11-19 11:04:48 -08:00
Eric Anholt
9020df131f freedreno: Fix leak of shader binary on disk cache hits.
It's supposed to be ralloced -- there's not even a shader variant destroy
function for freeing, just ralloc_free() on the ir3_shader_variant or the
parent ir3_shader when you're done!

Fixes: f97acb4bb4 ("freedreno/ir3: disk-cache support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5810>
(cherry picked from commit 433841d9eb)
2020-11-19 11:04:48 -08:00
Tapani Pälli
6f379548a9 egl/dri2: fix race between image create and egl_image_target_texture
All other functions calling _eglLookupImage hold the display lock.

 ==16659== Possible data race during write of size 8 at 0x5D1BCF0 by thread #2668
 ==16659== Locks held: 1, at address 0x5D1B6F8
 ==16659==    at 0x5405DDF: _eglLinkResource (egldisplay.c:454)
 ==16659==    by 0x53F9189: _eglLinkImage (eglimage.h:138)
 ==16659==    by 0x53FE2CA: _eglCreateImageCommon (eglapi.c:1740)
 ==16659==    by 0x53FE39A: eglCreateImageKHR (eglapi.c:1751)
 ==16659==
 ==16659== This conflicts with a previous read of size 8 by thread #2664
 ==16659== Locks held: 1, at address 0x5308D00
 ==16659==    at 0x5405C06: _eglCheckResource (egldisplay.c:387)
 ==16659==    by 0x5408C92: _eglLookupImage (eglimage.h:162)
 ==16659==    by 0x5409E96: dri2_lookup_egl_image (egl_dri2.c:688)
 ==16659==    by 0x6210AAF: dri2_lookup_egl_image (dri_helpers.c:250)
 ==16659==    by 0x6212843: dri_get_egl_image (dri_screen.c:470)
 ==16659==    by 0x625F7CC: st_get_egl_image (st_cb_eglimage.c:152)
 ==16659==    by 0x625FE7D: st_egl_image_target_texture_2d (st_cb_eglimage.c:354)
 ==16659==    by 0x6501C05: egl_image_target_texture (teximage.c:3446)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7544>
(cherry picked from commit 959c2d1edb)
2020-11-19 11:04:48 -08:00
Dave Airlie
8e081088a2 draw: fix tess eval pipeline statistics.
The number of invocations wasn't getting incremented correctly.

Fixes: 202bc38ce9 ("draw: collect tessellation invocations statistics")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7597>
(cherry picked from commit ce07c52b82)
2020-11-19 11:04:48 -08:00
Christian Gmeiner
b14fd0d92d etnaviv: nir: do not run opt loop after nir_lower_bool_xxx(..)
Running the optimizations after bool to float/int lowering is not going
to work. Large portions of NIR are likely to blow up if they see
floats/ints in weird places. Most of the bool->float/int conversions
are direct instruction substitutions and it's not going to leave a lot
of garbage around to optimize.

Fixes nir.h:261: nir_const_value_as_bool: Assertion `i == 0 || i == -1' failed
dEQP-GLES2.functional.shaders.loops.while_constant_iterations.no_iterations_vertex

Here are shader-db results for GC2000:

instructions HURT:   shaders/tesseract/488.shader_test FRAG:           516 -> 524 (1.55%)
instructions HURT:   shaders/tesseract/491.shader_test FRAG:           248 -> 260 (4.84%)
instructions HURT:   shaders/tesseract/494.shader_test FRAG:           244 -> 256 (4.92%)
instructions HURT:   shaders/tesseract/238.shader_test FRAG:           232 -> 244 (5.17%)
instructions HURT:   shaders/tesseract/241.shader_test FRAG:           232 -> 244 (5.17%)
instructions HURT:   shaders/tesseract/127.shader_test FRAG:           76 -> 80 (5.26%)
instructions HURT:   shaders/tesseract/130.shader_test FRAG:           148 -> 156 (5.41%)
instructions HURT:   shaders/tesseract/226.shader_test FRAG:           192 -> 204 (6.25%)
instructions HURT:   shaders/tesseract/229.shader_test FRAG:           192 -> 204 (6.25%)
instructions HURT:   shaders/tesseract/217.shader_test FRAG:           152 -> 164 (7.89%)
instructions HURT:   shaders/tesseract/214.shader_test FRAG:           152 -> 164 (7.89%)
instructions HURT:   shaders/tesseract/205.shader_test FRAG:           112 -> 124 (10.71%)
instructions HURT:   shaders/tesseract/202.shader_test FRAG:           112 -> 124 (10.71%)
instructions HURT:   shaders/tesseract/169.shader_test FRAG:           32 -> 36 (12.50%)
instructions HURT:   shaders/tesseract/166.shader_test FRAG:           32 -> 36 (12.50%)
instructions HURT:   shaders/deqp_gles3/61312.shader_test FRAG:        448 -> 508 (13.39%)
instructions HURT:   shaders/deqp_gles3/61309.shader_test FRAG:        448 -> 508 (13.39%)
instructions HURT:   shaders/deqp_gles3/61324.shader_test FRAG:        448 -> 508 (13.39%)
instructions HURT:   shaders/tesseract/118.shader_test FRAG:           28 -> 32 (14.29%)
instructions HURT:   shaders/tesseract/181.shader_test FRAG:           52 -> 60 (15.38%)
instructions HURT:   shaders/tesseract/178.shader_test FRAG:           52 -> 60 (15.38%)
instructions HURT:   shaders/tesseract/121.shader_test FRAG:           52 -> 60 (15.38%)
instructions HURT:   shaders/tesseract/193.shader_test FRAG:           72 -> 84 (16.67%)
instructions HURT:   shaders/tesseract/190.shader_test FRAG:           72 -> 84 (16.67%)

total instructions in shared programs: 64220 -> 64572 (0.55%)
instructions in affected programs: 4924 -> 5276 (7.15%)
helped: 5
HURT: 24
helped stats (abs) min: 4 max: 8 x̄: 5.60 x̃: 4
helped stats (rel) min: 4.35% max: 5.41% x̄: 4.72% x̃: 4.35%
HURT stats (abs)   min: 4 max: 60 x̄: 15.83 x̃: 12
HURT stats (rel)   min: 1.55% max: 16.67% x̄: 10.04% x̃: 10.71%
95% mean confidence interval for instructions value: 5.39 18.89
95% mean confidence interval for instructions %-change: 4.81% 10.18%
Instructions are HURT.

total temps in shared programs: 2514 -> 2512 (-0.08%)
temps in affected programs: 9 -> 7 (-22.22%)
helped: 2
HURT: 0

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7624>
(cherry picked from commit 9b6516ac24)
2020-11-19 11:04:48 -08:00
Vinson Lee
35c46bcf0b vdpau: Add missing printf format specifier.
Fix defect reported by Coverity Scan.

Extra argument to printf format specifier (PRINTF_ARGS)
extra_argument: This argument was not used by the format string: vmixer->max_layers.

Fixes: 89b9863252 ("vdpau: Add support for parameters")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7200>
(cherry picked from commit 3fe5c13d71)
2020-11-19 11:04:48 -08:00
Rob Clark
bf4a4d61a0 freedreno/ir3: Fix crash in shader compile fail path
Fixes: 74140c2e85 ("freedreno/ir3: convert over to ralloc")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7612>
(cherry picked from commit 4b65c09d86)
2020-11-19 11:04:47 -08:00
Nanley Chery
cd8081867f mesa: Clamp some depth values in glClearBufferfi
OpenGL 3.0 spec, section 4.2.3 "Clearing the Buffers":

   depth and stencil are the values to clear the depth and stencil
   buffers to, respectively. Clamping and type conversion for
   fixed-point depth buffers are performed in the same fashion as for
   ClearDepth.

Enables iris to pass the clearbuffer-depth-stencil piglit test.

Cc: mesa-stable
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7410>
(cherry picked from commit 2e713313a2)
2020-11-19 11:04:47 -08:00
Nanley Chery
f2d8a62116 mesa: Clamp some depth values in glClearBufferfv
OpenGL 3.0 spec, section 4.2.3 "Clearing the Buffers":

   If buffer is DEPTH, drawbuffer must be zero, and value points to the
   single depth value to clear the depth buffer to. Clamping and type
   conversion for fixed-point depth buffers are performed in the same
   fashion as for ClearDepth.

Enables iris to pass the clearbuffer-depth piglit test.

v2. Add spec citation. (Eric Anholt)
v3. Don't clamp floating point formats. (Eric Anholt)

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7410>
(cherry picked from commit 1bf539b3a2)
2020-11-19 11:04:47 -08:00
Nanley Chery
4b088edc2b mesa: Add and use _mesa_has_depth_float_channel
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7410>
(cherry picked from commit fda015023a)
2020-11-19 11:04:47 -08:00
Brendan Dougherty
ce9b4296e1 mesa: Fix vertex_format_to_pipe_format index.
Corrects the index into the vertex_formats table for `integer` and
`normalized` values other than 0 or 1.

Fixes: e6448f993b ("mesa: translate into gallium vertex formats in mesa/main")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7554>
(cherry picked from commit 9edb6e1be0)
2020-11-19 10:49:42 -08:00
Marcin Ślusarz
8770b7f426 nir: handle float atomics in copy propagation pass
Without this patch, copy propagation pass can optimize out
buffer loads out of compare & swap loop, which then leads
to infinite loop.

Triggered by a change to atomicCompSwap float test in piglit.

Fixes: 8424cd8fbd ("nir: Account for atomics in copy propagation.")
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7538>
(cherry picked from commit 6e6dab4799)
2020-11-19 10:49:41 -08:00
Jason Ekstrand
e9fe1addb7 intel/fs: Fix use of undefined value in fixup_nomask_control_flow
Fixes: a8ac0bd759 "intel/fs/gen12: Workaround unwanted SEND execution..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7536>
(cherry picked from commit e9caba6ce5)
2020-11-19 10:49:40 -08:00
Eric Anholt
48a5602dd5 util/set: Fix the _mesa_set_clear function to not leave tombstones.
This implementation was broken and should have just been the same as the
hash_table_clear() one, which I copied over here.  It was setting all
formerly-present entries to deleted, yet also setting deleted_entries to
0.  This meant that all new searches or additions after clearing would
have to reprobe the whole table until a rehash happened, and that rehash
would be delayed because we violated the deleted_entries invariant.

No statistically significant performance difference on softpipe
KHR-GL33.texture_swizzle.functional runtime (n=18)

Fixes: 5c075b0855 ("util/set: add a set_clear function")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7244>
(cherry picked from commit 2afdd94f86)
2020-11-19 10:49:38 -08:00
Rob Clark
53d03d91b8 freedreno: Protect gmem_cache ralloc allocations
Since the ralloc context for cache_key allocation is shared between all
the contexts hanging off a screen, we need to allocate the key under the
screen->lock.

Fixes: 91f9bb99c5 ("freedreno: add gmem state cache")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>
(cherry picked from commit cb034ae44f)
2020-11-19 10:49:36 -08:00
Vinson Lee
28c5ca4588 frontends/va: Fix *num_entrypoints check.
Fix defect reported by Coverity Scan.

Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking num_entrypoints suggests that it
may be null, but it has already been dereferenced on all paths
leading to the check.

Fixes: 5bcaa1b9e9 ("st/va: add encode entrypoint v2")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7360>
(cherry picked from commit 7820c8c13f)
2020-11-19 10:49:06 -08:00
Erik Faye-Lund
40f664a9e5 mesa/main: add missing include in glformats.h
This header uses uint32_t without including stdint.h. This worked fine
by accident until a new c-source started including it.

Fixes: 1bf539b3a2 ("mesa: Clamp some depth values in glClearBufferfv")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7637>
(cherry picked from commit 2410def98f)
2020-11-19 10:48:58 -08:00
Matt Turner
323c4e957d glcpp: Handle bison-3.6 error message changes
In bison's commit 72c9fa4510eb (skeletons: use "end of file" instead of
"$end") in bison-3.6, '$end' was changed to 'end of file' in error
messages. Since our glcpp test cases contain the expected output text,
they rely on the particular messages printed by bison. The test case
084-unbalanced-parentheses fails when Mesa is built with bison-3.6 due
to this change.

To allow the test to pass on all supported versions of bison, we:

   1. Change '$end' -> 'end of file' in the .expected file, and
   2. Normalize the error generated by the test case with the same
      replacement

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3181
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7659>
(cherry picked from commit df29d0a111)
2020-11-19 10:48:38 -08:00
Dylan Baker
c2fb3d3f0e .pick_status.json: Update to bac6cc586f 2020-11-19 10:48:09 -08:00
Erik Faye-Lund
0368cdd51d gallium/util: do not pass undefined sample-count
We forgot to initialize the sample_count member here, leading to it
being undefined. This causes problems on MSVC when compiling in
debug-mode, where we get a run-time error for using an undefined
variable.

To avoid similar problems in the future if more fields are added,
let's initialize the whole struct to zero to start with. This also
allows us to remove a no-longer-needed zero-initialization.

Fixes: cf170616da ("gallium: Add a util_blitter path for using a custom VS and FS.")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7503>
(cherry picked from commit 441feda0bb)
2020-11-19 10:47:37 -08:00
Vinson Lee
08153eeb7d amd/addrlib: Add missing va_end.
Fix defect reported by Coverity Scan.

Missing varargs init or cleanup (VARARGS)
missing_va_end: va_end was not called for debugPrintInput.ap.

Fixes: 69ea473eeb ("amd/addrlib: update to the latest version")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7299>
(cherry picked from commit c8630fd114)
2020-11-19 10:47:37 -08:00
Nanley Chery
06c593be5b iris: Flush dmabufs during context flushes
Currently, every modifier that uses CCS also lacks support for
fast-clears. On gen9+, dmabufs may gain fast-cleared blocks through
clear calls. On gen12, fast-clearing can occur during any rendering
operation. Mark when dmabufs gain fast-cleared blocks and flush them
during a context flush operation.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3425
Tested-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7384>
(cherry picked from commit 5194cbc766)
2020-11-19 10:47:37 -08:00
Kenneth Graunke
151bff94c3 iris: fix source/destination layers for 3D blits
See commit ea32691257 for the
corresponding fix in anv.

Fixes Piglit's fbo-generatemipmap-3d.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7321>
(cherry picked from commit 382451ff9d)
2020-11-19 10:47:37 -08:00
Tony Wasserka
aa35378aeb aco/ra: Fix counting of subdword variables in get_reg_create_vector
The loop variable "k" shadowed another variable in the outer scope, so
this loop had no actual effect.

Fixes: 52cc1f8237 ("aco: improve p_create_vector RA for sub-dword operands")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7427>
(cherry picked from commit 456beb40b8)
2020-11-19 10:47:37 -08:00
Jason Ekstrand
a37b964ec1 nir/opt_intrinsics: Report progress for the gl_SampleMask optimization
Fixes: d3ce8a7f6b "nir: optimize gl_SampleMaskIn to gl_HelperInvocation..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
(cherry picked from commit d9c0f3627d)
2020-11-19 10:47:37 -08:00
Rhys Perry
307fe5bd61 nir: skip bcsel with non-trivial swizzle in opt_simplify_bcsel_of_phi()
Fixes validation error in a Dota 2 shader.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: b031c64349 ("nir: Convert a bcsel with only phi node sources to a phi node")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7426>
(cherry picked from commit 233a820f2c)
2020-11-19 10:47:37 -08:00
Rhys Perry
db671d8687 nir: add nir_alu_src_is_trivial_ssa()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7426>
(cherry picked from commit 1df2fc9f9c)
2020-11-19 10:47:37 -08:00
Jason Ekstrand
8564e7da36 nir: Handle incomplete derefs in split_struct_vars
In split_var_list_structs where we initalize the splitting, we already
use get_complex_used_vars to avoid splitting any variables that have a
complex use.  However, we weren't actually handling the complex uses
properly in the case where we can't actually find the variable.

Fixes: f1cb3348f1 "nir/split_vars: Properly bail in the presence of ..."
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
(cherry picked from commit 5664713d7b)
2020-11-19 10:47:37 -08:00
Yevhenii Kolesnikov
194d070040 nir/large_constants: only search for constant duplicates
Fixes: b6d4753568 ("nir/large_constants: De-duplicate constants")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3706
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7350>
(cherry picked from commit ea81889ea4)
2020-11-19 10:47:37 -08:00
Igor V. Kovalenko
e21a96791c r600: amend space check for chips older than EVERGREEN
evergreen_emit_atomic_buffer_setup_count is only called if chip >= EVERGREEN
otherwise atomic_used_mask is left uninitialized when unconditionally used by
r600_need_cs_space so it might want more space than needed

fix this by always initializing atomic_used_mask

Fixes: 32529e6084 ("r600/eg: rework atomic counter emission with flushes")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7417>
(cherry picked from commit 7ae81d65a4)
2020-11-19 10:47:37 -08:00
Jason Ekstrand
f710a35e30 mesa/spirv: Lower variable initializers for global variables
We lower variable initializers for local variables higher up in the
function but we never called nir_lower_variable_initializers for
anything else.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7296>
(cherry picked from commit 6b85a887ff)
2020-11-19 10:47:37 -08:00
Tapani Pälli
9c55ccd8fd mesa: do not throw _mesa_problem when invalid enum is used
Like with other getters, invalid enum is dealt in find_value by setting
error to GL_INVALID_ENUM and returning INVALID_TYPE which makes
get_value_size return 0.

Fixes false 'implementation errors' seen with Piglit test:
   ext_external_objects-memory-object-api-errors

   "Mesa 20.3.0-devel implementation error: invalid value type in GetUnsignedBytei_vEXT()
   Please report at https://gitlab.freedesktop.org/mesa/mesa/-/issues"

v2: add assert to get_value_size() (Lionel)

Fixes: e064d66020 ("mesa: implement glGetUnsignedByte{v|i_v}")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eleni Maria Stea <estea@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7403>
(cherry picked from commit 29fc115d58)
2020-11-19 10:47:37 -08:00
Tapani Pälli
3ed72705b3 mesa/st: call memobj_destroy only if there is memory imported
Something may go wrong during import which leaves pointer to null and
when ctx and it's shared state gets destroyed we will attempt to call
memobj_destroy. Instead of forcing every driver to handle it, add check
here.

Fixes crashes with Piglit test:
   ext_external_objects_fd-memory-object-api-errors

Fixes: 99cf910834 ("mesa/st: Actually free the driver part of memory objects on destruction.")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eleni Maria Stea <estea@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7403>
(cherry picked from commit e02e1ccbee)
2020-11-19 10:47:37 -08:00
Dylan Baker
18a9762691 .pick_status.json: Mark ea32691257 as backported 2020-11-19 10:47:37 -08:00
Dylan Baker
b017db8350 .pick_status.json: Mark 87934f02f9 as backported 2020-11-19 10:47:37 -08:00
Rhys Perry
d0d0c3abc4 radv: fix shader caching with NaN fixup workaround
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 6f21995f98 ("radv: add new drirc option radv_enable_mrt_output_nan_fixup")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7423>
(cherry picked from commit ac65d3b6b8)
2020-11-19 10:47:37 -08:00
Rhys Perry
f00bce0ee4 radv: fix shader caching with discard->demote workaround
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: bdd7587414 ("radv: use nir_lower_discard_to_demote to work around game bugs")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7423>
(cherry picked from commit 36f62494ec)
2020-11-19 10:47:37 -08:00
Marcin Ślusarz
5e5060324b anv: always annotate memory returned from anv_gem_mmap
anv_bo_pool_alloc expects that the memory returned by and_gem_mmap
was annotated using VALGRIND_MALLOCLIKE_BLOCK, but anv_gem_mmap_offset
didn't do that. Move annotation from anv_gem_mmap_legacy to common
code.

Fixes: 4abf0837cd ("anv: Add support for new MMAP_OFFSET ioctl.")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7381>
(cherry picked from commit b5e2c58ad8)
2020-11-19 10:47:37 -08:00
Vinson Lee
8f766d37eb os: Fix open result check.
Fix defect reported by Coverity Scan.

Argument cannot be negative (NEGATIVE_RETURNS)
negative_returns: f is passed to a parameter that cannot be negative.

CID: 1364709
Fixes: 13fa051356 ("auxiliary/os: add new os_get_command_line() function")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7344>
(cherry picked from commit b2a21febe0)
2020-11-19 10:47:37 -08:00
Michel Dänzer
9f3d7d54d8 iris/bufmgr: Handle NULL bufmgr in iris_bufmgr_get_for_fd
iris_bufmgr_create can return NULL, in which case we'd crash in
list_addtail.

Reported by Coverity/clang (for i965, but iris code looks the same).

Fixes: 7557f16059 ("iris: share buffer managers accross screens")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7335>
(cherry picked from commit 1eda842318)
2020-11-19 10:47:37 -08:00
Michel Dänzer
436592d1f4 i965/bufmgr: Handle NULL bufmgr in brw_bufmgr_get_for_fd
brw_bufmgr_create can return NULL, in which case we'd crash in
list_addtail.

Reported by Coverity/clang.

Fixes: 4094558e86 ("i965: share buffer managers across screens")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7335>
(cherry picked from commit eb61f8959e)
2020-11-19 10:47:37 -08:00
Timothy Arceri
f06c466895 glsl: add extra pp tokens workaround and enable for CoR
The CTS now tests to make sure these are not allowed. However, previously
drivers (including Mesa) would allow them to exist and just issue a
warning. Some old applications such as Champions of Regnum seem to
depend on this.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/422

Fixes: 43047384c3 ("glsl/glcpp: Promote "extra token at end of directive" from warning to error")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7361>
(cherry picked from commit a09717c4de)

Conflicts:
	src/gallium/auxiliary/pipe-loader/driinfo_gallium.h
	src/mesa/drivers/dri/i965/intel_screen.c
2020-11-19 10:47:37 -08:00
Dylan Baker
889f43c3f1 .pick_status.json: Update to 87dc3106b0 2020-11-19 10:47:37 -08:00
Krunal Patel
46415c169d radeon/vcn: Bitrate not updated when changing framerate
Issue: Encoding parameters not updated after changing FrameRate

Root Cause:
In radeon_enc_begin_frame, there is a parameter need_rate_control
which was enabled only if the bitrate is changed. Due to this the
radeon_enc_rc_layer_init was not updating the encoder parameters with new
framerate, peak_bits_per_picture_integer and avg_target_bits_per_picture

Fix:
Added the condition where we will check if there is a change in
other parameters and enable rate control. Eventually updating the
encoder parameters with new framerate and bitrate.

Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Boyuan Zhang boyuan.zhang@amd.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7363>
(cherry picked from commit 4143572f93)
2020-11-19 10:47:37 -08:00
Krunal Patel
cef988c3cf gallium/auxiliary/vl: Odd Dimensions are failing
Issue: While running the tast for odd resolutions there are green lines
observed in the dumped image. The resolution is 321x241, the extra 1 pixel
data is missing in the image. The reason for this is in the post
processing when we adjust the size of height and width we are
dividing it by 2.

Fix: To resolve this issue we first need to align it to 2 and then divide
by 2 to get the required values. Once we do this we will have proper data
in the dumped image and missing pixel data will be available.

Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
(cherry picked from commit d78e7b7aee)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7282>
2020-11-19 10:47:37 -08:00
Bas Nieuwenhuizen
fa905a29d0 radv: Add ETC2 support on RAVEN2.
I did a whole bunch of validation and it essentially works.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 8531830038)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7282>
2020-11-19 10:47:37 -08:00
Louis Li
8b6ef5568a radeon/radeon_vce: fix out of target bitrate in CBR mode (H.264)
StoneyRidge may not comply to required target bitrate
when generating H.264 stream in CBR mode.

Signed-off-by: Louis Li <Ching-shih.Li@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
(cherry picked from commit f7e7cf637e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7282>
2020-11-19 10:47:37 -08:00
Woody Chow
bb6f48a54c st/mesa: Fix EGLImageTargetTexture2D for GL_TEXTURE_2D
Before this change, internalFormat was defaulted to GL_RGBA (
unsized internal format). Therefore, subsequent glTexSubImage2D
call with type != GL_UNSIGNED_BYTE, GL_UNSIGNED_SHORT_4_4_4_4 or
GL_UNSIGNED_SHORT_5_5_5_1 would give GL_INVALID_OPERATION.

This fixes

android.graphics.cts.BitmapColorSpaceTest#test16bitHardware
android.graphics.cts.ImageDecoderTest#testDecodeBitmap*
android.graphics.cts.BitmapTest#testNdkFormatsHardware

in CtsGraphicsTestCases

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6382>
(cherry picked from commit 5e4d69ec78)
2020-11-19 10:47:37 -08:00
Gert Wollny
1c40db5dc4 r600: revert disabling llvm draw
Now that llvm supports NIR and lowers uniforms to UBO in draw
calls when this hasn't be done before this can be used again.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-11-19 10:47:37 -08:00
Raven
288d33d3f4 winsys/svga: fix display corruption after surface_init
Cherry-pick of commit f41848a9 to fix display corruption in KDE
Fixes: ba37d408 ("svga: Performance fixes")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3599
2020-11-19 10:47:37 -08:00
Eric Anholt
6111de07d1 freedreno/cffdec: When .mergedregs is set, don't count half regs.
This matches what ir3.c does in the mergedregs case: just count max full
reg used.  This flag is unset so far, but will be soon and keeps our
output comparable between blob and freedreno.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6323>
(cherry picked from commit ce335dcb19)
2020-11-19 10:47:37 -08:00
Dylan Baker
0ff10e6be4 .pick_status.json: Update to bf5cea7232 2020-11-19 10:47:37 -08:00
Dylan Baker
b09d6e2bfe dcs: Add sha256 sums for 20.2.2 2020-11-06 20:45:47 -08:00
Dylan Baker
df2977f871 Bump version for 20.2.2 release 2020-11-06 15:40:35 -08:00
Dylan Baker
92a401d4a3 docs: add release notes for 20.2.2 2020-11-06 15:40:06 -08:00
Lionel Landwerlin
f17e6fcb7a blorp: allow blits with floating point source layers
The current blorp API only allows source layers for 3D images to be
integers. That is causing problems with the Vulkan API where we need
to be able to use a 3D layer that could be in between 2 layers.

This change allows a floating point value to be passed for blits and
internally sets up the input parameters to pass floating point values
to kernels.

v2: Use tex op to determinate what types are the coordinates (Jason)
    Drop setting params->z (Lionel)

v3: Fix nir_texop_txf_ms_mcs op not considered as having integer coords (Lionel)

v4: Fix incorrect test on nir_texop_txf_ms_mcs (Ivan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3458
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6909>
(cherry picked from commit 87934f02f9)
2020-11-02 07:48:29 -08:00
Lionel Landwerlin
35b93d6f8a anv: fix source/destination layers for 3D blits
When blitting from source depth range [0-3] into destination depth
range [0-2], we'll have to use a source layer that is in between 2
layers of the 3D source image.

Other than having an incorrect formula, we're also using integer which
prevent us from using the right source layer.

v2: Drop + 0.5 on application offsets

v3: Reuse num_layers (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3458
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6909>
(cherry picked from commit ea32691257)
2020-11-02 07:48:26 -08:00
Marek Olšák
a7e169380d winsys/amdgpu: remove incorrect assertion check against max_check_space_size
Fixes: 114a899cc8 "winsys/amdgpu: cs_check_space sets the minimum IB size for future IBs"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>
(cherry picked from commit 095ee8f867)
2020-11-02 07:48:26 -08:00
Bas Nieuwenhuizen
52ef9c22a0 radv: Fix variable name collision.
idx was aliased, and eb104e949e started
using the outer var in the inner scope ...

Fixes: eb104e949e
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3701
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7388>
(cherry picked from commit 8943c80c9b)
2020-11-02 07:48:26 -08:00
Michael Tretter
e8b625bc96 etnaviv: free tgsi tokens when shader state is deleted
The tokens are allocated using tgsi_dup_tokens when the shader state is
created, so we need to free them explicitly when deleting the shader state.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>
(cherry picked from commit 98db7c4841)
2020-11-02 07:48:26 -08:00
Lucas Stach
25bc222815 etnaviv: blt: properly program surface TS offset for clears
We clear the wrong TS region for != level 0 surfaces or TS buffers
with a internal offset.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>
(cherry picked from commit 3ba753d9f5)
2020-11-02 07:48:26 -08:00
Lucas Stach
fd3c49bb78 etnaviv: drm: fix BO refcount race
There is a race where the BO refcount might drop to 0 before the
dmabuf/name import paths had a chance to grab a reference for a
BO found in the handle_table. The easiest solution is to keep the
refcount stable as long as the table_lock is held.

While a more involved scheme of rechecking the refcount before
actually destroying the BO might also work, the bo_del path isn't
called very often, so micro-optimizing a single mutex_lock seems
to be over-engineered, so go for the easy solution.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>
(cherry picked from commit 866bb22d6b)
2020-11-02 07:48:26 -08:00
Lionel Landwerlin
833d68899a intel/dev: Bump Max EU per subslice/dualsubslice
This isn't a problem right now because the previous max would give the
same result when aligned to a byte (8bits).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7288>
(cherry picked from commit b03c86a71f)
2020-11-02 07:48:26 -08:00
Dave Airlie
f401af6f18 gallivm: zero init the temporary register storage.
Due to flow control we can end up with random values in here having
side effects.

This fixes a crash in gtk4-demo.

Fixes: 44a6b0107b ("gallivm: add nir->llvm translation (v2)")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7327>
(cherry picked from commit f7d1460418)
2020-11-02 07:48:26 -08:00
Marcin Ślusarz
3e2245c454 intel/tools: fix invalid type in argument to printf
$2 is exp2, exp2 is defined to be llint and llint is defined to be
unsigned long long int.

Fixes error reported by Coverity:
CID 1451141: Invalid type in argument to printf format specifier (PRINTF_ARGS)

Fixes: 70308a5a8a ("intel/tools: New i965 instruction assembler tool")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7351>
(cherry picked from commit e96f33cd30)
2020-11-02 07:48:26 -08:00
Bas Nieuwenhuizen
b540aaa0a8 radv: Do not access set layout during vkCmdBindDescriptorSets.
The spec says:

"
VkDescriptorSetLayout objects may be accessed by commands that operate on descriptor sets allocated using that layout
"

So our behavior is valid here, but this is a temporary workaround for an issue with Baldur's Gate 3.

CC: mesa-stable
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3607
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7207>
(cherry picked from commit eb104e949e)
2020-11-02 07:48:26 -08:00
Bas Nieuwenhuizen
7ccf2cf839 radv: Fix 1D compressed mipmaps on GFX9.
Partial rollback as GFX9 really requires height = 1 to work.

The two substantial parts of the fix remaining:

1) Deal with views with multiple levels.
2) Limit the expansion to the base mip pitch/height. On GFX9 this
   is exactly equal to the surf_pitch that was used before. I've
   done some investigation to make sure that on GFX10 this always
   results in the right physical layout.

Remaining stupid question is how the actual extents for bounds
checking never end up too low when the size gets clamped, but
this change and the previous change don't change that ...

Fixes: 1fb3e1fb70 "radv: Fix mipmap extent adjustment on GFX9+."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7245>
(cherry picked from commit 29999e6b9d)
2020-11-02 07:48:26 -08:00
Rhys Perry
562e89ff0d aco: ignore the ACO-inserted continue in create_continue_phis()
Otherwise, for loops without continue_or_break, create_continue_phis()
always returns an undef operand.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 638cbc21a1 ("aco: handle when ACO adds new continue edges")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2848
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7148>
(cherry picked from commit 26e53e3afa)
2020-11-02 07:48:26 -08:00
Rhys Perry
1ddbe3aa11 aco: update phi_map in add_subdword_operand()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 56345b8c61 ("aco: allow reading/writing upper halves/bytes when possible")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7216>
(cherry picked from commit d4503a9020)
2020-11-02 07:48:26 -08:00
Dylan Baker
63754d2b77 .pick_status.json: Update to 8077f3f4c4 2020-11-02 07:48:26 -08:00
Rob Clark
bfa8ac8c67 freedreno: Disallow tiled if SHARED and not QCOM_COMPRESSED
If the user is not aware of modifiers, and wants to allocate a shared
resource, we shouldn't leave them with tiled.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3678
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7308>
(cherry picked from commit 67238f95b5)
2020-11-02 07:48:26 -08:00
Tapani Pälli
5afe855fde iris: fix the order of src and dst for fence memcpy
This fixes random failures with "deqp-egl --deqp-case=*multithread*":
   iris: Failed to submit batchbuffer: No such file or directory

Fixes: 6b1a56b908 ("iris: Drop stale syncobj references in fence_server_sync")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7289>
(cherry picked from commit cb6ce4a265)
2020-11-02 07:48:26 -08:00
Michel Dänzer
cacca2aaa1 loader/dri3: Allocate up to 4 back buffers for page flips
With swap interval 0, i.e. sync-to-vblank disabled.

This can be necessary for unthrottled drawing with Xwayland:

1) One buffer can be scanned out
2) One buffer can be pending in the kernel for a page flip
3) One buffer can be pending in the Wayland compositor

Therefore, with 3 buffers, the frame-rate could be capped much lower
than the throughput the GPU is capable of, in the worst case at the
Wayland compositor refresh rate.

(The native Wayland EGL backend always uses up to 4 buffers)

Leave the maximum number of buffers at 3 for swap interval != 0, it's
sufficient in that case to always be able to queue one frame ahead of
time.

https://gitlab.gnome.org/GNOME/mutter/-/issues/1455
https://gitlab.gnome.org/GNOME/mutter/-/issues/1462

Cc: mesa-stable
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7033>
(cherry picked from commit 31e9de9c8a)
2020-11-02 07:48:26 -08:00
Michel Dänzer
fa73f34f79 loader/dri3: Keep current number of back buffers if frame was skipped
We'd previously take the copy path. If we were actually flipping (in
which case skipped frames are more likely to occur), we'd ping-pong
between a smaller and larger number of back buffers, and frame-rate
could vary / take a dip due to the buffer management overhead.

While I'm not sure this is actually possible to hit at this point, it
definitely will be with the next change.

Cc: mesa-stable
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7033>
(cherry picked from commit 16a7cc4d44)
2020-11-02 07:48:26 -08:00
Michel Dänzer
86a542b0ab loader/dri3: Only allocate additional buffers if needed
Previously, we would always allocate 3 buffers for page flipping. But 2
buffers can suffice for clients which always wait for buffer swaps to
complete before starting a new frame.

Therefore, keep track of the maximum number of buffers separately from
the current number, and only bump the latter if both current buffers are
busy.

Cc: mesa-stable
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7033>
(cherry picked from commit 60585fc4e3)
2020-11-02 07:48:26 -08:00
Samuel Pitoiset
e12a581a3a aco: fix determining if LOD is zero for nir_texop_txf/nir_texop_txs
txf/txs expects LOD to be a 32-bit unsigned integer while other
texture operations expects a float.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3668
Fixes: 93c8ebfa78 ("aco: Initial commit of independent AMD compiler")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7256>
(cherry picked from commit 4e2fe34aa9)
2020-10-26 10:34:25 -07:00
Tapani Pälli
2f09ff3fc8 gallivm/nir: handle nir_op_flt in lp_build_nir_llvm
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3663
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7248>
(cherry picked from commit c83d6ffa32)
2020-10-26 10:34:24 -07:00
Dylan Baker
4f0bee6775 .pick_status.json: Update to b92eadb29c 2020-10-26 10:34:22 -07:00
Ryan Neph
17e7be7c79 virgl: Fixes portal2 binary name in tweak config
Portal 2 on virgl w/ GLES host requires bgraswz and emubgra tweaks.
Application binary name matching mismatch caused tweaks to default
to a disabled state.

Signed-off-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Fixes: 9760a7ed91 ("virgl: apply bgra dest swizzle and add Portal 2")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7246>
(cherry picked from commit b2c737cf57)
2020-10-21 16:16:34 -07:00
Thong Thai
b9693aa851 frontends/va/postproc: Un-break field flag
Fixes an issue where deinterlaced videos would play at half the
framerate, since only one field was repeated, instead of using both
fields. Reverts a change I made previously which broke this.

Fixes: 78786a219e ("frontends/va: Fix deinterlace bottom field first flag")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3621
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7194>
(cherry picked from commit 354e375c9c)
2020-10-21 16:16:32 -07:00
Timothy Arceri
a1f8f5e241 glsl: relax rule on varying matching for shaders older than 4.00
Please see new code commment for full justification.

Fixes: 18004c338f ("glsl: fail when a shader's input var has not an equivalent out var in previous")

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3648

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7184>
(cherry picked from commit c54c42321e)
2020-10-21 16:16:30 -07:00
Dylan Baker
bfa702dd0b .pick_status.json: Update to 025050bae7 2020-10-21 16:16:29 -07:00
Marcin Ślusarz
0bc9a81733 vulkan/wsi: fix possible random stalls in wsi_display_wait_for_event
pthread_cond_broadcast man page says this:
"The pthread_cond_broadcast() or pthread_cond_signal() functions may
 be called by a thread whether or not it currently owns the mutex that
 threads calling pthread_cond_wait() or pthread_cond_timedwait() have
 associated with the condition variable during their waits; however,
 if predictable scheduling behavior is required, then that mutex shall
 be locked by the thread calling pthread_cond_broadcast() or
 pthread_cond_signal()."

Found by reading the code.
Compile tested only.

Fixes: da997ebec9 ("vulkan: Add KHR_display extension using DRM [v10]")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7197>
(cherry picked from commit 4408131142)
2020-10-20 10:02:11 -07:00
Dylan Baker
cdcf4542bd .pick_status.json: Update to d0f8fe5909 2020-10-20 10:02:08 -07:00
Nanley Chery
1219eace69 isl: Fix the aux-map encoding for D24_UNORM_X8
Bspec: 53911 now defines the encoding for this format.

Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7198>
(cherry picked from commit 3c87ac1f60)
2020-10-19 09:53:35 -07:00
Marek Olšák
07e1df3cd1 Revert "radeonsi/gfx10: disable vertex grouping"
This reverts commit 42f921387b.

It causes GPU hangs on gfx10.3.

Fixes: a23802bcb9 - ac,radeonsi: start adding support for gfx10.3

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7172>
(cherry picked from commit 6810e6e4d0)
2020-10-19 09:53:34 -07:00
Nanley Chery
ae6b7d1e3e intel/isl: Drop redundant unpack of unorm channels
Fixes: 09ced65420 ("intel/isl: Add format conversion code")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7168>
(cherry picked from commit 5e27e04322)
2020-10-19 09:53:32 -07:00
Nanley Chery
c6396afbac st/mesa: Add missing sentinels in format_map[]
Cc: mesa-stable
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7169>
(cherry picked from commit cf11ebfbc2)
2020-10-19 09:53:27 -07:00
Dylan Baker
a4e81dd7a2 .pick_status.json: Update to 3c87ac1f60 2020-10-19 09:53:24 -07:00
Dylan Baker
00cde89303 .pick_status.json: Update to 7c5129985b 2020-10-16 09:40:02 -07:00
Rhys Perry
6f4d937c1f aco: add missing SCC clobber in get_buffer_size
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: fcd6d83245 ("aco: fix imageSize()/textureSize() with large buffers on GFX8")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7162>
(cherry picked from commit fdb65b8b23)
2020-10-15 17:17:57 -07:00
Jose Maria Casanova Crespo
a6f351a666 vc4: Enable nir_lower_io for uniforms
Altough the driver isn't expected to receive nir_var_uniform types
from GLSL this happens currently for one of the internal driver shaders.

At vc4_get_yuv_fs at vc4_blit.c there is a "stride" nir_var_uniform
variable that needs to be lowered so the shader can be compiled.

This regression was affecting several piglit tests under
spec/ext_image_dma_buf_import and at least MythTV application.

Fixes: 96d99f2ecc ("vc4: Only call nir_lower_io on shader_in/out")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3536
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7160>
(cherry picked from commit d91cb31a2a)
2020-10-15 17:17:56 -07:00
Jose Maria Casanova Crespo
3f1601a1e3 vc4: Add missing load_ubo set_align in yuv_blit fs.
Fixes: e78a7a1825 ("nir: Assert memory loads are aligned")
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7160>
(cherry picked from commit 4cfdd425b6)
2020-10-15 17:17:55 -07:00
Tony Wasserka
ca34f519ec aco/isel: Always export position data from VS/NGG
AMD ISA docs explicitly require this for VS, and this likely extends to
NGG too.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3615
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7102>
(cherry picked from commit bf51b11c04)
2020-10-15 17:17:54 -07:00
Rhys Perry
fa22dff663 nir/opt_load_store_vectorize: don't vectorize stores across demote
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: ce9205c03b ("nir: add a load/store vectorization pass")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7163>
(cherry picked from commit f8e971f511)
2020-10-15 17:17:52 -07:00
Dylan Baker
a3b0904eb9 .pick_status.json: Update to aea74eac3d 2020-10-15 17:17:50 -07:00
Dylan Baker
9b7dfc0a61 .pick_status.json: Update to f29c81f863 2020-10-14 10:41:09 -07:00
Dylan Baker
f0498ea8f5 docs: add SHA256 sums for 20.2.1 2020-10-14 10:33:42 -07:00
Dylan Baker
5eb82e1468 VERSION: bump for 20.2.1 2020-10-14 09:47:44 -07:00
Dylan Baker
0dcebc459f docs: add release notes for 20.2.1 2020-10-14 09:46:48 -07:00
Rhys Perry
8c2ad9f9cb spirv: replace discard with demote for incorrect HLSL->SPIR-V translations
Fixes artifacts on decals in Path of Exile.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3610
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7062>
(cherry picked from commit 037d9fb278)
2020-10-13 15:29:53 -07:00
Jose Maria Casanova Crespo
732b28c8b1 vc4: Enable lower_umax and lower_umin
VC4 doesn't have support for UMAX and UMIN integer operations. So
we should avoid algebraic optimizations that generate umax/umin ops.

Fixes: 8e1b75b330 ("nir/algebraic: optimize iand/ior of (n)eq zero")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7083>
(cherry picked from commit d5e5f72e06)
2020-10-13 15:28:57 -07:00
Jose Maria Casanova Crespo
a66268d3f4 nir/algebraic: optimize iand/ior of (n)eq zero when umax/umin not available
Before 8e1b75b330 ("nir/algebraic: optimize iand/ior of (n)eq zero") this
optimization didn't need the use of umax/umin. VC4 HW supports only signed
integer max/min operations.

lower_umin and lower_umax are added to allow enabling previous optimizations
behaviour for this cases.

Fixes: 8e1b75b330 ("nir/algebraic: optimize iand/ior of (n)eq zero")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7083>
(cherry picked from commit e7127b3468)
2020-10-13 15:28:56 -07:00
Marek Olšák
f8953b4d81 ac/surface: fix valgrind warnings in DCC retile tile lookups
==12920== Conditional jump or move depends on uninitialised value(s)
==12920==    at 0x8F39391: util_fast_urem32 (fast_urem_by_const.h:71)
==12920==    by 0x8F39391: hash_table_search (hash_table.c:285)
==12920==    by 0x8B06D5D: ac_compute_dcc_retile_tile_indices (ac_surface.c:136)

Fixes: a37aeb128d "amd/common: Cache intra-tile addresses for retile map."

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7055>
(cherry picked from commit a4e4644eff)
2020-10-13 15:28:56 -07:00
Bas Nieuwenhuizen
a83bb83a25 radv: Fix mipmap extent adjustment on GFX9+.
With arrays we really have to use the correct size for the base
mipmap to get the right array pitch. In particular, using
surf_pitch results in pitch that is bigger than the base mipmap
and hence results in wrong pitches computed by the HW.

It seems that on GFX9 this has mostly been hidden by the epitch
provided in the descriptor but this is not something we do on
GFX10 anymore.

Now this has some draw-backs:

1. normalized coordinates don't work
2. Bounds checking uses slightly bigger bounds.

2 mostly is not an issue as we still ensure that they're within
the texture memory and not overlapping other layers/mips, but
we can't properly ignore writes.

1 is kinda dead in the water ... On the other hand I'd argue that
using normalized coords & a filter for sampling a block view of
a compressed format is extraordinarily useless.

The old method we employed already had these drawbacks for everything
except the base miplevel of the imageview.

AFAICT this is the same tradeoff AMDVLK makes and no CTS test hits
this. (once it does I think the HW is dead in the water ... Only
workaround I can think of is shader processing which is hard because
we don't know texture formats at compile time.)

I also removed the extra calculations when the image has only 1 mip
level because they ended up being a no-op in that case.

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2292
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2266
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2483
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2906
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3607
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7090>
(cherry picked from commit 1fb3e1fb70)
2020-10-13 15:07:37 -07:00
Dylan Baker
d894f844a9 retab ac_surface.h so that backports apply 2020-10-13 14:53:52 -07:00
Rhys Perry
50d73a42ba scons: fix SPIR-V -> NIR build
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Fixes: 18f9fc919e ('spirv: add and use a generator id enum')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7096>
(cherry picked from commit 044d213086)
2020-10-13 14:51:35 -07:00
Samuel Pitoiset
0e076355cc aco: implement missing nir_op_unpack_half_2x16_split_{x,y}_flush_to_zero
SPIRV->NIR emits nir_op_unpack_half_2x16_flush_to_zero instead of
nir_op_unpack_half_2x16 if the shader enables denorm flush to zero
for 16-bit floating point.

This doesn't fix anything known and CTS doesn't have tests.

Fixes: 56d9bcdded ("radv: enable more float_controls features")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6939>
(cherry picked from commit b9ca4923d6)
2020-10-13 14:51:34 -07:00
Rhys Perry
d77dd2db8b android: fix SPIR-V -> NIR build
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mauro Rossi <issor.oruam@gmail.com>
Fixes: 18f9fc919e ('spirv: add and use a generator id enum')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7097>
(cherry picked from commit 1070bba19e)
2020-10-13 14:51:33 -07:00
Eric Engestrom
45e82b5fa1 radv: add missing u_atomic.h include
Fixes: 7568c97df1 ("radv: Use atomics to read query results.")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7050>
(cherry picked from commit c02e933de4)
2020-10-13 14:51:32 -07:00
Dylan Baker
d1083d469e .pick_status.json: Update to e1efc534e6 2020-10-13 14:51:27 -07:00
Danylo Piliaiev
dd70375ee2 intel/fs: Disable sample mask predication for scratch stores
Scratch stores are being lowered to the instructions with side-effects,
however they should be enabled in fs helper invocations, since they
are produced from operations which don't imply side-effects.

To fix this - we move the decision of whether the sample mask predication
is enable to the point where logical brw instructions are created.

GLSL example of the issue:

 int tmp[1024];
 ...
 do {
   // changes to tmp
 } while (some_condition(tmp))

If `tmp` is lowered to scrach memory, `some_condition` would be
undefined if scratch write is predicated on sample mask, making
possible for the while loop to become infinite and hang the GPU.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3256
Fixes: 53bfcdeecf
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6056>
(cherry picked from commit 77486db867)
2020-10-12 12:54:43 -07:00
Rhys Perry
365419d18a spirv: add and use a generator id enum
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7062>
(cherry picked from commit 18f9fc919e)
2020-10-12 12:51:19 -07:00
Alyssa Rosenzweig
5e0f0cce7e pan/bi: Fix simple txl test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 731dfc6066 ("pan/bi: Allow vertex txl with lod=0 as compact")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
(cherry picked from commit 93f9052935)
2020-10-12 12:51:19 -07:00
Alyssa Rosenzweig
d611e2fd71 pan/bi: Handle vector moves
And fix the bad assertion that let this slip.

Like combines, nir_op_vec can be vector, and we need to lower this
ourselves. Thankfully, the lowering is simple.

Fixes
dEQP-GLES2.functional.shaders.loops.for_uniform_iterations.nested_tricky_dataflow_1_*

Fixes: b2c6cf2b6d ("pan/bi: Eliminate writemasks in the IR")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
(cherry picked from commit a204eac759)
2020-10-12 12:51:19 -07:00
Nanley Chery
21f7264ff4 anv: Enable multi-layer aux-map init for HIZ+CCS
Fixes rendering corruption in the shadowmappingcascade Sascha Willems
Vulkan demo. To see the corruption, I adjusted the demo options as
follows:

 1. Enable "Display depth map"
 2. Set "Split lambda" to 0.100
 3. Make "Cascade" non-zero.

Fixes: 80ffbe915f ("anv: Add support for HiZ+CCS")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7046>
(cherry picked from commit cce6fc3b5c)
2020-10-12 10:02:46 -07:00
Jason Ekstrand
374f82ba72 intel/nir: Don't try to emit vector load_scratch instructions
In 53bfcdeecf, we added load/store_scratch instructions which deviate
a little bit from most memory load/store instructions in that we can't
use the normal untyped read/write instructions which can read and write
up to a vec4 at a time.  Instead, we have to use the DWORD scattered
read/write instructions which are scalar.  To handle this, we added code
to brw_nir_lower_mem_access_bit_sizes to cause them to be scalarized.
However, one case was missing: the load-as-larger-vector case.  In this
case, we take small bit-sized constant-offset loads replace it with a
32-bit load and shuffle the result around as needed.

For scratch, this case is much trickier to get right because it often
emits vec2 or wider which we would then have to lower again.  We did
this for other load and store ops because, for lower bit-sizes we have
to scalarize thanks to the byte scattered read/write instructions being
scalar.  However, for scratch we're not losing as much because we can't
vectorize 32-bit loads and stores either.  It's easier to just disallow
it whenever we have to scalarize.

Fixes: 53bfcdeecf "intel/fs: Implement the new load/store_scratch..."
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6872>
(cherry picked from commit fd04f858b0)
2020-10-12 10:02:44 -07:00
Dylan Baker
c6cc724a70 glsl/xxd.py: fix imports
sys and string are unused, os is needed but not imported

fixes: 412472da5c
       ("glsl: Add utility to convert text files to C strings")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7034>
(cherry picked from commit 3ff513ee5d)
2020-10-12 10:02:43 -07:00
Lucas Stach
ea455f0465 etnaviv: stop leaking the dummy texure descriptor BO
Free the dummy texture descriptor BO on context destroy.

Fixes: eda73d7127 (etnaviv: GC7000: Texture descriptors)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6986>
(cherry picked from commit 9d5ec7f6f2)
2020-10-12 10:02:42 -07:00
Pierre-Eric Pelloux-Prayer
eebdf4d28c omx/tizonia: fix build
Fixes: 24f2b0a856 ("gallium/video: remove pipe_video_buffer.chroma_format")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3595
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7026>
(cherry picked from commit 8b205402c3)
2020-10-12 10:02:41 -07:00
Marek Olšák
72c3e51c39 gallium/u_threaded_context: fix use-after-free in transfer_unmap
discovered by valgrind

Fixes: fd6a5e112a

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6952>
(cherry picked from commit 3dc00c33f0)
2020-10-12 10:02:39 -07:00
Nanley Chery
332c00a536 iris: Fix a fast-clear skipping optimization
When support for multi-slice fast-clears was introduced for color
surfaces, an existing optimization for skipping fast-clears was not
updated (this optimization assumed single-slice fast-clears). As a
result, the driver began to skip multi-layer fast-clears if just the
first slice was in the CLEAR state (ignoring the state of the others).

A Civilization VI trace was the only workload I found to make use of
this optimization and it did so for 2D, non-array textures. Therefore,
this fix simply checks that the depth of the clear box is 1. It also
moves the single-slice aux-state query closer to the optimization to
clarify the need for the depth check.

Enables iris to pass a case of the fcc-write-after-clear piglit test,
[fast-clear tracking across layers 0 -> 1 -> (0,1)].

Fixes: 393f659ed8 ("iris: Enable fast clears on other miplevels and layers than 0.")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6973>
(cherry picked from commit 3f3a5f3489)
2020-10-12 10:02:38 -07:00
Lionel Landwerlin
e29629de7d intel/perf: fix crash when no perf queries are supported
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ec1fa1d51f ("intel/perf: fix raw query kernel metric selection")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7024>
(cherry picked from commit 79f3544412)
2020-10-12 10:02:36 -07:00
Dylan Baker
a19b215ad6 .pick_status.json: Mark 4790811d78 as denominated 2020-10-12 10:02:31 -07:00
Dylan Baker
959a5d195e .pick_status.json: Mark b23013db0a as denominated 2020-10-12 10:02:30 -07:00
Dylan Baker
adedbb1a9c .pick_status.json: Update to b32a8f83dc 2020-10-12 10:02:26 -07:00
Jose Maria Casanova Crespo
2e62030423 vc4: Avoid negative scissor caused by no intersection
This fixes 6 tests that were crashing on VC4 since
EGL_KHR_swap_buffers_with_damage was enabled.

dEQP-EGL.functional.swap_buffers_with_damage.*.buffer_age_render

Cc: 20.2 <mesa-stable>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6976>
(cherry picked from commit 961a8d71cd)
2020-10-05 11:27:33 -07:00
Vinson Lee
f3f44dbf63 freedreno: Move rsc NULL check to before rsc dereferences.
Fix defect reported by Coverity Scan.

Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking rsc suggests that it may be
null, but it has already been dereferenced on all paths leading
to the check.

Fixes: 6173cc19c4 ("freedreno: gallium driver for adreno")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6903>
(cherry picked from commit 0a7bd14dbb)
2020-10-05 11:27:33 -07:00
Jason Ekstrand
6ea01cd07a intel/fs: Don't use NoDDClk/NoDDClr for split SHUFFLEs
When I copied and pasted the code from MOV_INDIRECT for handling the
dependency controls, I missed a subtle difference between MOV_INDIRECT
and SHUFFLE.  Specifically, MOV_INDIRECT gets lowered to a narrow
instruction on Gen7 by the SIMD width lowering whereas SHUFFLE has to
split it in the generator.  Therefore, the check safety check for
whether or not we can use dependency control has to be based on the
lowered width rather than the width of the original instruction.

Fixes: a8ac61b0ee "intel/fs: NoMask initialize the address..."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3593
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6989>
(cherry picked from commit 8427e56067)
2020-10-05 11:27:32 -07:00
Bas Nieuwenhuizen
b7c3713706 radv: Use atomics to read query results.
The volatile pattern gives me flaky results for 32-bit builds on
ChromeOS Android. This is because on 32-bit the volatile 64-bit
loads gets split into 2 32-bit loads each.

So if we read the lower dword first and then the upper dword, it
can happen that the upper dword is already changed but the lower
dword isn't yet. In particular for occlusion queries this gives
false readings, as the upper dword commonly only constains the
ready bit.

With the GCC atomic intrinsics we get a call to __atomic_load_8
in libatomic.so which does the right thing.

An alternative fix would be to  explicitly split the 32-bit loads
in the right order and do a bunch of retries if things change, though
that gets messy quickly and for 32-bit builds only doesn't feel worth
it that much.

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6933>
(cherry picked from commit 7568c97df1)
2020-10-05 11:27:31 -07:00
Jason Ekstrand
285d4d0787 nir/opt_load_store_vectorize: Use bit sizes when checking mask compatibility
Without this, it was checking bit size compatibility with bit sizes such
as 96 which is clearly invalid.

No shader-db changes on Ice Lake

Fixes: ce9205c03b "nir: add a load/store vectorization pass"
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
(cherry picked from commit 57e7c5f05e)
2020-10-05 11:27:30 -07:00
Philipp Zabel
1784d889f2 meson: fix power8 option
Do not throw a deprecation warning if the power8 option is set to the
new 'disabled' value. Instead, warn if it is still set to the legacy
value 'false'.

Fixes: 138c003d22 ("meson: deprecated 'true' and 'false' in combo options for 'enabled' and 'disabled'")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6370>
(cherry picked from commit 03bea54e02)
2020-10-05 11:27:29 -07:00
Timothy Arceri
aedd29141a glsl: don't duplicate state vars as uniforms in the NIR linker
The linker was adding all state vars as uniforms, doubling the storage size
for shaders using only builtin uniforms, which increased CPU overhead for
constant buffer uploads.

When this code was originally ported from the GLSL IR linker we forgot
to exclude builtins because the check was not done in the
add_uniform_to_shader class but rather a check was done when passing
variables to this class for processing.

Fixes: 664e4a610d ("glsl/nir: Fill in the Parameters in NIR linker")

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6958>
(cherry picked from commit 038fcbcaed)
2020-10-05 11:27:28 -07:00
Jason Ekstrand
011d569557 intel/fs: NoMask initialize the address register for shuffles
Cc: mesa-stable@lists.freedesktop.org
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2979
Tested-by: Iván Briano <ivan.briano@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6825>
(cherry picked from commit a8ac61b0ee)
2020-10-05 11:27:27 -07:00
Anuj Phogat
b38d1d1b25 intel/gen9: Enable MSC RAW Hazard Avoidance
Workaround # 22011374674
Applied to i965, iris and anv drivers
No performance impact is observed with WA.

Cc: mesa-stable
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 545d852a7a)
2020-10-05 11:27:26 -07:00
Olsak, Marek
556d6b099e radeonsi: Fix dead lock with aux_context_lock in si_screen_clear_buffer.
After disable SDMA on Arcturus(gfx9), dead lock with aux_context_lock is
detected since si_screen_clear_buffer is called recursively before
release lock.

The call trace is:
si_clear_render_target->si_compute_clear_render_target->
si_launch_grid_internal->si_launch_grid->si_emit_cache_flush->
si_prim_discard_signal_next_compute_ib_start->u_suballocator_alloc->
si_resource_create->si_buffer_create->si_alloc_resource->
si_screen_clear_buffer->simple_mtx_lock->
si_sdma_clear_buffer->si_pipe_clear_buffer->
si_clear_buffer->si_compute_do_clear_or_copy->
si_launch_grid_internal->si_launch_grid->si_emit_cache_flush->
si_prim_discard_signal_next_compute_ib_start->u_suballocator_alloc->
si_resource_create->si_buffer_create->si_alloc_resource->
si_screen_clear_buffer->simple_mtx_lock

Fixes: 07a49bf597 "radeonsi: disable SDMA on gfx9"
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6941>
(cherry picked from commit 5e8791a0bf)
2020-10-05 11:27:25 -07:00
Dylan Baker
ed7f0f2d90 .pick_status.json: Update to e3b814d5e9 2020-10-05 11:26:51 -07:00
Bas Nieuwenhuizen
b971b42b14 radv,radeonsi: Disable compression on interop depth images
If we want to use HTILE correctly we need to communicate extra stuff
like clear colors. (Unlike DCC there is no HTILE FCE)

CC: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit d78df70c2a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6877>
2020-09-30 10:11:57 -07:00
Jason Ekstrand
a484759717 nir/cf: Better handle intra-block splits
In the case where end was a instruction-based cursor, we would mix up
our blocks and end up with block_begin pointing after the second split.
This causes a segfault as the cf_node list walk at the end of the
function never terminates properly.  There's also a possibility of
mix-up if begin is an instruction-based cursor which was found by
inspection.

Fixes: fc7f2d2364 "nir/cf: add new control modification API's"
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
(cherry picked from commit 7dbb1f7462)
2020-09-30 09:29:40 -07:00
Pierre-Eric Pelloux-Prayer
e2f99a7ab7 gallium/vl: add chroma_format arg to vl_video_buffer functions
vl_mpeg12_decoder needs to override the chroma_format value to get the
correct size calculated (chroma_format is used by vl_video_buffer_adjust_size).

I'm not sure why it's needed, but this is needed to get correct mpeg decode.

Fixes: 24f2b0a856 ("gallium/video: remove pipe_video_buffer.chroma_format")
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6817>
(cherry picked from commit 2584d48b2c)
2020-09-30 09:29:38 -07:00
Pierre-Eric Pelloux-Prayer
e84d418bd1 gallium/vl: do not call transfer_unmap if transfer is NULL
CC: mesa-stable
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6817>
(cherry picked from commit b121b1b8b8)
2020-09-30 09:29:37 -07:00
Vinson Lee
28cff4722d gallium/dri2: Move image->texture assignment after image NULL check.
Fix defect reported by Coverity Scan.

Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking image suggests that it may be
null, but it has already been dereferenced on all paths leading to
the check.

Fixes: ad609bf55a ("frontend/dri: Implement mapping individual planes.")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6807>
(cherry picked from commit 03e7b75c22)
2020-09-30 09:28:49 -07:00
Dylan Baker
a0238684de .pick_status.json: Update to 7dbb1f7462 2020-09-30 09:26:48 -07:00
Connor Abbott
79263cda92 nir/lower_io_arrays: Fix xfb_offset bug
I noticed this once I started gathering xfb_info after
nir_lower_io_arrays_to_elements_no_indirect.

Fixes: b2bbd978d0 ("nir: fix lowering arrays to elements for XFB outputs")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6514>
(cherry picked from commit 5a88db682e)
2020-09-29 08:55:08 -07:00
Erik Faye-Lund
09c31b46d3 st/mesa: use roundf instead of floorf for lod-bias rounding
There's no good reason not to use a symmetric rounding mode here. This
fixes the following GL CTS case for me:

GTF-GL33.gtf21.GL3Tests.texture_lod_bias.texture_lod_bias_all

Fixes: 132b69c4ed ("st/mesa: round lod_bias to a multiple of 1/256")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6892>
(cherry picked from commit 7685c37bf4)
2020-09-29 08:55:02 -07:00
Dylan Baker
0c9b64f9f4 meson/anv: Use variable that checks for --build-id
fixes: d1992255bb
       ("meson: Add build Intel "anv" vulkan driver")

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6819>
(cherry picked from commit 465460943a)
2020-09-29 08:55:00 -07:00
Nanley Chery
e2ee71614f blorp: Ensure aligned HIZ_CCS_WT partial clears
Fixes: 5425fcf2cb ("intel/blorp: Satisfy HIZ_CCS fast-clear alignments")
Reported-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6854>
(cherry picked from commit 7f3e881c6c)
2020-09-29 08:55:00 -07:00
Jason Ekstrand
da7f4b5ada nir/liveness: Consider if uses in nir_ssa_defs_interfere
Fixes: f86902e75d "nir: Add an SSA-based liveness analysis pass"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3428
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Yevhenii Kharchenko <yevhenii.kharchenko@globallogic.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6824>
(cherry picked from commit 0206fb3941)
2020-09-29 08:54:59 -07:00
Marek Olšák
401e03925d radeonsi: fix indirect dispatches with variable block sizes
The block size input was uninitialized.

Fixes: 77c81164bc "radeonsi: support ARB_compute_variable_group_size"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
(cherry picked from commit 8be46d6558)
2020-09-29 08:54:56 -07:00
Christian Gmeiner
fbbd66dcad etnaviv: simplify linear stride implementation
As documented in the galcore kernel driver "only LOD0 is valid
for this register". This makes sense, as NTE's LINEAR_STRIDE is
only capable to store one linear stride value per sampler.
This fixes linear textures in sampler slot != 0.

Fixes: 34458c1cf6 ("etnaviv: add linear sampling support")
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Michael Tretter <m.tretter@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3285>
(cherry picked from commit a7e3cc7a0e)
2020-09-29 08:54:55 -07:00
Dylan Baker
d82aa3bf60 .pick_status.json: Update to 291cfb1e41 2020-09-29 08:54:46 -07:00
Dylan Baker
4f8488b857 docs: Add sh256 sums for 20.2.0 2020-09-28 16:29:08 -07:00
Dylan Baker
0ab255b82d docs: add release notes for 20.2.0 2020-09-28 16:27:57 -07:00
Dylan Baker
663d464366 VERSION: bump for 20.2.0 release 2020-09-28 15:50:54 -07:00
Jason Ekstrand
f1b6e50108 radeonsi: Only call nir_lower_var_copies at the end of the opt loop
In 283ad85944, radeonsi started using nir_find_var_copies.  However,
it was also calling nir_lower_var_copies in the optimization loop and
the two can end up fighting.  The simple solution is to wait to lower
copies until the end of the optimization loop.

Fixes: 283ad85944
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3550

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6841>
(cherry picked from commit 472a20c5fc)
2020-09-24 15:17:58 -07:00
Mike Blumenkrantz
a2f1b6d268 zink: reorder create_stream_output_target to fix failure case leak
the previous version of this leaked a reference to the streamout buffer here

thanks to deltragon on my blog for pointing this out!

Fixes: 37778fcd9a ("zink: implement transform feedback support to finish off opengl 3.0")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6457>
(cherry picked from commit 7971918924)
2020-09-24 15:17:57 -07:00
Dylan Baker
01285ded24 .pick_status.json: Update to 472a20c5fc 2020-09-24 15:17:54 -07:00
Erik Faye-Lund
81a826636f mesa: handle GL_FRONT after translating to it
Without this, we end up throwing errors on code along these lines when
rendering using single-buffering:

GLint att;
glGetIntegerv(GL_READ_BUFFER, &att);
glGetFramebufferAttachmentParameteriv(GL_READ_FRAMEBUFFER, att, ...);

This is because we internally translate GL_BACK (which is what
glGetIntegerv returned) to GL_FRONT, which we don't handle in the
Desktop GL case. So let's start handling it.

This fixes the GLTF-GL33.gtf21.GL2FixedTests.buffer_color.blend_color
test for me.

Fixes: e6ca6e587e ("mesa: Handle pbuffers in desktop GL framebuffer attachment queries")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6815>
(cherry picked from commit 9e13a16c97)
2020-09-24 09:32:14 -07:00
Dylan Baker
0996ea1175 .pick_status.json: Update to 90b98c0649 2020-09-24 09:32:14 -07:00
Michel Dänzer
76b2f293c6 ci: Use ignore_scheduled_pipelines anchor in .radeonsi-rules
Without this, scheduled pipelines erroneously tried to create jobs using
this template, which can't work, because their dependency jobs don't
exist in scheduled pipelines. Unfortunately, this resulted in scheduled
pipelines not running silently, without any direct feedback about what's
wrong (see https://gitlab.com/gitlab-org/gitlab/-/issues/25490).

Fixes: 6c8b921572 "ci: Build kernels and rootfs for x86 devices"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6802>
(cherry picked from commit a1f46d7b69)
2020-09-24 09:32:14 -07:00
Danylo Piliaiev
98fa336d34 nir/lower_samplers: Clamp out-of-bounds access to array of samplers
Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

"In the subsections described above for array, vector, matrix and
 structure accesses, any out-of-bounds access produced undefined
 behavior.... Out-of-bounds reads return undefined values, which
 include values from other variables of the active program or zero."

Robustness extensions suggest to return zero on out-of-bounds
accesses, however it's not applicable to the arrays of samplers,
so just clamp the index.

Otherwise instr->sampler_index or instr->texture_index would be out
of bounds, and they are used as an index to arrays of driver state.

E.g. this fixes such dereference:
 if (options->lower_tex_packing[tex->sampler_index] !=
in nir_lower_tex.c

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
(cherry picked from commit f2b17dec12)
2020-09-24 09:32:14 -07:00
Danylo Piliaiev
c3eaad7e76 nir/large_constants: Eliminate out-of-bounds writes to large constants
Out-of-bounds writes could be eliminated per spec:

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

"In the subsections described above for array, vector, matrix and
 structure accesses, any out-of-bounds access produced undefined
 behavior.... Out-of-bounds writes may be discarded or overwrite
 other variables of the active program."

Fixes: 1235850522
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
(cherry picked from commit 0ba82f78a5)
2020-09-24 09:32:14 -07:00
Danylo Piliaiev
74e7c86189 nir/lower_io: Eliminate oob writes and return zero for oob reads
Out-of-bounds writes could be eliminated per spec:

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

 "In the subsections described above for array, vector, matrix and
  structure accesses, any out-of-bounds access produced undefined
  behavior....
  Out-of-bounds writes may be discarded or overwrite
  other variables of the active program.
  Out-of-bounds reads return undefined values, which
  include values from other variables of the active program or zero."

GL_KHR_robustness and GL_ARB_robustness encourage us to return zero
for reads.

Otherwise get_io_offset would return out-of-bound offset which may
result in out-of-bound loading/storing of inputs/outputs,
that could cause issues in drivers down the line.

E.g. this fixes such dereference:
 int vue_slot = vue_map->varying_to_slot[intrin->const_index[0]];
in brw_nir.c

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
(cherry picked from commit 66669eb529)
2020-09-24 09:32:14 -07:00
Bas Nieuwenhuizen
6d31ec1543 st/mesa: Deal with empty textures/buffers in semaphore wait/signal.
The actual texture might not have been created yet.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3257
CC: mesa-stable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6788>
(cherry picked from commit ade72e677b)
2020-09-24 09:32:14 -07:00
Lionel Landwerlin
cbe737040d intel/compiler: fixup Gen12 workaround for array sizes
We didn't handle the case of NULL images/textures for which we should
return 0.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 397ff2976b ("intel: Implement Gen12 workaround for array textures of size 1")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3522
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6729>
(cherry picked from commit cc3bf00cc2)
2020-09-24 09:32:14 -07:00
Samuel Pitoiset
3ec090f1ac radv: fix transform feedback crashes if pCounterBufferOffsets is NULL
From the Vulkan 1.2.154 spec:
    "If pCounterBufferOffsets is NULL, then it is assumed the
     offsets are zero."

Fix new CTS
dEQP-VK.transform_feedback.simple.backward_dependency_no_offset_array.

CC: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6798>
(cherry picked from commit 2b99e15d0a)
2020-09-24 09:32:14 -07:00
Rhys Perry
30fe359cbb radv,aco: fix reading primitive ID in FS after TES
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3530
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6760>
(cherry picked from commit 2228835fb5)
2020-09-24 09:32:14 -07:00
Bas Nieuwenhuizen
b1779e92e1 ac/surface: Fix depth import on GFX6-GFX8.
Lets just do depth interop imports by convention between radv and
radeonsi for now. The only thing using this should be Vulkan interop
anyway.

CC: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6617>
(cherry picked from commit ecc19e9819)
2020-09-24 09:32:14 -07:00
Dylan Baker
38b65b603d amd/ac_surface: convert tabs to 3 spaces
To make patches from master better apply
2020-09-24 09:32:14 -07:00
Jason Ekstrand
5fbb4771a7 intel/fs/swsb: SCHEDULING_FENCE only emits SYNC_NOP
It's not really unordered in the sense that it can still stall on
ordered things and we don't need a SYNC_NOP for that because it is a
SYNC_NOP.  However, it also doesn't count when computing instruction
distances.

Fixes: 18e72ee210 "intel/fs: Add FS_OPCODE_SCHEDULING_FENCE"
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6781>
(cherry picked from commit f63ffc18e7)
2020-09-24 09:32:14 -07:00
Qiang Yu
424203520f radeonsi: fix user fence GPU address
User fence should have 4 QWORD memory space, I updated its CPU address
but forgot to update GPU address.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3513
Fixes: 3d5bed0e88 "radeonsi: fix user fence space when MCBP is enabled"
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6776>
(cherry picked from commit 4656e68294)
2020-09-24 09:32:14 -07:00
Jesse Natalie
6ca0035ffc glsl_type: Add packed to structure type comparison for hash map
Fixes: 659f333b3a "glsl: add packed for struct types"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6767>
(cherry picked from commit 9aa86eb61a)
2020-09-24 09:32:14 -07:00
Pierre-Loup A. Griffais
2ca018d0dd radv: fix vertex buffer null descriptors
Fixes: 0f1ead7b53 "radv: handle NULL vertex bindings"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6773>
(cherry picked from commit 7b4eaac6a9)
2020-09-24 09:32:14 -07:00
Pierre-Loup A. Griffais
02f652a58b radv: fix null descriptor for dynamic buffers
Fixes: c1ef225d18 "radv: handle NULL descriptors"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6772>
(cherry picked from commit ec13622ff4)
2020-09-24 09:32:13 -07:00
Pierre-Eric Pelloux-Prayer
063bbeddc8 mesa: fix glUniform* when a struct contains a bindless sampler
Small example from #3271:

layout (bindless_sampler) uniform;
struct SamplerSparse {
  sampler2D tex;
  vec4 size;
  [...]
};
uniform SamplerSparse foo;

'foo' will be marked as bindless but we should only take the assign-as-GLuint64 path for 'tex'.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3271
Fixes: 990c8d15ac ("mesa: fix setting uniform variables for bindless samplers/images")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6730>
(cherry picked from commit 090fc593b4)
2020-09-24 09:32:13 -07:00
Vinson Lee
41d6216ddb panfrost: Delete debug allocated syncobj.
Fix defect reported by Coverity Scan.

Logically dead code (DEADCODE)
dead_error_line: Execution cannot reach this statement: drmSyncobjDestroy(dev->fd, ...

Fixes: 64d6f56ad2 ("panfrost: Allocate syncobjs in panfrost_flush")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6720>
(cherry picked from commit ffbdbd631a)
2020-09-24 09:32:13 -07:00
Rhys Perry
22dd8299fe radv: initialize with expanded cmask if the destination layout needs it
If radv_layout_can_fast_clear() is false, 028C70_COMPRESSION is unset when
the image is rendered to and CMASK isn't updated. This appears to cause
FMASK to be ignored and the 0th sample to always be used.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3449
Fixes: 7b21ce401f
   ('radv: disable FMASK compression when drawing with GENERAL layout')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6745>
(cherry picked from commit 85cc2950a0)
2020-09-24 09:32:13 -07:00
Pierre-Eric Pelloux-Prayer
e41bd211e9 radeon/vcn: set dec->bs_ptr = NULL on unmap
To avoid using a dangling pointer.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1308
Cc: mesa-stable
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6556>
(cherry picked from commit 7d853966df)
2020-09-24 09:32:13 -07:00
Pierre-Eric Pelloux-Prayer
27a7ceefc4 r600/uvd: set dec->bs_ptr = NULL on unmap
To avoid using a dangling pointer.
See https://gitlab.freedesktop.org/mesa/mesa/-/issues/1308

Cc: mesa-stable
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6556>
(cherry picked from commit eb60849ea2)
2020-09-24 09:32:13 -07:00
Vinson Lee
486827826b freedreno: Check file descriptor before write.
Fix defect reported by Coverity Scan.

Argument cannot be negative (NEGATIVE_RETURNS)
negative_returns: fd is passed to a parameter that cannot be
negative.

Fixes: 1ea4ef0d3b ("freedreno: slurp in decode tools")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6696>
(cherry picked from commit e607477d7c)
2020-09-24 09:32:13 -07:00
Alyssa Rosenzweig
dd665f2762 pan/bit: Set d3d=true for CMP tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: ec37c7126d ("bifrost: Emit "d3d" variant of comparison instructions")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6712>
(cherry picked from commit c4f518ce6a)
2020-09-24 09:32:13 -07:00
Pierre-Eric Pelloux-Prayer
6394d94536 glsl: fix per_vertex_accumulator::fields size
49d35f3d88 moved gl_Layer/gl_ViewportIndex/gl_ViewportMask
as builtins but fields size wasn't increased.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3508
Fixes: 49d35f3d88 ("glsl: declare gl_Layer/gl_ViewportIndex/gl_ViewportMask as vs builtins")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6688>
(cherry picked from commit 8a2a9e9bb8)
2020-09-24 09:32:13 -07:00
Timur Kristóf
2b496c9bd2 aco: Fix emit_boolean_exclusive_scan in wave32 mode.
Use the lane mask instead of s2 for the register class.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6699>
(cherry picked from commit efa1c760d1)
2020-09-24 09:32:13 -07:00
Jordan Justen
39e1613c32 anv, iris: Set MediaSamplerDOPClockGateEnable for gen12+
This has been shown to help performance on TGL and DG1. This could be
applied to gen9+, but we still need to show if it helps with those
platforms.

Rework:
 * Make change in src/intel/vulkan/genX_cmd_buffer.c too. (Ken)
 * Keep mask as 3 for gen < 12

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6684>
(cherry picked from commit 20a4235c4c)
2020-09-24 09:32:13 -07:00
Dylan Baker
9eab6d9958 .pick_status.json: Update to a1f46d7b69 2020-09-24 09:32:13 -07:00
Dylan Baker
5e3732f6ce fix: gallivm: disable brilenear for lod bias and explicit lod.
I didn't backport this correctly, and then accidentally pushed to the
stable (not staging branch) so now we have to carry a fixup to avoid
force pushing on the stable branch.
2020-09-24 09:32:13 -07:00
Samuel Pitoiset
6195f7b703 spirv: fix emitting switch cases that directly jump to the merge block
As shown in the valid SPIR-V below, if one switch case statement
directly jumps to the merge block, it has no branches at all and
we have to reset the fall variable. Otherwise, it creates an
unintentional fallthrough.

       OpSelectionMerge %97 None
       OpSwitch %96 %97 1 %99 2 %100
%100 = OpLabel
%102 = OpAccessChain %_ptr_StorageBuffer_v4float %86 %uint_0 %uint_37
%103 = OpLoad %v4float %102
%104 = OpBitcast %v4uint %103
%105 = OpCompositeExtract %uint %104 0
%106 = OpShiftLeftLogical %uint %105 %uint_1
       OpBranch %97
 %99 = OpLabel
       OpBranch %97
 %97 = OpLabel
%107 = OpPhi %uint %uint_4 %75 %uint_5 %99 %106 %100

This fixes serious corruption in Horizon Zero Dawn.

v2: Changed the code to skip the entire if-block instead of resetting
    the fallthrough variable.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3460
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6590>
(cherry picked from commit 57fba85da4)
2020-09-11 14:21:09 -07:00
Karol Herbst
8b1f207720 spirv: extract switch parsing into its own function
v2 (Jason Ekstrand):
 - Construct a list of vtn_case objects

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2401>
2020-09-11 14:20:54 -07:00
Bas Nieuwenhuizen
c8e3af5686 spirv: Deal with glslang bug not setting the decoration for stores.
Fixes: af81486a8c "spirv: Simplify our handling of NonUniform"
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6451>
(cherry picked from commit 965b8441fe)
2020-09-11 10:43:53 -07:00
Boris Brezillon
1be49cd0ba spirv: Add a vtn_get_mem_operands() helper
Add a vtn_get_mem_operands() helper to extract memory operand attached
to load/store operations.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>
(cherry picked from commit 857b9c5027)
2020-09-11 10:43:53 -07:00
Dave Airlie
409c87a297 gallivm: disable brilinear for lod bias and explicit lod.
This allows GL 4.5 CTS to pass in full with no flags, other than
that I'm not sure if it's a good or bad idea.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6638>
(cherry picked from commit b0722cb670)
2020-09-11 10:43:53 -07:00
Lionel Landwerlin
ae25477194 intel/perf: fix raw query kernel metric selection
The raw query is meant to be used with MDAPI [1]. When using this
metric without this library, we usually selected the TestOa metric to
provide some default sensible values (instead of undefined).
Historically this TestOa metric lived in the kernel at ID=1. We
removed all metrics from the kernel in kernel commit 9aba9c188da136
("drm/i915/perf: remove generated code").

This fixes the Mesa code to use a valid metric set ID (1 could work
some of the time, but not guaranteed).

[1] : https://github.com/intel/metrics-discovery

v2: Store fallback metric at init time

v3: Drop TestOa lookout

v4: Skip the existing queries (Marcin)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
CC: <mesa-stable@lists.freedesktop.org>
Tested-by: Marcin Ślusarz <marcin.slusarz@intel.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6438>
(cherry picked from commit ec1fa1d51f)
2020-09-11 10:43:53 -07:00
Marcin Ślusarz
b9b6ccc913 intel/perf: export performance counters sorted by [group|set] and name
It's a lot easier to deal with them in RenderDoc when they are
in some meaningful order.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5788>
(cherry picked from commit a777b25350)
2020-09-11 10:43:53 -07:00
Marcin Ślusarz
cb115979db intel/perf: split load_oa_metrics
Move oa_metrics_available out of load_oa_metrics and call
build_unique_counter_list outside.

This change is a preparation for the next patch. It should
not have any functional impact.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5788>
(cherry picked from commit 59716e40b0)
2020-09-11 10:43:53 -07:00
Lionel Landwerlin
0a67c03128 intel/perf: store query symbol name
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6438>
(cherry picked from commit f1da3bb3d5)
2020-09-11 10:43:53 -07:00
Danylo Piliaiev
dc559b6177 glsl: Eliminate assigments to out-of-bounds elements of vector
Several optimization paths, including constant folding, can lead to
indexing vector with an out of bounds index.

Out-of-bounds writes could be eliminated per spec:

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

"In the subsections described above for array, vector, matrix and
 structure accesses, any out-of-bounds access produced undefined
 behavior.... Out-of-bounds writes may be discarded or overwrite
 other variables of the active program."

Fixes piglit tests:
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-1
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-6

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6363>
(cherry picked from commit 5922d57a18)
2020-09-11 10:32:43 -07:00
Qiang Yu
85721f885d radeonsi: fix max syncobj wait timeout
syncobj wait takes int64_t timeout and won't clamp it
in kernel code, so we have to pass in INT64_MAX instead
of OS_TIMEOUT_INFINITE which is UINT64_MAX. Otherwise
syncobj wait with OS_TIMEOUT_INFINITE case just return
fail.

Fixes: c638301b42 "radeonsi: fix syncobj wait timeout"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6676>
(cherry picked from commit ef980ac0c1)
2020-09-11 10:32:43 -07:00
Nanley Chery
992e1d053b blorp: Fix alignment test for HIZ_CCS_WT fast-clears
Remove the extra logical ORs in the ternary operation.

Fixes: 5425fcf2cb ("intel/blorp: Satisfy HIZ_CCS fast-clear alignments")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6650>
(cherry picked from commit 1eff389bd3)
2020-09-11 10:32:43 -07:00
Marcin Ślusarz
abc8c94f38 anv: fix minor gen_ioctl(I915_PERF_IOCTL_CONFIG) error handling issue
Found by Coverity.

Fixes: 2001a80d4a ("anv: Implement VK_KHR_performance_query")
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6667>
(cherry picked from commit d3cd24999f)
2020-09-11 10:32:43 -07:00
Vinson Lee
0aa0b2d495 svga: Fix unused printf argument.
Fix defect reported by Coverity Scan.

Extra argument to printf format specifier (PRINTF_ARGS)
extra_argument: This argument was not used by the format string:
info->num_outputs.

Fixes: ccb4ea5a43 ("svga: Add GL4.1(compatibility profile) support in svga driver")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6644>
(cherry picked from commit 2f61d7c22d)
2020-09-11 10:32:43 -07:00
Vinson Lee
ce8184e3a3 freedreno: Fix file descriptor leak.
Fix defects reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_handle: Handle variable fd going out of scope leaks the handle.

Argument cannot be negative (NEGATIVE_RETURNS)
negative_returns: fd is passed to a parameter that cannot be negative.

Fixes: 1ea4ef0d3b ("freedreno: slurp in decode tools")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6642>
(cherry picked from commit 587969154f)
2020-09-11 10:32:43 -07:00
Icecream95
6667e2de46 pan/mdg: Fix spilling of non-32-bit types
The source argument for mov has index 1, not 0.

Fixes a vertex shader in SuperTuxKart.

Fixes: b4de9e035a ("pan/mdg: Mask spills from texture write")
Reported-by: macc24
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>~
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6659>
(cherry picked from commit a4885d2691)
2020-09-11 10:32:43 -07:00
Jesse Natalie
da0ed80410 nir: More NIR_MAX_VEC_COMPONENTS fixes
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6655>
(cherry picked from commit 89401e5867)
2020-09-11 10:32:43 -07:00
Jason Ekstrand
3a09792bfc nir: More NIR_MAX_VEC_COMPONENTS fixes
A couple of these probably aren't strictly necessary but they won't
hurt.  The one that's particularly tricky is a fixed-length array in
nir_search.h.  However, to avoid blowing up the binary size of
nir_opt_algebraic by about 2x, we just assert that only small ops are
used.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6655>
(cherry picked from commit d86e38af2c)
2020-09-11 10:32:43 -07:00
Eric Anholt
ae817c0f0f turnip: Fix truncation of iovas to 32 bits in queries.
Fixes regression when switching to msm-next-pgtables.

Fixes: e34b0d65f9 ("turnip: Implement and enable VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6592>
(cherry picked from commit 802d3611dc)
2020-09-11 10:32:43 -07:00
Eric Anholt
102fed30b9 turnip: Fix truncation of CS shader iovas to 32 bits.
This was invalid, and makes VK break consistently with the
msm-next-pgtbables branch.

Fixes: 13525a9c70 ("turnip: pipeline program state refactor")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6592>
(cherry picked from commit 329c317287)
2020-09-11 10:32:43 -07:00
Eric Anholt
fc5ea646ab freedreno: Make the pack struct have a .qword for wide addresses.
Storing a precomputed iova in reg packing wasn't possible because you'd
truncate to 32 bits.  Making it be .qword makes it possible.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6592>
(cherry picked from commit 3b3772d6e6)
2020-09-11 10:32:43 -07:00
Rhys Perry
068640e23b aco: don't apply constant to SDWA on GFX8
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6662>
(cherry picked from commit 5a8447cbd4)
2020-09-11 10:32:43 -07:00
Rhys Perry
f6f1995898 aco: fix v_writelane_b32 with two sgprs
v_writelane_b32 can take two sgprs but only if one is m0.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6662>
(cherry picked from commit 36e58a14cc)
2020-09-11 10:32:43 -07:00
Dave Airlie
efd20aa5b2 llvmpipe: include gallivm perf flags in shader cache.
Otherwise if you set perf flags, then don't set them,
they won't take affect.

Fixes: 6c0c61cb48 ("llvmpipe: add infrastructure for disk cache support")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6630>
(cherry picked from commit 4df0eef188)
2020-09-11 10:32:43 -07:00
Jason Ekstrand
66a14f9c41 spirv: Run repair_ssa if there are discard instructions
SPIR-V's OpKill is a control-flow instruction but NIR's discard is not.
Therefore, it can be valid SPIR-V to have

    if (...) {
        foo = /* something */
    } else {
        discard;
    }
    use(foo);

without any phi between the definition of foo and its use.  This is not
true in NIR, however, because NIR's discard isn't considered
control-flow.  Arguably, this is a NIR bug but making discard control-
flow is a very deep change that can have serious ans subtle
side-effects.   The easier thing to do is just fix up the SSA in case we
have an OpKill which might have gotten us into the above case.

Fixes dEQP-VK.graphicsfuzz.vectors-and-discard-in-function with the new
NIR dominance validation pass enabled.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5288>
(cherry picked from commit 7cedc4128a)
2020-09-11 10:32:43 -07:00
Rhys Perry
b617a52308 nir/opt_if: fix opt_if_merge when destination branch has a jump
Fixes a case where opt_if_merge created code like:
if (...) {
   break;
   loop {
      ...
   }
}
which caused opt_peel_loop_initial_if to complain that the loop pre-header
wasn't a predecessor of the loop header. This patch prevents this
(invalid, I think) unreachable code from being created.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3496
Fixes: 4d3f6cb973 ('nir: merge some basic consecutive ifs')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6633>
(cherry picked from commit 6cef804067)
2020-09-11 10:32:43 -07:00
Rhys Perry
fe13f9b8f5 aco: fix one-off error in Operand(uint16_t)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 3d6f67950d ('aco: improve 8/16-bit constants')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6583>
(cherry picked from commit 0e9425a1b7)
2020-09-11 10:32:43 -07:00
Mauro Rossi
64ff6b112e android: freedreno/common: add libmesa_git_sha1 static dependency
Fixes the following building error:

external/mesa/src/freedreno/common/freedreno_uuid.c:30:10: fatal error: 'git_sha1.h' file not found
         ^~~~~~~~~~~~
1 error generated.

Fixes: e7458f19e ("freedreno/uuid: Generate meaningful device and driver UUID")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6625>
(cherry picked from commit 9d02d65f46)
2020-09-11 10:32:42 -07:00
Bas Nieuwenhuizen
1a906eea25 radeonsi: Work around Wasteland 2 bug.
Confirmed by an user on AMD HW that this driconf flag works
around the issue.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1535
CC: mesa-stable
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6637>
(cherry picked from commit 9b3491870f)
2020-09-11 10:32:42 -07:00
Michel Zou
3850f6b578 swr: fix build with mingw
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Cc: mesa-stable

closes #3454

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6532>
(cherry picked from commit 2c94a9788e)
2020-09-11 10:32:42 -07:00
Qiang Yu
3b68d713f5 radeonsi: fix user fence space when MCBP is enabled
When MCBP is enabled, IB maybe preempted which will also update
the preempted fence field of the user fence. So we need to reserve
enough space for each user fence.

Fixes: 89d2dac554 "radeonsi: enable preemption if the kernel enabled it"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6577>
(cherry picked from commit 3d5bed0e88)
2020-09-11 10:32:42 -07:00
Qiang Yu
04cb446d4a radeonsi: fix syncobj wait timeout
syncobj wait takes absolute timeout value.

Fixes: 162502370c "winsys/amdgpu: implement sync_file import/export"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6579>
(cherry picked from commit c638301b42)
2020-09-11 10:32:42 -07:00
Marek Olšák
fc3e3d7ba4 Revert "ac: generate FMA for inexact instructions for radeonsi"
This reverts commit 4b9370cb0f.

Fixes: 4b9370cb0f
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3429

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
(cherry picked from commit f85294207f)
2020-09-11 10:32:42 -07:00
Andrey Vostrikov
c45536f929 egl/x11: Free memory allocated for reply structures on error
This patch fixes memory leaks when reply is allocated and is not freed
on error execution path.

Found by enabling address sanitizer on simple EGL app.

```c

int main()
{
    EGLDisplay display = eglGetDisplay(EGL_DEFAULT_DISPLAY);
    EGLint major;
    EGLint minor;

    if (!eglInitialize(display, &major, &minor))
    {
        return 1;
    }
    eglTerminate(display);
    return 0;
}
```

Compiled with: `gcc testme.c -o testme -fsanitize=address -lasan -lEGL`

Execution environment:
- Windows 10, VMWare Player 15.5.2 build-15785246 without 3D accelaration
- Guest OS: OpenSUSE Leap 15.2
- Mesa 19.3.4

Program output:

```sh
ASAN_OPTIONS=fast_unwind_on_malloc=0 ./testme

libEGL warning: DRI2: failed to authenticate
==52510==ERROR: LeakSanitizer: detected memory leaks

Direct leak of 32 byte(s) in 1 object(s) allocated from:
    #0 0x7fa62315f500 in malloc (/usr/lib64/libasan.so.4+0xdc500)
    #1 0x7fa61e12d86b  (/usr/lib64/libxcb.so.1+0xf86b)
    #2 0x7fa61e12b5c7  (/usr/lib64/libxcb.so.1+0xd5c7)
    #3 0x7fa61e12cc3e  (/usr/lib64/libxcb.so.1+0xec3e)
    #4 0x7fa61e12cd4f in xcb_wait_for_reply (/usr/lib64/libxcb.so.1+0xed4f)
    #5 0x7fa61ebe02a5  (/usr/lib64/libEGL_mesa.so.0+0x202a5)
    #6 0x7fa61ebdb5ca  (/usr/lib64/libEGL_mesa.so.0+0x1b5ca)
    #7 0x7fa61ebd750c  (/usr/lib64/libEGL_mesa.so.0+0x1750c)
    #8 0x7fa61ebd7554  (/usr/lib64/libEGL_mesa.so.0+0x17554)
    #9 0x7fa61ebd1107  (/usr/lib64/libEGL_mesa.so.0+0x11107)
    #10 0x400856 in main (/home/user/testme+0x400856)
    #11 0x7fa622ad8349 in __libc_start_main (/lib64/libc.so.6+0x24349)
    #12 0x4006e9 in _start (/home/user/testme+0x4006e9)

SUMMARY: AddressSanitizer: 32 byte(s) leaked in 1 allocation(s).
```

Signed-off-by: Andrey Vostrikov <av.linux.dev@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6611>
(cherry picked from commit 42420730d1)
2020-09-11 10:32:42 -07:00
Samuel Pitoiset
ee1d4d5ee3 aco: handle unaligned loads on GFX10.3
Same as GFX10.

Cc: 20.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6594>
(cherry picked from commit 73eb24ab31)
2020-09-11 10:32:42 -07:00
Rhys Perry
e98a278dcd aco: fix byte_align_scalar for 3 dword vectors
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: fe08f0ccf9
   ('aco: add byte_align_scalar() & trim_subdword_vector() helper functions')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4710>
(cherry picked from commit 8faf85f687)
2020-09-11 10:32:42 -07:00
Marek Olšák
4c6cc7277f ac/llvm: fix unaligned VS input loads on gfx10.3
Fixes: a23802bcb9

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6595>
(cherry picked from commit 7acc7ec33b)
2020-09-11 10:32:42 -07:00
Eric Engestrom
4866958ece meson: drop leftover PTHREAD_SETAFFINITY_IN_NP_HEADER
55765f80 replaced this with a check for the header itself.

Fixes: 55765f80b9 ("util/u_thread: include pthread_np.h if found")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6548>
(cherry picked from commit 0f4d09443e)
2020-09-11 10:32:42 -07:00
Nanley Chery
78764a41c2 iris: Fix aux assertion in resource_get_handle
iris_resource_get_handle currently asserts that the resource has an aux
state that is suitable for sharing. However, the caller of this function
can pass a flag to specify that it will handle flushing/resolving the
resource as needed for sharing. Take this flag into account when
asserting the state of the aux buffer.

Fixes: e81392868e ("iris/resource: Drop redundant checks for aux support")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/128
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1371>
(cherry picked from commit 3cf6325e72)
2020-09-11 10:32:42 -07:00
Tony Wasserka
d2208acffe amd/common: Fix various non-critical integer overflows
The result of 0xf << 28 is a signed integer and hence overflows into the sign
bit. In practice compilers did the right thing here, since the intent of the
code was unsigned arithmetic anyway.

Cc: mesa-stable
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6568>
(cherry picked from commit 93c8777ace)
2020-09-11 10:32:42 -07:00
Tony Wasserka
0f535785bb aco: Fix integer overflows when emitting parallel copies during RA
32-bit shifts were accidentally used before this change despite the intended
output being 64 bits.

This was observed when compiling Dolphin's ubershaders.

Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6568>
(cherry picked from commit 2182bbf84f)
2020-09-11 10:32:42 -07:00
Tony Wasserka
928e13d8fd radv: Fix various non-critical integer overflows
The result of 0xf << 28 is a signed integer and hence overflows into the sign
bit. In practice compilers did the right thing here, since the intent of the
code was unsigned arithmetic anyway.

These conditions were observed in:
* dEQP-VK.pipeline.image.suballocation.sampling_type.combined.view_type.1d.format.r4g4b4a4_unorm_pack16.count_8.size.512x1
* dEQP-VK.binding_model.descriptorset_random.sets32.noarray.ubolimitlow.sbolimitlow.sampledimglow.outimgonly.noiub.nouab.frag.ialimithigh.0

Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6568>
(cherry picked from commit f18fc34c4d)
2020-09-11 10:32:42 -07:00
Jason Ekstrand
7958051f43 iris: Re-emit push constants if we have a varying workgroup size
Fixes: 33c61eb2f1 "iris: Implement ARB_compute_variable_group_size"

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6570>
(cherry picked from commit bbaa62e4e1)
2020-09-11 10:32:42 -07:00
Jason Ekstrand
937405eda6 intel/fs: Don't copy-propagate stride=0 sources into ddx/ddy
This can come up if, for instance, the shader does a derivative of a
uniform or flat input.  Ideally, NIR would use divergence analysis to
get rid of the derivative in this case but it doesn't right now.  This
fixes a crash in F1 2017.

Cc: mesa-stable@lists.freedesktop.org
Reported-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Tested-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6564>
(cherry picked from commit 8e8701b43a)
2020-09-11 10:32:42 -07:00
Bas Nieuwenhuizen
3e325d431c spirv: Deal with glslang not setting NonUniform on constructors.
Especially a problem for OpImage/OpSampledImage. Note that the problem
doesn't seem to be propagation through glslang, but only in emitting
the SPIR-V. So it is fine if we are somewhat lossy in handling this, as
long as direct Op(Sampled)Image -> texture op chains work.

Fixes: af81486a8c "spirv: Simplify our handling of NonUniform"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3406
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6451>
(cherry picked from commit 191f8a4b9f)
2020-09-11 10:32:42 -07:00
Bas Nieuwenhuizen
996971c946 radv: Avoid deadlock on bo_list.
With the kernel timeline sysncobj changes, the kernel submits do
not necessarily happen in global vkQueueSubmit order. Which should
be fine, we added the appropriate waits for that. (See
DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT in the winsys)

However, all kernel submissions take a lock on the bo_list mutex,
and since we do the wait in the winsys, we wait while having the
bo_list mutex held. This means that as soon as a wait and a signal
submission are out of order we have a deadlock on the bo_list mutex
and the wait.

Solution is to use a shared reader lock during the kernel submission,
as we only need read access for the submission.

Fixes: 6bc5ce7a91 "radv: Add timeline syncobj for timeline semaphores."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3446
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6478>
(cherry picked from commit 61b714a42e)
2020-09-11 10:32:42 -07:00
Bas Nieuwenhuizen
dae04016ed radv: Fix threading issue with submission refcounts.
If decrement == 0 then:

- it isn't safe to access the submission
- even if it is, checking that the result of the atomic_sub is 0
  doesn't given an unique owner anymore.

So skip it. The submission always starts out with refcount >= 1,
so first one to decrement to 0 still get dibs on executing it.

Fixes: 4aa75bb3bd "radv: Add wait-before-submit support for timelines."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6478>
(cherry picked from commit 6b75262941)
2020-09-11 10:32:42 -07:00
Eric Anholt
0bc75626a0 gallium/tgsi_exec: Fix up NumOutputs counting
We can get duplicate declarations for an index (for example dvec3 + float
packed into 2 vec4s, the second one won't pack into the first's array
decl), and we'd end up stepping by the wrong amount in GS vtx/prim emit.

Fixes vs-gs-fs-double, sso-vs-gs-fs-array-interleave piglit tests.

Fixes: 49155c3264 ("draw/tgsi: fix geometry shader input/output swizzling")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6567>
(cherry picked from commit 329dee1455)
2020-09-11 10:32:42 -07:00
Danylo Piliaiev
d5d434c599 intel/compiler: Fix pointer arithmetic when reading shader assembly
start_offset is a byte offset.

Fixes: 04a9951580
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6557>
(cherry picked from commit 87fa645b94)
2020-09-11 10:32:42 -07:00
Marcin Ślusarz
8b9213e0b7 anv: refresh cached current batch bo after emitting some commands
Fixes crashes in:
- Rise of the Tomb Rider (on benchmark start)
- Total War: Three Kingdoms (on game start)
- Total War: Warhammer II (on game start)

Fixes: 34a0ce58c7 ("anv: add a new execution mode for secondary command buffers")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6546>
(cherry picked from commit e94c22429b)
2020-09-11 10:32:42 -07:00
Pierre-Eric Pelloux-Prayer
0cf9af563b radeonsi: use radeonsi_clamp_div_by_zero for SPECviewperf13, Road Redemption
Fixes SPECviewperf 13 creo rendering.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2639
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>
(cherry picked from commit a1c2bd6ce8)
2020-09-11 10:32:42 -07:00
Pierre-Eric Pelloux-Prayer
99f96537db radeonsi,driconf: add clamp_div_by_zero option
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>
(cherry picked from commit b8445520cb)
2020-09-11 10:32:42 -07:00
Pierre-Eric Pelloux-Prayer
9e13702af7 ac/llvm: add option to clamp division by zero
Replace div(x) by min(div(x), FLT_MAX)) to avoid getting a NaN result
when x is 0.

A cheaper alternative would be to use legacy mult instructions but they're
not exposed by LLVM.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>
(cherry picked from commit 32f46a55c8)
2020-09-11 10:32:41 -07:00
Pierre-Eric Pelloux-Prayer
a88482e316 radeonsi: enable PIPE_CAP_NO_CLIP_ON_COPY_TEX
This fixes specviewperf13 catia test rendering.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>
(cherry picked from commit f8c0e20152)
2020-09-11 10:32:41 -07:00
Pierre-Eric Pelloux-Prayer
7b91ba4d58 mesa/st: introduce PIPE_CAP_NO_CLIP_ON_COPY_TEX
If supported this means that src_x/src_y/width/height parameters of
CopyTex functions will not be clipped using the read framebuffer's dimensions.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>
(cherry picked from commit d94bec5c49)
2020-09-11 10:32:41 -07:00
Jonathan Gray
e02d81072c vulkan: make VK_TIME_DOMAIN_CLOCK_MONOTONIC_RAW_EXT conditional
Only advertise VK_TIME_DOMAIN_CLOCK_MONOTONIC_RAW_EXT if CLOCK_MONOTONIC_RAW
is defined.  Fixes the build on OpenBSD which has CLOCK_MONOTONIC but not
CLOCK_MONOTONIC_RAW.

Fixes: 67a2c1493c ("vulkan: Add VK_EXT_calibrated_timestamps extension (radv and anv) [v5]")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6517>
(cherry picked from commit 4500e6e460)
2020-09-11 09:52:38 -07:00
Jonathan Gray
82973aa14e radv: remove seccomp includes
57c95d2ce2 ("radv: a support for a secure compile fork at device creation")
added includes which were not removed in
7324977e42 ("radv: remove the secure compile support feature")

remove these no longer needed includes to fix the non-linux build

Fixes: 7324977e42 ("radv: remove the secure compile support feature")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6517>
(cherry picked from commit 7fbeb2623f)
2020-09-11 09:52:37 -07:00
Jonathan Gray
8225f619ba util/os_misc: os_get_available_system_memory() for OpenBSD
Return the smallest value of available non-kernel physical memory and
the static per process data size limit as the amount of available
system memory on OpenBSD.

Fixes: b80930a6fe ("anv: add support for VK_EXT_memory_budget")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6517>
(cherry picked from commit b30bd6fe5f)
2020-09-11 09:52:35 -07:00
Jonathan Gray
b69312343b anv: use os_get_available_system_memory()
Replace local get_available_system_memory() function with
os_get_available_system_memory().

Fixes: b80930a6fe ("anv: add support for VK_EXT_memory_budget")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6517>
(cherry picked from commit 5b1ed09ff0)
2020-09-11 09:52:34 -07:00
Jonathan Gray
61121108ad util/os_misc: add os_get_available_system_memory()
Add os_get_available_system_memory() derived from
src/intel/vulkan/anv_device.c get_available_system_memory()

Fixes: b80930a6fe ("anv: add support for VK_EXT_memory_budget")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6517>
(cherry picked from commit 033dcb2978)
2020-09-11 09:52:33 -07:00
Jonathan Gray
8335d497e5 anv: use os_get_total_physical_memory()
Replace non-portable sysinfo() use with Mesa's
os_get_total_physical_memory()

Fixes: 060a6434ec ("anv: Advertise larger heap sizes")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6517>
(cherry picked from commit 81b163fb73)
2020-09-11 09:52:32 -07:00
Dylan Baker
cbad87a206 .pick_status.json: Update to ef980ac0c1 2020-09-11 09:52:25 -07:00
Dylan Baker
b89a76b7ce VERSION: bump for 20.2.0-rc4 2020-09-02 20:07:43 -07:00
Jason Ekstrand
525a5b763d intel/fs: Fix MOV_INDIRECT and BROADCAST of Q types on Gen11+
The immediate case is pretty uncommon to see but it can happen, in
theory.  BROADCAST is typically used to uniformize values and those are
usually 32-bit.  However, it does come up in some subgroup ops.

Fixes: 49c21802cb "intel/compiler: Split has_64bit_types into float/int"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6211>
(cherry picked from commit cccb497d3c)
2020-09-01 13:53:38 -07:00
Roman Gilg
3d1a71aa2b vulkan/wsi/x11: wait for acquirable images in FIFO mode
In FIFO presentation mode we block either on our present-queue or on Present
events after an image was transmitted.

In case we receive completion events without idle events at some point we
exhaust our acquire-queue and can not block anymore on present-queue.

Ensure that the consumer has at least one image to acquire before blocking
again on present-queue. Otherwise wait for one from the X server.

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3344
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6513>
(cherry picked from commit ec5e918ef4)
2020-09-01 13:53:38 -07:00
Roman Gilg
b6e4106024 vulkan/wsi/x11: add sent image counter
Add a counter to count how many images from our swapchain are currently "sent"
to the X server via Present extension. An image is sent when it has been
presented but we have not yet received an idle event for it.

CC: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6513>
(cherry picked from commit d0bc1ad377)
2020-09-01 13:53:37 -07:00
Samuel Pitoiset
fd1dbd904c nir/algebraic: mark some optimizations with fsat(NaN) as inexact
If a is Nan, fsat(NaN) is expected to be 0 and some optimizations
should be marked as inexact.

Fixes a GPU hang with Death Stranding and RADV/ACO (RADV/LLVM
isn't affected because it lowers fsat).

No fossils-db change.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3368
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6519>
(cherry picked from commit bc123c396a)
2020-09-01 13:53:36 -07:00
Marek Olšák
1629fe89a6 gallivm: fix build on LLVM 12 due to LLVMAddConstantPropagationPass removal
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3465
Cc: 20.1 20.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6531>
(cherry picked from commit 52cac06862)
2020-09-01 13:53:36 -07:00
Vinson Lee
7a63155052 vulkan: Fix memory leaks.
Fix warnings reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable info going out of scope leaks the storage it
points to.

Fixes: 9bc5b2d169 ("vulkan: add initial device selection layer. (v6.1)")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6509>
(cherry picked from commit 004119d5b7)
2020-09-01 13:53:35 -07:00
Alyssa Rosenzweig
22b4120de4 pan/mdg: Fix perspective combination
It's not enough to multiply by a .w reciprocal, we have to be taking the
reciprocal of the thing we're actually multiplying against.

Fixes incorrect rendering in Manhattan.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6525>
(cherry picked from commit 41d0a81c2a)
2020-09-01 13:53:35 -07:00
Alyssa Rosenzweig
4e57b4680d pan/mdg: Fix discard encoding
Let's match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6525>
(cherry picked from commit c8ac01af33)
2020-09-01 13:53:34 -07:00
Eric Anholt
83dda7b35f turnip: Make sure we include the build id.
The ir3 disk cache is initialized when we use the ir3 compiler, even if we
don't use it ourselves, and it requires a build id.  With lld, it seems we
don't end up getting one included by default.

Fixes: f97acb4bb4 ("freedreno/ir3: disk-cache support")
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6324>
(cherry picked from commit 221aa00eeb)
2020-09-01 13:53:33 -07:00
Lionel Landwerlin
7518930a99 anv: VK_INTEL_performance_query interaction with VK_EXT_private_data
All objects are expected to have the base internal object for private
data storage.

This also fixes a memory leak of a gen_perf_registers structure.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 51c6bc13ce ("anv,vulkan: Implement VK_EXT_private_data")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6255>
(cherry picked from commit b6a013ccab)
2020-09-01 13:53:33 -07:00
Jonathan Gray
57d65d2f76 util/u_thread: include pthread_np.h if found
Required for pthread_set_name_np() on OpenBSD as there is no
pthread_setaffinity_np() to define PTHREAD_SETAFFINITY_IN_NP_HEADER.

Fixes: dcf9d91a80 ("util: Handle differences in pthread_setname_np")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>
(cherry picked from commit 55765f80b9)
2020-09-01 13:53:32 -07:00
Jonathan Gray
d37550f8e7 util: futex fixes for OpenBSD
Fix absolute to relative timeout computation.

Add sanity checks to futex_wait()
- handle the NULL timeout pointer case
- avoid negative cases.

From Matthieu Herrb and Scott Cheloha.

Fixes: c91997b6c4 ("util/futex: use futex syscall on OpenBSD")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>
(cherry picked from commit c66c5b38e0)
2020-09-01 13:53:31 -07:00
Jonathan Gray
43bd915ff5 meson: conditionally include -ldl in gbm pkg-config file
Follow libGL and only include -ldl in gbm pkg-config file if libdl was
actually found.  Many systems have these functions in libc and don't
have libdl.

Fixes: 816bf7d164 ("meson: build gbm")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>
(cherry picked from commit 0398caa97f)
2020-09-01 13:53:31 -07:00
Jonathan Gray
db2fa8208c meson: don't build with USE_ELF_TLS on OpenBSD
OpenBSD does not have TLS

Fixes: a47c525f32 ("meson: build glx")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>
(cherry picked from commit c97af23b13)
2020-09-01 13:53:30 -07:00
Eric Engestrom
fe8d18e752 meson: don't advertise TLS support if glx wasn't build with it
Fixes: a47c525f32 ("meson: build glx")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>
(cherry picked from commit 9ac1686422)
2020-09-01 13:53:29 -07:00
Jonathan Gray
8f4094bb1c meson: build with _ISOC11_SOURCE on OpenBSD
Mesa builds with -std=c99 but uses timespec_get() a c11 function.
Build with _ISOC11_SOURCE for c11 visibility when -std is specified.
On linux c11 visibility comes from defining _GNU_SOURCE.

Fixes: e3a8013de8 ("util/u_queue: add util_queue_fence_wait_timeout")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>
(cherry picked from commit f9a7e6e854)
2020-09-01 13:53:29 -07:00
Jonathan Gray
372f8f5c53 util/anon_file: add OpenBSD shm_mkstemp() path
memfd_create() is a linux syscall replace the use of it with
shm_mkstemp() on OpenBSD.

unconditionally include stdlib.h for mkstemp()/mkostemp()

Fixes: c0376a1234 ("util: add anon_file.h for all memfd/temp file usage")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>
(cherry picked from commit 6e9c0661f8)
2020-09-01 13:53:28 -07:00
Jonathan Gray
3d0f9e3dc3 util: unbreak endian detection on OpenBSD
Since cbee1bfb34 endian.h is unconditionally
used if available.

glibc has byte order defines with two leading underscores.  OpenBSD
has private defines with a single leading underscore in machine/endian.h
and public defines in endian.h with no underscore.

The code under the endian.h block did not check if symbols were
defined before equating them so '#if __BYTE_ORDER == __LITTLE_ENDIAN'
would turn into '#if 0 == 0' which is always true.

Fixes: cbee1bfb34 ("meson/configure: detect endian.h instead of trying to guess when it's available")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>
(cherry picked from commit 7eab6845e9)
2020-09-01 13:53:27 -07:00
Jason Ekstrand
64039dffc4 intel/nir: Rewrite the guts of lower_alpha_to_coverage
I have no idea how this pass ever worked.  I guess it worked ok on the
one or two piglit tests but the whole thing seemed very fragile.  It
makes a number of undocumented and unasserted assumptions and they
aren't always valid.  This rewrite makes a number of changes:

 1. It now properly handles the case where the gl_SampleMask write comes
    before the gl_FragColor or gl_FragData[0] write.

 2. It should early-exit faster because it now looks at bits in
    shader_info::outputs_written instead of looking for variables.

 3. Instead of the fragile variable lookup where we try to look the
    variable up by both location and driver_location and match, we just
    use the driver_location calculations used by brw_fs_nir.

 4. It asserts that the index parameter to store_output is a constant
    instead of silently failing if it isn't.

 5. We now actually assert the implicit assumption that the two writes
    are in the same block.  We go even further and assert that they are
    in the last block in the shader.

 6. In the case where 3 or fewer components of the output are written,
    we explicitly choose to leave the sample mask alone.

Fixes: 7ecfbd4f6d "nir: Add alpha_to_coverage lowering pass"
Closes: #3166
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6233>
(cherry picked from commit b6fdb1405e)
2020-09-01 13:53:27 -07:00
Jason Ekstrand
367be430b5 intel/nir: Pass the nir_builder by reference in lower_alpha_to_coverage
I'm honestly not sure how passing a builder by-value ever worked.  I
guess the struct is mostly copyable.  In any case, that's the wrong way
to use it and it's causing issues.

Fixes: 7ecfbd4f6d "nir: Add alpha_to_coverage lowering pass"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6233>
(cherry picked from commit 72dc06e07e)
2020-09-01 13:53:26 -07:00
Dylan Baker
eefc95d601 .pick_status.json: Update to b9927c8c8d 2020-09-01 13:53:23 -07:00
Eric Engestrom
fb53f1937a egl/x11_dri3: implement EGL_KHR_swap_buffers_with_damage
Passes all of `dEQP-EGL.functional.swap_buffers_with_damage.*`:

    Passed:        36/54 (66.7%)
    Failed:        0/54 (0.0%)
    Not supported: 18/54 (33.3%)
    Warnings:      0/54 (0.0%)
    Waived:        0/54 (0.0%)

The "not supported" ones are the `preserve_buffer_*` tests, which is not
supported on X11/DRI3.

Cc: 20.2 <mesa-stable>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3030
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6132>
(cherry picked from commit 326eb56718)
2020-09-01 13:52:10 -07:00
Kenneth Graunke
93659e4ed3 iris: Drop stale syncobj references in fence_server_sync
When calling glWaitSync (fence_server_sync), we added dependencies
in all batches (render and compute) on existing work.  Even if
applications don't use compute at all, they theoretically could,
so we record that the compute batch depends on the render batch.

But if the application truly doesn't use compute, or rarely uses
it, we ended up recording dependencies on _all_ previous render
batches, racking up a massive list of syncobjs.  Not only is this
pointless, it also meant that we never allowed the kernel to free
the underlying i915_request objects.

There are a number of solutions to this problem, but for now, we
take a simple one: when recording a new syncobj dependency, we
walk the list and see if any of them have already passed.  If so,
that dependency has been fulfilled.  We no longer need to track it,
and can simply drop it from the list, unreferencing the syncobj.

Android's SurfaceFlinger in particular was hitting this issue,
as it uses glWaitSync, doesn't typically use compute shaders,
and runs for long durations.

Thanks to Yang A Shi <yang.a.shi@intel.com> and
Kefei Yao <kefei.yao@intel.com> for their excellent work in
tracking down this issue!

Fixes: f459c56be6 ("iris: Add fence support using drm_syncobj")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Yang A Shi <yang.a.shi@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6463>
(cherry picked from commit 6b1a56b908)
2020-08-28 11:27:06 -07:00
Kenneth Graunke
a020620c25 iris: Reorder the loops in iris_fence_await() for clarity.
Swapping the order of the loops makes the logic much easier to follow:
for each point in our fence, if it hasn't gone by, make future work in
all batches depend on it.  Both loops are necessary, and now it's
clearer why.

(This doesn't actually fix a bug but needs to be cherry-picked for
the next patch to apply, which does fix a bug.)

Fixes: f459c56be6 ("iris: Add fence support using drm_syncobj")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Yang A Shi <yang.a.shi@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6463>
(cherry picked from commit e98c7a6634)
2020-08-28 11:27:05 -07:00
Bas Nieuwenhuizen
948a2fbec5 radv: Fix 3d blits.
- the offsets are inclusive-exclusive so the +1 was wrong
- Since the GPU doesn't do the interpolation on depth (as we render
  per layer), we have to add an offset for the pixel center.

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3073
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6458>
(cherry picked from commit 4d40a719b0)
2020-08-28 11:27:05 -07:00
Rhys Perry
17837b6637 aco: create long jumps
When the branch offset can't be encoded, we have to use s_setpc_b64.

Fixes hang in RPCS3 vertex ubershader.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3231
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
(cherry picked from commit fe2dc41258)
2020-08-28 11:27:04 -07:00
Rhys Perry
9a66f08cfe aco: reserve 2 sgprs for each branch
We'll need two sgprs for the possibility of a long jump.

fossil-db (Navi):
Totals from 10197 (7.50% of 135946) affected shaders:
SGPRs: 946268 -> 946468 (+0.02%)
VGPRs: 705884 -> 707956 (+0.29%); split: -0.00%, +0.30%
SpillSGPRs: 31485 -> 36212 (+15.01%); split: -0.04%, +15.05%
CodeSize: 88296484 -> 88384604 (+0.10%); split: -0.01%, +0.11%
MaxWaves: 81379 -> 81171 (-0.26%)
Instrs: 17219111 -> 17231682 (+0.07%); split: -0.03%, +0.10%
Cycles: 1594875900 -> 1596450136 (+0.10%); split: -0.05%, +0.15%
VMEM: 1687263 -> 1689080 (+0.11%); split: +0.14%, -0.03%
SMEM: 657726 -> 660262 (+0.39%); split: +0.61%, -0.22%
VClause: 294806 -> 294638 (-0.06%); split: -0.08%, +0.02%
SClause: 556702 -> 556210 (-0.09%); split: -0.12%, +0.03%
Copies: 1466323 -> 1469349 (+0.21%); split: -0.57%, +0.78%
Branches: 619793 -> 618556 (-0.20%); split: -0.28%, +0.08%
PreSGPRs: 806364 -> 811477 (+0.63%); split: -0.14%, +0.77%
PreVGPRs: 655845 -> 657174 (+0.20%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
(cherry picked from commit 156fd58cda)
2020-08-28 11:27:03 -07:00
Rhys Perry
90ccdf4270 aco: keep loop live-through variables spilled
fossil-db (Navi):
Totals from 3149 (2.32% of 135946) affected shaders:
VGPRs: 280928 -> 280932 (+0.00%)
SpillSGPRs: 51133 -> 30042 (-41.25%)
CodeSize: 43063076 -> 41377252 (-3.91%); split: -3.92%, +0.00%
Instrs: 8278435 -> 8037133 (-2.91%); split: -2.92%, +0.00%
Cycles: 709575456 -> 683366172 (-3.69%); split: -3.69%, +0.00%
VMEM: 542887 -> 542937 (+0.01%); split: +0.05%, -0.04%
SMEM: 210255 -> 206368 (-1.85%); split: +0.12%, -1.97%
SClause: 258847 -> 258019 (-0.32%); split: -0.52%, +0.20%
Copies: 731836 -> 684784 (-6.43%); split: -6.44%, +0.01%
Branches: 305422 -> 292844 (-4.12%); split: -4.12%, +0.00%
PreSGPRs: 333103 -> 332701 (-0.12%)
PreVGPRs: 280086 -> 280089 (+0.00%)

Helps mostly Detroit: Become Human and the single spilling Doom Eternal
shader.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
(cherry picked from commit e8ac14527a)
2020-08-28 11:27:03 -07:00
Rhys Perry
ed64b3d8e9 aco: fix spills_entry heuristic for branch blocks in init_live_in_vars()
fossil-db (Navi):
Totals from 222 (0.16% of 135946) affected shaders:
SpillSGPRs: 9121 -> 9117 (-0.04%)
SpillVGPRs: 2820 -> 1821 (-35.43%)
CodeSize: 5134264 -> 5053336 (-1.58%); split: -1.63%, +0.05%
Instrs: 953435 -> 938761 (-1.54%); split: -1.59%, +0.05%
Cycles: 100567688 -> 97252432 (-3.30%); split: -3.34%, +0.04%
VMEM: 40752 -> 39219 (-3.76%); split: +0.04%, -3.80%
SMEM: 15416 -> 15509 (+0.60%); split: +0.64%, -0.03%
VClause: 20120 -> 19091 (-5.11%)
SClause: 23540 -> 23544 (+0.02%); split: -0.11%, +0.12%
Copies: 125912 -> 122017 (-3.09%); split: -3.36%, +0.26%
Branches: 31131 -> 30009 (-3.60%)

Mostly affects parallel-rdp ubershaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
(cherry picked from commit 75d6c30572)
2020-08-28 11:27:02 -07:00
Rhys Perry
a024de19ac aco: fix regclass checks when fixing to vcc/exec with Builder
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
(cherry picked from commit fc9f502a5b)
2020-08-28 11:27:02 -07:00
Rhys Perry
643ae5ea24 aco: don't fix break condition for break+discard to exec
This would move the old exec mask back into exec. This also fixes the
live_out_exec.

Issue found in dEQP-VK.graphicsfuzz.cosh-return-inf-unused

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
(cherry picked from commit a537c9e73f)
2020-08-28 11:27:01 -07:00
Rhys Perry
01c1323180 aco: don't consider the first partial spill if it's the wrong type
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
(cherry picked from commit 1a5444b900)
2020-08-28 11:27:00 -07:00
Rhys Perry
bbc9b56a67 aco: consider branch definitions in spiller
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
(cherry picked from commit 8f6a900d5e)
2020-08-28 11:27:00 -07:00
Marek Vasut
51c029f77a etnaviv: Add lock around pending_ctx
The content of rsc->pending_ctx could be changed from multiple contexts
and thus from multiple threads. The per-context lock is not sufficient
to protect this list. Add per-resource lock to protect this list.

Fixes: e5cc66dfad ("etnaviv: Rework locking")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6454>
(cherry picked from commit 60975ebe58)
2020-08-28 11:26:59 -07:00
Marek Vasut
9699e42a3c etnaviv: Remove etna_resource_get_status()
This function is not used, remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6454>
(cherry picked from commit da660c90bf)
2020-08-28 11:26:59 -07:00
Alejandro Piñeiro
75462d48ec v3d: set instance id to 0 at start of tile
PTB assumes that base instance to be 0 at start of tile, but hw would
not do that, we need to set it. It is worth to note that the opcode
name is somewhat confusing as what it really sets is the base
instance. We could rename the opcode, but then the name would be
different to the original Broadcom name, so confusing in any case.

This fixes several dEQP-GLES3 and dEQP-GLES31 tests that passes
individually, but started to fail depending on other tests running
before using base instance different to zero.

This is the backport of a Vulkan patch that fixed some Vulkan CTS
tests that start to fails after some other tests used an instance id.

CC: 20.2 20.1 <mesa-stable@lists.freedesktop.org>

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6447>
(cherry picked from commit 05a0349949)
2020-08-28 11:26:58 -07:00
Alejandro Piñeiro
42f6206a84 v3d/packet: fix typo on Set InstanceID/PrimitiveID packet
Fixes: 276d22c52 ("v3d: Add some more new packets for V3D 4.x.")

CC: 20.2 20.1 <mesa-stable@lists.freedesktop.org>

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6447>
(cherry picked from commit 2e8b6f64de)
2020-08-28 11:26:57 -07:00
Nanley Chery
f63e1edefb gallium/dri2: Report correct YUYV and UYVY plane count
Return the actual number of planes in these formats (one) instead of the
number of planes used for lowering (two).

Fixes: d5c857837a ("gallium/dri2: Fix creation of multi-planar modifier images")
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6449>
(cherry picked from commit 36bd3e9868)
2020-08-28 11:26:57 -07:00
Rob Clark
b445b12c0d freedreno/gmemtool: add tile_alignw/h and a650
Fixes: f6f8a19092 ("freedreno/a6xx: split up gmem/tile alignment requirements")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6461>
(cherry picked from commit 758fdb9f33)
2020-08-28 11:26:56 -07:00
Marek Olšák
10571677e5 radeonsi: fix tess levels coming as scalar arrays from SPIR-V
This fixes: KHR-GL45.gl_spirv.spirv_modules_positive_test

Fixes: 75ce078a0a "radeonsi: enable NIR by default and document GL 4.6 support"

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6460>
(cherry picked from commit a61890883d)
2020-08-28 11:26:56 -07:00
Bas Nieuwenhuizen
d4056d25d1 radv: Update CTS version.
CC: 20.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6444>
(cherry picked from commit 83139aca59)
2020-08-28 11:26:55 -07:00
Bas Nieuwenhuizen
bd1d4bba42 radv: Remove conformance warnings with ACO.
Nobody complained about our conformance submissions.

CC: 20.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6444>
(cherry picked from commit 4e30191c9d)
2020-08-28 11:26:54 -07:00
Lionel Landwerlin
33653e6dde anv: fix transform feedback surface size
Non multiple 4 sizes are causing issue in particular < 4.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3450
Fixes: 36ee2fd61c ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6430>
(cherry picked from commit fd10cb8cfc)
2020-08-28 11:26:51 -07:00
Vinson Lee
c1e2e33752 meson: Fix lmsensors warning message.
Fixes: 138c003d22 ("meson: deprecated 'true' and 'false' in combo options for 'enabled' and 'disabled'")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6397>
(cherry picked from commit 855afe0144)
2020-08-28 11:26:51 -07:00
Rob Clark
d27e1776e1 freedreno: handle case of shadowing current render target
If you have a sequence where there is a single buffer associated with
the current render target, and then you end up shadowing it on the 3d
pipe (u_blitter), because of how we swap the new shadow and rsc before
the back-blit, you could end up confusing things into thinking that
the blitters framebuffer state is the same as the current framebuffer
state.

Re-organizing the sequence to swap after the blit is complicated when
also having to deal with CPU memcpy blit path, and the batch/rsc
accounting.  So instead just detect this case and flush if we need to.

Fixes:
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_clear
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_draw

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6434>
(cherry picked from commit 1fa43a4a8e)
2020-08-28 11:26:50 -07:00
Marek Olšák
83df231acd st/mesa: don't generate NIR for ARB_vp/fp if NIR is not preferred
Fixes: 5d0630e504 "st/mesa: call prog_to_nir sooner for ARB_fp"
Fixes: a3de63fbb3 "st/mesa: don't generate VS TGSI if NIR is enabled"

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
(cherry picked from commit 2424485fb4)
2020-08-28 11:26:49 -07:00
Jason Ekstrand
786e6a2af8 clover/spirv: Don't call llvm::regularizeLlvmForSpirv
writeSpirv() already takes care of that, and calling it twice seems to
duplicate functions and cause problems when processing execution modes.

Fixes: 2043c5f37c "clover/llvm: Add functions for compiling from..."
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6306>
(cherry picked from commit e3e45e2456)
2020-08-28 11:26:46 -07:00
Dylan Baker
dee7acec82 .pick_status.json: Mark e93979ba59 as denominated 2020-08-28 11:26:42 -07:00
Dylan Baker
db0a93de12 .pick_status.json: Update to 7fbded8b58 2020-08-28 11:26:39 -07:00
Dylan Baker
dae7b5156f VERSION: bump for 20.2.0-rc3 2020-08-27 18:49:32 -07:00
Rhys Perry
c2a441c6a2 aco: fix non-rtz pack_half_2x16
We were using the wrong conversion opcode. The high bits are also not
zero'd on GFX10, which can cause v_cvt_pk_u16_u32 to clamp.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: df645fa369 ('aco: implement VK_KHR_shader_float_controls')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6346>
(cherry picked from commit 9c1e0d86a8)
2020-08-21 12:55:47 -07:00
Danylo Piliaiev
831473e56e glsl: Eliminate out-of-bounds triop_vector_insert
Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

 "In the subsections described above for array, vector, matrix and
  structure accesses, any out-of-bounds access produced undefined
  behavior.... Out-of-bounds writes may be discarded or overwrite
  other variables of the active program."

Fixes crashes when dereferencing gl_ClipDistance and gl_TessLevel*, e.g:

  int index = -1;
  gl_ClipDistance[index] = -1;

When LowerCombinedClipCullDistance is true.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6363>
(cherry picked from commit e802bff69e)
2020-08-21 12:55:46 -07:00
Pierre Moreau
b3510789c2 clover/spirv: Remove unused tuple header
Fixes: 2147386505 ("clover/spirv: Add functions for parsing arguments, linking programs, etc.")
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Serge Martin <edb@sigluy.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5038>
(cherry picked from commit a9ca73730e)
2020-08-21 12:55:41 -07:00
Alyssa Rosenzweig
9a15390174 panfrost: Free batch->dependencies
On glmark2-es2 -bterrain:

594.05KB leaked over 9282 calls from:
    panfrost_batch_update_bo_access
      at ../src/gallium/drivers/panfrost/pan_job.c:462
      in /home/alyssa/rockchip_dri.so
    panfrost_batch_add_bo
      at ../src/gallium/drivers/panfrost/pan_job.c:560
    panfrost_batch_add_bo
      at ../src/gallium/drivers/panfrost/pan_job.c:519
      in /home/alyssa/rockchip_dri.so
    panfrost_batch_add_resource_bos
      at ../src/gallium/drivers/panfrost/pan_job.c:569
    panfrost_batch_add_fbo_bos
      at ../src/gallium/drivers/panfrost/pan_job.c:588
      in /home/alyssa/rockchip_dri.so
    panfrost_create_batch
      at ../src/gallium/drivers/panfrost/pan_job.c:126

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373>
(cherry picked from commit 1cb47f8eea)
2020-08-21 12:55:40 -07:00
Alyssa Rosenzweig
83c32b9d90 panfrost: Use memctx for sysvals
8.74KB leaked over 52 calls from:
    0xffffbb5b9fc3
      in ??
    _mesa_hash_table_init
      at ../src/util/hash_table.c:163
      in /home/alyssa/rockchip_dri.so
    _mesa_hash_table_create
      at ../src/util/hash_table.c:186
    _mesa_hash_table_u64_create
      at ../src/util/hash_table.c:701
      in /home/alyssa/rockchip_dri.so
    panfrost_nir_assign_sysvals
      at ../src/panfrost/util/pan_sysval.c:130
      in /home/alyssa/rockchip_dri.so
    midgard_compile_shader_nir
      at ../src/panfrost/midgard/midgard_compile.c:2905
      in /home/alyssa/rockchip_dri.so

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373>
(cherry picked from commit 680fb05f99)
2020-08-21 12:55:40 -07:00
Alyssa Rosenzweig
b4c5c7cbf5 pan/mdg: Free previous liveness
Before we drop the reference.

160 calls with 0B peak consumption from:
    0xffffbd9d2fc3
      in ??
    pan_compute_liveness
      at ../src/panfrost/util/pan_liveness.c:127
      in /home/alyssa/rockchip_dri.so
    mir_compute_liveness
      at ../src/panfrost/midgard/midgard_liveness.c:55
      in /home/alyssa/rockchip_dri.so
    midgard_opt_dead_code_eliminate
      at ../src/panfrost/midgard/midgard_opt_dce.c:118
      in /home/alyssa/rockchip_dri.so

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373>
(cherry picked from commit 8dd38e5a3e)
2020-08-21 12:55:39 -07:00
Alyssa Rosenzweig
f41a82869f panfrost: Free hash_to_temp map
No need to put it on the context, we can keep it local in mir_squeeze
and drop when we're done.

15.77KB leaked over 85 calls from:
    0xffffaed3bfc3
      in ??
    _mesa_hash_table_rehash
      at ../src/util/hash_table.c:368
      in /home/alyssa/rockchip_dri.so
    hash_table_insert
      at ../src/util/hash_table.c:403
      in /home/alyssa/rockchip_dri.so
    find_or_allocate_temp
      at ../src/panfrost/midgard/mir_squeeze.c:48
      in /home/alyssa/rockchip_dri.so
    find_or_allocate_temp
      at ../src/panfrost/midgard/mir_squeeze.c:35
      in /home/alyssa/rockchip_dri.so
    mir_squeeze_index
      at ../src/panfrost/midgard/mir_squeeze.c:76

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373>
(cherry picked from commit 62637a913a)
2020-08-21 12:55:38 -07:00
Alyssa Rosenzweig
e26c08622b panfrost: Free NIR of blit shaders
After we compile from NIR to a native binary, we can throw away the NIR.

17.47KB leaked over 104 calls from:
    0xffff87dcafc3
      in ??
    _mesa_hash_table_init
      at ../src/util/hash_table.c:163
      in /home/alyssa/rockchip_dri.so
    _mesa_hash_table_create
      at ../src/util/hash_table.c:186
    nir_lower_vars_to_ssa_impl
      at ../src/compiler/nir/nir_lower_vars_to_ssa.c:717
      in /home/alyssa/rockchip_dri.so
    nir_lower_vars_to_ssa
      at ../src/compiler/nir/nir_lower_vars_to_ssa.c:817
    optimise_nir
      at ../src/panfrost/midgard/midgard_compile.c:504
      in /home/alyssa/rockchip_dri.so
    midgard_compile_shader_nir
      at ../src/panfrost/midgard/midgard_compile.c:2895
      in /home/alyssa/rockchip_dri.so
    panfrost_build_blit_shader
      at ../src/panfrost/lib/pan_blit.c:103
      in /home/alyssa/rockchip_dri.so

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373>
(cherry picked from commit da6d0e3fac)
2020-08-21 12:55:38 -07:00
Alyssa Rosenzweig
3e0565c262 panfrost: Free cloned NIR shader
Fixes heaptrack leak:

19.37KB leaked over 63 calls from:
    0xffff92bbefc3
      in ??
    nir_alu_instr_create
      at ../src/compiler/nir/nir.c:442
      in /home/alyssa/rockchip_dri.so
    clone_alu
      at ../src/compiler/nir/nir_clone.c:277
      in /home/alyssa/rockchip_dri.so
    clone_instr
      at ../src/compiler/nir/nir_clone.c:495
      in /home/alyssa/rockchip_dri.so
    clone_block
      at ../src/compiler/nir/nir_clone.c:544
    clone_cf_list
      at ../src/compiler/nir/nir_clone.c:594
    clone_function_impl
      at ../src/compiler/nir/nir_clone.c:672
      in /home/alyssa/rockchip_dri.so
    nir_shader_clone
      at ../src/compiler/nir/nir_clone.c:744
      in /home/alyssa/rockchip_dri.so
    panfrost_shader_compile
      at ../src/gallium/drivers/panfrost/pan_assemble.c:154
      in /home/alyssa/rockchip_dri.so

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373>
(cherry picked from commit 9146f596ed)
2020-08-21 12:55:37 -07:00
Alyssa Rosenzweig
e834ac4863 panfrost: Fix blend leak for render targets 5-8
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 375d4c2c74 ("panfrost: Extend blending to MRT")
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373>
(cherry picked from commit ba4fc67812)
2020-08-21 12:55:36 -07:00
Tapani Pälli
f7a4d89b19 anv: null check for buffer before reading size
v2: move assignment under existing check (Nanley)

Fixes: b9a05447a1 ("anv: dynamic vertex input binding stride and size support")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6369>
(cherry picked from commit 709dffa856)
2020-08-21 12:55:35 -07:00
Karol Herbst
d74b2bf797 nv50/ir/nir: fix global_atomic_comp_swap
Fixes: 20d0ae464c ("nv50/ir: implement global atomics and handle it for nir")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6367>
(cherry picked from commit b283fb335b)
2020-08-21 12:55:35 -07:00
Eric Anholt
99540aa4fa freedreno/ir3: Fix assertion failures dumping CS high full regs.
The *2 here would bump into the *2 in regset, causing assertion failures
dumping CS programs.  Just set the mergedregs flag on a6xx, and don't
duplicate the mergedregs logic.  If you're dealing with new HW where we
don't know if mergedregs is set, you may need to tweak the flag during
disasm setup for the stats to make sense.

Fixes: f7bd3456d7 ("freedreno: deduplicate a3xx+ disasm")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6323>
(cherry picked from commit a27823ef2c)
2020-08-21 12:55:34 -07:00
Rob Clark
fc698d8ce7 freedreno/a6xx: fix occlusion query with more than one tile
We need to emit epilogue after each tile, not just after the last tile.

Fixes: 13fc03f4c0 ("freedreno/a6xx: Avoid stalling for occlusion queries")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6376>
(cherry picked from commit 7e3a788bd3)
2020-08-21 12:55:34 -07:00
Eric Engestrom
99d5727d2d egl/x11_dri3: enable & require xfixes 2.0
Cc: 20.2 <mesa-stable>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6132>
(cherry picked from commit eae181e3eb)
2020-08-21 12:55:30 -07:00
Alyssa Rosenzweig
748a7e1a44 pan/mdg: Ensure barrier op is set on texture
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Fixes: 92c808cd47 ("pan/mdg: eliminate references to ins->texture.op")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6321>
(cherry picked from commit 06c31031e7)
2020-08-21 12:55:29 -07:00
Alyssa Rosenzweig
7c47874d45 panfrost: Fix WRITES_GLOBAL bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Fixes: dce7722ef8 ("panfrost: Handle writes_memory correctly")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6321>
(cherry picked from commit 39bf1fb322)
2020-08-21 12:55:28 -07:00
Roman Stratiienko
9ea9fbf6cb android: freedreno: Another build fix
During build on Android 10, build error occurred:

'''
[ 26% 456/1718] Gen Header: libfreedreno_registers_32 <= a3xx.xml.h
FAILED: out/target/product/pinephone/gen/STATIC_LIBRARIES/libfreedreno_registers_intermediates/registers/adreno/a3xx.xml.h
/bin/bash -c "PATH=/usr/bin:\$PATH python3 external/mesa3d/src/freedreno/registers/gen_header.py external/mesa3d/src/freedreno/registers/adreno/a3xx.xml > out/target/product/pinephone/gen/STATIC_LIBRARIES/libfreedreno_registers_intermediates/registers/adreno/a3xx.xml.h"
Traceback (most recent call last):
  File "external/mesa3d/src/freedreno/registers/gen_header.py", line 470, in <module>
    main()
  File "external/mesa3d/src/freedreno/registers/gen_header.py", line 446, in main
    xml_file = sys.argv[2]
IndexError: list index out of range
'''

Align build rules with meson fixes it.

Fixes: 62ebd342 ("freedreno/registers: split header build into subdirs")
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6170>
(cherry picked from commit 8626d4cbef)
2020-08-21 12:55:27 -07:00
Dave Airlie
bb2e75ec7d llvmpipe/cs: update compute counters not fragment shader.
This was updating the wrong counters.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: a6f6ca37c8 ("llvmpipe: add initial shader create/bind/destroy variants framework.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6339>
(cherry picked from commit e137bbb87f)
2020-08-21 12:55:27 -07:00
Jason Ekstrand
b6a1444ed1 spirv: Don't emit RMW for vector indexing in shared or global
Anything that fails the is_external_block check is getting the
vtn_local_load/store path which does read-modify-write which isn't
correct if the variable mode can be written cross-workgroup.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6372>
(cherry picked from commit b479de8537)
2020-08-21 12:55:26 -07:00
Bas Nieuwenhuizen
39cec65c22 radv: Fix handling of attribs 16-31.
We really need to update the enum for consistency, but that involves
a bunch of GL & bitfield work which is error-prone, so since this is
a fix for stable lets do the simple things.

Confirmed that nothing in radv/aco/nir/spirv uses MAX_VERT_ATTRIB
except the one thing I bumped.

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6120>
(cherry picked from commit f038b3a136)
2020-08-21 12:55:25 -07:00
Bas Nieuwenhuizen
9b09d4ca95 radv: Override the uniform buffer offset alignment for World War Z.
Game does the equivalent of a

ALIGN(..., minUniformBufferOffsetAlignment >> 4)

which breaks when said alignment is <16 with a SIGFPE.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6120>
(cherry picked from commit 0067f89920)
2020-08-21 12:55:24 -07:00
Bas Nieuwenhuizen
17f9aa36b6 driconf: Support selection by Vulkan applicationName.
This adds applicationName + version through like engineName.

Rationale: A game (World War Z) includes the store name in the
executable name, so has multiple executable names.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6120>
(cherry picked from commit a1d4721e21)
2020-08-21 12:55:23 -07:00
Dave Airlie
801e3a72bc llvmpipe: enable GL 4.5
This passes conformance on both the master and 4.6.0 (with patches)
branches. I'll be submitting results shortly from the 20.2.x branch
this lands in.

Cc: "20.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6044>
(cherry picked from commit f9e773b920)
2020-08-21 12:55:22 -07:00
Dylan Baker
f79e81a38b .pick_status.json: Update to ca7d66e847 2020-08-21 12:54:03 -07:00
Danylo Piliaiev
522e62ac5b spirv: Only require bare types to match when copying variables
OpCopyMemory doesn't care about mismatched decorations, only about
matching types.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3418
Fixes: bf1a1eed88
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6344>
(cherry picked from commit b6ebf6eba9)
2020-08-18 07:32:14 -07:00
Boris Brezillon
8cdfbd3a07 nir: Fix i64tof32 lowering
The round-to-nearest-even implementation found in lower_2f() is incorrect
for any value having a significand that is not directly representable
and whose non-representable part lies between 1 and half the minimum
representable value. In this case, the significand is rounded up instead
of being rounded down.

Fixes: 936c58c8fc ("nir: Extend nir_lower_int64() to support i2f/f2i lowering")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6290>
(cherry picked from commit 199bea0fd8)
2020-08-18 07:32:14 -07:00
Dave Airlie
81b1dcf83a llvmpipe/blit: for 32-bit unorm depth blits just copy 32-bit
Don't have the shader do a 32-bit unorn to float conversion,
the values don't remain accurate then.

Fixes:
GTF-GL45.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_multisampled_to_singlesampled_blit
for 32-bit unorm depth buffers.

Cc: "20.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6044>
(cherry picked from commit 2e40b2c155)
2020-08-18 07:32:09 -07:00
Alyssa Rosenzweig
2891ddb996 panfrost: Set STRIDE_4BYTE_ALIGNED_ONLY
It isn't clear to me why, but this breaks in some cases (such as some
dEQP cases where the blob does a translate too).

This reverts commit 9f2997dad0.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6326>
(cherry picked from commit e03622e50f)
2020-08-18 07:32:08 -07:00
Pierre-Eric Pelloux-Prayer
a9024558ba ac/llvm: handle static/shared llvm init separately
Having a single init function works as expected for shared llvm, but
when using a static llvm only one llvm will get initialized.

This commit introduces 2 separate init function:
- shared llvm = single public init function
- static llvm = one init function for each module using llvm

Fixes: 50d20dc055 ("ac/llvm: export ac_init_llvm_once in targets")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3376
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6253>
(cherry picked from commit b7c04b1790)
2020-08-18 07:32:07 -07:00
Bas Nieuwenhuizen
750bb69ba4 radv: Use getter instead of setter to extract value.
Oops ...

Fixes: 64768111c3 "radv: Handle slightly different image dimensions."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3417
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6337>
(cherry picked from commit 50b039590e)
2020-08-18 07:32:06 -07:00
Dave Airlie
43b0e51f43 llvmpipe: only read 0 for channels being read
KHR-GL45.robust_buffer_access_behavior.vertex_buffer_objects
on the CTS 4.6.0 branch and this fixes it.

Roland identified that if the vertex format doesn't contain channels
then we shouldn't be overriding them to 0, so RGB fetch out of bounds
should return 0 for RGB, but the A channel should still be getting back
1.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6287>
(cherry picked from commit 430e3310e2)
2020-08-18 07:32:05 -07:00
Lionel Landwerlin
9aa25a340c anv: don't fail userspace relocation with perf queries
This is a left over from the earlier version of
VK_KHR_performance_query where we used kernel relocs to implement
multi passe queries.

We're using self modifying batches now so we shouldn't need any
relocation.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2001a80d4a ("anv: Implement VK_KHR_performance_query")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6291>
(cherry picked from commit 031f9e17d2)
2020-08-18 07:31:22 -07:00
Bas Nieuwenhuizen
cb55aca266 radv: When importing an image, redo the layout based on the metadata.
When importing a DMA-BUF, the image layout created in vkImageCreate may
not match the imported BO's. To make this work we redo the layout based
on the metadata of the imported image.

The original patch did a delayed allocation just as for AHB, but that
does not work for images that are not imported (but e.g. exported only).

Original patch by Simon Ser <contact@emersion.fr>

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2801
CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6274>
(cherry picked from commit d19bc94e4e)
2020-08-18 07:31:21 -07:00
Jesse Natalie
ed256fd804 u_debug_stack_test: Fix MSVC compiling by using ATTRIBUTE_NOINLINE
Fixes: d0d14f3f ("util: Add unit test for stack backtrace caputure")

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6303>
(cherry picked from commit 58af31186a)
2020-08-18 07:31:21 -07:00
Nanley Chery
66fc0ad7d6 iris: Don't call SET_TILING for dmabuf imports
Calling SET_TILING on a DMA buffer with the gen12 CCS modifier can fail
unnecessarily. The main surface in the BO is Y-tiled, but the CCS portion is
linear and can have a stride that's not a multiple of 128B. Because SET_TILING
is called on the CCS plane with I915_TILING_Y, the ioctl will sometimes reject
the stride.

SET_TILING was originally used in b6d45e7f74 to
fix an assertion failure in iris_resource_from_handle. Assigning the BO's
tiling_mode field is sufficient to avoid the failure.

Fixes: c19492bcdb ("iris: Handle importing aux-enabled surfaces on TGL")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6296>
(cherry picked from commit c111e9099c)
2020-08-18 07:31:20 -07:00
Tony Wasserka
9adbc862f7 nir/lower_idiv: Port recent LLVM fixes to emit_udiv
This change fixes off-by-one results in corner cases such as
0xffffffff / 0x11111111. For details refer to LLVM bug 46212.

Fixes: 8b98d0954e ('nir/lower_idiv: add new llvm-based path')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6281>
(cherry picked from commit 8277334f39)
2020-08-18 07:31:19 -07:00
Marek Olšák
a19dd637e8 radeonsi: disable NGG culling on gfx10.3 because of hangs
Fixes: a23802bcb9 - ac,radeonsi: start adding support for gfx10.3

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6282>
(cherry picked from commit 2b78cb2e00)
2020-08-18 07:31:19 -07:00
Dylan Baker
a65c597897 .pick_status.json: Update to 6d28270968 2020-08-18 07:31:17 -07:00
Danylo Piliaiev
55ef5d5a22 anv/nir: Unify inputs_read/outputs_written between geometry stages
inputs_read/outputs_written are used for a shader stage to
determine the layout of input and output storage. Adjacent stages must
agree on the layout, so adjacent input/output bitfields must match.

Most of the time, cross-stage optimizations make that happen anyway,
but there are some cases (with special values like clip distances and
point size) where this doesn't happen.

Fixes crashes in dEQP-VK.subgroups.*.framebuffer.*_tess_eval

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3210
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6102>
(cherry picked from commit 2701f887fc)
2020-08-12 10:12:28 -07:00
Samuel Pitoiset
a4dc1baf77 radv: fix emitting the border color pointer on the compute queue
This was just missing.

Fixes: 57e796a12a ("radv: Implement VK_EXT_custom_border_color")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: John Galt <johngaltfirstrun@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6276>
(cherry picked from commit 638a09b827)
2020-08-12 10:12:27 -07:00
Vinson Lee
11edf2e357 util: Fix memory leaks in unit test.
Fix warnings reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable bt1 going out of scope leaks the storage
it points to.
leaked_storage: Variable bt2 going out of scope leaks the storage
it points to.

Fixes: d0d14f3f64 ("util: Add unit test for stack backtrace caputure")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6246>
(cherry picked from commit 96cfc684e6)
2020-08-12 10:12:26 -07:00
Nanley Chery
6d14d91a80 dri_util: Update internal_format to GL_RGB8 for MESA_FORMAT_B8G8R8X8_UNORM
Port the change done for RGBX8888 in
02a1f95386.

If XR24 images are considered to be VIEW_CLASS_24_BITS-compatible, it's
reasonable to assume that XB24 images would be as well.

Fixes: bf576772ab ("dri_util: add driImageFormatToSizedInternalGLFormat function")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6095>
(cherry picked from commit 8abf59ff98)
2020-08-12 10:12:26 -07:00
Dylan Baker
7dc972d4b6 .pick_status.json: Update to 61042b1bdb 2020-08-12 10:12:24 -07:00
Dylan Baker
e60a1d5bc0 bump version for 20.2.0-rc2 2020-08-12 10:06:51 -07:00
Daniel Schürmann
b454e44579 aco: execute branch instructions in WQM if necessary
It could happen that only the branch condition was computed in WQM
and not the branch instruction.
There is now some rendundancy which should be cleaned up.

Fixes: 3817fa7a4d ('aco: fix WQM handling in nested loops')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6260>
(cherry picked from commit fdb97d3d29)
2020-08-11 09:43:35 -07:00
Rhys Perry
ee63146f37 aco: don't move memory accesses to before control barriers
Fixes random failures of dEQP-VK.image.qualifiers.volatile.cube_array.r32i
and similar tests on Vega.

fossil-db (Navi):
Totals from 6 (0.00% of 135946) affected shaders:
VMEM: 1218 -> 1110 (-8.87%); split: +2.46%, -11.33%
SMEM: 174 -> 189 (+8.62%)
Copies: 84 -> 87 (+3.57%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: cd392a10d0 ('radv/aco,aco: use scoped barriers')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6174>
(cherry picked from commit 7b4c24eb67)
2020-08-11 09:43:35 -07:00
Samuel Pitoiset
6b6a38a8be radv: limit LATE_ALLOC_GS to prevent a GPU hang on GFX10
Found by inspection, doesn't fix anything known.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6279>
(cherry picked from commit e4c6204d65)
2020-08-11 09:43:34 -07:00
Samuel Pitoiset
2d2ba264e9 radv/gfx10: add missing initialization of registers
Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6277>
(cherry picked from commit 0256250547)
2020-08-11 09:43:34 -07:00
Christian Gmeiner
d584839b9b etnaviv: completely turn off MSAA
MSAA worked before etnaviv landed in upstream mesa but got
broken over time. Disable MSAA completely until it is fixed again.

Fixes problems/crashes with applications that want to make use of MSAA.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5608>
(cherry picked from commit 044b238507)
2020-08-11 09:43:33 -07:00
Tapani Pälli
6e5874416d anv: add a check for depthStencilState before using it
v2: move the code under existing correct check!

Fixes: e4590c0750 ("anv: depth/stencil dynamic state support")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3375
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6240>
(cherry picked from commit 2d010d3dc5)
2020-08-11 09:41:11 -07:00
Lionel Landwerlin
0ba14f96fc anv: fix up dynamic clip emission
There were 2 issues :

   * We were not emitting the clip state when the pipeline changed

   * On Gen7 we did not program the front facing & cull mode dynamic
     values in the clip state

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c34d8ac26e ("anv: handle dynamic viewport count")
Closes https://gitlab.freedesktop.org/mesa/mesa/-/issues/3379

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6265>
(cherry picked from commit ffc8f2ba4c)
2020-08-11 09:41:11 -07:00
Lionel Landwerlin
8acf2493a9 anv: centralize vk to gen arrays
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6265>
(cherry picked from commit 240c0746d1)
2020-08-11 09:41:09 -07:00
Rob Clark
e196f50d76 freedreno/crashdec: handle section name typos
The fixes tag isn't so much because it was incorrect before, but because
I'm going to send a kernel patch to fix the typo, and that will break
old crashdec.

Fixes: 1ea4ef0d3b ("freedreno: slurp in decode tools")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6242>
(cherry picked from commit cbfce486f2)
2020-08-11 09:35:52 -07:00
Rhys Perry
6b823dfc01 aco: set constant_data_offset correctly in the case of merged shaders
setup_nir() is done for all shaders before any of them are selected, so
constant_data_offset could be incorrect for the first shader.

Fixes incorrect geometry in Mafia III and Max Payne 3.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2768
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6205>
(cherry picked from commit 6e70508151)
2020-08-11 09:35:52 -07:00
Bas Nieuwenhuizen
c612c06cf1 radv: Do not consider layouts fast-clearable on compute queue.
We cannot decompress from the compute queue. While I'm pretty sure
VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL is only useful on the
graphics queue, I cannot find a VU that prevents the transition
from happening on another queue, so we need to be careful here.

This patch ensures we do the decompression on the barrier that changes
the queue ownership.

Another problem was that DCC images were considered fast-clearable
when not DCC compressed, which resulted in a mess with concurrent
queue ownership.

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3387
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6252>
(cherry picked from commit e362ccb20c)
2020-08-11 09:35:51 -07:00
Marcin Ślusarz
16da4a483c intel/perf: fix performance counters availability after glFinish
Currently Linux kernel gathers performance counters at fixed
intervals (~5-10ms), so if application uses AMD_performance_monitor
extension and immediately after glFinish() asks GL driver for HW
performance counter values it might not get any data (values == 0).

Fix this by moving the "read counters from kernel" code from
"is query ready" to "get counter values" callback with a loop around
it. Unfortunately it means that the "read counters from kernel"
code can spin for up to 10ms.

Ideally kernel should gather performance counters whenever we ask
it for counter values, but for now we have deal with what we have.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5788>
(cherry picked from commit 2fbab5a1b3)
2020-08-11 09:35:51 -07:00
Bas Nieuwenhuizen
5b25e9de0c radv: Fix assert that is too strict.
The added assert fails on MSAA images if we disable FMASK ....

Reordered things.

Fixes: c6aadbae71 "radv: Don't use both DCC and CMASK for single sample images."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3385
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6232>
(cherry picked from commit ff4f6202be)
2020-08-11 09:35:50 -07:00
Eric Engestrom
c09c88fbac meson: bump required glvnd version
https://github.com/KhronosGroup/EGL-Registry/pull/95 has moved
a couple of extensions defines and functions to the upstream `eglext.h`,
but when 9a74746bd1 sync'ed these files we broke compilation
of apps that require these symbols on systems that don't have the
updated Khronos headers.

On non-GLVND builds, we still provide these headers, so everything's
fine, but on GLVND builds the Khronos headers are external so we need to
make sure we have a libglvnd version that's recent enough.

Fixes: 9a74746bd1 ("EGL: sync headers with Khronos")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6069>
(cherry picked from commit dd003abd2f)
2020-08-11 09:35:50 -07:00
Eric Engestrom
f3c3a1ceff driconf: fix force_gl_vendor description
The option is not a toggle to "allow GPU vendor to be overridden", it
*is* the override.

Fixes: dca119f12c ("mesa/gallium: add dric option to allow overriding GL vendor string")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6207>
(cherry picked from commit 7fbadfc385)
2020-08-11 09:35:49 -07:00
Eric Engestrom
9f5c75a90f egl/entrypoint-check: add check that GLVND and plain EGL have the same entrypoints
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4448>
(cherry picked from commit 800816d70b)
2020-08-11 09:35:48 -07:00
Eric Engestrom
53f5f43627 egl/entrypoint-check: split sort-check into a function
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4448>
(cherry picked from commit 351d513e30)
2020-08-11 09:35:47 -07:00
Eric Engestrom
7665280b28 pick-ui: specify git commands in "resolve cherry pick" message
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6134>
(cherry picked from commit e3069c4257)
2020-08-11 09:35:47 -07:00
Rob Clark
a6ccd24636 freedreno/registers: add some missing regs to build
Needed for installed version of crashdec/cffdump.

Fixes: 9c33c53898 ("freedreno/registers: install gzip'd register database")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6234>
(cherry picked from commit 3b6e8670f8)
2020-08-11 09:35:46 -07:00
Dylan Baker
3f0a10b7da .pick_status.json: Update to fdb97d3d29 2020-08-11 09:35:45 -07:00
Dylan Baker
d4d36010a8 meson/freedreno: Fix lua requirement
Freedreno needs at least Lua 5.2, but the current code will report found
for 5.1, which doesn't actually work.

Fixes: caa107cb8d
       ("freedreno/decode: move dependencies up a level")

Reviewed-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6229>
(cherry picked from commit 1e28745bc0)
2020-08-07 10:44:41 -07:00
Marek Olšák
1edc9549d2 radeonsi: various fixes for gfx10.3
The magic numbers fix sample shading.
The bypass flag is optional.

Fixes: a23802bcb9 - ac,radeonsi: start adding support for gfx10.3

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6137>
(cherry picked from commit 0cdd411b6d)
2020-08-07 10:44:40 -07:00
Marek Olšák
ee4ccf0031 radeonsi: remove the NGG hack decreasing LDS usage to deal with overflows
The LDS size can't overflow anymore, so we can use the correct max LDS size.

Fixes: a23802bcb9 - ac,radeonsi: start adding support for gfx10.3

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6137>
(cherry picked from commit e2e700f605)
2020-08-07 10:44:40 -07:00
Marek Olšák
9c719ad7c9 radeonsi: add a common function for getting the size of gs_ngg_scratch
The next commit will use it.

Fixes: a23802bcb9 - ac,radeonsi: start adding support for gfx10.3

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6137>
(cherry picked from commit 97456e847e)
2020-08-07 10:44:39 -07:00
Marek Olšák
3bf0368f9e radeonsi: don't count unusable vertices to the NGG LDS size
Now we get optimal LDS usage.

Fixes: a23802bcb9 - ac,radeonsi: start adding support for gfx10.3

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6137>
(cherry picked from commit 68b3e92fef)
2020-08-07 10:44:39 -07:00
Marek Olšák
b0b55fa939 radeonsi: fix applying the NGG minimum vertex count requirement
The code applied the restriction too late, which could overflow LDS size,
which started happening more often after the minimum vertex count was
increased for Sienna.

Incorporate the clamping into the previous code for rounding up the counts.
Now the LDS size can never overflow, but it may use vector lanes less
efficiently (max_gsprims can be decreased more), which will be addressed
in the next commit.

Fixes: 4ecc39e1aa ("radeonsi/gfx10: NGG geometry shader PM4 and upload")

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6137>
(cherry picked from commit 64c741ffb7)
2020-08-07 10:44:38 -07:00
Marek Olšák
3183610228 radeonsi: increase minimum NGG vertex count requirement per workgroup on gfx 10.3
Fixes: a23802bcb9 - ac,radeonsi: start adding support for gfx10.3

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6137>
(cherry picked from commit 7a468fc0f6)
2020-08-07 10:44:38 -07:00
Marek Olšák
6eadb68e98 radeonsi: use the same units for esgs_ring_size and ngg_emit_size
for consistency

Fixes: a23802bcb9 - ac,radeonsi: start adding support for gfx10.3

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6137>
(cherry picked from commit 633d2aa915)
2020-08-07 10:44:37 -07:00
Marek Olšák
81df3a4a4c radeonsi: use correct wave size in gfx10_ngg_calculate_subgroup_info
Fixes: 88efb63caf ("radeonsi/gfx10: implement Wave32")

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6137>
(cherry picked from commit b6fb09fd84)
2020-08-07 10:44:36 -07:00
Marek Olšák
d0b0165808 Revert "radeonsi: honor a user-specified pitch on gfx10.3"
This reverts commit c4b5fd9ab0.

It breaks mipmapping. This is only meant to be used by OpenCL, which allows
setting a user pitch for linear images. In all other cases, don't support
a custom pitch.

Fixes: c4b5fd9ab0 "radeonsi: honor a user-specified pitch on gfx10.3"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6137>
(cherry picked from commit 61c671c97e)
2020-08-07 10:44:36 -07:00
Dylan Baker
9a5b5cdf9c .pick_status.json: Update to 1e28745bc0 2020-08-07 10:44:33 -07:00
Christian Gmeiner
1ed360d24b etnaviv: call nir_lower_bool_to_bitsize
Starting with commit 6f394343b1 ("nir/algebraic: i2f(f2i()) -> trunc()")
dEQP-GLES2.functional.shaders.operator.binary_operator.div.lowp_int_vertex
ends with an unsuppored flt instruction. Use nir_lower_bool_to_bitsize to
convert this flt to a flt32 which is supported. This fixes the introduced
regression.

Cc: 20.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6182>
(cherry picked from commit e63a7882a0)
2020-08-07 08:52:49 -07:00
Lionel Landwerlin
761c979ae0 anv: fix incorrect realloc failure handling
We don't want to leak in case of failure.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Ivan Briano <ivan.briano@intel.com>
Fixes: 246261f0ad ("anv: prepare the driver for delayed submissions")
Fixes: 34f32a6d66 ("anv: implement VK_KHR_timeline_semaphore")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6200>
(cherry picked from commit b43bcb05a1)
2020-08-07 08:52:48 -07:00
Rhys Perry
20663891c1 aco: fix C++11/C++14 compilation
static_assert without a message is only available since C++17.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: d1f992f3c2 ('aco: rework barriers and replace can_reorder')
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3374
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6216>
(cherry picked from commit 21b47cbd99)
2020-08-07 08:52:48 -07:00
Danylo Piliaiev
c2f85ade7d st/mesa: Treat vertex outputs absent in outputMapping as zero in mesa_to_tgsi
After updating vertex outputs being written based on optimized NIR, they may
go out of sync with outputs in mesa IR. Which is translated to TGSI and used
together with NIR if draw doesn't have llvm.

It's much easier to treat such outputs as zero because there is no pass to
entirely get rid of them.

Similar to eeab9c93db but now for outputs.

Fixes: d684fb37bf
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3365
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6187>
(cherry picked from commit 782ba8d3ae)
2020-08-07 08:52:47 -07:00
Dylan Baker
cb341c7f86 .pick_status.json: Update to 9333a8570d 2020-08-07 08:52:45 -07:00
Dylan Baker
0b8f4381b1 VERSION: bump for 20.2.0-rc1 2020-08-06 09:36:17 -07:00
Jason Ekstrand
7f06d194fd anv: Advertise shaderIntegerFunctions2
We advertised the extension string but never the feature bit.  Doh!

Fixes: c57338b924 "anv: Enable SPV_INTEL_shader_integer_functions2..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6033>
2020-08-06 16:14:16 +00:00
Icenowy Zheng
9e397956b0 panfrost: signal syncobj if nothing is going to be flushed
When nothing is going to be flushed, the kernel will get no job that
signals the syncobj.

Signal it by ourselves, otherwise it will never get signaled.

Closes: #3371

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6190>
2020-08-06 13:16:25 +00:00
Bas Nieuwenhuizen
c6aadbae71 radv: Don't use both DCC and CMASK for single sample images.
Fixes: c67ef7695a "radv: Use ac_surface to allocate aux surfaces."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6194>
2020-08-06 10:50:22 +00:00
Jose Fonseca
e2c614a415 appveyor: Use Python3.
This implied upgrading to the Visual Studio 2019 image, not for VS
itself, but for the newer Python 3.8.5 version it contains, to avoid
UnicodeDecodeError inside modulefinder module when attempting to decode
our UTF-8 encoded Python scripts with cp1252 encoding.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6184>
2020-08-06 09:46:48 +00:00
Jose Fonseca
0f9fb7ffaa appveyor: Upgrade pip.
To avoid all those warnings.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6184>
2020-08-06 09:46:48 +00:00
Vinson Lee
2e665458a9 util: Fix SCons build.
Fixes: 848e7b947d ("util: Move stack debug functions to src/util")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6199>
2020-08-05 22:55:06 -07:00
Eric Anholt
56ab105182 freedreno: Add more asserts for DST_OFF/NUM_UNIT in indirect const uploads.
These are just empirical alignment numbers from looking at dEQP traces of
the blob driver (a330, a418, a540, a618, a630), with one exception noted
in the comments.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5990>
2020-08-05 23:06:55 +00:00
Eric Anholt
3e970de360 freedreno: Increase the NUM_UNIT on compute's consts in indirect dispatch.
Avoids tripping the assert in the next commit -- the blob never uses
num_unit % 4 != 0 for indirect const uploads.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5990>
2020-08-05 23:06:55 +00:00
Eric Anholt
f07e25bc6d freedreno/ir3: Clean up instrlen setup.
We were calculating it with the gpu_id check in two places, do it once and
use ir3_compiler for the gpu_id dependency.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5990>
2020-08-05 23:06:55 +00:00
Eric Anholt
8f637d66cc freedreno: Split ir3_const's user buffer and indirect upload APIs.
They're almost entirely split by whether you're uploading user buffer or
from a BO.  While I'm rewriting the API, drop the emit_const ->
fdN_emit_const wrapper in favor of a #define before the header and a
little helper for the asserts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5990>
2020-08-05 23:06:55 +00:00
Eric Anholt
154299934d freedreno: Rename emit_const_bo() to emit_const_ptrs().
I keep thinking it's the "upload from inside a BO" path when it's not.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5990>
2020-08-05 23:06:55 +00:00
Eric Anholt
51acfe2230 freedreno/ir3: Simpify the immediates from an array of vec4 to array of dwords.
We usually had to split the idx/swiz out of the dword index anyway.  Note
that incidentally, immediates_size now increments in vec4s instad of
4*vec4s.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5990>
2020-08-05 23:06:55 +00:00
Eric Anholt
e873c4da08 freedreno/ir3: Merge the redundant immediate_idx/immediates_count fields
I got tripped up again with the index vs count vs size fields and I'd
rather we didn't store the redundant info.  Settle on immediates_count as
"how many dwords of immediates we have"

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5990>
2020-08-05 23:06:55 +00:00
Rob Clark
5e922fbc16 glsl_to_nir: fix bitfield_extract with 16-bit operands
These are defined to explicitly take 32b values.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6073>
2020-08-05 22:04:47 +00:00
Marek Olšák
92f5e94a93 glsl: improve precision determination for calls
Don't leave the precision as NONE for non-lowerable calls. Set it to HIGH
if a function really returns highp.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6073>
2020-08-05 22:04:47 +00:00
Marek Olšák
282a1e6288 glsl: don't lower to mediump for desktop OpenGL
Desktop OpenGL ignores all precision qualifiers.

Also, the lowering pass doesn't work if precision qualifiers are not set,
which is only possible with desktop OpenGL, causing random behavior.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6073>
2020-08-05 22:04:47 +00:00
Marek Olšák
01e0085637 glsl: don't create conversion opcodes for array types
Instead, convert all elements one by one.
This fixes piglit shaders@glsl-bug-110796.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6073>
2020-08-05 22:04:47 +00:00
Marek Olšák
5020403c70 glsl: don't lower atomic functions to mediump
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6073>
2020-08-05 22:04:47 +00:00
Rob Clark
93076f60d3 glsl: don't inline intrinsics for mediump
They have an empty fxn body, trying to handle them results in the
intrinsic call being expanded into a no-op.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6073>
2020-08-05 22:04:47 +00:00
Marek Olšák
48a6255186 glsl: fix constant expression evaluation for 16-bit types
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6073>
2020-08-05 22:04:47 +00:00
Marek Olšák
f2d5f4851a glsl: lower_precision - fix assertion failure with dereferences of constants
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6073>
2020-08-05 22:04:47 +00:00
Eric Engestrom
a88fd7bfdc docs: update calendar and link releases notes for 20.1.5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6191>
2020-08-05 21:20:25 +00:00
Eric Engestrom
2d3f81f320 docs: add release notes for 20.1.5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6191>
2020-08-05 21:20:25 +00:00
Rob Clark
a4c4e0103a glsl: remove LowerPrecisionTemporaries
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6189>
2020-08-05 21:00:44 +00:00
Rob Clark
c4e0cae90c gallium: replace 16BIT_TEMPS cap with 16BIT_CONSTS
All drivers that support mediump lowering should support 16BIT_TEMPS,
but some do not also want 16b consts to be lowered.  Replace the pipe
cap in preperation to remove LowerPrecisionTemporaries.

Note: also updates reference checksums for the arm64_a630_traces job,
due to lowering more to 16b

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6189>
2020-08-05 21:00:44 +00:00
Rob Clark
0a763c0c86 glsl/lower_precision: split out const lowering
Some hw can narrow 32b const/uniform to 16b on load.. and in particular
lowering constants to 16b would break const->uniform lowering.  Allow
them to lower temps to 16b, while skipping consts.

Initially it is set to the same value as LowerPrecisionTemporaries, to
preserve the current behavior.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6189>
2020-08-05 21:00:44 +00:00
Rob Clark
4f060549be freedreno/ir3: lower local_index using local_id
Somehow this works ok with the full compiler stack, but not in
ir3_cmdline.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6189>
2020-08-05 21:00:44 +00:00
Rob Clark
e0947903fc freedreno/ir3: ir3_cmdline updates
1) convert to getopt, and drop most variant related options since
   they aren't super-useful these days.. and easy enough to add
   back if/when needed.  (Also, none of the newer shader variant
   options where covered before.)
2) covert to dynamically allocated shader/variant, to get things
   working again after ir3_shader/_variant converted to ralloc
3) few small cleanups

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6189>
2020-08-05 21:00:44 +00:00
Marek Olšák
283ad85944 radeonsi: call nir_split_array_vars/shrink_vec_array_vars/opt_find_array_copies
Loosely based on RADV and https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5668

54793 shaders in 33659 tests
Totals:
SGPRS: 2739498 -> 2739474 (-0.00 %)
VGPRS: 1534120 -> 1534256 (0.01 %)
Spilled SGPRs: 2579 -> 2579 (0.00 %)
Spilled VGPRs: 29 -> 29 (0.00 %)
Private memory VGPRs: 2176 -> 256 (-88.24 %)
Scratch size: 2220 -> 288 (-87.03 %) dwords per thread
Code Size: 55572924 -> 55584592 (0.02 %) bytes
LDS: 92 -> 92 (0.00 %) blocks
Max Waves: 966044 -> 966021 (-0.00 %)
Wait states: 0 -> 0 (0.00 %)

Totals from affected shaders:
SGPRS: 7272 -> 7248 (-0.33 %)
VGPRS: 4848 -> 4984 (2.81 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 2176 -> 256 (-88.24 %)
Scratch size: 2188 -> 256 (-88.30 %) dwords per thread
Code Size: 336332 -> 348000 (3.47 %) bytes
LDS: 18 -> 18 (0.00 %) blocks
Max Waves: 2659 -> 2636 (-0.86 %)
Wait states: 0 -> 0 (0.00 %)

|   PERCENTAGE DELTAS    |  Shaders |    SGPRs |    VGPRs |SpillSGPR |SpillVGPR | PrivVGPR |  Scratch | CodeSize | MaxWaves |    Waits |
|------------------------|----------|----------|----------|----------|----------|----------|----------|----------|----------|----------|
| 0ad                    |         6|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| alien_isolation        |      2936|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| anholt                 |        10|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| antichamber            |       180|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| batman_arkham_origins  |       589|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| bioshock-infinite      |      1769|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| borderlands2           |      3968|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| borderlands_presequel  |      1326|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| brutal-legend          |       338|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| chromeos               |        86|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| chromium               |         2|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| civilization_beyond..  |       116|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| company_of_heroes2     |       240|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| counter_strike_glob..  |      1142|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| deadcore               |        76|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| deus_ex_mankind_div..  |      1410|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| dirt-showdown          |       533|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| dirt_rally             |       364|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| divinity               |      1052|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| dolphin                |        22|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| dota2                  |      1747|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| europa_universalis_4   |        76|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| f1-2015                |       775|    0.02 %|    0.12 %|    .     |    .     | -100.00 %| -100.00 %|    0.19 %|   -0.04 %|    .     |
| furmark-0.7.0          |         4|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| gimark-0.7.0           |        10|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| glamor                 |        16|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| glmark                 |        96|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| grid_autosport         |      1767|   -0.03 %|    0.17 %|    .     |    .     |  -85.52 %|  -84.44 %|    0.40 %|   -0.03 %|    .     |
| hitman                 |      1413|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| humus-celshading       |         4|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| humus-domino           |         6|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| humus-dynamicbranching |        24|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| humus-hdr              |        10|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| humus-portals          |         2|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| humus-volumetricfog..  |         6|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| left_4_dead_2          |      1762|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| legend_of_grimrock     |       100|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| life_is_strange        |      1296|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| mad_max                |       358|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| many-spheres           |         6|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| metro_2033_redux       |      2670|    .     |    0.02 %|    .     |    .     |    .     |    .     |    .     |   -0.02 %|    .     |
| nexuiz                 |        80|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| payday2                |      1362|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| pixmark-julia-fp32     |         2|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| pixmark-julia-fp64     |         2|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| pixmark-piano-0.7.0    |         2|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| pixmark-volplosion-..  |         2|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| plot3d-0.7.0           |         8|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| portal                 |       474|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| reflections_subway     |        98|    .     |    .     |    .     |    .     |    .     |    .     |    0.02 %|    .     |    .     |
| rocket_league          |       494|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| saints_row_iv          |      1704|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| saints_row_the_third   |       671|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| sauerbraten            |         7|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| scifi_hallway          |        98|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| serious_sam_3_bfe      |       392|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| shadow_of_mordor       |      1410|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| shadow_warrior         |      3956|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| skia                   |      6094|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| sun_temple             |       109|    .     |    .     |    .     |    .     |    .     |    .     |    0.01 %|    .     |    .     |
| supertuxkart           |         4|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| talos_principle        |       324|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| team_fortress_2        |       808|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| tesseract              |       430|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| tessmark-0.7.0         |         6|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| thea                   |       172|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| tomb_raider            |      1448|   -0.02 %|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| total_war_warhammer    |       242|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| ubershaders            |        54|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| ue4_effects_cave       |       290|    .     |    .     |    .     |    .     |    .     |    .     |    0.02 %|    .     |    .     |
| ue4_elemental          |       561|    .     |    .     |    .     |    .     |    .     |    .     |    0.02 %|    .     |    .     |
| ue4_lightroom_inter..  |        64|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| ue4_realistic_rende..  |        86|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| unigine_heaven         |       322|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| unigine_sanctuary      |       264|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| unigine_tropics        |       210|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| unigine_valley         |       278|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| unity                  |        72|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| victor_vran            |      1262|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| warsow                 |       176|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| warzone2100            |         4|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| wasteland2             |        76|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| wavelet-volume         |         4|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| witcher2               |      1040|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| xcom_enemy_within      |      1236|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
| yofrankie              |        82|    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |    .     |
|------------------------|----------|----------|----------|----------|----------|----------|----------|----------|----------|----------|
| All affected           |       157|   -0.33 %|    2.81 %|    .     |    .     |  -88.24 %|  -88.30 %|    3.47 %|   -0.86 %|    .     |
|------------------------|----------|----------|----------|----------|----------|----------|----------|----------|----------|----------|
| Total                  |     54793|    .     |    .     |    .     |    .     |  -88.24 %|  -87.03 %|    0.02 %|    .     |    .     |

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5750>
2020-08-05 20:41:07 +00:00
Marek Olšák
47beee2eb3 radeonsi: reorder NIR optimizations
Based on https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5668

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5750>
2020-08-05 20:41:07 +00:00
Pierre-Eric Pelloux-Prayer
0294eaed80 radeonsi: extend workaround for KHR-GL45.texture_view.view_classes on gfx9
This is a followup of 19db1a540c.
This commit fixed KHR-GL45.texture_view.view_classes on gfx9 but the test
still failed when using AMD_DEBUG=nodma or AMD_DEBUG=nodcc,nodma.

The workaround is now used from si_resource_copy_region so it covers the
previous call site (si_texture_transfer_map) and the sctx->dma_copy
fallback code.

Fixes: 19db1a540c ("radeonsi: add a workaround to fix KHR-GL45.texture_view.view_classes on gfx9")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6115>
2020-08-05 19:45:32 +00:00
Indrajit Kumar Das
caa98246a0 st/mesa: optimize DEPTH_STENCIL copies using fragment shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6088>
2020-08-05 19:25:14 +00:00
Rob Clark
141b295311 freedreno: allow fence_fd fences to be recycled
This allows us to avoid a no-op flush if there has been no rendering,
but we hit pctx->flush(PIPE_FLUSH_FENCE_FD).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6177>
2020-08-05 19:05:29 +00:00
Marek Olšák
07a49bf597 radeonsi: disable SDMA on gfx9
Fixes: 9680a75489 "radeonsi/gfx9: enable SDMA buffer copying & clearing"
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4895>
2020-08-05 18:48:35 +00:00
Kristian H. Kristensen
879444a957 ci: Add a build test for the Android platform
This builds the EGL loader and the freedreno, intel and amd vulkan
drivers.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:07 +00:00
Kristian H. Kristensen
db504c464f radv/android: Remove unused variable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:07 +00:00
Kristian H. Kristensen
a7fe711a30 vulkan: Allow global symbol HMI for Android
Android looks for this symbol when loading HAL modules.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:07 +00:00
Kristian H. Kristensen
6b3f56f099 anv: Add stub for anv_gem_get_tiling() for Android
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:07 +00:00
Kristian H. Kristensen
ff0dbf2096 anv: Pass device to setup_gralloc0_usage for error reporting
Otherwise it doesn't compile.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: aba57b11ee ("anv: support GetSwapchainGrallocUsage2ANDROID for Android")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:07 +00:00
Kristian H. Kristensen
5096ebf954 meson: Define ANDROID and ANDROID_API_LEVEL when compiling for Android
Set ANDROID_API_LEVEL based on the value we already have and define
ANDROID to make sure we build code paths that are guarded by that.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:07 +00:00
Kristian H. Kristensen
e05e60b230 turnip: Make tu_android.c compile again
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:07 +00:00
Kristian H. Kristensen
a725899c3f mapi: Mark TLS symbols as optional in glapi-symbols.txt
Presence of these depends on whether or not we're using ELF TLS.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:07 +00:00
Kristian H. Kristensen
932f51d593 ci: Include enough Android headers to let us compile test EGL
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:07 +00:00
Kristian H. Kristensen
5ae7098eba gallium/android: Rewrite backtrace helper for android
The previous implementation kept a hashtable of a Backtrace object per
thread.  debug_backtrace_capture is supposed to store a backtrace in
the passed in debug_stack_frame array, but instead overwrote the
per-thread Backtrace object.

This new version works more like the libunwind based capture. We hash
the file and symbol names and store pointers in the debug_stack_frame
struct.  This way debug_backtrace_capture doesn't overwrite previous
captures or allocate memory that needs to be freed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:06 +00:00
Kristian H. Kristensen
d0d14f3f64 util: Add unit test for stack backtrace caputure
First test never fails, but exercises the code and is useful for
manual inspection.  Second test exposes the android implementation
bug.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:06 +00:00
Kristian H. Kristensen
848e7b947d util: Move stack debug functions to src/util
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:06 +00:00
Kristian H. Kristensen
e487043fd0 gallium: Switch u_debug_stack/symbol.c to util/hash_table.h
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:06 +00:00
Kristian H. Kristensen
e1a58ae7c4 mapi/test: Change type to unsigned for offset
Quiets this warning:

../../master/src/mapi/glapi/tests/check_table.cpp:576:20: error: non-constant-expression cannot be narrowed from type 'unsigned int' to 'int' in initializer list [-Wc++11-narrowing]
   { "glColor3dv", _O(Color3dv) },
                   ^~~~~~~~~~~~

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:06 +00:00
Kristian H. Kristensen
c8749305f2 egl/android: Remove unused variable
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:06 +00:00
James Park
24b80f8bb9 amd/llvm: Reorder LLVM headers
LLVM uses __declspec(restrict) which breaks because Mesa define restrict
as __restrict. Move the LLVM headerse up to dodge the macro.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6180>
2020-08-05 17:15:18 +00:00
Tomeu Vizoso
1541ef636b ci: Use a rootfs tarball for NFS root, instead of a ramdisk (for LAVA)
We anyway depend already on robust network support in the DUTs, and we
can save quite some time this way.

It will also allow us to grow further as we expand coverage.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6114>
2020-08-05 14:09:37 +02:00
Samuel Pitoiset
8fab7d738e radv: set BYPASS_VTX_RATE_COMBINER_GFX103 on GFX 10.3
Based on RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6168>
2020-08-05 12:57:50 +02:00
Samuel Pitoiset
05b09d6549 radv: fix sample shading on GFX 10.3
Based on RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6168>
2020-08-05 12:57:48 +02:00
Samuel Pitoiset
8b3682310c radv: increase minimum NGG vertex count requirement per workgroup on GFX 10.3
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6168>
2020-08-05 12:57:46 +02:00
Samuel Pitoiset
22c8079829 radv: do not honor a user-specified pitch on GFX 10.3
According to RadeonSI, it breaks mipmapping.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6168>
2020-08-05 12:57:44 +02:00
Alejandro Piñeiro
7f25f1f106 nir/lower_tex: handle query lod with nir_lower_tex_packing_16 at lower_tex_packing
packing_16 with floats assumed 1 (shadow) or 4 components. But query
lod operations return 2.

Fixes the following test with v3dv:
dEQP-VK.ycbcr.query.lod.fragment.r8g8b8a8_unorm

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5863>
2020-08-05 10:10:12 +00:00
Rhys Perry
6e2e77557e radv/llvm: enable VK_KHR_memory_model
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6063>
2020-08-05 09:45:54 +00:00
Rhys Perry
4f3630b36a ac/nir: fix coherent global loads/stores
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6063>
2020-08-05 09:45:54 +00:00
Rhys Perry
4640e7da04 ac/nir: consider an image load/store intrinsic's access
ACCESS_COHERENT may be set for a specific load/store in the case of
atomic loads/stores.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6063>
2020-08-05 09:45:54 +00:00
Rhys Perry
da38e99eda radv/aco: enable VK_KHR_memory_model
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6063>
2020-08-05 09:45:54 +00:00
Rhys Perry
389c95a889 spirv: set ACCESS_COHERENT for ssbo/global/image atomic load/store
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6063>
2020-08-05 09:45:54 +00:00
Iago Toral Quiroga
71572ebb32 nir/lower_tex: skip lower_tex_packing for the texture samples query
Similar to other skips for texture queries that don't actually sample
the texture and which results are not packed.

We can't use nir_tex_instr_is_query() here to skip the lowering for all
queries since that causes regressions in Piglit. Apparently, we do want
to lower some of the query results. In particularly, the LOD query.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6169>
2020-08-05 08:39:52 +02:00
Eric Anholt
1938e2596f freedreno/computerator: Set SP_MODE_CONTROL to the same value as vulkan/GL
This gets us consistent hcN access with our drivers, for experimenting.
We don't know what the other bit does yet, but let's not have to debug
that later.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6179>
2020-08-05 04:35:05 +00:00
Eric Anholt
c92ae9d3ef freedreno/a6xx: Document the bit for the magic 32bit-uniforms-as-16b mode.
Trying to figure out how uniforms were working, I found that computerator
had different behavior from our GL fragment shaders.  Given that 3xx had
an SP_ bit for this (thanks flto@ for the note), it was a matter of
pasting bits of SP_* setup into computerator until I got the GL behavior.
I named it the same as the a3xx register.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6179>
2020-08-05 04:35:05 +00:00
Eric Anholt
db25c18f33 freedreno/ir3: Fix the type of half-float indirect uniform loads.
We would be making a MOV from a u32, when we should be loading from a
16-bit value.  This likely didn't bite us because we only do mediump in FS
and CS so far, and indirect uniforms are usually in a VS (and usually
highp).

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6179>
2020-08-05 04:35:05 +00:00
Eric Anholt
13b3c401a4 nir: Print the constant data size associated with a shader.
We should probably dump the constants, too, but this is useful to me for
now.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6179>
2020-08-05 04:35:05 +00:00
Eric Anholt
041bae28c6 nir: Add a little more docs about NIR's constant_data.
I think everyone trips over "how does this relate to nir_const", and I was
curious if I could redefine the units of the constant_data_size / indirect
offsets.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6179>
2020-08-05 04:35:05 +00:00
Eric Anholt
2e833b16bc nir/lower_amul: Use num_ubos/ssbos instead of recomputing it.
Now that num_ubos is correctly maintained, we can just trust it.  Fixes an
assertion failure in freedreno I triggered on
dEQP-GLES31.functional.ubo.random.all_per_block_buffers.1 for reasons I
don't really understand.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6179>
2020-08-05 04:35:05 +00:00
Kristian H. Kristensen
add2b44ab6 turnip: Only include msm_drm in tu_drm.c
We copy the definition for struct drm_msm_gem_submit_bo and flags to
keep the bo list code working for now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5999>
2020-08-05 01:19:22 +00:00
Kristian H. Kristensen
4b9c0cd821 turnip: Move remaining drm code to tu_drm.c
This moves the semaphore implementation and tu_QueueSubmit to
tu_drm.c, such that that's the only file including xf86drm.h and
msm_drm.h.  This way, the entire kernel interface is contained in
tu_drm.c

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5999>
2020-08-05 01:19:22 +00:00
Kristian H. Kristensen
7dfeae1a45 turnip: Collapse some tu_drm wrappers
These are all internal to tu_drm.c, we can skip a couple of
abstraction layers now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5999>
2020-08-05 01:19:22 +00:00
Kristian H. Kristensen
59e5f95bdc turnip: Move tu_bo functions to tu_drm.c
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5999>
2020-08-05 01:19:22 +00:00
Kristian H. Kristensen
270599cc1e turnip: Move device enumeration and feature discovery to tu_drm.c
These steps are all drm specific.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5999>
2020-08-05 01:19:22 +00:00
Iván Briano
d33f46e08b anv: fix allocation of custom border color pool
Turns out that respecting the order of parameters is important.

Reported-by: Michael Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 5425968d2e ("anv: Implement VK_EXT_custom_border_color")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6175>
2020-08-04 15:30:33 -07:00
Rhys Perry
fea3e498c3 aco: replace MADs in isel with FMA on GFX10.3
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>
2020-08-04 20:39:33 +01:00
Rhys Perry
41c901b7df aco: disable SMEM stores on GFX10.3
These are removed in GFX10.3

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>
2020-08-04 20:39:33 +01:00
Rhys Perry
b811b1d083 aco: update aco_opcodes.py for GFX10.3
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>
2020-08-04 20:39:33 +01:00
Rhys Perry
07250a92da aco: implement subgroup shader_clock on GFX10.3
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>
2020-08-04 20:39:33 +01:00
Rhys Perry
a5303a3cbe aco: update vgpr_alloc_granule for GFX10.3
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>
2020-08-04 20:39:33 +01:00
Rhys Perry
37988b5b8e aco: fix max_waves_per_simd on Polaris, VegaM and GFX10.3
fossil-db (Polaris):
Totals from 20263 (14.75% of 137414) affected shaders:
SGPRs: 871407 -> 871679 (+0.03%); split: -0.00%, +0.03%
VGPRs: 513828 -> 550028 (+7.05%); split: -1.68%, +8.72%
CodeSize: 18869680 -> 18828148 (-0.22%); split: -0.23%, +0.01%
MaxWaves: 162012 -> 162030 (+0.01%); split: +0.01%, -0.00%
Instrs: 3629172 -> 3618817 (-0.29%); split: -0.30%, +0.02%
Cycles: 15682244 -> 15638244 (-0.28%); split: -0.30%, +0.02%
VMEM: 10675942 -> 10673344 (-0.02%); split: +0.18%, -0.21%
SMEM: 1209717 -> 1206088 (-0.30%); split: +0.03%, -0.33%
VClause: 81780 -> 81227 (-0.68%); split: -0.73%, +0.06%
SClause: 231724 -> 231561 (-0.07%); split: -0.07%, +0.00%
Copies: 187126 -> 180831 (-3.36%); split: -3.62%, +0.26%
Branches: 26841 -> 26837 (-0.01%); split: -0.03%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>
2020-08-04 20:39:33 +01:00
Rhys Perry
c68fba9bba aco: update bug workarounds for GFX10_3
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>
2020-08-04 20:39:33 +01:00
Rhys Perry
4f1242a4d8 aco: don't create v_mad_f32 on GFX10.3
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>
2020-08-04 20:39:33 +01:00
Rhys Perry
5718f7c8a7 aco: fix waitcnt insertion on GFX10.3
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>
2020-08-04 20:39:32 +01:00
Alyssa Rosenzweig
b75427cc31 panfrost: Implement EXT_multisampled_render_to_texture
Significantly helps WebGL performance with Chromium's OpenGL ES backend.
Also update docs/features.txt

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6161>
2020-08-04 18:39:24 +00:00
Alyssa Rosenzweig
2c47993b69 panfrost: Add MSAA mode selection field
This field enables MSAA, either writing samples to separate surfaces, to
a single large-bpp surface, or implicitly resolved and to a single
surface.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6161>
2020-08-04 18:39:24 +00:00
Alyssa Rosenzweig
7973b6c1e0 docs/features: Add GL_EXT_multisampled_render_to_texture
Currently only a6xx, panfrost added later in series.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6161>
2020-08-04 18:39:24 +00:00
Samuel Pitoiset
0c569e22d1 radv: print warnings for famous RADV_PERFTEST options that no longer exist
RADV_PERFTEST=aco no longer exists, ACO is the default compiler.
RADV_PERFTEST=llvm is deprecated, use RADV_DEBUG=llvm instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5662>
2020-08-04 19:09:57 +02:00
SureshGuttula
65d23e7fb1 radeon/vcn: Corrected vp9 ref associated data incase of target->codec is NULL
This patch fixes the case where less number of reference surfaces created and destoyed
on need basis. The problem comes when we are refereing old assoiciated data for newly
created target buffer with same address. Here old target buffer destroyed as that
surface is no more used as reference for next frames and when we create a new surface
for the next frame to process we will get the surfaceid and same target address
of destroyed surface.

When new surface/surface->buffer/target ,target->codec is null as we cleared when we
destroy this surface, but per ref_mapping logic, it was taking null associated data
i.e.0 as curr_ref_idx. Hence total reference mapping table goes wrong with wrong data.
Beacuse of this, we have seen corrupted vp9 decoded frames.

Signed-off-by: SureshGuttula <suresh.guttula@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5452>
2020-08-04 17:01:20 +00:00
Caio Marcelo de Oliveira Filho
b98dd70489 spirv: Propagate explicit layout only in types that need it
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5511>
2020-08-04 07:53:37 -07:00
Roman Stratiienko
9a9b35a3bb lima: Fix lima_screen_query_dmabuf_modifiers()
Incorrect implementation has been found during code surfing.
v3d implementation used for reference.

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6076>
2020-08-04 13:58:33 +00:00
Connor Abbott
ee2c58dde4 tu: Implement VK_EXT_conditional_rendering
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6009>
2020-08-04 15:38:17 +02:00
Connor Abbott
f226b198f5 tu: Reset has_tess after renderpass
Don't force sysmem for render passes after the one that uses
tessellation.

Also, move this into tu_cmd_state as that's where it belongs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6009>
2020-08-04 15:37:51 +02:00
Connor Abbott
06332ef60e freedreno: Document draw predication packets
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6009>
2020-08-04 15:37:51 +02:00
Connor Abbott
9e48e31fa5 tu: Fix DST_INCOHERENT_FLUSH copy/paste error
This was meant to handle incoherent accesses by always flushing them,
but it accidentally checked for the coherent variant instead. As a
result e.g. a vkCmdClearImage() followed by a renderpass using the image
didn't get any flushes, resulting in the same sort of corruption seen
with sysmem renderpass clears. This happened to be exposed via some
tests that used multiview.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6009>
2020-08-04 15:37:51 +02:00
Jonathan Marek
95db96d75b turnip: implement VK_EXT_4444_formats
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6164>
2020-08-04 13:15:23 +00:00
Jonathan Marek
036ff53143 util/format: translate A4R4G4B4_UNORM and A4B4G4R4_UNORM vulkan formats
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6164>
2020-08-04 13:15:23 +00:00
Jonathan Marek
35f8f355f3 turnip: rework extended formats to allow more extended formats
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6164>
2020-08-04 13:15:23 +00:00
Tomeu Vizoso
0b2478381f ci: Actually upload trace artifacts to MinIO for baremetal
Baremetal jobs filter the variables they get from .gitlab-ci.yml, and
TRACIE_UPLOAD_TO_MINIO and others weren't being let through.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Fixes: d4ca45eca2 ("ci: Upload traces' reference and actual images to MinIO")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6171>
2020-08-04 12:58:56 +00:00
Jonathan Marek
67b1163f9f turnip: add support for D32_SFLOAT_S8_UINT
Add support for D32_SFLOAT_S8_UINT, which requires special handling because
it is actually two images.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5537>
2020-08-04 11:40:18 +00:00
Tomeu Vizoso
a133f7d288 ci: Remove kernel module build that slipped in
Some changes unintendedly slipped into an unrelated commit before it was
merged.

This caused kernel modules to be built and installed in the ramdisk,
which caused some devices to fail to boot due to the ramdisk size limit
being surpassed.

These changes weren't in effect until a subsequent commit triggered a
rebuild of the ramdisks.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Fixes: a9560939e0 ("ci: Build-test Panfrost tools")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6167>
2020-08-04 12:57:31 +02:00
Tomeu Vizoso
7633037441 ci: Download traces from MinIO in baremetal runs
Now that we have MinIO, we can distribute traces better than by direct
downloads from git.

With a caching MinIO instance local to the DUT, total run times should
be noticeably impacted.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6136>
2020-08-04 08:18:55 +02:00
Tomeu Vizoso
d4ca45eca2 ci: Upload traces' reference and actual images to MinIO
Now that the devices have sane dates, we can upload to MinIO.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6136>
2020-08-04 08:18:51 +02:00
Jason Ekstrand
4816f6f8d8 spirv: Do more complex unwrapping in get_nir_type
The OpenGL flavor of SPIR-V allows for samplers inside structs.  This
means that our simple array-of-array handling isn't sufficient and we
need something substantially more complex for generating NIR types.

Fixes: 14a12b771d "spirv: Rework our handling of images and samplers"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6065>
2020-08-04 03:05:34 +00:00
Jason Ekstrand
140a5492e0 compiler/types: Add a struct_type_is_packed wrapper
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6065>
2020-08-04 03:05:34 +00:00
Eric Anholt
66d8bbd822 freedreno: Fix "Offset of packed bitfield changed" warnings:
Example:

../src/freedreno/ir2/instr-a2xx.h:384:1: note: offset of packed bit-field
‘const_index’ has changed in GCC 4.4
  384 | } instr_fetch_vtx_t;

It's apparently due to bitfields that would cross the width of their type.
Just expand the types of the affected fields so that the compiler quiets
down.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6165>
2020-08-03 23:28:49 +00:00
Jonathan Marek
ba6cdb275c turnip: delete tu_clear_sysmem_attachments_2d
2D path is using the same hardware as the 3D path, with the advantage of
separate register state, but here it requires WFI and extra cache flushing
and invalidating, so it should be better to just use the 3D path. There are
also some cases where the 3D path would be much faster, since it can clear
multiple attachments at once.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5775>
2020-08-03 22:38:22 +00:00
Jonathan Marek
9b6486bd3d turnip: fix sysmem CmdClearAttachments 3D fallback breaking GMEM path flush
It was clearing the flush bits, which are used by both GMEM/SYSMEM paths,
but emitting the flushes inside the cond_exec, where they would only run
for the sysmem path.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5775>
2020-08-03 22:38:22 +00:00
Jason Ekstrand
611f654fcf nir/deref: Don't try to compare derefs containing casts
One day, we may want copy_prop_vars or other passes to be able to see
through certain types of casts such as when someone casts a uint64_t to
a uvec2.  However, for now we should just avoid casts all together.

Fixes: d8e3edb784 "nir/deref: Support casts and ptr_as_array in..."
Tested-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6072>
2020-08-03 21:49:25 +00:00
Eric Anholt
ee2f21b10d nir: Remove the old nir_opt_shrink_load.
The old pass only handled intrinsic load_constant, while the new
nir_opt_shrink_vectors handles ALU ops, nir load_consts, along with all
the load intrinsics.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6050>
2020-08-03 21:26:45 +00:00
Eric Anholt
d8c2f896db amd: Swap from nir_opt_shrink_load() to nir_opt_shrink_vectors().
This should do much more trimming than shrink_load, and is a win on i965's
vec4 and nir-to-tgsi.  For scalar backends like this that don't need ALU
shrinking, it still gets more load intrinsics covered.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6050>
2020-08-03 21:26:45 +00:00
Eric Anholt
023e6669cc i965: Enable vector shrinking in the vec4 backend.
This manages to make some extra vec operations that would turn into movs
go away.

brw shader-db:
total instructions in shared programs: 3895037 -> 3893221 (-0.05%)
total cycles in shared programs: 113832759 -> 113792154 (-0.04%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6050>
2020-08-03 21:26:45 +00:00
Eric Anholt
1c9906d5ff nir: Add a pass to cut the trailing ends of vectors.
Ideally we'd also handle unused middles of vectors and reswizzle ALU-only
uses of it so we could write fewer channels, but that's future work/

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6050>
2020-08-03 21:26:45 +00:00
Jonathan Marek
5afaec3741 turnip: workaround for a630 d24_unorm_s8_uint fails
A630 doesn't have the HW format we use to sample stencil, so it needs a
workaround. It also has a bug around the AS_R8G8B8A8 format, which doesn't
work when UBWC is disabled, so use 8_8_8_8_UNORM instead when UBWC is
disabled (using AS_R8G8B8A8 or 8_8_8_8_UNORM should only matter with UBWC)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5438>
2020-08-03 21:07:30 +00:00
Christian Gmeiner
6fc52739bb etnaviv: fix nir validation problem
Fixes the following validation problem:
  error: nir_intrinsic_align_offset(instr) < nir_intrinsic_align_mul(instr)

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Lukas F. Hartmann <lukas@mntmn.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6127>
2020-08-03 20:05:20 +00:00
Rob Clark
caa107cb8d freedreno/decode: move dependencies up a level
This is mainly for the benefit of automated syncing of changes from mesa
back to envytools, where the same subdir meson.build's are used, but the
toplevel meson.build is different.  In the envytools case, we want these
depenendencies to be required.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>
2020-08-03 19:46:49 +00:00
Rob Clark
9c33c53898 freedreno/registers: install gzip'd register database
The decode tools aren't too useful to install without the xml.  But
since libxml2 can read compressed xml, we'll gzip them for installation.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>
2020-08-03 19:46:49 +00:00
Rob Clark
62ebd342e6 freedreno/registers: split header build into subdirs
Instead of building the adreno/foo.xml headers from the toplevel, split
out a subdir().  This fits better with how meson likes things to be
structured.  But it does require fixing a bit about how gen_header.py
resolves imports, ie. it cannot assume the src file is at the root of
the $RNN_PATH.

This is needed for the next patch, to add support for installing the
register database for use with installed tools.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>
2020-08-03 19:46:49 +00:00
Rob Clark
e59b241213 freedreno/registers: add .gitignore
Testing headergen2 will create .xml.h in the same location as the .xml.
But we don't want this to get accidentially committed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>
2020-08-03 19:46:49 +00:00
Rob Clark
24f55eb6e8 freedreno/rnn: rework RNN_DEF_PATH construction
No need for rnn_path.h, just construct the whole thing in meson and pass
via c_args.  Also move where the path is constructed up one level.  This
will be needed for syncing back to envytools, where the path will be
different.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>
2020-08-03 19:46:49 +00:00
Rob Clark
bf425b7e51 freedreno/rnn: also look for .xml.gz
libxml2 can load gzip compressed files, so lets look for these too.
This will be useful for installing the register database so that an
installed cffdump/crashdec can use them.  But it isn't too useful
to be able to edit the installed register database, so we can gzip
them to use less disk space.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>
2020-08-03 19:46:49 +00:00
Joshua Ashton
8efdd388e0 radv: Implement VK_EXT_4444_formats
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6160>
2020-08-03 19:27:37 +01:00
Jason Ekstrand
3c2a1af660 anv: Implement VK_EXT_4444_formats
We only support the ARGB format, not the ABGR one.  Fortunately, the
ARGB is the one required by D3D11.

Reviewed-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6158>
2020-08-03 17:50:03 +00:00
Jason Ekstrand
b44139ef36 vulkan: Update Vulkan XML and headers to 1.2.149
Reviewed-by Joshua Ashton <joshua@froggi.es>

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6158>
2020-08-03 17:50:03 +00:00
Mike Blumenkrantz
070fd2b66f u_prim_restart: add inline function for getting restart index based on index size
handy to have this available for drivers to reuse

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6147>
2020-08-03 16:58:48 +00:00
Nanley Chery
1f24c54458 iris: Zero the add-on clear color BO on import
When iris imports an I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS surface, it
allocates a buffer to hold the indirect clear color. When the import is
complete, iris_resource::aux::clear_color is set to zero but the
indirect buffer is filled with garbage values. This could break certain
texture view use-cases, so zero the allocated buffer to fix those.

Fixes: c19492bcdb ("iris: Handle importing aux-enabled surfaces on TGL")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6092>
2020-08-03 16:24:16 +00:00
Tomeu Vizoso
a9560939e0 ci: Build-test Panfrost tools
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3348
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6157>
2020-08-03 17:43:51 +02:00
Mike Blumenkrantz
cd1c21f8e5 zink: implement handling for VK_EXT_calibrated_timestamps
just the extension setup; we need this to handle device timestamp
queries outside of batches

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5913>
2020-08-03 14:22:39 +00:00
Mike Blumenkrantz
8930b19676 zink: store valid timestamp bits onto zink_screen
we need this for converting timestamp ticks to nonoseconds

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5913>
2020-08-03 14:22:39 +00:00
Mike Blumenkrantz
3e6366be68 zink: handle VK_EXT_vertex_attribute_divisor setup
this just enables the extension

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5913>
2020-08-03 14:22:39 +00:00
Mike Blumenkrantz
99b44536bf zink: clamp PIPE_SHADER_CAP_MAX_SHADER_BUFFERS to PIPE_MAX_SHADER_BUFFERS
this value gets split between ssbos and abos, so clamping to 8 here causes
a number of tests to fail just because there's not enough buffers available

other gallium drivers return 32 here, so this seems pretty safe

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5913>
2020-08-03 14:22:39 +00:00
Mike Blumenkrantz
01d6220cff zink: implement VK_EXT_robustness2
this adds support for null descriptors, which is necessary for full
compliance with ARB_texture_buffer_object

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5913>
2020-08-03 14:22:39 +00:00
Alyssa Rosenzweig
b2f475251e pan/mdg: Test for SSA before chasing addresses
It's possible an SSA value depends on a register; in this case, chasing
the source would result in a crash as the chase helper in NIR asserts
is_ssa. Instead we should check a priori that all the argments are in
fact SSA, bailing otherwise.

In the piglit shader exhibiting this bug (by looping over the index),
bailing on the ishl instruction is -necessary-. This is not merely us
being cowardly to avoid seeing through the registers; indeed, if we
wrote away the ishl instruction, the shift itself would have to be
stored in a load/store register (r26/r27) which would preclude reading
it in the loop, creating a register allocation failure later in the
compile. So this is the correct solution due to the restricted
semantics.

Closes #3286

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Icecream95 <ixn@keemail.me>
Fixes: f5401cb886 ("pan/midgard: Add address analysis framework")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6144>
2020-08-03 09:43:47 -04:00
Alyssa Rosenzweig
b4de9e035a pan/mdg: Mask spills from texture write
This prevents RA failures the results of reading multiple textures that
require less than 4 channels, as seen in a number of GL 3 WebRender shaders.

Closes: #3342

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Icecream95 <ixn@keemail.me>
Tested-by: Icecream95 <ixn@keemail.me>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6144>
2020-08-03 09:43:37 -04:00
jzielins
26dd8f8045 swr: Bump maximum 2D texture size to 16kx16k
This may be required by some applications, even though
not all texture formats will be below 2GB limit.

This change also increases the maximum size of render target,
that was inadvertently lowered some time ago.

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6139>
2020-08-03 13:46:51 +02:00
Bas Nieuwenhuizen
99cf910834 mesa/st: Actually free the driver part of memory objects on destruction.
_mesa_delete_memory_object(ctx, obj) == free(obj) but doesn't free the
part of the gallium driver.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1206
Fixes: 49f4ecc677 "mesa/st: start adding memory object support"
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6148>
2020-08-03 10:33:00 +00:00
Gert Wollny
63bff6a9f8 gallivm/nir: Lower uniforms to UBOs in llvm draw if the driver didn't request this already
When the llvm draw engine is used for draw shaders in st_program the driver
may not enable the cap PIPE_CAP_PACKED_UNIFORMS, so uniforms are not
be lowered to UBOs. However, llvm doesn't support nir_load_uniform, so lower
the uniforms to UBO now. The multiplier is set to 16 to be the same like in
the TGSI code path.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5681>
2020-08-03 06:43:34 +02:00
Mauro Rossi
b54afde3ad android: freedreno: move a2xx disasm out of gallium
Fixes the following building errors:

clang: error: no such file or directory: 'external/mesa/src/gallium/drivers/freedreno/a2xx/disasm-a2xx.c'
clang: error: no input files

FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
ld.lld: error: undefined symbol: disasm_a2xx
>>> referenced by ir2_assemble.c:546 (external/mesa/src/gallium/drivers/freedreno/a2xx/ir2_assemble.c:546)
>>>               ir2_assemble.o:(assemble) in archive out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_freedreno_intermediates/libmesa_pipe_freedreno.a
clang-9: error: linker command failed with exit code 1 (use -v to see invocation)

Fixes: f39afda1a7 ("freedreno: move a2xx disasm out of gallium")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6151>
2020-08-02 21:40:21 +02:00
Mauro Rossi
ca114e6273 android: freedreno/common: add support for libfreedreno_common static
Porting of meson build rules to Android

Fixes: 9623debf48 ("freedreno: Centralize UUID generation into new files freedreno_uuid.c/h")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6151>
2020-08-02 21:40:21 +02:00
Mauro Rossi
f065ec43ab android: freedreno/ir3: fix include paths
Fixes the following building error:

external/mesa/src/freedreno/ir3/disasm-a3xx.c:33:10: fatal error: 'disasm.h' file not found
#include "disasm.h"
         ^~~~~~~~~~
1 error generated.

Fixes: f7bd3456d7 ("freedreno: deduplicate a3xx+ disasm")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6151>
2020-08-02 21:40:21 +02:00
Mauro Rossi
711c30b764 android: freedreno/registers: fix generated headers rules
Fixes the following building errors:

FAILED: ninja: 'external/mesa/src/freedreno/registers/a2xx.xml',
needed by 'out/target/product/x86_64/gen/STATIC_LIBRARIES/libfreedreno_registers_intermediates/registers/a2xx.xml.h',
missing and no known rule to make it
...
FAILED: ninja: 'external/mesa/src/freedreno/registers/adreno-pm4-pack.xml.h',
needed by 'out/target/product/x86_64/gen/STATIC_LIBRARIES/libfreedreno_registers_intermediates/registers/adreno-pm4-pack.xml.h',
missing and no known rule to make it

Fixes: b721d336da ("freedreno: slurp in rnndb")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6151>
2020-08-02 21:40:21 +02:00
Tapani Pälli
32e0f7e097 anv: toggle on VK_EXT_extended_dynamic_state
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
b9a05447a1 anv: dynamic vertex input binding stride and size support
If pStrides or Psizes are NULL we should use the values defined by the
pipeline.

v2: fix commit message and fix the code to set explicitly if we are
    using dynamic stride/size

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
e4590c0750 anv: depth/stencil dynamic state support
v2: code cleanup, remove extra spaces (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
f6fa4a8000 anv: add support for dynamic primitive topology change
This is done using 3DSTATE_VF_TOPOLOGY packet that overrides topology
used in subsequent 3DPRIMITIVE commands. For gen7[5] we override the
pipeline topology when emitting draw commands.

v2: fix the way gen7[5] is handled (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
f426663f9c anv: add support for dynamic viewport and scissor with count
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
9220598b36 anv: add support for dynamic cull mode and winding order
v2: cleanup, white space issues (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
c34d8ac26e anv: handle dynamic viewport count
Emit 3DSTATE_CLIP during cmd_buffer_flush_state so that we can change
the max viewport count dynamically.

v2: use one common clip state as size is the same for all gens (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
11f3fb9a4e anv: consider dynamic state when creating pipeline
Leave default state values as zero so that when we OR them later
it is only the dynamic state value that matters.

v2: code cleanup + skip topology emit in base batch
    when topology is dynamic (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
65de778e0b anv: add new dynamic states
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
2260ce6d0c anv: add VK_EXT_extended_dynamic_state but leave it disabled
This is needed to ensure the function prototypes are declared.

v2: tweak commit message (Jason)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Eric Engestrom
a4181fcd42 meson: fix -D xlib-lease=auto detection
This is used by Vulkan, not EGL, and depends on having DRM/KMS, not GBM.

Reported-by: Oschowa <oschowa@web.de>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3346
Fixes: e00adef34a ("egl: automatically compile the `drm` platform when available")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6150>
2020-08-02 16:23:47 +00:00
Eric Engestrom
c1476044b5 egl: consistently use dri2_egl_display() helper macro
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6133>
2020-08-02 01:13:48 +02:00
Connor Abbott
27eea627ef freedreno/afuc: Fix PM4 enum parsing
We were open-coding it, and getting variant parsing wrong for things
like "A4XX-" which don't explicitly include the version being
disassembled. Use the rnn function instead. This makes CP_INDIRECT show
up again. Also propagate const-ness to users.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6140>
2020-08-01 17:51:01 +00:00
Connor Abbott
a5daaed587 freedreno/afuc: Add missing rnn_prepdb()
It's totally not obvious, but this runs extra error checking and is
necessary for correct variant handling, and variant handling will
silently not work if it's not enabled. Add it asm.c even though it's not
strictly necessary, to prevent anyone from missing this in the future.

Missing this really should be an error.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6140>
2020-08-01 17:51:01 +00:00
Connor Abbott
8d0e5e0626 freedreno/cffdec: Stop open-coding enum parsing
Now that rnndec_decode_enum() has been fixed, it does the same thing as
this function.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6140>
2020-08-01 17:51:01 +00:00
Connor Abbott
73241ca53e freedreno/rnn: Make rnn_decode_enum() respect variants
We'll need this for afuc, and we're currently also open-coding the same
thing in rnnutils. It seems this function was added to decode pm4 packet
names, but it currently has no users, so make it useful for what it
was intended to do.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6140>
2020-08-01 17:51:01 +00:00
Eric Engestrom
b67695d597 egl/haiku: drop overwritten preset of EGL version
`init_haiku()` is called by `eglInitialize()`, which then calls
`_eglComputeVersion()` (without even anything in between). The latter
sets the EGL version based on the extensions supported, and since Haiku
doesn't support any it will end up overwriting the same `1.4` value.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6131>
2020-08-01 17:31:33 +00:00
Eric Engestrom
9c6fa9421d egl: const _eglDriver
Converted using `s/_EGLDriver/const _EGLDriver/g` and dropped a couple
of irrelevant changes in comments, in the `_EGL_DRIVER_TYPECAST()` macro
and the typedef itself.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6129>
2020-08-01 17:12:20 +00:00
Lepton Wu
81c0e2ab63 egl: Allow software rendering for vgem/virtio_gpu in platform_device
Then user could explicitly choose the underlying device for software
rendering when both vgem/virtio_vga are there.

Signed-off-by: Lepton Wu <lepton@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5830>
2020-08-01 10:07:25 +00:00
Matt Turner
eaf27eb512 intel/tools: Test notification subregisters
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
ac7ecd205b intel/tools: Simplify notification register handling
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
63181df09b intel/tools: Don't hardcode notification register
Previously we parsed a src non-terminal but did nothing with it. Since
the WAIT instruction is kind of weird, in that you have to give it the
same notification subregister for both destination and source, and it
always has an exec size of 1, let's parse a destination instead of a
source. This way, we can parse a writemask rather than a swizzle in
align16 mode, and easily convert the writemask to a swizzle to create
the source register.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
90c18ec8db intel/tools: Manually set ARF register file/nr/subnr
brw_reg::subnr is in bytes, like the subnr field in the instruction
word, but we disassemble the subregister number in units of the type.
For example g0.3<1>F would have a subnr=12.

These non-terminals produce a brw_reg and feed into other non-terminals
that call brw_reg(), where they are passed the subnr that we set here.
brw_reg()'s subnr parameter is expected to be in terms of the register
type, and it is multiplied by the type size to calculate the subnr in
bytes.

In these non-terminals, we don't know the register type yet, so we
must store the subregister number as it was given to us in the .subnr
field and let the brw_reg() constructor handle the conversion to the
canonical byte-based subnr form when it knows the type.

Before this patch, subregister numbers applied to these registers would
be multiplied with the type size twice.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
af6d6f5c43 intel/tools: Pass integers, not enums, to stride()
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
c883c482be intel/compiler: Relax SENDS regioning assertions
The next commit fixes a mistake in the assembler and ends up running
afoul of this assertion.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
363e5ef5a5 intel/tools: Simplify dstregion
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
3d9c673c0f intel/tools: Simplify immediate handling
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
59801f07e7 intel/tools: Make writemask an integer
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
e115c499da intel/tools: Make swizzle an integer
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
3e1602cc4f intel/tools: Simplify register type handling
Produce a brw_reg_type rather than a whole brw_reg and rename a few
non-terminals.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
2851c218e2 intel/tools: Don't allow empty type specifier
It's preferable to require an explicit type.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
6809b93411 intel/tools: Remove stray newline
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
fdfbb1ed26 intel/tools: Fix typos
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Alyssa Rosenzweig
2dec9092be pan/bit: Remove BI_SHIFT stub
Fixes compile error with -Dtools=panfrost

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 946ff9b439 ("bifrost: Add support for nir_op_ishl")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6142>
2020-07-31 10:15:00 -04:00
Alyssa Rosenzweig
aa989aed6d pan/bit: Update f32->f16 convert test
Needs a second argument to be consistent with the real IR and the
hardware instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 8a4efe2d73 ("pan/bi: Pack second argument of F32_TO_F16")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6142>
2020-07-31 10:14:59 -04:00
Tomeu Vizoso
cf8a8b764e ci: Set date in LAVA DUTs from NTP servers
The MinIO server is sometimes complaining about the submitted date being
too off.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6135>
2020-07-31 14:14:38 +02:00
Eric Anholt
7f40db42a2 docs: Explain how to set up a personal gitlab runner.
I'm not the only one doing it, so document it, especially since there's a
new trick as of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5669

Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5988>
2020-07-31 09:17:02 +00:00
Connor Abbott
8e626879dd freedreno/a6xx: Fix CP_BIN_SIZE_ADDRESS name
Also document some other registers gleaned from looking at the context
switch save/restore routines and fix CP_SDS_REM_SIZE, and make the names
line up with the CP perfcntr names. Note that the CP reads the draw
stream size in CP_SET_BIN_DATA5 using MEM_READ_ADDR, which is probably
why this was mistaken for the draw stream size address.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6123>
2020-07-31 07:44:02 +00:00
David Stevens
6c11a7994d i965/i915: Add colorspace support to YUV sampling
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6122>
2020-07-31 07:27:03 +00:00
David Stevens
d8fdb8dab4 nir: Add colorspace support to YUV lowering pass
This change adds support for BT709 and BT2020 colorspace to the YUV
lowering pass. The default remains BT601.

This change also fixes minor imprecision in the last digits of the BT601
offsets due to computation from rounded values when the math was
simplified.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6122>
2020-07-31 07:27:03 +00:00
Mike Blumenkrantz
f3509c0766 zink: add extension loading framework for spirv builder
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5969>
2020-07-31 06:53:01 +00:00
Italo Nicola
a91011c9ec pan/mdg: emit REGISTER_UNUSED on unused ALU src2
This saves power and time by skipping a roundtrip to the register file.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6128>
2020-07-31 00:25:21 +00:00
Lepton Wu
a2065917cc mapi: Return NULL function pointers for GL_EXT_debug_marker
Mesa returns a stub function pointer to glAnything for years.
Android framework till API level 30 just uses function pointers
returned from eglGetProcAddress without checking if the underlying
extension is supported. If we return stub pointers for functions
in GL_EXT_debug_marker, Android just uses our stub functions instead
of its own stubs and then fail the dEQP. In the past, the issue
didn't show up because mesa only has limited slots and run out of slots
before Android calls eglGetProcAddress on functions inside
GL_EXT_debug_marker.

Signed-off-by: Lepton Wu <lepton@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5652>
2020-07-30 23:45:56 +00:00
Eric Engestrom
258165bed4 egl: drop left-over function prototype
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6037>
2020-07-30 23:24:30 +00:00
Eric Engestrom
ed3f1e04c7 egl: rename _eglMatchDriver() to _eglInitializeDisplay()
... and fix the comment to better reflect what this really does.

The whole "match a driver at runtime" thing has been gone for years.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6037>
2020-07-30 23:24:30 +00:00
Eric Engestrom
6d6b82a159 egl: inline _eglMatchAndInitialize() and refactor _eglMatchDriver()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6037>
2020-07-30 23:24:30 +00:00
Eric Engestrom
a77050c034 egl: fix _eglMatchDriver() return type
The one caller only ever checks if the return value is NULL or not, so
let's simplify the function by only returning that information.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6037>
2020-07-30 23:24:30 +00:00
Eric Engestrom
f91851e615 egl: drop unnecessary _eglGetDriver()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6037>
2020-07-30 23:24:30 +00:00
Eric Engestrom
d24e3ea8cb egl: replace _eglInitDriver() with a simple variable
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6037>
2020-07-30 23:24:30 +00:00
Italo Nicola
3d4deb659e pan/mdg: remove ins->br_compact and ins->branch_extended
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
8150c1d632 pan/mdg: defer branch packing
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
140185eb04 pan/mdg: refactor emit_alu_bundle
This refactor prepares emit_alu_bundle() for the next commit that
reconstructs branch instructions right before emission.
It also simplifies the code since the previous control flow was only
better when we had the prepacked fields in midgard_instruction.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
0f0f9ee710 pan/mdg: remove ins->alu
This commit removes the `ins->alu` field from midgard_instruction,
simplifying the code by just recreating midgard_vector_alu later when we
have to emit it.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
5299239c2e pan/mdg: externalize mir_pack_mod
midgard_print.c requires mir_pack_mod to remove references to ins->alu.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
1a4d165683 pan/mdg: defer register packing
This commit moves the packing of registers and other things from
install_registers_instr() to midgard_emit.c, right before emitting the
binary.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
bea6a652db pan/mdg: eliminate references to ins->load_store.op
This commit makes `ins->op` the correct field to use with load_store
instructions.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
92c808cd47 pan/mdg: eliminate references to ins->texture.op
This commit makes the `ins->op` the correct field to use with texture
instructions.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
83592de7ad pan/mdg: apply float outmods to textures
Texture instructions in midgard support float outmods, this commit makes
it so these instructions are emitted when the conditions are met.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
5011373e2b pan/mdg: eliminate references to ins->alu.outmod
In an effort to simplify MIR by not prepacking instructions, this commit
removes references to `ins->alu.outmod` so that we can later remove the
`ins->alu` field from midgard_instruction.
Every place that was using `ins->alu.outmod` was changed to now use the
generic `ins->outmod` field instead.
We then reconstruct the outmod field right before emission.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
f34815c6be pan/mdg: fix comment
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
5f7e0185cd pan/mdg: eliminate references to ins->alu.reg_mode
In an effort to simplify MIR by not prepacking instructions, this commit
removes references to `ins->alu.reg_mode` so that we can later remove
the `ins->alu` field from midgard_instruction.
Every place that was using reg_mode was changed to now use the generic
`ins->src_type` field instead.
We then reconstruct the reg_mode field right before emission.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
f4c89bf9bd pan/mdg: eliminate references to ins->alu.op
In an effort to simplify MIR by not prepacking instructions, this commit
removes references to `ins->alu.op` so that we can later remove the
`ins->alu` field from midgard_instruction.
Every place that was using ins->op was changed to now use the generic
`ins->op` field instead.
We then reconstruct the `alu.op` field right before emission.
This new field is generic and can contain opcodes for ALU, texture or
load/store instructions. It should be used in conjunction with
`ins->type`, just like the current prepacked `op` field.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
598527f2fe pan/mdg: prepare effective_writemask()
In the next commits we will be removing the `alu` field from
midgard_instruction in order to simplify the code.
effective_writemask() doesn't actually use `alu` for anything, it only
needs to know the opcode.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Italo Nicola
b1b0ce04b3 pan/mdg: fix src_type in instructions that need a implicit zero
We were incorrectly assuming uint32 for src_type[1] regardless of
src_type[0].

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30 22:55:36 +00:00
Eric Anholt
75b1f3d39d drm-shim: Return -EINVAL instead of abort()ing on unknown ioctls.
I had this as abort() in my original implementation since I was doing
drm-shim and my kernel driver in parallel based around using a SW
simulator, and I wanted to always update both, but it means that people's
new feature detection code can easily end up breaing their drm-shim
shader-db runs (such as intel's kernel_has_dynamic_config_support()
checking for -ENOENT instead of -EINVAL for a feature, which showed up on
my personal runner but not fd.o's for reasons I'm unclear on).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5994>
2020-07-30 19:59:20 +00:00
Mike Blumenkrantz
c77a414ec2 u_prim_restart: handle indirect draws
this is pretty gross, but we need to map the indirect buffer to get the
index info and then use that for mapping the index buffer and translating
the restart index

Reviewed-by: Dave Airlie <airlied@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5886>
2020-07-30 19:34:03 +00:00
Roman Stratiienko
a58081f97c panfrost: Android build fixes 2020 week 31
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6109>
2020-07-30 18:21:53 +00:00
Rhys Perry
75a68eee28 aco: optimize swizzled SALU 8/16-bit conversions
We only need one s_bfe for a conversion with a swizzled source.

shader-db (parallel-rdp, Navi):
Totals from 487 (71.30% of 683) affected shaders:
SpillSGPRs: 3284 -> 3233 (-1.55%); split: -2.71%, +1.16%
SpillVGPRs: 2174 -> 2150 (-1.10%); split: -1.24%, +0.14%
CodeSize: 2497864 -> 2445544 (-2.09%); split: -2.11%, +0.01%
Instrs: 450613 -> 445104 (-1.22%); split: -1.27%, +0.05%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5259>
2020-07-30 17:34:51 +00:00
Mauro Rossi
80c135e6a6 radv: fix build on Android 7 (v2)
Fixes the following building error:

external/mesa/src/amd/vulkan/radv_android.c:28:10: fatal error:
'vndk/hardware_buffer.h' file not found
         ^~~~~~~~~~~~~~~~~~~~~~~~

(v2) use the existing preprocessor condition #if ANDROID_API_LEVEL >= 26

Fixes: f36b527 "radv/android: Add android hardware buffer queries."
Reported-and-tested-by: youling 257 <youling257@gmail.com>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6051>
2020-07-30 17:10:31 +00:00
Boris Brezillon
e1b114868a nir: Get rid of __[u]int64_to_fp32() and __fp32_to_[u]int64()
Those are now handled by nir_lower_int64() which has native NIR
implementations.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5588>
2020-07-30 16:54:24 +00:00
Boris Brezillon
025988f818 intel: Set int64_options to ~0 when lowering 64b ops
That's more future proof than setting each bit manually. Looks like we
already miss nir_lower_ufind_msb64 because of that.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5588>
2020-07-30 16:54:24 +00:00
Boris Brezillon
936c58c8fc nir: Extend nir_lower_int64() to support i2f/f2i lowering
That's an attempt at replacing the complex __int64_to_float() and
__float_to_int64() implementations found in float64.glsl by a simpler
native NIR equivalent.

Thanks to that, we can have lower those conversion without having to
compile a GLSL shader, which would be quite annoying for OpenCL
kernels.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5588>
2020-07-30 16:54:24 +00:00
Boris Brezillon
bfee35b45c nir: Stop passing an options arg to nir_lower_int64()
This information is exposed through shader->options->lower_int64_options.
Removing the extra arg forces drivers to initialize this field correctly.

This also allows us to check the int64 lowering options from each int64
lowering helper and decide if we should lower the instructions we
introduce.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5588>
2020-07-30 16:54:24 +00:00
Boris Brezillon
9e23925991 freedreno: Initialize lower_int64_options to a proper value
We're trying to get rid of the options argument passed to
nir_lower_int64() and use the nir_options.lower_int64_options instead.
But before we can do that we must patch nir_lower_int64() callers
that don't have this field properly set.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5588>
2020-07-30 16:54:24 +00:00
Daniel Schürmann
f1f9fdb8a6 aco: add GFX6/7 subdword lowering tests
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3521>
2020-07-30 16:13:08 +00:00
Rhys Perry
000530ea68 aco/tests: add tests for sub-dword swaps
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3521>
2020-07-30 16:13:08 +00:00
Rhys Perry
54394a4d3b ci: enable ACO tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3521>
2020-07-30 16:13:08 +00:00
Rhys Perry
d488d0fd7b aco: add framework for testing isel and integration tests
And add some simple tests to demonstrate/test the pipeline builder and
glsl_scraper.py.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3521>
2020-07-30 16:13:08 +00:00
Rhys Perry
bb7d7755f5 aco: add a few tests for the assembler and optimizer
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3521>
2020-07-30 16:13:08 +00:00
Rhys Perry
e6366f9094 aco: add framework for unit testing
And add some "tests" to test and document currently unused features of the
framework.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3521>
2020-07-30 16:13:08 +00:00
Boris Brezillon
dd155aef44 nir: Allow casts in nir_deref_instr_get[_const]_offset()
Allow casts in a deref chain so we can calculate an offset from
a base pointer dereference or have pointer type casts in the
middle of the chain (both are pretty common in CL).

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5682>
2020-07-30 17:11:43 +02:00
Boris Brezillon
6a1382399c nir: Use a switch in build_deref_offset()/deref_instr_get_const_offset()
We are about to add support for casts when calculating offset, but let's
first turn the if()/else if()/else block into a switch() statement to
ease addition of new cases.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5682>
2020-07-30 17:11:35 +02:00
Tomeu Vizoso
e933ac21cb ci: Generate MinIO credentials within LAVA jobs
As these credentials are valid only for 15 minutes, generate them closer
to when they are going to be used.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6124>
2020-07-30 14:42:15 +02:00
Eric Anholt
cb82274538 ci/bare-metal: Capture the first devcoredump a job produces.
Connor recently ran into an issue where the chezas were hanging where his
GPUs weren't, and was blocked on getting some feedback on what was
happening.  A devcoredump will help non-cheza-having devs debug (or
hopefully with other intermittent fails).

Closes: #3187
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6036>
2020-07-30 11:41:57 +00:00
Tomeu Vizoso
3120b4dcd3 ci: Print URL to image diff when a trace replay fails
Developers can see how the rendering differed from the executed value.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6113>
2020-07-30 13:18:54 +02:00
Tomeu Vizoso
bea34a0853 ci: Upload reference images for traces
After a trace succeeds, check if the rendered image already exists in
the repository of reference images, and upload it if it doesn't.

This image will be used for comparing with failed retraces.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6113>
2020-07-30 13:18:35 +02:00
Marcin Ślusarz
cb19fe24d3 intel/vec4: fix out of bounds read
NIR_MAX_VEC_COMPONENTS was bumped from 4 to 16 in a8ec4082
(2019.03.09, merged 2019.12.21)

float[4] array was added in acd7796a
(2019.06.11, merged 2019.07.11)

Found by Coverity.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3014

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Fixes: a8ec4082a4 ("nir+vtn: vec8+vec16 support")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6067>
2020-07-30 10:41:00 +00:00
Marcin Ślusarz
56228b0393 iris: quiet down static analyzers
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6067>
2020-07-30 10:41:00 +00:00
Marcin Ślusarz
c3a251f254 mesa: quiet down static analyzers
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6067>
2020-07-30 10:41:00 +00:00
Marcin Ślusarz
0906d5d504 mesa: fix out of bounds access in glGetFramebufferParameterivEXT
ColorDrawBuffer is an array of MAX_DRAW_BUFFERS == 8.

Found by Coverity.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Fixes: 7534c536ca ("mesa: add EXT_dsa (Named)Framebuffer functions")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6067>
2020-07-30 10:41:00 +00:00
Marcin Ślusarz
28f2585365 util/format: initialize non-important components to 0
Avoids copying random garbage from the stack.

Found by Coverity.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6067>
2020-07-30 10:41:00 +00:00
Marcin Ślusarz
f13042ec7e util: fix possible buffer overflow in util_get_process_exec_path
Found by Coverity.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6067>
2020-07-30 10:41:00 +00:00
Marcin Ślusarz
59bb0ff945 glsl: catch out of bounds access in the debug version
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6067>
2020-07-30 10:41:00 +00:00
Marcin Ślusarz
eac0ba7fc1 util: fix possible fd leaks in os_socket_listen_abstract
Found by Coverity.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Fixes: ef5266ebd5 ("util/os_socket: Add socket related functions.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6067>
2020-07-30 10:41:00 +00:00
Alejandro Piñeiro
62bfc700f7 vulkan/util: add struct vk_pipeline_cache_header
Header is defined at vkGetPipelineCacheData spec, in any vulkan
version, and anv, tu and radv were using the same struct, and v3dv was
about to do the same.

Defining the same struct four times seemed odd, so let's define on a
common place.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6058>
2020-07-30 11:44:21 +02:00
Rob Clark
b5558f2d2a freedreno/a6xx: fixup draw state earlier
`fixup_draw_state()` was updating `ctx->dirty` after it had already been
copied into the emit struct, which had the result that we were not re-
emitting the rast state when primitive_restart changes.

Fixes: 4d8f42c851 ("freedreno/a6xx: separate rast stateobj for prim restart")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3067
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6117>
2020-07-29 20:22:05 +00:00
Rob Clark
82b419fefd freedreno/a6xx: don't emit a bogus size for empty cb slots
Noticed that asphalt9 had no uniforms bound, so cb[0] is null.  In
theory shouldn't cause a problem, since nothing is doing `ldc` against
cb[0], but to be safe we should use SIZE=0.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6117>
2020-07-29 20:22:05 +00:00
Rob Clark
ba9d502d24 freedreno/ir3: add missing track_ubo_use()
We could lower *some* accesses to a UBO but not others.  In this case,
we would have a valid range, but would have skipped tracking that the
UBO is accessed as a UBO rather than push constants.

Fixes one issue with asphalt9, that was a result of having `ldc` without
having emit UBO state.

See: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3067
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6117>
2020-07-29 20:22:05 +00:00
Frank Binns
d0e32e5f81 egl/dri2: only take a dri2_dpy reference when binding a new context/surfaces
This effectively reverts part of 2907faee, which changed dri2_make_current() to
always take a dri2_dpy reference regardless of whether or not a new context or
surface(s) were being bound. This led to a reference count imbalance as there
was no corresponding code added to drop a reference on the dri2_dpy. As a
consequence, any application that called eglInitialize() on a default/native
display after having called eglTerminate() would always get back the old
dri2_dpy, inheriting its previous state.

As the reference count is there to prevent the dri2_dpy from being destroyed
between eglTerminate() and eglInitialize() calls when a context is still bound,
a reference should only be taken when a successful call to
dri2_dpy->core->bindContext() has been made. Fix the issue by restoring the old
reference counting behaviour.

Fixes: 4e8f95f64d ("egl_dri2: Always unbind old contexts")
Fixes: 2907faee7a ("egl/dri2: try to bind old context if bindContext failed")
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Nicolas Cortes <nicolas.g.cortes@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3328
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6105>
2020-07-29 20:01:14 +00:00
Rob Clark
b9391c1d50 freedreno/decode: cffdec warnings cleanup
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6118>
2020-07-29 19:32:51 +00:00
Rob Clark
20e703b7e6 freedreno/rnn: headergen2 warnings cleanup
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6118>
2020-07-29 19:32:51 +00:00
Kenneth Graunke
128cbcd3a7 iris: Delete shader variants when deleting the API-facing shader
We were space-leaking iris_compiled_shader objects, leaving them around
basically forever - long after the associated iris_uncompiled_shader was
deleted.  Perhaps even more importantly, this left the BO containing the
assembly referenced, meaning those were never reclaimed either.  For
long running applications, this can leak quite a bit of memory.

Now, when freeing iris_uncompiled_shader, we hunt down any associated
iris_compiled_shader objects and pitch those (and their BO) as well.

One issue is that the shader variants can still be bound, because we
haven't done a draw that updates the compiled shaders yet.  This can
cause issues because state changes want to look at the old program to
know what to flag dirty.  It's a bit tricky to get right, so instead
we defer variant deletion until the shaders are properly unbound, by
stashing them on a "dead" list and tidying that each time we try and
delete some shader variants.

This ensures long running programs delete their shaders eventually.

Fixes: ed4ffb9715 ("iris: rework program cache interface")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6075>
2020-07-29 11:34:01 -07:00
Rhys Perry
9a49d4c2db aco: remove isel for GLSL-style barriers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5980>
2020-07-29 17:57:13 +00:00
Rhys Perry
cc3bc9493c radv: use scoped barriers
fossil-db (LLVM, Navi):
Totals from 843 (0.62% of 135820) affected shaders:
SGPRs: 40456 -> 40480 (+0.06%); split: -0.10%, +0.16%
VGPRs: 39648 -> 39688 (+0.10%); split: -0.01%, +0.11%
CodeSize: 2936164 -> 2932508 (-0.12%); split: -0.21%, +0.09%
MaxWaves: 10828 -> 10827 (-0.01%)

fossil-db changes seem to be due to SPIR-V -> NIR emitting a workgroup
scope shared memory barrier instead of a group_memory_barrier.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5980>
2020-07-29 17:57:13 +00:00
Rhys Perry
a8f8c02e7e ac/nir: implement scoped_barrier
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5980>
2020-07-29 17:57:13 +00:00
Rhys Perry
6b99cf6064 nir/load_store_vectorize: fix indentation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5980>
2020-07-29 17:57:13 +00:00
Caio Marcelo de Oliveira Filho
1a42e7dae9 nir: Filter modes of scoped memory barrier in nir_opt_load_store_vectorize
Otherwise a scoped memory barrier containing nir_var_mem_ubo (which
memoryBarrier() does lower to) would incorrectly prevent the
optimization to happen in UBOs.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5980>
2020-07-29 17:57:13 +00:00
Jason Ekstrand
5c5555a862 nir: Add a find_variable_with_[driver_]location helper
We've hand-rolled this loop 10 places and those are just the ones I
found easily.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
fc1363cc60 nir/gl_nir_linker: Call add_vars_with_modes once for GL_PROGRAM_INPUT
Now that nir_foreach_variable_with_modes can handle multiple modes at
one time, we can simplify things a bit and only walk the list once.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
789ec95dcd nir/split_per_member_structs: Inline split_variables_in_list
This lets us do one list walk instead of three.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
d70fff99c5 nir: Use a single list for all shader variables
Instead of having separate lists of variables, roughly sorted by mode,
use a single list for all shader-level NIR variables.  This makes a few
list walks a bit longer here and there but list walks aren't a very
common thing in NIR at all.  On the other hand, it makes a lot of things
like validation, printing, etc. way simpler.  Also, there are a number
of cases where we move variables from inputs/outputs to globals and this
makes it way easier because we no longer have to move them between
lists.  We only have to deal with that if moving them from the shader to
a nir_function_impl.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
473b0fc25d gallium/ttn: Use variable create/add helpers
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
a41a84d362 mesa/ptn: Use nir_variable_create
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
e5536e4a78 aco: Use nir_foreach_variable_with_modes to walk SSBOs
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
a61be312e2 panfrost: Use nir_foreach_variable_with_modes in pan_compile
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
94f0bae4de panfrost/midgard: Make search_var take a nir_shader and mode
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
568022be75 r600/sfn: Use nir_foreach_variable_with_modes in IO vectorization
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
cc51cec9c0 r600/sfn/lower_tex: Get rid of the lower_sampler vector
We can get the result type information easily from nir_tex_instr itself
by looking at dest_type.  There's no reason to construct a vector and
try to index into it.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
929673077c r600/sfn/lower_tess_io: Rework get_tcs_varying_offset
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
e4d812db10 freedreno/ir3_cmdline: Rework i/o variable fixup
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
ce6e59b3d3 lima/standalone: Rework i/o variable fixup
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
52dd84a12e freedreno/ir3_lower_tess: Rework var list helpers
They now take a nir_shader and a nir_variable_mode

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
77c41ce04b nir/gl_nir_linker: Use nir_foreach_variable_with_modes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
c256cd900e nir/lower_variable_initializers: Restrict the modes we lower
This is not a functional change because these are the only modes we
handle.  All others get silently ignored.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
4d7e064623 nir/split_per_member_structs: Use nir_variable_with_modes_safe
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
90cf4709d9 nir/lower_uniforms_to_ubo: Use nir_foreach_variable_with_modes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
d0d5ef6139 nir/lower_two_sided_color: Use nir_variable_create
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
bb3994cfe7 nir/io_to_vector: Use nir_foreach_variable_with_modes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
0a77c67442 nir/lower_io_to_temporaries: Use a separate list for new inputs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
cd66005b23 nir: Use a nir_shader and mode in lower_clip_cull_distance_arrays
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
d5d15c301e nir/lower_amul: Add a variable mode check
This loop should only apply to UBOs and SSBOs because max_slot is never
used for normal uniforms.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
3be0be7d54 nir: Split nir_index_vars into two functions
We also very slightly change the semantics.  It no longer is one index
per list for global variables and is a single index over-all.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
86c9303814 nir/split_vars: Add mode checks to list walks
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
2f6c263cc3 st/nir: Rework fixup_varying_slots
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
4c3a30393d nir/linking: Rework some internal helpers
Instead of taking a variable list, take a nir_shader and mode.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
caab46c1e9 nir: Take a shader and variable mode in nir_assign_io_var_locations
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
964c1c4b87 nir: Take a nir_shader and variable mode in assign_var_locations
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
6f6f7a34c5 nir: Add and use a nir_variable_list_for_mode helper
We also add a new list iterator which takes a modes bitfield and
automatically figures out which list to use.  In the future, this
iterator will work for multiple modes but today it assumes a single mode
thanks to the behavior of nir_variable_list_for_mode.  This also doesn't
work for function_temp variables.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
e3e1c50067 nir: Add a nir_foreach_gl_uniform_variable helper for GL linking
There are a bunch of cases where we really do want to walk the list that
is nir->uniforms because we want all things declared "uniform" in the
GLSL.  Add a helper for this but restrict it to the GL linking code.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
feb32f898c nir: Add a nir_foreach_uniform_variable helper
This one's a bit more complex because it filters off only those
variables with mode == nir_var_uniform.  As such, it's not exactly a
drop-in replacement for nir_foreach_variable(var, &nir->uniforms).

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
92dcda5ce9 nir: Add a nir_foreach_function_temp_variable helper
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:58 +00:00
Jason Ekstrand
2956d53400 nir: Add nir_foreach_shader_in/out_variable helpers
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:57 +00:00
Jason Ekstrand
9bf8572222 nir/dead_variables: Respect the modes passed to remove_dead_vars
For the most part, this doesn't actually matter today.  We already only
call remove_dead_vars on the lists that are specified in the modes.  The
only functional change here is for the uniform, mem_ubo, and mem_ssbo
modes because they share a list.  If nir_remove_dead_variables is called
with a mode of nir_var_uniform, it will no longer remove UBOs or SSBOs,
for instance.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:57 +00:00
Jason Ekstrand
5746af4446 nir: Take a mode in remove_unused_io_vars
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29 17:38:57 +00:00
Frank Binns
fd91744bd4 docs: change "Fixes:" tag example to match git fixes output
The "Fixes:" tag example has the commit title in double quotes, whereas the
suggested git fixes alias, a couple of lines below, also adds some outer
parenthesis.

Although there doesn't appear to be a consistent format for the "Fixes:" tag,
other than it should be a git commit sha followed by the commit title, the
information in the docs should at least be consistent. As the "Fixes:" tag was
inspired by the Linux kernel, which does have parenthesis, update the example to
match the git fixes output.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6106>
2020-07-29 15:25:24 +00:00
Rob Clark
aa89693c02 freedreno/rnn: add schema validation
Now that all the schema validation issues are fixed, enable xml
validation according to stylesheet in rnn.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
3169b8c645 freedreno/rnn: schema updates for dynamic/irregular offsets
Really we want to require one-of offset/offsets/doffsets.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
c537947145 freedreno/registers/mdp5: fix validation error
Empty enums are not allowed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
0586238036 freedreno/rnn: fix use-group
The schema describes the attribute as "ref" rather than "name".  Which
makes more sense.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
14a7ca577f freedreno/rnn: allow name to be optional in arrays
We are using unnamed arrays to describe repeating portions of a pm4
packet.  So allow the name to be optional.  Instead of just using
the empty-string hack, drop the attribute.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
e801069c1e freedreno/rnn: add "addvariant" to schema
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
b0e3ef5a25 freedreno/rnn: describe copyright element in schema
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
09a3a2cfe9 freedreno/registers/adreno_pm4: fix validation errors
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
c61ad1f542 freedreno/registers/a4xx: fix validation error
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
17997d5c5a freedreno/registers/a2xx: fix validation error
And bonus whitespace fix.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
64f1122168 freedreno/rnn: add variants/varset to domain
We have already been using this to describe pm4 packets that are
specific to certain generations.

Maybe we should introduce a new "packet" element type instead.  But
first lets just get validation working with what we already use.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
7b76e5f3a4 freedreno/rnn: relax Hexadecimal to HexOrNumber
We are already using non-hex offsets to describe pm4 packet payloads.
Let's just permit this in the schema, rather than updating all the xml
to use hex.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
cb3ed4600e freedreno/rnn: add radix/align
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
83bc96b555 freedreno/rnn: add high/low/pos to registers
This was added recently in rnn, but the schema was not updated.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
61ae65a73d freedreno/rnn: add relaxed boolean type
In the schema, boolean means strictly "true" or "false".  But rnn
parsing code was looking for "yes"/"1"/"no"/"0".  So split the
difference, and add a relaxed boolean type, and update rnn to also
accept "true" or "false".

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
e3958ef83a freedreno/rnn: update schema for 'pos'
Ideally we'd like to express that *either* 'high' + 'low' OR 'pos' is
required, but it doesn't appear that this is possible.  But the rnn
parsing code should still enforce this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
dfe9746be0 freedreno/rnn: rename schema file
All of the xml references rules-ng.xsd, not rules-ng-ng.xsd

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
5a8d19ca14 freedreno/rnn: add error helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
3a910839ba freedreno/rnn: split out helper to find files
So we can re-use it to locate the schema file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Rob Clark
751af16e1d freedreno/tools: check rnn parse status
Don't silently ignore issues.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6107>
2020-07-29 14:30:35 +00:00
Tomeu Vizoso
6c8b921572 ci: Build kernels and rootfs for x86 devices
For testing Mesa on LAVA devices with the amd64 architecture, build
kernels and rootfs in the same way as we do for arm64 and armhf.

Also add a few trivial jobs for a specific AMD Chromebook.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5903>
2020-07-29 12:41:45 +00:00
Tomeu Vizoso
5d0ba8b183 ci: Split building of libdrm to its own script
As we are doing that in several places already and we'll need to build
in others as well.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5903>
2020-07-29 12:41:45 +00:00
Tomeu Vizoso
8a8afcbe40 ci: Don't ship vk-build-programs after building dEQP
As it's not needed at runtime.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5903>
2020-07-29 12:41:45 +00:00
Tomeu Vizoso
5262cd8be5 ci: Fix URL for glslang
master-tot doesn't have that zip file any more, but the just made
release still does.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5903>
2020-07-29 12:41:45 +00:00
Tomeu Vizoso
745540378c ci: Print load stats after running dEQP
So we can get an idea if what are the bottlenecks when looking for
opportunities to speed things up.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6101>
2020-07-29 14:26:02 +02:00
Tomeu Vizoso
735ad2d211 ci: Always print status code of HTTP uploads in tracie
I'm seeing occasional unexpected 403 errors when uploading artifacts.
Print the response in case MinIO is telling us why.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6101>
2020-07-29 14:25:30 +02:00
Connor Abbott
903a7d0f87 freedreno: Add trace for CP_DRAW_INDIRECT_MULTI
Test the indirect count case. This is recorded with turnip.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6104>
2020-07-29 10:51:28 +00:00
Connor Abbott
85e4305235 freedreno/cffdec: Handle CP_DRAW_INDIRECT_MULTI like other draws
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6104>
2020-07-29 10:51:28 +00:00
Connor Abbott
4b940532fb freedreno/rnn: Support stripes in rnndec_decodereg
We'll need this for finding where INDIRECT/STRIDE are in
CP_DRAW_INDIRECT_MULTI, since they are in different locations in each
variant.

This is tricky because we need to bubble up success/failure to the upper
levels, and 0 could be a valid offset if the stripe is inside an array
or in a packet. Hence we refactor tryreg to return success/failure
separately, although I stopped short of modifying rnndec_decodereg
itself.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6104>
2020-07-29 10:51:28 +00:00
Connor Abbott
9a1924d55a tu: Dump CP_DRAW_INDIRECT_MULTI draw BO's
These will be decoded by cffdump.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6104>
2020-07-29 10:51:28 +00:00
Chris Forbes
c7626ac8ba bifrost: Fix packing of ADD_FEXP2_FAST
This was being packed as 1-src and so the Src1 was not set up properly.
It only worked by accident.

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6111>
2020-07-28 14:46:41 -07:00
Chris Forbes
a618631f2d bifrost: Honor src swizzle in special math ops
Most ops use the common handling in emit_alu in order to convert NIR
sources to bifrost sources, but the "special" math op lowering handrolls
the conversion (due to needing to reference the same source multiple
times).

Unfortunately, that handrolled lowering did not consider that there
might be a non-identity swizzle on the source. In this case we would
reference the wrong component of the source and generate garbage.

Fixes all but two of the remaining failures on G31 in:
  dEQP-GLES2.functional.shaders.operator.exponential.*highp*

The following tests are still broken due to some other issue:
  dEQP-GLES2.functional.shaders.operator.exponential.exp2.highp_float_fragment
  dEQP-GLES2.functional.shaders.operator.exponential.exp2.highp_vec2_fragment

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6108>
2020-07-28 13:45:20 -07:00
Daryl W. Grunau
a400c2ff22 prevent multiply defined symbols
Without this patch applied gcc@10.1.0 fails to compile with the following
error (note mesa@18.3.6 but the latest release also posseses this problem):

  ld: ../../../../src/gallium/auxiliary/.libs/libgallium.a(u_debug_symbol.o):/tmp/spack/spack-stage/spack-stage-mesa-18.3.6-be7kyg2dyxwktir3zrai27n6a6coadab/spack-src/src/galli um/auxiliary/util/u_debug_symbol.c:273: multiple definition of `symbols_hash'; ../../../../src/gallium/auxiliary/.libs/libgallium.a(u_debug_stack.o):/tmp/spa ck/spack-stage/spack-stage-mesa-18.3.6-be7kyg2dyxwktir3zrai27n6a6coadab/spack-src/src/gallium/auxiliary/util/u_debug_stack.c:49: first defined here
  collect2: error: ld returned 1 exit status
  make[4]: *** [libGL.la] Error 1
  make[4]: Leaving directory `/tmp/spack/spack-stage/spack-stage-mesa-18.3.6-be7kyg2dyxwktir3zrai27n6a6coadab/spack-src/src/gallium/targets/libgl-xlib'
  make[3]: *** [all-recursive] Error 1
  make[3]: Leaving directory `/tmp/spack/spack-stage/spack-stage-mesa-18.3.6-be7kyg2dyxwktir3zrai27n6a6coadab/spack-src/src/gallium'
  make[2]: *** [all-recursive] Error 1
  make[2]: Leaving directory `/tmp/spack/spack-stage/spack-stage-mesa-18.3.6-be7kyg2dyxwktir3zrai27n6a6coadab/spack-src/src'
  make[1]: *** [all] Error 2
  make[1]: Leaving directory `/tmp/spack/spack-stage/spack-stage-mesa-18.3.6-be7kyg2dyxwktir3zrai27n6a6coadab/spack-src/src'
  make: *** [all-recursive] Error 1

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3298
Cc: mesa-stable
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6053>
2020-07-28 20:17:52 +00:00
Marek Olšák
b11ebbe2f6 amd: enable displayable DCC for everything newer than Navi1x
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6100>
2020-07-28 19:47:10 +00:00
Marek Olšák
abed921ce7 amd: add support for Navy Flounder
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6100>
2020-07-28 19:47:10 +00:00
Marek Olšák
037b84df11 amd: rename SIENNA -> SIENNA_CICHLID
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6100>
2020-07-28 19:47:10 +00:00
Rhys Perry
ccfe9813fb aco: create acq+rel barriers instead of acq/rel
NIR doesn't have atomic loads/stores, so we have to workaround that with
this for dEQP-VK.memory_model.* to pass.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
2020-07-28 16:56:34 +00:00
Rhys Perry
3d9eb17d5d aco: improve workgroup-scope and lower vmem/smem barriers
No fossil-db changes on Navi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
2020-07-28 16:56:34 +00:00
Rhys Perry
3af2b9e3de aco: improve sync_info for TCS output stores
Stop scheduling them as SSBO stores.

No fossil-db changes on Navi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
2020-07-28 16:56:34 +00:00
Rhys Perry
8a16498cc6 aco: use storage_scratch
fossil-db (Navi):
Totals from 9 (0.01% of 114665) affected shaders:
VMEM: 14456 -> 15312 (+5.92%)
VClause: 336 -> 327 (-2.68%)

Helps 9 Dark Souls 3 shaders a little.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
2020-07-28 16:56:34 +00:00
Rhys Perry
46c4b25623 aco: enable value numbering of s_buffer_load_*
fossil-db (Navi):
Totals from 33 (0.03% of 114665) affected shaders:
SGPRs: 2176 -> 2152 (-1.10%)
VGPRs: 1572 -> 1564 (-0.51%)
CodeSize: 115988 -> 115472 (-0.44%)
Instrs: 21459 -> 21385 (-0.34%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
2020-07-28 16:56:34 +00:00
Rhys Perry
2adb337256 nir,radv/aco: add and use pass to lower make available/visible barriers
Lower them to ACCESS_COHERENT to simplify the backend and
probably give better performance than invalidating or writing back the
entire L0/L1 cache.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
2020-07-28 16:56:34 +00:00
Rhys Perry
7a61480613 aco: consider intrinsic access in visit_{load,store}_image
radv_nir_lower_memory_model will use this.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
2020-07-28 16:56:34 +00:00
Rhys Perry
cd392a10d0 radv/aco,aco: use scoped barriers
fossil-db (Navi):
Totals from 109 (0.08% of 132058) affected shaders:
SGPRs: 5416 -> 5424 (+0.15%)
CodeSize: 460500 -> 460508 (+0.00%); split: -0.07%, +0.07%
Instrs: 87278 -> 87272 (-0.01%); split: -0.09%, +0.09%
Cycles: 2241996 -> 2241852 (-0.01%); split: -0.04%, +0.04%
VMEM: 33868 -> 35539 (+4.93%); split: +5.14%, -0.20%
SMEM: 7183 -> 7184 (+0.01%); split: +0.36%, -0.35%
VClause: 1857 -> 1882 (+1.35%)
SClause: 2052 -> 2055 (+0.15%); split: -0.05%, +0.19%
Copies: 6377 -> 6380 (+0.05%); split: -0.02%, +0.06%
PreSGPRs: 3391 -> 3392 (+0.03%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
2020-07-28 16:56:34 +00:00
Rhys Perry
d1f992f3c2 aco: rework barriers and replace can_reorder
fossil-db (Navi):
Totals from 273 (0.21% of 132058) affected shaders:
CodeSize: 937472 -> 936556 (-0.10%)
Instrs: 158874 -> 158648 (-0.14%)
Cycles: 13563516 -> 13562612 (-0.01%)
VMEM: 85246 -> 85244 (-0.00%)
SMEM: 21407 -> 21310 (-0.45%); split: +0.05%, -0.50%
VClause: 9321 -> 9317 (-0.04%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
2020-07-28 16:56:34 +00:00
Rhys Perry
1bbb64f300 aco: add missing add_to_hazard_query
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
2020-07-28 16:56:34 +00:00
Chris Forbes
1882b1e5a7 bifrost: Add support for nir_op_iabs
Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6098>
2020-07-28 15:40:00 +00:00
Lionel Landwerlin
1cdd161a30 anv: fix descriptor set free
Once we start going through the free list of the descriptor set pool,
we might use a free entry larger than the descriptor set we want to
allocate. When we free that descriptor set, we use the size of the set
rather than the size of the entry that was picked. This leads to leaks
of some amount of descriptor set pool.

This fix saves the size of the entry in the descriptor set so we know
what amount of the pool needs to freed.

v2: Don't bother adding a new size field

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3324
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6084>
2020-07-28 14:51:15 +00:00
Yevhenii Kolesnikov
845a50ee25 nine: fix incorrect calculation of layer count for 3D textures
Volume textures don't have a concept of "layers"

v1: set last_layer to zero for 3D textures (Axel Davy)

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5808>
2020-07-28 13:48:10 +00:00
Icecream95
d136fa17ac panfrost: Allow PIPE_TEXTURE_1D_ARRAY textures
Fixes a crash with wined3d.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6085>
2020-07-28 13:30:32 +00:00
Marcin Ślusarz
884718313c i965: propagate error from gen_perf_begin_query to glBeginPerfQueryINTEL
Otherwise mesa will crash in glEndPerfQueryINTEL because OA BO is NULL.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6094>
2020-07-28 10:44:41 +00:00
Marcin Ślusarz
627c01977c iris: propagate error from gen_perf_begin_query to glBeginPerfQueryINTEL
Otherwise mesa will crash in glEndPerfQueryINTEL because OA BO is NULL.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6094>
2020-07-28 10:44:41 +00:00
Connor Abbott
0f9131d096 freedreno/rnn: Return success when parsing addvariant
This was missed when I initially added addvariant.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
aa6fbdd248 freedreno/ci: add a2xx trace to CI job
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
18bc5a81a7 freedreno: deduplicate a2xx disasm
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
f39afda1a7 freedreno: move a2xx disasm out of gallium
So that it can be reused by the decode tools.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
f7bd3456d7 freedreno: deduplicate a3xx+ disasm
Merge the extra tracking that is useful for generating stats from asm
(as opposed to ir), and for guestimating things like inputs and outputs
(mostly useful for r/e) into ir3's version and drop cffdec's version.

There is a small change in disasm output for the decode tools, in that
it no longer prints the used consts, but rather just the max accessed
const.  This is the more useful piece of information, and avoids making
the shared regmask type big enough to deal with the const reg file.
Additional error checking for invalid regids causes crashdec to bail
out sooner when decoding memory that *might* hold valid instructions.
Also, crashdec no longer prints stats, because stats aren't very useful
when trying to decode random instruction memory (which might or might
not be valid instructions).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
6b379a4cb4 freedreno: drop shader_t
When this code was outside of the mesa tree, we needed our own enum.
Now we can use a common one, to simplify deduplicating the disasm
code.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
bb98b71893 freedreno/ir3: split out regmask
To unify the ir3 disasm code, we need to add in the regmask based
register tracking from cffdec's version of the disassembler.  Split
out regmask (or at least the part that doesn't depend on ir3) so
it can be shared.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
ddcee248ad freedreno: add CI for envytools tools
This also tunes `.freedreno-rules` a bit so that it isn't triggered by
various tools that don't effect the driver build.

The .gitlab-ci directory is kept separate from the toplevel one so that
updates to (for example) reference decode output do not trigger all the
other-driver jobs to run.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
b62e4a8e9e freedreno/afuc: warnings cleanup
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
5125b4bc69 freedreno/decode: warnings cleanup
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
cbbaafdf72 freedreno/rnn: warnings cleanup
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
536f43cb96 freedreno: slurp in afuc
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
1ea4ef0d3b freedreno: slurp in decode tools
cffdump, crashdec, etc

At this point there is some duplication with other files in-tree (ie.
a2xx and a3xx+ disassembly), which will be cleaned up in a later commit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
7c0bd8429f freedreno: slurp in rnn
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
b721d336da freedreno: slurp in rnndb
Pull in all of $envytools/rnndb (including display, etc) from envytools
commit 6ccdda33ac4d88e19d2a70e1b4edaaab5ec4b026

This changes the directory structure to match the organization in the
envytools tree.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Rob Clark
7de0842d42 freedreno: make gen_header.py check parent directory
With the next commit, the xml files will be no longer be all in the same
directory.  But checking up a single directory level to resolve import
will be sufficient.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>
2020-07-28 09:45:08 +00:00
Bas Nieuwenhuizen
05b2783270 radv: Fix host->host signalling with legacy timeline semaphores.
Fixes: 88d41367b8 "radv: Add timelines with a VK_KHR_timeline_semaphore impl."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Andres Rodriguez <andresx7@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6097>
2020-07-28 09:33:59 +00:00
Dave Airlie
9746e84a7e radv: cleanup locking around timeline waiting.
Just noticed in passing that this looked extra complicated,
Bas said it was for legacy design reasons, so clean it up.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6099>
2020-07-28 12:31:30 +10:00
Chris Forbes
a0a70879c5 bifrost: Add support for nir_op_imul
Unfortunately this doesn't map nicely to the existing instruction
classes, so we'll make a new one for now.

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>
2020-07-28 01:13:09 +00:00
Chris Forbes
718d444e51 bifrost: Add support for nir_op_uge
Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>
2020-07-28 01:13:09 +00:00
Chris Forbes
946ff9b439 bifrost: Add support for nir_op_ishl
Bifrost's bitwise ops include the shift capability. Previously we had
hardcoded the shift to zero in all cases.

There's room in future to emit slightly better code if a shift and a
bitwise operation can be folded together, but not going after that for
now.

This change also removes the separate BI_SHIFT instruction class as
BI_BITWISE can cover both cases.

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>
2020-07-28 01:13:09 +00:00
Chris Forbes
539ea08736 bifrost: Add support for nir_op_inot
Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>
2020-07-28 01:13:09 +00:00
Caio Marcelo de Oliveira Filho
12dd5455f4 spirv: Handle most execution modes earlier
For convenience in e68871f6a4 ("spirv: Handle constants and types
before execution modes") we moved all execution mode parsing after the
constants and types, so that those using OpExecutionModeId could be
handled together.

Later in 84781e1f1d ("spirv/nir: keep track of SPV_KHR_float_controls
execution modes") we had to parse certain non-ID execution modes
before handling constants.

Instead of handling just the float controls related execution modes
early, handle all modes that don't need an ID.  This is a more
"natural" split and will allow other type handling to rely on
execution mode in the future.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6062>
2020-07-27 17:10:23 +00:00
Chris Forbes
ef781880eb bifrost: Add lowering for b2i32
Since the bool representation is 0/~0, we can convert to int
just by &1.

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>
2020-07-27 16:53:52 +00:00
Chris Forbes
1a168c90a0 bifrost: Document d3d/gl comparison control bit
Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>
2020-07-27 16:53:52 +00:00
Chris Forbes
ec37c7126d bifrost: Emit "d3d" variant of comparison instructions
The "d3d" variant uses ~0 as the true value. This is consistent
with NIR's nir_lower_bool_to_int32 pass.

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>
2020-07-27 16:53:52 +00:00
Chris Forbes
0ffefad791 bifrost: Lower x->bool conversions to != 0
Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>
2020-07-27 16:53:52 +00:00
Connor Abbott
8e8baecd6a tu: Enable resource dynamic indexing
This has actually worked since bindless support was merged.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>
2020-07-27 16:38:17 +00:00
Connor Abbott
8bc060ab81 ir3: Fix incorrect src flags for samp_tex
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>
2020-07-27 16:38:17 +00:00
Connor Abbott
e73a8a2b39 ir3: Remove redundant samp_tex validation
It's already checked in ir3_validate. This way we don't have to fix it
up for bindless.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>
2020-07-27 16:38:17 +00:00
Connor Abbott
3adc23f667 ir3: Validate bindless samp_tex correctly
It's full instead of half precision, because the maximum number of
textures/samplers is much larger.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>
2020-07-27 16:38:17 +00:00
Connor Abbott
d542bfc306 tu: Fix descriptor update templates with input attachments
Found via
dEQP-VK.binding_model.descriptorset_random.sets4.noarray.ubolimitlow.sbolimitlow.sampledimglow.outimgonly.noiub.nouab.frag.ialimitlow.0

Fixes: 159a1300ce ("turnip: input attachment descriptor set rework")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6087>
2020-07-27 12:36:36 +00:00
Jonathan Marek
9ece61269d turnip: fix SP_HS_UNKNOWN_A831 value for A650
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>
2020-07-27 12:17:38 +00:00
Jonathan Marek
e646e77e18 turnip: use patchControlPoints for HS_INPUT_SIZE value
It should be calculated from patchControlPoints, not tcs_vertices_out.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>
2020-07-27 12:17:38 +00:00
Jonathan Marek
da49a45351 turnip: move WFI out of draw state to fix a650 hangs
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>
2020-07-27 12:17:38 +00:00
Jonathan Marek
e5f4527f20 freedreno/ir3: fix wrong local_primitive_id_start type
When changing the patch to use an offset instead of a bool, the type was
accidentally left as bool.

Fixes: f472c98443 ("freedreno/ir3: add support for a650 tess shared storage")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>
2020-07-27 12:17:38 +00:00
Bas Nieuwenhuizen
7cb4d4f24e vulkan/wsi: Convert usage of -1 to UINT32_MAX.
The integers are unsigned so they do the same but this makes it
locally more clear what happened.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6071>
2020-07-27 11:30:22 +00:00
Bas Nieuwenhuizen
e1147caecb vulkan/wsi/x11: report device-group present rectangles with prime.
dEQP-VK.wsi.xlib.surface.query_devgroup_present_modes with prime
fail when 0 rectangles are reported. While I believe that test
tests this unintentionally (trying to test the VK_INCOMPLETE return),
I believe it makes sense to always return a rectangle.

In particular we require the data from the given rectangle for
presentation even if we use prime and given that prime is completely
transparent for the app it still counts as local from the perspective
as the application.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6071>
2020-07-27 11:30:22 +00:00
Daniel Schürmann
af0bc71015 radv: call radv_nir_lower_ycbcr_textures after first optimizations
There might still be tex instructions with undef texture/sampler before
the first round of optimizations. No pipelinedb changes.

Fixes: 14a12b771d ('spirv: Rework our handling of images and samplers')
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6083>
2020-07-27 10:03:20 +00:00
David McFarland
fffc287d44 radv: link with ld_args_build_id
This is needed for radv_device_get_cache_uuid to work correctly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6081>
2020-07-27 09:45:53 +00:00
Iago Toral Quiroga
d1677c8f8c v3d/compiler: request fragment shader clip lowering to be vulkan compatible.
Vulkan allows fragment shaders to read gl_ClipDistance[], in which case
the SPIR-V compiler will inject a compact array variable at
VARYING_SLOT_CLIP_DIST0. Request the lowering to always work in terms
of a compact array variable so we don't have to care about the API
in use.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6022>
2020-07-27 08:25:57 +02:00
Iago Toral Quiroga
71d5c19241 v3d/compiler: handle compact varyings
We are going to need this in Vulkan because the SPIR-V compiler
defines clip distances as a single compact array of scalars, so
our compiler needs to know what to do with them.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6022>
2020-07-27 08:25:57 +02:00
Iago Toral Quiroga
17fd191eed nir/lower_clip: make the pass compatible with Vulkan semantics
Vulkan allows fragment shaders to read gl_ClipDistance[], in which
case the SPIR-V compiler inserts a single compact array variable for
VARYING_SLOW_CLIP_DIST0 and the lowering should not try to inject
its own variables, but instead work in terms of the existing one.
Vulkan drivers are expected to call this with use_clipdist_array set
to true to be consistent with this setup.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6022>
2020-07-27 08:25:57 +02:00
Bas Nieuwenhuizen
18fe130ec9 radv: Fix uninitialized variable in renderpass.
Fixes some dEQP-VK.renderpass2.* flakes. Valgrind:

Test case 'dEQP-VK.renderpass2.dedicated_allocation.attachment.8.724'..
==754520== Conditional jump or move depends on uninitialised value(s)
==754520==    at 0x575B21C: radv_layout_is_htile_compressed (radv_image.c:1690)
==754520==    by 0x572F470: radv_handle_depth_image_transition (radv_cmd_buffer.c:5855)
==754520==    by 0x572F2F2: radv_handle_image_transition (radv_cmd_buffer.c:6123)
==754520==    by 0x572EEC6: radv_handle_subpass_image_transition (radv_cmd_buffer.c:3385)
==754520==    by 0x572A104: radv_cmd_buffer_begin_subpass (radv_cmd_buffer.c:4843)
==754520==    by 0x572A007: radv_CmdBeginRenderPass (radv_cmd_buffer.c:4913)
==754520==    by 0x572A197: radv_CmdBeginRenderPass2 (radv_cmd_buffer.c:4921)

Why false?

A renderloop happens when the same attachment is both used as input
attachment and output (color, ds) attachment in a subpass. Of course
this doesn't happen outside of a renderpass and hence we can initialize
it to false at the start of the renderpass.

Fixes: 66131ceb8b "radv: Pass through render loop detection to internal layout decisions."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3074
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6068>
2020-07-26 13:35:16 +00:00
Karol Herbst
e2e89fb137 nir/lower_io: assert that offsets are used for shader_in
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6059>
2020-07-25 08:51:48 +00:00
Christian Gmeiner
60915f87c7 etnaviv: do register setup only once
Register set setup should be done once at backend
initializaion, as ra_set_finalize is O(r^2*c^2).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5996>
2020-07-24 20:01:04 +00:00
Christian Gmeiner
7ee146aad4 etnaviv: move shader_count to etna_compiler
Also fix data race on making the shader's id.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5996>
2020-07-24 20:01:04 +00:00
Christian Gmeiner
5839a7d64a etnaviv: introduce struct etna_compiler
This struct will be used to for state saved across compiler
invocations.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5996>
2020-07-24 20:01:04 +00:00
Connor Abbott
9e596cc2c2 tu: Enable vertex & fragment stores & atomics
Note that there are some extra tess fails, but they're probably
unrelated to the actual feature. There were also some xfails that were
created as part of an earlier attempt to enable the feature which were
fixed in the meantime, so remove them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>
2020-07-24 18:43:40 +00:00
Connor Abbott
f7f29a04b4 tu: Detect invalid-for-binning renderpass dependencies
This is all that was missing for stores & atomics.

Closes: #3196
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>
2020-07-24 18:43:40 +00:00
Connor Abbott
d6d75fcd91 tu: Fix hangs for DS with no output
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>
2020-07-24 18:43:40 +00:00
Connor Abbott
7ad962bf89 tu: Fix empty blit scissor case
With vertexPipelineStoresAndAtomics enabled, fixes:
dEQP-VK.tessellation.invariance.one_minus_tess_coord_component.quads_fractional_even_spacing_cw_point_mode
dEQP-VK.tessellation.invariance.tess_coord_component_range.triangles_fractional_even_spacing_ccw_point_mode

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>
2020-07-24 18:43:40 +00:00
Jason Ekstrand
63cf8adb12 spirv: Also copy over binding information for atomic counters
I missed this if statement so atomic counters weren't getting bindings
and, when you have more than one of them, that meant they were all
getting combined into one.

Fixes: 3584cb09bc15 "spirv: Give atomic counters their own variable mode"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6060>
2020-07-24 18:17:38 +00:00
Connor Abbott
6cbdffd79c tu: Implement VK_KHR_draw_indirect_count
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>
2020-07-24 19:21:07 +02:00
Connor Abbott
52ec35f5a6 tu: Add missing wfi to tu6_emit_hw()
It needs to be there before changing CCU state. This was accidentally
deleted in f494799a7f when it should've
been moved.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>
2020-07-24 19:20:44 +02:00
Connor Abbott
a0ca688a67 tu: Integrate WFI/WAIT_FOR_ME/WAIT_MEM_WRITES with cache tracking
Track them via pending_flush_bits. Previously WFI was only tracked in
flush_bits and WAIT_FOR_ME was emitted directly. This means that we don't
emit WAIT_FOR_ME or WAIT_FOR_IDLE if there wasn't a cache flush or other
write by the GPU. Also split up host writes from sysmem writes, as only
the former require WFI/WAIT_FOR_ME.

Along the way, I also realized that we were missing proper handling of
transform feedback counter writes which require WAIT_MEM_WRITES. Plumb
that through as well. And CmdDrawIndirectByteCountEXT needs a
WAIT_FOR_ME as it does not wait for WFI internally.

As an example of what this does, a typical barrier for transform
feedback with srcAccess = VK_TRANSFORM_FEEDBACK_WRITE_COUNTER_BIT_EXT
and dstAccess = VK_ACCESS_INDIRECT_COMMAND_READ_BIT used to emit on
A650:

- WAIT_FOR_IDLE

and now we emit:

- WAIT_MEM_WRITES
- WAIT_FOR_ME

So we've eliminated a useless WFI and added some necessary waits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>
2020-07-24 19:20:44 +02:00
Connor Abbott
cd78a7a5ff freedreno: Add INDIRECT_COUNT CP_DRAW_INDIRECT_MULTI variants
These have an indirect count which is loaded from an iova, and the
minimum is taken between the indirect and direct counts. Note, I also
had to fix gen_header.py to deal with the extra-long names we get.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>
2020-07-24 19:20:44 +02:00
Connor Abbott
8da31ee15f freedreno: Clean up CP_DRAW_MULTI_INDIRECT definition
Depends on the envytools changes to make the "addvariant" magic work in
order to decode this correctly, and to be able to print the register
names directly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>
2020-07-24 19:20:44 +02:00
Jonathan Marek
1747f9fdd0 turnip: remove extra gmem alignment
Now that we clear the PITCHALIGN" field when filling GMEM input attachment
descriptors, we can get rid of the extra tile width alignment on a630/a640.

With the "block_align_shift" value change, this brings down the default
gmem_align from 16k to 4k on a630/a640 and down from 24k to 12k on a650,
to match the gallium driver.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5528>
2020-07-24 13:44:42 +00:00
Christian Gmeiner
8534f49bf9 etnaviv: explicitly set nir_variable_mode
No functional changes - fixes the following assert:
  nir_lower_io_impl: Assertion `!(modes & ~supported_modes)' failed.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5997>
2020-07-24 13:33:47 +00:00
Samuel Pitoiset
5b300bec9a radv: clean up remaining pipeline init functions
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
5575ce0a28 radv: remove useless return value to radv_pipeline_scratch_init()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
0721e2d1ab radv: add radv_pipeline_init_shader_stages_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
f3774ec9ac radv: constify all radv_pipeline_generate_*() helpers
To make clear that the pipeline should be read only.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
f32cb82515 radv: assign pipeline gfx fields before PM4 emission
To be able to constify all radv_pipeline_generate_*() helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
2a5fb87de2 radv: clean up binning state initialization
It's no longer emitted directly in the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
08dd70465e radv: clean up adjusting MSAA state if conservative rast is enabled
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
067b01c5e6 radv: add radv_pipeline_generate_vgt_gs_out()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
749d513467 radv: add radv_pipeline_init_input_assembly_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
e31f8b9676 radv: clean up tessellation state emission
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
9b691bfb6c radv: remove unnecessary radv_tessellation_state::lds_size
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
a1b237b9ef radv: set LDS TCS size at shaders creation for GFX9+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:03 +00:00
Samuel Pitoiset
cf89bdb9ba radv: align the LDS size in calculate_tess_lds_size()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
9c36ebf30e radv: remove one unnecessary param to radv_generate_graphics_pipeline_key()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
55f615660c radv: remove no-op si_multiwave_lds_size_workaround()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
7f794137da radv: remove unnecessary radv_tessellation_state::num_patches
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
83f63ab2c2 radv: clean up radv_compute_generate_pm4()
For consistency regarding how the graphics pipeline is built.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
8bfd8277cc radv: reduce the number of allocated dwords for compute CS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
62ec89759a radv: clean up PA_SC_CLIPRECT_RULE emission
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
09c4f76d91 radv: clean up VGT_SHADER_STAGES_EN emission
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
62ffa837d3 radv: emit PA_SC_LINE_CNTL as part of the rasterization state
While we are at it, remove one useless field in radv_multisample_state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
934d6ac949 radv: emit more invariant registers as part of the initial gfx state
This reduces the number of emitted packets for pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
847e0b83ba radv: remove outdated TODO related to PA_SU_VTX_CNTL.PIX_CENTER
It should be always 1, nothing more to check.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
62af9df36c radv: remove set but unused radv_pipeline::vertex_elements
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Samuel Pitoiset
76de1414c1 radv: remove declared but unused radv_pipeline::is_dual_src
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
2020-07-24 12:30:02 +00:00
Eric Engestrom
859687313b bin/khronos-update: add workaround for python bug 9625
The bug causes `choices` to break `nargs='*'`.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6057>
2020-07-24 14:22:36 +02:00
Eric Engestrom
aa5c3911d6 bin/khronos-update: add support for the SPIRV files
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6004>
2020-07-24 11:10:13 +00:00
Eric Engestrom
ccb91bc68c bin/khronos-update: having a folder in include/ is not a requirement
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6004>
2020-07-24 11:10:13 +00:00
Neil Roberts
de5130fea0 v3d: Retry with the fallback scheduler when RA fails
v3d_compile is now split out into a helper function that gets called a
second time if compilation fails the first time with the result
reporting the register allocation failed. The second time it is run with
the fallback scheduler to try and increase the chances of successfully
allocating the registers.

v2: Add a performance debug message when using the fallback scheduler.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
2020-07-24 12:27:07 +02:00
Neil Roberts
1c8167da61 v3d: Changed v3d_compile:failed to an enum
Instead of just having a bool status for the failure, there is now an
enum so that the compilation can report a more detailed status.
Currently this is only used to report whether the failure was due to
failed register allocation. The “failed” bool doesn’t seem to actually
have been used anywhere so this doesn’t really change a lot.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
2020-07-24 12:27:07 +02:00
Neil Roberts
56846a2b68 nir/schedule: Add an option for a fallback scheduling algorithm
The current scheduling algorithm favors parallelism a bit too
aggressively and sometimes generates shaders that fail register
allocation. This happens even if the threshold is set to zero to force
it to always use the CSR instruction choosing algorithm.

This patch adds an option to use an even more aggressive fallback that
just always picks the instruction with the shortest maximum delay in the
hope that that will generate the least register pressure. The intention
is to use this as a last resort after register allocation fails in order
to at least have a working shader.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
2020-07-24 12:26:26 +02:00
Neil Roberts
08f1746fad v3d: Mark scheduling dependency for prim id and first output
The input primitive ID is read from the VPM in the same memory segment
as the outputs. This means that writing the GS header to VPM location 0
needs to be done after reading the primitive ID. This patch adds a
dependency between the load_primitive_id intrinsic and the store_output
intrinsic for location 0 to stop the scheduler from reordering them.

v2: Use an enum for the dependency class number.
v3: Add "GS" to the class enum name.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
2020-07-24 09:21:11 +02:00
Neil Roberts
bafd259177 nir/schedule: Add a callback for backend-specific dependencies
Adds a callback function to nir_schedule_options to give the backend a
chance to add custom dependencies between certain intrinsics. The
callback can assign a class number to the intrinsic and then set a read
or write dependency on that class.

v2: Use a linked-list of schedule nodes for the dependency classes
    instead of a fixed-sized array.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
2020-07-24 09:21:11 +02:00
Neil Roberts
260a8f759a nir/schedule: Store a pointer to the options struct in scoreboard
Instead of copying the individual members of nir_schedule_options into
the scoreboard, it now just keeps a pointer to the options. This avoids
the duplicated comments and makes it easier to add more options later.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
2020-07-24 09:21:11 +02:00
Neil Roberts
7665398e6c nir/scheduler: Move nir_scheduler to its own header
nir_schedule already has a struct for options which makes it more than
just a function declaration. Later patches intend to add more structs to
complement these options. In order to make the code easier to manage,
this moves the nir_scheduler-related parts out of nir.h to their own
header.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
2020-07-24 09:21:11 +02:00
Jason Ekstrand
14a12b771d spirv: Rework our handling of images and samplers
Previously, objects of type OpTypeImage or OpTypeSampler were treated as
vtn_pointers and objects of type OpTypeSampledImage were a special-use
vtn_sampled_image struct.  This commit changes that so that all of those
objects are stored in vtn_ssa_values.  Each of images, samplers, and
sampled images, are stored as a scalar or vector nir_ssa_def whose
components are NIR deref values.  We now use vtn_type_get_nir_type to
re-resolve those as-needed into GLSL sampler types for NIR.

This simplification has a number of benefits:

 1. We can git rid of the rest of our special-cases for handling images
    and samplers in function arguments.  Now that they're treated as
    structs at the glsl_type level, the generic paths can handle images
    and samplers.

 2. We can now construct composite values containing images and samplers
    internally.  It's unclear from the SPIR-V spec whether or not this
    is allowed and it's not a pattern that GLSLang currently generates
    thanks to GLSL rules.  However, if we do start seeing SPIR-V that
    contains such composites, we should now be able to handle it.

 3. SPIR-V OpNull and OpUndef instructions can now create samplers,
    images, and sampled images.  The NIR generated won't likely be fully
    valid but, given a NIR pass to do something sensible, it should be a
    thing we can compile.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
196db51fc2 anv,turnip,radv,clover,glspirv: Run nir_copy_prop before nir_opt_deref
We're about to make the SPIR-V -> NIR path generate a bit more complex
SSA chains for certain derefs.  This will ensure we don't regress anyone
when we start making vec2's of derefs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
66c8628b65 spirv: More heavily use vtn_ssa_value in function parameter handling
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
32ba23f897 spirv: Remove a dead case in function parameter handling
Ever since 31a7476335, we've set something for vtn_type::type for
all pointer types.  For logical pointer types, it's uint32_t.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
9e3213ad30 spirv: Add a helper for getting the NIR type of a vtn_type
There are a few cases, atomic counters being one example, where the type
used by vtn_ssa_value is not the same as the type we want NIR to use in
derefs and variables.  To solve this, we add a helper which converts
between the types for us.  In the next commit, we'll be adding another
major user of this: images and samplers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
051f8d3d1c spirv: Give atomic counters their own variable mode
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
8a7932b095 spirv: Drop the sampled boolean from vtn_type
It was set but never used.  We always check the glsl_type instead.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
d0be2fed4e spirv: Add better checks for SSA value types
Primarily, we check for two things:

 1. That we only ever add SSA values via vtn_push_ssa_value and
    vtn_copy_value.

 2. That the type of the SSA value matches the SPIR-V destination type.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
47ebb50cab spirv: Hand-roll fewer vtn_ssa_value creations
Previously, we created our vtn_ssa_value in _vtn_variable_load_store
manually as we did the recursive load/store.  Instead, we now create the
SSA value before calling into the recursive function.  This is a tiny
bit less efficient but it removes a case of hand-rolling vtn_ssa_value
creation.  For symmetry, we make _vtn_block_load_store assume the value
is already created.  Finally, we remove a trivial hand-rolled case in
vtn_composite_extract.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
085ade4125 spirv: Simplify vtn_ssa_value creation
For three different functions which create vtn_ssa_values, we had three
completely different implementations.  This unifies them all to roughly
the same algorithm.  While we're at it, we take advantage of the
nir_build_imm helper to avoid some extra code in vtn_const_ssa_value.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
00af1128a9 spirv/subgroups: Refactor to use vtn_push_ssa
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
ea246c3950 spirv/subgroups: Stop incrementing w
The w++ is to handle a differences between the KHR extension and Vulkan
1.1 feature where the Vulkan 1.1 instructions take an scope parameter.
While incrementing w technically works, it's really subtle and very easy
to miss when reading the code.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
c5fcd129ea spirv/glsl450: Use vtn_push_ssa_value
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
7560ed279f spirv/alu: Use vtn_push_ssa_value
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
dbb4a24413 spirv: Refactor vtn_push_ssa
We rename it to vtn_push_ssa_value, move it to spirv_to_nir, and remove
the unnecessary type parameter.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
8be9f2a4f6 spirv: Use the new helpers in OpConvertUToPtr/PtrToU
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
37ab323480 spirv: Add a vtn_get_nir_ssa helper
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
e5b29b9040 spirv/amd: Use vtn_push_nir_ssa
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
d8eb6f2499 spirv: Add a vtn_push_nir_ssa helper
This makes it easy to write a simple NIR SSA value

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
aaf1f34215 spirv: Rename push_value_pointer to push_pointer
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
ac1e6d5a46 spirv: Add a helpers for getting types of values
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Jason Ekstrand
953b7a3603 spirv: Use nir_bany/ball for OpAny/All
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:20 -05:00
Jason Ekstrand
8dfee57bdc spirv: Clean up OpSignBitSet
For some reason, we were doing a signed shift vectors and an unsigned
shift for scalars.  We then plug it into i2b so it should make no
difference whatsoever.  The fact that we're doing different things for
vectors vs. scalars is bonkers.  Let's simplify the code a bit.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:41:54 -05:00
Jason Ekstrand
62c53ad20b spirv: Fix indentation in vtn_handle_ptr
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:41:54 -05:00
Jason Ekstrand
516fd78d62 spirv: Drop the void *ptr from vtn_value
It isn't being used for anything.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:41:54 -05:00
Jason Ekstrand
af81486a8c spirv: Simplify our handling of NonUniform
The original implementation of SPV_EXT_descriptor_indexing was extremely
paranoid about the NonUniform qualifier, trying to fetch it from every
possible location and propagate it through access chains etc.  However,
the Vulkan spec is quite nice to us on this and has very strict rules
for where the NonUniform decoration has to be placed.  For image and
texture operations, we can search for the decoration on the spot when we
process the image or texture op.  For pointers, we continue putting it
on the pointer but we don't bother trying to do anything silly like
propagate it through casts.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:41:54 -05:00
Jesse Natalie
0d5cd1a5f4 nir/vtn: Add support for 8 and 16 vector ball/bany
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6030>
2020-07-23 18:23:23 -07:00
Jesse Natalie
456edf0b30 nir: Support 8 and 16 component vectors for reduceable intrinsics
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6030>
2020-07-23 18:23:20 -07:00
Jesse Natalie
d572f4dfd9 nir: Support algebraic opts on vectors larger than 4
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6030>
2020-07-23 18:23:17 -07:00
Jesse Natalie
aa581fcc69 nir: Support vec8/vec16 in nir_lower_bit_size
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6030>
2020-07-23 18:23:07 -07:00
Rob Clark
d35b54c705 freedreno: sync registers from envytools
Pull in a bunch of fixes and updates.. mostly using varset correctly,
and fixes for implicit bools.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6052>
2020-07-23 17:11:16 -07:00
Connor Abbott
1610c69f34 tu: Enable VK_EXT_depth_clip_enable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6047>
2020-07-23 18:55:56 +00:00
Daniel Schürmann
1b3be07b5f aco: ensure readfirstlane subdword operands are always dword aligned
Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6024>
2020-07-23 18:18:36 +00:00
Daniel Schürmann
4c89bfc4ec aco: prevent infinite recursion in RA for subdword variables
Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6024>
2020-07-23 18:18:36 +00:00
Daniel Schürmann
626081fe4b aco: don't split store data if it was already split into more elements
Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6024>
2020-07-23 18:18:35 +00:00
Daniel Schürmann
bd75e99233 aco: ensure to not extract more components than have been fetched
Fixes: 7015d2c249 ('aco: fix scratch loads which cross element_size boundaries')
Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6024>
2020-07-23 18:18:35 +00:00
Bas Nieuwenhuizen
6bc5ce7a91 radv: Add timeline syncobj for timeline semaphores.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5600>
2020-07-23 17:36:46 +00:00
Bas Nieuwenhuizen
55d8022878 radv: Add winsys functions for timeline syncobj.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5600>
2020-07-23 17:36:46 +00:00
Bas Nieuwenhuizen
66e598d0a6 radv: Add winsys support for submitting timeline syncobj.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5600>
2020-07-23 17:36:46 +00:00
Bas Nieuwenhuizen
fb6b38d780 radv: Add thread for timeline syncobj submission.
For cross-process timelines we have to have a thread to wait
till the requested points become available.

The functions actually dealing with timeline semaphores stubbed out, to
implement in the next patch. As such the thread code shouldn't trigger
yet.

The core idea is that we still use the refcount mechanism that we use with
emulated timelines, though the native timeline syncobj don't participate
in the refcounting. This way we keep the ordering of submission in a queue
as each submission is also blocked by its predecessor.

Where we change behavior is when the number of blockers reaches 0. In the
new code we check if we need to wait for the timeline semaphores to
be available and if so we won't execute the submission immediately but
pass it to the submission thread.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5600>
2020-07-23 17:36:46 +00:00
Bas Nieuwenhuizen
fa97061a82 radv/winsys: Add binary syncobj ABI changes for timeline semaphores.
To facilitate cross-process timeline semaphores we have to deal with
the fact that the syncobj signal operation might be submitted a
small finite time after the wait operation.

For that we start using DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT during
the wait operation so we properly wait instead of returning an error.

Furthermore, to make this effective for syncobjs that get reused we
actually have to reset them after the wait. Otherwise the wait before
submit would get the previous fence instead of waiting for the new
thing to submit.

The obvious choice, resetting the syncobj after the CS submission
has 2 issues though:

1) If the same semaphore is used for wait and signal we can't reset it.
   This is solvable by only resetting the semaphores that are not in the
   signal list.
2) The submitted work might be complete before we get to resetting the
   syncobj. If there is a cycle of submissions that signals it again and
   finishes before we get to the reset we are screwed.

Solution:
Copy the fence into a new syncobj and reset the old syncobj before
submission. Yes I know it is more syscalls :( At least I reduced the
alloc/free overhead by keeping a cache of temporary syncobjs.

This also introduces a syncobj_reset_count as we don't want to reset
syncobjs that are part of an emulated timeline semaphore. (yes, if
the kernel supports timeline syncobjs we should use those instead,
but those still need to be implemented and if we depend on them in
this patch ordering dependencies get hard ...)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5600>
2020-07-23 17:36:46 +00:00
Bas Nieuwenhuizen
fb5237910b amd: Add detection of timeline semaphore support.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5600>
2020-07-23 17:36:46 +00:00
Andreas Baierl
ce4064fe2f nir/ lower_int_to_float: Handle umax and umin
8e1b75b3 introduced umax/umin in order to lower iand/ior for (n)eq zero.
That breaks the lower_int_to_float pass, because umax and umin weren't
handled there.

Tested with lima. The other users of nir_lower_int_to_float
(etnaviv, freedreno) should also have that issue.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6043>
2020-07-23 14:45:32 +00:00
Michel Dänzer
589d8665f0 ci: Use half as many parallel softpipe / virgl test jobs
We're now using at least twice as many CPU cores per job (on shared
runners), so they only take about half as long, and should still be
under 10 minutes.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6011>
2020-07-23 09:26:30 +00:00
Michel Dänzer
d9693c6620 ci: Do not mark container / pages jobs as interruptible
If another MR was merged while these were still running for the main
project, the result could be no updated images in the main project
registry (forcing a rebuild of the new images in all forked projects) or
an outdated Mesa website.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6011>
2020-07-23 09:26:30 +00:00
Michel Dänzer
e74933e8ab ci: Use FDO_CI_CONCURRENT in run-shader-db.sh as well
Noticed while checking job logs for it being used elsewhere.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6011>
2020-07-23 09:26:30 +00:00
Tomeu Vizoso
429ec827d4 ci: Namespace trace artifacts to the job number
Put artifacts in a per-job folder, because if a job is retried then it
will try to upload a file to the same key and fail with the following
error:

403 Client Error: Forbidden for url:
https://minio-packet.freedesktop.org/artifacts/daenzer/mesa/180609/gl-panfrost-t860/results.yml

Also, to prevent in the future similar clashes if several trace files
share the same name, upload the images with their checksums as their
names. This will also make it easier to fetch images for comparison with
the references.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6029>
2020-07-23 09:04:33 +00:00
Mike Blumenkrantz
772ed657a2 nir_ allow nir_lower_clip_halfz to run in tess eval shader
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6027>
2020-07-23 08:41:17 +00:00
Mike Blumenkrantz
09ecfd95ee nir: allow lower_psiz_mov to run in tessellation stages
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6027>
2020-07-23 08:41:17 +00:00
Dave Airlie
fced3c43e7 Revert "llvmpipe: Use the default behavior of ALLOW_MAPPED_BUFFERS."
This reverts commit 6ec4906649.

This broke:
GTF-GL45.gtf21.GL3Tests.texture_lod_bias.*

not sure why but revert for now.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6042>
2020-07-23 16:10:12 +10:00
Dave Airlie
be6c53bb9d llvmpipe/ms: fix sign extension bug in rasterizer.
/glcts --deqp-surface-width=1024 --deqp-surface-height=64  --deqp-case=KHR-GL45.texture_view.view_sampling  --deqp-surface-type=fbo
was failing but only for width 1024.

The test was filling a 4x4 ms texture, but leaving the viewport set to 1024x64.

This was resulting in this code incorrectly sign extending a value, and passing
it into the mask generator and getting the wrong values. Explicit cast
avoids the sign extension and fixes the above test.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6006>
2020-07-23 01:50:28 +00:00
Francisco Jerez
4d73988f6f intel/ir/gen12+: Work around FS performance regressions due to SIMD32 discard divergence.
This avoids some performance regressions on Gen12 platforms caused by
SIMD32 fragment shaders reported in titles like Dota2, TF2, Xonotic,
and GFXBench5 Car Chase and Aztec Ruins.

The most obvious pattern in the regressing shaders I identified among
these workloads is that they all had non-uniform discard statements,
which are handled rather optimistically by the current IR analysis
pass: No penalty is currently applied to the SIMD32 variant of the
shader in the form of differing branching weights like we do for other
control flow instructions in order to account for the greater
likelihood of divergence of a SIMD32 shader.

Simply changing that by giving the same treatment to discard
statements as we give to other branching instructions seemed to hurt
more than it helped on platforms earlier than Gen12, since it reversed
most of the improvement obtained from SIMD32 fragment shaders in
Manhattan for no measurable benefit in other workloads (Manhattan has
a handful of shaders with statically non-uniform discard statements
which actually perform better in SIMD32 mode due to their approximate
dynamic uniformity).  For that reason this change is applied to Gen12+
platforms only.

I've been running a number of tests trying to understand the
difference in behavior between Gen12 and earlier platforms, and most
of the evidence I've gathered seems to point at EU fusion being the
culprit: Unlike previous generations, on Gen12 EUs are arranged in
pairs which execute instructions in lockstep, giving an effective warp
size of 64 threads in SIMD32 mode, which seems to increase the
likelihood for control flow divergence in some of the affected shaders
significantly.

Fixes: 188a3659ae "intel/ir: Import shader performance analysis pass."
Reported-by: Caleb Callaway <caleb.callaway@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5910>
2020-07-23 01:40:06 +00:00
Adam Jackson
45d159cb41 glx: Fix build and warnings with -Dglx=dri -Dglx-direct=false
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5958>
2020-07-23 01:23:12 +00:00
Eric Anholt
ba22f014f9 softpipe: Enable PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS;
tgsi_exec.c uses the generic src load path for indirects, so we don't
actually need addr regs.  Saves extra intructions.

shader-db results:
total instructions in shared programs: 3346685 -> 3249052 (-2.92%)
instructions in affected programs: 961832 -> 864199 (-10.15%)

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6018>
2020-07-23 00:24:26 +00:00
Eric Anholt
8e61fd92d4 softpipe: Enable PIPE_CAP_TGSI_TEXCOORD.
The tgsi_exec path can handle it, and otherwise when we start using NIR
our MAX_VARYINGS value will cause us to have VARYING_SLOT_VARx above the
maximum.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6018>
2020-07-23 00:24:26 +00:00
Eric Anholt
259a03b4f0 softpipe: Add support for reporting shader-db output.
In doing the softpipe NIR and NIR-to-TGSI transition, I want to make sure
I don't make shaders significantly worse, so I need shader-db output.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6018>
2020-07-23 00:24:26 +00:00
Eric Anholt
991def0edc softpipe: Convert to comma-separated SOFTPIPE_DEBUG for debug options.
This makes us more like other drivers, and avoids having tons of different
names (particularly when you want to dump vs and fs in debugging).  In the
process, having a debug flag for vertex shaders just falls out.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6018>
2020-07-23 00:24:26 +00:00
Eric Anholt
86cfb62b87 softpipe: Refactor pipe_shader_state setup.
We had repeated code that I want to repeatedly change for adding
nir-to-tgsi.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6018>
2020-07-23 00:24:26 +00:00
Dave Airlie
e67da8d25f llvmpipe: enable robust buffer access + GL 4.3, GLES 3.2 and robust buffer access behaviour
Turning on robust buffer access enables GLES 3.2, also
finished GL 4.3 support.

The post depth coverage fail is expected, it's a test bug
This also introduce a fail in the invalid flag test that I can't reproduce out of CI.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5971>
2020-07-23 00:04:49 +00:00
Dave Airlie
6d3cefe727 llvmpipe: add device reset query context hook.
Add the device reset query hook needed for robustness

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5971>
2020-07-23 00:04:49 +00:00
Dave Airlie
3cb3d17312 glx/drisw: add robustness support
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5971>
2020-07-23 00:04:49 +00:00
Dave Airlie
80f7b58d90 drisw: add robustness extension support.
Port the code from dri2 so that drisw drivers can support the
robustness extension

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5971>
2020-07-23 00:04:49 +00:00
Dave Airlie
12c06a0deb llvmpipe/draw: handle constant buffer limits and robustness (v1.1)
TGSI expect vec4 of constants for it's current code paths, and when
doing indirect accesses it does the comparison on vec4 indexes,
however NIR does the indexing on packed float indexes.

This also align the compute path with the other shaders, and
should improve robustness (at least under Vulkan)

Fixes:
KHR-NoContext.gl43.robust_buffer_access_behavior.uniform_buffer

v1.1:
rename variable to something more meaningful (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5971>
2020-07-23 00:04:49 +00:00
Dave Airlie
f0c3a25800 llvmpipe: enable EXT_texture_shadow_lod
The driver passes all the CTS tests for this.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5971>
2020-07-23 00:04:49 +00:00
Jason Ekstrand
c30824adc0 nir/lower_io: Add support for global scratch addressing
This provides an alternate lowering for scratch in which it uses global
reads/writes and bases scratch addresses on a base pointer.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5927>
2020-07-22 23:43:35 +00:00
Jason Ekstrand
4815ae51d7 nir/lower_io: Use b2b for shader and function temporaries
This way we can avoid some unnecessary conversions because there's no
need to sanitize to 0/1 for scratch.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5927>
2020-07-22 23:43:35 +00:00
Jason Ekstrand
3a2975db98 nir/lower_io: Choose to set access based on intrinsic metadata
This should be far more reliable than trying to keep opcode lists
up-to-date.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5927>
2020-07-22 23:43:35 +00:00
Jason Ekstrand
c475e29be4 nir: Allow for system values with variable numbers of destination components
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5927>
2020-07-22 23:43:35 +00:00
Eric Engestrom
0338db5e6b docs/releasing: improve wording
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5833>
2020-07-22 21:55:58 +00:00
Eric Engestrom
ae2d045767 bin/gen_release_notes: automatically commit release notes
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5833>
2020-07-22 21:55:58 +00:00
Eric Engestrom
5f649be7b5 post_version.py: fix relnotes links
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5928>
2020-07-22 21:51:24 +00:00
Eric Engestrom
6c4ad62723 post_version.py: update the files in the current worktree, not the one with the script that we run
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5928>
2020-07-22 21:51:24 +00:00
Eric Engestrom
a28a089814 post_version.py: stop using non-existent functions and fix commit message
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5928>
2020-07-22 21:51:24 +00:00
Eric Engestrom
f5353e01f9 post_version.py: drop incorrect conf.py changes
This needs to be done in the mesa3d.org repo; see
https://gitlab.freedesktop.org/mesa/mesa3d.org/-/merge_requests/19

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5928>
2020-07-22 21:51:24 +00:00
Eric Engestrom
24e118f695 post_version.py: don't generate relnotes twice
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5928>
2020-07-22 21:51:24 +00:00
Eric Engestrom
04e38eb2e7 docs: update calendar and link releases notes for 20.1.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6034>
2020-07-22 23:07:14 +02:00
Eric Engestrom
8a44983c12 docs: add release notes for 20.1.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6034>
2020-07-22 23:05:33 +02:00
Andres Gomez
b6b100ccae gitlab-ci: Test AMD's Raven with traces
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6014>
2020-07-22 20:13:17 +00:00
Eric Anholt
eb7642c53d i915: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.
The exception is the texel/gather offsets and stream output
components, which will not be exposed since we don't expose the
corresponding GLSL version.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
e35d3d26b1 svga: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
c32f723a1a swr: Use the default behavior of ALLOW_MAPPED_BUFFERS.
Since this is a software rasterizer, we really don't care whether the
buffers are "mapped" since it's just malloc.  This will drop a bit of
pointless CPU overhead to throw errors.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
39598a16e9 swr: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
e2ffd2110e virgl: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.

Reviewed-by Gert Wollny <gert.wollny@collabora.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
e5554e32c0 softpipe: Use the default behavior of ALLOW_MAPPED_BUFFERS.
Since this is a software rasterizer, we really don't care whether the
buffers are "mapped" since it's just malloc.  This will drop a bit of
pointless CPU overhead to throw errors.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
855f3ff418 softpipe: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
6ec4906649 llvmpipe: Use the default behavior of ALLOW_MAPPED_BUFFERS.
Since this is a software rasterizer, we really don't care whether the
buffers are "mapped" since it's just malloc.  This will drop a bit of
pointless CPU overhead to throw errors.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
ae919b2561 llvmpipe: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who uses a cap.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Tomeu Vizoso
292882f6bc ci: Fix the overwriting of traces.yml for baremetal
When the lava files were moved out of the container, this stopped
working which caused the traces job for Freedreno to not run any traces
at all.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Fixes: dcd171f5e9 ("gitlab-ci: More stable URL for kernel and ramdisk artifacts, for LAVA")
Acked-by: Andres Gomez <agomez@igalia.com>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6021>
2020-07-22 18:07:31 +00:00
Eric Anholt
262731be43 ci: Update checksums for freedreno traces.
Hand-verified by looking at our artifacts compared to an i965 capture I
had.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6021>
2020-07-22 18:07:31 +00:00
Thong Thai
46646123ab radeon/vcn: increase render_pic_list size
Increase the maximum number of possible decoder reference picture
frames from 16 to 32.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6016>
2020-07-22 17:17:50 +00:00
Marek Olšák
89d2dac554 radeonsi: enable preemption if the kernel enabled it
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:33 -04:00
Marek Olšák
9e2113c6dc radeonsi: set up IBs for preemption
- Execute cs_preamble_state as a separate IB with different flags.
- Set the PREEMPT flag for the main IB.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:33 -04:00
Marek Olšák
b8892bc818 radeonsi: don't restore states at the beginning of IBs if they're shadowed
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:33 -04:00
Marek Olšák
95c9048591 radeonsi: add debug code for register shadowing
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:33 -04:00
Marek Olšák
8af0f91fd3 radeonsi: add reg shadowing codepaths to GS and tess ring setup
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:33 -04:00
Marek Olšák
69014d8c94 radeonsi: implement CP register shadowing
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
b84dbd2936 radeonsi: reorder code in update_gs_ring_buffers and init_tess_factor_ring
to reduce the churn when adding codepaths for shadowed registers

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
babd87f2e0 radeonsi: make cs_preamble_state optional
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
7a6af4c5ed winsys/amdgpu: make amdgpu_bo_unmap non-static
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
5a5467ccc8 ac: add tables for CP register shadowing
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
dc3dade475 ac: add helper ac_get_register_name
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
976edae839 radeonsi: sort registers in si_init_cs_preamble_state according to GPU gen
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
88fe9dea7a radeonsi: sort registers in si_emit_initial_compute_regs according to GPU gen
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
1c6eca23fd radeonsi/gfx10: set the correct value for OFFCHIP_BUFFERING
Copied from PAL. Higher values break tessellation, which I was only able
to reproduce with register shadowing enabled.

Fixes: 0bf3e6fae7 "radeonsi/gfx10: double the number of tessellation offchip buffers per SE"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
d244a25c07 radeonsi: add missing initialization of registers
(random initial gfx10 commit:)
Fixes: 78cdf9a99f - amd/addrlib: add gfx10 support

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Erik Faye-Lund
fd20e98624 docs: add some very basic documentation about zink
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5967>
2020-07-22 15:20:00 +00:00
Samuel Pitoiset
202592a398 radv/winsys: be more robust when a CS failed during recording
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5872>
2020-07-22 15:06:20 +00:00
Samuel Pitoiset
f82eb7af87 radv/winsys: return a Vulkan error code when binding virtual buffers/images
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5872>
2020-07-22 15:06:20 +00:00
Samuel Pitoiset
4b58e35a2a radv/winsys: remove useless check when binding virtual buffers/images
Size must be greater than 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5872>
2020-07-22 15:06:20 +00:00
Samuel Pitoiset
f0112fa13c radv/winsys: check more allocation failures
While we are at it, use local variables first to make sure to
not leak memory if something bad happens.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5872>
2020-07-22 15:06:20 +00:00
Samuel Pitoiset
7a61e31d7b radv: add missing return values check for some winsys calls
Make sure to handle errors properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5872>
2020-07-22 15:06:20 +00:00
Danylo Piliaiev
348e8b5618 nir/tests: Add tests for opt_if_simplification
Test cases:

opt_if_simplification - the most trivial test case.

opt_if_simplification_single_source_phi_after_if - tests that
opt_if_simplification correctly handles single-source phis after
the if, found in https://gitlab.freedesktop.org/mesa/mesa/-/issues/3282

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5945>
2020-07-22 14:20:21 +00:00
Danylo Piliaiev
6f94b3da11 nir/opt_if: Fix opt_if_simplification when else branch has jump
Consider the following case:

 if ssa_1 {
    block block_2:
    /* succs: block_4 */
 } else {
    block block_3:
    ...
    break
    /* succs: block_5 */
 }

 block block_4:
 vec1 32 ssa_100 = phi block_2: ssa_2

After block_3 extraction and reinsertion, phi->pred becomes invalid
and isn't updated by reinsertion since it is unreachable from block_3.

Call nir_opt_remove_phis_block before moving block to eliminate single
source phis after the if.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3282
Fixes: e3e929f8c3
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5945>
2020-07-22 14:20:21 +00:00
Mike Blumenkrantz
3f783a3c50 zink: omit Lod image operand in ntv when not using an image texture dim
according to spec, this is invalid (and it's not being used anyway)

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>
2020-07-22 14:01:29 +00:00
Mike Blumenkrantz
0ef5e19874 zink: add some asserts for building access chains in ntv
we're never going to pass a 0 here, and it's going to be an error if we do

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>
2020-07-22 14:01:29 +00:00
Mike Blumenkrantz
2af22051c0 zink: handle texelFetchOffset with offsets
we need to explicitly add the offset in this case since it's not available
as a spirv param

fixes spec@glsl-1.30@execution@fs-texelfetchoffset-2d

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>
2020-07-22 14:01:29 +00:00
Mike Blumenkrantz
6587f41e11 zink: use helper function to handle uvec/bvec types
bit_size of 1 means we use a bool type here, 32 means uint, so we can just
handle that automatically for all relevant cases

ref shaders@glsl-vs-continue-in-switch-in-do-while

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>
2020-07-22 14:01:29 +00:00
Daniel Schürmann
7015d2c249 aco: fix scratch loads which cross element_size boundaries
Previously, we've set element_size == 16 which causes loads from
packed vec3 arrays to cross the boundary and return wrong data.
This patch sets element_size = 4 and splits loads into single channel.
Fixes all of dEQP-VK.subgroups.ballot_broadcast.*

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5977>
2020-07-22 13:12:25 +00:00
Erik Faye-Lund
c33e8d7d52 mesa/program: fix shadow property for samplers
When creating a sampler-type, we need to pass the correct vaclue for
the "is_shadow"-parameter to glsl_sampler_type(), otherwise the compiler
backend will have no clue about this being a shadow-sampler.

Fixes: 1c0f92d8a8 ("nir: Create sampler variables in prog_to_nir.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5986>
2020-07-22 12:51:51 +00:00
Tomeu Vizoso
4b04800efa ci: Disable trace testing on Mali T760
The machine is showing random mis-renderings and we don't have time now
to investigate. Comment it out for now so CI pipelines don't fail due to
it.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6023>
2020-07-22 12:31:57 +00:00
Samuel Pitoiset
6c1108d25b radv: advertise VK_EXT_shader_atomic_float
No hw support for float atomic add for buffer and (sparse) images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6000>
2020-07-22 10:20:58 +02:00
Samuel Pitoiset
b8517e5ef9 ac/nir: add support for nir_intrinsic_shared_atomic_fadd
Only LLVM 10+ has support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6000>
2020-07-22 10:20:53 +02:00
Samuel Pitoiset
7615f2d690 aco: add support for nir_intrinsic_shared_atomic_fadd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6000>
2020-07-22 10:01:59 +02:00
Tomeu Vizoso
97482c6f92 ci: Test with more traces
Use some more traces from traces-db in the existing jobs.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6008>
2020-07-22 05:57:41 +00:00
Tomeu Vizoso
87e0b2c1c2 ci: Prefix tracie artifacts with the device name
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6008>
2020-07-22 05:57:41 +00:00
Tomeu Vizoso
ed5374ff50 ci: Use smaller glxgears trace
A smaller version of this trace has been pushed to traces-db, so update
to use this instead.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6008>
2020-07-22 05:57:41 +00:00
Tomeu Vizoso
dfe394bac4 ci: Upload images of failed replays to MinIO
For the llvmpipe and virgl jobs.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6008>
2020-07-22 05:57:41 +00:00
Rhys Kidd
7dc4fe6fb4 nvc0: add documentation for nve4+ (Kepler) COPY class
Has been utilised within nouveau in place of the former M2MF class, which was
dropped for Kepler in PGRAPH in favour of:

  - a new P2MF object that only does simple upload; and
  - PCOPY took over responsibility of M2MF's other DMA functions.

Autogenerated headers from envytools commit 32659e654170cb03038ccf2cb165decd3a2409d6

NVIDIA documentation released at:
  https://github.com/NVIDIA/open-gpu-doc/blob/master/classes/dma-copy/cla0b5.h

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5982>
2020-07-22 05:49:08 +00:00
Rhys Kidd
203d565b19 nvc0: fix macro define for NVE4_COPY()
Fixes: e44089b2f7 ("nvc0: add initial support for nve4+ (Kepler) chipsets")
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5982>
2020-07-22 05:49:08 +00:00
Lionel Landwerlin
3a4024e776 anv: properly handle fence import of sync_fd = -1
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 43e8808b82 ("anv: Add support for the SYNC_FD handle type for fences")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5964>
2020-07-22 05:07:05 +00:00
Bas Nieuwenhuizen
323d5bbfd9 meson: Add mising git_sha1.h dependency.
Fixes: 606dff1b73 "vulkan/overlay: Add support for a control socket."
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6019>
2020-07-22 00:02:26 +00:00
Rhys Perry
12b99d2581 aco: fix includes in aco_ir.cpp
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3300
Fixes: e75946cfef ('aco: move some setup code into helpers')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6015>
2020-07-21 22:15:55 +00:00
Jonathan Marek
8fff8afb13 turnip: disable tiling for NV12/IYUV formats
The last change to my previous MR to disable UBWC for the formats ended up
breaking a few tests for A640 at least, because tiled-but-not-UBWC can be
broken in some cases.

Fixes: 1a83279da5 ("turnip: enable 420_UNORM formats")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5817>
2020-07-21 20:08:07 +00:00
Connor Abbott
b559d26c74 freedreno/ir3: Fix SSBO size for bindless SSBO's
We theoretically could push these sizes to the const file
opportunistically, which appears to be what the blob does, but the
maximum number of SSBO's is way too big to do that unconditionally. Just
use resinfo to get the size for now.

Fixes on turnip: dEQP-VK.ssbo.unsized_array_length.*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6012>
2020-07-21 19:53:32 +00:00
Rhys Perry
c11c4d8d4c aco: fix copy of uninitialized boolean
This should be harmless but UBSan seems to complain.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6013>
2020-07-21 19:38:43 +00:00
Rhys Perry
40b65a86a4 radv: fix invalid conversion warnings in vk_format.h
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6013>
2020-07-21 19:38:43 +00:00
Rhys Perry
fcd8f69113 aco: print ACO IR before scheduling instead of after
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6013>
2020-07-21 19:38:43 +00:00
Rhys Perry
bf4b377b9b aco: make validate() usable in tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6013>
2020-07-21 19:38:43 +00:00
Rhys Perry
e75946cfef aco: move some setup code into helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6013>
2020-07-21 19:38:43 +00:00
Luigi Santivetti
2907faee7a egl/dri2: try to bind old context if bindContext failed
This change mostly touches error handling code paths, where a
bug was found when the DRI driver failed to bind a new DRI
context. Specifically, the reason for it to fail was the window
system unable (for whatever reason) to provide the DRI drawable
with a buffer. In this instance, Mesa un-does the EGL bindings,
but doesn't restore the old DRI context, hence remaining in a
funny state. It's worth mentioning that despite trying, there
is no guarantee that the old DRI context can be restored,
depending on the runtime.

Before this change, if bindContext() failed then
dri2_make_current() would rebind the old EGL context and
surfaces and return EGL_BAD_MATCH. However, it wouldn't rebind
the DRI context and surfaces, thus leaving it in an
inconsistent and unrecoverable state.

After this change, dri2_make_current() tries to bind the old
DRI context and surfaces when bindContext() failed. If unable
to do so, it leaves EGL and the DRI driver in a consistent
state, it reports an error and returns EGL_BAD_MATCH.

Fixes: 4e8f95f64d ("egl_dri2: Always unbind old contexts")

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5707>
2020-07-21 18:42:03 +00:00
Luigi Santivetti
8b0b6f907d dri2: do not conflate unbind and bindContext() failure
dri2_make_current() has become hard to follow, address this by
splitting the semantic of needing a call to bindContext() and
its failure.

Cc: mesa-stable
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5707>
2020-07-21 18:42:03 +00:00
Luigi Santivetti
6b12999ef7 dri2: dri2_make_current() fold multiple if blocks
dri2_make_current() has become long and convoluted. Address
this by folding together multiple if blocks checking for the
same variable.

Cc: mesa-stable
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5707>
2020-07-21 18:42:03 +00:00
Rhys Perry
29c39aeaab aco: use nir_addition_might_overflow to combine additions into SMEM
fossil-db (Navi):
Totals from 24656 (18.14% of 135946) affected shaders:
CodeSize: 120077160 -> 118877304 (-1.00%); split: -1.01%, +0.01%
Instrs: 23192657 -> 22979553 (-0.92%); split: -0.94%, +0.02%
VMEM: 165151115 -> 151861460 (-8.05%); split: +0.14%, -8.19%
SMEM: 18133265 -> 16709635 (-7.85%); split: +0.28%, -8.13%
VClause: 385011 -> 384447 (-0.15%); split: -0.16%, +0.02%
SClause: 954884 -> 838266 (-12.21%); split: -12.34%, +0.12%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2720>
2020-07-21 18:25:35 +00:00
Rhys Perry
72ac3f6026 nir: add nir_unsigned_upper_bound and nir_addition_might_overflow
This adds a nir_unsigned_upper_bound() helper which does something similar
to nir_analyze_range() except it tries to obtain the largest possible
value instead of it's relation to zero.

It also adds nir_addition_might_overflow(), which uses this helper to try
to prove that an unsigned addition does not wrap around.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2720>
2020-07-21 18:25:35 +00:00
Rhys Perry
2694a34aa2 aco: add NUW flag
This (combined with a pass to actually set the corresponding NIR flags)
should help fix a lot of the regressions from the SMEM addition combining
change.

fossil-db (Navi):
Totals from 12 (0.01% of 135946) affected shaders:
CodeSize: 12376 -> 12304 (-0.58%)
Instrs: 2436 -> 2422 (-0.57%)
VMEM: 1105 -> 1096 (-0.81%)
SClause: 133 -> 130 (-2.26%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2720>
2020-07-21 18:25:35 +00:00
Rhys Perry
3a4847179b aco: allow overflow for some SMEM instructions
fossil-db (Navi):
Totals from 10184 (7.49% of 135946) affected shaders:
CodeSize: 83419748 -> 82430824 (-1.19%); split: -1.19%, +0.01%
Instrs: 16054612 -> 15908523 (-0.91%); split: -0.93%, +0.02%
VMEM: 1608018 -> 1581829 (-1.63%); split: +0.20%, -1.83%
SMEM: 577031 -> 563492 (-2.35%); split: +0.10%, -2.45%
VClause: 242643 -> 242512 (-0.05%); split: -0.06%, +0.00%
SClause: 640966 -> 569897 (-11.09%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2720>
2020-07-21 18:25:35 +00:00
Rhys Perry
d169f09e37 aco: be more careful combining additions that could wrap into loads/stores
SMEM does the addition with 64-bits, not 32. So if the original code
relied on wrapping around (for example, for subtraction), it would break.

Apparently swizzled MUBUF accesses also have issues with combining
additions that could overflow. Normal MUBUF accesses seem fine.

fossil-db (Navi):
Totals from 27219 (20.02% of 135946) affected shaders:
CodeSize: 128303256 -> 131062756 (+2.15%); split: -0.00%, +2.15%
Instrs: 24818911 -> 25280558 (+1.86%); split: -0.01%, +1.87%
VMEM: 162311926 -> 177226874 (+9.19%); split: +9.36%, -0.17%
SMEM: 18182559 -> 20218734 (+11.20%); split: +11.53%, -0.34%
VClause: 423635 -> 424398 (+0.18%); split: -0.02%, +0.20%
SClause: 865384 -> 1104986 (+27.69%); split: -0.00%, +27.69%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2748
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2720>
2020-07-21 18:25:35 +00:00
Andres Gomez
4d0e06257a gitlab-ci/traces: updated paths and checksums for POLARIS10 traces
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5890>
2020-07-21 16:41:22 +00:00
Andres Gomez
f1e67aa08a gitlab-ci: get the last frame from a gfxr trace using gfxrecon-info
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5890>
2020-07-21 16:41:22 +00:00
Andres Gomez
d15e1226cc gitlab-ci: build gfxreconstruct from the "dev" branch
We want to use the fix for
https://github.com/LunarG/gfxreconstruct/issues/328 while it is yet
not available in the "master" branch.

Additionally, we get the gfxreconstruct-info tool as an extra.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5890>
2020-07-21 16:41:22 +00:00
Connor Abbott
bb5b136b45 freedreno: Use common guardband helper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5950>
2020-07-21 14:26:18 +00:00
Connor Abbott
c9c848dede tu: Use common guardband helper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5950>
2020-07-21 14:26:18 +00:00
Connor Abbott
19895dde90 freedreno: Add a helper for computing guardband sizes
This should be much better than the previous method that was more
guesswork-based than anything else. It returns a value within 1 of the
blob for every input value I've tested, and it seems like it returns
slightly better (but still legal) answers when it differs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5950>
2020-07-21 14:26:18 +00:00
Alyssa Rosenzweig
86a6597714 panfrost: Remove unused batch_fence->ctx
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>
2020-07-21 13:57:43 +00:00
Alyssa Rosenzweig
f18e5371cf panfrost: Remove unused batch_fence->signaled
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>
2020-07-21 13:57:43 +00:00
Alyssa Rosenzweig
64d6f56ad2 panfrost: Allocate syncobjs in panfrost_flush
For implementing panfrost_flush, it suffices to wait on only a single
syncobj, not an entire array of them. This lets us wait on it directly,
without coercing to/from syncfds in the middle (although some complexity
may be added later to support Android winsys).

Further, we should let the fence own the syncobj, tying together the
lifetimes and thus removing the connection between syncobjs and
batch_fence.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>
2020-07-21 13:57:43 +00:00
Alyssa Rosenzweig
85a2216fe4 panfrost: Skip specifying in_syncs
With the current kernel UABI, there is no benefit to explicitly
specifiying dependencies, since the kernel by design adds implicit
dependencies to any referenced BOs. This is something we'd like to
address in the future, but efficient handling with future kernels will
require a tweaked design in userspace as well. So let's do the obvious
thing now, and extend later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>
2020-07-21 13:57:43 +00:00
Alyssa Rosenzweig
e5ef5a381e panfrost: Remove wait parameter to flush_all_batches
It is always false now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>
2020-07-21 13:57:43 +00:00
Alyssa Rosenzweig
0c4db886b6 panfrost: Avoid wait=true flushing all batches
What is intended is to flush the batches and wait on a particular BO at
a later time. Explicitly forcing a wait immediately is redundant.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>
2020-07-21 13:57:43 +00:00
Rhys Perry
04ea4f1ce4 aco: implement b2i8/b2i16
Fixes lots of tests under dEQP-VK.spirv_assembly.type.*

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5993>
2020-07-21 12:27:30 +00:00
Karol Herbst
3a7cd7bd65 nv50/ir: initialize persampleInvocation to false
Fixes: random KHR-GL45.sample_variables.mask.* fails
Fixes: 66ed9792ed ("nv50: Clear nv50_ir_prog_info of dead and codegen specific variables")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6001>
2020-07-21 12:16:54 +00:00
Karol Herbst
618b355504 nv50/ir/tgsi: silence warning about unhandled GS_INPUT_PRIM property
Fixes: 66ed9792ed ("nv50: Clear nv50_ir_prog_info of dead and codegen specific variables")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6001>
2020-07-21 12:16:54 +00:00
Samuel Pitoiset
6ced98c94e radv: disable CPU caching for the upload BO to reduce fetch latency
AMDGPU_GEM_CREATE_CPU_GTT_USWC should be faster when CPU reads
are unexpected (because they aren't cached).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5978>
2020-07-21 11:54:39 +00:00
Samuel Pitoiset
b3eae4e037 radv: do not perform read-modify-write with the upload BO
To disable CPU caching.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5978>
2020-07-21 11:54:39 +00:00
Rhys Perry
d9072a113b radv: replace discard with demote for Quantic Dream games
Detroit: Become Human uses dFdx/dFdy immediately after a quad-divergent
discard, which can cause the image to become white.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3212
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5991>
2020-07-21 11:34:23 +00:00
Rhys Perry
51bc11abc2 aco: always set FI on GFX10
bounds_ctrl is set to true by default which works around some game bugs,
but that isn't enough on GFX10.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5991>
2020-07-21 11:34:23 +00:00
Eric Anholt
8b3452a556 ci: Set XDG_CACHE_HOME to tmpfs for bare-metal runners to avoid NFS.
We don't want these files shared between builds (it'll get blown away by
the next rsync), and NFS will just increase our latency for hitting the
cache.

Drops a630 gles31 run from 11-17 minutes to 5.5.  Maximum cache size on a
run I've seen is 153M, which it seems we can easily spare.

Fixes: f97acb4bb4 ("freedreno/ir3: disk-cache support")
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5998>
2020-07-21 11:04:14 +00:00
Tomeu Vizoso
b2cd6a0b15 gitlab-ci: Fix needs: of the arm64 LAVA test jobs
They were still depending on arm_build, but the build of kernel and
rootfs has been moved to a separate job.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5472>
2020-07-21 09:22:19 +00:00
Tomeu Vizoso
a1947f059f gitlab-ci: Upload tracie artifacts to MinIO
Upload failed images and the results.yml file to MinIO, to facilitate
debugging.

Also, fix version checking when git is installed as Mesa is going to
output a different renderer string if git is installed.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5472>
2020-07-21 09:22:19 +00:00
Tomeu Vizoso
20507f8b17 gitlab-ci: Download traces from MinIO
Downloading the traces directly from git causes very high egress from
GCE, which is expensive.

So we can expand trace testing further, we are going to keep a cache in
freedesktop.org's MinIO instance. This commit implements downloading
from it.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5472>
2020-07-21 09:22:18 +00:00
Rohan Garg
087be7e322 gitlab-ci: Replay traces on lava devices
Submit lava jobs to replay traces on Veyron (Mali T760) and Kevin (Mali
T860) boards.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5472>
2020-07-21 09:22:18 +00:00
Kenneth Graunke
576c53dadf iris: Fix CCS check in iris_texture_subdata().
The intention here was to check "Would the GPU be able to compress
this if we used the PBO-based texture upload path?"  Prior to Gen12,
that meant checking for CCS_E.  On Gen12, there are a lot more types
of compression, and basic CCS_E was replaced by GEN12_CCS_E, making
this check simply not work, so we'd take the CPU path instead.

Instead, check if it has CCS, and isn't the basic "fast clear" CCS_D.

Fixes: 39f06e2848 ("iris: Implement pipe->texture_subdata directly")
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6005>
2020-07-21 09:10:37 +00:00
Rhys Perry
0868638aed nir/lower_int64: lower 64-bit amul
Fixes an issue with Renderdoc's shader debugging with ACO.

If nir_opt_algebraic isn't called in-between nir_lower_explicit_io and
nir_lower_int64, we can end up with 64-bit multiplications.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 6320e37d4b ('nir: add amul instruction')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5709>
2020-07-21 06:47:10 +00:00
Jason Ekstrand
4d44848c47 anv: Advertise support for VK_EXT_shader_atomic_float
We already have all of the shader code for load/store/exchange.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5992>
2020-07-21 05:01:34 +00:00
Jason Ekstrand
675d7b19a9 intel/fs: Use the correct logical op for global float atomics
Fixes: e644ed468f "intel/fs: Implement nir_intrinsic_global_atomic_*"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5992>
2020-07-21 05:01:34 +00:00
Jason Ekstrand
84086b620e spirv: Add support for SPV_EXT_shader_atomic_float
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5992>
2020-07-21 05:01:34 +00:00
Jason Ekstrand
2a568c595b spirv: Update headers and grammar json
This pulls in commit 63cb1fc131573fa from KhronosGroup/SPIRV-Headers

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5992>
2020-07-21 05:01:34 +00:00
Eric Engestrom
cc03448008 egl: inline _EGLAPI into _EGLDriver
_EGLDriver was an empty wrapper around _EGLAPI, so let's only keep one
of them. "driver" represents better what's being accessed, so that's the
one we're keeping.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5987>
2020-07-21 00:59:43 +00:00
Bas Nieuwenhuizen
7b7917a424 radeonsi: Inhibit clock-gating for perf counters.
Otherwise most counters return 0. Should be much more user friendly
than having to totally disable clock-gating on the kernel cmdline.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5972>
2020-07-20 23:56:26 +00:00
Bas Nieuwenhuizen
794ba3efd7 amd/registers: add RLC_PERFMON_CLK_CNTL for pre-GFX10
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5972>
2020-07-20 23:56:26 +00:00
Jason Ekstrand
36e6ac65c5 anv: Advertise VK_EXT_image_robustness
We already support a superset of VK_EXT_image_robustness via
VK_EXT_robustness2.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5985>
2020-07-20 22:30:18 +00:00
Eric Anholt
d973e50f69 freedreno/ir3: Add missing ld_args_build_id to the ir3_delay unit test.
It triggers the disk cache for me, and asserts abount not getting the
build id right.

Fixes: f97acb4bb4 ("freedreno/ir3: disk-cache support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5989>
2020-07-20 22:11:51 +00:00
Samuel Pitoiset
3688da2192 radv: advertise VK_EXT_image_robustness
All new dEQP-VK.robustness.image_robustness.* pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5979>
2020-07-20 21:18:27 +00:00
Christian Gmeiner
096adbe369 ci: bare-metal: use nginx to get results from DUT
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2655
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5661>
2020-07-20 20:21:12 +00:00
Yevhenii Kolesnikov
101400d449 mesa: change error code of *TextureSubImage* for incorreect target
According to the "Errors" list of the OpenGL 4.6 spec, section 8.6
"Alternate Texture Image Specification Commands":

An INVALID_OPERATION error is generated by *TextureSubImage* if the
effective target of texture does not match the command, as shown in table 8.15.

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5934>
2020-07-20 19:58:14 +00:00
Eric Anholt
af92348b1c freedreno/ir3: Fix disasm of register offsets in ldp/stp.
I had a stp testcase that was getting its offset wrong, and by twiddling
bits and feeding it to qc disasm, I found that the comment was sort of
right: some the cat6a bits implicated in the old comment do get used, as
the high bits of the cat6c offset.  Reallocating those bits also fixes how
we were getting r960.y for r0.y.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5815>
2020-07-20 19:42:45 +00:00
Eric Anholt
d6d8dc133e freedreno/ir3: Refactor cat6 general dst printing.
We didn't need the extra branch and temp, we can move it inside of the dst
handling by just duplicating the print of the dst reg.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5815>
2020-07-20 19:42:45 +00:00
Eric Anholt
62dcf75432 freedreno/ir3: Add a bunch more tests for cat6 opcodes.
This started with making note of some ldp/stp instructions from the blob
and how we differ from them.  In the process of fixing it, I accidentally
modified behavior of other opcodes, and the other instructions listed will
keep us from doing that.  I also dropped an old stl test that looks like I
took from after a shader 'end' instruction.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5815>
2020-07-20 19:42:45 +00:00
Eric Anholt
ed3338f581 freedreno/ir3: Add a note about the instructions in the disasm test.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5815>
2020-07-20 19:42:45 +00:00
Jason Ekstrand
4ab3a219cc vulkan: Update Vulkan XML and headers to 1.2.148
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5983>
2020-07-20 18:28:10 +00:00
Eric Anholt
fd24a95995 ci: Use FDO_CI_CONCURRENT as our -j flags when present in the runner env.
fd.o has retuned the x86 runners on packet for -j8.  Rather than having to
tweak our CI every time fd.o decides to rebalance job concurrency, respect
what the runner admin has chosen for their builds (this will also be
convenient for people with large local runners).

Reviewed-by: Michel Dänzer <michel@daenzer.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5669>
2020-07-20 17:22:17 +00:00
Daniel Schürmann
5f79e4e69a nir/algebraic: fold some nested bcsel
Totals from 14266 (10.62% of 134368) affected shaders (Polaris):
SGPRs: 761756 -> 762732 (+0.13%); split: -0.00%, +0.13%
VGPRs: 430392 -> 430924 (+0.12%); split: -0.05%, +0.17%
SpillSGPRs: 4652 -> 4628 (-0.52%); split: -0.60%, +0.09%
CodeSize: 30133000 -> 29949780 (-0.61%); split: -0.66%, +0.05%
MaxWaves: 102122 -> 102111 (-0.01%); split: +0.00%, -0.01%
Instrs: 5845085 -> 5841668 (-0.06%); split: -0.08%, +0.03%
Cycles: 69033140 -> 68889188 (-0.21%); split: -0.22%, +0.01%
VMEM: 8479021 -> 8474978 (-0.05%); split: +0.03%, -0.08%
SMEM: 831437 -> 830464 (-0.12%); split: +0.06%, -0.18%
VClause: 105411 -> 105410 (-0.00%); split: -0.01%, +0.01%
SClause: 327727 -> 327780 (+0.02%); split: -0.00%, +0.02%
Copies: 372704 -> 373306 (+0.16%); split: -0.16%, +0.32%
Branches: 112260 -> 112269 (+0.01%); split: -0.00%, +0.01%
PreSGPRs: 433308 -> 433631 (+0.07%); split: -0.01%, +0.09%
PreVGPRs: 397888 -> 397905 (+0.00%); split: -0.01%, +0.01%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>
2020-07-20 15:56:46 +00:00
Daniel Schürmann
27244662f2 nir/algebraic: propagate b2i out of ior/iand
Totals from 761 (0.57% of 134368) affected shaders (Polaris):
SGPRs: 29496 -> 29488 (-0.03%)
SpillSGPRs: 41 -> 43 (+4.88%)
CodeSize: 1922036 -> 1882408 (-2.06%); split: -2.08%, +0.02%
Instrs: 366051 -> 360362 (-1.55%); split: -1.57%, +0.02%
Cycles: 7692516 -> 7661216 (-0.41%); split: -0.41%, +0.01%
VMEM: 365175 -> 365172 (-0.00%)
VClause: 15324 -> 15322 (-0.01%)
SClause: 9825 -> 9824 (-0.01%); split: -0.02%, +0.01%
Copies: 41216 -> 41294 (+0.19%); split: -0.01%, +0.20%
Branches: 7020 -> 7033 (+0.19%)
PreSGPRs: 22103 -> 22106 (+0.01%)
PreVGPRs: 26518 -> 26515 (-0.01%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>
2020-07-20 15:56:46 +00:00
Daniel Schürmann
baee5a9812 nir/algebraic: add distributive rules for ior/iand
Totals from 581 (0.43% of 134368) affected shaders (Polaris):
CodeSize: 1389560 -> 1386488 (-0.22%)
Instrs: 264488 -> 263984 (-0.19%)
Cycles: 1057952 -> 1055936 (-0.19%)
VMEM: 296016 -> 291613 (-1.49%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>
2020-07-20 15:56:46 +00:00
Daniel Schürmann
70d3efeb88 nir/algebraic: optimize (a < 0.0) ? -a : a -> fabs(a)
Totals from affected shaders: (VEGA)
SGPRS: 13920 -> 13920 (0.00 %)
VGPRS: 10252 -> 10252 (0.00 %)
Spilled SGPRs: 62 -> 62 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 587648 -> 587224 (-0.07 %) bytes
LDS: 5 -> 5 (0.00 %) blocks
Max Waves: 1489 -> 1489 (0.00 %)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>
2020-07-20 15:56:46 +00:00
Daniel Schürmann
9d22c5ed71 nir/algebraic: optimize fmul(x, bcsel(c, -1.0, 1.0)) -> bcsel(c, -x, x)
Totals from affected shaders: (VEGA)
SGPRS: 545712 -> 545712 (0.00 %)
VGPRS: 413092 -> 413116 (0.01 %)
Spilled SGPRs: 10616 -> 10616 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 37031684 -> 36984248 (-0.13 %) bytes
LDS: 427 -> 427 (0.00 %) blocks
Max Waves: 54350 -> 54340 (-0.02 %)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>
2020-07-20 15:56:46 +00:00
Daniel Schürmann
56ec814b56 nir/algebraic: add some more unop + bcsel optimizations
Totals from affected shaders: (VEGA)
SGPRS: 284392 -> 284400 (0.00 %)
VGPRS: 261080 -> 261076 (-0.00 %)
Spilled SGPRs: 105 -> 105 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 24698596 -> 24277788 (-1.70 %) bytes
LDS: 196 -> 196 (0.00 %) blocks
Max Waves: 10101 -> 10105 (0.04 %)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>
2020-07-20 15:56:45 +00:00
Daniel Schürmann
2fca183910 nir/algebraic: add optimizations for fsign/isign
This just reverts fsign/isign lowering.

Totals from affected shaders:
SGPRS: 257496 -> 256672 (-0.32 %)
VGPRS: 181800 -> 178864 (-1.61 %)
Spilled SGPRs: 105 -> 105 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 11355852 -> 11141840 (-1.88 %) bytes
LDS: 3789 -> 3789 (0.00 %) blocks
Max Waves: 30453 -> 30951 (1.64 %)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>
2020-07-20 15:56:45 +00:00
Daniel Schürmann
8e1b75b330 nir/algebraic: optimize iand/ior of (n)eq zero
Found in some Detroit: Become Human shaders.

Totals from affected shaders:
SGPRS: 700256 -> 700256 (0.00 %)
VGPRS: 507208 -> 507212 (0.00 %)
Spilled SGPRs: 142531 -> 142531 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 76404616 -> 76301768 (-0.13 %) bytes
LDS: 43 -> 43 (0.00 %) blocks
Max Waves: 21438 -> 21438 (0.00 %)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>
2020-07-20 15:56:45 +00:00
Daniel Schürmann
e4281dbecc nir: also move b2i in case of nir_move_copies
Booleans are often more efficient with register usage.
This also allows to move comparisons further.

Totals from affected shaders: (VEGA)
SGPRS: 451608 -> 450320 (-0.29 %)
VGPRS: 351448 -> 351256 (-0.05 %)
Spilled SGPRs: 105 -> 105 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 1008 -> 1008 (0.00 %) dwords per thread
Code Size: 26555596 -> 26551080 (-0.02 %) bytes
LDS: 10323 -> 10323 (0.00 %) blocks
Max Waves: 42850 -> 42934 (0.20 %)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>
2020-07-20 15:56:45 +00:00
Daniel Schürmann
de0ebaf09d nir/algebraic: optimize bcsel(a, 0, 1) to b2i
This avoids combination with other bcsel operations,
and as b2i is often a no-op (when used for iadd and such),
the resulting pattern is preferable.

Totals from affected shaders: (VEGA)
SGPRS: 598448 -> 598448 (0.00 %)
VGPRS: 457940 -> 457352 (-0.13 %)
Spilled SGPRs: 127154 -> 127154 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 64836352 -> 64802728 (-0.05 %) bytes
LDS: 781 -> 781 (0.00 %) blocks
Max Waves: 22931 -> 22931 (0.00 %)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>
2020-07-20 15:56:45 +00:00
Icecream95
e764192f40 pan/mdg: Use the blend RT for blend shader framebuffer fetches
Fixes piglit test fbo-drawbuffers-blend-add when fixed-function
blending is disabled in panfrost_get_blend_for_context.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5892>
2020-07-20 14:15:49 +00:00
Icecream95
3ec252a3b2 panfrost: 8x MRT support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5892>
2020-07-20 14:15:49 +00:00
Icecream95
978f963ea4 panfrost: Use more tilebuffer sizes
This will be needed for 8x MRT with 128-bit framebuffer formats.

Adds support for 256-bit, 1024-bit, and 2048-bit tilebuffer allocations,
depending on the amount of data required.

v2: Squash commits (Alyssa)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5892>
2020-07-20 14:15:49 +00:00
Icecream95
c1d3d39e97 panfrost: Fake RGTC support
For most GPUs RGTC is disabled, so it needs to be emulated, using the
fake_rgtc option of u_transfer_helper.

Passes the rgtc-teximage tests in piglit.

v2: Update docs/features.txt (Alyssa)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5975>
2020-07-20 09:54:49 -04:00
Rhys Perry
fac813dc61 spirv: don't split memory barriers
If the SPIR-V had a shared+image memory barrier, we would emit two NIR
barriers: a shared barrier and an image barrier.

Unlike a single barrier, two barriers allows transformations such as:

intrinsic image_deref_store (ssa_27, ssa_33, ssa_34, ssa_32, ssa_25) (1)
intrinsic memory_barrier_shared () ()
intrinsic memory_barrier_image () ()
intrinsic store_shared (ssa_35, ssa_24) (0, 1, 4, 0)
->
intrinsic memory_barrier_shared () ()
intrinsic store_shared (ssa_35, ssa_24) (0, 1, 4, 0)
intrinsic image_deref_store (ssa_27, ssa_33, ssa_34, ssa_32, ssa_25) (1)
intrinsic memory_barrier_image () ()

This commit fixes two dEQP-VK.memory_model.* CTS tests with ACO.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5951>
2020-07-20 12:05:16 +00:00
Samuel Pitoiset
28c227c7ca radv/winsys: always allow GTT placements on APUs
When the VRAM size is small and the preferred heap only VRAM,
the kernel tries to always honor the requested heap and it does
a ton of evictions which is a disaster for performance.

On APUs, VRAM and GTT have similar performance, so allow the
kernel to choose the best placement (GTT or VRAM) itself.

This gives a huge performance boost with Doom Eternal on RAVEN.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5665>
2020-07-20 11:41:07 +00:00
Samuel Pitoiset
d1bba2eee7 radv: disable CPU caching for IBS to reduce fetch latency
AMDGPU_GEM_CREATE_CPU_GTT_USWC should be faster when CPU reads
are unexpected (because they aren't cached).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5959>
2020-07-20 11:23:19 +00:00
Pierre-Eric Pelloux-Prayer
d2a3ca289f radeonsi: adjust epitch for PIPE_FORMAT_R8G8_R8B8_UNORM
This fix si_compute_copy_image for yuyv image (so using PIPE_FORMAT_R8G8_R8B8_UNORM).

With this change, the following gst pipeline produce the expected results for various
image sizes (with or without AMD_DEBUG=nodma):

gst-launch-1.0 filesrc location=input.jpg ! jpegparse ! vaapijpegdec ! filesink location=output.yuv

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5841>
2020-07-20 10:32:44 +00:00
Pierre-Eric Pelloux-Prayer
87ecfdfbf0 ac/surface: adapt surf_size when modifying surf_pitch
Otherwise we might get VM_L2_PROTECTION_FAULT_STATUS errors.

Fixes: 8275dc1ed5 ("ac/surface: fix epitch when modifying surf_pitch")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5841>
2020-07-20 10:32:44 +00:00
Gert Wollny
1fa36c1d3d d600/sfn: write stream outputs to correct mem ring
Fixes: arb_gpu_shader5-xfb-streams
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Gert Wollny
21d296a481 r600/sfn: Make the pin_to_channel generic
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Gert Wollny
3ea847e6d1 r600/sfn: Only use sample mask if the according shader key is set
This fixes all the piglits from arb_sample_shading "samplemask * *"
with the nir backend.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Gert Wollny
c91979c634 r600: Add shader key item to identify when the sample mask should be used
The sample mask must be applied when more then one sample is available or
multisamplig is not enabled, so add a shader key to track this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Gert Wollny
05df4bfbca r600/sfn: Fix default z swizzle for GDS instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Gert Wollny
2779aa360e r600/sfn: Fix Ring output swizzle masks
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Gert Wollny
c18b1c6df5 r600/sfn: Add a forced output swizzle for depth write
This makes sure no components are written that shouldn't be written.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Gert Wollny
d31ef0b7a4 r600/sfn: correct handling of loading vec4 with fetching constants
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Gert Wollny
aca99e6fc9 r600/sfn: Add option to get a temp value for a specific channel
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Gert Wollny
258618815b r600/sfn: emit texture instructions in one block
Setting the offset must happen in the same CF like using it, so don't
emit ALU instruction between the tex instructions.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Gert Wollny
deccf02246 r600/sfn: Pipe through requesting a register at a given channel
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Gert Wollny
55cc712991 r600/sfn: lower rotate ALU ops
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5963>
2020-07-20 09:32:51 +00:00
Dave Airlie
4708ccbf91 ci/llvmpipe: reenable gpu shader5 tests
I hadn't realised these were disabled, llvmpipe now exposes this extension.

One additional failure is fine to get the added testing coverage.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5973>
2020-07-20 18:47:37 +10:00
Dave Airlie
41c7bb6ec0 llvmpipe: add framebuffer fetching support (v1.1)
v1.1:
Merge two if blocks (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5914>
2020-07-20 15:14:09 +10:00
Dave Airlie
0e0b6d477b llvmpipe/cs: respect render condition
Running complete CTS turned up a missing cond render.

Fixes KHR-GL45.compute_shader.conditional-dispatching

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5944>
2020-07-19 15:07:26 +10:00
Rob Clark
912ad09112 freedreno/ir3/ra: fix array conflicts for split/merged
Properly handle the difference between split and merged register file
when determining where arrays can fit without conflicting with other
arrays or pre-colored instructions.

1) if not mergedregs, only consider other things with same precision
   as potentially conflicting
2) if mergedregs, calculate everything in therms of half-regs and
   convert back to fullregs in the end

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5957>
2020-07-18 09:21:09 -07:00
Rob Clark
b1465c382b freedreno/ir3/ra: assign vreg names to all array elements
We shouldn't divide-by-two for half-reg arrays.  We set the proper node
interference class, based on `arr->half`.

Fixes a RA fail with 16b arrays:

  src/freedreno/ir3/ir3_ra.c:633: name_to_array: Assertion `!"invalid array name"' failed.

Caused by use/def iterators returning `arr->length` vreg namess, but
only assigning the array half that many names.

Also, since we are assigning unique vreg names to each array element,
there is no need to try and convert from half-reg to it's conflicting
full reg when pre-coloring the array elements.  Getting us closer to
having half-arrays work sanely with split-register-file (a5xx and
earlier).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5957>
2020-07-18 09:21:09 -07:00
Rob Clark
6317f7d574 freedreno/ir3/ra: debug msgs tweak
Print out the assigned vreg names earlier.  Also print the few special
nodes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5957>
2020-07-18 09:14:13 -07:00
Rob Clark
c2d94aa365 freedreno/ir3: fix half-reg array stores
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5957>
2020-07-18 09:14:13 -07:00
Rob Clark
5be171b888 freedreno/ir3: set array precision on creation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5957>
2020-07-18 09:14:13 -07:00
Rob Clark
0472ca2aa5 freedreno/ir3/parser: half-precision relative regs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5957>
2020-07-18 09:14:13 -07:00
Rob Clark
79b0651c24 freedreno: whitespace fix
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5957>
2020-07-18 09:11:35 -07:00
Rob Clark
835201dd76 freedreno: small comment re-word
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5957>
2020-07-18 09:11:35 -07:00
Mike Blumenkrantz
2b343238a1 zink: free all ntv allocations after creating shader module
these are all fairly large sources of leaks

Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5887>
2020-07-18 07:51:37 +00:00
Mike Blumenkrantz
adc4f3896a zink: free pipeline cache during program destroy
more leaks

Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5887>
2020-07-18 07:51:37 +00:00
Mike Blumenkrantz
1ff2d195b0 zink: destroy descriptor pools on context destroy
this is a big leak

Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5887>
2020-07-18 07:51:37 +00:00
Mike Blumenkrantz
7116decfce zink: destroy gfx program when a shader is freed
there's no sense in having these objects sitting around when they can
never be used again

requires adding a zink_context* pointer to each program in order to prune
the hash table entry

Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5887>
2020-07-18 07:51:37 +00:00
Mauro Rossi
9e9c8e2f79 android: panfrost/encoder: add libmesa_nir static dependency
Fixes the following build error:

In file included from external/mesa/src/panfrost/encoder/pan_blit.c:34:
In file included from external/mesa/src/panfrost/encoder/../midgard/midgard_compile.h:27:
external/mesa/src/compiler/nir/nir.h:52:10: fatal error: 'nir_opcodes.h' file not found
         ^~~~~~~~~~~~~~~
1 error generated.

Fixes: 293f251871 ("panfrost: Use Midgard-specific reloads")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5961>
2020-07-18 08:28:27 +02:00
Icecream95
0ef168d513 panfrost: Fix calls to panfrost_flush_batches_accessing_bo
The function now takes a bool flush_readers instead of an access type,
but some calls were not updated.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5962>
2020-07-18 01:36:59 +00:00
Icecream95
858cc13eb2 panfrost: Make panfrost_bo_wait take a wait_readers bool
panfrost_bo_wait is often used after
panfrost_flush_batches_accessing_bo, so make them take similar
arguments for consistency.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5962>
2020-07-18 01:36:59 +00:00
Eric Anholt
5b38048347 freedreno/ir3: Add unit tests for derivatives disasm.
Since I was going back to look at fine derivs again, add some tests of
instruction encoding.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5699>
2020-07-18 00:43:44 +00:00
Eric Anholt
3d7d5d220b freedreno/ir3: Fix duplicated fine derivatives instructions.
legalize_block() can get run multiple times, which I didn't notice when
adding fine derivs support.  Other instruction clones change things such
that the legalization won't trigger again, but that didn't apply to the
DS.PP legalization.  To keep someone else from tripping over this, split
the one-shot legalization out of the iterative sync flag application.

Fixes failures in dEQP-VK.glsl.derivate.dfdxfine.*

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3198
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5699>
2020-07-18 00:43:44 +00:00
Bas Nieuwenhuizen
862d85a63f amd/addrlib: Clean up unused colorFlags argument
Cleanup.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5865>
2020-07-18 00:28:35 +00:00
Bas Nieuwenhuizen
a37aeb128d amd/common: Cache intra-tile addresses for retile map.
However complicated DCC addressing is it is still based on tiles.
If we have the intra-tile offsets + tile dimensions we can expand
that to the full image ourselves.

Behavior around ~1080p on a 2500U:

old:
  30-60 ms on every miss

new:
  5 ms initally (miss in the tile cache)
  <0.5 ms afterwards

The most common case is that the tile cache only contains data for
2 tiles, which for Raven/Renoir/Navi14 will be 4 KiB each, so the
size increase is fairly modest.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5865>
2020-07-18 00:28:35 +00:00
Rhys Perry
f302ef3853 aco: use s_waitcnt_depctr to mitigate VMEMtoScalarWriteHazard
Apparently this is potentially faster than v_nop:
https://reviews.llvm.org/D83872

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5923>
2020-07-18 00:14:12 +00:00
Rhys Perry
bcf94bb933 aco: properly recognize that s_waitcnt mitigates VMEMtoScalarWriteHazard
fossil-db (Navi):
Totals from 555 (0.41% of 135946) affected shaders:
CodeSize: 1005716 -> 1003400 (-0.23%)
Instrs: 195326 -> 194744 (-0.30%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5923>
2020-07-18 00:14:12 +00:00
Eric Anholt
33f33bb7d6 meson: Enable GCing of functions and data from compilation units by default.
Normally, the linker will pull in any compilation unit (aka .c file) from
a static lib (such as our shared util code) that is depended on by the
code linking against it.  Since that code is already compiled, the .text
section is allowed to jump anywhere in .text, and the compiler can't
garbage collect unused functions inside of a compile unit.

Teasing callgraphs apart so that normal compilation-unit-level GCing can
reduce driver size hurts the logical organization of the code and is
difficult.  As an example, once I'd split the format pack/unpack tables, I
had to split out util_format_read/write() from util_format.c to avoid
pulling in pack/unpack.  But even then it didn't help, because it turns
out turnip's pack calls pull in util_format_bptc.c for bptc packing, but
that file also includes the unpack impls, and those internally call
util_format_unpack, and thus we pulled in all of unpack.  Splitting all of
this to separate files makes code harder to find and maintain, and is a
waste of dev time.

By setting these compiler flags, the compiler puts each function and data
symbol in a separate ELF section and the linker can then safely GC unused
text and data sections from a compile unit that gets pulled in.  There's a
bit of a space cost due to having those separate sections, but it ends up
being a huge win in disk space on my personal release driver builds:

- i965_dri.so -213k
- x86 gallium dri.so -430k
- libvulkan_intel.so -272k
- aarch64 gallium dri.so -330k
- libvulkan_freedreno.so -783k

No difference on iris drawoverhead -compat -test 1 on my skylake (n=60)

Effect on debugoptimized build times (n=5)
touch nir_lower_io.c build time (bfd)        +15.999% +/- 3.80377%
touch freedreno fd6_gmem.c build time (bfd)  +13.5294% +/- 4.86363%
touch nir_lower_io.c build time (lld)        no change
touch freedreno fd6_gmem.c build time (lld)  +2.45375% +/- 2.2383%

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5739>
2020-07-17 23:56:17 +00:00
Alyssa Rosenzweig
610af7e1ac panfrost: Enable FP16 by default
I see no reason to hide this. The small hit in cycle count is offset in
practice by the increase in thread count. So let's ship it and get some
testing.

If this regresses a workload:

1. Open an issue on the tracker and attach an apitrace.
2. In the meantime set PAN_MESA_DEBUG=nofp16 to override.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5960>
2020-07-17 23:37:13 +00:00
Rob Clark
e5169b1ca1 gitlab-ci: re-enable all a630 jobs
I haven't noticed tftp boot issues in last few days, not sure if they
where just a fluke on Mon or if it is somehow related to # of jobs we
run (ie. having more of the c630 runners powered up and running more
of the time).

Let's turn them back on and see what happens.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5952>
2020-07-17 23:21:12 +00:00
Eric Anholt
4080f8bf2b freedreno/a2xx: Fix compiler warning in disasm.
warning: converting a packed ‘instr_cf_t’ {aka ‘union <anonymous>’}
pointer (alignment 1) to a ‘uint16_t’ {aka ‘short unsigned int’} pointer
(alignment 2) may result in an unaligned pointer value
[-Waddress-of-packed-member]

We may know that we'll only ever have aligned instr_cf_ts, but gcc
doesn't.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5955>
2020-07-17 21:47:32 +00:00
Tomeu Vizoso
cf55abe750 gitlab-ci: Re-add kernels for bare-metal
I mistakenly removed what I thought were remnants of when Freedreno used
LAVA for their DUTs. lava_arm.sh is used for baremetal, so re-add that
code.

Fixes: dcd171f5e9 ("gitlab-ci: More stable URL for kernel and ramdisk artifacts, for LAVA")
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5839>
2020-07-17 20:23:16 +02:00
Icecream95
2aa507f87a nir: Set the alignment for SSBO lowering
The alignment can just be copied from the source intrinsic.

Fixes the assertion
nir_intrinsic_align_offset(instr) < nir_intrinsic_align_mul(instr)

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5949>
2020-07-17 18:03:50 +00:00
Eric Anholt
d735f075a6 intel/perf: Move perf query register programming to static tables.
And now that they're static tables, we don't need to ralloc a copy in
non-shared memory.

Saves ~210k in the built intel drivers.

Bug: https://bugs.chromium.org/p/chromium/issues/detail?id=1048434
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5829>
2020-07-17 17:44:17 +00:00
Eric Anholt
d4e56930c2 intel/perf: Fix unused var warning in release builds.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5829>
2020-07-17 17:44:17 +00:00
Eric Anholt
afe07c7fa7 intel: Fix release-build warnings about sf_entry_size.
In one side of the ifdef it's only used in an assert.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5829>
2020-07-17 17:44:17 +00:00
Erik Faye-Lund
086f760974 zink: use ralloc for spirv_builder as well
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5954>
2020-07-17 17:33:35 +00:00
Erik Faye-Lund
810bf7d32b zink: pass mem_ctx to ralloc_size-call
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5954>
2020-07-17 17:33:35 +00:00
Erik Faye-Lund
35beb938fc zink: use ralloc for plain malloc-calls
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5954>
2020-07-17 17:33:35 +00:00
Erik Faye-Lund
12b324b30c zink: use ralloc in nir-to-spirv
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5954>
2020-07-17 17:33:34 +00:00
Rhys Perry
56d9bcdded radv: enable more float_controls features
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5773>
2020-07-17 16:40:47 +00:00
Rhys Perry
23631ddd4d aco: set tcs_in_out_eq=false if float controls of VS and TCS stages differ
Otherwise, we might have both VS and TCS code in the same block but float
controls are set per-block.

We also rely on VS code not dominating TCS code for the optimizer to work
correctly.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5773>
2020-07-17 16:40:47 +00:00
Rhys Perry
b36950ad2c aco: fix nir_op_f2f16_rtne with non-default rounding modes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5773>
2020-07-17 16:40:47 +00:00
Rhys Perry
d14f4faa13 aco: flush denormals before fp16 fabs/fneg if needed
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5773>
2020-07-17 16:40:47 +00:00
Rhys Perry
305cffa22b aco: use s_round_mode/s_denorm_mode
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5773>
2020-07-17 16:40:47 +00:00
Icecream95
ca44c009b5 panfrost: Set depth_enabled when stencil is enabled
Fixes square circles in the KiCad 3D viewer.

v2: Cleanup a bit, add a comment, and handle the fs->writes_stencil case
to be pedantic (Alyssa).

Reported-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5946>
2020-07-17 16:28:52 +00:00
Samuel Pitoiset
2b796c7685 radv: return better Vulkan error codes when VkQueueSubmit() fails
The driver shouldn't abort when a CS submission fails.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5876>
2020-07-17 17:25:15 +02:00
Samuel Pitoiset
1829bdd0da radv: improve the error messages when a CS submission failed
While we are at it, do not duplicate the error messages for the
three different submission paths.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5876>
2020-07-17 17:25:13 +02:00
Samuel Pitoiset
93047f6888 radv: remove one useless goto in radv_queue_submit_deferred()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5876>
2020-07-17 17:25:11 +02:00
Icecream95
01147481f9 panfrost: Report TEXTURE_BUFFER_OBJECTS cap when gl3 flag set
OpenGL 3.3 is now reported again when PAN_MESA_DEBUG=gl3 is set.

Fixes: 96fa8d70bc ("panfrost: Report CAPs more honestly")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5947>
2020-07-17 15:05:21 +00:00
Icecream95
4e986568b8 nir: Fix lower_two_sided_color when the face is an input
Fixes the two-sided-lighting and vertex-program-two-side piglit tests
on Panfrost.

v2: Use an existing variable for gl_FrontFacing if present.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Tested-by: Urja Rannikko <urjaman@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5915>
2020-07-17 14:50:26 +00:00
Icecream95
314ba5e174 nir: Add a face_sysval argument to nir_lower_two_sided_color
This is needed for handling drivers that use an input for loading the
face, for example Panfrost with Midgard GPUs.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Tested-by: Urja Rannikko <urjaman@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5915>
2020-07-17 14:50:26 +00:00
Icecream95
2a6db94b05 panfrost: Do per-sample shading when outputs are read
Fixes dEQP-GLES31.functional.blend_equation_advanced.msaa.*

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5930>
2020-07-17 14:34:47 +00:00
Icecream95
c20d166b4e pan/mdg: Do per-sample framebuffer loads
EXT_shader_framebuffer_fetch requires the fetched value to be per-sample, so we
need to load the sample id when in a fragment shader.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5930>
2020-07-17 14:34:47 +00:00
Icecream95
25747cea67 panfrost: Rename lower_store to is_blend in pan_lower_framebuffer
The bool will be used for deciding whether to do a per-sample load.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5930>
2020-07-17 14:34:47 +00:00
Icecream95
4a8ad1e08f pan/mdg: Don't disassemble blit shaders
There are a lot of them and they are mostly uninteresting, so don't
disassemble them or print shader-db results.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5948>
2020-07-17 09:37:31 -04:00
Michel Dänzer
3f8656401b gitlab-ci: Only trigger test-docs job automatically for MRs
Follow-up to
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5898 .

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5918>
2020-07-17 10:25:54 +00:00
Elie Tournier
575ab303a8 virgl: set PIPE_CAP_BLEND_EQUATION_ADVANCED
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5516>
2020-07-17 06:19:16 +00:00
Elie Tournier
a0f42b89a1 virgl: Encode barrier for blend_equation_advanced
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5516>
2020-07-17 06:19:16 +00:00
Elie Tournier
a026364b55 virgl: Use alpha_src_factor to store blend_equation_advenced value
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5516>
2020-07-17 06:19:16 +00:00
Elie Tournier
0ee1a67f3c glsl_to_ir: do lower_blend_equation if PIPE_CAP_FBFETCH
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5516>
2020-07-17 06:19:16 +00:00
Elie Tournier
d0df56ccd1 st: expose KHR_blend_equation_advanced if PIPE_CAP_BLEND_EQUATION_ADVANCED
With virgl, we want to expose KHR_blend_equation_advanced even if EXT_shader_framebuffer_fetch
is not available.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5516>
2020-07-17 06:19:16 +00:00
Elie Tournier
377731ec1b gallium: Add PIPE_CAP_BLEND_EQUATION_ADVANCED
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5516>
2020-07-17 06:19:16 +00:00
Elie Tournier
57174c9102 virgl: Reserved last caps of capability_bits
This cap is used by virglrenderer but not by Mesa.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5516>
2020-07-17 06:19:16 +00:00
Elie Tournier
4f8fc0f066 glsl_to_tgsi: Set TGSI_PROPERTY_FS_BLEND_EQUATION_ADVANCED
In virgl, when fbfetch extention is not available but blend_equation_advanced is,
we didn't call lower_blend_equation_advanced. So we need to pass the blend value
to the host in order to recreate the shader correctly.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5516>
2020-07-17 06:19:16 +00:00
Elie Tournier
b3a3f7cca2 gallium: add TGSI_PROPERTY_FS_BLEND_EQUATION_ADVANCED
For virgl, we don't lower advanced equation to fbfetch
So we need to pass the blend equation info in the TGSI to the host

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5516>
2020-07-17 06:19:16 +00:00
Erik Faye-Lund
30f4ccff5b mesa: treat Color._AdvancedBlendMode as enum
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5516>
2020-07-17 06:19:16 +00:00
Erik Faye-Lund
6ffa0e9254 mesa: do not use bitfields for advanced-blend state
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5516>
2020-07-17 06:19:16 +00:00
Karol Herbst
c36aac542a st/mesa: fix st_CopyPixels without support for stencil exports
Fixes: f611af3594 ("st/mesa: use fragment shader to copy stencil buffer")

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5940>
2020-07-17 00:44:36 +00:00
Rhys Kidd
e7fd1ce9a2 nvc0_2d: Document SET_PIXELS_FROM_MEMORY_CORRAL_SIZE from rnndb
Present in both cl502d and cl902d.

Based on envytools commit 889f8fb4445863c19336c31dd13ecbdd3b19a196

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5922>
2020-07-17 10:22:24 +10:00
Rhys Kidd
bc69e73415 nv50_2d,nvc0_2d: Document SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP from rnndb
Present in both cl502d and cl902d.

Based on envytools commit 0b9d3e717828a06be6937395464c34dfc870a6dc

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5922>
2020-07-17 10:22:24 +10:00
Alyssa Rosenzweig
912345840b docs/features: Mark trivial missed feature
It's right there in GLES.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5943>
2020-07-16 23:21:35 +00:00
Eric Engestrom
e0ef5a5cba egl: mark the rest of the callbacks as mandatory or optional
Suggested-by: Frank Binns <frank.binns@imgtec.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Eric Engestrom
4dc322c4c6 egl: drop now empty egl_dri2_fallbacks.h
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Eric Engestrom
bc38fe8425 egl: inline fallback for get_sync_values
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Eric Engestrom
2e3eb0c90b egl: inline fallback for create_wayland_buffer_from_image
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Eric Engestrom
c5fb1fbc9b egl: inline fallback for query_buffer_age
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Eric Engestrom
90000b0264 egl: inline fallback for copy_buffers
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Eric Engestrom
2d5f12ae3a egl: inline fallback for post_sub_buffer
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Eric Engestrom
1ba5075a7e egl: inline fallback for swap_buffers_region
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Eric Engestrom
7d5a13ebf3 egl: inline fallback for swap_buffers_with_damage
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Eric Engestrom
b501ece6f6 egl: drop unused fallback function
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Eric Engestrom
43e2d80849 egl: inline fallback for create_pbuffer_surface
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Eric Engestrom
179e442f7a egl: inline fallback for create_pixmap_surface
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5861>
2020-07-16 22:11:25 +00:00
Rob Clark
81124d845e driconf: allowlist/denylist
I think this is the one user facing use of blacklist/whitelist.  But we
like all of our users, so lets be more inclusive.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5938>
2020-07-16 21:56:08 +00:00
Icecream95
01d60d3d75 pan/decode: Open the dump file later
Opening the dump file in pandecode_jc instead of doing it in
pandecode_next_frame avoids creating zero sized files when
applications exit.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5931>
2020-07-16 21:33:13 +00:00
Tomeu Vizoso
4dcbad476e gitlab-ci: Run all of GLES3 tests for Panfrost
We have enough capacity now and Panfrost should be very near to GLES3
compliance.

v2: Update fails list (Alyssa)

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5932>
2020-07-16 21:18:45 +00:00
Samuel Pitoiset
4e8d7ad8b0 radv: split fence into two parts as enum+union.
To be consistent with semaphores and for clean up.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5921>
2020-07-16 21:04:37 +00:00
Samuel Pitoiset
56395a8b6d radv: optimize creating signaled syncobj with amdgpu_cs_create_syncobj2()
This creates a syncobj and sets it as signaled with one ioctl
instead of two.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5921>
2020-07-16 21:04:37 +00:00
Samuel Pitoiset
3b7cd734e8 radv: fix the error code when allocating a fresh imported syncobj fails
It can only be an OOM error.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5921>
2020-07-16 21:04:37 +00:00
Samuel Pitoiset
dd795ee1df radv: fix the error code when exporting a semaphore/fence fails
VK_ERROR_INVALID_EXTERNAL_HANDLE is not a valid Vulkan error code
for these functions and it's likely that too many objects are
created instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5921>
2020-07-16 21:04:37 +00:00
Samuel Pitoiset
8aa9d0acb8 radv: fix destroying the syncobj when exporting a fence FD
It's invalid and the temporary syncobj was never actually destroyed.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5921>
2020-07-16 21:04:37 +00:00
Connor Abbott
b5a48a948a tu: Enable VK_EXT_shader_stencil_export
This passes the grand total of 3 CTS tests (2 actually enabled due to
missing D32_SFLOAT_S8_UINT support) under
dEQP-VK.pipeline.shader_stencil_export.*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5936>
2020-07-16 20:49:20 +00:00
Connor Abbott
aeca92ed79 ir3: Handle gl_FragStencilRefARB
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5936>
2020-07-16 20:49:20 +00:00
Connor Abbott
981608ad04 freedreno/a6xx: Add stencilref register info
Found by guessing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5936>
2020-07-16 20:49:20 +00:00
Alyssa Rosenzweig
40b99bb79e panfrost: Revert "Disable frame throttling"
This reverts commit 4fee7b30c0, which was
intended to be a temporary workaround for a leak introduced in
a65e29ccb2 ("gallium: simplify throttle implementation"). However, that
leak was then fixed in 023282a4f6 and we
forgot to revert this hack.

Closes: #2108

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Alyssa Rosenzweig
19da8121d6 panfrost: Enable Chromium
With the latest batch of fixes, Chromium works (including WebGL support,
although performance is still WIP).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Alyssa Rosenzweig
96fa8d70bc panfrost: Report CAPs more honestly
We're overreporting on some chips and underreporting on others. Let's be
more honest.

This exposes OpenGL ES 3.0 on Mali T760 through T860.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Alyssa Rosenzweig
afa4b32019 panfrost: Fix faults with RASTERIZER_DISCARD
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Alyssa Rosenzweig
6c6a8b2f07 panfrost: Honour cso->compare_mode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Alyssa Rosenzweig
9addb82148 panfrost: Avoid integer underflow in rt_count_1
If rt_count = 0, this underflows to MAX_MRT. The hw doesn't seem to care
but it's semantically incorrect and confuses pandecode.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Alyssa Rosenzweig
77bb19eebd panfrost: Abort on unsupported blit
Instead of silently failing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Alyssa Rosenzweig
cce3d925d2 panfrost: Implement Z32F_S8 blits
Requires the ability to texture the stencil-only portion, and then
u_blitter kicks in for the rest.

v2: Fix dEQP-GLES31.functional.stencil_texturing.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Alyssa Rosenzweig
6ffebfbff8 panfrost: Fix sRGB clear colour packing
It should be sRGB transformed first, which the generic path handles but
the RGBA8 special path does not.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Alyssa Rosenzweig
721b5c6eef panfrost: Set PIPE_CAP_MIXED_COLORBUFFER_FORMATS
Missed that this is needed, fixes fbo.completeness.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Alyssa Rosenzweig
a0003c329a panfrost: Overhaul tilebuffer allocations
Based on the colour buffers in use, we need to select a tile size
allowing either 128-bits of storage per pixel or 512-bits. Based on the
size chosen, we scale the offsets into the tilebuffer. Likewise, we need
to calculate offsets based on bpp (with special cases) rather than
picking an average case.

Fixes regressions that otherwise would be caused by the next commit.

v2: Fix colour clears (Icecream95).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Alyssa Rosenzweig
3d13870ee2 panfrost: Call util_blitter_save_fragment_constant_buffer_slot
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5858>
2020-07-16 19:59:43 +00:00
Dave Airlie
e16f59c316 llvmpipe: fix position offset interpolation
pos offset only applies to the gl_FragPos input, when I refactored
I messed that up, only use pos_offset for the position inputs
and use 0.5 otherwise.

This fixes:
GTF-GL45.gtf30.GL3Tests.fragment_coord_conventions.fragment_coord_conventions_multisample

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5926>
2020-07-17 05:09:54 +10:00
Dave Airlie
87e27543fe llvmpipe: fix stencil only formats.
Currently the test crashes with LLVM errors
Stored value type does not match pointer operand type!
  store <8 x i32> %s_dst, <8 x i8>* %261

Change the stored type for 8-bit stencil formats.

Fixes:
GTF-GL45.gtf44.GL31Tests.texture_stencil8.texture_stencil8_gl44

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5926>
2020-07-17 05:09:34 +10:00
Thong Thai
045711dc1c radeonsi: use PIPE_FORMAT_P010 for 10-bit VP9 decoding
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leoliu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5848>
2020-07-16 17:52:20 +00:00
Rhys Perry
b85ef04324 aco: add add_interference() helper
This won't add interferences between spill ids of different types and will
exit early if there's already an interference.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5805>
2020-07-16 16:22:57 +00:00
Rhys Perry
2c7554fe01 aco: use unordered_set for spill id interferences
Seems to be faster.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5805>
2020-07-16 16:22:57 +00:00
Rhys Perry
47d7e1e662 aco: rewrite graph coloring in spiller
I don't think this is much of an optimization in the typical case, but for
very complex shaders this should work much better.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5805>
2020-07-16 16:22:57 +00:00
Rhys Perry
5a941f4d6d aco: fix underestimated pressure in spiller when a phi has a killed def
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5805>
2020-07-16 16:22:57 +00:00
Alyssa Rosenzweig
293f251871 panfrost: Use Midgard-specific reloads
v2: Be more explicit about sampler types. Prefer the term "load" to
"resolve" to match VK convention. Generate shaders for MRT 8x.  Blit
shader generation adds about 6ms to startup cost. We could cache thes.
shaders to disk if we needed to (or indeed, ship binaries).

v3: Fallback on u_blitter on Bifrost so Bifrost continues to work.
KHR_partial_update support is mostly no-oped on Bifrost now, but that's
okay for now - compositors are still functional.

v4: Specialize on multisample state as well to enable reloads of MSAA
textures. This requires 2x the shader variants, so I assume we're up to
12ms startup cost for generation. Annoying. Also fix interactions with
depth- or stencil-only clears of combined depth-stencil surfaces.

v5: Cache to the device (screen) instead of the context, reducing
duplicated work in apps that create many contexts (e.g. Chromium)

v6: Squash in KHR_partial_update cleanup to fix intermediate
regressions on a few tests.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5824>
2020-07-16 15:10:55 +00:00
Indrajit Kumar Das
f611af3594 st/mesa: use fragment shader to copy stencil buffer
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5836>
2020-07-16 13:30:50 +00:00
Erik Faye-Lund
3af0711c40 mesa/main: use p_atomic_inc_return instead of locking
There's no good reason for using a mutex here, as we have a simpler
primitive; atomic integers. So let's use that instead, to simplify
things a bit.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5901>
2020-07-16 10:49:22 +00:00
Yevhenii Kharchenko
a0f8439691 st/mesa: fix corrupted texture levels, when adding more levels than expected
Some of existing texture levels can be corruted,
after calling 'glTexImage' with param 'level' higher than
max expected value 'floor(log2(max(width, height, depth)))'.

To fix we prevent overwriting image buffer pointer
in 'st_texture_object', if it was already allocated
for multiple mip-levels storage.

Fixes piglit test: 'arb_copy_image add-illegal-levels'

Signed-off-by: Yevhenii Kharchenko <yevhenii.kharchenko@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5785>
2020-07-16 10:26:30 +00:00
Erik Faye-Lund
b8c0196116 gallium/util: do not use _MTX_INITIALIZER_NP on Windows
We already have another way of initializing these, so it's just a matter
of avoiding _MTX_INITIALIZER_NP here.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5902>
2020-07-16 10:09:15 +00:00
Samuel Pitoiset
485ea7d711 radv/winsys: pass the buffer list via the CS ioctl for less CPU overhead
The legacy path requires one more ioctl to create the buffer
list and this is more costly for the CPU.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5899>
2020-07-16 09:46:33 +02:00
Samuel Pitoiset
40bea60dcf radv/winsys: replace alloca() by malloc() everywhere
To remove the mix of alloca() and malloc().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5899>
2020-07-16 09:46:31 +02:00
Neil Roberts
97f8ec321b v3d/compiler: Lower geometry output store base into offset src
When generating the VPM write instruction for geometry shader outputs,
emit_store_output_gs ends up adding the base and offset arguments
together with an ADD instruction. The addition was done at the VIR level
after scheduling so it always ends up right next to the corresponding
stvpm instruction. Most of the time the offset is constant but nothing
does any constant folding at the VIR level.

This patch makes it instead fold the addition into the offset at the NIR
level in v3d_nir_lower_io so that the NIR-level constant folding can get
rid of the addition most of the time.

v2: Use nir_iadd_imm to simplify the code. (Eric Anholt)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5825>
2020-07-16 08:48:06 +02:00
Marek Olšák
081691b5ae radeonsi: prevent a gfx10_ngg_calculate_subgroup_info failure for TES+NGG GS
arb_tessellation_shader-tes-gs-max-output -small -scan 1 50 -auto -fbo
doesn't pass, but at least all shaders are compiled successfully.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5700>
2020-07-16 04:04:52 +00:00
Dave Airlie
5714cd3433 ci: bump piglit checkout for dsa tests
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5896>
2020-07-16 13:32:12 +10:00
Dave Airlie
854dbea567 mesa: change dsa texture error codes for GL 4.6
GL 4.6 changed error code for when the effective target of the
texture is illegal. Since it's not an illegal enum they modified
it to be an illegal operation.

However the CTS test for this is missing support for two cases,
I'm chasing that up, but I expect this will cause a CTS regression
for anyone who runs this test. I'm leaning on the side of being
compliant rather than passing the test until the test is fixed.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5896>
2020-07-16 11:35:30 +10:00
Alyssa Rosenzweig
34a03109b8 panfrost: Extract panfrost_batch_reserve_framebuffer
We need to trigger it explicitly for reloads without draws (for Z^S
reload which is an edge case).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:37 +00:00
Alyssa Rosenzweig
5d0d8faaa6 panfrost: Track surfaces drawn per-batch
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:37 +00:00
Alyssa Rosenzweig
64734c0947 panfrost: Set zs_samples as necessary
Fixes MSAA Z/S.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:37 +00:00
Alyssa Rosenzweig
8225604fd5 panfrost: Handle per-sample shading
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:37 +00:00
Alyssa Rosenzweig
080b751d4a panfrost: Add rectangle subtraction algorithm
For better supporting KHR_partial_update.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:37 +00:00
Alyssa Rosenzweig
e061bf004b panfrost: Identify zs_samples field
For MSAA depth/stencil.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:37 +00:00
Alyssa Rosenzweig
6088891ef7 panfrost: Include sample count in payload estimates
Otherwise we might not reserve enough space.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:37 +00:00
Alyssa Rosenzweig
5c65a27adc panfrost: Add MALI_PER_SAMPLE bit
For gl_SampleID reads.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:37 +00:00
Alyssa Rosenzweig
adacf1f511 panfrost: Expose panfrost_get_blend_shader
It is needed to produce a blend shader for blits.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:37 +00:00
Alyssa Rosenzweig
528e132d4f panfrost: Force Z/S writeback
This is unfortunately necessary for conformance at this stage.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:37 +00:00
Alyssa Rosenzweig
da2eed36f3 pan/mdg: Implement gl_SampleID
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:37 +00:00
Alyssa Rosenzweig
b2749c141d pan/mdg: Identify per-sample interpolation mode
So this is what .interp0 was this whole time.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:36 +00:00
Alyssa Rosenzweig
59308a3a64 pan/mdg: Bump compiler RT maximum
We don't actually support MRT 8x yet but we would like to soon, so bump
it in the compiler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5929>
2020-07-15 22:19:36 +00:00
Roman Stratiienko
29849aca0f Android: Fixes for Q and R
Fix Android-Q build:
- Use AOSP prebuilt bison by specifying $(BISON) variable
- Use AOSP prebuilt flex by specifying $(LEX) variable

Fix Android-R build:
- Add M4 environmet variable for Android R and higher (See [1])

[1] - 2bfffb9f48:Changes.md;dlc=997661002af1282d938e88c3c723037e42e5d283

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5894>
2020-07-15 20:49:24 +00:00
Dave Airlie
2adb13f187 llvmpipe/format: fix snorm conversion
This fixes:
GTF-GL45.gtf33.GL3Tests.vertex_type_2_10_10_10_rev.vertex_type_2_10_10_10_rev_conversion
and
piglit
spec/arb_texture_view/rendering-formats/clear gl_rgba8_snorm as gl_r32f

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5820>
2020-07-16 05:47:03 +10:00
Dave Airlie
75e01d01a5 gallivm/sample: always square rho before fast log2
The fast log2 works better if rho is squared, i.e.

fast_log2(sqrt(2)) == 0.4
0.5 * fast_log2(2) == 0.5

so just square rho, and always divide by 2 afterwards.

Fixes:
GTF-GL45.gtf30.GL3Tests.sgis_texture_lod.sgis_texture_lod_basic_lod_selection

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5820>
2020-07-16 05:46:57 +10:00
Rhys Kidd
a9c9486106 nv50_2d: regenerate envytools-based rnndb headers
The headers hadn't been regenerated from envytools in a long time,
and there were a few minor divergences.

Based on envytools commit c20929ed0f3be18b8419f7332ee22d905feb6589

Among other things, rnndb has changed naming to G80/etc, for now
I've not tackled switching that over and replaced the nvidia
codenames back to the chip ids that mesa uses with the following:

  $ sed -i 's/G80_2D/NV50_2D/g' rnndb/graph/g80_2d.xml.h
  $ sed -i 's/GF100_2D/NVC0_2D/g' rnndb/graph/g80_2d.xml.h

No other modifications of the headergen'd headers was done, which
was helped by the differing #define's being unutilised presently.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5920>
2020-07-16 00:24:51 +10:00
Samuel Pitoiset
0859dcb57c radv: destroy the base object if VkCreateInstance() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5868>
2020-07-15 13:53:37 +02:00
Samuel Pitoiset
50fdefc025 radv: destroy the base object if VkAllocateCommandBuffers() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5868>
2020-07-15 13:53:35 +02:00
Samuel Pitoiset
e5f2bf3697 radv: destroy the base object if VkCreateFence() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5868>
2020-07-15 13:53:32 +02:00
Samuel Pitoiset
d25764d910 radv: destroy the base object if VkCreateSemaphore() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5868>
2020-07-15 13:53:30 +02:00
Samuel Pitoiset
ce7a7aeecc radv: destroy the base object if VkCreateEvent() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5868>
2020-07-15 13:53:29 +02:00
Samuel Pitoiset
8ef52974cd radv: destroy the base object if VkCreateBuffer() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5868>
2020-07-15 13:53:27 +02:00
Samuel Pitoiset
852316494c radv: destroy the base object if VkCreateImage() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5868>
2020-07-15 13:53:26 +02:00
Samuel Pitoiset
2e5968023f radv: destroy the base object if VkCreateRenderPass*() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5868>
2020-07-15 13:53:21 +02:00
Samuel Pitoiset
0eec81d019 radv: destroy the base object if VkCreateQueryPool() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5868>
2020-07-15 13:53:19 +02:00
Pierre-Eric Pelloux-Prayer
25baceafd3 mesa/st: release debug_output after destroying the context
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3230
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2218
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5789>
2020-07-15 09:13:51 +00:00
Pierre-Eric Pelloux-Prayer
7f0b6a5df8 mesa: add bool param to _mesa_free_context_data
The param controls whether _mesa_destroy_debug_output should be called or not.
No functional changes; this will be used by the next commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5789>
2020-07-15 09:13:51 +00:00
Pierre-Eric Pelloux-Prayer
e6f7b4312f mesa: rename _mesa_free_errors_data
Use the _mesa_init_XXX / _mesa_destroy_XXX pattern to clearly associate
the 2 functions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5789>
2020-07-15 09:13:50 +00:00
Michel Dänzer
cbdb87c678 gitlab-ci: Fix "triggered by Marge for a merge request" rule
The commit below changed the rule such that it accidentally also applied
to the non-MR pipelines created by Marge, resulting in Marge triggering
twice as many jobs as necessary.

Fixes: 549b4a3dd4 "gitlab-ci: Automatically run pipelines for Marge
                     Bot pre-merge only"

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5898>
2020-07-15 08:54:15 +00:00
Anuj Phogat
559b26b7ee intel/ehl: Add new PCI-IDs
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-07-14 21:10:04 -07:00
Anuj Phogat
7cb2ace465 intel/ehl: Rename gen_device_info struct
Renaming makes it easier to relate a pciid with device configuration.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-07-14 21:10:04 -07:00
Anuj Phogat
13c70931f5 intel/ehl: Use macro GEN11_LP_FEATURES in device info
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-07-14 21:10:04 -07:00
Anuj Phogat
e08ec89a19 intel/ehl: Use GEN11_URB_MIN_MAX_ENTRIES in device info
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-07-14 21:10:04 -07:00
Icecream95
787c1ed209 panfrost: Dual source blend support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5620>
2020-07-15 01:30:00 +00:00
Icecream95
334dab0576 pan/mdg: Skip z/s combining for dual-source writes
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5620>
2020-07-15 01:30:00 +00:00
Icecream95
85954ecfef pan/mdg: Dual source blend input/writeout support
We write to r2, which is preseved through to the blend shader, from
where it is read. We won't worry about MRT to keep things simple.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5620>
2020-07-15 01:30:00 +00:00
Icecream95
0ff6263534 pan/mdg: Add a nir pass to reorder store_output intrinsics
Real writeout stores, which break execution, need to be moved to after
dual-source stores, which are just standard register writes.

v2: Don't move stores forward, to avoid moving them to before where
    their source is written.

v3: Only reorder past dual-source stores.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5620>
2020-07-15 01:30:00 +00:00
Icecream95
58c0e1d005 gallium: Dual source support in blend_factor_to_shader
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5620>
2020-07-15 01:30:00 +00:00
Icecream95
bedd4b44de compiler: Add dual-source factors to blend_factor
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5620>
2020-07-15 01:30:00 +00:00
Rob Clark
7f9039f0a8 freedreno/ir3: DCE unused arrays
Letting unused arrays stick around confuses RA, which assigns vreg names
to the unused arrays, but then does not precolor them (because they are
unused).  This leads to an assert in ra_select_reg_merged():

  skqp: ../src/freedreno/ir3/ir3_ra.c:589: name_to_instr: Assertion '!name_is_array(ctx, name)' failed.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3262
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5907>
2020-07-14 23:26:15 +00:00
Rob Clark
2e4bab84fb freedreno/a6xx: don't enable early-z/lrz if no z-test
But if shader explicitly asks for early-fragment-tests, obey it's
wishes.

Fixes a handful of skia (skqp) CTS fails (9.0_r12)

* gles_bug593049
* gles_circular_arcs_fill
* gles_circular_arcs_stroke_and_fill_square
* gles_clippedcubic2
* gles_complexclip2_path_bw
* gles_complexclip2_rrect_bw
* gles_complexclip3_complex
* gles_complexclip3_simple
* gles_crbug_691386
* gles_cubicclosepath
* gles_cubicpath
* gles_degeneratesegments
* gles_filltypespersp
* gles_innershapes_bw
* gles_inverse_paths
* gles_mixedtextblobs
* gles_onebadarc
* gles_quadclosepath
* gles_quadpath
* gles_rrect_clip_bw
* gles_scale-pixels
* gles_scaledstrokes
* gles_squarehair
* gles_strokes_zoomed
* gles_windowrectangles

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5907>
2020-07-14 23:26:15 +00:00
Rob Clark
37e0e0791f freedreno/ir3/ra: be better at failing
It doesn't happen much.  But it's annoying when we hit an impossible
condition deep in RA 90% thru a long test run.  Add some ra_assert()/
ra_unreachable() helper macros so we can bail cleanly and fail RA.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5907>
2020-07-14 23:26:15 +00:00
Rob Clark
afadaaef39 freedreno/a6xx: bail instead of crash for compile fails
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5907>
2020-07-14 23:26:15 +00:00
Rob Clark
b3ca55f5aa freedreno/ir3: make compile fails more visible
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5907>
2020-07-14 23:26:15 +00:00
Rob Clark
788792fc46 freedreno/ir3: add missing VS driver params
Some of these only used by turnip so far, this is just for clarity.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5907>
2020-07-14 23:26:15 +00:00
Mike Blumenkrantz
5e9cd64f70 zink: enable tgsi texcoord pipe cap
this requires some modifications to the ntv slot remapping, as we definitely
don't want to reserve another 25% of the available slots for the (deprecated)
texcoord varyings

now we remap VARYING_SLOT_TEX[n] to the last available slots, which lets us avoid
needing to do permanent reservation, and we check to make sure that we haven't
seen the corresponding texcoord varying any time we emit a non-texcoord varying in
that slot

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5551>
2020-07-14 20:48:17 +00:00
Karol Herbst
05362b075f nouveau: expose HMM
v2: moved caps

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5906>
2020-07-14 19:59:12 +00:00
Karol Herbst
212f1ab40e nvc0: support PIPE_CAP_RESOURCE_FROM_USER_MEMORY_COMPUTE_ONLY
v2: rework by adding a new buffer status

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5906>
2020-07-14 19:59:12 +00:00
Karol Herbst
c0f7f833eb gallium: add PIPE_CAP_RESOURCE_FROM_USER_MEMORY_COMPUTE_ONLY
With the current UAPI we only support user pointers from the compute
engines, so we need a way to express that in gallium.

v2: fix typos
v3: add allows_user_pointers helper

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5906>
2020-07-14 19:59:12 +00:00
Karol Herbst
08ceba943d nouveau: enable HMM
v2: move declarations into libdrm
v3: fix typos
    rework handling of how much memory to reserve
v4: remove unused parameter
    unmap cutout on error and when the screen is destroyed
v5: move into screen_create
    enable HMM only if CL gets enabled

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5906>
2020-07-14 19:59:12 +00:00
Karol Herbst
1f37662c09 ci: bump libdrm to 2.4.102
Since version 2.4.101 there are only xz archives hence the bz2 to xz
change.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5906>
2020-07-14 19:59:12 +00:00
Karol Herbst
96606552da ci: need to install wget in order to download libdrm
Fixes: dcd171f5e9 ("gitlab-ci: More stable URL for kernel and ramdisk artifacts, for LAVA")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5906>
2020-07-14 19:59:12 +00:00
Jesse Natalie
0e90b3d0c4 nir: Support load/store of temps as scratch in nir_lower_explicit_io
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5889>
2020-07-14 18:15:40 +00:00
Jesse Natalie
99aaf0ec18 nir: When nir_lower_vars_to_explicit_types is run on temps, update scratch_size
To allow interop with other scratch ops, append any remaining temp vars
to the end of any already-allocated scratch space.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5889>
2020-07-14 18:15:40 +00:00
Jesse Natalie
bf138c1fd4 nir_lower_io: Add addr_format_is_offset helper
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5889>
2020-07-14 18:15:40 +00:00
Jonathan Marek
d00487dd42 freedreno/regs: update a6xx PC regs
Update some registers in the 0x9800-0xa000 range.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5870>
2020-07-14 18:00:06 +00:00
Jonathan Marek
2e32a20f7c freedreno/regs: update a6xx VPC regs
Update some registers in the 0x9000-0x95ff range.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5870>
2020-07-14 18:00:06 +00:00
Jonathan Marek
e883aa2585 freedreno/regs: update a6xx RB regs
Update some registers in the 0x8c00-0x8dff range.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5870>
2020-07-14 18:00:06 +00:00
Jonathan Marek
a5c668518a freedreno/regs: update a6xx GRAS registers
Update some registers in the 0x8000-0x87ff range.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5870>
2020-07-14 18:00:06 +00:00
Jonathan Marek
be33d5859e gitlab-ci: re-enable arm64_a630_vk
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5904>
2020-07-14 17:15:06 +00:00
Jonathan Marek
f37f1a1a64 turnip: remove use of tu_cs_entry for draw states
The tu_cs_entry struct doesn't match well what we want for SET_DRAW_STATE
and CP_INDIRECT_BUFFER (requires extra steps to get iova and size), so
start phasing it out.

Additionally, use newly added tu_cs_draw_state where it doesn't require any
effort (it requires a fixed size, but gets rid of the extra end_sub_stream)

Note this also changes the behavior of CmdBindDescriptorSets for compute to
emit directly in cmd->cs instead of doing through a CP_INDIRECT.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5558>
2020-07-14 17:00:08 +00:00
Jonathan Marek
7f24a69ace turnip: fix inconsistencies with tu6_load_state_size
The next patch assumes the correct size is returned in tu6_emit_load_state.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5558>
2020-07-14 17:00:07 +00:00
Jonathan Marek
bf997ca306 turnip: emit compute pipeline directly in CmdBindPipeline
There's no need to defer it, and can get rid DIRTY_COMPUTE_PIPELINE.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5558>
2020-07-14 17:00:07 +00:00
Jonathan Marek
dce6cb1196 turnip: use DIRTY SDS bit to avoid making copies of pipeline load state ib
Some testing showed that the DIRTY bit has the desired behavior, so use it
to make things a bit simpler.

Note in CmdBindPipeline, having the TU_CMD_DIRTY_DESCRIPTOR_SETS behind a
if(pipeline->layout->dynamic_offset_count) was wrong.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5558>
2020-07-14 17:00:07 +00:00
Mike Blumenkrantz
2e488305d6 zink: try to handle multisampled null buffers
I don't have any tests for this that I've run into yet, so this is mostly
just guessing

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5686>
2020-07-14 16:40:12 +00:00
Mike Blumenkrantz
1ee598cfed zink: handle empty attachments
create an empty buffer and surface to reuse for the fb attachment here

this fixes most of the arb_framebuffer_object tests in piglit

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5686>
2020-07-14 16:40:12 +00:00
Icecream95
6493d29f21 pan/mdg: Fix non-debug compiliation
Fixes error when the assert is optimized out:

   ../src/panfrost/midgard/midgard_compile.c: In function ‘output_load_rt_addr’:
   ../src/panfrost/midgard/midgard_compile.c:1644:1: error: control reaches end of non-void function [-Werror=return-type]
    }

Closes #3270

Fixes: 7781d2c2ea ("pan/mdg: Support MRT in output load lowering")
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5895>
2020-07-14 15:54:41 +00:00
Michel Dänzer
89caa485f1 Revert https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4580
It broke the CI pipeline on master:

https://gitlab.freedesktop.org/mesa/mesa/-/jobs/3604314
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/3604315

Revert for now, to allow other MRs to be merged.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5905>
2020-07-14 17:08:10 +02:00
Karol Herbst
460300ed59 nouveau: expose HMM
v2: moved caps

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4580>
2020-07-14 14:05:00 +00:00
Karol Herbst
efa847dbc9 nvc0: support PIPE_CAP_RESOURCE_FROM_USER_MEMORY_COMPUTE_ONLY
v2: rework by adding a new buffer status

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4580>
2020-07-14 14:04:59 +00:00
Karol Herbst
dd2cc5bc44 gallium: add PIPE_CAP_RESOURCE_FROM_USER_MEMORY_COMPUTE_ONLY
With the current UAPI we only support user pointers from the compute
engines, so we need a way to express that in gallium.

v2: fix typos
v3: add allows_user_pointers helper

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4580>
2020-07-14 14:04:59 +00:00
Karol Herbst
f67cd0bbd9 nouveau: enable HMM
v2: move declarations into libdrm
v3: fix typos
    rework handling of how much memory to reserve
v4: remove unused parameter
    unmap cutout on error and when the screen is destroyed
v5: move into screen_create
    enable HMM only if CL gets enabled

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4580>
2020-07-14 14:04:59 +00:00
Karol Herbst
6f4a6ed0e0 ci: bump libdrm to 2.4.102
Since version 2.4.101 there are only xz archives hence the bz2 to xz
change.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4580>
2020-07-14 14:04:59 +00:00
Mike Blumenkrantz
e1e7584bde zink: block resolve blits for depth/stencil buffers
"The format features of dstImage must contain VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT"
- vkCmdResolveImage spec

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5888>
2020-07-14 12:57:22 +00:00
Mike Blumenkrantz
582669f07e zink: block vkCmdBlitImage usage for multi sampled blits
this is prohibited by spec

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5888>
2020-07-14 12:57:22 +00:00
Mike Blumenkrantz
ab78831baa zink: try copy_region hook for blits where we can't do a regular blit or resolve
in cases where the formats match, we can likely just pass this through for now

fixes a ton of spec@!opengl 1.1@depthstencil-default_fb-blit piglit tests

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5888>
2020-07-14 12:57:22 +00:00
Erik Faye-Lund
34fe561895 mesa/main: use call_once instead of open-coding
We already have a utility for this, so let's use that instead.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5879>
2020-07-14 10:56:03 +00:00
Erik Faye-Lund
0a4aa612ba mesa/main: factor out one-time-init into a helper
This will make the next commit a bit cleaner.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5879>
2020-07-14 10:56:03 +00:00
Karol Herbst
38e3cbb639 gv100/ir: set ftz bit on floating point operations
Fixes Unigine Heavens ambient occlusion

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5881>
2020-07-14 10:35:24 +00:00
Eric Engestrom
f95637f01a meson: fix android vulkan build
Android doesn't have `pthread_cancel()` and is unlikely to ever
implement it [1], but `wsi_common_display.c` needs it (or an
alternative).

Let's just disable the platform on Android (as it used to be
before 448eb19158).

[1] https://android-review.googlesource.com/c/platform/bionic/+/1215779/1/docs/status.md

Fixes: 448eb19158 ("vulkan: automatically compile the `display` platform when available")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5860>
2020-07-14 09:34:54 +00:00
Michel Dänzer
3ed104b2aa gitlab-ci: Drop dependencies:
Artifacts from jobs listed in needs: are downloaded by default, so
there's no need to list them in dependencies: as well (in fact,
https://docs.gitlab.com/ce/ci/yaml/#artifact-downloads-with-needs says
using dependencies: together with needs: is invalid, so we might have
been getting lucky...).

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5845>
2020-07-14 08:51:14 +00:00
Michel Dänzer
aa2457fc13 gitlab-ci: Remove indirect dependencies from needs:
Tomeu discovered that GitLab 12.8 fixed the bug where jobs would
spuriously run even though some of their dependency jobs were skipped.
So we don't need to list indirect dependencies anymore.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5845>
2020-07-14 08:51:14 +00:00
Connor Abbott
bf1376aba0 tu: Don't invalidate irrelevant state when changing pipeline
At least in the future this could let us avoid re-emitting gfx/cs
constants when the other changes. This also matches what the blob does.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5877>
2020-07-14 10:23:58 +02:00
Connor Abbott
a16136796f freedreno/a6xx: Add some documentation for shared consts
I'm not convinced we'll actually want to use this, and there may be
another enable bit in SP_UNKNOWN_AB00, but it's nice to at least write
this down in case we want to try using it in the future.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5877>
2020-07-14 10:23:58 +02:00
Connor Abbott
e1fa740c4c freedreno/a6xx: Rename and document HLSQ_UPDATE_CNTL
It turns out that this clears CP_LOAD_STATE6 packets, including
disabling any pending loads for SS6_INDIRECT/SS6_BINDLESS (these loads
don't actually happen until the draw itself, and I'm not sure if they
happen if the state is unused by the shader) and marking constants and
UBO descriptors loaded with SS6_DIRECT as invalid. It's used very
differently from HLSQ_UPDATE_CNTL on a4xx from whence the name came, and
unlike on a4xx it's not readable, so this probably doesn't line up with
HLSQ_UPDATE_CNTL on a4xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5877>
2020-07-14 10:23:58 +02:00
Serge Martin
dad042b15a clover: implements clEnqueueFillBuffer
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5897>
2020-07-14 09:33:02 +02:00
Serge Martin
fea109d40f clover: add more cl_mem_object_type to pipe_texture_target mapping
It avoid unnecessary CL_INVALID_VALUE return from clGetSupportedImageFormats

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5897>
2020-07-14 09:33:02 +02:00
Samuel Pitoiset
ac642d8e6d radv: add the custom border color BO to the list of buffers
The buffer was never added to the list of buffers. This might lead to
VM faults and GPU hangs.

Found this by luck.

Fixes: 57e796a12a ("radv: Implement VK_EXT_custom_border_color")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5884>
2020-07-14 08:29:06 +02:00
Kristian H. Kristensen
684cfca748 freedreno/registers: Rename SP_2D_SRC_FORMAT
This register contains information about the destination format, so
let's rename to SP_2D_DST_FORMAT.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
d5c82c3c5f freedreno/a6xx: Split clear and blit texture into different functions
Now that most of the state programming is in shareable helpers, we can
split emit_blit_or_clear_texture into emit_blit_texture and
fd6_clear_surface.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
f383b2c18a freedreno/a6xx: Don't take pipe_blit_info in emit_blit_dst
We only need a few fields and we'll want to use this in cases where we
don't have a pipe_blit_info.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
3158b8ba0a freedreno/a6xx: Program RB_UNKNOWN_8C01 in setup helper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
3ee89e6d03 freedreno/a6xx: Move CP_SET_MARKER to setup helper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
3961fb7e28 freedreno/a6xx: Move REG_A6XX_SP_2D_SRC_FORMAT programming to helper
Rename helper to emit_blit_setup().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
03ad130bc9 freedreno/a6xx: Program A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT based on dst format
It's a badly named register...

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
5c3c0c5c7b freedreno/a6xx: Make blit_control helper a little more helpful
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
77d4aa7687 freedreno/a6xx: Enable FMT6_10_10_10_2_UNORM blitting
Now that we correctly program the _DEST version for the blit
destination and use float16 internal format, these formats work with
the blitter.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
1a58596258 freedreno/a6xx: Separate stencil sysmem clear fix
We need to clear with PIPE_FORMAT_S8_UINT.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
ab61393bc7 freedreno/a6xx: Don't emit src state when clearing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
416513d915 freedreno/a6xx: Consolidate computing blit_cntl
Compute the blit_cntl value in one place and group it with the
register writes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
b36c675858 freedreno/a6xx: Program SP_2D_SRC_FORMAT outside blit loop
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
556cd8f3e1 freedreno/a6xx: Set src and dst rects outside blit loop
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
25bfc3b049 freedreno/a6xx: Don't set unknown bit when tiling differs
There is a bit here that's sometimes set, but it's generally not
related to whether tiling differs between src and dst.  Let's stop
setting it until we know more.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
def7e7426d freedreno/a6xx: Split out src and dst setup helpers for blit
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
bf0cf4c181 freedreno/a6xx: Move fd6_ifmt into fd6_blitter.c
It's only used in this file.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Kristian H. Kristensen
094b68fa72 freedreno/a6xx: Don't blit with R2D_RAW
Map all formats to a valid ifmt.  FMT6_10_10_10_2_UNORM_DEST still
doesn't work on the blitter so keep that one on the u_blitter path.

Fixes
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.*
with FD_MESA_DEBUG=nogmem.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
2020-07-14 06:12:22 +00:00
Jonathan Marek
53e36cf062 turnip: drop GS clear path
We didn't know how to write layer id without GS, since that's the only way
to do it through VK/GL, and the blob didn't implement this clear case (and
failed cases where it was absolutely necessary). However now we know how to
set it after some educated guesses and looking at tess/geom traces, so the
GS path can be dropped.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5790>
2020-07-14 04:05:24 +00:00
Jonathan Marek
a1a80c38ea turnip: clean up primitive output state
We only need to emit one set of primitive output registers. This may differ
from the blob, because it seems to try to allow using the same pipeline
with tess/geom enabled/disabled.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5790>
2020-07-14 04:05:24 +00:00
Jonathan Marek
7748afbb1e freedreno/regs: update primitive output related registers
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5790>
2020-07-14 04:05:24 +00:00
Eric Anholt
5c1afd1ce4 freedreno/ir3: Fix uninit var warning.
It's a decent bit of analysis to see that the initialization will always
happen, and my compiler isn't doing so in at least one configuration.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5834>
2020-07-14 03:38:53 +00:00
Eric Anholt
afb3f21c9f freedreno/ir3_cmdline: Fix an uninit var warning.
You could only access entry through the initialized path, but we can clean
up the compiler warning by not keeping the other var.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5834>
2020-07-14 03:38:53 +00:00
Hyunjun Ko
d941c6b74f turnip: implement VK_EXT_private_data
Which is using base class's implementation.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5539>
2020-07-14 02:48:30 +00:00
Hyunjun Ko
5d3fdbc52b turnip: Use the common base object type and struct.
v2. Define new helper function to avoid duplicated a pair of function calls.
v3. Move new helper functions to vk_object.h and call them.
v4. Merge 2 commits to use commomn base object type and struct into one.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5539>
2020-07-14 02:48:30 +00:00
Hyunjun Ko
cd85315dcb tu: Fix wrong copies of sampler descriptor.
Found this with the following patch but it exists since adding ycbcr
sampler to the struct.

Fixes: d070a7ba0c

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5539>
2020-07-14 02:48:30 +00:00
Hyunjun Ko
3a153137f4 vulkan: Adds helpers for vk_object (de)alloation and (de)initialization.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5539>
2020-07-14 02:48:30 +00:00
Rob Clark
f076c36367 gitlab-ci: reduce a630 runner load
They seem to be sometimes taking a while to boot, which is triggering CI
timeouts.  (Possibly tftp server in bad shape?)  Cut out non-essential
a630 CI jobs, and reduce the gles3/gles31 jobs to compensate.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5893>
2020-07-13 19:03:39 -07:00
Eric Engestrom
b7b72681bd meson/intel: add missing dep on git_sha1.h
Fixes: 805b32cab9 ("intel: add identifier for debug purposes")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5882>
2020-07-13 21:26:25 +00:00
Mike Blumenkrantz
d4f4546ada zink: use type of src[0] for ntv store and load ops
in some cases (e.g., gl_ClipDistance) the nir_variable type doesn't match
the needed destination type, so we can simplify this code to just use
the destination type

fixes spec@glsl-1.10@execution@interpolation@interpolation-none-gl_backcolor-smooth-vertex

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5852>
2020-07-13 21:13:45 +00:00
Mike Blumenkrantz
359c938483 zink: add lengthy comment and remove assert from discard_if ntv pass
as in the comment, while we may want to try verifying that discard will be
the last instruction in a block, it's a bit problematic given that other nir
passes we're doing may insert instructions after a discard as part of e.g.,
nir_opt_dead_cf in the process of removing another block

fixes shaders@glsl-fs-discard-04

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5852>
2020-07-13 21:13:45 +00:00
Mike Blumenkrantz
97ec109d8f zink: handle ntv case of nested loop instructions more permissively
if the last instruction in a loop's body terminates a block, e.g., from
a nested loop with a jump as its final instruction, then no block will
have been started when returning to the original loop, and there's no need
to emit a branch

fixes shaders@glsl-vs-continue-in-switch-in-do-while

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5852>
2020-07-13 21:13:45 +00:00
Mike Blumenkrantz
e40a77ea5d zink: use right vulkan type for GL_PRIMITIVES_GENERATED queries
VK_QUERY_PIPELINE_STATISTIC_INPUT_ASSEMBLY_PRIMITIVES_BIT includes
primitives which won't get drawn due to e.g., not enough vertices emitted
by geometry shader

fixes spec@glsl-1.50@gs-emits-too-few-verts

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5533>
2020-07-13 20:59:07 +00:00
Mike Blumenkrantz
b9b943793b zink: only reset query pool on query end if current batch isn't in renderpass
reset can't be performed during a renderpass, so we need to defer that until a
time when we're definitely not in a renderpass, such as when we're starting a
new query or resuming a query

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5533>
2020-07-13 20:59:07 +00:00
Mike Blumenkrantz
2c02ca2184 zink: properly handle query pool overflows
inline a query result value to each query object so we can stash the partial
result just before we do a pool reset, which will always happen during the
suspend/resume query mechanism that swaps active queries from a flushed batch
to the next batch

once (or if) the "real" call to fetch query results is called, we can dump the
inlined value into the fetch value and return the full results

fixes mesa/mesa#3000

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5533>
2020-07-13 20:59:07 +00:00
Mike Blumenkrantz
510631ad76 zink: only stall during query destroy for xfb queries
xfb queries allocate vk buffer objects in the underlying driver which
can be deallocated while an xfb query is in-flight if we attempt to
defer it due to the way that gl xfb is translated to vk, so we need to
continue forcing this behavior in that case

for other query types, we can safely defer here until the current batch has
finished rather than block

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5533>
2020-07-13 20:59:07 +00:00
Mike Blumenkrantz
27defcd20e zink: use #define for number of queries per-pool
just to ensure we're consistent internally

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5533>
2020-07-13 20:59:07 +00:00
Mike Blumenkrantz
3eea7fc88b zink: rework query handling
this hooks up query objects to the batches that they're actively running on
(and the related fence) in order to manage the lifetimes of queries more
efficiently by calling vkCmdResetQueryPool only on init and when the query
pool has been completely used up. additionally, this resolves some vk spec
issues related to destroying pools with active queries

note that any time a query pool is completely used up, results are lost,
which is a very slight improvement on the previous abort() that was triggered
in that scenario

ref mesa/mesa#3000

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5533>
2020-07-13 20:59:07 +00:00
Italo Nicola
2096903a05 panfrost: Fix outmods on int to float conversions
No shader-db changes (Alyssa).

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5883>
2020-07-13 20:38:03 +00:00
Eric Engestrom
be8a8edb1e docs/submittingpatches: add more than one Cc: mesa-stable example to the examples list
Starting with that very example :)

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5880>
2020-07-13 19:33:25 +00:00
Alyssa Rosenzweig
da23a31726 docs/features: Update ASTC entries for Panfrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5856>
2020-07-13 11:24:41 -04:00
Alyssa Rosenzweig
f34b8d3609 panfrost: Map PIPE_{DXT, RGTC, BPTC} to MALI_BCn
Mali (and Vulkan) uses D3D naming conventions for these formats where
Gallium/Mesa uses OpenGL names, but the formats are equivalent. sRGB is
communicated out-of-band on Mali; otherwise, it appears to be a 1:1
mapping.

On supported devices, this exposes GL_EXT_texture_compression_rgtc and
GL_ARB_texture_compression_bptc, so update features.txt

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5856>
2020-07-13 11:24:41 -04:00
Alyssa Rosenzweig
6da405ca77 panfrost: Filter compressed texture formats
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5856>
2020-07-13 11:22:00 -04:00
Alyssa Rosenzweig
407a052ced panfrost: Pipe in compressed texture feature mask
So we can query at run-time as part of Gallium's checks.

v2: More explicit naming.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5856>
2020-07-13 11:21:59 -04:00
Alyssa Rosenzweig
d5a9cd1b7d panfrost: Add format codes for new compressed textures
Compressed formats line up with CONFIG_TEX_COMPRESSED_FORMAT_ENABLE
documented on
https://releases.linaro.org/archive/14.07/android/images/armv8-android-juno-lsk/

None of the new formats have been seen in the wild.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5856>
2020-07-13 11:21:35 -04:00
Alyssa Rosenzweig
64608b4bcf panfrost: Compact unused BO flag bits
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5859>
2020-07-13 14:42:33 +00:00
Alyssa Rosenzweig
c6ebff3ecd panfrost: Remove panfrost_bo_access type
It's just whether it writes or not, which is already implied by the
presence/absence of a writer. So no need to track explicitly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5859>
2020-07-13 14:42:33 +00:00
Alyssa Rosenzweig
62ec4e02f6 panfrost: Remove PAN_BO_DONT_REUSE
Equivalent to SHARED.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5859>
2020-07-13 14:42:33 +00:00
Alyssa Rosenzweig
d6e3808e7e panfrost: Remove PAN_BO_COHERENT_LOCAL
Ancient relic from kbase. Panfrost kernel doesn't need this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5859>
2020-07-13 14:42:33 +00:00
Alyssa Rosenzweig
baa1a8fbba panfrost: Merge PAN_BO_IMPORTED/PAN_BO_EXPORTED
Always checked together and really signal the same property from
different perspectives.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5859>
2020-07-13 14:42:33 +00:00
Alyssa Rosenzweig
0aa6de967b panfrost: Index BOs from the BO map sparse array
Now we have a central store of them, so we may remove active_bo.

v2: Squash two patches together to prevent a race condition mid-series.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5859>
2020-07-13 14:42:33 +00:00
Alyssa Rosenzweig
169dbb5b08 panfrost: Add a sparse array to map GEM handles to BOs
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5859>
2020-07-13 14:42:33 +00:00
Alyssa Rosenzweig
37d89e0f93 panfrost: Fix write to free'd memory
No clue how this worked before.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Fixes: 82f18b713a ("panfrost: Keep track of active BOs")
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5859>
2020-07-13 14:42:33 +00:00
Alyssa Rosenzweig
20dd37024b panfrost: Fix fence leak
When overwriting the writer, we need to release the old reference.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Fixes: 2dad9fde50 ("panfrost: Start tracking inter-batch dependencies")
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5859>
2020-07-13 14:42:33 +00:00
Rhys Perry
15a17fddad aco: add 32-bit integer addition to can_swap_operands
fossil-db (Navi):
Totals from 167 (0.12% of 135946) affected shaders:
CodeSize: 484892 -> 482628 (-0.47%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5695>
2020-07-13 14:11:50 +00:00
Rhys Perry
ec9920e72b radv: use lower_shuffle_to_swizzle_amd
Affects a few shaders in Detroit: Become Human and Doom Eternal.

fossil-db (Navi):
Totals from 9 (0.01% of 135946) affected shaders:
CodeSize: 31188 -> 25096 (-19.53%)
Instrs: 6136 -> 4999 (-18.53%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5695>
2020-07-13 14:11:50 +00:00
Rhys Perry
7ba645d5cb nir/lower_subgroups: add lower_shuffle_to_swizzle_amd
masked_swizzle_amd can be much faster than shuffle.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5695>
2020-07-13 14:11:50 +00:00
Rhys Perry
9c317cb278 nir/lower_subgroups: pass options struct to lower_shuffle
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5695>
2020-07-13 14:11:50 +00:00
Rhys Perry
a6a731bea5 aco: implement <32-bit masked_swizzle_amd
This is needed since we will be lowering some 8/16-bit shuffles to
masked_swizzle_amd.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5695>
2020-07-13 14:11:50 +00:00
Rhys Perry
d377fbf95d aco: optimize some masked swizzles to DPP
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5695>
2020-07-13 14:11:50 +00:00
Rhys Perry
09f48de582 aco: read 0 from inactive lanes when using dpp
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5695>
2020-07-13 14:11:50 +00:00
Icecream95
c417172751 panfrost: Enable framebuffer fetch
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:11 +00:00
Alyssa Rosenzweig
317be5a16d panfrost: Extend fetched framebuffer results
So NIR doesn't complain about invalid swizzles when reading a format
with less than 4 channels.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:11 +00:00
Alyssa Rosenzweig
d94584c5a6 panfrost: Always use SOFTWARE for pure formats
Otherwise we end up implicitly converting ints to floating point.
Likewise for floats which again have strange interactions.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:11 +00:00
Alyssa Rosenzweig
b9869e0e5e panfrost: Generate shader variants on framebuffer bind
If we keyed the shader for the framebuffer.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:11 +00:00
Icecream95
a3952e927e panfrost: Use f2fmp for framebuffer lowering conversions
This allows the conversion to be removed when the output is needed as
f32 anyway, for example for highp framebuffer fetch.

v2: Also change operations such as i2i16 to i2imp (Alyssa).

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:11 +00:00
Icecream95
d16d136734 panfrost: Stop keying on rt format when using native loads
Native loads are the same for any format, so we can use the same
shader variant for all framebuffer formats with a native load.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:11 +00:00
Icecream95
391ad72812 panfrost: Implement texture_barrier
This is needed for KHR_blend_equation_advanced with a blend
barrier.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:11 +00:00
Icecream95
2fbe7ca9d9 pan/mdg: Use a 32-bit ld_color_buffer op when needed
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:11 +00:00
Icecream95
18059f48f8 pan/mdg: Set the z/s store intrinsic base correctly
When EXT_shader_framebuffer_fetch is used and only depth and/or
stencil are written, we can't rely on the first output being to
depth/stencil.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:11 +00:00
Icecream95
7781d2c2ea pan/mdg: Support MRT in output load lowering
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:10 +00:00
Icecream95
2fa60b70e0 pan/mdg: Handle non-blend framebuffer lowering
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:10 +00:00
Icecream95
ed4d2739fe pan/mdg: Emit a tilebuffer wait loop when needed
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:10 +00:00
Icecream95
1e1eee992e pan/mdg: Do the pan_lower_framebuffer pass later
The pass is useful for EXT_shader_framebuffer_fetch, not just blend
shaders, so we should do it with the other lowering passes in
midgard_compile_shader_nir.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:10 +00:00
Icecream95
e603248e07 panfrost: Add a bitset of render targets read by shaders
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:10 +00:00
Icecream95
75018f6495 panfrost: Add rt formats to shader state
load_output lowering will depend on the framebuffer formats.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:10 +00:00
Icecream95
f2eced9660 pan/mdg: Use the writeout tag for tilebuffer wait loops
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:10 +00:00
Icecream95
61dfc3c693 pan/mdg: Handle tilebuffer wait loops
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:10 +00:00
Alyssa Rosenzweig
b29027f9dc panfrost: Clamp pure int pixels
We need saturate, not wrap semantic. Could optimize to a .isat/.usat
modifier but that's for future.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:10 +00:00
Icecream95
4141d26ee1 panfrost: Fix MALI_READS_TILEBUFFER
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:10 +00:00
Icecream95
2e3a589e6c nir: Add a base value to load_raw_output_pan
This is the render target the read instruction uses.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
2020-07-13 13:35:10 +00:00
Eric Engestrom
69ef180837 glx: drop always-true #ifdef
Meson already guarantees we have at least xdamage >= 1.1

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5862>
2020-07-13 09:08:00 +00:00
Eric Engestrom
3900659051 egl/wayland: add missing newline between functions
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5862>
2020-07-13 09:08:00 +00:00
Roman Stratiienko
ae5ac4cbb6 egl: Build surfaceless platform on Android
Fixes: a38e21d668 ("egl: always compile surfaceless")
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5866>
2020-07-13 08:46:55 +00:00
Samuel Pitoiset
00ca9b8142 radv: advertise VK_EXT_extended_dynamic_state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
b262284300 radv: add support for dynamic vertex input binding stride
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
9cc99baa4a radv: add support for dynamic depth/stencil states
Out-of-order rasterization is disabled if a pipeline uses an
extended dynamic depth/stencil state because the driver doesn't
support enabling/disabling out-of-order dynamically.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
e8a69b782d radv: add support for dynamic and scissor count
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
d6c1e5051e radv: add support for dynamic primitive topology
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
52bf1035a6 radv: add support for dynamic cull mode and front face
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
77499414d7 radv: declare new extended dynamic states
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
2693770806 radv: add VK_EXT_extended_dynamic_state but leave it disabled
To make sure the new prototypes are declared.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
ac575f4215 radv: rework dynamic viewports/scissors support
The number of viewports/scissors is currently static because it can
only be specified at pipeline creation, but it doesn't hurt to
assume it's dynamic. Will help for supporting setting the number
of viewports/scissors dynamically.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
7324977e42 radv: remove the secure compile support feature
Steam was the only client of this feature and it seems no longer used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5869>
2020-07-13 08:56:44 +02:00
Dave Airlie
59b4c623c9 nouveau: avoid LTO ODR warning (v2)
../src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp:69:8: warning: type ‘struct opProperties’ violates the C++ One Definition Rule [-Wodr]
   69 | struct opProperties
      |        ^
../src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp:88:8: note: a different type is defined in another translation unit
   88 | struct opProperties
      |        ^
../src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp:77:17: note: the first difference of corresponding definitions is field ‘fShared’
   77 |    unsigned int fShared : 3;
      |                 ^
../src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp:96:17: note: a field with different name is defined in another translation unit
   96 |    unsigned int fImmd  : 4; // last bit indicates if full immediate is suppoted

nvc0 code also has the same thing.

v2: rename both paths (Karol)

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5873>
2020-07-13 12:17:21 +10:00
Karol Herbst
ac002b15d3 nvc0: set sampler index mode to independently on gv100 compute
We don't use linked texture/samplers. Fixes a bunch of CTS issues which
also seem to fail a bit randomly depending on what tests ran before and
such, so the list is incomplete.

Fixes:
KHR-GL46.texture_gather.*
KHR-GL46.compute_shader.resource-texture
KHR-GL46.multi_bind.dispatch_bind_samplers
KHR-GL46.multi_bind.dispatch_bind_textures
KHR-GL46.shading_language_420pack.binding_sampler_array
KHR-GL46.shading_language_420pack.binding_sampler_single
KHR-GL46.shading_language_420pack.binding_samplers
KHR-GL46.stencil_texturing.functional
KHR-GL46.texture_gather.incomplete-texture-last-comp

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5874>
2020-07-13 03:26:46 +02:00
Samuel Pitoiset
55776a0ae0 radv: return VK_ERROR_DEVICE_LOST if wait-for-idle failed or expired
When ctx_wait_idle failed, something really bad happened likely
a GPU hang. Make sure to return the appropriate Vulkan error code
in this case.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5843>
2020-07-12 13:17:42 +02:00
Jason Ekstrand
351b5137d7 spirv: Allow block-decorated struct types for constants
Whenever a struct type is decorated Block or BufferBlock we turn that
into a GLSL_TYPE_INTERFACE.  Since these decorations can end up random
places, we should allow them for constants.

Closes: #3252
Fixes: 9d0ae777dd "spirv: Use interface type for block and buffer..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5855>
2020-07-12 00:02:45 +00:00
Jason Ekstrand
81773b4b44 spirv: Skip phis in unreachable blocks in the second phi pass
Closes: #3253
Fixes: 22fdb2f855 "nir/spirv: Update to the latest revision"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5855>
2020-07-12 00:02:45 +00:00
Karol Herbst
e086f64d39 nvc0: set local mem size for compute on gv100
This is required when the shader uses local memory for arrays or spills.
I really dislike how it's done right now, but oh well, it's the same for
other gens.

Fixes CTS tests:
KHR-GL46.shading_language_420pack.binding_image_array
KHR-GL46.shading_language_420pack.length_of_compute_result

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5840>
2020-07-11 19:57:18 +00:00
Jonathan Marek
248fbe1567 freedreno: fix layout pitchalign field not being set for imported buffers
The pitchalign value was being left to 0 and then wrapping around when
the base offset was subtracted in texture state.

Fixes: 979e7e3680 ("freedreno/layout: layout simplifications and pitch from level 0 pitch")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5864>
2020-07-11 13:53:13 -04:00
Mike Blumenkrantz
b8df1c43d2 nir: allow nir_lower_clip_halfz to run in geometry shaders
the final output of gl_Position needs this transform, and geometry shaders
must write this value for stream 0 if rasterization is enabled

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5851>
2020-07-11 07:32:25 +00:00
Mike Blumenkrantz
3fe87a5836 nir: allow nir_lower_point_size_mov to run in geometry shader
geometry shaders may need to emit PSIZ as well

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5851>
2020-07-11 07:32:24 +00:00
Yevhenii Kolesnikov
36abb0c691 intel/compiler: don't propagate cmp to add if add is saturated
From the Kaby Lake PRM Vol. 7 "Assigning Conditional Flags":

   * Note that the [post condition signal] bits generated at
     the output of a compute are before the .sat.

Paragraph about post_zero does not mention saturation, but
testing it on actual GPUs shows that conditional modifiers
are applied after saturation.

   * post_zero bit: This bit reflects whether the final
     result is zero after all the clamping, normalizing,
     or format conversion logic.

For signed types we don't care about saturation: it won't
change the result of conditional modifier.

For floating and unsigned types there two special cases,
when we can remove inst even if scan_inst is saturated: G
and LE. Since conditional modifiers are just comparations
against zero, saturating positive values to the upper
limit never changes the result of comparation.

For negative values:
(sat(x) >  0) == (x >  0) --- false
(sat(x) <= 0) == (x <= 0) --- true

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2610

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4167>
2020-07-11 00:25:48 +00:00
Rhys Perry
19ca34ed27 aco: don't create phis with undef operands in the boolean phi pass
We can create better merge code is we pass on undef.

fossil-db (Navi):
Totals from 1208 (0.89% of 135946) affected shaders:
SGPRs: 66864 -> 66200 (-0.99%); split: -1.04%, +0.05%
SpillSGPRs: 1179 -> 1156 (-1.95%)
CodeSize: 6516672 -> 6469564 (-0.72%); split: -0.76%, +0.04%
Instrs: 1232680 -> 1220859 (-0.96%); split: -0.97%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3388>
2020-07-10 22:36:14 +00:00
Rhys Perry
9a089baff1 aco: optimize boolean phis with uniform selections
Even though the boolean can be divergent, the control flow can be (at
least partially) uniform. For example, we don't have to create any
s_andn2_b64/s_and_b64/s_or_b64 instructions with this code:
a = ...
loop {
    b = bool_phi a, c
    if (uniform)
        break
    c = ...
}
d = phi c

fossil-db (Navi):
Totals from 5506 (4.05% of 135946) affected shaders:
SGPRs: 605720 -> 604024 (-0.28%)
SpillSGPRs: 52025 -> 51733 (-0.56%)
CodeSize: 65221188 -> 64957808 (-0.40%); split: -0.41%, +0.00%
Instrs: 12637881 -> 12584610 (-0.42%); split: -0.42%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3388>
2020-07-10 22:36:14 +00:00
Rhys Perry
f622e80494 aco: create better code for boolean phis with constant operands
fossil-db (Navi):
Totals from 6394 (4.70% of 135946) affected shaders:
SGPRs: 651408 -> 651344 (-0.01%)
SpillSGPRs: 52102 -> 52019 (-0.16%)
CodeSize: 68369664 -> 68229180 (-0.21%); split: -0.21%, +0.00%
Instrs: 13236611 -> 13202126 (-0.26%); split: -0.26%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3388>
2020-07-10 22:36:14 +00:00
Rhys Perry
47b0653d5d aco: rework boolean phi pass
The pass should now create much less linear phis.

Removes piles of phis and lots of sgpr spilling from Detroit: Become
Human and parallel-rdp.

fossil-db (Navi):
Totals from 7654 (5.63% of 135946) affected shaders:
SGPRs: 796224 -> 787616 (-1.08%); split: -1.08%, +0.00%
VGPRs: 576164 -> 572116 (-0.70%); split: -0.70%, +0.00%
SpillSGPRs: 147695 -> 52258 (-64.62%)
SpillVGPRs: 2167 -> 2102 (-3.00%)
CodeSize: 80671680 -> 76240420 (-5.49%); split: -5.50%, +0.01%
Scratch: 137216 -> 135168 (-1.49%)
MaxWaves: 54235 -> 54707 (+0.87%)
Instrs: 15569429 -> 14820569 (-4.81%); split: -4.82%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Co-authored-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3388>
2020-07-10 22:36:14 +00:00
Dave Airlie
05e23cb23d llvmpipe/cs: fix image/sampler binding for compute
The compute shader dirtying is a bit wrong here, since we don't
have a second stage like for fragment shaders, so dirty the compute
shader whenever a sampler or image changes, (ssbo/contexts don't
needs this).

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5835>
2020-07-10 22:04:27 +00:00
Dave Airlie
54232bee06 llvmpipe: flush resources on sampler view binding
The resource may have been written to as images previously.

KHR-GL45.shader_image_load_store.advanced-sync-imageAccess2

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5835>
2020-07-10 22:04:27 +00:00
Dave Airlie
7582f4a49c llvmpipe: denote NEW fs when images change.
The fragment shader needs to be regenerated here,
so flag the same as for sampler views.

This causes correct flushing:
KHR-GL46.shader_image_load_store.non-layered_binding

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5835>
2020-07-10 22:04:27 +00:00
Karol Herbst
033e933348 nv50/ir/tgsi: move call to tgsi_scan_shader inside Source constructor
We actually need it there already, we just missed to move it.

Fixes: 66ed9792ed ("nv50: Clear nv50_ir_prog_info of dead and codegen specific variables")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5849>
2020-07-10 21:52:40 +00:00
Eric Engestrom
c905e48593 bin/gen_release_notes.py: drop new_features.txt when we release XX.Y.0
Otherwise, we (rightfully) get a warning about having new features in
a bugfix release.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5416>
2020-07-10 20:03:21 +00:00
Eric Engestrom
7f61f4180b introduce commit_in_branch.py script to help devs figure this out
It's been pointed out to me that determining whether a commit is present
in a stable branch is non-trivial (cherry-picks are a pain to search for)
and the commands are hard to remember, making it too much to ask.

This script aims to solve that problem; at its simplest form, it only
takes a commit and a branch and tells the user whether that commit
predates the branch, was cherry-picked to it, or is not present in any
form in the branch.

    $ bin/commit_in_branch.py e58a10af64 fdo/20.1
    Commit e58a10af64 is in branch 20.1
    $ echo $?
    0

    $ bin/commit_in_branch.py dd2bd68fa6 fdo/20.1
    Commit dd2bd68fa6 was backported to branch 20.1 as commit d043d24654
    $ echo $?
    0

    $ bin/commit_in_branch.py master fdo/20.1
    Commit 2fbcfe170bf50fcbcd2fc70a564a4d69096d968c is NOT in branch 20.1
    $ echo $?
    1

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5306>
2020-07-10 20:01:32 +00:00
Lionel Landwerlin
40a6de176d anv: fix uninitialized variable access
Found with valgrind :

  ==415016== Conditional jump or move depends on uninitialised value(s)
  ==415016==    at 0x513C22B: anv_cache_lock (anv_pipeline_cache.c:346)
  ==415016==    by 0x513C2A0: anv_pipeline_cache_search (anv_pipeline_cache.c:364)
  ==415016==    by 0x50E7C88: lookup_blorp_shader (anv_blorp.c:38)
  ==415016==    by 0x5D20A98: blorp_params_get_clear_kernel (blorp_clear.c:60)
  ==415016==    by 0x5D23EFD: blorp_ccs_ambiguate (blorp_clear.c:1358)
  ==415016==    by 0x50EDE25: anv_image_ccs_op (anv_blorp.c:1882)
  ==415016==    by 0x555D92F: transition_color_buffer (genX_cmd_buffer.c:1179)
  ==415016==    by 0x5598B71: cmd_buffer_begin_subpass (genX_cmd_buffer.c:5060)
  ==415016==    by 0x559AB00: gen9_CmdBeginRenderPass (genX_cmd_buffer.c:5772)
  ==415016==    by 0x11DACE: begin_render_pass (vr-test.c:375)
  ==415016==    by 0x11DF55: set_state (vr-test.c:529)
  ==415016==    by 0x11F7A1: clear (vr-test.c:1228)

v2: Don't break external sync feature

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5823>
2020-07-10 17:54:35 +00:00
Lionel Landwerlin
e3ddba7324 iris: fix fallback to swrast driver
The helper we use to query the kernel returns -1 if the getparam is
not supported.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f402b7c576 ("iris: fail screen creation when kernel support is not there")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3188
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5838>
2020-07-10 17:40:21 +00:00
Eric Engestrom
e00adef34a egl: automatically compile the drm platform when available
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3161>
2020-07-10 13:48:24 +00:00
Eric Engestrom
60ad006b27 meson: move xlib-lease block further down
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3161>
2020-07-10 13:48:24 +00:00
Eric Engestrom
448eb19158 vulkan: automatically compile the display platform when available
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3161>
2020-07-10 13:48:24 +00:00
Eric Engestrom
a38e21d668 egl: always compile surfaceless
It has no dependencies and costs virtually nothing to build. There is
no downside to enabling it unconditionally, so let's do just that.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3161>
2020-07-10 13:48:23 +00:00
Mike Blumenkrantz
e66e0c0c2d u_prim_restart: handle user buffers in util_translate_prim_restart_ib()
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5806>
2020-07-10 10:54:44 +00:00
mmenzyns
66ed9792ed nv50: Clear nv50_ir_prog_info of dead and codegen specific variables
These variables are either not used in the code, only assigned but
never accessed, or only used inside codegen. Another reason is that this
patch will be preceding shader cache, and these variables are useless to
cache. Removing/moving them should make it clearer by removing the case something
from the structure is not cached.

Shader cache patch: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4264

Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5697>
2020-07-10 10:17:59 +00:00
Pierre-Eric Pelloux-Prayer
50d20dc055 ac/llvm: export ac_init_llvm_once in targets
If a program like mpv uses both radeon_dri.so (because --vo=gpu) and
radeonsi_drv_video.so (because --hwdec=vaapi) then LLVM will be inialized twice.

The commit exports the ac_init_llvm_once so there's only one instance of the
function.

See also 18b12bf533 ("targets: export radeon winsys_create functions to silence LLVM warning")
which implemented this workaround initially.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1377
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5648>
2020-07-10 11:57:11 +02:00
Pierre-Eric Pelloux-Prayer
8da237428c bin/symbols-check.py: add --ignore-symbol argument
This will be used by radv to ignore 'the ac_init_llvm_once' symbol,
which is not part of vulkan-icd-symbols.txt but is required to be
exported to improve interop with radeonsi/vaapi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5648>
2020-07-10 11:57:11 +02:00
Pierre-Eric Pelloux-Prayer
51bdaf0b60 st/mesa: set compressed_data to NULL when freed
Reported-by: Karol Herbst <kherbst@redhat.com>
Fixes: b6db703e0f ("st/mesa: make texture views inherit compressed_data storage")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5821>
2020-07-10 09:30:26 +02:00
Samuel Pitoiset
ca51f75f9d aco: fix more validation errors from vgpr spill/restore code
It looks like the attempt to fix this in 1e791e51a6 was incomplete.

This fixes crashes with Devil May Cry 5 with a debug build.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5828>
2020-07-10 08:28:33 +02:00
Timothy Arceri
1af1eb9f7b gitlab-ci: Enable -Werror in meson-gallium job
It's warning-clean.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5799>
2020-07-10 00:32:51 +00:00
Timothy Arceri
81317e2c14 lima: add missing break
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5799>
2020-07-10 00:32:51 +00:00
Timothy Arceri
38218ab7e2 lima: add missing fallthrough comments
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5799>
2020-07-10 00:32:51 +00:00
Timothy Arceri
745aeba623 etnaviv: add missing fallthrough comments
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5799>
2020-07-10 00:32:51 +00:00
Jordan Justen
44b1f9c6ff iris: Add missing break in switch in modifier_is_supported
The current fall-through doesn't cause a difference in code flow, but
I think we want a break here.

Fixes: 2305ab6938 ("iris: Refactor modifier_is_supported for gen12")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5618>
2020-07-09 17:20:14 -07:00
Jonathan Marek
ffb6eb6d5d freedreno/ir3: run nir_opt_loop_unroll in optimization loop
GL driver was relying on this being done by gallium, but there might be
new loops to unroll during optimizations and turnip needs it.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5818>
2020-07-09 23:30:33 +00:00
Jonathan Marek
9c23afebbe freedreno/ir3: fix setup_input for sparse vertex inputs
With turnip we can have sparse input variables like:

decl_var shader_in INTERP_MODE_NONE float @1 (VERT_ATTRIB_GENERIC1.x, 1, 0)
decl_var shader_in INTERP_MODE_NONE float @2 (VERT_ATTRIB_GENERIC1.y, 1, 0)
decl_var shader_in INTERP_MODE_NONE float @3 (VERT_ATTRIB_GENERIC1.w, 1, 0)

Example of a test fixed:

dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec2.as_float_float_unused

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5818>
2020-07-09 23:30:33 +00:00
Jordan Justen
8dfa072ed8 intel/compiler/fs: Still attempt simd32 when INTEL_DEBUG=no16 is used
If INTEL_DEBUG=no16 is used, then simd16 will not be attempted. This,
in turn prevents simd32 from running, because we attempt to skip
simd32 when simd16 fails to compile.

This change more accurately recognizes when we attempted simd16, but
simd16 failed.

One easy way to cause an issue is to set both no8 and no16. Before
this change, we would be left with no FS program, even though simd32
could still be generated in some cases.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5269>
2020-07-09 15:44:57 -07:00
Jordan Justen
1a4a2f563b intel/compiler/cs: Allow simd32 in some more cases with no8 and/or no16
If no16 was specified, and the shader can't run in simd8 due to the
local_size, then we need to generate a simd32 program.

If both no8 and no16 are specified, then we need to generate a simd32
program.

Rework:
 * Drop update of `if` that would have changed `do32` to try simd32
   even if simd16 spilled registers. (Caio)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5269>
2020-07-09 15:44:34 -07:00
Tomeu Vizoso
9418c8ec8d gitlab-ci: Don't rebuild kernels and rootfs if they have been already built in mainline
Use the ones from mainline if possible to save cycles rebuilding the same files.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5822>
2020-07-09 18:23:37 +00:00
Benjamin Tissoires
1a3eb43d5b gitlab-ci: do not run full CI on scheduled pipelines
Currently, scheduled pipelines are only used to rebuild
the git-cache archive daily. There is no point in rebuilding
eveything, so ensure that any normal jobs are removed from
the scheduled pipelines.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5804>
2020-07-09 19:27:37 +02:00
Benjamin Tissoires
1639d3c2cd gitlab-ci: update ci-fairy minio to latest upstream
the new ci-fairy minio on ci-templates can copy
data to/from the MinIO server with much less permissions.

Upgrading mesa to this commit will allow us to restrict the
git-cache bucket permission to only "fetch" objects, i.e.
not allow anybody to walk through the tree of any repo.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5804>
2020-07-09 19:26:45 +02:00
Alyssa Rosenzweig
b3fdd77385 panfrost: Report blend shader work count
This was going uninitialized, whoops!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5827>
2020-07-09 12:49:13 -04:00
Alyssa Rosenzweig
5247d67302 panfrost: Move panfrost_translate_texture_type
We need it in pan_job.c

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5827>
2020-07-09 12:49:13 -04:00
Alyssa Rosenzweig
816af26f02 panfrost: Handle PIPE_FORMAT_S8_UINT
For wallpaper blits with separate stencil.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5827>
2020-07-09 12:20:27 -04:00
Alyssa Rosenzweig
4c89148834 panfrost: Handle PIPE_FORMAT_X24S8_UINT
We can treat it as RGBA32UI and swizzle away everything but R, like the
blob does. Maybe not the most efficient thing in the world.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5827>
2020-07-09 12:20:27 -04:00
Alyssa Rosenzweig
1fdeef5e4a panfrost: Move scoreboarding routines to common
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5827>
2020-07-09 12:03:08 -04:00
Alyssa Rosenzweig
7ec6ee4057 panfrost: Drop batch from scoreboard routines
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5827>
2020-07-09 12:03:08 -04:00
Alyssa Rosenzweig
fa722887da panfrost: Pass polygon_list to tiler init function
So it doesn't need to allocate it by itself.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5827>
2020-07-09 12:03:08 -04:00
Alyssa Rosenzweig
31197c2c1b panfrost: Factor out scoreboarding state
This is not Gallium-specific, so take it out of the batch.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5827>
2020-07-09 12:03:08 -04:00
Alyssa Rosenzweig
c8d848b278 panfrost: Move pool routines to common code
We finally have it decoupled from Galliumisms (and OpenGLisms, indeed)
so we can share the file.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5794>
2020-07-09 14:54:38 +00:00
Alyssa Rosenzweig
1d88f07820 panfrost: Drop Gallium-local pan_bo_create wrapper
We can handle pandecode in shared code now, which will matter for
tracing non-Gallium drivers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5794>
2020-07-09 14:54:38 +00:00
Alyssa Rosenzweig
ed1910dc68 panfrost: Move debug flags into the device
Removes random global state flying about which doesn't really work for
common code. We cleanup some debug messages while we're at it because
the mostly-unused DBG macro relies on magic state.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5794>
2020-07-09 14:54:38 +00:00
Alyssa Rosenzweig
8958fbd29e panfrost: Expose pool-based allocation API
Pass pools instead of batches, and rename in terms of pools instead of
transient memory for consistency while we're find-and-replacing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5794>
2020-07-09 14:54:38 +00:00
Alyssa Rosenzweig
34e0954f1d panfrost: Track the device through the pool
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5794>
2020-07-09 14:54:38 +00:00
Alyssa Rosenzweig
6ef7c05746 panfrost: Allocate pool BOs against the pool
Instead of against the owning batch, to decouple.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5794>
2020-07-09 14:54:38 +00:00
Alyssa Rosenzweig
8882d6aad6 panfrost: Introduce pan_pool struct
As a first step towards separating pools from batches, let's collect
pool-related state together.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5794>
2020-07-09 14:54:38 +00:00
Alyssa Rosenzweig
5d1bff290a docs/features: Track Panfrost
Mark support for Panfrost with the PAN_MESA_DEBUG=gles3 flag set (which
exposes a few buggier features for GLES 3.0, but we're actually quite
close to conformance. I expect this to become default in a few weeks),
based on what's supported for Mali T860 (our flagship). Less features
are supported on Mali T720 due to h/w limitations, and Bifrost support
is very much still in the pipes but will support all this soon enough.

Closes: #255

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5791>
2020-07-09 10:12:10 -04:00
Eric Engestrom
9497a1fbe7 docs: fix a bunch of typos
Saw a couple myself, and a quick round of vimspell showed a bunch more.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5814>
2020-07-09 14:06:34 +00:00
Pierre-Eric Pelloux-Prayer
49d35f3d88 glsl: declare gl_Layer/gl_ViewportIndex/gl_ViewportMask as vs builtins
Otherwise a VS doing the following:

out gl_PerVertex {
    vec4 gl_Position;
    int gl_ViewportIndex;
};

cannot be compiled because of the following error:
  "redeclaration of gl_PerVertex must be a subset of the built-in
  members of gl_PerVertex"

v2: add GLSL_PRECISION_HIGH param to add_varying() for "gl_Layer" in
    generate_fs_special_vars.
v3: add GLSL_PRECISION_HIGH param to add_varying() for "gl_Layer" in
    generate_varyings.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2946
Tested-by: John Galt <johngalt@fake.mail>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v3)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v3)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5167>
2020-07-09 11:59:09 +00:00
Jonathan Marek
26b75daef5 turnip: fix active_desc_sets not being set for compute pipeline
This resulted in the load state being always empty. Its an optimization,
so it didn't result in any failures.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5816>
2020-07-09 10:27:35 +00:00
Miklós Máté
ee99a7a1cf docs: add some missing stuff to sourcetree.rst
I alphabetised some lists, but did not attempt to fix the inconsistent
formatting.

v2: added more info
v3: rework for the new format

Signed-off-by: Miklós Máté <mtmkls@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5367>
2020-07-09 09:18:14 +00:00
Eric Engestrom
27b09d293b docs: update calendar and link releases notes for 20.1.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5811>
2020-07-09 09:11:37 +00:00
Eric Engestrom
6b4aee78ae docs: add release notes for 20.1.3
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5811>
2020-07-09 09:11:37 +00:00
Pierre-Eric Pelloux-Prayer
1e3aeda528 glsl: only allow 32 bits atomic operations on images
EXT_shader_image_load_store says:
   The format of the image unit must be in the "1x32" equivalence class
   otherwise the atomic operation is invalid.

ARB_shader_image_load_store says:
   We will only support 32-bit atomic operations on images

Fixes: fc0a2e5d01 ("glsl: add EXT_shader_image_load_store new image functions")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5688>
2020-07-09 09:58:01 +02:00
Pierre-Eric Pelloux-Prayer
233af4a412 glsl: don't expose imageAtomicIncWrap for signed image
The spec says that it's only allowed for unsigned ones.
Same from imageAtomicDecWrap.

Fixes: fc0a2e5d01 ("glsl: add EXT_shader_image_load_store new image functions")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5688>
2020-07-09 09:58:01 +02:00
Pierre-Eric Pelloux-Prayer
438392243f ac/llvm: remove the -1 hack from ac_atomic_inc_wrap
To match the behavior of proprietary drivers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5688>
2020-07-09 09:58:01 +02:00
Pierre-Eric Pelloux-Prayer
0c8873d85d glsl: reject size1x8 for image variable with floating-point data types
Fixes: 8d07d66180 ("glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5688>
2020-07-09 09:58:01 +02:00
Tomeu Vizoso
315ac94107 gitlab-ci: Remove left-behind rules:
It's something that was added to ease development, but that was supposed
to be removed before merging.

It also causes problems when arm-related jobs aren't enabled, as
arm_build is needed by these jobs but in that case isn't there.

Also extend from .ci-run-policy.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5802>
2020-07-09 09:19:25 +02:00
Samuel Pitoiset
40526451ca radv: compute prim_vertex_count at draw time
In preparation for the dynamic topology state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
2020-07-09 06:31:39 +00:00
Samuel Pitoiset
972081c688 radv: adjust IA_MULTI_VGT_PARAM.PARTIAL_VS_WAVE at draw time
In preparation for the dynamic topology state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
2020-07-09 06:31:39 +00:00
Samuel Pitoiset
5f1b0f4b48 radv: adjust IA_MULTI_VGT_PARAM.WD_SWITCH_ON_EOP at draw time
In preparation for the dynamic topology state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
2020-07-09 06:31:39 +00:00
Samuel Pitoiset
9f561feecc radv: store the primitive topology hardware value in the pipeline
Will help for upcoming changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
2020-07-09 06:31:39 +00:00
Samuel Pitoiset
6f734324a5 radv: implement missing VK_ACCESS_MEMORY_{READ,WRITE}_BIT
From the Vulkan spec 1.2.146:
    "VK_ACCESS_MEMORY_READ_BIT specifies all read accesses. It is
     always valid in any access mask, and is treated as equivalent
     to setting all READ access flags that are valid where it is
     used."

    "VK_ACCESS_MEMORY_WRITE_BIT specifies all write accesses.
     It is always valid in any access mask, and is treated as
     equivalent to setting all WRITE access flags that are valid
     where it is used."

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3241
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5807>
2020-07-09 08:05:20 +02:00
Karol Herbst
02a57896f6 nv50/ir: fix memset on non trivial types warning
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Rhys Kidd <rhyskidd@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5819>
2020-07-09 12:11:02 +10:00
Timothy Arceri
cd67e2c280 nine: remove unused var
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5819>
2020-07-09 12:09:08 +10:00
Timothy Arceri
8f6d66d509 zink: fix missing fallthrough comment
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5819>
2020-07-09 12:08:47 +10:00
Timothy Arceri
20dff7dc6b v3d: remove redefine of VG(x)
Instead just depend on the one in v3d_packet_helpers.h

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5819>
2020-07-09 12:08:19 +10:00
Timothy Arceri
03a5b3f6d5 freedreno: fix missing fallthrough comments
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5819>
2020-07-09 12:07:37 +10:00
Bas Nieuwenhuizen
40e00c800c amd/llvm: Mark pointer function arguments as 32-byte aligned.
Otherwise LLVM does not see the pointers as allowing speculative
loads.

The pipeline-db results are pretty wild, but mostly what is to be
expected from allowing more code movement in LLVM:

Totals from affected shaders:
SGPRS: 157728 -> 168336 (6.73 %)
VGPRS: 158628 -> 158664 (0.02 %)
Spilled SGPRs: 10845 -> 24753 (128.24 %)
Spilled VGPRs: 13 -> 13 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 8 -> 8 (0.00 %) dwords per thread
Code Size: 17189180 -> 17313712 (0.72 %) bytes
LDS: 204 -> 204 (0.00 %) blocks
Max Waves: 5700 -> 5687 (-0.23 %)
Wait states: 0 -> 0 (0.00 %)

This gives some boosts for shaders we can move a descriptor load
outside a loop.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3159>
2020-07-08 23:47:06 +00:00
Marek Olšák
d2bd77eae4 glsl: don't validate array types in ir_dereference_variable
Fixes: 8d62969cfe - glsl: validate more stuff
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3245

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5813>
2020-07-08 23:22:17 +00:00
Simon Ser
9ad19fff3e radv: use bitshifts for debug enum values
Explicit values are getting out of hand.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5735>
2020-07-08 21:39:09 +00:00
Jonathan Marek
979e7e3680 freedreno/layout: layout simplifications and pitch from level 0 pitch
This updates a3xx/a4xx/a5xx to fix the fetchsize to "PITCHALIGN" (called
"MINLINEOFFSET" by the a3xx docs), and some simplifications to make things
more like a6xx. Also similar simplifications for a2xx layout code.

The pitch can always be determined using a simple calculation from the base
level pitch, so don't pre-calculate a pitch for each mipmap level.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5796>
2020-07-08 20:46:08 +00:00
Jonathan Marek
4b290b759a freedreno: add a fd_resource_pitch helper
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5796>
2020-07-08 20:46:08 +00:00
Jonathan Marek
344e764b01 freedreno/a2xx: fix compressed textures
Two problems:
* Multiply has higher priority than shift
* rsc->layout.format isn't initialized for a2xx

Fixes: 5a8718f01b ("freedreno: Make the slice pitch be bytes, not pixels.")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5796>
2020-07-08 20:46:08 +00:00
Eric Anholt
3021cb3215 docs: Document how to interact with docker containers.
There's some text in gitlab-ci.yml, but expand on things a bit here.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5510>
2020-07-08 20:13:11 +00:00
Eric Anholt
21e6d67a2e docs: Relax the expectations of HW CI farms.
We've been doing pretty well at around half an hour per pipeline, no need
to be too harsh.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5510>
2020-07-08 20:13:11 +00:00
Eric Anholt
27c9272c3d docs: Move the gitlab-ci docs to RST.
I tried not to edit too much meaning in the process, but I did shuffle
some stuff around to work as structured documentation.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5510>
2020-07-08 20:13:11 +00:00
Eric Anholt
a2ca7e09fe docs: Move the conformance and the CI docs to a top level Testing section.
They're related subjects, and deserve top level display.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5510>
2020-07-08 20:13:11 +00:00
Eric Anholt
9af82b5026 docs: Move the current CI .rst doc to docs/ci/ and link to it from .gitlab-ci.
I want the docs to be discoverable next to the code, and sphinx insists
that all docs are under the top-level docs dir (sigh).  We can't symlink
from that dir to .gitlab-ci because windows builds can't do symlinks, so
link back the other direction.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5510>
2020-07-08 20:13:11 +00:00
Jason Ekstrand
29cba3b695 nir/validate: Don't abort() until after the shader has printed
In the case where SSA use/def chains are broken, NIR prints out a very
cryptic error and then aborts.  This abort happens during validation
rather than after the print is complete, hiding any other errors that
may have been found.  One might think, "So what?  Fix your use/def issue
first."  However, what makes this especially bad is that, when use/def
chains are broken, there's usually a much nicer error inline in the
shader that would have been printed had we not aborted early so the
current behavior simply ensures you get the most cryptic error possible
in an already difficult-to-debug case.

While we're at it, we remove the one other case of abort() which is in
the validation of phi instruction sources.

Reviewed-by: Rob Clark <robclark@freedesktop.org>
Tested-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5809>
2020-07-08 19:51:58 +00:00
Marek Olšák
55cf97f56e Revert "ac/surface: require that gfx8 doesn't have DCC in order to be displayable"
This reverts commit 7406ea37e6.

Fixes: 7406ea37 "ac/surface: require that gfx8 doesn't have DCC in order to be displayable"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3190

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5780>
2020-07-08 19:16:15 +00:00
Mike Blumenkrantz
0ca7bd73c6 zink: translate gl_FragColor to gl_FragData before ntv to fix multi-rt output
according to EXT_multiview_draw_buffers, gl_FragColor outputs to all available
render targets when used, so we need to translate this to gl_FragData[PIPE_MAX_COLOR_BUFS]
in order to correctly handle more than one color buffer attachment

this fixes the rest of spec@arb_framebuffer_object tests in piglit

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5687>
2020-07-08 14:51:34 +00:00
Mike Blumenkrantz
1fd3563025 nir: add lowering pass for fragcolor -> fragdata
this is needed for zink and other drivers which can support fragcolor but
not fragdata and want to correctly handle EXT_multiview_draw_buffers

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5687>
2020-07-08 14:51:34 +00:00
Erik Faye-Lund
44da0f067c zink: expose depth-clip if supported
We already set up the state as needed, so it should only be a matter of
exposing it.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5495>
2020-07-08 14:43:02 +00:00
Bas Nieuwenhuizen
ffb8020f6e radv: Use correct semaphore handle type for Android import.
Coincidentally got a bugreport of a game that is broken without the import
fix below, but it turns out I made a copy-paste error as well ..

In good news it is clearly tested now.

Fixes: ad15149958 "radv: Set handle types in Android semaphore/fence import."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5783>
2020-07-08 14:21:16 +00:00
Samuel Pitoiset
84ed2793eb radv: set depth/stencil enable values correctly for the meta clear path
They are booleans.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5803>
2020-07-08 12:41:10 +00:00
Jonathan Marek
fcac0b4fc9 freedreno/regs: document CS shared storage size bit
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5797>
2020-07-08 11:33:42 +00:00
Neil Roberts
deefebc55b v3d/compiler: Fix sorting the gs and fs inputs
ntq_setup_fs_inputs and ntq_setup_gs_inputs sort the inputs according to
the driver location. This input array is then used to calculate the VPM
offset for the outputs in the previous stage. However, it wasn’t taking
into account variables that are packed into a single varying slot. In
that case they would have the same driver_location and are
distinguished by location_frac.

This patch makes it additionally sort by location_frac when the driver
locations are equal. This can happen when the compiler packs varyings
that are sized less than vec4. Without this fix, when the VPM is used to
transmit data free-form between the stages (such as VS->GS) then it
would end up writing to inconsistent locations.

Fixes dEQP tests such as:
dEQP-GLES31.functional.primitive_bounding_box.lines.global_state.
vertex_geometry_fragment.default_framebuffer_bbox_equal

Fixes: 5d578c27ce ("v3d: add initial compiler plumbing for geometry shaders")

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5787>
2020-07-08 07:39:47 +00:00
Timothy Arceri
3cb2438284 panfrost: add some missing fallthrough comments to bi_pack.c
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5766>
2020-07-08 03:04:03 +00:00
Timothy Arceri
2286c9ac21 panfrost: hide more unused code in bi_lower_combine.c
Fixes some unused-function warnings.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5766>
2020-07-08 03:04:03 +00:00
Timothy Arceri
f35283d32e panfrost: add some missing fallthrough comments
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5766>
2020-07-08 03:04:03 +00:00
Timothy Arceri
7ccf258063 nouveau/nvc0: silence maybe-uninitialized warning
gcc is not smart enough to see that

   enum pipe_format dst_fmt;
   ...

   switch (data_size) {
   case 16:
      dst_fmt = PIPE_FORMAT_R32G32B32A32_UINT;
      ...
      break;
   case 12:
      /* RGB32 is not a valid RT format. This will be handled by the pushbuf
       * uploader.
       */
      break;
   case 8:
      dst_fmt = PIPE_FORMAT_R32G32_UINT;
      ...
      break;
   case 4:
      dst_fmt = PIPE_FORMAT_R32_UINT;
      ...
      break;
   case 2:
      dst_fmt = PIPE_FORMAT_R16_UINT;
      ...
      break;
   case 1:
      dst_fmt = PIPE_FORMAT_R8_UINT;
      break;
   default:
      assert(!"Unsupported element size");
      return;
   }

   ...

   if (data_size == 12) {
      ...
      return;
   }

Does not result in dst_fmt being uninitialized when it is used so
lets just initialise it to silence the warning.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5766>
2020-07-08 03:04:03 +00:00
Timothy Arceri
6bec54dd3e iris: silence maybe-uninitialized for stc_dst_aux_usage variable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5766>
2020-07-08 03:04:03 +00:00
Timothy Arceri
01c04a42a6 iris: fix maybe-uninitialized warning for initial_state variable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5766>
2020-07-08 03:04:03 +00:00
Timothy Arceri
bba766d85d radeonsi: fix SI_NUM_ATOMS
This is not used anywhere so maybe we should just drop it instead.

Fixes: 639b673fc3 ("radeonsi: don't use an indirect table for state atoms")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5766>
2020-07-08 03:04:03 +00:00
Timothy Arceri
4686a95621 r600/radeonsi: silence zero-length-bounds gcc warnings
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5766>
2020-07-08 03:04:03 +00:00
Jonathan Marek
f472c98443 freedreno/ir3: add support for a650 tess shared storage
A650 uses LDL/STL, and the "local_primitive_id" in tess ctrl shader comes
from bits 16-21 in the header instead of 0-5.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5764>
2020-07-08 02:30:23 +00:00
Marek Olšák
75b59bb1d6 gallium: add PIPE_SHADER_CAP_GLSL_16BIT_TEMPS for LowerPrecisionTemporaries
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
6aea39641a glsl: lower mediump temporaries to 16 bits except structures (v2)
Without this, NIR contains non-lowerable 32-bit phis for mediump variables.

Structures are not lowered yet.

v2: add the LowerPrecisionTemporaries option

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Alyssa Rosenzweig
7f00d4dac8 glsl: Handle 16-bit types in loop analysis
Fixes crash with mediump lowering in:

dEQP-GLES2.functional.shaders.loops.do_while_constant_iterations.basic_mediump_float_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
63ab8d41d1 glsl: add capability to lower mediump array types
This is not needed for lowering expressions, because they always work with
basic types, but it will be needed for lowering variables.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
38cadd8b46 glsl: lower builtins to mediump that always return mediump or lowp
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
8fcf8e7fd4 glsl: lower builtins to mediump that ignore precision of certain parameters
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
3781697c23 glsl: don't lower builtins to mediump that don't allow it
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
69f7a3dac6 glsl: don't lower precision of textureSize
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
977b84652a glsl: flatten a tautological conditional in lower_precision
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
9fccae80be glsl: cleanups in lower_precision
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
8a93d2f128 glsl: remove the return type from lower_precision
It's unused.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
161105d732 glsl: convert reusable lower_precision util code into helper functions
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
8d62969cfe glsl: validate more stuff
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
8773d58b05 glsl: run validate_ir_tree if GLSL_VALIDATE=1 regardless of the build config
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
82caff5bc3 glsl: fix evaluating float16 constant expression matrices
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
50c27a0a17 glsl: fix the type of ir_constant_data::u16
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
3e47cb185e glsl: print constant initializers
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
42be975aa2 glsl: print precision qualifiers in IR dumps
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Marek Olšák
a038863ba0 glsl: make print_type non-static for debugging
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5746>
2020-07-07 22:02:06 -04:00
Jason Ekstrand
1d5e1882f6 anv: Handle clamping of inverted depth ranges
Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5792>
2020-07-07 21:38:03 +00:00
Dave Airlie
3bb3e8940c llvmpipe: add ARB_post_depth_coverage support.
This doesn't pass thie piglits because currently they are broken
for case where GL upgrades 2 samples to 4

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5767>
2020-07-08 07:19:25 +10:00
Dave Airlie
b8fcb62134 ci/virgl: update results after streams fixes.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:20 +10:00
Dave Airlie
d146d7bb97 draw/gs: use mask to limit vertex emission.
When executing for a single primitive, the mask has only one active
lane, however the vertex emit emits for all the lanes, pass in
the active mask and write the excess lanes to the overflow slot.

Fixes:
glsl-1.50-gs-max-output -scan 1 20

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:14 +10:00
Dave Airlie
72ed9e7046 draw: free vertex info from geometry streams.
This info needs to be freed for the non-0 stream.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:05 +10:00
Dave Airlie
b4802d6ea1 draw: use common exit path in pipeline finish.
I need to add a missing free here, and it seems pointless duplication

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:05 +10:00
Dave Airlie
3e455d6ad3 draw/gs: reverse the polarity of the invocation/prims execution
The current code runs primitives per invocation, but the spec wants
invocations per primitive. However it means having to flush
after each invocation to get correct XFB behaviour

Fixes:
GTF-GL41.gtf40.GL3Tests.transform_feedback3.transform_feedback3_geometry_instanced

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:05 +10:00
Dave Airlie
1c9bf586e7 draw: account primitive lengths for all streams.
For correct XFB queries all streams must get primitive lengths
recorded. This allocates larger memory for per-stream lengths
and the shader write into them.

Fixes:
GTF-GL41.gtf40.GL3Tests.transform_feedback3.transform_feedback3_streams_queried
GTF-GL41.gtf40.GL3Tests.transform_feedback3.transform_feedback3_streams_overflow

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:05 +10:00
Dave Airlie
09da72a740 gallivm/nir: end primitive for all streams.
Call the end primitive for all streams so it can be accounted properly

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:05 +10:00
Dave Airlie
690238ff56 gallivm/nir: don't access stream var outside bounds
Since we allocate only enough for streams we see, don't access
out of bounds when streams are given

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:05 +10:00
Dave Airlie
21b903dd7d gallivm/gs_iface: pass stream into end primitive interface.
This is just an API change for now

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:05 +10:00
Dave Airlie
87a388fb29 draw/gs: only allocate memory for streams needed.
This just allocates the sizeing for streams that are needed.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:05 +10:00
Dave Airlie
903b5814b5 gallivm/draw/gs: pass vertex stream count into shader build
The shader builder can avoid iterations using this info.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:05 +10:00
Dave Airlie
99ae39f76c draw/gs: fix up current verts in output fetching.
This was wrong since I added multi-stream support in
draw/gs: track emitted prims + verts per stream

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:05 +10:00
Dave Airlie
7d82bb0e41 draw: emit so primitives before ending empty pipeline.
There may be non-stream 0 emitted primitives that have to be processed.

Fixes:
KHR-GL42.transform_feedback_overflow_query_ARB.multiple-streams-one-buffer-per-stream
KHR-GL42.transform_feedback_overflow_query_ARB.multiple-streams-multiple-buffers-per-stream

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:04 +10:00
Dave Airlie
59c8fff7e4 gallivm/nir: call end prim at end on all GS streams.
Fixes: KHR-GL45.transform_feedback.draw_xfb_stream_test

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5555>
2020-07-08 06:06:04 +10:00
Neil Roberts
b921d17aa6 broadcom/qpu: set VC5_QPU_RADDR_A out of the switch at _pack_branch
Detected after mesa added Wimplicit-fallthrough project wide.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5769>
2020-07-07 21:40:16 +02:00
Rhys Perry
ec4d3def16 aco: use VOP2 version of v_mbcnt_hi_u32_b32 on GFX6/7
fossil-db (Pitcairn):
Totals from 2172 (1.58% of 137414) affected shaders:
CodeSize: 7109080 -> 7100100 (-0.13%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5623>
2020-07-07 18:48:15 +00:00
Eric Anholt
b7418270c3 util: Share a single function pointer for the 4-byte rgba unpack function.
Everyone wants the same behavior, and this helps shrink the size of our
format description tables.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:23 +00:00
Eric Anholt
a8e7004dc5 util: Remove the stub pack/unpack functions for YUV formats.
If we can't pack/unpack them, the field is supposed to be NULL.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:23 +00:00
Eric Anholt
abd9aa2c77 llvmpipe: Generalize "could llvmpipe fetch this format" check in unit testing.
This set of checks matched the "access" list in u_format_table.py that
controls initializing this this function pointer, so just use the function
pointer.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:23 +00:00
Eric Anholt
2da4badfe3 util: Use designated initializers to clean up the format tables' pack/unpack.
The generated .c had a bunch of NULLs and notes for what kind of function
was being skipped, when we can just skip them by filling in the fields
with names.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:23 +00:00
Eric Anholt
e7010eeff0 util: Merge util_format_read_4* functions.
Everyone wants the same thing: unpack 4-bytes-per-channel data based on the
base type of the format.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:23 +00:00
Eric Anholt
2f4d557a56 util: Merge util_format_write_4* functions.
Everyone wants the same thing: pack 4-bytes-per-channel data based on the
base type of the format.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:23 +00:00
Eric Anholt
c3d0500389 svga: Reuse util_format_unpack_rgba().
This assumes that pipe_color_union is a vec4, but that seems safe.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:22 +00:00
Eric Anholt
725b27135b gallium/util: Move the Z/S handling to the outside of get_tile().
This lets us drop the special case for S8_UINT, and makes our read_4 path
just like other callers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:22 +00:00
Eric Anholt
a2b74a5d8a gallium/util: Clean up the Z/S tile write path.
The switch statement is silly, we have a helper to detect all of Z/S.
And, take the time explain why all of Z/S tile writing is unimplemented.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:22 +00:00
Eric Anholt
019a030907 gallium/util: Fix location of the comment about S8_UINT handling.
I clearly wrote it in the wrong place in "softpipe: Refactor
pipe_get/put_tile_rgba_* paths."

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:22 +00:00
Eric Anholt
377026e3ad etnaviv: Use the util_pack_color_union() helper.
This snuck in since I cleaned up the other instances of it.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:22 +00:00
Eric Anholt
32bf7229e5 util: Remove unused util_format_planar_is_supported().
Nothing calls it, and it should have been left in gallium, anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:22 +00:00
Eric Anholt
f6f1f8e3f6 softpipe: Clean up softpipe's SSBO load/store interpreting instructions.
There's no need to go to all this trouble of setting up 16-byte vectors to
pack/unpack our 32-bit values, memcpy is really good at moving 4 bytes
around.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:22 +00:00
Eric Anholt
18cb8f2322 util: Mark util_format_description() as a const function.
It will return the same table every time with no other side effects, so we
want it to be CSEed.  Saves 3.5k on my aarch64 GL drivers, almost 9k on
turnip, but weirdly increases my x86 GL driver collection by ~3k.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5728>
2020-07-07 18:19:22 +00:00
Daniel Schürmann
9300a14ffb nir: refactor nir_can_move_instr
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5622>
2020-07-07 19:24:28 +02:00
Daniel Schürmann
09d0e06c5c nir: also move vecN in case of nir_move_copies
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5622>
2020-07-07 19:24:28 +02:00
Jonathan Marek
14c554a391 turnip: use global bo for clear blit shaders
Fill the global bo will all possible shaders for 3D clear/blit. Note the
global bo size is still <4k (so this doesn't cost any extra memory), this
saves having to allocate shaders in sub_cs everytime the 3D path is used.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5776>
2020-07-07 16:40:45 +00:00
Daniel Schürmann
10020b8d17 aco: remove superflous (bool & exec) if the result comes from VOPC
This works in cases where the VOPC instruction was executed with
the same exec mask.

Totals from affected shaders: (VEGA)
SGPRS: 1342204 -> 1342164 (-0.00 %)
VGPRS: 877220 -> 877220 (0.00 %)
Spilled SGPRs: 157800 -> 157800 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 118083212 -> 118021748 (-0.05 %) bytes
LDS: 26 -> 26 (0.00 %) blocks
Max Waves: 144024 -> 144024 (0.00 %)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5563>
2020-07-07 17:35:01 +02:00
Rhys Perry
e4654a35b0 radv: enable zerovram for Quantic Dream games
Fixes various artifacts with Detroit: Become Human. This assumes other
Vulkan games using the same engine could have the same issues.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5710>
2020-07-07 14:44:35 +00:00
Tomeu Vizoso
dcd171f5e9 gitlab-ci: More stable URL for kernel and ramdisk artifacts, for LAVA
Place the kernel and ramdisk into a place in the file server so the URL
will only change when the contents also change.

Also put the Mesa build into a separate tarball so the ramdisk's
contents don't change every build.

With proper caching in place, all devices in the same farm need only to
download the mesa tarball once, saving time.

As we switch to MinIO for making kernels and rootfs available to LAVA
devices, we can stop using Docker to distribute them.

Instead, build when needed in separate jobs that push directly to MinIO,
from where LAVA devices can download them.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5515>
2020-07-07 11:52:30 +00:00
Tomeu Vizoso
bf3d4b1add gitlab-ci: Build kernel drivers for a few ethernet USB dongles
So LAVA devices can download traces and upload test results.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5515>
2020-07-07 11:52:30 +00:00
Karol Herbst
bbf2db20fe nv50/ir/nir: fix cache mode conversion
The nir access qualifier is actually a bitfield, so we need to read out
like one.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5747>
2020-07-07 11:32:15 +00:00
Karol Herbst
31e344799a gv100/ir: fix coherent and volatile memory access
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5747>
2020-07-07 11:32:14 +00:00
Karol Herbst
a43eb650de gv100/ir: implement sample shading
Fixes sample shading tests in the Khronos OpenGL(ES) CTS

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5747>
2020-07-07 11:32:14 +00:00
Karol Herbst
5786c63be3 nv50/ir/nir: fix interpolation on explicit operations
Fixes a bunch of interpolate tests in the aosp GLES CTS

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5747>
2020-07-07 11:32:14 +00:00
Danylo Piliaiev
77844690be iris: Fix fast-clearing of depth via glClearTex(Sub)Image
If we clear depth only texture via glClearTex(Sub)Image it may cause:
../src/intel/blorp/blorp_genX_exec.h:1554: blorp_emit_surface_states: Assertion `params->depth.enabled || params->stencil.enabled' failed.

due to clear_depth_stencil calling blorp_clear_depth_stencil when
depth is already fast-cleared and there is no stencil.

Fixes piglit test: arb_clear_texture-depth

Fixes: 51638cf18a
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5770>
2020-07-07 11:05:03 +00:00
Erik Faye-Lund
026615c0f9 docs: fixup envvar output
Sphinx 2.x has changed how this works, and some of this whitespace now
gets stripped as a result. So let's instead actual whitespace as separate
text-nodes instead.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5706>
2020-07-07 10:22:08 +00:00
Erik Faye-Lund
c8537744bb docs: use svg for graphviz output
This works a lot better on hidpi screens.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5706>
2020-07-07 10:22:08 +00:00
Erik Faye-Lund
892fdde23f docs: move gallium specific docs into gallium folder
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5706>
2020-07-07 10:22:08 +00:00
Erik Faye-Lund
64a4ba9e1c docs: add an extension to generate redirects
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5706>
2020-07-07 10:22:08 +00:00
Erik Faye-Lund
ce5a3524fa docs: clean up gallium index-file
This makes the TOC make much more sense.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5706>
2020-07-07 10:22:08 +00:00
Erik Faye-Lund
2f81398187 merge gallium docs into main docs
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5706>
2020-07-07 10:22:08 +00:00
Erik Faye-Lund
cb11900cb6 ci: add graphviz to the .docs-base template
The Gallium docs uses graphviz, so let's make sure it's installed first.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5706>
2020-07-07 10:22:08 +00:00
Connor Abbott
6ff66942d2 freedreno: Sync registers with envytools
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5557>
2020-07-07 09:51:40 +00:00
Connor Abbott
c1ba7612fb freedreno: Include adreno_pm4.xml.h before adreno_a6xx.xml.h
This matches the XML, and soon adreno_a6xx.xml will start including
types from adreno_pm4.xml.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5557>
2020-07-07 09:51:40 +00:00
jzielins
53e204dc26 gallium/swr: Fix compilation warnings
In some places in SWR cod objects are initialized using
memset/memcpy. This is usually done to enable
allocating those objects in aligned memory.
It generates compilation warnings though,
which are worked around by casting the pointers to void*
before calling memset/memcpy.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5777>
2020-07-07 09:24:47 +00:00
Connor Abbott
846f4f95dd freedreno/a6xx: Force gl_Layer to 0 when necessary
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5732>
2020-07-07 08:10:47 +00:00
Connor Abbott
f69c3849b8 tu: Force gl_Layer to 0 when necessary
In particular this will help us implement input attachments correctly
with layered rendering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5732>
2020-07-07 08:10:47 +00:00
Connor Abbott
4f91345f49 ir3: Add layer_zero variant bit
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5732>
2020-07-07 08:10:47 +00:00
Icecream95
ef67218325 pan/decode: Make mapped memory read-only while decoding
This will help catch any bugs where descriptors are accidentally
modified.

v2: Use a dynarray of ro memory mappings rather than iterating through
    the mmap hash table.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5590>
2020-07-07 02:29:52 +00:00
Alyssa Rosenzweig
cb5edcd215 panfrost: Expose MSAA 4x
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
a5c4fe2c78 panfrost: Save sample_mask before blitting
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
bb577051dd panfrost: Enable MSAA if we render to such a surface
We hit this case for clears of MSAA surfaces without draws.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
3b7aeb2448 panfrost: Set depth/stencil_layer_stride accordingly
Same logic as colour layer stride, I think.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
5e38d956ab panfrost: Identify depth/stencil layer strides
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
490fbce239 panfrost: Implement alpha-to-coverage
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
f23cdd4f72 panfrost: Pass sample_mask to the hardware
Gallium computes it for us.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
3e251328fa panfrost: Identify coverage_mask
The driver specifies the mask directly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
546a600ba5 panfrost: Don't advertise MSAA 2x
Let the frontend promote to MSAA 4x if the app requests it. We don't
support MSAA 2x.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
211cc2550c panfrost: Set layer_stride for multisampled rendering
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
937d3687ac panfrost: Include pointer for each sample
Treating it like an array/3D texture.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
41c06deb63 panfrost: Index texture by sample
This will allow MSAA to route through.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
95afda39a6 panfrost: Allocate space for multisampling
As an effective depth. Ugly but matches the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
37204588da panfrost: Identify layer_stride
For MSAA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
0b5bc6ed67 panfrost: Set depth to sample_count for MSAA 2D
Treated like a 3D texture.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
af6fc41d2c pan/mdg: Use _VTX tag for texelFetch in frag shaders
Probably a misnomer, let's match what the blob seemingly does though? At
least in blit shaders?

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
63a8722c6a pan/mdg: Handle nir_texop_txf_ms
Same as nir_texop_txf, the special case where sample = 0.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
6d9f951220 pan/mdg: Handle nir_tex_src_ms_index
Goes in .z for a txf_ms coordinate, same as a shadow comparator so we
reuse the impl.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
a2748d4796 pan/mdg: Handle GLSL_SAMPLER_DIM_MS
Same as 2D.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
d624118cc9 pan/mdg: Allow ignoring move mode
Ensures we can gaurantee we'll pick something, which matters for
depth/stencil export.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: de41c4c103 ("pan/mdg: Prioritize non-moves on VADD/VLUT")
Tested-by: Icecream95 <ixn@keemail.me>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
af8fcfe620 pan/decode: Identify layered MSAA flag
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
eba9bcd3c9 pan/decode: Fix MSAA texture decoding
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5782>
2020-07-07 01:13:39 +00:00
Alyssa Rosenzweig
797fa87ec9 pan/mdg: Fix indirect UBO swizzles
Helps a lot of vertex shaders dramatically.

total instructions in shared programs: 48491 -> 48252 (-0.49%)
instructions in affected programs: 3091 -> 2852 (-7.73%)
helped: 30
HURT: 0
helped stats (abs) min: 1 max: 35 x̄: 7.97 x̃: 5
helped stats (rel) min: 0.57% max: 21.60% x̄: 7.98% x̃: 6.85%
95% mean confidence interval for instructions value: -11.11 -4.83
95% mean confidence interval for instructions %-change: -10.17% -5.80%
Instructions are helped.

total bundles in shared programs: 23392 -> 23105 (-1.23%)
bundles in affected programs: 2017 -> 1730 (-14.23%)
helped: 35
HURT: 0
helped stats (abs) min: 1 max: 34 x̄: 8.20 x̃: 7
helped stats (rel) min: 1.11% max: 34.69% x̄: 15.52% x̃: 18.42%
95% mean confidence interval for bundles value: -10.91 -5.49
95% mean confidence interval for bundles %-change: -19.28% -11.77%
Bundles are helped.

total quadwords in shared programs: 39586 -> 39611 (0.06%)
quadwords in affected programs: 1717 -> 1742 (1.46%)
helped: 5
HURT: 24
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.83% max: 3.57% x̄: 2.45% x̃: 2.78%
HURT stats (abs)   min: 1 max: 2 x̄: 1.25 x̃: 1
HURT stats (rel)   min: 1.00% max: 3.77% x̄: 2.17% x̃: 1.89%
95% mean confidence interval for quadwords value: 0.50 1.22
95% mean confidence interval for quadwords %-change: 0.61% 2.13%
Quadwords are HURT.

total registers in shared programs: 3337 -> 3272 (-1.95%)
registers in affected programs: 373 -> 308 (-17.43%)
helped: 34
HURT: 0
helped stats (abs) min: 1 max: 5 x̄: 1.91 x̃: 1
helped stats (rel) min: 6.25% max: 33.33% x̄: 16.76% x̃: 16.03%
95% mean confidence interval for registers value: -2.31 -1.51
95% mean confidence interval for registers %-change: -19.15% -14.37%
Registers are helped.

total threads in shared programs: 2593 -> 2615 (0.85%)
threads in affected programs: 22 -> 44 (100.00%)
helped: 21
HURT: 0
helped stats (abs) min: 1 max: 2 x̄: 1.05 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
95% mean confidence interval for threads value: 0.95 1.15
95% mean confidence interval for threads %-change: 100.00% 100.00%
Threads are [helped].

total loops in shared programs: 6 -> 6 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 17 -> 1 (-94.12%)
spills in affected programs: 16 -> 0
helped: 2
HURT: 0

total fills in shared programs: 35 -> 5 (-85.71%)
fills in affected programs: 30 -> 0
helped: 2
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5781>
2020-07-07 00:42:14 +00:00
Alyssa Rosenzweig
658b59df82 pan/mdg: Respect type/mask in mir_lower_special_reads
Fixes RA issues with the lowered moves, as well as enabling more
aggressive scheduling (hence the slight shdaer-db win).

total instructions in shared programs: 48539 -> 48491 (-0.10%)
instructions in affected programs: 4400 -> 4352 (-1.09%)
helped: 13
HURT: 0
helped stats (abs) min: 1 max: 8 x̄: 3.69 x̃: 3
helped stats (rel) min: 0.50% max: 1.89% x̄: 1.06% x̃: 1.10%
95% mean confidence interval for instructions value: -5.05 -2.33
95% mean confidence interval for instructions %-change: -1.29% -0.84%
Instructions are helped.

total bundles in shared programs: 23447 -> 23392 (-0.23%)
bundles in affected programs: 2224 -> 2169 (-2.47%)
helped: 21
HURT: 1
helped stats (abs) min: 1 max: 8 x̄: 2.67 x̃: 2
helped stats (rel) min: 0.89% max: 20.00% x̄: 9.04% x̃: 2.40%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 1.20% max: 1.20% x̄: 1.20% x̃: 1.20%
95% mean confidence interval for bundles value: -3.51 -1.49
95% mean confidence interval for bundles %-change: -12.52% -4.63%
Bundles are helped.

total quadwords in shared programs: 39651 -> 39586 (-0.16%)
quadwords in affected programs: 5557 -> 5492 (-1.17%)
helped: 38
HURT: 1
helped stats (abs) min: 1 max: 2 x̄: 1.74 x̃: 2
helped stats (rel) min: 0.61% max: 14.29% x̄: 3.92% x̃: 1.20%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.69% max: 0.69% x̄: 0.69% x̃: 0.69%
95% mean confidence interval for quadwords value: -1.87 -1.47
95% mean confidence interval for quadwords %-change: -5.55% -2.05%
Quadwords are helped.

total registers in shared programs: 3336 -> 3337 (0.03%)
registers in affected programs: 21 -> 22 (4.76%)
helped: 1
HURT: 2
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 11.11% max: 11.11% x̄: 11.11% x̃: 11.11%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 16.67% max: 16.67% x̄: 16.67% x̃: 16.67%

total threads in shared programs: 2592 -> 2593 (0.04%)
threads in affected programs: 1 -> 2 (100.00%)
helped: 1
HURT: 0

total spills in shared programs: 17 -> 17 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0

total fills in shared programs: 35 -> 35 (0.00%)
fills in affected programs: 0 -> 0
helped: 0
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5781>
2020-07-07 00:42:14 +00:00
Ilia Mirkin
836d41d772 ir3: use empirical size for params as used by the shader
For example only some UCPs may be used by the shader, triggering asserts
that too many consts are being uploaded.

While we're at it, also fix the const size when loading UCPs, since
otherwise it doesn't correspond to what the shader is actually using.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5752>
2020-07-06 23:57:51 +00:00
Chris Forbes
f6aa0719cf bifrost: Set RTZ rounding mode for f2i conversion
Fixes dEQP-GLES2.functional.shaders.conversions.scalar_to_scalar.float_to_int_fragment

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5779>
2020-07-06 23:17:16 +00:00
Connor Abbott
7682c887b3 tu: Enable KHR_variable_pointers
Passes dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.*
and dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5684>
2020-07-06 22:48:57 +00:00
Connor Abbott
9aec89ead3 tu: Rewrite variable lowering
Don't lower to offsets, instead use nir_lower_explicit_io here and
use actual pointers for UBO's and SSBO's. This makes
KHR_variable_pointers trivial. This also fixes asserts with shared
variables, which are now supposed to be lowered with
nir_lower_explicit_io.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5684>
2020-07-06 22:48:57 +00:00
Lionel Landwerlin
edc8119da4 anv: garbage collect timeline semaphore when querying value
If we don't garbage collect the timeline, the value never progresses
even though work completed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3226
Fixes: 34f32a6d66 ("anv: implement VK_KHR_timeline_semaphore")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5774>
2020-07-06 22:33:46 +00:00
Neil Roberts
137d8f9889 v3d: Enable perpendicular line caps when line smoothing
V3D has a bit to set the line caps to be perpendicular to the line
rather than aligned to the edges of the framebuffer. I don’t know what
the disadvantages are of enabling this, but I noticed by experimentation
that enabling line smoothing on the Intel driver also enables nicer line
caps, so it seems nice to enable it here too.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
2020-07-06 21:59:16 +00:00
Neil Roberts
ee4d51f8b2 v3d: Add a lowering pass for line smoothing
When line smoothing is enabled, the driver now increases the width of
the line so that it can add some semi-transparent pixels to either side
of the line. A lowering pass is added which modifies the alpha component
of every write to fragment output 0 so that if the fragment is outside
the width of the line then the alpha is reduced. It additionally
discards fragments that are completely invisible. It might seem bad to
use discard on a tiled renderer but the assumption is that any bad
effects from using discard will also happen anyway because of enabling
alpha blending.

v2: Disable the line smoothing pass entirely when the framebuffer
    contains an integer colour output or one with no alpha channel.
    Calculate the coverage once upfront and store in a global variable
    instead of calculating each time an output write is modified. Also
    do the conditional discard once upfront.
v3: Don’t check whether the output buffer has an alpha channel. Only
    look at output 0. Use aa_line_width intrinsic instead of calculating
    the real line width in the shader. Clamp the coverage as part of the
    global variable, not per output write.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
2020-07-06 21:59:16 +00:00
Neil Roberts
207da33a86 v3d: Handle the line width intrinsics
Adds new QUNIFORMs to store the line widths.

v2: Also handle the aa_line_width intrinsic

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
2020-07-06 21:59:16 +00:00
Neil Roberts
121b82f638 nir: Add intrinsics for the line width
The first intrinsic is intended to expose the value set by glLineWidth
to shaders internally. The second intrinsic exposes the value actually
sent to the hardware. This may be wider than the first one in order to
implement anti-aliasing. These will be used in later patches to
implement a line smoothing lowering pass.

v2: Add a second intrinsic for the expanded line width for
    anti-aliasing.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
2020-07-06 21:59:16 +00:00
Neil Roberts
2c4616368b v3d: Implement the line coord intrinsic
The line coord intrinsic is loaded from the implicit varying stored in
the same slot as the point coord when drawing lines.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
2020-07-06 21:59:16 +00:00
Neil Roberts
14dd65bb5b compiler: Add a system value for the line coord
The line coord is a coordinate along the axis perpendicular to the line.
It is in the range [0,1] between the two edges of the line. It is
available at least on Broadcom hardware.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
2020-07-06 21:59:15 +00:00
Marcin Ślusarz
3144bc1d33 intel/perf: move query_mask and location out of gen_perf_query_counter
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5399>
2020-07-06 21:43:59 +00:00
Marcin Ślusarz
9f19662550 iris: remove iris_monitor_config
perf_cfg is enough - it already contains almost all necessary
information and is constructed in a more optimal way (O(n) vs O(n^2)
- it uses hash table to build the unique counter list).

"Almost all", because it doesn't contain OA raw counters, but
we should have not exposed them anyway. Quoting Mark Janes:
"I see no reason to include the OA raw counters in the list that
are provided to the user. They are unusable.
The MDAPI library can be used to configure raw counters in a way
that provides esoteric metrics, but that library is written against
INTEL_performance_query."

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5399>
2020-07-06 21:43:59 +00:00
Ilia Mirkin
bffee01bd9 a4xx: hook up centroid ij coords
This is necessary now that the compiler respects centroid interpolation,
even in non-MSAA mode. Otherwise the interpolation doesn't work. Fixes a
bunch of dEQP centroid transform feedback tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5778>
2020-07-06 20:20:11 +00:00
Jason Ekstrand
a6ed1d7fa5 nir: Add docs to nir_lower[_explicit]_io
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand
0bc5a829dd nir: Remove shared support from lower_io
No drivers are using this anymore so we can delete it and not keep
maintaining this legacy code-path.  If any drivers want this in the
future, they should use nir_lower_varst_to_explicit_types followed by
nir_lower_explicit_io.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand
be96b069ad nir: Assert that nir_lower_io is only called with allowed modes
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand
b019b22c7a panfrost: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand
23b7094829 v3d: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand
96d99f2ecc vc4: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand
786325fdb0 nouveau: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand
4f521e596a lima: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Jason Ekstrand
36a9046848 freedreno: Only call nir_lower_io on shader_in/out
Gallium drivers should never see nir_var_uniform because gallium lowers
regular uniforms to a UBO.  No GL driver should ever see either
nir_var_mem_shared because that's lowered in GLSL IR.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
2020-07-06 19:54:30 +00:00
Ilia Mirkin
fc944428bf ir3: mark ucp_enables as allowed values on all keys
Both vertex and fragment shaders need to have the lowering.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5751>
2020-07-06 18:37:22 +00:00
Christian Gmeiner
01a1926fb9 etnaviv: replace prims-emitted query
As we do not support stream output buffers we only count the primitives
processed by the pipeline. Use the correct query type.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5754>
2020-07-06 18:22:19 +00:00
Ilia Mirkin
42c814158b a4xx: add polygon offset clamp, fix units
For some reason, in order to get all tests to pass, pretty much all
hardware (across vendors) has to program in offset_units * 2. This fixes
dEQP-GLES3.functional.polygon_offset.float32_displacement_with_units.

While we're at it, add polygon offset clamp support.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5763>
2020-07-06 18:01:31 +00:00
Ilia Mirkin
00f9d4b1fd a4xx: add noperspective interpolation support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5753>
2020-07-06 17:35:56 +00:00
Connor Abbott
12e18d9e7a nir: add vec2_index_32bit_offset address format
For turnip, we use the "bindless" model on a6xx. Loads and stores with
the bindless model require a bindless base, which is an immediate field
in the instruction that selects between 5 different 64-bit "bindless
base registers", a 32-bit descriptor index that's added to the base, and
the usual 32-bit offset. The bindless base usually, but not always,
corresponds to the Vulkan descriptor set.  We can handle the case where
the base is non-constant by using a bunch of if-statements, to make it a
little easier in core NIR, and this seems to be what Qualcomm's driver
does too. Therefore, the pointer format we need to use in NIR has a vec2
index, for the bindless base and descriptor index. Plumb this format
through core NIR.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5683>
2020-07-06 16:44:15 +00:00
Connor Abbott
7ab7316003 nir: Refactor load/store intrinsic helper
Add the possibility to specify the source components. This is necessary
to let the UBO/SSBO index have more than one component, and it also lets
us remove a few hand-rolled load intrinsic definitions.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5683>
2020-07-06 16:44:15 +00:00
Jonathan Marek
6d8e2cec81 freedreno/regs: document SS6_UBO state src
Document this new a6xx_state_src value seen in A640/A650 tess traces.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5760>
2020-07-06 15:46:48 +00:00
Rob Clark
0a7b1f9167 freedreno/fdperf: prefer render node
Avoid inadvertantly becoming master if fdperf happens to be the first
thing to open the device.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
2020-07-06 15:08:15 +00:00
Rob Clark
385d036f58 freedreno/fdperf: better compatible string matching
Previously we would match the start of the compatible string, in
a couple of cases, in order to match compatible strings like
"qcom,adreno-630.2".  But these cases would always list a more
generic compatible (ie. "qcom,adreno") as a later choice.  So if
we parse all the compatible strings, we can do a more precise
exact match.

This avoids us accidentially matching on "qcom,adreno-smmu" and
the hilarity that ensues.

Fixes: 5a13507164 ("freedreno/perfcntrs: add fdperf")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
2020-07-06 15:08:15 +00:00
Rob Clark
9c34a3322d freedreno/fdperf: fix print of base address
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
2020-07-06 15:08:15 +00:00
Jason Ekstrand
85761e23ea wsi/x11: Log swapchain status changes
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5672>
2020-07-06 14:49:06 +00:00
Jason Ekstrand
b0bbb62325 vulkan/wsi: Don't consider VK_SUBOPTIMAL_KHR to be an error condition
This was causing vkAcquireNextImageKHR to not signal the fences and
semaphores.  In the case where the semaphore was brand new, this could
cause an unsignalled syncobj to be passed into execbuffer2 which it will
reject with -EINVAL leading to VK_ERROR_DEVICE_LOST.  Thanks to Henrik
Rydgård who works on the PPSSPP project for helping me figure this out.

Fixes: ca3cfbf6f1 "vk: Add an initial implementation of the actual..."
Fixes: 778b51f491 "vulkan/wsi: Add a hooks for signaling semaphores..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5672>
2020-07-06 14:49:06 +00:00
Bas Nieuwenhuizen
c5d8961b0b Revert "radv: add support for MRTs compaction to avoid holes"
This reverts commit 7a5e6fd25f.

Since we have two different users bisecting issues to this commit, let's
revert.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 7a5e6fd25f "radv: add support for MRTs compaction to avoid holes"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3202
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3228
(Other report in https://gitlab.freedesktop.org/mesa/mesa/-/issues/3151#note_558589)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5758>
2020-07-06 14:06:37 +00:00
Bas Nieuwenhuizen
ad913a18b1 radv: Always enable PERFECT_ZPASS_COUNTS.
We have an issue with early depth testing and discard, where
non-perfect counts count the tile if the early depth test succeeds.

We could spend a lot of effort to set this conditionally based
on the presence of the two conditions, but in the presence of
inherited queries let's try this first.

Changing PERFECT_ZPASS_COUNTS since I'm pretty sure this has a lower
performance impact than always using late depth testing.

CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3218
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5757>
2020-07-06 13:54:38 +00:00
Bas Nieuwenhuizen
ad15149958 radv: Set handle types in Android semaphore/fence import.
Seems like we forgot to set it all this time ...

Fixes: b1444c9ccb "radv: Implement VK_ANDROID_native_buffer."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5759>
2020-07-06 13:40:49 +00:00
Samuel Pitoiset
7b21ce401f radv: disable FMASK compression when drawing with GENERAL layout
Fixes: 96063100 "radv: enable shaderStorageImageMultisample feature on GFX8+"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3219
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/855
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3165>
2020-07-06 13:26:58 +00:00
Jonathan Marek
8453d2941a Revert "nir: Support sysval tess levels in SPIR-V to NIR"
This reverts commit d2d4677b56.

The option is not used by any driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5744>
2020-07-06 08:48:10 -04:00
Jonathan Marek
2044bdac4f Revert "nir: Add an option for lowering TessLevelInner/Outer to vecs"
This reverts commit d2df076120.

The option is not used by any driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5744>
2020-07-06 08:48:10 -04:00
Jonathan Marek
b76c6dcbc5 freedreno/ir3: fix/rework tess levels
The previous version assumes tess level outputs will only be written once
in the shader, however its not possible to guarantee that.

It also assumes all invocations will write all the levels, which is also
not guaranteed.

This is required to fix the "tesselation" and "terraintessellation" demos
with turnip.

The comment about nir_lower_io_to_temporaries in lower_tess_ctrl_block is
removed because nir_lower_io_to_temporaries specifically skips TESS_CTRL
shaders so the comment doesn't make sense.

The split load for tess levels workaround is removed, the new version only
has scalar access unless if ever gets vectorized.

This sets NIR_COMPACT_ARRAYS cap to avoid the glsl tess vec lowering with
gallium. It seems this will also disable "LowerCombinedClipCullDistance",
which I'm not sure was needed or not.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5744>
2020-07-06 08:48:06 -04:00
Jonathan Marek
3c5512ce50 freedreno/layout: fix explicit layout offset not added to slice offset
Accidentally broke this when rebasing the offending commit.

My use case with non-zero explicit offset is UV plane of UBWC NV12, and
only the UBWC slice offset is used for the UBWC sampler, so I didn't catch
it immediately.

Fixes: d53dc6c376 ("freedreno/fdl6: rework layout code a bit (reduce linear align to 64 bytes)")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5761>
2020-07-06 11:24:59 +00:00
Bas Nieuwenhuizen
01986eaf05 amd/addrlib: fix another C++ one definition rule violation
Clashes with the SI definition.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3116
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5673>
2020-07-06 10:54:01 +00:00
Marcin Ślusarz
00d3b13837 iris: return max counter value for AMD_performance_monitor
glGetPerfMonitorCounterInfoAMD(..., ..., GL_COUNTER_RANGE_AMD, ...)
returned NAN (binary representation of uint64_t(-1) as float) as
a max value.

Fixes: 0fd4359733 ("iris/perf: implement routines to return counter info")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5473>
2020-07-06 08:40:32 +00:00
Marcin Ślusarz
2f4a112ec4 st/mesa: fix reporting of float perf counters max value
Some Piglit tests (rightfully) fail because of min >= max when exposed
to perf counters that do not explicitly define their max value.

Failing tests:
spec/amd_performance_monitor/api/test_counter_info
spec/amd_performance_monitor/vc4/test_counter_info

u32/u64 changes are no-ops.

Fixes: 4cd1cfb983 ("st/mesa: implement GL_AMD_performance_monitor")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5473>
2020-07-06 08:40:32 +00:00
Dave Airlie
2550531dd6 llvmpipe: enable GL 4.2
mostly just docs patch, features were all complete already

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5724>
2020-07-06 13:48:55 +10:00
Dave Airlie
28ebc8a212 llvmpipe: bump to GL support to GL 4.1
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5724>
2020-07-06 13:30:18 +10:00
Dave Airlie
df6682d782 llvmpipe: bump texture/scene limits to enable GL 4.1
Do we need to make this more dynamic? or have some options for vmware
embedded?

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5724>
2020-07-06 13:29:43 +10:00
Dave Airlie
0ca266025a mesa/version: only enable GL4.1 with correct limits.
I haven't tested all the limits, but these two should be enough
for driver writers to realise.

I've also submitted a minmax test for piglit to test this.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5727>
2020-07-06 12:51:30 +10:00
Jonathan Marek
1a83279da5 turnip: enable 420_UNORM formats
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4600>
2020-07-05 15:25:17 +00:00
Jonathan Marek
7af2a0b9bc turnip: support multi-image layouts
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4600>
2020-07-05 15:25:17 +00:00
Jonathan Marek
37cd3c256a turnip: clear_blit: pass aspect mask to setup function
Avoids having to duplicate logic to figure out the write mask on D24S8

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4600>
2020-07-05 15:25:17 +00:00
Ilia Mirkin
ef11d5fc8b st/mesa: allow R8 to not be exposed as renderable by driver
A3xx GPUs support RG8 and RGBA8, but not R8 for rendering. Add RG8 as
fallbacks for integer formats, and require a renderable format to be
picked for all R8 variants.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5748>
2020-07-05 00:24:04 -04:00
Eric Engestrom
9e2afe4f05 mesa/glformats: make _mesa_gles_error_check_format_and_type() more consistent
Let's consistently use the following code format instead of relying on
falling through to `default`:

    if (!req)
       return GL_INVALID_OPERATION;
    break;

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5729>
2020-07-04 09:14:42 +00:00
Benjamin Cheng
a573c8cd47 drirc: Add picom to adaptive_sync exclusion list
The compton compositor is unmaintained, with a new fork named picom taking
its place. As with the other compositors (including compton), adaptive
sync should not be enabled.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5740>
2020-07-04 08:46:12 +00:00
Jonathan Marek
19f3c79c7e turnip: fix tess param bo size calculation
ir3 already calculates the stride in the tess param bo, so use that instead
of a incorrect calculation. The calculation of per_vertex_output_size /
per_patch_output_size is wrong because it counts dwords instead of bytes,
and what it counts for per_vertex_output_size is a per-patch size because
the glsl type is already an array of # vertex/patch elements.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5743>
2020-07-04 03:33:43 +00:00
Vinson Lee
395511d169 nir: Add nir_lower_clip_disable.c to SCons build.
Fixes: fb2fe802f6 ("nir: add lowering pass for clip plane enabling")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3217
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5741>
2020-07-04 01:04:54 +00:00
Timothy Arceri
a1b89dbc8f gitlab-ci: Enable -Werror in meson-classic job
It's warning-clean.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5730>
2020-07-04 00:32:26 +00:00
Timothy Arceri
ec8fdf8579 nouveau: fix pointer-sign warning
Fixes: e630271e0e ("mesa: don't ever set NullBufferObj in gl_vertex_array_binding")
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5730>
2020-07-04 00:32:26 +00:00
Eric Anholt
b9e163fa67 util: Avoid strict aliasing bugs in xxhash.
XXH32 is doing access through u32 *, and with strict aliasing the compiler
gets to assume that those are independent of the u16 writes we did in
fd6_texture_key setup, and based on various tweaks to the code, would
result in bad hashes computed after inlining.  The failure was:

../src/util/hash_table.c:326:_mesa_hash_table_search_pre_hashed: Assertion
`ht->key_hash_function == ((void *)0) || hash == ht->key_hash_function(key)'
failed.)

By setting these two flags, we always take the unaligned,
memcpy-the-32-bit-data path.  I believe this should be same perf on x86
(which will happily unaligned load 32 bits in the end), while it will be
slower on arm (where you have to a special unaligned load operation iirc).
This should still be far faster than our old hash.

Fixes: edd62619a1 ("freedreno: replace fnv1a hash function with xxhash")
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5271>
2020-07-03 23:27:06 +00:00
Dave Airlie
29ce8060eb draw/clip: fix viewport index for geometry shaders
The old code updated the viewport index on the first vertex in
a primitive, however it was picking the first vertex wrong
when used with geometry shaders.

This code has access to the prim info with the primitive lengths
so instead keep track of when a new primitive starts by tracking
the lengths and updating the viewport index then. The prim info
is only valid after a GS or prim assembly, so enable prim assembly
if a vertex shader ever uses viewport index.

This fixes:
piglit arb_viewport_array-render-viewport-2
KHR-GLES31.core.viewport_array.draw_to_single_layer_with_multiple_viewports,Fail
KHR-GLES31.core.viewport_array.draw_mulitple_viewports_with_single_invocation,Fail
KHR-GLES31.core.viewport_array.draw_multiple_layers,Fail
KHR-GLES31.core.viewport_array.depth_range,Fail

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5489>
2020-07-04 07:19:08 +10:00
Dave Airlie
3366171d0a draw/clip: cleanup viewport index handling code.
This moves code around, and adds initial clamping

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5489>
2020-07-04 07:19:05 +10:00
Jonathan Marek
0e7b7c3087 turnip: vsc improvements
* Remove scratch_bo from cmdbuffer, use a device-global bo instead, which
  also includes border color (and eventually shaders for 3D blit path)
* Use CP_SET_BIN_DATA5_OFFSET to allow setting VSC buffer addresses only
  once at the start of the cmdstream
* Use scratch bo mechanism for a resizable VSC buffer
* Use feedback from "vsc_draw_overflow" and "vsc_prim_overflow" values to
  increase the size of VSC buffer when beginning to record a new cmdbuffer

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5570>
2020-07-03 14:49:10 +00:00
Jonathan Marek
4ac851ea25 turnip: rework render_tiles loop
Loop through pipes and then loop over the tiles in that pipe instead of
looping over all tiles then having to calculate the pipe # and slot #.

Mainly this avoids the hard to follow "config_get_tile" logic, but should
also be a gain due to better use of cache with the VSC data.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5570>
2020-07-03 14:49:10 +00:00
Jonathan Marek
8898ebce1a turnip: make tiling config part of framebuffer state
Compute the tiling config at framebuffer creation time. A framebuffer will b
be re-used multiple times, so this will avoid having to re-calculate the
tiling config every time a command buffer is recorded.

The tiling config already couldn't use the render area's x1/y1 because of
hw binning, this move makes it so the render area isn't used at all for the
tiling config.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5570>
2020-07-03 14:49:10 +00:00
Michel Dänzer
31392f8371 Revert "loader/dri3: Check for window destruction in dri3_wait_for_event_locked"
This reverts commit d7d7687829.

It caused freezes with e.g. kwin_x11 due to hitting the 1s timeout.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3214
Reopens: https://gitlab.freedesktop.org/mesa/mesa/-/issues/116
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5722>
2020-07-03 09:55:50 +00:00
Emmanuel Vadot
02d0b2d560 meson: Add versioning for xvmc tracker
The xvmc tracker used to be versionned with autotool but this seems to have been
lost in the meson switch.

Fixes: 22a817af8a ("meson: build gallium xvmc state tracker")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5708>
2020-07-03 09:25:52 +00:00
Mike Blumenkrantz
a79ca675f3 st/program: use nir_lower_clip_disable instead of nir_lower_clip_vs conditionally
if the shader already outputs gl_ClipDistance, nir_lower_clip_vs will create
duplicate variables when what we want is to just change the existing values

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5529>
2020-07-03 08:56:30 +00:00
Mike Blumenkrantz
fb2fe802f6 nir: add lowering pass for clip plane enabling
a pass which rewrites gl_ClipDistance[n] to an undef if the corresponding
clip plane is disabled in the rasterizer state

this pass is needed for zink to handle api disables of clip planes

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5529>
2020-07-03 08:56:30 +00:00
Alejandro Piñeiro
f8946bd705 v3d/tex: handle correctly coordinates for cube/cubearrays images
When fetching for cube maps, we need to interpret them as 2d texture
arrays, being the third coordinate the index for the face.

Fixes Vulkan CTS tests like the following using v3dv:

dEQP-VK.binding_model.shader_access.primary_cmd_buf.storage_image.fragment.single_descriptor.cube_base_mip
dEQP-VK.binding_model.shader_access.primary_cmd_buf.storage_image.compute.multiple_descriptor_sets.multiple_contiguous_descriptors.cube_array_base_mip

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5675>
2020-07-03 08:14:57 +00:00
Benjamin Tissoires
0b6e03b848 CI: reduce bandwidth for git pull
Over the last 7 days, git pulls represented a total of 1.7 TB.

On those 1.7 TB, we can see:
- ~300 GB for the CI farm on hetzner
- ~730 GB for the CI farm on packet.net
- ~680 GB for the rest of the world

We can not really change the rest of the world*, but we can
certainly reduce the egress costs towards our CI farms.

Right now, the gitlab runners are not doing a good job at
caching the git trees for the various jobs we make, and
we end up with a lot of cache-misses. A typical pipeline
ends up with a good 2.8GB of git pull data. (a compressed
archive of the mesa folder accounts for 280MB)

In this patch, we implemented what was suggested in
https://gitlab.com/gitlab-org/gitlab/-/issues/215591#note_334642576

- we host a brand new MinIO server on packet
- jobs can upload files on 2 locations:
  * git-cache/<namespace>/<project>/<branch-name>.tar.gz
  * artifacts/<namespace>/<project>/<pipeline-id>/
- the authorization is handled by gitlab with short tokens
  valid only for the time of the job is running
- whenever a job runs, the runner are configured to execute
  (eval) $CI_PRE_CLONE_SCRIPT
- this variable is set globally to download the current cache
  from the MinIO packet server, unpack it and replace the
  possibly out of date cache found on the runner
- then git fetch is run by the runner, and only the delta
  between the upstream tree and the local tree gets pulled.

We can rebuild the git cache in a schedule job (once a day
seems sufficient), and then we can stop the cache miss
entirely.

First results showed that instead of pulling 280MB of data
in my fork, I got a pull of only 250KB. That should help us.

* arguably, there are other farms in the rest of the world, so
hopefully we can change those too.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Peter Hutterer <peter.hutterer@who-t.net>
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5428>
2020-07-03 09:44:36 +02:00
Hyunjun Ko
9190cc9b15 tu,radv: fix potentially wrong offset of flexible array.
v2. Remove redundant memset and make the expression simpler.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5703>
2020-07-03 00:45:16 +00:00
Timothy Arceri
e2209e869a meson: turn on Wimplicit-fallthrough project wide
This will help avoid coding errors and allows for less warnings
from some static analysis tools.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:53 +00:00
Timothy Arceri
26aa02b5ab nv30: add missing fallthrough comment
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:53 +00:00
Timothy Arceri
651441c16f mesa: update fallthrough comment so gcc can see it
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:53 +00:00
Timothy Arceri
9549443a8f svga: add missing fallthrough comments
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:53 +00:00
Timothy Arceri
7579414db2 r300: add and fix up fallthrough comments
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:53 +00:00
Timothy Arceri
dfb9be6994 mesa: fix unintended fallthrough in glIsEnabled()
Fixes: 08fae07f52 ("mesa: Handle GL_TEXTURE_GEN_STR_OES in _mesa_Enable()")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:53 +00:00
Timothy Arceri
8b90310b40 mesa: add missing fallthrough comment to teximage.c
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Timothy Arceri
d88447d5ce mesa/vbo: add some missing fallthrough comments
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Timothy Arceri
cb8cd64411 spirv: add missing fallthrough comments
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Timothy Arceri
580fe89958 radeon: add missing fallthrough comments
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Timothy Arceri
f692131641 glsl: move fallthrough comment to where gcc can see it
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Timothy Arceri
bf3fc3cf3d glx: add missing fallthrough comment
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Timothy Arceri
cb5fafd617 radeonsi: add missing fallthrough comment
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Timothy Arceri
5c4d9816ac mesa: add fallthrough comments to COPY_SZ_4V()
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Timothy Arceri
dbf016e259 nir: fix implicit fallthrough warnings
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Timothy Arceri
31dcc173b1 mesa: add fallthrough comments to get.c
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Timothy Arceri
f931099270 mesa: add fallthrough comments to glformats.c
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Timothy Arceri
040b07c7fe mesa: fix fallthrough in glformats
Before 908f817918 this would fallthrough to GL_INVALID_OPERATION
if the validation condition was not met. But since that change it
will now only return GL_INVALID_OPERATION if
!_mesa_has_EXT_texture_compression_bptc(ctx) is true. This seems
unintended.

Here we fix up the fallthrough and add the fallthrough comment so
this doesn't happen again.

Fixes: 908f817918 ("mesa: expose EXT_texture_compression_bptc in GLES")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3005
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5705>
2020-07-02 23:52:52 +00:00
Ian Romanick
8591adea38 nir/algebraic: Don't distrubte absolute-value into dot-products
Dot product is multiplication followed by addition, and absolute value
does not distribute into addition.

Only vec4 platforms are affected by this change as scalar-only platforms
never have any of the fdot_replicated instructions.  In the shader-db
results, below, shaders in MANY different applications are affected.
Trine, Doom3, Enemy Territory: Quake Wars, Counter Strike: Global
Offensive, Mad Max, Metro Last Light, and on and on...  I'm really
shocked that there were no test regressions!

All Haswell and earlier platforms had similar results. (Haswell shown)
total instructions in shared programs: 16219743 -> 16219820 (<.01%)
instructions in affected programs: 12171 -> 12248 (0.63%)
helped: 1
HURT: 78
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.78% max: 0.78% x̄: 0.78% x̃: 0.78%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.35% max: 2.38% x̄: 0.91% x̃: 1.06%
95% mean confidence interval for instructions value: 0.92 1.03
95% mean confidence interval for instructions %-change: 0.78% 1.00%
Instructions are HURT.

total cycles in shared programs: 538481383 -> 538491045 (<.01%)
cycles in affected programs: 470796 -> 480458 (2.05%)
helped: 149
HURT: 142
helped stats (abs) min: 1 max: 1338 x̄: 71.13 x̃: 4
helped stats (rel) min: 0.06% max: 40.99% x̄: 2.76% x̃: 0.67%
HURT stats (abs)   min: 1 max: 2092 x̄: 142.68 x̃: 12
HURT stats (rel)   min: 0.07% max: 55.38% x̄: 5.07% x̃: 1.07%
95% mean confidence interval for cycles value: -5.28 71.69
95% mean confidence interval for cycles %-change: -0.07% 2.19%
Inconclusive result (value mean confidence interval includes 0).

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 62795475e8 ("nir/algebraic: Distribute source modifiers into instructions")
Closes: #3129
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5581>
2020-07-02 14:05:33 -07:00
Eric Anholt
99afaa1d54 ci: Disable pixmark-piano trace on a630 due to GPU hangs.
I haven't reproduced it with just this trace in a loop locally, but it's
blocked some CI jobs with hangs where a few tiles didn't get
rendered.  For example:

https://gitlab.freedesktop.org/mesa/mesa/-/jobs/3314062

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5667>
2020-07-02 19:12:32 +00:00
Alyssa Rosenzweig
7b0a4f977b pan/mdg: Schedule based on liveness
By estimating liveness in the scheduler and choosing instructions likely
to reduce register pressure, on average we can decrease pressure given a
sufficiently larger window. On the other hand, decreasing pressure
instead of leaning too heavily on the search window enables us to use a
much larger search window without inflating pressure too much. So by
doing both in lockstep, we benefit pretty well.

total instructions in shared programs: 49458 -> 48540 (-1.86%)
instructions in affected programs: 26931 -> 26013 (-3.41%)
helped: 221
HURT: 15
helped stats (abs) min: 1 max: 36 x̄: 4.37 x̃: 2
helped stats (rel) min: 0.31% max: 16.90% x̄: 4.97% x̃: 3.85%
HURT stats (abs)   min: 1 max: 4 x̄: 3.13 x̃: 3
HURT stats (rel)   min: 0.50% max: 7.14% x̄: 4.53% x̃: 4.55%
95% mean confidence interval for instructions value: -4.65 -3.13
95% mean confidence interval for instructions %-change: -4.94% -3.81%
Instructions are helped.

total bundles in shared programs: 25199 -> 23446 (-6.96%)
bundles in affected programs: 21600 -> 19847 (-8.12%)
helped: 277
HURT: 170
helped stats (abs) min: 1 max: 45 x̄: 7.33 x̃: 6
helped stats (rel) min: 1.06% max: 33.83% x̄: 11.01% x̃: 8.57%
HURT stats (abs)   min: 1 max: 6 x̄: 1.63 x̃: 1
HURT stats (rel)   min: 1.19% max: 40.00% x̄: 13.36% x̃: 11.11%
95% mean confidence interval for bundles value: -4.61 -3.23
95% mean confidence interval for bundles %-change: -3.00% -0.49%
Bundles are helped.

total quadwords in shared programs: 40269 -> 39652 (-1.53%)
quadwords in affected programs: 35881 -> 35264 (-1.72%)
helped: 242
HURT: 244
helped stats (abs) min: 1 max: 36 x̄: 4.61 x̃: 3
helped stats (rel) min: 0.39% max: 16.33% x̄: 5.33% x̃: 5.13%
HURT stats (abs)   min: 1 max: 20 x̄: 2.04 x̃: 1
HURT stats (rel)   min: 0.81% max: 21.74% x̄: 7.57% x̃: 6.25%
95% mean confidence interval for quadwords value: -1.71 -0.83
95% mean confidence interval for quadwords %-change: 0.46% 1.82%
Inconclusive result (value mean confidence interval and %-change mean confidence interval disagree).

total registers in shared programs: 3786 -> 3336 (-11.89%)
registers in affected programs: 2161 -> 1711 (-20.82%)
helped: 262
HURT: 35
helped stats (abs) min: 1 max: 7 x̄: 1.87 x̃: 1
helped stats (rel) min: 6.25% max: 66.67% x̄: 28.91% x̃: 25.00%
HURT stats (abs)   min: 1 max: 3 x̄: 1.11 x̃: 1
HURT stats (rel)   min: 7.69% max: 100.00% x̄: 19.76% x̃: 12.50%
95% mean confidence interval for registers value: -1.70 -1.33
95% mean confidence interval for registers %-change: -25.56% -20.79%
Registers are helped.

total threads in shared programs: 2453 -> 2592 (5.67%)
threads in affected programs: 160 -> 299 (86.87%)
helped: 79
HURT: 6
helped stats (abs) min: 1 max: 2 x̄: 1.85 x̃: 2
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
HURT stats (abs)   min: 1 max: 2 x̄: 1.17 x̃: 1
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for threads value: 1.45 1.82
95% mean confidence interval for threads %-change: 81.08% 97.75%
Threads are [helped].

total spills in shared programs: 168 -> 17 (-89.88%)
spills in affected programs: 167 -> 16 (-90.42%)
helped: 13
HURT: 0

total fills in shared programs: 186 -> 35 (-81.18%)
fills in affected programs: 186 -> 35 (-81.18%)
helped: 14

HURT: 0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5513>
2020-07-02 14:41:04 -04:00
Icecream95
a6f0d7f003 pan/mdg: Vectorize vlut operations
total instructions in shared programs: 49462 -> 49458 (<.01%)
instructions in affected programs: 348 -> 344 (-1.15%)
helped: 2
HURT: 0

total bundles in shared programs: 25201 -> 25199 (<.01%)
bundles in affected programs: 142 -> 140 (-1.41%)
helped: 2
HURT: 0

total quadwords in shared programs: 40273 -> 40269 (<.01%)
quadwords in affected programs: 244 -> 240 (-1.64%)
helped: 2
HURT: 0

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5513>
2020-07-02 14:41:04 -04:00
Alyssa Rosenzweig
c957249df9 pan/mdg: Skip r1.w write where possible
Should help cycle count. Register pressure is spurious here.

total instructions in shared programs: 50501 -> 49517 (-1.95%)
instructions in affected programs: 33342 -> 32358 (-2.95%)
helped: 393
HURT: 0
helped stats (abs) min: 2 max: 3 x̄: 2.50 x̃: 3
helped stats (rel) min: 0.26% max: 33.33% x̄: 11.99% x̃: 9.09%
95% mean confidence interval for instructions value: -2.55 -2.45
95% mean confidence interval for instructions %-change: -13.01% -10.97%
Instructions are helped.

total bundles in shared programs: 25511 -> 25309 (-0.79%)
bundles in affected programs: 7778 -> 7576 (-2.60%)
helped: 202
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.43% max: 20.00% x̄: 5.97% x̃: 4.35%
95% mean confidence interval for bundles value: -1.00 -1.00
95% mean confidence interval for bundles %-change: -6.65% -5.28%
Bundles are helped.

total quadwords in shared programs: 40789 -> 40339 (-1.10%)
quadwords in affected programs: 25453 -> 25003 (-1.77%)
helped: 273
HURT: 0
helped stats (abs) min: 1 max: 3 x̄: 1.65 x̃: 2
helped stats (rel) min: 0.16% max: 22.22% x̄: 5.99% x̃: 3.92%
95% mean confidence interval for quadwords value: -1.71 -1.59
95% mean confidence interval for quadwords %-change: -6.68% -5.30%
Quadwords are helped.

total registers in shared programs: 3911 -> 3784 (-3.25%)
registers in affected programs: 275 -> 148 (-46.18%)
helped: 129
HURT: 2
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 14.29% max: 50.00% x̄: 48.69% x̃: 50.00%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for registers value: -1.01 -0.93
95% mean confidence interval for registers %-change: -49.45% -44.91%
Registers are helped.

total threads in shared programs: 2455 -> 2455 (0.00%)
threads in affected programs: 0 -> 0
helped: 0

HURT: 0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5513>
2020-07-02 14:41:04 -04:00
Alyssa Rosenzweig
de41c4c103 pan/mdg: Prioritize non-moves on VADD/VLUT
This helps reduce ALU cycle count.

total instructions in shared programs: 50507 -> 50501 (-0.01%)
instructions in affected programs: 487 -> 481 (-1.23%)
helped: 7
HURT: 3
helped stats (abs) min: 1 max: 2 x̄: 1.29 x̃: 1
helped stats (rel) min: 1.01% max: 8.33% x̄: 4.11% x̃: 4.35%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 1.54% max: 4.35% x̄: 2.80% x̃: 2.50%
95% mean confidence interval for instructions value: -1.44 0.24
95% mean confidence interval for instructions %-change: -5.12% 1.04%
Inconclusive result (value mean confidence interval includes 0).

total bundles in shared programs: 25640 -> 25511 (-0.50%)
bundles in affected programs: 5879 -> 5750 (-2.19%)
helped: 67
HURT: 7
helped stats (abs) min: 1 max: 16 x̄: 2.04 x̃: 1
helped stats (rel) min: 0.63% max: 18.18% x̄: 4.11% x̃: 2.12%
HURT stats (abs)   min: 1 max: 2 x̄: 1.14 x̃: 1
HURT stats (rel)   min: 1.75% max: 14.29% x̄: 5.42% x̃: 3.70%
95% mean confidence interval for bundles value: -2.29 -1.20
95% mean confidence interval for bundles %-change: -4.41% -2.00%
Bundles are helped.

total quadwords in shared programs: 40899 -> 40789 (-0.27%)
quadwords in affected programs: 11438 -> 11328 (-0.96%)
helped: 70
HURT: 26
helped stats (abs) min: 1 max: 8 x̄: 2.17 x̃: 1
helped stats (rel) min: 0.42% max: 9.76% x̄: 3.29% x̃: 2.56%
HURT stats (abs)   min: 1 max: 5 x̄: 1.62 x̃: 1
HURT stats (rel)   min: 0.48% max: 9.68% x̄: 3.58% x̃: 1.99%
95% mean confidence interval for quadwords value: -1.60 -0.69
95% mean confidence interval for quadwords %-change: -2.28% -0.58%
Quadwords are helped.

total registers in shared programs: 3916 -> 3911 (-0.13%)
registers in affected programs: 129 -> 124 (-3.88%)
helped: 10
HURT: 5
helped stats (abs) min: 1 max: 2 x̄: 1.10 x̃: 1
helped stats (rel) min: 8.33% max: 25.00% x̄: 12.84% x̃: 9.55%
HURT stats (abs)   min: 1 max: 2 x̄: 1.20 x̃: 1
HURT stats (rel)   min: 11.11% max: 66.67% x̄: 27.30% x̃: 14.29%
95% mean confidence interval for registers value: -0.98 0.32
95% mean confidence interval for registers %-change: -12.67% 13.75%
Inconclusive result (value mean confidence interval includes 0).

total threads in shared programs: 2455 -> 2455 (0.00%)
threads in affected programs: 6 -> 6 (0.00%)
helped: 1
HURT: 1
helped stats (abs) min: 2 max: 2 x̄: 2.00 x̃: 2
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%

total loops in shared programs: 6 -> 6 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 168 -> 168 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0

total fills in shared programs: 186 -> 186 (0.00%)
fills in affected programs: 0 -> 0
helped: 0
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5513>
2020-07-02 14:41:04 -04:00
Alyssa Rosenzweig
01e965d312 pan/mdg: Allow Z/S writes to use any 2nd stage unit
This ensures there will not be dependency problems if we emit a move
that tries to read from a parallel instruction.

No shader-db changes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5513>
2020-07-02 14:41:04 -04:00
Alyssa Rosenzweig
8ac2c08045 pan/mdg: Defer smul, vlut until after writeout moves
We can end up with bad dependencies with a depth/stencil export. Let's
let the writeout special cases consume these values if possible, using a
move otherwise in which case it won't be used in the other slots anyway.

total instructions in shared programs: 50508 -> 50507 (<.01%)
instructions in affected programs: 12 -> 11 (-8.33%)
helped: 1
HURT: 0

total bundles in shared programs: 25640 -> 25640 (0.00%)
bundles in affected programs: 0 -> 0
helped: 0
HURT: 0

total quadwords in shared programs: 40899 -> 40899 (0.00%)
quadwords in affected programs: 0 -> 0
helped: 0
HURT: 0

total registers in shared programs: 3917 -> 3916 (-0.03%)
registers in affected programs: 3 -> 2 (-33.33%)
helped: 1
HURT: 0

total threads in shared programs: 2455 -> 2455 (0.00%)
threads in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 168 -> 168 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0

total fills in shared programs: 186 -> 186 (0.00%)
fills in affected programs: 0 -> 0
helped: 0
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5513>
2020-07-02 13:37:10 -04:00
Alyssa Rosenzweig
2904acd938 pan/mdg: Schedule writeout to VLUT
Many thanks to Icecream95 for noticing this is possible if alpha is not
written.

total instructions in shared programs: 50509 -> 50508 (<.01%)
instructions in affected programs: 221 -> 220 (-0.45%)
helped: 2
HURT: 1
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.74% max: 1.35% x̄: 1.04% x̃: 1.04%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 9.09% max: 9.09% x̄: 9.09% x̃: 9.09%

total bundles in shared programs: 25675 -> 25640 (-0.14%)
bundles in affected programs: 5434 -> 5399 (-0.64%)
helped: 34
HURT: 0
helped stats (abs) min: 1 max: 2 x̄: 1.03 x̃: 1
helped stats (rel) min: 0.27% max: 20.00% x̄: 2.29% x̃: 0.67%
95% mean confidence interval for bundles value: -1.09 -0.97
95% mean confidence interval for bundles %-change: -3.64% -0.94%
Bundles are helped.

total quadwords in shared programs: 40887 -> 40899 (0.03%)
quadwords in affected programs: 1995 -> 2007 (0.60%)
helped: 2
HURT: 16
helped stats (abs) min: 1 max: 3 x̄: 2.00 x̃: 2
helped stats (rel) min: 1.67% max: 2.40% x̄: 2.03% x̃: 2.03%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.54% max: 5.88% x̄: 1.40% x̃: 0.86%
95% mean confidence interval for quadwords value: 0.15 1.18
95% mean confidence interval for quadwords %-change: 0.13% 1.90%
Quadwords are HURT.

total registers in shared programs: 3916 -> 3917 (0.03%)
registers in affected programs: 2 -> 3 (50.00%)
helped: 0
HURT: 1

total threads in shared programs: 2455 -> 2455 (0.00%)
threads in affected programs: 0 -> 0
helped: 0
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5513>
2020-07-02 13:37:10 -04:00
Alyssa Rosenzweig
14415d581a pan/mdg: Remove bundle interference code
This incorrectly worked around the r1 issue fixed earlier.

total instructions in shared programs: 50514 -> 50509 (<.01%)
instructions in affected programs: 826 -> 821 (-0.61%)
helped: 10
HURT: 5
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 1.10% max: 4.17% x̄: 2.04% x̃: 1.59%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 1.16% max: 5.00% x̄: 3.10% x̃: 2.17%
95% mean confidence interval for instructions value: -0.87 0.21
95% mean confidence interval for instructions %-change: -1.90% 1.25%
Inconclusive result (value mean confidence interval includes 0).

total bundles in shared programs: 25680 -> 25675 (-0.02%)
bundles in affected programs: 539 -> 534 (-0.93%)
helped: 10
HURT: 5
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 1.54% max: 9.09% x̄: 3.51% x̃: 2.22%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 2.22% max: 8.33% x̄: 5.44% x̃: 4.17%
95% mean confidence interval for bundles value: -0.87 0.21
95% mean confidence interval for bundles %-change: -3.40% 2.35%
Inconclusive result (value mean confidence interval includes 0).

total quadwords in shared programs: 40887 -> 40887 (0.00%)
quadwords in affected programs: 0 -> 0
helped: 0
HURT: 0

total registers in shared programs: 3916 -> 3916 (0.00%)
registers in affected programs: 22 -> 22 (0.00%)
helped: 2
HURT: 2
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 16.67% max: 25.00% x̄: 20.83% x̃: 20.83%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 16.67% max: 16.67% x̄: 16.67% x̃: 16.67%
95% mean confidence interval for registers value: -1.84 1.84
95% mean confidence interval for registers %-change: -36.96% 32.79%
Inconclusive result (value mean confidence interval includes 0).

total threads in shared programs: 2455 -> 2455 (0.00%)
threads in affected programs: 0 -> 0
helped: 0
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5513>
2020-07-02 13:37:10 -04:00
Alyssa Rosenzweig
5a43f7fcce pan/mdg: Don't assign destination in writeout block to r1
It will misbehave.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5513>
2020-07-02 13:37:10 -04:00
Alyssa Rosenzweig
d838cb96a5 pan/mdg: Defer nir_fuse_io_16 until after opts
Sometimes DCE/etc can opt out things that would force 32-bit, so this is
worthwhile.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5513>
2020-07-02 13:37:10 -04:00
Alyssa Rosenzweig
78df3b0375 panfrost: Specify stack_shift on SFBD
Fixes spilling on T720.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5513>
2020-07-02 13:37:10 -04:00
Christian Gmeiner
64cdc1311b etnaviv: move ra into own file
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
027e9e8da3 etnaviv: move nir compiler related stuff into .c file
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
f1df033fcc etnaviv: move functions that generate asm to own file
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
79427a0190 etnaviv: drop emit macro
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
624b8b4a92 etnaviv: merge struct etna_compile and etna_state
I see no good architectural reason for this split.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
0f025e8b81 etnaviv: move liveness related stuff into own file
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
9ae96d32dd etnaviv: make more use of compile_error(..)
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
96670c8150 etnaviv: drop OPT_V define
Directly use NIR_PASS_V(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
1636e14cfd etnaviv: move etna_lower_alu(..) to etnaviv_nir.c
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
7460d4863d etnaviv: get rid of etna_compile dependency
Needed prep change to be able to move alu lowering.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
12b15cbcbf etnaviv: move etna_lower_io(..) to etnaviv_nir.c
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
ea17cbf16f etnaviv: convert enums
Atm. it is not possible to move the enums to a header file
as they do not use an identifier but directly define an
object.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Christian Gmeiner
34f776386c etnaviv: delete not used struct
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5690>
2020-07-02 17:04:46 +00:00
Michel Dänzer
3cdc0d5098 ci: Move deploy stage between container & build stages
Having it as the last stage meant that the pages job could only run
once all other jobs had finished.

The new position means it can run in parallel with build jobs.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5711>
2020-07-02 18:25:28 +02:00
Michel Dänzer
fc41ec16c8 ci: Use "when: always" for pages job
"when: on_success" meant that that the job wouldn't run automatically
until all jobs of all earlier stages passed, and would be skipped if
any of them failed. But we need to always run this job if any
documentation files were modified.

Fixes: 8e2cb8ef27 "gitlab-ci: Extend .ci-run-policy template for docs
                     jobs"

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5711>
2020-07-02 18:25:25 +02:00
Samuel Pitoiset
ab9ecb607b radv,vulkan: add a new x11 wsi drirc workaround for DOOM Eternal
DOOM Eternal happily creates a swapchain with 2 images for IMMEDIATE.
This fixes a 10% performance issue with RADV.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5704>
2020-07-02 08:31:57 +00:00
Samuel Pitoiset
311b9f2583 Revert "vulkan/wsi/x11: Ensure we create at least minImageCount images."
This breaks some games like Wolfenstein Youngblood or Wolfenstein 2
that crash at launch if the number of images is more than what they
expected.

We could add vk_x11_strict_image_count to fix these game bugs but
it seems more conservative to revert that change and add a new wsi
drirc workaround for Doom Eternal.

This reverts commit 5f97dfc4c8.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5704>
2020-07-02 08:31:57 +00:00
Samuel Pitoiset
11a6a96f8a radv: fix wide lines with multisample enabled
When set, EXPAND_LINE_WIDTH expands the line width by 1/cos(a),
where a is the minimum angle from horizontal or vertical. This
seems required by OpenGL line rasterization but not by Vulkan.

Similar to what AMDVLK and AMDGPU-PRO do for AA wide lines.

This fixes
dEQP-VK.rasterization.interpolation_multisample_*_bit.*lines_wide.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5698>
2020-07-02 07:51:48 +00:00
Daniel Stone
efec833a18 CI: Disable Windows build due to unstable infrastructure
The Windows runner is having a lot of issues cloning repositories,
failing early due to an unhandled HTTP error. Temporarily disable it
until we can figure out what's going on and fix it.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5716>
2020-07-02 07:26:25 +00:00
Mike Blumenkrantz
f2f57ef9f7 zink: implement Vk_EXT_index_type_uint8
this is a simple extension that enables using uint8-sized index buffers,
which lets us avoid having those go through primconvert

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5712>
2020-07-02 07:11:27 +00:00
Samuel Pitoiset
53372175c9 radv: fix wide points and lines
The maximum value for both points and lines is 65536. This doesn't
fix anything known (just found this while looking in that area).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5696>
2020-07-02 08:26:03 +02:00
Dave Airlie
8b8ffb12b4 docs: update llvmpipe GL 4.0 status
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
af7a7f6ce7 ci: fixup tests after all indirect images fixes.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
0ecae0ac0b llvmpipe: handle indirect images properly
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
b7b22b735d draw/sample: add support for indirect images
This uses the array functions to implement indirect image support
for draw shaders

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
e6f7fe3324 gallivm/nir: add support for indirect image loading
This adds support for indirect image loading, image stores
can cause images with different formats to be stored to,
so this operates like the texture code now.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
bc1ac7dc3f gallivm/img: refactor out the texel return type (v2)
v2:
refactor to just pass type as pointed out by Roland.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
6e25a5a375 gallivm/nir: refactor image operations for indirect support.
This just refactors the image code, so that outdata is passed
explicitly, and refactors the internal handling of NONE formats.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
3ca3b07fc1 gallivm/nir: support passing image index into image code.
This doesn't do anything yet, just adds parsing support for it.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
f75c1e83e2 llvmpipe: pass number of images into image soa create
Just store this for now to use later with indexing

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
8a4ef09e7e draw: pass number of images to image soa create
This is stored for now but will be used as part of indirect
image support

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
ee10f24a31 llvmpipe: enable ARB_gpu_shader5
This isn't fully free of bugs, but it's good to get CI working,
so fixing those bugs doesn't break anything.

The main buggy areas are missing indirect texture size,
and transform feedback geometry streams.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
8807bdb1b7 gallivm/sample: handle size unit offset
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
d243655d34 llvmpipe/draw: wire up indirect offset
This bounds checks and adds to the llvm index.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
3b973eab73 gallivm/sample: pass indirect offset into texture/image units
This isn't needed for the basic indirect code, but it is needed for
texture size/image size unfortunately. They could be done with a super
switch, but it seems simple to query them.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
e168d148d7 gallivm/nir: handle non-uniform texture offsets
The way we construt vertex/geom shaders means these can
diverge, so we have to just hammer it out manually,
there are likely optimisation opportuniities in here

Signed-off-by: Dave Airlie <airlied@redhat.com>

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
9172e405ef gallivm/nir: add texture unit indexing
This hooks up the index from NIR into the sampler code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
52a050ea0a llvmpipe: add support for indirect texture access.
This hooks up the sampler switch statement generator
 to the llvmpipe sampler interface.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
6dc904f600 draw: add support for indirect texture access
This hooks up the switch statement generator to the draw code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:17 +00:00
Dave Airlie
28f906ad91 gallivm: add indirect texture switch statement builder.
This adds the apis to add an indirect accessor for arrays
of textures, using an LLVM switch statement and per-texture
sampler functions.

It also adds the indexer to the sampler parameters

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:16 +00:00
Dave Airlie
8b15a08ebd gallivm/sample: change texture function generator api
This passes some more paramters in directly and changes how
the returns are done in order to reuse this function for
indirect texture support later.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:16 +00:00
Dave Airlie
30c5cbbcd2 llvmpipe: pass number of samplers into llvm sampler code.
This is to be used later for indirect texture access

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:16 +00:00
Dave Airlie
6528a24cc5 draw: pass nr_samplers into llvm sample state creation.
This will be used later to handle indirect texture support.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
2020-07-02 04:12:16 +00:00
Timothy Arceri
d55aa78615 nir: add missing break to nir_opt_access()
Fixes: f2d0e48ddc ("glsl/nir: Add optimization pass for access flags")

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>
2020-07-02 12:11:30 +10:00
Timothy Arceri
b8409a6af7 egl: move fallthrough comment so gcc can see it
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>
2020-07-02 12:11:30 +10:00
Timothy Arceri
0d5427fa44 iris: add missing fallthrough comment
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>
2020-07-02 12:11:30 +10:00
Timothy Arceri
1a8f918050 intel/compiler: add and fix up fallthrough comments for gcc warnings
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>
2020-07-02 12:11:30 +10:00
Timothy Arceri
512db7ec78 anv: update fallthrough comment so gcc sees it
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>
2020-07-02 12:11:30 +10:00
Timothy Arceri
06dc2f3f47 gallivm: add missing break
Fixes: 26c5ae80f0 ("llvmpipe: enable ARB_shader_group_vote")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>
2020-07-02 12:11:30 +10:00
Timothy Arceri
2ed35c7102 llvmpipe: add missing fallthrough comments
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>
2020-07-02 12:11:30 +10:00
Timothy Arceri
de4004f8ba i965: add and fix fallthrough comments
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>
2020-07-02 12:11:30 +10:00
Matt Turner
8da810a7fb intel/compiler: Don't emit no-op cr0 changes
If mask is 0, we're asking for no changes to cr0.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5566>
2020-07-02 01:24:06 +00:00
Matt Turner
fe14dc98bf intel/compiler: Add assert that set bits are within mask
We generate bitfields of bits that we want to retain (mask) and bits
that we want to set (brw_mode) in the cr0 register, so the bits we want
to set should be in the set of bits we want to retain.

Also, remove the initialization of mask from
fs_visitor::emit_shader_float_controls_execution_mode since
brw_rnd_mode_from_nir initializes the mask parameter unconditionally.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5566>
2020-07-02 01:24:06 +00:00
Greg V
29e2a3b8f5 gallium,util: undef ALIGN on FreeBSD to prevent name clash
Some rare headers like ipc/shm and pthread_np cause
machine/param.h to be included which defines a macro called ALIGN.

Signed-off-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3559>
2020-07-01 16:47:05 +00:00
Emmanuel
f678811b56 i965: Explicitly cast value to uint64_t
In FreeBSD x86 and aarch64 __u64 is typedef to unsigned long and
is the same size as unsigned long long.
Since we are explicitly specifying the format, cast the value
to the proper type.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emmanuel <manu@FreeBSD.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3559>
2020-07-01 16:47:05 +00:00
Emmanuel
565a80450d iris: Explicitly cast value to uint64_t
In FreeBSD x86 and aarch64 __u64 is typedef to unsigned long and
is the same size as unsigned long long.
Since we are explicitly specifying the format, cast the value
to the proper type.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emmanuel <manu@FreeBSD.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3559>
2020-07-01 16:47:05 +00:00
Emmanuel
708db983dd meson: Do not enable USE_ELF_TLS for FreeBSD
Compiling with this option result in too much TLS usage and FreeBSD
cannot handle that.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Emmanuel <manu@FreeBSD.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3559>
2020-07-01 16:47:05 +00:00
Michel Dänzer
6cba468b5e gitlab-ci: Do not create the "success" job when the test-docs job exists
It's redundant in that case.

v2:
* Adapt to v2 of test-docs job rules.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>
2020-07-01 14:31:38 +00:00
Michel Dänzer
8e2cb8ef27 gitlab-ci: Extend .ci-run-policy template for docs jobs
Requires using rules: in the pages job as well, so it doesn't inherit
the rules from the template.

v2:
* Add comment explaining that cases not covered by explicit rules
  default to "when: never".

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>
2020-07-01 14:31:38 +00:00
Michel Dänzer
1c612e8c09 gitlab-ci: Use rules: instead of except:/only: for test-docs job
Only run the job automatically for Marge Bot, otherwise let it be
triggered manually.

v2:
* Never run this job for the main project, since it's only needed in
  pre-merge pipelines.
* Add comment explaining that cases not covered by explicit rules
  default to "when: never".

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>
2020-07-01 14:31:38 +00:00
Erik Faye-Lund
196ac4c6f3 ci: move test-docs to container stage
While we're at it, rename it to reflect that we're now also testing docs
here.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>
2020-07-01 14:31:38 +00:00
Erik Faye-Lund
28ca70b6b6 ci: move deploy-stage later in the pipeline
This makes it not clutter up the pipeline results page so much.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>
2020-07-01 14:31:38 +00:00
Erik Faye-Lund
8774707b1e ci: test docs for non-master builds
This ensures that we test on CI before merge-requests gets merged.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>
2020-07-01 14:31:38 +00:00
Erik Faye-Lund
24fe9f43e5 ci: only build docs if any docs changed
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>
2020-07-01 14:31:38 +00:00
Erik Faye-Lund
d1ca80235d ci: only build docs in the upstream-repo
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>
2020-07-01 14:31:38 +00:00
Jonathan Marek
9bebbf5867 freedreno/ir3: add support for INTERP_MODE_NOPERSPECTIVE
Check the interp mode and use SYSTEM_VALUE_BARYCENTRIC_LINEAR_* instead
when it is INTERP_MODE_NOPERSPECTIVE.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>
2020-07-01 13:52:59 +00:00
Jonathan Marek
0f5c9f9713 turnip: set missing bary sysvals
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>
2020-07-01 13:52:59 +00:00
Jonathan Marek
2453f2bdb7 freedreno/a6xx: set missing bary sysvals
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>
2020-07-01 13:52:59 +00:00
Jonathan Marek
dadfb4ec58 freedreno/a5xx: set missing bary sysvals
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>
2020-07-01 13:52:59 +00:00
Jonathan Marek
33457fc705 freedreno/ir3: add generic get_barycentric()
This will be useful to support the missing barycentric sysvals.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>
2020-07-01 13:52:59 +00:00
Jonathan Marek
75fef41f16 freedreno/a4xx: fake LINEAR_PIXEL varying support for u_blitter
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>
2020-07-01 13:52:59 +00:00
Jonathan Marek
0d419c76bb freedreno/a3xx: support LINEAR_PIXEL/PERSP_CENTROID/LINEAR_CENTROID sysvals
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>
2020-07-01 13:52:59 +00:00
Jonathan Marek
2e9ded21d1 freedreno/registers: update varying-related registers
Note:

* a3xx change based on available register documentation
* a4xx guesses (RB_RENDER_CONTROL2 bits especially)
* a5xx change based on a6xx, these registers seem identical

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>
2020-07-01 13:52:59 +00:00
Michel Dänzer
549b4a3dd4 gitlab-ci: Automatically run pipelines for Marge Bot pre-merge only
Marge only merges an MR if the pipeline passed. Running the pipeline
again after merging is redundant.

v2:
* Add rule to ensure docker images are up to date in the main project
  registry (Eric Anholt)

Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5680>
2020-07-01 12:44:41 +02:00
Iago Toral Quiroga
8456ff75b3 v3d/compiler: fix image size for 1D arrays
Reviewed by: Alejandro Piñeiro <apinheiro@igalia.com>

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5692>
2020-07-01 10:01:46 +00:00
Pierre-Eric Pelloux-Prayer
5f1a16d06d st/mesa: do not clear NewDriverState for inactive states
Fixes: 085aa7f91e ("st/mesa: don't update atomic, SSBO, UBO and TBO states that have no effect")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2951
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5660>
2020-07-01 09:44:59 +02:00
Erik Faye-Lund
7940b47de6 gallium/docs: remove unused imgmath extension
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>
2020-07-01 07:29:21 +00:00
Erik Faye-Lund
27dcdbcc96 gallium/docs: remove non-existent static dir
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>
2020-07-01 07:29:21 +00:00
Erik Faye-Lund
1d7bb2dde0 gallium/docs: prefix exts dir with underscore
It's generally considered good practice to use underscore-prefixes for
directories that contains non-doumentation files, so let's do this for
our custom extensions as well.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>
2020-07-01 07:29:21 +00:00
Erik Faye-Lund
47d3b80428 gallium/docs: use none for highlight_language
We have much more blocks that are of no particular language (mostly
custom ASM variants), so let's instead opt in if we want
syntax-highlighting.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>
2020-07-01 07:29:21 +00:00
Erik Faye-Lund
686f6c7206 gallium/docs: remove reference to non-existent label
This label was removed a long time ago, let's also remove the reference
to it.

Fixes: 3acd7a34ab ("st/vega: Remove.")

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>
2020-07-01 07:29:21 +00:00
Erik Faye-Lund
686cf8eaad gallium/docs: fixup formatting of numbered lists
Fixes: 0caf74bbcd ("gallium: add PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS")
Fixes: 8632626c81 ("gallium: add pipe_resource::nr_storage_samples, and set it same as nr_samples")

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>
2020-07-01 07:29:21 +00:00
Erik Faye-Lund
7f5061c0b7 gallium/docs: update to recent sphinx
add_description_unit has been deprectated for a really long time, and was
finally removed (seemingly in Sphinx 2.0, but this doesn't seem to be
properly documented anywhere I can find), so we shouldn't be using this
any more.

Anyway, let's update the code.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5691>
2020-07-01 07:29:21 +00:00
Dave Airlie
2bf2e6c83d draw/llvm: fix big-endian mask adjusting
This code was broken, but it worked by accident, as the
pad and the edgeflag were reversed, however when Roland
removed the cliptest field back in 2015, he stopped copying
the pad which actually stopped copy the edgeflag.

Fix the function to actually copy the edgeflag.

Fixes: 1b22815af6 ("draw: don't pretend have_clipdist is per-vertex")

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5679>
2020-07-01 09:52:56 +10:00
Dave Airlie
0e6dfd11f2 mesa/get: fix enum16 big-endian getting.
These values were getting casted up to 32-bit, but then extracted
via 16-bit pointer later. Just store via 16-bit.

Fixes a lot of piglit on s390

Fixes: f96a69f916 ("mesa: replace GLenum with GLenum16 in common structures (v4)");

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5679>
2020-07-01 09:52:56 +10:00
Dave Airlie
b743c9bf2d llvmpipe: fix occlusion queries on big-endian.
Casting to u8 arrays and picking the lowest byte is fairly LE specific
grab the other byte.

Cc: <mesa-stable@lists.freedesktop.org>

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5679>
2020-07-01 09:52:56 +10:00
Dave Airlie
3aeb61da49 gallivm/nir: fix big-endian 64-bit splitting/merging.
The shuffles need to be swapped to do this properly on big-endian

Cc: <mesa-stable@lists.freedesktop.org>

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5679>
2020-07-01 09:52:56 +10:00
Dave Airlie
9286605276 glsl: fix constant packing for 64-bit big endian.
In a piglit run on s390 a lot of double tests fail, explicitly
packing/shifting things rather than using memcpy seems to help

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5679>
2020-07-01 09:52:48 +10:00
Eric Engestrom
2cd466bf34 docs: add a page explaining the GitLab CI and the Intel CI
This explains what they are, what they do and how to use them.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Clayton Craft <clayton.a.craft@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2250>
2020-06-30 22:58:08 +00:00
Dylan Baker
fde25a6ed9 mesa/swrast: use logf2 instead of util_fast_log2
The fast version is apparently not accurate enough. I wrote a very
simply test program that called logf2 and the old LOG2 function 100000
times. Across that the two functions had very similar run times, neither
appeared meaningfully faster, so the optimization of bringing back yet
another way to calculate log2f seems pointless.

Fixes: bd4e769515
       ("replace LOG2 with util_fast_log2")

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2856
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5406>
2020-06-30 21:43:22 +00:00
Jan Beich
2e5b214506 anv: disable i915_perf warning on non-Linux
$ vkcube
INTEL-MESA: warning: Performance support disabled, consider sysctl dev.i915.perf_stream_paranoid=0

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5461>
2020-06-30 21:05:52 +00:00
Frédéric Bonnard
5a27efdf0e meson: Revert commit overriding C++ standard with gnu++11 on ppc64el
Since a few versions, mesa now needs c++14 and compiling with gnu++11
on ppc64el fails.
Let's use the default standard and fix the collision of types between
c++ and altivec in a another patch.

Cc: mesa-stable
Signed-off-by: Frédéric Bonnard <frediz@debian.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4948>
2020-06-30 20:44:07 +00:00
Frédéric Bonnard
cd7acd09b9 clover: Fix types collision between c++ and altivec
For that, we undefine bool, vector, pixel as advised by altivec.h in the
specific case that defines them.

Cc: mesa-stable
Signed-off-by: Frédéric Bonnard <frediz@debian.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4948>
2020-06-30 20:44:07 +00:00
Alyssa Rosenzweig
54d7907c27 nir: Propagate *2*16 conversions into vectors
If we have code like:

   ('f2f16', ('vec2', ('f2f32', 'a@16'), '#b@32'))

We would like to eliminate the conversions, but the existing rules can't
see into the the (heterogenous) vector. So instead of trying to
eliminate in one pass, we add opts to propagate the f2f16 into the
vector. Even if nothing further happens, this is often a win since then
the created vector is smaller (half2 instead of float2). Hence the above
gets transformed to

   ('vec2', ('f2f16', ('f2f32', 'a@16')), ('f2f16', '#b@32'))

Then the existing f2f16(f2f32) rule will kick in for the first component
and constant folding will for the second and we'll be left with

   ('vec2', 'a@16', '#b@16')

...eliminating all conversions.

v2: Predicate on !options->vectorize_vec2_16bit. As discussed, this
optimization helps greatly on true vector architectures (like Midgard)
but wreaks havoc on more modern SIMD-within-a-register architectures
(like Bifrost and modern AMD). So let's predicate on that.

v3: Extend for integers as well and add a comment explaining the
transforms.

Results on Midgard (unfortunately a true SIMD architecture):

total instructions in shared programs: 51359 -> 50963 (-0.77%)
instructions in affected programs: 4523 -> 4127 (-8.76%)
helped: 53
HURT: 0
helped stats (abs) min: 1 max: 86 x̄: 7.47 x̃: 6
helped stats (rel) min: 1.71% max: 28.00% x̄: 9.66% x̃: 7.34%
95% mean confidence interval for instructions value: -10.58 -4.36
95% mean confidence interval for instructions %-change: -11.45% -7.88%
Instructions are helped.

total bundles in shared programs: 25825 -> 25670 (-0.60%)
bundles in affected programs: 2057 -> 1902 (-7.54%)
helped: 53
HURT: 0
helped stats (abs) min: 1 max: 26 x̄: 2.92 x̃: 2
helped stats (rel) min: 2.86% max: 30.00% x̄: 8.64% x̃: 8.33%
95% mean confidence interval for bundles value: -3.93 -1.92
95% mean confidence interval for bundles %-change: -10.69% -6.59%
Bundles are helped.

total quadwords in shared programs: 41359 -> 41055 (-0.74%)
quadwords in affected programs: 3801 -> 3497 (-8.00%)
helped: 57
HURT: 0
helped stats (abs) min: 1 max: 57 x̄: 5.33 x̃: 4
helped stats (rel) min: 1.92% max: 21.05% x̄: 8.22% x̃: 6.67%
95% mean confidence interval for quadwords value: -7.35 -3.32
95% mean confidence interval for quadwords %-change: -9.54% -6.90%
Quadwords are helped.

total registers in shared programs: 3849 -> 3807 (-1.09%)
registers in affected programs: 167 -> 125 (-25.15%)
helped: 32
HURT: 1
helped stats (abs) min: 1 max: 3 x̄: 1.34 x̃: 1
helped stats (rel) min: 20.00% max: 50.00% x̄: 26.35% x̃: 20.00%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 16.67% max: 16.67% x̄: 16.67% x̃: 16.67%
95% mean confidence interval for registers value: -1.54 -1.00
95% mean confidence interval for registers %-change: -29.41% -20.69%
Registers are helped.

total threads in shared programs: 2471 -> 2520 (1.98%)
threads in affected programs: 49 -> 98 (100.00%)
helped: 25
HURT: 0
helped stats (abs) min: 1 max: 2 x̄: 1.96 x̃: 2
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
95% mean confidence interval for threads value: 1.88 2.04
95% mean confidence interval for threads %-change: 100.00% 100.00%
Threads are [helped].

total spills in shared programs: 168 -> 168 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0

total fills in shared programs: 186 -> 186 (0.00%)
fills in affected programs: 0 -> 0
helped: 0
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4999>
2020-06-30 16:21:33 +00:00
Icecream95
3e3958c44f panfrost: Do fine-grained flushing for occlusion query results
This allows doing occlusion queries in one frame and getting the
results in the next frame without having to flush.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5676>
2020-06-30 15:14:05 +00:00
Shawn Guo
b1d309eaa3 freedreno/a4xx: fix *_NONE enum conversion
Commit e369b8931c ("freedreno: Use explicit *_NONE enum for undefined
formats") only partially converts ~0 to *_NONE enum.  It breaks texture
support, and glmark2 texture scene gives a black screen.

Adding the missing conversion of ~0 to *_NONE enum fixes the issue.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5693>
2020-06-30 14:23:29 +00:00
Daniel Stone
fa67392048 CI: Re-enable Panfrost T860 jobs
The lab is back online.

This reverts commit 34db50558d.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5694>
2020-06-30 14:49:16 +01:00
Marek Olšák
50d7553600 radeonsi: add a debug option to enable NGG culling for tessellation
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
2020-06-30 10:56:41 +00:00
Marek Olšák
b0c77a5f1d radeonsi: don't try to enable NGG culling for GS
It doesn't do anything.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
2020-06-30 10:56:41 +00:00
Marek Olšák
90cf741d31 radeonsi: always use Wave64 for HS/GS/VS shader stages (except GS fast launch)
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
2020-06-30 10:56:41 +00:00
Marek Olšák
9049e39804 radeonsi: always use Wave32 for GS fast launch, because Wave64 hangs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
2020-06-30 10:56:41 +00:00
Marek Olšák
8fff9beb44 radeonsi: fix NGG culling for Wave64
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
2020-06-30 10:56:41 +00:00
Marek Olšák
2866a6f78d ac/gpu_info: fix num_physical_sgprs_per_simd for gfx10
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
2020-06-30 10:56:41 +00:00
Marek Olšák
1401fc055c radeonsi: don't flush in fence_server_sync
This reverts commit 50b06cbc10 and fixes
an Android performance regression.

Fixes: 50b06cbc10 "radeonsi: fix fence_server_sync() holding up extra work v2"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5602>
2020-06-30 06:38:50 -04:00
Daniel Stone
34db50558d CI: Temporarily disable Panfrost T860 jobs
Phase two of our network reconfiguration is happening this afternoon, so
we need to drop our RK3399 out for a little while. (Part of this
reconfiguration is to shard our devices across networks and racks, so
losing one part of our infrastructure doesn't mean losing any particular
device type.)

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5689>
2020-06-30 10:34:51 +01:00
Daniel Stone
bb703d4247 CI: Re-enable the Windows VS2019 build job
Let's try this and see how it goes.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5689>
2020-06-30 10:34:05 +01:00
Daniel Stone
e3e1e9f82c CI: Correct build-directory path on Windows, and keep it
Build job artifacts capture Meson logs from _build, so we can analyse
what Meson did during configuration, as well as the full output of any
test jobs.

We were previously calling our build directory 'build', which meant it
wouldn't have been captured by the artifacts, and we were also deleting
it to make really sure there was no chance of logs getting captured
either.

Rename the build directory to '_build' to match the others, and don't
delete it either, so we can keep our configure/test logs.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5689>
2020-06-30 10:34:02 +01:00
Daniel Stone
ee056dfef6 CI: Try shared libraries on Windows
This might make linking a bit less prone to OOM when trying to pull in
LLVM.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5689>
2020-06-30 10:33:59 +01:00
Daniel Stone
97b4b1254e CI: Enable assertions on Windows
Getting assertion failures is helpful to have, even if we are doing a
release build.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5689>
2020-06-30 10:33:38 +01:00
Pierre-Eric Pelloux-Prayer
5a05f9714b radeonsi: bump SI_NUM_SHADER_BUFFERS to 32
Some app uses more than 8 SSBOs (https://gitlab.freedesktop.org/mesa/mesa/-/issues/2946),
so increase SI_NUM_SHADER_BUFFERS to 32 (which allows 16 SSBOs).

Since we're now using a 64 bits number to track buffers, we could bump
SI_NUM_SHADER_BUFFERS to 48 but that would conflict with Mesa's
MAX_COMBINED_ATOMIC_BUFFERS limit (= 90).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2122
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5632>
2020-06-30 09:23:14 +02:00
Timothy Arceri
7e8cfc0add glsl: remove stale FIXME
This is no longer an issue, was likely fixed years ago.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5657>
2020-06-30 01:56:36 +00:00
Timothy Arceri
64a2500a69 st/glsl_to_nir: disable st_nir_lower_builtin() when packing supported
There is no need to lower builtins when uniform packing is
supported by the driver. Lowering is only required by other drivers
because we prepack builtin uniforms.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3140
CC: <stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5656>
2020-06-30 01:29:43 +00:00
Timothy Arceri
4cca5137ae glsl: define gl_LightSource members in ARB_vertex_program order
GLSL shares functionality with ARB_vertex_program but the GLSL
spec defines the gl_LightSource builtin with a member order that
is different from the packing expected in ARB_vertex_program.
This difference introduces a need for specialist lowering code
when handling builtin structs that is not required for normal
uniform structs due to member location mismatches.

Since gl_LightSource can't be redefined it shouldn't matter if
we add the members in the order listed in the spec, just so long
as we add them all. So here we rearrange the definition of the
glsl builtin to reflex our internal layout and that of
ARB_vertex_program. This required for the following patch.

CC: <stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5656>
2020-06-30 01:29:43 +00:00
Timothy Arceri
5ddab654d9 mesa: add _mesa_program_state_value_size() helper
This allows us to query the uniform size required to store the
state value.

CC: <stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5656>
2020-06-30 01:29:43 +00:00
Timothy Arceri
0e7b1a6b1a mesa: remove _mesa prefix from static function
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5656>
2020-06-30 01:29:42 +00:00
Mike Blumenkrantz
849227d70f zink: set lower_uadd_carry in nir options
fixes a bunch of mulextended piglit tests

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5685>
2020-06-29 16:03:51 -04:00
Michel Dänzer
d7d7687829 loader/dri3: Check for window destruction in dri3_wait_for_event_locked
If the underlying X11 window gets destroyed, the event we're waiting
for may never be delivered, in which case xcb_wait_for_special_event
would hang indefinitely.

Solution:

1. Use xcb_poll_for_special_event to check if an event has arrived yet.
2. If not, Wait up to ~1s for XCB's file descriptor to become readable;
   if it does, go back to step 1.
3. If the file descriptor didn't become readable, make a round-trip to
   the X server to check that the window still exists. Go back to step
   1 if it does, otherwise bail.

Also add an early bail-out when it's known that the window was
destroyed.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/116
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5368>
2020-06-29 17:05:52 +00:00
Michel Dänzer
7c226116c6 loader/dri3: Use dri3_wait_for_event_locked in loader_dri3_wait_for_msc
Before, if one thread ended up waiting in dri3_wait_for_event_locked
and another one in loader_dri3_wait_for_msc at the same time, one thread
could end up processing an event the other thread was waiting for, which
could result in the latter thread waiting longer than necessary
(possibly indefinitely).

Noticed by inspection.

v2:
* Drop xcb_flush call from loader_dri3_wait_for_msc in favour of the one
  in dri3_wait_for_event_locked (Kenneth Graunke)

Fixes: 7b0e8264dd "loader/dri3: Try to make sure we only process our
                     own NotifyMSC events"

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5368>
2020-06-29 17:05:52 +00:00
Michel Dänzer
ee77951714 loader/dri3: Add dri3_wait_for_event_locked full_sequence out parameter
Preparation for the next commit, no functional change intended.

Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5368>
2020-06-29 17:05:52 +00:00
Eric Anholt
08c39a8a29 v3d: Fix -Wmaybe-uninitialized compiler warning in the v33 code.
We weren't initializing the VCM bits in the !gs path, but v33 doesn't have
GS so we can just mark it unreachable.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>
2020-06-29 09:07:23 -07:00
Eric Anholt
f55a308c75 v3d: Enable PIPE_CAP_TGSI_TEXCOORD.
Dave wants to drop the !TEXCOORD path from NIR, and it's easy enough to
do.  Untested.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>
2020-06-29 09:07:21 -07:00
Eric Anholt
a60e8dfdc5 vc4: Enable PIPE_CAP_TGSI_TEXCOORD.
Dave wants to drop the !TEXCOORD path from NIR, and it's easy enough to
do.  Untested.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>
2020-06-29 09:07:19 -07:00
Eric Anholt
64cb81a3a4 gallium/util: Add a helper function for point sprite handling.
Many drivers will need to do the same thing here, so consolidate it.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>
2020-06-29 09:07:17 -07:00
Jonathan Marek
622c548967 turnip: enable depthBiasClamp
Passes at least dEQP-VK.dynamic_state.rs_state.depth_bias_clamp

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5678>
2020-06-29 13:08:51 +00:00
Jonathan Marek
0ed100ea49 turnip: enable largePoints
Passes dEQP-VK.rasterization.primitive_size.points.point_size_*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5678>
2020-06-29 13:08:51 +00:00
Jonathan Marek
cb10edd544 freedreno/regs: add extra bits for UBWC array pitch
This is not completely tested, but matches the max array pitch allowed by
A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH.

Note this still doesn't allow all image sizes, but it allows 16384x16384
cpp=4 images to work.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5678>
2020-06-29 13:08:51 +00:00
Satyajit Sahu
c425ca5566 frontends/va: Handle dynamic resolution/SVC for VP9
VP9 allows frame to use another resolution frame as reference
frames so updating the resolution for decoder when there is a
resolution change.

Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5646>
2020-06-29 12:52:40 +00:00
Iago Toral Quiroga
653dff949e v3d/compiler: fix spill offset
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Fixes: 97566efe5c ("v3d: Rematerialize MOVs of uniforms instead of spilling them.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5664>
2020-06-29 14:21:25 +02:00
Samuel Pitoiset
7a5e6fd25f radv: add support for MRTs compaction to avoid holes
SPI_SHADER_COL_FORMAT allocates export memory and CB_SHADER_MASK
map them to higher MRTs if necessary. The hardware allows to remap
MRTs to avoid holes somehow.

For example, if we have a scenario where MRT0 is unused and only
MRT1 and MRT2 are used, SPI_SHADER_COL_FORMAT is 0x77 and
CB_SHADER_MASK/CB_TARGET_MASK are 0x770 (this assumes
SPI_SHADER_UINT16_ABGR is set).

This allows us to remove one workaround that was added for fixing
GPU hangs with DXVK. I think this is because SPI_SHADER_COL_FORMAT
expects contiguous MRTs to be allocated.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>
2020-06-29 08:43:14 +00:00
Samuel Pitoiset
4e0dcbb880 radv: use SPI_SHADER_ZERO for non-written color attachments
When colorWriteMask is 0 we can assume that this color attachment
is unused.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>
2020-06-29 08:43:14 +00:00
Samuel Pitoiset
18b42eebd5 radv: rework 8/16-bit color attachment formats detection
To prepare for MRTs compaction.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>
2020-06-29 08:43:14 +00:00
Samuel Pitoiset
76ee45d3a8 radv: adjust CB_SHADER_MASK for dual-source blending in the shader info pass
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>
2020-06-29 08:43:14 +00:00
Samuel Pitoiset
26a48d8d35 radv: enable VK_AMD_shader_ballot on GFX6-7 with both compiler backends
It gives +1-2 FPS with Doom Eternal on Pitcairn.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5659>
2020-06-29 07:40:05 +00:00
Boris Brezillon
cff418cc4c nir: Add new rules to optimize NOOP pack/unpack pairs
nir_load_store_vectorize_test.ssbo_load_adjacent_32_32_64_64 expectations
need to be fixed accordingly.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5589>
2020-06-29 09:18:26 +02:00
Dave Airlie
237d728418 gallivm/nir: fix const loading on big endian systems
The code was expecting the lower 32-bits of the 64-bit to be
what it wanted, don't be implicit, pull the value from the union.

This should fix rendering on big endian systems since NIR was
introduced.

Fixes: 44a6b0107b ("gallivm: add nir->llvm translation (v2)")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5677>
2020-06-29 08:51:18 +10:00
Jonathan Marek
7d31bc9a34 freedreno/ir3: fix resinfo wrmask
resinfo always writes 3 components, which was not being taken into account

Fixes these tests:
dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_3
dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_7

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5674>
2020-06-28 16:32:08 +00:00
Erik Faye-Lund
b1c16e5251 docs: use ref-links for internal references
Ref-link have two benefits over generic links:

1. They produce the right result for non-HTML outputs
2. They get validated at build-time

So let's use them for internal references instead.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5671>
2020-06-28 09:06:57 +00:00
Erik Faye-Lund
5ee55b206a docs: fix internal references
It seems last time I tried to fix these, I missed a few spots. So let's
try to get things right this time.

Fixes: 429ff05491 ("docs/relnotes: update internal references")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5671>
2020-06-28 09:06:57 +00:00
Erik Faye-Lund
1d250bf291 docs: restore accidentally dropped labels
These were accidentally dropped when cleaning up the TOC, making links to
them dead. Because we used plain links, sphinx didn't inform us that
these became dead. Let's restore them.

Fixes: 14f2a81b6f ("docs: drop open-coded toc for articles")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5671>
2020-06-28 09:06:57 +00:00
Erik Faye-Lund
05e61a9157 docs: remove non-existent reference
The section referenced here was removed a while ago, but it was always
empty anyway. Let's just remove it instead of trying to fix it up.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5671>
2020-06-28 09:06:57 +00:00
Bas Nieuwenhuizen
3b74e6fa28 meson: Do not require shader cache for radv.
We fixed the compile error a while ago.

Fixes: cc10b34e9e "util/disk_cache: Fix disk_cache_get_function_timestamp with disabled cache."
Reviewed-by: Drew Davenport <ddavenport@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5649>
2020-06-28 01:10:45 +00:00
Vinson Lee
c0c03f4772 rbug: Fix rbug_delete_vs_state lock acquisition.
Fix warning reported by Coverity Scan.

Double unlock (LOCK)
double_unlock: mtx_unlock unlocks rb_pipe->call_mutex while it is
unlocked.

Fixes: 07838ff990 ("rbug: Use the call mutex")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3023
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jakob Bornecrantz <jakob@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5196>
2020-06-27 00:21:27 +00:00
Alejandro Piñeiro
583d7d3d8d v3d: moving v3d simulator to src/broadcom
So it could be used by both the OpenGL and the Vulkan driver.

In addition to the move, some small changes were needed to be made on
the API. For example, the simulator was receiving v3d_screen on
initialization, and that code setted v3d_screen->sim_file. Now it
returns the new sim_file created.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5666>
2020-06-27 00:06:58 +00:00
Kristian H. Kristensen
4fccbd0ea6 turnip: Put VK_KHR_external_fence_fd stubs back
tu_ImportFenceFdKHR is used by tu_AcquireImageANDROID, which may or
may not work, but let's at least keep things compiling until somebody
has time to tie up the loose ends on the Android side.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5670>
2020-06-26 16:29:15 -07:00
Kenneth Graunke
39f06e2848 iris: Implement pipe->texture_subdata directly
Chris Wilson noted that u_default_texture_subdata's transfer path
sometimes results in wasteful double copies.  This patch is based
on an earlier path he wrote, but updated now that we have staging
blits for busy or compressed textures.

Consider the case of idle, non-CCS-compressed, tiled images:

The transfer-based CPU path has to return a "linear" mapping, so upon
map, it mallocs a temporary buffer.  u_default_texture_subdata then
copies the client memory to this malloc'd buffer, and transfer unmap
performs a tiled_memcpy to copy it back into the texture.  By writing
a direct texture_subdata() implementation, we're able to directly do
a tiled_memcpy from the client memory into the destination texture,
resulting in only one copy.

For linear buffers, there is no advantage to doing things directly, so
we simply fall back to u_default_texture_subdata()'s transfer path to
avoid replicating those cases.

We still may want to use GPU staging buffers for busy destinations
(to avoid stalls) or CCS-compressed images (to compress the data),
at which point we also fall back to the existing path.  We thought
to try and use a tiled temporary, but this didn't appear to help.

Improves performance in x11perf -shmput500 by 1.96x on my Icelake.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2500
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3818>
2020-06-26 21:20:41 +00:00
Eric Anholt
34630fe081 turnip: Properly return VK_DEVICE_LOST on queuesubmit failures.
The device lost support closely matches the anv code for the same.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>
2020-06-26 19:34:17 +00:00
Eric Anholt
487576e3cf turnip: Fix error handling of DRM_MSM_GEM_INFO ioctls.
drmCommandWriteRead gives us a -errno, and we only checked for -1 (-EPERM,
incidentally).  All the callers wanted 0 for errors, which they were
getting by the fact that req.value was 0-initialized in our stack
allocation (though this only works as long as the kernel doesn't return an
error after setting req.value to something), and -EPERM not really being
an answer we would expect from an ioctl at this stage in the driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>
2020-06-26 19:34:17 +00:00
Eric Anholt
e67c2e1c96 turnip: Do better TU_DEBUG=startup logging of drmGetDevices2() failure.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>
2020-06-26 19:34:17 +00:00
Bas Nieuwenhuizen
aba8c579a9 turnip: semaphore support.
There is only one queue for now, so for non-shared semaphores, the
implementation is basically a no-op. For shared semaphores, this
always uses syncobjs. This depends on syncobj support in the msm
kernel driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>
2020-06-26 19:34:17 +00:00
Eric Anholt
6283da34a9 ci/baremetal: Bump the kernel to a recent drm-msm-fixes for msm semaphores.
We need this to test the new VK feature we're about to land.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>
2020-06-26 19:34:17 +00:00
Daniel Schürmann
5c0f82b0d7 aco: fix partial copies on GFX6/7
While we don't allow partial subdword copies,
we still need to be able to split 64bit registers

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5663>
2020-06-26 19:21:57 +00:00
Lepton Wu
66482303f6 mapi: x86: Fix dynamic entries in x86 tsd stubs.
We need to update dynamic entries related code after updating
asm stubs.

Fixes: 45206d7673 ("mapi: Adapted libglvnd x86 tsd changes")
Signed-off-by: Lepton Wu <lepton@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5598>
2020-06-26 18:28:01 +00:00
Eric Anholt
63805ccd3f ci/bare-metal: Fail early when we get stuck powering on a cheza.
I think I've seen about 3 of this error total so far, but waiting 60
minutes for the scripts to give up wastes marge time.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5651>
2020-06-26 16:54:07 +00:00
Rob Clark
189a0fecf5 freedreno/ir3: move nir finalization to after cache miss
In cases where every variant is a shader-cache-hit, we never need the
post-finalize round of nir opt/lowering passes.  So defer this until
the first shader-cache-miss to avoid doing pointless work.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
2020-06-26 08:55:21 -07:00
Rob Clark
f97acb4bb4 freedreno/ir3: disk-cache support
Adds a shader disk-cache for ir3 shader variants.  Note that builds with
`-Dshader-cache=false` have no-op stubs with `disk_cache_create()` that
returns NULL.

Binning pass variants are serialized together with their draw-pass
counterparts, due to shared const-state.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
2020-06-26 08:55:19 -07:00
Rob Clark
6aadb00e60 freedreno/ir3: build binning variant at same time as draw variant
For shader-cache, we are going to want to serialize them together.
Which is awkward if the two related variants are not compiled together.

This also decouples allocation and compile, which will simplify adding
shader-cache (which still needs to allocate, but can skip compile).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
2020-06-26 08:53:02 -07:00
Rob Clark
83b97bf161 freedreno/a6xx+ir3: stop generating pointless binning shaders
Currently we always do sysmem if there is tess.  And for GS, the binning
pass VS ends up identical to the draw pass VS, so no point in compiling
it twice.  (For GS what we should do someday is generate a binning pass
GS, and possibly if we can do cross-stage linking opts, an optimized
binning pass VS, but the required outputs would somehow have to end up
in the shader variant key.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
2020-06-26 08:53:00 -07:00
Rob Clark
fdbe1ffaf7 freedreno/ir3: shuffle some variant fields
Just to group together the parts that will get serialized when we have
shader disk-cache.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
2020-06-26 08:43:23 -07:00
Rob Clark
c0f22c3d94 freedreno/ir3: add ir3_compiler_destroy()
Use ir3_compiler_destroy() rather than open-coding ralloc_free().  This
will give us a place to add more compiler related cleanup code in the
following patches.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
2020-06-26 08:43:23 -07:00
Rob Clark
f1ab57359c freedreno/ir3: move finalize_nir to pscreen hook
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
2020-06-26 08:43:22 -07:00
Rob Clark
d3ae559378 freedreno/ir3: add ir3_finalize_nir()
The next step is to hook this into pscreen->finalize_nir() so it can
come before the state tracker's shader-caching.

Unfortunately we still need to do lower_io after mesa/st, so that is
split out into a post-finalize pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
2020-06-26 08:43:22 -07:00
Mike Blumenkrantz
e35b8971a7 zink: use OpFUnordNotEqual for nir_op_fne
we want to detect NaNs here, and OpFUnordNotEqual is the variant which does this

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
2020-06-26 14:07:35 +00:00
Mike Blumenkrantz
765de33d3c zink: set lower_mul_high and lower_rotate in ntv compiler options
we don't implement these

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
2020-06-26 14:07:35 +00:00
Mike Blumenkrantz
49c13fccf7 zink: handle isign alu in ntv
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
2020-06-26 14:07:35 +00:00
Mike Blumenkrantz
21fe5b0ffd zink: handle ixor in ntv
fixes spec@glsl-1.30@execution@built-in-functions@fs-op-assign-bitxor tests

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
2020-06-26 14:07:35 +00:00
Mike Blumenkrantz
651d093298 zink: lower byte/word extract ops in nir
we don't implement these, and pre-optimizing them breaks things in ntv->vtn

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
2020-06-26 14:07:35 +00:00
Mike Blumenkrantz
90d3455848 zink: add bitfield_reverse handling to ntv
fixes several piglit tests

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
2020-06-26 14:07:35 +00:00
Mike Blumenkrantz
957d8e2658 zink: add ult handling for ntv
fixes shaders@glsl-vs-absolutedifference-uint piglit test

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
2020-06-26 14:07:35 +00:00
Mike Blumenkrantz
2159aa0c49 zink: handle signed and unsigned min/max ops in ntv
fixes a number of piglit amd_shader_trinary_minmax tests

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
2020-06-26 14:07:35 +00:00
Samuel Pitoiset
f13d79f519 radv: remove the load/store workaround for Monster Hunter World with LLVM
Now that ACO is default, this is pointless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5658>
2020-06-26 14:42:44 +02:00
Samuel Pitoiset
a30ad8cb23 radv: remove the shader ballot workaround for Youngblood with LLVM
Now that ACO is default, this is now pointless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5658>
2020-06-26 14:42:42 +02:00
Erik Faye-Lund
099916384a docs: update favicon
I created a new and cleaner favicon for mesa3d.org, and it seems like a
good idea to use that one for the docs as well.

While we're at it, replace the original PNG with the original SVG asset
the ICO-file was generated from.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5643>
2020-06-26 12:09:22 +00:00
Jonathan Marek
2fbc12a0ac turnip: fix huge scissor min/max case
Now that tu_cs_emit_regs is used for the scissor, it hits an assert when
the scissor is too large. Fixes this dEQP test:

dEQP-VK.draw.scissor.static_scissor_max_int32

Fixes: 9c0ae5704d ("turnip: fix empty scissor case")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5655>
2020-06-26 11:34:49 +00:00
Jonathan Marek
1854eeefde turnip: fix VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_FEATURES
My attempt to be clever here backfired, it overwrites the pNext and stops
the loop (causing deqp to fail to query extension features after that).

Fixes: 62de79ac44 ("turnip: implement VK_KHR_shader_draw_parameters")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5654>
2020-06-26 11:11:29 +00:00
Icecream95
6b886fbc0b panfrost: Add PAN_MESA_DEBUG=gl3 flag
This flag allows forcing GL 3.3 without having to use
MESA_GL_VERSION_OVERRIDE etc.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5584>
2020-06-26 10:30:03 +00:00
Connor Abbott
1288613f1c freedreno/a6xx: use firstIndex field
Analogous to the turnip change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>
2020-06-26 10:05:24 +00:00
Connor Abbott
ba5e1c5310 tu: Pass firstIndex directly to CP_DRAW_INDX_OFFSET
Saves some minor overhead, cleans things up a bit, and removes one more
unknown. We now program the internal registers in the same way between
direct/indirect draws.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>
2020-06-26 10:05:24 +00:00
Connor Abbott
259d07a2ff freedreno/registers: Label firstIndex field in CP_DRAW_INDX_OFFSET
Based on comparing the implementations of CP_DRAW_INDX_OFFSET and
CP_DRAW_INDIRECT, this is what this field is for.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>
2020-06-26 10:05:24 +00:00
Connor Abbott
a32fb2f9d0 freedreno: On a5xx+ INDX_SIZE is MAX_INDICES
This was already done correctly for the indirect variants, and turnip
was setting the correct value, but it seems freedreno missed the change
in the non-indirect variant. Also, fix a misspelling of "indices" and
add a type to INDX_SIZE.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>
2020-06-26 10:05:24 +00:00
Connor Abbott
1dd24bf27b freedreno: Share constlen between different stages properly
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
2020-06-26 09:34:33 +00:00
Connor Abbott
d9dd989d2a freedreno: Refactor ir3_cache shader compilation
Use an array, which makes it more like turnip and makes implementing the
const limits easier.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
2020-06-26 09:34:33 +00:00
Connor Abbott
8ad65609da tu: Share constlen between different stages properly
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
2020-06-26 09:34:33 +00:00
Connor Abbott
48b1602b50 ir3: Add ir3_trim_constlen()
This provides the policy for how to handle reducing constlen for some
stages.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
2020-06-26 09:34:33 +00:00
Connor Abbott
9edff0cfd4 ir3: Support variants with different constlen's
This provides the mechanism for compiling variants with a reduced
constlen. The next patch provides the policy for choosing which to
reduce.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
2020-06-26 09:34:33 +00:00
Connor Abbott
4554b946c3 ir3: Include ir3_compiler from ir3_shader
I wanted to access the ir3_compiler from a small helper inside
ir3_shader.h, which currently isn't possible.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
2020-06-26 09:34:33 +00:00
Connor Abbott
2841bb1fac ir3, freedreno: Round up constlen earlier
Prevents problems when calculating whether we overflow the shared limit.
Note that on a6xx, the macros handle the assert for us.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
2020-06-26 09:34:33 +00:00
Iago Toral Quiroga
4845f184d7 v3d/compiler: don't rewrite unused temporaries to point to NOP register
This was assuming that unused temporaries are written but never read,
since the NOP register can only be used as a destination register,
but we can end up here also for temporaries that are read once but
never written.

This was found with a graphicsfuzz test that has a switch with
cases that have unreachable discards. In that test, NIR genrates
code like this:

decl_reg vec3 32 r19
...
r20 = mov r19.z
r21 = mov r19.y
r22 = mov r19.x

Where r19.xyz would generate 3 temporary registers that are read but
never written, so we would rewrite them to point to the NOP register
as QPU instruction sources, which is not allowed and would hit an
assert that expect magic reads to be from [r0,r5] only.

Fixes:
dEQP-VK.graphicsfuzz.unreachable-switch-case-with-discards

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5645>
2020-06-26 08:57:32 +00:00
Neil Roberts
3b1c511b09 v3d: Use stvpmd for non-uniform offsets in GS
The offset for the VPM write for storing outputs from the geometry
shader isn’t necessarily uniform across all the lanes. This can happen
if some of the lanes don’t emit some of the vertices. In that case the
offset for the subsequent vertices will be different in each lane. In
that case we need to use the stvpmd instruction instead of stvpmv
because it will scatter the values out.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3150

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5621>
2020-06-26 09:36:15 +02:00
Neil Roberts
dab8a9169c v3d: Add missing macro for stvpmd instruction
stvpmd is like stvpmv but it scatters the output. It can be used with
non-dynamically uniform offsets.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5621>
2020-06-26 09:36:15 +02:00
Marek Olšák
71794567f9 radeonsi: remove tabs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Marek Olšák
0cdec11d95 radeonsi: clear per-context buffers at the end of si_create_context
We don't want any packets before CONTEXT_CONTROL.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Marek Olšák
da78d50bc8 radeonsi: make si_pm4_cmd_begin/end static and simplify all usages
There is no longer the confusing trailing si_pm4_cmd_end call.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Marek Olšák
7b2a0f880b radeonsi: disallow adding BOs into si_pm4_state except 1 shader BO per state
The si_shader pointer is already there, so use it and remove the array
of BOs.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Marek Olšák
3b1e42d2c2 radeonsi: make wait_mem_scratch unmappable
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Marek Olšák
428360662f radeonsi: don't add the tess ring buffers into the cs_preamble state
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Marek Olšák
1c1d34a67a radeonsi: rename init_config states to cs_preamble states
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Marek Olšák
bbc0a2d51d radeonsi: don't add the border color buffer into the init_config state
We might have to replace init_config for preemption.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Marek Olšák
c7680625c3 ac,winsys/amdgpu: align IBs the same as the kernel
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Marek Olšák
556f4458fe amd: add proper definitions for NOP packets
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Samuel Pitoiset
276e6d7bbc gitlab-ci: attach the Fossilize log file as artifact on failure
It might be help.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5627>
2020-06-26 06:45:23 +00:00
Samuel Pitoiset
4954df417c gitlab-ci: append Fossilize stdout/stderr to a file to reduce spam
Fossilize is really verbose and it's easy to reach the buffer
limit in GitLab CI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5627>
2020-06-26 06:45:23 +00:00
Samuel Pitoiset
b24b415013 gitlab-ci: set the number of Fossilize threads to 4
The shared runners are set up for concurrent jobs ~= CPUs / 4 (x86)
or 8 (ARM).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5627>
2020-06-26 06:45:23 +00:00
Icecream95
be5d06106f panfrost: Only copy resources when they are in a pending batch
Fixes a performance regression in alacritty, and rendering is still
fine in GLQuake ports.

Fixes: 361fb38662 ("panfrost: Copy resources when mapping to avoid waiting for readers")
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5642>
2020-06-26 06:32:34 +00:00
Rafael Antognolli
66df2ffa36 anv: Align "used" attribute to 64 bits.
This is a 64 bits value that might not be aligned on 32 bit plaforms.
Since it's used with atomics, let's make sure it gets properly aligned
to avoid any potential performance loss.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5637>
2020-06-25 22:11:36 -07:00
Rafael Antognolli
293221ddda iris: Align last_seqnos to 64 bits.
last_seqnos is used in atomic operations. Specially on 32 bit platorms,
it tends to be slower if it's not aligned to 64 bits (see
cdc331c6f9). This fixes a small regression
on Bioshock.

Fixes: aba3aed96e ("iris: fix export of GEM handles")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5637>
2020-06-25 22:11:08 -07:00
Eric Anholt
2fd746e98e ci: Remove a stray "always" on the freedreno traces job.
This was making it so that the CI would error if the set of files modified
or the pipeline involvd meant the jobs we depend on weren't enabled.  It
was just some misplaced debug leftovers of mine.

Fixes: b88c46fa11 ("ci: Add a freedreno a630 tracie run.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5653>
2020-06-25 23:45:48 +00:00
Eric Anholt
50e20cb036 freedreno/a6xx: Add support for polygon fill mode (as long as front==back).
Unlike a4xx, we don't seem to have separate back vs front fields any more.
Still, this improves desktop GL conformance (and one of the traces in
traces-db).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5650>
2020-06-25 13:46:30 -07:00
Eric Anholt
72c0522db2 turnip: Add support for polygon fill modes.
Passes the new tests in dEQP-VK.rasterization.culling.*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5650>
2020-06-25 13:46:30 -07:00
Eric Anholt
daee177ca0 freedreno/a6xx: Define the register fields for polygon fill mode.
Produced by comparing the traces of:
dEQP-VK.rasterization.culling.front_triangles
dEQP-VK.rasterization.culling.front_triangles_point
dEQP-VK.rasterization.culling.front_triangles_line

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5650>
2020-06-25 13:46:28 -07:00
Eric Anholt
b88c46fa11 ci: Add a freedreno a630 tracie run.
This job runs in about one minute on the current set of traces, and has
successfully revealed some bugs in our current rendering.  Takes about 7
minutes currently.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>
2020-06-25 17:33:28 +00:00
Eric Anholt
b5f727afeb ci/tracie: Fix apitrace dump using "less" which isn't in the ARM rootfs.
You would get no output during the "find the last frame" step of the trace
replay.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>
2020-06-25 17:33:28 +00:00
Eric Anholt
9f1412cf3e ci/tracie: Print the path if the trace isn't found.
I hit this a few times while setting up CI.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>
2020-06-25 17:33:28 +00:00
Rohan Garg
7406d627c8 ci: Include trace replay support in ARM rootfses.
Builds the renderdoc and apitrace programs so we can replay GL traces on
DUTs.

[Separated out from 5472's commit that also enabled the jobs in LAVA,
dropped unnecessary python packages from arm_build, fixed up arm64_test
build, traces-db in baremetal, new commit message by anholt]

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>
2020-06-25 17:33:28 +00:00
Eric Anholt
acf9d8b75d ci/bare-metal: Don't include dev packages in arm*test.
We just need these to build our rootfs, clean them out afterwards.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>
2020-06-25 17:33:28 +00:00
Eric Anholt
9079b53987 ci/bare-metal: Skip setting of unset variables at startup.
It's silly to be setting (and logging the setting of!) all the env vars we
*didn't* set in a job.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>
2020-06-25 17:33:28 +00:00
Tomeu Vizoso
21b2dac793 ci: Move ARM rootfses to stable
We build in Debian buster but were currently testing in bullseye-based
ramdisks. This has started being a problem since Python 3.7 was removed
from bullseye.

[ Also bumped arm_test containers, by anholt ]

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>
2020-06-25 17:33:28 +00:00
Tomeu Vizoso
a04672a105 ci: Don't call renderdoc's ReplayController.Shutdown()
If we do, Renderdoc will call eglDestroyContext twice, causing crashes
within Mesa.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>
2020-06-25 17:33:28 +00:00
Jonathan Marek
62de79ac44 turnip: implement VK_KHR_shader_draw_parameters
Note: going by the blob, VFD_INDEX_OFFSET/FD_INSTANCE_START_OFFSET seem
completely unused by indirect draws, so this changes them to only be set
for non-indirect draws (and moves them to the vs_params draw state).

Passes dEQP-VK.draw.shader_draw_parameters.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5635>
2020-06-25 15:57:45 +00:00
Jonathan Marek
16a9e233da freedreno/ir3: add support for load_draw_id
This is part of adding VK_KHR_shader_draw_parameters for turnip.

IR3_DP_VTXID_BASE/IR3_DP_VTXCNT_MAX offsets are changed to match what
CP_DRAW_INDIRECT_MULTI requires.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5635>
2020-06-25 15:57:45 +00:00
Jonathan Marek
01799b3448 freedreno/registers: add CP_DRAW_INDIRECT_MULTI
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5635>
2020-06-25 15:57:45 +00:00
Samuel Pitoiset
7e98f2534c gitlab-ci: add a list of expected failures for RADV/ACO on NAVI14
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5647>
2020-06-25 14:15:49 +00:00
Daniel Schürmann
63e1e7209c radv: enable ACO by default
No more dragons have been seen, caution is still required...

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5445>
2020-06-25 15:16:30 +02:00
Daniel Schürmann
db0afb3800 radv: change use_aco -> use_llvm
We are about to make ACO the default backend.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5445>
2020-06-25 15:16:28 +02:00
Daniel Schürmann
b78f64507e radv: introduce RADV_DEBUG=llvm option
This option enables the LLVM compiler backend to be used
for shader compilation

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5445>
2020-06-25 15:16:23 +02:00
Mike Blumenkrantz
37e7a5e746 zink: unify code for setting resource barriers
no functional changes, this code was just duplicated

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5615>
2020-06-25 12:50:21 +00:00
Samuel Pitoiset
a102896cff radv: lower 64-bit dfloor on GFX6 for fixing precision issues
GFX6 doesn't support v_floor_f64 and the precision of v_fract_f64
which is used to implement 64-bit floor is less than what Vulkan
requires.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5609>
2020-06-25 12:09:08 +00:00
Samuel Pitoiset
c84f11e7b6 radv: lower 64-bit drcp/dsqrt/drsq for fixing precision issues
The hardware precision of v_rcp_f64, v_sqrt_f64 and v_rsq_f64
is less than what Vulkan requires.

This lowers using the Goldschmidt's algorithm to improve precision.

Fixes dEQP-VK.glsl.builtin.precision_double.* on both compiler
backends.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5609>
2020-06-25 12:09:08 +00:00
Danylo Piliaiev
82b4666783 iris: Honor scanout requirement from DRI
Translate PIPE_BIND_SCANOUT as ISL_SURF_USAGE_DISPLAY_BIT,
instead of PIPE_BIND_DISPLAY_TARGET.

PIPE_BIND_DISPLAY_TARGET isn't used for dri images and seem to
be set only for fake winsys buffers (which aren't displayed).
The trouble is that a fake buffer could be multisampled and we
cannot have multisampled surface with display bit.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2313
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4784>
2020-06-25 11:50:10 +00:00
Pavel Asyutchenko
ec7b55f4cc vulkan/overlay: fix crash on destroying NULL swapchain
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5616>
2020-06-25 10:31:50 +00:00
Samuel Pitoiset
8c962f5f61 gitlab-ci: add parallel-rdp fossils
https://github.com/Themaister/parallel-rdp

These fossils contain very large and complex shaders.
The small_*.foz files use 8/16-bit arithmetic.

Only RADV uses Fossilize.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5542>
2020-06-25 08:03:09 +02:00
Rob Clark
6da0647987 freedreno/ir3/ra: fix pre-color edge case
Fixes a case where you have something like:

   aVecOutput.z = aScalarInput;

In particular, skipping over things that are not the first component is
wrong.. in the above case the input we need to precolor is the 3rd
component.  But we need to adjust the target register according to the
offset.

Fixes android.hardware.nativehardware.cts.AHardwareBufferNativeTests

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5601>
2020-06-25 04:40:40 +00:00
Jonathan Marek
c5b990f435 turnip: disable early_z for VK_FORMAT_S8_UINT
This format doesn't have depth, and apparently having earlyz enabled can
cause issues. Fixes at least these tests:

dEQP-VK.renderpass.suballocation.multisample.s8_uint.samples_*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5586>
2020-06-25 03:02:56 +00:00
Jonathan Marek
04148f4411 turnip: fix update_stencil_mask
The previous value was not being cleared, resulting in some dynamic stencil
state failures. Fixes these two tests:

dEQP-VK.dynamic_state.ds_state.stencil_params_advanced
dEQP-VK.dynamic_state.ds_state.stencil_params_basic_1

Fixes: 233610f8cf ("turnip: refactor draw states and dynamic states")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5586>
2020-06-25 03:02:56 +00:00
Jonathan Marek
9c0ae5704d turnip: fix empty scissor case
Fixes these two tests:
dEQP-VK.draw.scissor.empty_dynamic_scissor_first_draw
dEQP-VK.draw.scissor.empty_static_scissor

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5586>
2020-06-25 03:02:56 +00:00
Rob Clark
7c008c293d freedreno: handle batch flush in resource tracking
In rare cases, we can get into situations where the tracking of read/
written resources triggers a flush of the current batch.

To handle that, (1) take a reference to the current batch, so it doesn't
disappear under us, and (2) check after resource tracking whether the
current batch was flushed.  If it is, we have to re-do the resource
tracking, but since we have a fresh batch, it should not get flushed the
second time around.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3160
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5634>
2020-06-25 00:55:24 +00:00
Rob Clark
16b4da3ba3 freedreno: split out batch clear tracking helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5634>
2020-06-25 00:55:24 +00:00
Rob Clark
ad136945e6 freedreno: split out batch draw tracking helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5634>
2020-06-25 00:55:24 +00:00
Rob Clark
d74554b167 freedreno: make foreach_bit() declare it's cursor
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5634>
2020-06-25 00:55:24 +00:00
Jonathan Marek
1fd2bc10dc turnip: implement VK_EXT_vertex_attribute_divisor
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5640>
2020-06-25 00:10:11 +00:00
Eric Engestrom
8018b4b707 docs: fix 20.1.2 relnotes
I manually converted them from html and didn't double-check the
result...

Fixes: e94f81e9df ("docs: Add release notes for 20.1.2")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5639>
2020-06-25 01:49:46 +02:00
Eric Engestrom
804c6ee0df docs: update calendar and link releases notes for 20.1.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5638>
2020-06-24 23:07:07 +00:00
Eric Engestrom
e94f81e9df docs: Add release notes for 20.1.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5638>
2020-06-24 23:07:07 +00:00
Rob Clark
3065c4bf92 freedreno/ir3: switch PIPE_CAP_TGSI_TEXCOORD
We don't really need the varying remapping, and it seems to somehow
happen twice when shader-cache comes into the picture.  But we can
just choose not to have this problem.

Now that everything is using the ir3_point_sprite() helper, we can
flip this pipe cap without it being a massive flag-day.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
2020-06-24 22:29:28 +00:00
Rob Clark
e6d650353a freedreno: convert builtin blit VS prog to ureg builder
The correct varying semantic to use depends on PIPE_CAP_TGSI_TEXCOORD.
To handle this transition switch it over to ureg builder, and query the
pipe-cap to choose the appropriate semantic.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
2020-06-24 22:29:28 +00:00
Rob Clark
b5574c5165 freedreno/a3xx: use point-coord helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
2020-06-24 22:29:28 +00:00
Rob Clark
ba6e1514f5 freedreno/a4xx: use point-coord helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
2020-06-24 22:29:28 +00:00
Rob Clark
3e8c6312c7 freedreno/a5xx: use point-coord helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
2020-06-24 22:29:28 +00:00
Rob Clark
a474d48e17 freedreno/a6xx: use point-coord helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
2020-06-24 22:29:28 +00:00
Rob Clark
68d6aa3dd0 freedreno/a6xx: de-duplicate vinterp/vpsrepl state building
When we flip the texcoord patch, we'll setup PNTC input slot in the
pre-built interp stateobj, rather than this being a draw-time (slow-
path) built stateobj.  But rather than duplicate more of the slow-
path logic, refactor it out into a helper that is reused in both
cases.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
2020-06-24 22:29:28 +00:00
Rob Clark
022c363cfb freedreno/ir3: add helper to determine point-coord inputs
This will simplify a bit the logic for setting up vinterp/vprepl in the
driver backend, and also avoid it being a flag-day when we switch the
texcoord pipe cap.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
2020-06-24 22:29:28 +00:00
Jonathan Marek
64c2a10707 turnip: move some logic out of create_render_pass_common
CreateRenderPass2 is the common path now, it doesn't make sense to have a
create_render_pass_common. Rename it to tu_render_pass_gmem_config and
move logic not related to gmem config out of it.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5451>
2020-06-24 22:12:33 +00:00
Jonathan Marek
c9c76f6832 turnip: use RenderPassCreateInfo for render_pass_add_implicit_deps
This gets rid of the some unnecessary values that were stored in
tu_render_pass for this. It also makes the render_pass_add_implicit_deps
more generic, with very few references to the tu_render_pass.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5451>
2020-06-24 22:12:33 +00:00
Jonathan Marek
e4099201bc turnip: replace a memset(0) with zalloc in CreateRenderPass
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5451>
2020-06-24 22:12:33 +00:00
Jonathan Marek
70046145d1 turnip: translate CreateRenderPass to CreateRenderPass2
It doesn't cut down the code size by much, and might not be the ideal for
performance (unless the compiler is unexpectedly smart), but makes it
easier to maintain (no modifying the same code in two places) and will
allow some simplifications since we wont have to worry about trying to
share code between the two versions.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5451>
2020-06-24 22:12:33 +00:00
Jonathan Marek
01e2893cba turnip: implement depthBounds
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5628>
2020-06-24 20:55:15 +00:00
Jonathan Marek
a9d866910c freedreno/registers: a6xx depth bounds test registers
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5628>
2020-06-24 20:55:15 +00:00
Rhys Perry
4fc0499049 aco: remove outdated assert in handle_operands()
"target" is no longer expected to be completely inside "swap".

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5626>
2020-06-24 20:38:35 +00:00
Rhys Perry
7cad27831d aco: ignore blocked registers when checking edges in get_reg_impl()
If the only two registers available are consecutive and used by killed
operands, both of them will be blocked and fail the edge check.

Totals from 903 (0.66% of 135946) affected shaders:
VGPRs: 30892 -> 30884 (-0.03%)
CodeSize: 1584468 -> 1584044 (-0.03%); split: -0.05%, +0.02%
MaxWaves: 14374 -> 14378 (+0.03%)
Instrs: 306482 -> 306399 (-0.03%); split: -0.06%, +0.03%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5626>
2020-06-24 20:38:35 +00:00
Samuel Pitoiset
91a82d0069 radv: fix checking the return value of cs_finalize()
cs_finalize() now returns a Vulkan error code and VK_SUCCESS is 0.

Fixes: 64a92ef7a2 ("radv/winsys: Distinguish device/host memory errors.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5629>
2020-06-24 15:50:06 +02:00
Samuel Pitoiset
86df5283a3 gitlab-ci: update the list of expected failures for Pitcairn
These tests have been fixed as part of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5625>
2020-06-24 13:09:43 +00:00
Bas Nieuwenhuizen
aa35670fd0 radv: Make radv_alloc_shader_memory static.
Just a cleanup.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5578>
2020-06-24 13:00:02 +00:00
Bas Nieuwenhuizen
64a92ef7a2 radv/winsys: Distinguish device/host memory errors.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5578>
2020-06-24 13:00:02 +00:00
Bas Nieuwenhuizen
a5cb88eea4 radv: Handle mmap failures.
Which can happen if we have to many mmaps active in the process.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5578>
2020-06-24 13:00:02 +00:00
Bas Nieuwenhuizen
04765e6a9a radv/winsys: Deal with realloc failures in BO lists.
Otherwise if realloc fails we silently try to use it. Make recording fail instead.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5578>
2020-06-24 13:00:02 +00:00
Rhys Perry
519ddfd312 aco: improve vectorization of 8/16-bit loads/stores
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:28 +00:00
Rhys Perry
ddffcf3627 aco: fix when sub-dword create_vector operand cannot be placed perfectly
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:28 +00:00
Daniel Schürmann
91fd53884d aco: don't allow partial copies on GFX6/7
These are not supported due to missing SDWA instructions

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:28 +00:00
Daniel Schürmann
76b5d72921 aco: align swap operations to 4 bytes on GFX6/7
GFX6/7 can only swap full registers

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:28 +00:00
Rhys Perry
91d7e40176 aco: don't create byte-aligned short loads
The ISA docs don't seem to say if this is allowed, so just assume short
loads require short alignment.

In practice, the only situation this should affect are byte-aligned u8vec2
loads.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:28 +00:00
Rhys Perry
c3259b6e6a aco: add missing bld.scc() in byte_align_scalar()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:28 +00:00
Rhys Perry
a0f6ca4393 aco: don't store byte-aligned short stores
The ISA docs don't seem to say if this is allowed, so just assume short
stores require short alignment.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:28 +00:00
Rhys Perry
a18da83d18 aco: fix copy+paste error in split_buffer_store
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:28 +00:00
Rhys Perry
841fdfcd45 radv/aco,aco: allow SMEM SSBO loads on GFX6/7
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:28 +00:00
Rhys Perry
35b5e1fc7c aco: allow SMEM for some sub-dword accesses
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:27 +00:00
Rhys Perry
c702f8ed15 aco: only use SMEM if we can prove it's safe
Totals from 26 (0.02% of 127638) affected shaders:
SGPRs: 1680 -> 1664 (-0.95%)
VGPRs: 1492 -> 1504 (+0.80%)
CodeSize: 233140 -> 233016 (-0.05%); split: -0.09%, +0.04%
Instrs: 47121 -> 47114 (-0.01%); split: -0.08%, +0.06%
VMEM: 4930 -> 4655 (-5.58%); split: +0.12%, -5.70%
SMEM: 2030 -> 2001 (-1.43%); split: +3.79%, -5.22%
VClause: 891 -> 947 (+6.29%)
SClause: 876 -> 816 (-6.85%)
Copies: 4734 -> 4716 (-0.38%); split: -0.40%, +0.02%
Branches: 2048 -> 2047 (-0.05%)
PreSGPRs: 1400 -> 1396 (-0.29%)
PreVGPRs: 1440 -> 1443 (+0.21%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:27 +00:00
Rhys Perry
0cfee26bee radv: fix image variable types in meta shaders
We write to these variables using image intrinsics.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:27 +00:00
Rhys Perry
c344c083fc spirv: set variables to restrict by default
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:27 +00:00
Mauro Rossi
1be67d610f android: freedreno/ir3: simplify generated sources rules
Simplification and alignment with meson's sources generation rules

Changelog:
- move rules from src/gallium/drivers/freedreno/Android.gen.mk to Android.ir3.mk
- simplify LOCAL_GENERATED_SOURCES based on $(ir3_GENERATED_FILES)
- remove includes of src/gallium/drivers/freedreno/Android.gen.mk
- remove src/gallium/drivers/freedreno/Android.gen.mk

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5580>
2020-06-24 10:00:14 +00:00
Mauro Rossi
41683157e7 android: freedreno/ir3: add missing generated sources and rules
Changelog:
- Makefile.sources: add ir3_lexer.c and ir3_parser.{c,h} generated sources
- Android.ir3.mk: add the necessary generated sources rules
- Android.ir3.mk: add the necessary include paths
- src/gallium/drivers/freedreno/Android.gen.mk: generate only ir3_nir_{imul,trig}.c for the moment

Fixes the following building error:

target  C: libfreedreno_ir3 <= external/mesa/src/freedreno/ir3/ir3_assembler.c
FAILED: out/target/product/x86_64/obj/STATIC_LIBRARIES/libfreedreno_ir3_intermediates/ir3/ir3_assembler.o
...
external/mesa/src/freedreno/ir3/ir3_assembler.c:28:10: fatal error: 'ir3_parser.h' file not found
         ^~~~~~~~~~~~~~
1 error generated.

Fixes: 1e8808a4a0 ("freedreno/ir3: refactor out helper to compile shader from asm")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5580>
2020-06-24 10:00:14 +00:00
Mauro Rossi
b41828c337 android: freedreno: add fd5_layout.c to Makefile.sources
Fixes the following building error:

FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
...
ld.lld: error: undefined symbol: fdl5_layout
clang-9: error: linker command failed with exit code 1 (use -v to see invocation)

Fixes: a1a739995b ("freedreno/a5xx: Move resource layout to fdl.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5580>
2020-06-24 10:00:14 +00:00
Bas Nieuwenhuizen
5f97dfc4c8 vulkan/wsi/x11: Ensure we create at least minImageCount images.
Doom Eternal happily creates a swapchain with 2 images for IMMEDIATE...

This fixes a 10% performance issues with Doom Eternal for me.

Since the game only sets a minImageCount increasing till our own minimum
is totally okay.

CC: <stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2684
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3156
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4368>
2020-06-24 09:18:01 +00:00
Mike Blumenkrantz
7b3976d3f8 zink: clamp VkImageCreateInfo.arrayLayers to 1 for image resource creation
this is required by spec, so we can generally assume that any time it's 0 here
this is the result of us being lazy elsewhere in the zink driver when we're
manually creating this sort of buffer

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5614>
2020-06-24 07:01:00 +00:00
Samuel Pitoiset
994224bc29 gitlab-ci: update the list of expected CTS failures for RADV/ACO
Based on Vulkan CTS 1.2.3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5593>
2020-06-24 06:09:37 +00:00
Kenneth Graunke
6a5fb31fef nir: Fix divergence analysis for tessellation input/outputs
The load_per_vertex_{input,output} intrinsics simply mean that they're
reading an arrayed input/output, which have one element per invocation.
Most accesses to those use gl_InvocationID as the subscript.  However,
it's totally possible to read any element of the array.  For example,
an evaluation shader might read gl_in[2].gl_Position, or a control
shader might read output[0].

For threads processing a single patch, an input/output load is
convergent if and only if both sources (the per-vertex-array subscript
and the offset) are convergent.  For threads processing multiple
patches, we continued to mark them divergent.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5613>
2020-06-24 03:25:10 +00:00
Kenneth Graunke
8278a46b26 intel: Disable loading drivers on DG1 devices for now
Kernel support for DG1 has not yet been merged upstream; per our
long-standing DRM subsystem policy, we should not enable the platform
in userspace until the kernel patches are merged and functional.

We will re-enable this in the future.  In the meantime, we retain all
of the infrastructure and code for the platform so that we can continue
developing DG1 support in upstream.

See a discussion here:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956#note_547775

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5617>
2020-06-24 02:48:04 +00:00
Kenneth Graunke
32455b657f CI: Disable Panfrost Mali-T820, Lima Mali-400 and Lima Mali-450 jobs
The runners appear to be unhealthy.  Disable for now so people can merge
patches for other drivers in the meantime.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5619>
2020-06-23 19:26:48 -07:00
Jordan Justen
7f48c6b6a2 iris/compute: Split out iris_load_indirect_location
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5571>
2020-06-24 00:14:36 +00:00
Jordan Justen
6557c8294d iris: Split walker and state update into iris_upload_gpgpu_walker
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5571>
2020-06-24 00:14:36 +00:00
Jordan Justen
ecf3335eef anv/cmd_buffer: Split GPGPU_WALKER out to emit_gpgpu_walker
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5571>
2020-06-24 00:14:36 +00:00
Jordan Justen
759b7f83dd anv/pipeline: Split VFE/INTERFACE_DESCRIPTOR out to emit_media_cs_state
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5571>
2020-06-24 00:14:35 +00:00
Jonathan Marek
a5918ac63e turnip: use pipeline cs for shader programs instead of separate bo
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5606>
2020-06-23 21:12:09 +00:00
Jonathan Marek
a58de1b8d3 turnip: fix ts_cs_memory typo
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5606>
2020-06-23 21:12:09 +00:00
Kristian H. Kristensen
bf92f041fe freedreno: Handle DRM_FORMAT_MOD_INVALID in shared code
layout_resource_for_modifier() needs to handle DRM_FORMAT_MOD_INVALID
as well, since src/gallium/frontends/dri/dri2.c uses this to indicate
"no modifier" when it's called through the older non-modifier entry
points.

This is similar to 334788d4 ("freedreno: allow INVALID modifier") but
for the generic implementation.

Fixes: 98910626 ("freedreno/a6xx: Implement layout for DRM_FORMAT_MOD_QCOM_COMPRESSED")
Closes: #3154
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5611>
2020-06-23 19:10:40 +00:00
Jason Ekstrand
561aaeeb48 intel/eu: Add the RNDU opcode
We don't want to use it on gen5 and earlier because only RNDD can be
done with a single instruction and we can implement RNDU(x) as -RNDD(-x)
so it's better to just do that when we have the instruction.  On gen6
and above, we may as well just use the right instruction.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
2020-06-23 17:43:54 +00:00
Jason Ekstrand
e0ab48e3ea intel/eu: Set the right subnr for ALIGN16 destinations
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
2020-06-23 17:43:54 +00:00
Jason Ekstrand
8a0d772dca intel/eu: Add a brw_urb_dest_msg_type helper
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
2020-06-23 17:43:54 +00:00
Kenneth Graunke
2c762955d4 intel/eu: Add a brw_urb_desc helper
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
2020-06-23 17:43:53 +00:00
Jason Ekstrand
ecda98fbb2 intel/compiler: Expose brw_texture_offset to C
Some day we probably want to move it out of brw_shader if we're going to
share it with IBC but that can be another day.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
2020-06-23 17:43:53 +00:00
Jason Ekstrand
479797e130 intel/fs: Move more prog_data setup into populate_wm_prog_data
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
2020-06-23 17:43:53 +00:00
Jason Ekstrand
fc519cad57 intel/fs: Break wm_prog_data setup into a helper
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
2020-06-23 17:43:53 +00:00
Jason Ekstrand
2687ec5ee6 intel/fs: Expose a couple of NIR lowering helpers
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
2020-06-23 17:43:53 +00:00
Kenneth Graunke
bfc1fd22cd iris: Delete useless #define
When I was bringing up the driver, I had BLORP use #ifdefs for
softpin-mode vs. relocation-mode.  That all got reworked during
review, but apparently this #define is still kicking around,
even though nothing uses it.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5610>
2020-06-23 10:25:31 -07:00
Jose Maria Casanova Crespo
ba15bb383f nir: only uniforms with dynamically_uniform offset are dynamically_uniform
Previously all nir_intrinsic_load_uniform that were used as sources were
considered to be dynamically_uniform but when offsets of load_uniform
are indirect it can not be determined.

This fixes artefacts in Google Maps 3D view in V3D.

Fixes: 886d46b089 ("nir: Add a function to determine if a source is dynamically uniform")
Reviewed-by: Neil Roberts <nroberts@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5587>
2020-06-23 13:04:04 +00:00
Eric Engestrom
2a61a8d95a bin/symbols-check: explain C++ symbols workaround
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5556>
2020-06-23 11:05:39 +00:00
Jonathan Marek
20e12d9ef4 turnip: implement CmdDrawIndirectByteCountEXT
Fixes these deqp tests:
dEQP-VK.transform_feedback.simple.backward_dependency*
dEQP-VK.transform_feedback.simple.draw_indirect*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5579>
2020-06-23 10:44:19 +00:00
Jonathan Marek
6cf87d777a turnip: enable VK_EXT_index_type_uint8
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5579>
2020-06-23 10:44:19 +00:00
Jonathan Marek
52da27aede turnip: refactor CmdDraw* functions (and a few fixes)
This cleans up the CmdDraw* functions to be more straightforward. And a few
fixes applied while going through it:
* Fix indirect draw commands not adding the buffer->bo_offset, and ignoring
 drawCount/stride parameters (deqp tests not testing indirect draws very
 much apparently).
* Fixed a potential issue with RESTART_INDEX + secondary command bufs.
* Add missing logic for 8-bit indices

Signed-off-by: Jonathan Marek <jonathan@marek.ca>

# Conflicts:
#	src/freedreno/vulkan/tu_cmd_buffer.c

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5579>
2020-06-23 10:44:19 +00:00
Jonathan Marek
98b0d90047 turnip: rework streamout state and add missing counter buffer read/writes
Rework the streamout state and at the same time fix some issues, the
biggest one being to actually use the counter buffers instead of ignoring
them completely.

(note it appears the dEQP tests are bad and able to pass with the previous
broken behavior of not ever reading/writing from the counter buffers)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5579>
2020-06-23 10:44:19 +00:00
Eric Engestrom
99eecd3775 docs: add planning for 20.2
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5239>
2020-06-23 10:28:11 +00:00
Eric Engestrom
3f04914713 docs: add some padding to the release calendar
This extra padding allows for `-rcX` suffixes.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5239>
2020-06-23 10:28:11 +00:00
Rob Clark
ade7c3338a ci: remove some freedreno a6xx skips
These don't seem to be flakey anymore.  I did still see a flake with
dEQP-GLES31.functional.layout_binding.ssbo.fragment_binding_array so
I put that one back in.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5577>
2020-06-23 10:01:58 +00:00
Marek Olšák
012b7aab26 driconf: add workarounds for SPECviewperf13
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5459>
2020-06-23 09:25:24 +00:00
Marek Olšák
ca719c6e30 glsl,driconf: add allow_glsl_120_subset_in_110 for SPECviewperf13
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5459>
2020-06-23 09:25:24 +00:00
Marek Olšák
f8e8701cf1 radeonsi: replace ctx->screen with sscreen in si_flush_gfx_cs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5506>
2020-06-23 09:12:16 +00:00
Marek Olšák
470b319813 radeonsi: don't wait for idle at the end of gfx IBs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5506>
2020-06-23 09:12:16 +00:00
Samuel Pitoiset
57606c2ab5 gitlab-ci: stop testing RADV with LLVM
ACO is going to be our default compiler soon and it seems useless
to waste CI resources for LLVM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5543>
2020-06-23 08:21:56 +00:00
Samuel Pitoiset
0aca04afa5 aco: fix printing ASM on GFX6-7 again
Checking errno is actually wrong because it's only updated if
popen() fails (ie. NULL). One solution is to check if the first
line is empty.

Fixes: c95d258d1b ("aco: fix printing ASM on GFX6-7 if clrxdisasm is not found")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5591>
2020-06-23 07:45:03 +00:00
Tomeu Vizoso
e0518800a1 gitlab-ci: Update CTS runner
We need a newer version to be able to successfully run the OpenGL suites
in dEQP.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5494>
2020-06-23 06:59:27 +00:00
Tomeu Vizoso
287bf5f208 gitlab-ci: Test virgl with Khronos' OpenGL CTS
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5494>
2020-06-23 06:59:27 +00:00
Tomeu Vizoso
2102d5eda5 gitlab-ci: Add manual tests for Virgl using GLES on the host
The ones that run automatically will use big GL on the host.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5494>
2020-06-23 06:59:27 +00:00
Tomeu Vizoso
4417e924bf gitlab-ci: Run more dEQP tests for virgl
Llvmpipe seems to have become faster, and we can run more tests while
still being under 5 minutes per job.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5494>
2020-06-23 06:59:27 +00:00
Marek Olšák
a2d7f4fe5a glthread: handle ARB_vertex_attrib_binding
This handles ARB_vertex_attrib_binding for vertex uploads correctly.
Before this, the extension might have led to crashes if non-VBO vertex
attribs were present.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5303>
2020-06-23 06:41:37 +00:00
Marek Olšák
66c2c9c6a9 glthread: rename non_vbo_attrib_mask -> user_buffer_mask, attribs -> buffers
just a cleanup, no change in behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5303>
2020-06-23 06:41:37 +00:00
Marek Olšák
2bf425431d glapi: fix incorrect param names in ARB_vertex_attrib_binding functions
no change in behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5303>
2020-06-23 06:41:37 +00:00
Marek Olšák
2b8b62c55b ac/nir: fix 64-bit division for GL CTS
This fixes: KHR-GL45.gpu_shader_fp64.builtin.mod_*

Fixes: ba2ec1f3 "ac/nir: use llvm.amdgcn.rcp in ac_build_fdiv()"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5531>
2020-06-23 04:46:55 +00:00
Marek Olšák
3fec2f67c3 radeonsi: compact MRTs to save PS export memory space
If there are holes between color outputs (e.g. a shader exports MRT1, but
not MRT0), we can remove the holes by moving higher MRTs lower.

The hardware will remap the MRTs to their correct locations if we remove
holes in SPI_SHADER_COL_FORMAT but not CB_SHADER_MASK.

This is a performance optimization, but MRTs with holes are pretty rare,
so there is most likely no effect on any app.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5535>
2020-06-23 00:23:51 -04:00
Jason Ekstrand
6ac99b9f39 anv: Bump the advertised patch version to 145
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5597>
2020-06-22 23:24:25 +00:00
Jason Ekstrand
a9ee1b9cf9 vulkan: Update Vulkan XML and headers to 1.2.145
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5597>
2020-06-22 23:24:25 +00:00
Eric Engestrom
677c1bd055 docs: cat maintainer keys to a single file
The original issue asked for all the keys in a single file, but I didn't
do that because it's much easier to manage and verify the keys as
separate files, but sphinx doesn't provide a way to expose a folder so
we'd need to create an index.html and have it list all the keys
manually, which is very error prone.

At this point, we might as well just concatenate the keys and expose
a single file, so let's do that.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5568>
2020-06-22 23:07:16 +00:00
Eric Engestrom
b4335aaf0e docs: drop deleted file from extra sphinx files
Fixes: 3e37b7e6bb ("docs: remove plain-text copy of versions.rst")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5567>
2020-06-22 23:06:00 +00:00
Jordan Justen
c72832e83c anv: Make use of devinfo has_aux_map field
Reworks:
 * Use device rather than physical_device for info. (Lionel)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5572>
2020-06-22 22:32:03 +00:00
Jordan Justen
8c36936832 iris: Make use of devinfo has_aux_map field
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5572>
2020-06-22 22:32:03 +00:00
Eric Engestrom
4be31ebb61 gitlab-ci: drop gettext from the build images
Suggested-by: Pierre-Eric Pelloux-Prayer <pelloux@gmail.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5440>
2020-06-22 21:50:12 +00:00
Eric Engestrom
04e8eaf4e8 util: rename xmlpool.h to driconf.h
To make it clearer what it is and does.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5440>
2020-06-22 21:50:12 +00:00
Eric Engestrom
2ef983dca6 driconf: drop now unused translation facility
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5440>
2020-06-22 21:50:12 +00:00
Eric Engestrom
b1f647a3b4 driconf: drop 9% swedish translation
Only 7 of the 72 strings are translated, and there doesn't seem to be
any effort to keep it updated.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5440>
2020-06-22 21:50:12 +00:00
Eric Engestrom
0a19565592 driconf: drop 8% dutch translation
Only 6 of the 72 strings are translated, and there doesn't seem to be
any effort to keep it updated.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5440>
2020-06-22 21:50:12 +00:00
Eric Engestrom
56d76859fa driconf: drop 6% french translation
Only 4 of the 72 strings are translated, and there doesn't seem to be
any effort to keep it updated.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5440>
2020-06-22 21:50:12 +00:00
Eric Engestrom
a029eafba3 driconf: drop 26% spanish translation
Only 19 of the 72 strings are translated, and there doesn't seem to be
any effort to keep it updated.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5440>
2020-06-22 21:50:12 +00:00
Eric Engestrom
29ee6f6c6a driconf: drop 15% german translation
Only 11 of the 72 strings are translated, and there doesn't seem to be
any effort to keep it updated.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5440>
2020-06-22 21:50:12 +00:00
Eric Engestrom
ae7759eb21 driconf: drop 28% catalan translation
Only 20 of the 72 strings are translated, and there doesn't seem to be
any effort to keep it updated.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5440>
2020-06-22 21:50:12 +00:00
Mike Blumenkrantz
6e24047573 zink: use correct define value for reserved slot count in ntv
this is zero-indexed, so we need to include the zero index in the count

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5592>
2020-06-22 21:19:18 +00:00
Jordan Justen
c323e0ddf3 intel/dev: Add device info for DG1
Reworks:
 * Anuj: Set is_dg1
 * Anuj: Add dg1 to gen_device_name_to_pci_device_id
 * Anuj: Update simulator id
 * Rafael: has_llc = false

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:42:00 -07:00
Rafael Antognolli
37a724e4ae anv/dg1: Don't use SET_TILING kernel uapi.
It is not available on discrete platforms anymore.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:42:00 -07:00
Rafael Antognolli
e658835436 iris/bufmgr: Do not use map_gtt or use set/get_tiling on DG1
We are starting to see platforms that don't support the get/set tiling
uAPI. (For example, DG1.)

Additionally on DG1 we shouldn't be using the map_gtt anymore.

Let's add some asserts and make sure we don't take those paths
accidentally.

Rework:
 * Jordan: Only apply for DG1, not all gen12
 * Rafael: Use has_tiling_uapi
 * Jordan: Copy has_tiling_uapi from devinfo
 * Jordan: merge in "iris: Rework iris_bo_import_dmabuf() a little."
 * Jordan: Continue to call get/set_tiling on modifier path

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:42:00 -07:00
Rafael Antognolli
762e601f77 intel/devinfo: Add function to check for DRM_I915_GEM_GET_TILING.
Future (discrete) platforms won't have support for get/set tiling. This
function allows our drivers to query for that, by simply trying to get
the tiling from a dummy buffer.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:42:00 -07:00
Rafael Antognolli
86617c08cc intel/l3: Return the URB size from devinfo for DG1
We don't have any URB size set in the L3 config, since it's a fixed
value now. So just return the value that we know from gen_device_info.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:42:00 -07:00
Rafael Antognolli
793b409241 intel/isl: Update mocs for DG1
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:42:00 -07:00
Anuj Phogat
3daa866751 intel/l3: Add DG1 L3 configuration
Reworks:
 * Jordan: Make DG1 L3 config table empty

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:41:59 -07:00
Jordan Justen
633dec7163 anv: Set L3 full way allocation at context init if L3 cfg is NULL
If the platform's default L3 config is NULL, then it now gets
initialized only at context init time, and cmd_buffer_config_l3 will
always return immediately.

Rework:
 * Remove unneeded check on !cfg in cmd_buffer_config_l3 (Jason)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:41:59 -07:00
Jordan Justen
e2e0521ecb iris/l3: Enable L3 full way allocation when L3 config is NULL
Reworks:
 * Jordan: Check for cfg == NULL rather than is_dg1

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:41:59 -07:00
Jordan Justen
6054b24f58 intel/l3: Allow platforms to have no l3 configurations
On some gen12 platforms we will use the L3FullWayAllocationEnable and
never reconfigure the L3 setup.

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:41:59 -07:00
Jordan Justen
49fe43e15f intel/l3: Don't rely on cfg entry URB size being 0 as a sentinal
An example entry with URB size being 0 is in the cnl list.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:41:59 -07:00
Anuj Phogat
f1fba99695 intel/devinfo: Add is_dg1 to device info
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:41:55 -07:00
Brian Ho
64ccb74028 turnip: Enable tessellationShader physical device feature
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:46 +00:00
Brian Ho
497671be35 ir3: Unconditionally enable MERGEDREGS on a6xx
As per discussion on !5059, we don't see any particular reason as to
why MERGEDREGS should be disabled on HS/DS/GS, and none of the dEQP
tests (both VK and GL) fail when MERGEDREGS is enabled. In fact, some
of the VK dEQP tests fail when MERGEDREGS is disabled (e.g. tests
with shaders that employ a0.x). As a result, let's just enable
MERGEDREGS unconditionally on a6xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:46 +00:00
Brian Ho
7a836ec631 turnip: Force sysmem for tessellation
Tessellation is incompatible with HW binning (dEQP tests fail when
we set forcebin), so force sysmem when we finish recording a command
buffer that uses a tess pipeline.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:46 +00:00
Brian Ho
2718353b38 turnip: Support tess for draws
This commit adds tessellation support for draws. We store the IR3
patch type in tu_pipeline so we can use it in tu_emit_draw_*. We then
convert the IR3 patch type to the native adreno patch type and set
the appropriate reg values.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:46 +00:00
Brian Ho
08aaa3d4c4 turnip: Emit HS/DS user consts as draw states
Just like VS/GS/FS.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:45 +00:00
Brian Ho
8cb226b258 turnip: Update VFD_CONTROL with tess system values
Support for TessCoord, PatchID, TCSHeader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:45 +00:00
Brian Ho
f08a80dcd4 turnip: Allocate tess BOs as a function of draw size
To store tess outputs, the HS stg's into two buffers, one for
per-vertex/per-patch output variables (tess_param) and one for
TessLevelInner/Outer (tess_factor). The addresses of these buffers
are uploaded as consts to the HS/DS and the tess_factor iova is
written to REG_A6XX_PC_TESSFACTOR_ADDR. While the sizes of these
buffers are a function of vetex count and patch count, allocation is
relatively straightforward on freedreno- just keep track of the max
required buffer size for the entire batch and allocate before batch
submit.

In Vulkan, however, a given pipeline can be bound multiple times
across any number of command buffers, each drawing with a different
number of vertices. One solution is to track the max buffer size for
the entire command buffer (similar to fd_batch) and on
vkEndCommandBuffer, allocate appropriately sized tess BOs. Since the
tess BOs addresses are emitted as part of the pipeline state setup
(e.g. PKT4 to REG_A6XX_PC_TESSFACTOR_ADDR), we need to create a new
state group independent of a specific pipeline and parameterize its
IB with the command buffer specific tess BO iovas.

Without a larger refactor, the simplest way to do this is just to
emit per-draw call consts and leverage scratch_bo to re-use buffers.
This way we won't have to store and rewrite earlier packets in the
command stream on vkEndCommandBuffer.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:45 +00:00
Brian Ho
eefdca2e2f turnip: Parse tess state and support PATCH primtype
This commit adds support for VK_PRIMITIVE_TOPOLOGY_PATCH_LIST
primitive topologies.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:45 +00:00
Brian Ho
ff16e72545 turnip: Offset by component when lowering gl_TessLevel*
lower_tess_ctrl_block assumes that the gl_TessLevel*
intrinsic_store_outputs have already been collapsed into a single
instruction before the tess lowering step:

store_output ... /* base=0 */ /* wrmask=xyzw */ /* component=0 */
store_output ... /* base=1 */ /* wrmask=xy */ /* component=0 */

While this is true in fd because of st_nir_vectorize_io, we don't do
the same lowering in turnip so each tess level component still has
its own store instruction:

store_output ... /* base=0 */ /* wrmask=x */ /* component=0 */
store_output ... /* base=0 */ /* wrmask=x */ /* component=1 */
store_output ... /* base=0 */ /* wrmask=x */ /* component=2 */
store_output ... /* base=0 */ /* wrmask=x */ /* component=3 */
store_output ... /* base=1 */ /* wrmask=x */ /* component=0 */
store_output ... /* base=1 */ /* wrmask=x */ /* component=1 */

This commit adds a component offset to the tess control lowering. An
alternative is to also perform nir_lower_io_to_vector in turnip, but
ir3 seems to generate the same assembly either way and it's nice to
not have a lowering prereq before tess lowering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:45 +00:00
Brian Ho
b09e690f3b turnip: Lower shaders for tessellation
To enable lowering of tess-related shaders, this commit sets the
tessellation primitive field of the ir3_shader_key. In addition,
this commit sets various tessellation flags for
spirv_to_nir configuration.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:45 +00:00
Brian Ho
d2df076120 nir: Add an option for lowering TessLevelInner/Outer to vecs
The GLSL to NIR compiler supports the LowerTessLevel flag to convert
gl_TessLevelInner/Outer from their GLSL declarations as arrays of
floats to vec4/vec2s to better match how they are represented in
hardware.

This commit adds the similar support to the SPIR-V to NIR compiler so
turnip can use the same IR3/NIR tess lowering passes as freedreno.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:45 +00:00
Brian Ho
d2d4677b56 nir: Support sysval tess levels in SPIR-V to NIR
This commit adds a tess_levels_are_sysvals flag to
spirv_to_nir_options similar to GLSLTessLevelsAsInputs in the GLSL to
NIR compiler options. This will be used by turnip as the tess IR3
lowering pass (ir3_nir_lower_tess) operates on TessLevelInner and
TessLevelOuter in the DS as sysvals.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
2020-06-22 14:35:45 +00:00
Neil Roberts
ffc4d82438 v3d: Disable PIPE_CAP_PRIMITIVE_RESTART
The hardware can only support the PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX
subset. This will make it stop advertising the NV_primitive_restart
extension without breaking GLES 3.0 support.

v2: Update features.txt

Reviewed-by: Eric Anholt <eric@anholt.net> (v1)
Reviewed by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5559>
2020-06-22 12:41:56 +00:00
Neil Roberts
1fc346d2be mesa: Add PrimitiveRestartFixedIndex to gl_constants
This is a fine-grained subset of the NV_primitive_restart extension that
only uses the fixed indices provided by GLES 3.0. There’s no public
extension to advertise this behaviour so the bool is added to
gl_constants instead of gl_extensions.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5559>
2020-06-22 12:41:56 +00:00
Neil Roberts
bb5fc90135 gallium: Add pipe cap for primitive restart with fixed index
Adds PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX which is a subset of the
primitive restart cap for when the hardware can only support the fixed
indices specified in GLES.

The switch statements were automatically modified with this command:

find \( \( -name \*.cpp -o -name \*.c \) \! -type l \) \
 -exec sed -i -r \
 's/^(\s*case\s+PIPE_CAP_PRIMITIVE_RESTART)\s*:.*$/\0\n\1_FIXED_INDEX:/' \
 {} \;

v2: Add a note in screen.rst

Reviewed-by: Eric Anholt <eric@anholt.net> (v1)
Reviewed by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5559>
2020-06-22 12:41:56 +00:00
Karol Herbst
bcf6a9ec63 nv50/ir/ra: fix memory corruption when spilling
When doing RA we end up with adding ValueDef references to Values across
all over the shader. This is all fine until we remove the Instruction
defining those Values, which happens when spilling values.

Instead of manipulating the values directly we should just track all
merged in defs in a seperate structure and remove stale references when
an instruction gets deleted in the spiller.

fixes following libasan report:
=================================================================
==612087==ERROR: AddressSanitizer: heap-use-after-free on address 0x6150003ea380 at pc 0x7f1d12142fe9 bp 0x7fffca6fd120 sp 0x7fffca6fd110
READ of size 8 at 0x6150003ea380 thread T0
    #0 0x7f1d12142fe8 in nv50_ir::ValueDef::get() const ../src/gallium/drivers/nouveau/codegen/nv50_ir.h:648
    #1 0x7f1d12143c02 in nv50_ir::Value::getUniqueInsn() const ../src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h:229
    #2 0x7f1d1221530d in nv50_ir::RegAlloc::BuildIntervalsPass::addLiveRange(nv50_ir::Value*, nv50_ir::BasicBlock const*, int) ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:333
    #3 0x7f1d1221872e in nv50_ir::RegAlloc::BuildIntervalsPass::visit(nv50_ir::BasicBlock*) ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:686
    #4 0x7f1d1215676c in nv50_ir::Pass::doRun(nv50_ir::Function*, bool, bool) ../src/gallium/drivers/nouveau/codegen/nv50_ir_bb.cpp:495
    #5 0x7f1d121563ed in nv50_ir::Pass::run(nv50_ir::Function*, bool, bool) ../src/gallium/drivers/nouveau/codegen/nv50_ir_bb.cpp:477
    #6 0x7f1d122262b8 in nv50_ir::RegAlloc::execFunc() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1910
    #7 0x7f1d122256b0 in nv50_ir::RegAlloc::exec() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1849
    #8 0x7f1d12226f1e in nv50_ir::Program::registerAllocation() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1970
    #9 0x7f1d1214092a in nv50_ir_generate_code ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:1275
    #10 0x7f1d1227461b in nvc0_program_translate ../src/gallium/drivers/nouveau/nvc0/nvc0_program.c:634
    #11 0x7f1d12294b21 in nvc0_sp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:620
    #12 0x7f1d12294d90 in nvc0_fp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:661
    #13 0x7f1d12ad4912 in st_create_fp_variant ../src/mesa/state_tracker/st_program.c:1498
    #14 0x7f1d12ad4cd5 in st_get_fp_variant ../src/mesa/state_tracker/st_program.c:1525
    #15 0x7f1d12ad8252 in st_precompile_shader_variant ../src/mesa/state_tracker/st_program.c:2053
    #16 0x7f1d12c9c851 in st_program_string_notify ../src/mesa/state_tracker/st_cb_program.c:185
    #17 0x7f1d12d17731 in st_link_tgsi ../src/mesa/state_tracker/st_glsl_to_tgsi.cpp:7441
    #18 0x7f1d12cabaf0 in st_link_shader ../src/mesa/state_tracker/st_glsl_to_ir.cpp:175
    #19 0x7f1d127c85ca in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3186
    #20 0x7f1d1252a9f7 in link_program ../src/mesa/main/shaderapi.c:1285
    #21 0x7f1d1252a9f7 in link_program_error ../src/mesa/main/shaderapi.c:1384
    #22 0x7f1d1252deb3 in _mesa_LinkProgram ../src/mesa/main/shaderapi.c:1876
    #23 0x403e13 in main._omp_fn.0 /home/kherbst/git/shader-db/run.c:926
    #24 0x7f1d17b8b4b5 in GOMP_parallel (/lib64/libgomp.so.1+0x124b5)
    #25 0x4029e4 in main /home/kherbst/git/shader-db/run.c:765
    #26 0x7f1d179b51a2 in __libc_start_main ../csu/libc-start.c:308
    #27 0x402d1d in _start (/home/kherbst/git/shader-db/run+0x402d1d)

0x6150003ea380 is located 0 bytes inside of 504-byte region [0x6150003ea380,0x6150003ea578)
freed by thread T0 here:
    #0 0x7f1d17e5d96f in operator delete(void*) (/usr/lib64/libasan.so.5.0.0+0x11096f)
    #1 0x7f1d1214ec0f in __gnu_cxx::new_allocator<nv50_ir::ValueDef>::deallocate(nv50_ir::ValueDef*, unsigned long) /usr/include/c++/9/ext/new_allocator.h:128
    #2 0x7f1d1214dc00 in std::allocator_traits<std::allocator<nv50_ir::ValueDef> >::deallocate(std::allocator<nv50_ir::ValueDef>&, nv50_ir::ValueDef*, unsigned long) /usr/include/c++/9/bits/alloc_traits.h:470
    #3 0x7f1d1214c5fb in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_M_deallocate_node(nv50_ir::ValueDef*) /usr/include/c++/9/bits/stl_deque.h:624
    #4 0x7f1d121498c4 in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_M_destroy_nodes(nv50_ir::ValueDef**, nv50_ir::ValueDef**) /usr/include/c++/9/bits/stl_deque.h:758
    #5 0x7f1d1214704d in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::~_Deque_base() /usr/include/c++/9/bits/stl_deque.h:680
    #6 0x7f1d12145371 in std::deque<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::~deque() /usr/include/c++/9/bits/stl_deque.h:1069
    #7 0x7f1d1213bc5b in nv50_ir::Instruction::~Instruction() ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:615
    #8 0x7f1d1213fb2f in nv50_ir::Program::releaseInstruction(nv50_ir::Instruction*) ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:1148
    #9 0x7f1d122250fb in nv50_ir::SpillCodeInserter::run(std::__cxx11::list<std::pair<nv50_ir::Value*, nv50_ir::Value*>, std::allocator<std::pair<nv50_ir::Value*, nv50_ir::Value*> > > const&) ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1830
    #10 0x7f1d12221445 in nv50_ir::GCRA::allocateRegisters(nv50_ir::ArrayList&) ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1541
    #11 0x7f1d122262e9 in nv50_ir::RegAlloc::execFunc() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1913
    #12 0x7f1d122256b0 in nv50_ir::RegAlloc::exec() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1849
    #13 0x7f1d12226f1e in nv50_ir::Program::registerAllocation() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1970
    #14 0x7f1d1214092a in nv50_ir_generate_code ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:1275
    #15 0x7f1d1227461b in nvc0_program_translate ../src/gallium/drivers/nouveau/nvc0/nvc0_program.c:634
    #16 0x7f1d12294b21 in nvc0_sp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:620
    #17 0x7f1d12294d90 in nvc0_fp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:661
    #18 0x7f1d12ad4912 in st_create_fp_variant ../src/mesa/state_tracker/st_program.c:1498
    #19 0x7f1d12ad4cd5 in st_get_fp_variant ../src/mesa/state_tracker/st_program.c:1525
    #20 0x7f1d12ad8252 in st_precompile_shader_variant ../src/mesa/state_tracker/st_program.c:2053
    #21 0x7f1d12c9c851 in st_program_string_notify ../src/mesa/state_tracker/st_cb_program.c:185
    #22 0x7f1d12d17731 in st_link_tgsi ../src/mesa/state_tracker/st_glsl_to_tgsi.cpp:7441
    #23 0x7f1d12cabaf0 in st_link_shader ../src/mesa/state_tracker/st_glsl_to_ir.cpp:175
    #24 0x7f1d127c85ca in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3186
    #25 0x7f1d1252a9f7 in link_program ../src/mesa/main/shaderapi.c:1285
    #26 0x7f1d1252a9f7 in link_program_error ../src/mesa/main/shaderapi.c:1384
    #27 0x7f1d1252deb3 in _mesa_LinkProgram ../src/mesa/main/shaderapi.c:1876
    #28 0x403e13 in main._omp_fn.0 /home/kherbst/git/shader-db/run.c:926

previously allocated by thread T0 here:
    #0 0x7f1d17e5c9d7 in operator new(unsigned long) (/usr/lib64/libasan.so.5.0.0+0x10f9d7)
    #1 0x7f1d1215046f in __gnu_cxx::new_allocator<nv50_ir::ValueDef>::allocate(unsigned long, void const*) /usr/include/c++/9/ext/new_allocator.h:114
    #2 0x7f1d1214ebec in std::allocator_traits<std::allocator<nv50_ir::ValueDef> >::allocate(std::allocator<nv50_ir::ValueDef>&, unsigned long) /usr/include/c++/9/bits/alloc_traits.h:444
    #3 0x7f1d1214dbd3 in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_M_allocate_node() /usr/include/c++/9/bits/stl_deque.h:617
    #4 0x7f1d1214c464 in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_M_create_nodes(nv50_ir::ValueDef**, nv50_ir::ValueDef**) (/home/kherbst/local/lib64/dri//nouveau_dri.so+0x829464)
    #5 0x7f1d121495cd in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_M_initialize_map(unsigned long) /usr/include/c++/9/bits/stl_deque.h:716
    #6 0x7f1d12146f7d in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_Deque_base() /usr/include/c++/9/bits/stl_deque.h:507
    #7 0x7f1d1214518d in std::deque<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::deque() /usr/include/c++/9/bits/stl_deque.h:912
    #8 0x7f1d1213b9c9 in nv50_ir::Instruction::Instruction(nv50_ir::Function*, nv50_ir::operation, nv50_ir::DataType) ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:605
    #9 0x7f1d1224dd44 in nv50_ir::Function::convertToSSA() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ssa.cpp:385
    #10 0x7f1d1224d381 in nv50_ir::Program::convertToSSA() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ssa.cpp:310
    #11 0x7f1d121407c0 in nv50_ir_generate_code ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:1264
    #12 0x7f1d1227461b in nvc0_program_translate ../src/gallium/drivers/nouveau/nvc0/nvc0_program.c:634
    #13 0x7f1d12294b21 in nvc0_sp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:620
    #14 0x7f1d12294d90 in nvc0_fp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:661
    #15 0x7f1d12ad4912 in st_create_fp_variant ../src/mesa/state_tracker/st_program.c:1498
    #16 0x7f1d12ad4cd5 in st_get_fp_variant ../src/mesa/state_tracker/st_program.c:1525
    #17 0x7f1d12ad8252 in st_precompile_shader_variant ../src/mesa/state_tracker/st_program.c:2053
    #18 0x7f1d12c9c851 in st_program_string_notify ../src/mesa/state_tracker/st_cb_program.c:185
    #19 0x7f1d12d17731 in st_link_tgsi ../src/mesa/state_tracker/st_glsl_to_tgsi.cpp:7441
    #20 0x7f1d12cabaf0 in st_link_shader ../src/mesa/state_tracker/st_glsl_to_ir.cpp:175
    #21 0x7f1d127c85ca in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3186
    #22 0x7f1d1252a9f7 in link_program ../src/mesa/main/shaderapi.c:1285
    #23 0x7f1d1252a9f7 in link_program_error ../src/mesa/main/shaderapi.c:1384
    #24 0x7f1d1252deb3 in _mesa_LinkProgram ../src/mesa/main/shaderapi.c:1876
    #25 0x403e13 in main._omp_fn.0 /home/kherbst/git/shader-db/run.c:926

SUMMARY: AddressSanitizer: heap-use-after-free ../src/gallium/drivers/nouveau/codegen/nv50_ir.h:648 in nv50_ir::ValueDef::get() const
Shadow bytes around the buggy address:
  0x0c2a80075420: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
  0x0c2a80075430: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
  0x0c2a80075440: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
  0x0c2a80075450: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fa
  0x0c2a80075460: fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa
=>0x0c2a80075470:[fd]fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd
  0x0c2a80075480: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd
  0x0c2a80075490: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd
  0x0c2a800754a0: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fa
  0x0c2a800754b0: fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa
  0x0c2a800754c0: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd
Shadow byte legend (one shadow byte represents 8 application bytes):
  Addressable:           00
  Partially addressable: 01 02 03 04 05 06 07
  Heap left redzone:       fa
  Freed heap region:       fd
  Stack left redzone:      f1
  Stack mid redzone:       f2
  Stack right redzone:     f3
  Stack after return:      f5
  Stack use after scope:   f8
  Global redzone:          f9
  Global init order:       f6
  Poisoned by user:        f7
  Container overflow:      fc
  Array cookie:            ac
  Intra object redzone:    bb
  ASan internal:           fe
  Left alloca redzone:     ca
  Right alloca redzone:    cb
  Shadow gap:              cc
==612087==ABORTING

v2: full rework
v3: manage a full copy instead of recreating new lists on every access

Closes: #3066

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5277>
2020-06-22 12:29:49 +00:00
Karol Herbst
b8c77d4765 nv50/ir/ra: convert some for loops to Range-based for loops
I will touch them in the next commit

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5277>
2020-06-22 12:29:49 +00:00
Icecream95
361fb38662 panfrost: Copy resources when mapping to avoid waiting for readers
It is often faster to copy the whole resource and modify that than
to flush and wait for readers of the BO.

Helps anything which updates textures after already using them in a
frame, such as most GLQuake ports.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5573>
2020-06-22 12:15:05 +00:00
Icecream95
65b3b08aaf panfrost: Update sampler views when the texture bo changes
The BO reallocation path in panfrost_transfer_map caused textures and
sampler views to get out of sync.

v2: Use the GPU address of the BO in case two BOs get allocated at the
    same address.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5573>
2020-06-22 12:15:05 +00:00
Icecream95
9630012060 panfrost: RGBA4 and RGB5_A1 framebuffer support
Tested with fbo_firecube.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5573>
2020-06-22 12:15:05 +00:00
Icecream95
b96d4449f4 pan/mdg: Fix max_comp calculation for constant printing
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5573>
2020-06-22 12:15:05 +00:00
Icecream95
5b351c801e pan/decode: Add missing wrap modes
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5573>
2020-06-22 12:15:05 +00:00
Icecream95
e219f04592 pan/decode: Fix helper invocations when tracing
midgard1.flags_lo was being changed when tracing, causing helper
invocations to be disabled.

This was found by using mprotect to make BOs read only in
pandecode_fetch_gpu_mem.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5573>
2020-06-22 12:15:05 +00:00
Gert Wollny
97318994bc r600/sfn: Don't set num_components on TESS sysvalue intrinsics
These instructions are not vectorized, and validation rules added for
this with 167fa2887f
    nir/validate: validate intr->num_components

Fixes: 46a3033b43
    r600/sfn: Emit some LDS instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5575>
2020-06-22 12:01:17 +00:00
Gert Wollny
43c23ba9bf r600/sfn: Add support for shared atomics
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5575>
2020-06-22 12:01:17 +00:00
Gert Wollny
033968a94e r600/sfn: Add lowering pass for shared IO
Lower shared load and store to use the r600 specific intrinsics.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5575>
2020-06-22 12:01:17 +00:00
Karol Herbst
14591a45b7 nv50/ir/nir: rework CFG handling
Remove all convergency handling as it was broken and get the code to be a
bit closer to TGSI. Also removes pointless asserts.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>
2020-06-22 11:41:31 +00:00
Karol Herbst
8af22703e9 nv50/ir/nir: rework input output handling
New code is a bit more structurized and fixes a bunch of int64 and double
fails. Also disables lower_to_scalar which gives us nice vectorized inputs
and outputs.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>
2020-06-22 11:41:31 +00:00
Karol Herbst
c31d711913 nv50/ir/nir: handle clip vertex for tess eval shaders
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>
2020-06-22 11:41:31 +00:00
Karol Herbst
636cf22a1f nv50/ir/nir: don't emit a restart with set a stream_id
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>
2020-06-22 11:41:31 +00:00
Karol Herbst
cc71fccb75 nvc0: enable spirv caps with nir
This enables the SPIR-V GL extensions moving us a step closer to GL 4.6.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>
2020-06-22 11:41:31 +00:00
Karol Herbst
e476629853 nv50/ir/nir: fix nv_viewport_array2
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>
2020-06-22 11:41:31 +00:00
Karol Herbst
984e930b2f nv50/ir/nir: fix ext_demote_to_helper_invocation
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>
2020-06-22 11:41:31 +00:00
Karol Herbst
b78c337590 nv50/ir/print: add missing VIEWPORT_MASK handling
Also add an STATIC_ASSERT so we catch those issues automatically.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>
2020-06-22 11:41:31 +00:00
Karol Herbst
aecca24d03 nv50/ir/nir: add workaround for double vertex attribs
Gallium adjusts the vertrix attrib types for doubles, but can run out of
bounds this way. As the slot is counted from 0 anyway, just fix it.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>
2020-06-22 11:41:31 +00:00
Samuel Pitoiset
83d2a73b73 aco: improve validation checks for readlane/writelane
This allows literals for the lane select on GFX10+. The doc says
that is should be a SGPR or a constant but VOP3 on GFX10+ allows
literals.

Some later validation code checks if literals are allowed anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5010>
2020-06-22 11:24:27 +00:00
Daniel Schürmann
f03a5f6cac radv/aco: implement logic64 instead of lowering
to make use of the scalar ALU

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5527>
2020-06-22 10:59:45 +00:00
Rhys Perry
9a389322c4 nir: slight correction to cube_face_coord constant folding
ACO does the division with a rcp and then a multiplication.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5547>
2020-06-22 10:28:40 +00:00
Samuel Pitoiset
c95d258d1b aco: fix printing ASM on GFX6-7 if clrxdisasm is not found
Fixes some dEQP-VK.pipeline.executable_properties.* which expect
a valid string to be returned.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5560>
2020-06-22 10:38:33 +02:00
Neil Roberts
053df9bd8f v3d: Let scheduler know GS doesn’t have shared I/O memory
Unlike the vertex shaders, the memory for inputs and outputs is stored
in separate segments so the scheduler doesn’t need to serialise them.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5561>
2020-06-22 08:23:06 +02:00
Neil Roberts
ed29b576cb nir/scheduler: Add an option to specify what stages share memory for I/O
The scheduler has code to handle hardware that shares the same memory
for inputs and outputs. Seeing as the specific stages that need this is
probably hardware-dependent, this patch makes it a configurable option
instead of hard-coding it to everything but fragment shaders.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5561>
2020-06-22 08:23:06 +02:00
Neil Roberts
28e3209985 nir/schedule: Store a pointer to the scoreboard in nir_deps_state
nir_deps_state is a struct used as a closure for calculating the
dependencies. Previously it had two fields copied out of the scoreboard.
The closure is initialised in two seperate places. In order to make it
easier to access other members of the scoreboard in the callbacks in
later patches, the closure now just contains a pointer to the scoreboard
and the two bits of copied information are removed.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5561>
2020-06-22 08:23:06 +02:00
Neil Roberts
0a18c935e1 v3d: Remove unused member of v3d_compile
It looks like gs_input_sizes was added when GS shaders were implemented
but it was never used anywhere.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5561>
2020-06-22 08:23:06 +02:00
Neil Roberts
df8dc30cea nir/scheduler: Handle nir_intrinsic_load_per_vertex_input
load_per_vertex_input should probably be handled in the same way as a
regular load_input. I think the nir_schedule pass was written before V3D
had geometry shader support, so that is probably why it hasn’t taken
this into account until now.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5561>
2020-06-22 08:23:06 +02:00
Karol Herbst
281f777433 gv100/ir: fix OP_TXG for shadow textures
doesn't seem to fix any tests now, but the previous code was obviously
incorrect and I still see fails in those CTS tests:

KHR-GL46.texture_gather.*depth*

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5576>
2020-06-22 00:56:00 +02:00
Karol Herbst
42b9aa5f5c gv100/ir: fix shift lowering
Wrap was ignored. Also merge functions to share code.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5576>
2020-06-22 00:55:57 +02:00
Karol Herbst
a5445010e4 gv100/ir: fix atom cas
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5576>
2020-06-22 00:55:52 +02:00
Jonathan Marek
eb6c546493 freedreno/a4xx: simplify setup_slices
Note: untested

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5132>
2020-06-21 21:11:50 +00:00
Jonathan Marek
6c92a4004c freedreno/a4xx: restore pitch to bytes change to layout code
I lost this change when rebasing the commit moving this.

Fixes: aa2186db0 ("freedreno: move a4xx specific layout code to a4xx code")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5132>
2020-06-21 21:11:50 +00:00
Mario Kleiner
2cc51b0dff vulkan/wsi: Really terminate DRM lease in wsi_release_display().
wsi_release_display() implements vkReleaseDisplayEXT() which
is supposed to return control to the lessor of an output
upon call.

We need to terminate the wsi->wait_thread when close()'ing
the wsi->fd, otherwise the wait_thread holds another reference
to the wsi->fd, keeping the lease active, and thereby the
leased output blocked, until vkDestroyInstance() is called.

This gives users their GUI back, instead of extended darkness.

Fixes: 352d320a07 ("vulkan: Add EXT_direct_mode_display [v2]")
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5396>
2020-06-21 11:20:54 +00:00
Rob Clark
82815bc980 freedreno/ir3: split ubo analysis/lowering passes
Since binning pass variants share the same const_state with their
draw-pass counterpart, we should re-use the draw-pass variant's ubo
range analysis.  So split the two functions of the existing pass
into two parts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5526>
2020-06-21 00:52:02 +00:00
Rob Clark
e0f93f6898 freedreno/ir3: splitup get_existing_range()
This serves two purposes, one during ubo range analysis, where we want
to create new ranges, and another during the actual ubo lowering.  Split
these in two, with read-only ubo analysis state in the second case, to
prepare to split this pass in two.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5526>
2020-06-21 00:52:02 +00:00
Rob Clark
f2226acd74 freedreno/ir3: split out ubo info from range
Split out the description of the ubo from the ubo-range.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5526>
2020-06-21 00:52:02 +00:00
Jonathan Marek
0c32403c73 turnip: remove unnecessary OVERFLOW_FLAG_REG check
The HW deals with overflow automatically, and presumably does it better
(only disabling for pipes that had overflow, and using the visiblity data
available before the overflow)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5565>
2020-06-20 19:31:48 +00:00
Jonathan Marek
df2e54f7d4 freedreno/a6xx: remove unnecessary OVERFLOW_FLAG_REG check
The HW deals with overflow automatically, and presumably does it better
(only disabling for pipes that had overflow, and using the visiblity data
available before the overflow)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5565>
2020-06-20 19:31:48 +00:00
Jonathan Marek
ffecaedf69 freedreno/a6xx: VSC "STRM_ARRAY_PITCH" is "STRM_LIMIT"
This was being set wrong in both freedreno and turnip, and setting it
correctly should avoid hangs when there is overflow.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5565>
2020-06-20 19:31:48 +00:00
Rhys Perry
c977567db6 radv: enable radv_no_dynamic_bounds for more Path of Exile executables
It looks like there's also a standalone version and a 32-bit version.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5574>
2020-06-20 11:46:12 +01:00
Erik Faye-Lund
08f64f91d1 gallium/util: add missing include
This source-file uses PIPE_OS_WINDOWS to enable the Windows
functionality. But witout including p_config.h, this pre-processor
symbol won't be defined at all.

Let's fix this by adding the missing include, enabling stack-traces on
Windows.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>
2020-06-20 06:51:54 +00:00
Erik Faye-Lund
2d6059d887 gallium/util: limit STACK_LEN on Windows
The Windows implementation of debug_backtrace_capture has a limiation
of max 62 frames in total. Subtract a start-frame of 1 and the wrapping
functions frame, and we land at 60.

So let's lower this number on Windows to avoid triggering an assert.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>
2020-06-20 06:51:54 +00:00
Erik Faye-Lund
e6fa8ed968 graw/gdi: do not depend on UNICODE macro
Similar to the previous patch, we currently depend on the UNICODE macro
not being set, but it sometimes ends up getting set after all.

Unlike the previous patch, the easier thing to do here, is to lean into
the Unicode wrappers, and use the TEXT()-macro to define a Unicode
or ASCII literal, depending on the setting of the UNICODE macro.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>
2020-06-20 06:51:54 +00:00
Erik Faye-Lund
eda6841420 gallium/os: call "ANSI" version of GetCommandLine
The GetCommandLine API comes in two versions, GetCommandLineA (which
returns "ANSI" results), and GetCommandLineW which returns UTF-16
("WIDE") results. Then finally, windows.h provides a wrapper-macro that
defines GetCommandLine to either of the two, based on the setting of
the UNICODE macro.

More information about this mechanism can be found here:
https://docs.microsoft.com/en-us/windows/win32/intl/unicode-in-the-windows-api

For some reason, the UNICODE macro is set during build, even if we're
not explicitly setting it. This leads to us trying to cast a UTF-16
result to a char-pointer, which is obviously not going to do the right
thing.

So let's be defensive, and just call GetCommandLineA directly instead.
This avoids us depending on the setting of the UNICODE-macro in the
first place.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>
2020-06-20 06:51:54 +00:00
Arcady Goldmints-Orlov
04f77595f0 intel/compiler: Always apply sample mask on Vulkan.
With OpenGL, shader writes to the sample mask are ignored when not
rendering to a multisample render target. However, on Vulkan, writes to
the sample mask have still have their effect in that case.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3016

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5156>
2020-06-19 20:24:11 -05:00
Rhys Perry
19b2ac2bb9 radv: enable radv_no_dynamic_bounds for Path of Exile
To workaround game bugs. This also enables it for the D3D11 renderer but
that shouldn't be an issue.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3081
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3084
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3080
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5569>
2020-06-19 23:53:47 +00:00
Rhys Perry
f4a643f65e radv: add new drirc option radv_no_dynamic_bounds
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5569>
2020-06-19 23:53:47 +00:00
Nanley Chery
3915b56e39 iris: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>
2020-06-19 23:32:29 +00:00
Nanley Chery
2305ab6938 iris: Refactor modifier_is_supported for gen12
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>
2020-06-19 23:32:29 +00:00
Nanley Chery
c19492bcdb iris: Handle importing aux-enabled surfaces on TGL
Ensure main surfaces are properly 64KB-aligned (as suggested by Jordan)
and map the main surface addresses to aux surface addresses on import.

v2. Add a Bspec quote. (Sagar)
v3. Add a bit more to the Bspec comment. (Ken)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v2)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>
2020-06-19 23:32:29 +00:00
Nanley Chery
4ed6e43988 gallium/dri2: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS
Add a case for this modifier in dri2_get_modifier_num_planes.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>
2020-06-19 23:32:29 +00:00
Nanley Chery
b25fedeff9 isl/drm: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS
Add an entry for this modifier in the modifier_info array.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>
2020-06-19 23:32:29 +00:00
Nanley Chery
9dea3e1b47 iris: Use ISL_AUX_USAGE_GEN12_CCS_E on gen12
Makes iris pass a subtest of the fcc-write-after-clear piglit test
(fast-clear tracking across layers 1 -> 0 -> 1) on gen12.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5363>
2020-06-19 22:41:40 +00:00
Nanley Chery
230952c210 iris: Don't support sRGB + Y_TILED_CCS on gen9
Delete some code that would otherwise need updating for
ISL_AUX_USAGE_GEN12_CCS_E.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5363>
2020-06-19 22:41:40 +00:00
Nanley Chery
db5d98cde8 intel: Add ISL_AUX_USAGE_GEN12_CCS_E
Add a new aux usage which more accurately describes the behavior of
CCS_E on gen12. On this platform, writes using the 3D engine are either
compressed or substituted with fast-cleared blocks.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5363>
2020-06-19 22:41:40 +00:00
Eric Anholt
d9f7fce83c ci: Enable NIR validation on a630 GLES2 and VK tests.
We get through GLES2 in 5.5 minutes and the vk subset in 8 minutes, so we
can spare the CPU time on these tests.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5554>
2020-06-19 14:50:05 -07:00
Eric Anholt
6ee80d8e0c ci: Bump vulkan CTS to 1.2.3.0.
Looks like it fixes some potentially important VK test bugs.  But also, it
fixes the GLES31 SSBO layout tests to not be so excessively large, so we
can run them in a reasonable time now.  Note that a630 fail list is reset,
since the test list has changed and so we end up with a different subset
of tests being run.  Interestingly, in the process the semaphore tests are
now reporting "NotSupported (Exporting and importing semaphore type not
supported at vktSynchronizationSignalOrderTests.cpp:513)" where they
weren't before.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5554>
2020-06-19 14:50:05 -07:00
Nanley Chery
f8961ea086 iris: Disable sRGB fast-clears for non-0/1 values
For texturing and draw calls, HW expects the clear color to be in two
different color spaces after sRGB fast-clears - sRGB in the former and
linear in the latter. Up until now, iris has stored the clear color in
the sRGB color space. Limit the allowable clear colors for sRGB
fast-clears to 0/1 so that both color space requirements are satisfied.

Makes iris pass the sRGB -> sRGB subtest of the fcc-write-after-clear
piglit test on gen9+.

v2:
* Drop iris_context::blend_enables. (Ken)
* Drop some more resolve-related blend-state-tracking code.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>
2020-06-19 21:03:31 +00:00
Nanley Chery
48a3f4c44b iris: Avoid fast-clear with incompatible view
For rendering operations, avoid adding or using fast-cleared blocks if
the render format is incompatible with the clear color interpretation.
Note that the clear color is currently interpreted through the
resource's surface format.

Makes iris pass subtests of the fcc-write-after-clear piglit test:

* UNORM -> SNORM, partial block on gen8+.
* linear -> sRGB, partial block on gen9+.
* UNORM -> SNORM, full block on gen12.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>
2020-06-19 21:03:31 +00:00
Nanley Chery
fbbf79377b iris: Remove the CCS_D fallback
Remove the CCS_D fallback logic so that iris doesn't attempt to use a
non-existent surface state for some renders. Also, add an assertion to
catch the issue.

The fallback in iris_resource_render_aux_usage can lead to this problem
because it doesn't account for the fact that surface states created from
resources with the Y_TILED_CCS modifier may only have CCS_E or NONE as
aux usages (due to iris_resource_create_with_modifiers).

Without this change, the next commit would have triggered the fallback
and regressed the following tests on gen9:

* dEQP-EGL.functional.wide_color.window_888_colorspace_srgb
* dEQP-EGL.functional.wide_color.window_8888_colorspace_srgb
* dEQP-EGL.functional.wide_color.pbuffer_888_colorspace_srgb
* dEQP-EGL.functional.wide_color.pbuffer_8888_colorspace_srgb

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>
2020-06-19 21:03:31 +00:00
Nanley Chery
e533232d8c iris: Drop can_fast_clear_color's format parameter
Pull the resource's format from the pipe_resource instead. Makes the
changes in later commits more obvious.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>
2020-06-19 21:03:31 +00:00
Eric Engestrom
7b7d28ed6d docs: move "stable" tag explanation next to Fixes:
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>
2020-06-19 19:51:53 +00:00
Eric Engestrom
a096d41094 docs: move Fixes: tag explanation to its own section
This also adds the ability to link directly to it:
https://mesa3d.org/submittingpatches.html#fixes

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>
2020-06-19 19:51:53 +00:00
Eric Engestrom
7488d49107 docs: make it clear that the tags needs to be in the commit message
Some people have been putting them only in the MR description, which
isn't picked up by our tools. (Note that doing both doesn't hurt.)

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>
2020-06-19 19:51:53 +00:00
Eric Engestrom
731465192a docs: reword a sentence a bit
The "that you know ahead of time" bit just sounded weird as everything on this
page except the backport MR only applies if you know it "ahead of time".

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>
2020-06-19 19:51:53 +00:00
Eric Engestrom
5d27d5eb61 docs: add some formatting to the "backport merge request" option
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>
2020-06-19 19:51:53 +00:00
Eric Engestrom
0e4eb7b86d docs: prefer Fixes: over Cc: mesa-stable
`Fixes:` targets a specific commit and as such is much more precise and
useful than `Cc: mesa-stable`, so let's prefer it when applicable.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>
2020-06-19 19:51:53 +00:00
Eric Engestrom
8fd9893123 docs: drop git sendemail instructions
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>
2020-06-19 19:51:53 +00:00
Eric Engestrom
a29a1588b1 docs: reword "sending a patch revision" to "updating a merge request"
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>
2020-06-19 19:51:53 +00:00
Eric Engestrom
fdebba2770 docs: stop considering Cc: mesa-stable as an email address
Our tools haven't needed more than this ^ for a while, and the historical
reasons this used to be an email address don't matter anymore.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>
2020-06-19 19:51:53 +00:00
Kristian H. Kristensen
b1a98a1107 freedreno/a6xx: Set index buffer size to bo size
The number of vertices may be out of bound and if we use it for
computing index buffer size we may get too big a size.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5552>
2020-06-19 19:25:34 +00:00
Kristian H. Kristensen
2580e4f921 freedreno/a6xx: Don't write REG_A6XX_RB_SRGB_CNTL in restore
We configure this as part of MRT set up.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5552>
2020-06-19 19:25:34 +00:00
Jason Ekstrand
77c50891b6 anv: Use resolve_device_entrypoint for dispatch init
There's no good reason to have the "which table do I use?" code
duplicated twice.  The only advantage to the way we were doing it before
was that we could move the switch statement outside the loop.  If this
is ever an actual device initialization perf problem that someone cares
about, we can optimize that when the time comes.  For now, the
duplicated cases are simply a platform-enabling pit-fall.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5530>
2020-06-19 19:13:56 +00:00
Eric Engestrom
e94a122642 docs: suggest alternative installation methods for meson
A couple of popular distros have a habit of never updating anything.
Point their users towards ways of using current versions of meson anyway.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2988>
2020-06-19 18:05:25 +00:00
Brian Ho
cca9aa4dfd turnip: Fill out VkPhysicalDeviceSubgroupProperties
This commit fills out VkPhysicalDeviceSubgroupProperties if present
in a VkPhysicalDeviceProperties2. The values here are simply pulled
from the blob.

Fixes some flakes in dEQP-VK.subgroups.* since dEQP was reading
uninitialized values of VkPhysicalDeviceSubgroupProperties.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5564>
2020-06-19 17:49:09 +00:00
Mike Blumenkrantz
292ade3c9d zink: use int assignment for vk int type
this breaks 32bit builds that use -Werror=int-conversion

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5545>
2020-06-19 17:31:51 +00:00
Rob Clark
8f11cc4cad freedreno/ir3: move output_loc to variant
This moves the last bit of important state to be serialized from
ir3_shader to ir3_shader_variant.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark
640ff0e847 freedreno/ir3: move const_state back to variant
For shader-cache, we want to not have anything important in `ir3_shader`.
And to have shader variants with lower const size limits (to properly
handle cross-stage limits), we also want variants to be able to have
their own const_state.

But we still need binning pass shaders to align with their draw pass
counterpart so that the same const emit can be used for both passes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark
00926954c3 freedreno/ir3: un-embed const_state
Make it an rzalloc'd ptr instead of embedded struct, so it can serve as
the mem ctx for immediates.  This gets rid of needing to explicitly free
the immediates, so one less thing to deal with when moving const_state.
(Also, after we move const_state to the shader variant, we won't need
one for binning pass variants)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark
ab74b792d4 freedreno/ir3: move num_reserved_user_consts out of const_state
When we move const_state to the variant, this will need to stay in the
shader, as it applies to all variants (and we need to store it somewhere
before we have any variants)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark
74140c2e85 freedreno/ir3: convert over to ralloc
The `ir3_shader` is the root mem ctx, with `ir3_shader_variant` hanging
off that, and various variant specific allocations hanging off the
variant.

This lets us delete a bunch of cleanup code.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark
6039d083f7 freedreno/ir3: pass variant to ir3_create()
Prep to convert over to ralloc.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Connor Abbott
65660622a1 ir3: Split out variant-specific lowering and optimizations
It seems a lot of the lowerings being run the second time were
unnecessary. In addition, when const_state is moved to the variant,
then it will become impossible to know ahead of time whether a variant
needs additional optimizing, which means that ir3_key_lowers_nir() needs
to go away. The new approach should have the same effect, since it skips
running lowerings that are unnecessary and then skips the opt loop if no
optimizations made progress, but it will work better when we move
ir3_nir_analyze_ubo_ranges() to be after variant creation.

The one maybe controversial thing I did is to make
nir_opt_algebraic_late() always happen during variant lowering. I wanted
to avoid code duplication, and it seems to me that we should push the
_late variants as far back as possible so that later opt_algebraic runs
don't miss out on optimization opportunities.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark
f4654c458f freedreno/ir3: constify shader key
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark
91ed8b7fe3 freedreno/ir3: drop shader->num_ubos
The only difference between this and `const_state->num_ubos` was that
the latter is counting # of ubos loaded via `ldg` (based on UBO addrs
in push-consts).  But turns out there isn't really any reason to care.
Instead just add an early return in the one code-path that cares about
the number of `ldg` UBOs.

This gets rid of one more thing we need to move from `ir3_shader` to
`ir3_shader_variant`.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark
70fbd48b3a freedreno/ir3: move ubo_state into const_state
As with const_state, this will also need to move into the variant.  To
simplify that, just move it into the const_state itself, since after all
it is related.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark
a8b995c055 freedreno/a6xx: defer userconst cmdstream size calculation
The `ubo_state` will also need to move to `ir3_shader_variant`.  But we
can prepare for that and simplify things a bit if we calculate the
cmdstream on first emit, once we already have the appropriate variant.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark
bd55533f5b freedreno/ir3: add accessor for const_state
We are going to want to move this back to the variant, and come up with
a different strategy for binning/nonbinning to share the same constant
layout, in order to implement shader-cache support.  (Since then we
can have a mix of dynamically compiled variants and cache hits, so there
is no good place to serialize the const-state.)

To reduce the churn as we re-arrange things, move direct access to the
const-state to a helper fxn.  This patch is the boring churny part.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark
1e8808a4a0 freedreno/ir3: refactor out helper to compile shader from asm
Deduplicate a bit of hand-building of ir3_shader/_variant from
computerator and delay test.  This also removes the need for
external things to depend on generated ir3_parser header.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Pierre-Eric Pelloux-Prayer
b6db703e0f st/mesa: make texture views inherit compressed_data storage
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2775
Fixes: c3fafa127a ("st/mesa: generalize code for the compressed texture map/unmap fallback")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5492>
2020-06-19 10:39:08 +02:00
Pierre-Eric Pelloux-Prayer
993c64e6fe ac/llvm: load 1 byte at a time if unaligned on gfx10
If buffer or stride is unaligned we use the same trick as on gfx6:
load 1 byte at a time and recompose the output if needed.
This change fixes lots of deqp/glcts tests:
  - dEQP-GLES2.functional.draw.random.1, 10, ...
  - dEQP-GLES2.functional.vertex_arrays.multiple_attributes.stride.3_float2_0_float2_0_float2_17, ...
  - dEQP-GLES2.functional.vertex_arrays.single_attribute.first.byte_first24_offset1_stride2_quads256, ...
  - dEQP-GLES2.functional.vertex_arrays.single_attribute.strides.buffer_0_17_byte2_vec4_dynamic_draw_quads_1, ...
  - dEQP-GLES31.functional.draw_indirect.random.14, ...

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5502>
2020-06-19 09:20:16 +02:00
Gert Wollny
bddfbfcb56 r600/sfn: Handle memory_barrier
I'm not sure whether this should actually be a barrier accross all
shader processing units, the TGSI code path seems to handle this
only by using GROUP_BARRIER, so let's do the same here.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>
2020-06-19 06:58:07 +00:00
Gert Wollny
34e15cd610 r600/sfn: Take SSBO buffer ID offset into account
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>
2020-06-19 06:58:07 +00:00
Gert Wollny
5aef9ea2a3 r600/sfn: Add support for reading cube image array dim.
The cube array size can't be queried directly, the number of array
elements must be passed via a constant buffer.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>
2020-06-19 06:58:07 +00:00
Gert Wollny
e458683a52 r600/sfn: Add support for image_size
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>
2020-06-19 06:58:07 +00:00
Gert Wollny
249dbcb769 r600/sfn: Add imageio support
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>
2020-06-19 06:58:07 +00:00
Gert Wollny
b303540c48 r600/sfn: lower image derefs
v2: Signal lowering image derefs by using the CAP

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>
2020-06-19 06:58:07 +00:00
Samuel Pitoiset
2ac5cce1a1 radv: require LLVM 11+ for GFX 10.3 if not using ACO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>
2020-06-19 08:18:43 +02:00
Samuel Pitoiset
dc698fb5dc radv: add support for Sienna Cichlid
Bits copied from RadeonSI. Totally untested.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>
2020-06-19 08:18:41 +02:00
Samuel Pitoiset
8c144482ea aco: replace == GFX10 with >= GFX10 where it's needed
Assume the GFX10.3 ISA is similar to GFX10 which is likely (except
possible minor changes and new instructions for raytracing).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>
2020-06-19 08:18:39 +02:00
Samuel Pitoiset
3c28438094 radv: replace == GFX10 with >= GFX10 where it's needed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>
2020-06-19 08:18:37 +02:00
Matt Turner
1f87106276 intel/tools: Add assembler tests for the cr0 register
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>
2020-06-19 02:10:40 +00:00
Matt Turner
e573f21edd intel/tools: Disallow control subregisters > 3
> 4 was probably a typo, since the documentation says that there are 4
subregisters (0-3).

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>
2020-06-19 02:10:40 +00:00
Matt Turner
cc6fc963f0 intel/tools: Require explicit regions/types for special regs
The docs say that these registers should  only be read with a certain
type, and I'm inclined to believe that the hardware behaves that way,
but it makes the assembler a little more confusing and also confuses the
user of the assembler that some operands don't take types or regions.

Just always requiring regions and types seems like the sensible thing.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>
2020-06-19 02:10:40 +00:00
Matt Turner
9feb6302f9 intel/tools: Drop srctype from ipreg
It's unused, and it would cause shift/reduce conflicts after the next
patch.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>
2020-06-19 02:10:40 +00:00
Matt Turner
27557e7110 intel/tools: Remove unnecessary reg number checking
a0 is the only address register, and cr0 is the only control register,
so there's no need to return the register number, espcially since the
lexer explicitly consumes "a0" and "cr0".

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>
2020-06-19 02:10:40 +00:00
Jonathan Marek
f8110226ba turnip: move enum translation functions to a common header
Instead of having these functions sprinkled around the driver (and ending
with a duplicated tu6_compare_func for example), move everything to a
common header (using the previously unused tu_util.h).

Also applied some simplifications: using a cast when the HW enum matches
the VK enum, and using a lookup table when it makes sense (which is IMO
nicer than the switch case way).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5538>
2020-06-18 19:45:44 +00:00
Rhys Perry
f7cc7079b0 aco: use the same regclass as the definition for undef phi operands
Subdword phis can't have SGPR operands on GFX6-8.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5544>
2020-06-18 17:29:33 +00:00
Rhys Perry
897a47d847 aco: fix edge check with sub-dword temporaries
Fixes RA failure for a parallel-rdp shader on pitcairn.

fossil-db (Navi):
Totals from 2 (0.00% of 128733) affected shaders:
CodeSize: 203656 -> 205724 (+1.02%)
Instrs: 32267 -> 32529 (+0.81%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5544>
2020-06-18 17:29:33 +00:00
Erik Faye-Lund
747e808697 mesa/main: fix inverted condition
I accidentally got one of the conditions wrong here. Sorry for the
mixup.

See ttps://gitlab.freedesktop.org/mesa/mesa/-/issues/3134 for details.

Fixes: b112e62ba4 ("mesa/main: do not allow MESA_ycbcr_texture enums on gles")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5532>
2020-06-18 17:07:14 +00:00
Karol Herbst
4bc5110eea nv50/ir/nir: remove image uniform hack
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Karol Herbst
c0bbca5c23 nv50/ir/nir: handle image atomic inc and dec
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Karol Herbst
3af27bb7de nv50/ir/nir: move away from image_deref intrinsics
v2: fix lod source of image operation correctly

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Karol Herbst
feb83f2f82 nir/lower_images: handle dec and inc
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Karol Herbst
43faa9ebb1 nir/lower_images: fix for array of arrays
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Karol Herbst
e35e0307cb st/mesa: lower images when needed
The "st/pbo download FS" builtin shader uses image derefs, so even with
PIPE_CAP_NIR_IMAGES_AS_DEREF set to 0 drivers ended up with those.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Rhys Perry
365d0aa6c5 aco: shrink mad_info
From 24 bytes to 16 bytes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5281>
2020-06-18 14:26:01 +00:00
Rhys Perry
917260710f aco: make ssa_info::label 64-bit
We'll probably need these extra bits in the future.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5281>
2020-06-18 14:26:01 +00:00
Rhys Perry
47ca84a96d aco: shrink ssa_info
Reorder members so that it's 16 bytes instead of 24.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5281>
2020-06-18 14:26:01 +00:00
Boyuan Zhang
19983d3d4a radeon/vcn: bump vcn3.0 encode major version to 1
And add quality params for this version

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:04 -04:00
Boyuan Zhang
2be131f538 radeon/vcn/enc: Re-write PPS encoding for HEVC
Due to hardware change on VCN3

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:03 -04:00
Thong Thai
9d5d4f9eaa radeon/vcn: add vcn 3.0 encode support
Signed-off-by: Thong Thai <thong.thai@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:03 -04:00
Leo Liu
946c5c6b75 radeon/vcn/dec: add db_aligned_height to message buffer
This is required for Sienna

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:03 -04:00
Leo Liu
384195b041 radeon/vcn: add Sienna to use internal register offset
And re-group them explicitly

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:03 -04:00
Leo Liu
909037b557 radeon/vcn: reset the decode flags from message buffer
This flag was never used by VCN previously, and now
it's used for feature that is not applied to us.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:03 -04:00
Daniel Schürmann
3817fa7a4d aco: fix WQM handling in nested loops
If on a nested loop
- the outer loop needs WQM but
- the inner loop doesn't need WQM and
- the break condition of the inner loop is computed in the outer loop
then it could happen that we transitioned to Exact before entering the inner loop
which could create an empty exec mask and lead to an infinite loop.

Fixes a GPU hang with RDR2

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5518>
2020-06-18 13:40:15 +00:00
Danylo Piliaiev
8ce8895b69 st/mesa: account for "loose", per-mipmap level textures in CopyImageSubData
We may have "loose", per-image gallium resources. The src_image->Level
may not match the gallium resource texture level. In such case it is
prescribed (in st_AllocTextureImageBuffer) to specify mipmap level
as zero.

Fixes: f04f13622f
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5477>
2020-06-18 11:44:14 +00:00
Gurchetan Singh
9760a7ed91 virgl: apply bgra dest swizzle and add Portal 2
Apply the destination swizzle on GLES games based on HL2 engine.
Also add Portal 2 since some people are experiencing issues with
that.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5481>
2020-06-18 10:35:52 +00:00
Jonathan Marek
c95b250a4c turnip: set the API version
Some CTS tests don't run because of this.

Fixes: 91c757b796 ("turnip: use the common code for generating extensions and dispatch tables")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5522>
2020-06-18 09:54:48 +00:00
Samuel Pitoiset
fa149b996d radv: only requires LLVM 9 for GFX10 if not using ACO
In case someone links RADV with LLVM 8 and wants to use ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5454>
2020-06-18 09:45:20 +00:00
Neil Armstrong
4cf4fe9d82 Revert "CI: Disable Panfrost Mali-T820 jobs"
This reverts commit 46a32f0b6b.

The lab has recovered health, thus re-enable T820 Panfrost jobs.

Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4727>
2020-06-18 09:28:38 +00:00
Neil Armstrong
4793c2bcb9 Revert "CI: Disable Lima jobs due to lab unhealthiness"
This reverts commit adeef43d15.

The lab has recovered health, thus re-enable Lima jobs.

Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4727>
2020-06-18 09:28:38 +00:00
Samuel Pitoiset
70cc80805c radv: compute CB_SHADER_MASK from the fragment shader outputs
The fragment shader doesn't necessarily output the number of components
expected by the target format.

Fixes new dEQP-VK.draw.output_location.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5427>
2020-06-18 09:16:04 +00:00
Samuel Pitoiset
b848d88059 radv: make sure to set CB_SHADER_MASK correctly for internal CB operations
It should be always set to 0xf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5427>
2020-06-18 09:16:04 +00:00
Erik Faye-Lund
270eeb4105 docs/features: remove driver-list for forward-compatible context
This is something that's supported by the Gallium state-tracker, there's
nothing to be done per driver here.
2020-06-18 11:04:54 +02:00
Erik Faye-Lund
eab3cabb9d docs/features: update ARB_texture_buffer_object line
This extension isn't just exposed in OpenGL 3.1 contexts any longer, and
Zink supports it. Let's mark it as such.
2020-06-18 11:04:54 +02:00
Erik Faye-Lund
2a6a21ceb3 docs/features: mark GL3 as complete for zink 2020-06-18 11:04:54 +02:00
Samuel Pitoiset
c4aa64b4c3 radv: lower discards to demote to workaround a RDR2 game bug
This fixes some sort of LOD issue.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5525>
2020-06-18 08:39:28 +02:00
Rob Clark
34499de5b3 glsl_to_nir: fix vote_any/vote_all
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>
2020-06-18 03:40:54 +00:00
Rob Clark
c9976f5e4a glsl_to_nir: fix shader_clock
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>
2020-06-18 03:40:54 +00:00
Rob Clark
8505e6757b glsl_to_nir: fix is_helper_invocation
Reported-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>
2020-06-18 03:40:54 +00:00
Rob Clark
f94ba1555d spirv: drop some dead code
This case is never hit, we don't have a nir intrinsic for this spirv
opcode.  And when we do, I'm not sure if it would be vectorized or not.
So best just to drop this case.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>
2020-06-18 03:40:54 +00:00
Rob Clark
f43a2cd1d9 spirv: atomic_counter_read_deref is not vectorized
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3141
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>
2020-06-18 03:40:54 +00:00
Jonathan Marek
0a84d22bf2 turnip: fix renderpass gmem configs when there are too many attachments
Since a value of at least "align" is used for nblocks, we might end up
with nblocks greater than the number of GMEM blocks remaining. Check for
this case and bail out, sysmem rendering will be used for such cases.

Fixes some of these tests:
dEQP-VK.pipeline.render_to_image.core.*.huge.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5499>
2020-06-18 03:15:27 +00:00
Jonathan Marek
b6b98e9510 turnip: fix a sample shading case
Check pipeline's sampleShadingEnable to enable sample shading.

Also fix behavior of gl_Fragcoord with sample shading.

Fixes at least:
dEQP-VK.pipeline.multisample.min_sample_shading.min_0_5.samples_4.primitive_triangle

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5499>
2020-06-18 03:15:27 +00:00
Jonathan Marek
ff2efd095e turnip: fix a crash when rasterizerDiscardEnable is set
pMultisampleState needs to be ignored when rasterizerDiscardEnable, so the
current code can crash when trying to load msaa_info->pNext.

At the same time this simplifies tu_pipeline_shader_key_init a bit, by not
calling it for the compute shader case (which doesn't need to set anything
in the key struct).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5499>
2020-06-18 03:15:26 +00:00
Eric Engestrom
31a66cbe5d docs: remind release maintainers to sign the tarballs and publish their key
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2857>
2020-06-18 03:13:47 +00:00
Eric Engestrom
c75e46f6d6 docs: publish our release maintainers' keys
They should be published to various key servers as well, but this
provides the authoritative source for their list.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2140
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2857>
2020-06-18 03:13:47 +00:00
Rob Clark
1d54fb5b2b freedreno/ir3: update obsolete comment
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
5baf430261 freedreno/computerator: MERGEDREGS update
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
0e0d4daa5b turnip: set .MERGEDREGS based on variant
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
c6632c087d freedreno/a6xx: set .MERGEREGS based on variant
Also set HALFREGFOOTPRINT, since in the non-mergeregs case this will be
non-zero.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
1cc4cf141a freedreno/ir3: make mergedregs a property of the variant
Rather than assuming a6xx+ means mergedregs.  We can actually (mostly?)
do splitregs on a6xx as well.  And GS/DS/HS currently require it, which
might be papering over a bug, or might be something to do with how
chaining shaders works.  At any rate, we should at least be consistent,
and not have the compiler thinking we are doing mergedregs when we are
actually doing splitregs.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
c052087038 freedreno/ir3: re-work assembler API
Just pass thru the variant, since it has everything we need.  And
will be needed in the next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
ffe62e1b6c freedreno/ir3: pass variant to postsched
Prep for the next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
38df3f899d freedreno/ir3: decouple regset from gpu gen
Allow different regset's to coexist, so we can make mergedregs vs split
reg file a variant property.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
47decc88c2 freedreno/ir3: move mergedreg state out of reg
It is only needed one place, let's move it there.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
46cdcf590b freedreno/ir3: convert regmask_t to struct
Prep to make merged/split register file mode a property of the regmask,
rather than the ir3_register.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Jonathan Marek
d53dc6c376 freedreno/fdl6: rework layout code a bit (reduce linear align to 64 bytes)
Reduce linear alignment, and rework the layout code a bit.

This rework has a side effect of also increasing the alignment on linear
levels of tiled (non-ubwc) cpp=1 and cpp=2 layouts. Since we should be
UBWC for those cases anyway, its not a big loss.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5013>
2020-06-18 02:26:43 +00:00
Jonathan Marek
3a9ab3b6e9 freedreno/a6xx: FETCHSIZE is PITCHALIGN
"FETCHSIZE" is actually a "minimum pitch" or "pitchalign" value that's
relevant for mipmaps. The 0 value means 64-bytes. Understanding this allows
some simplifications and will make it possible to use less alignment on
linear formats.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5013>
2020-06-18 02:26:43 +00:00
Eric Engestrom
6269405a2b virgl: replace all dup() with os_dupfd_cloexec()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
526910e8fa svga: replace all dup() with os_dupfd_cloexec()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
9ca2a4e6fc freedreno: replace all dup() with os_dupfd_cloexec()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
bd5cf70d3d etnaviv: replace all dup() with os_dupfd_cloexec()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
419b446e1e egl: replace all dup() with os_dupfd_cloexec()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
62797c30ed i965: replace all dup() with os_dupfd_cloexec()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
e0e9c2486d iris: replace all dup() with os_dupfd_cloexec()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
00defe2e0a anv: replace all dup() with os_dupfd_cloexec()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
405bffefe1 radv: replace all dup() with os_dupfd_cloexec()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
69269a46f1 vulkan/wsi: replace all dup() with os_dupfd_cloexec()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
4a8085d67c replace all F_DUPFD_CLOEXEC with os_dupfd_cloexec()
All squashed into a single commit because it shouldn't have any
behaviour change, except that it might work now on platforms where it
was broken because F_DUPFD_CLOEXEC is not supported but FD_CLOEXEC is.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
0e5ea7a363 util: introduce os_dupfd_cloexec() helper
Adapted from wayland's wl_os_dupfd_cloexec().

Suggested-by: Kristian H. Kristensen <hoegsberg@google.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Engestrom
b00e1d9ea7 util/os_file: replace broken windows-detection code with detect_os.h
The meson-windows-vs2019 job was going down the `!defined(WIN32)` path,
leading to a broken build once that path contained non-windows code.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5369>
2020-06-18 02:09:56 +00:00
Eric Anholt
bf63da3e95 ci: disable the windows tests until the runner can be stabilized again
I've been getting a stream of errors from Marge today like:

FAILED: src/gallium/drivers/llvmpipe/lp_test_conv.exe
link @src/gallium/drivers/llvmpipe/lp_test_conv.exe.rsp
LINK : fatal error LNK1102: out of memory
[1080/1141] Compiling C object src/gallium/frontends/wgl/945cc3d@@wgl@sta/stw_getprocaddress.c.obj

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5534>
2020-06-18 01:49:56 +00:00
Eric Engestrom
3e37b7e6bb docs: remove plain-text copy of versions.rst
There's no need to keep both, so let's clean things up a bit.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5178>
2020-06-18 00:39:36 +00:00
Eric Engestrom
9706b7238c khronos-update.py: add script to simplify update of Khronos headers & xml files
The idea is to have the canonical source of each of those files
available without having to remember anything, and to be able to update
all the Vulkan files by simply running `bin/khronos-update.py vulkan`.

The script also handles the fact all the EGL/GL/GLES* headers depend on
the KHR header, and the former should not be updated without updating
the latter.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5177>
2020-06-18 00:38:12 +00:00
Mike Blumenkrantz
e8ad52f7b0 zink: enable xfb extension in screen creation
switch around the feature enabling as well since extensions need the related
feature to also be enabled in order to function

fixes mesa/mesa#2868

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5163>
2020-06-17 20:42:01 +00:00
Mike Blumenkrantz
e5e657768c zink: switch to passing VkPhysicalDeviceFeatures2 in VkDeviceCreateInfo
extensions need to have their feature structs passed in pNext to be enabled,
so switch to using the feature struct here in preparation for that

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5163>
2020-06-17 20:42:01 +00:00
Mike Blumenkrantz
1983609212 zink: set PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED and remove POS special casing
this cap creates a different varying output which remains constant to be
emitted by xfb, allowing us to drop the special-casing code in ntv

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5163>
2020-06-17 20:42:01 +00:00
Mike Blumenkrantz
37778fcd9a zink: implement transform feedback support to finish off opengl 3.0
this adds:
* context hooks for gallium stream output methods
* handling for xfb-related queries
* barrier management for pausing and resuming xfb

loosely based on patches originally written by Dave Airlie <airlied@redhat.com>

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5163>
2020-06-17 20:42:01 +00:00
Mike Blumenkrantz
1b130c42b8 zink: implement streamout and xfb handling in ntv
this translates streamout info into xfb decorations and adds some workaround
handling for spurious gl_PointSize values

partly based on patches originally written by Dave Airlie <airlied@redhat.com>

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5163>
2020-06-17 20:42:01 +00:00
Mike Blumenkrantz
c3f6a59d57 zink: add spirv_builder methods for OpVectorExtractDynamic and OpVectorInsertDynamic
based on spirv specs

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5163>
2020-06-17 20:42:01 +00:00
Mike Blumenkrantz
14dbf51d7f zink: add spirv builder util functions for emitting xfb decorations
based on patches originally written by Dave Airlie <airlied@redhat.com>

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5163>
2020-06-17 20:42:01 +00:00
Mike Blumenkrantz
f841d11c9f zink: use '2' variants for device props/feats, check features for ext enabling
technically both the extension and feature should be checked when enabling
extensions, and some features cannot be properly enabled without using
the more descriptive versions of these APIs

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5163>
2020-06-17 20:42:00 +00:00
Jonathan Marek
9f24909b0b turnip: use u_format for packing gmem clear values
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5485>
2020-06-17 19:42:32 +00:00
Erik Faye-Lund
03e284ec9e docs: fixup relnotes after rst-conversion
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5468>
2020-06-17 18:44:32 +00:00
Samuel Pitoiset
51fb3b09dc radv/aco: enable FP16 features/extensions on GFX9+
This enables shaderFloat16, VK_AMD_gpu_shader_half_float and
VK_AMD_gpu_shader_int16.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5347>
2020-06-17 18:12:51 +02:00
Rhys Perry
abfe28a6bb aco: fix validation of opsel when set for the definition
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5521>
2020-06-17 15:48:35 +00:00
Jonathan Marek
f745ceecee turnip: use draw states for input attachments
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>
2020-06-17 15:32:30 +00:00
Jonathan Marek
159a1300ce turnip: input attachment descriptor set rework
Implement GMEM input attachments by using non-bindless texture state which
is emitted at the start of every subpass.

This achieves two things:
* More vulkan-like CmdBindDescriptorSets
* Fixing secondary command buffer input attachments with GMEM

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>
2020-06-17 15:32:30 +00:00
Jonathan Marek
233610f8cf turnip: refactor draw states and dynamic states
This reworks dynamic states to use draw states, and reworks draw states.

This moves towards doing as little as possible in bind_draw_states.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>
2020-06-17 15:32:30 +00:00
Jonathan Marek
62a4db4c0f turnip: delete dead dynamic state code
Remove unused code, split this out to reduce the diff in the next patch.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>
2020-06-17 15:32:30 +00:00
Jonathan Marek
aab3398b33 turnip: improve dirty bit handling a bit
This moves some logic out of bind_draw_states, moving towards the eventual
goal of doing very little in bind_draw_states.

Split this out as a separate patch to make the DIRTY_INPUT_ATTACHMENTS more
visible: it can be safely removed because pipelines are subpass specific,
so there will always be a pipeline change to go with the CmdBeginRenderPass
and CmdNextSubpass (the CmdBindPipeline may not be in the subpass, but the
draw that flushes the pipeline update will be).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>
2020-06-17 15:32:30 +00:00
Jonathan Marek
edb8c581db turnip: move descriptor set BO tracking to CmdBindDescriptorSets
This avoids the duplicated code.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>
2020-06-17 15:32:30 +00:00
Jonathan Marek
5ef0f9f622 turnip: compute and graphics have completely separate state
The comment about fragment shader state overwriting compute shader state
is wrong, if either path is overwriting the other's state then it is a
mistake.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>
2020-06-17 15:32:30 +00:00
Connor Abbott
a3464c567c tu: Actually remove dead variables after io lowering
I forgot that their derefs would still be lying around, so we need to
eliminate them first.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5519>
2020-06-17 14:36:50 +00:00
Connor Abbott
168c42290f ir3: Don't calculate num_samp ourselves
In addition to duplicating what core NIR does better, this was wrong for
Vulkan, where it should be 0 as there are no non-bindless samplers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5519>
2020-06-17 14:36:50 +00:00
Connor Abbott
568e06b3a6 tu: Set num_components to 0 when building bindless intrinsics
Fixes: 167fa288 (" nir/validate: validate intr->num_components")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5520>
2020-06-17 15:49:40 +02:00
Connor Abbott
6fcbce3b99 tu: Remove tu_shader_compile_options
The only two fields were always true, and I don't think we'd ever have
use for them. If we want to disable optimizations then we'd need a
different approach, and I don't even know what include_binning_pass was
for.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>
2020-06-17 13:13:05 +00:00
Connor Abbott
808992fc50 tu: Use the ir3 shader API
This will be necessary once we start compiling multiple variants due to
different const size limits, and it will also be necessary for properly
implementing the pipeline cache.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>
2020-06-17 13:13:05 +00:00
Connor Abbott
b1700698a5 tu: Remove num_samp hack
Delete the variables so that ir3 thinks there are no samplers and
images instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>
2020-06-17 13:13:05 +00:00
Connor Abbott
6f2981176d ir3: Pass reserved_user_consts to ir3_shader_from_nir()
ir3_shader_from_nir() calls ir3_optimize_nir(), which currently sets up
the const state. However, we need to know the number of user consts
reserved by the driver before setting up the const state, which means
that this information needs to be passed into ir3_shader_from_nir()
somehow rather than being set in the shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>
2020-06-17 13:13:05 +00:00
Alyssa Rosenzweig
89c8393a16 pan/mdg: Reassociate adds for multiply-by-two
Only a single shader-db change it looks like, and not even from
scheduling, no fun.

instructions helped:   shader31 MESA_SHADER_FRAGMENT:                    64 -> 63 (-1.56%)
quadwords helped:   shader31 MESA_SHADER_FRAGMENT:                    66 -> 65 (-1.52%)
registers HURT:   shader31 MESA_SHADER_FRAGMENT:                    2 -> 3 (50.00%)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>
2020-06-17 12:57:34 +00:00
Alyssa Rosenzweig
a3348f88c8 pan/mdg: Canonicalize (x * 2.0) to (x + x)
This lets the previous commit kick in to schedule to either a multiply
or an add. GLES2 shader-db:

total instructions in shared programs: 50514 -> 50459 (-0.11%)
instructions in affected programs: 7436 -> 7381 (-0.74%)
helped: 14
HURT: 7
helped stats (abs) min: 2 max: 8 x̄: 5.00 x̃: 5
helped stats (rel) min: 0.95% max: 1.14% x̄: 1.07% x̃: 1.08%
HURT stats (abs)   min: 2 max: 3 x̄: 2.14 x̃: 2
HURT stats (rel)   min: 0.85% max: 8.57% x̄: 2.73% x̃: 1.26%
95% mean confidence interval for instructions value: -4.37 -0.87
95% mean confidence interval for instructions %-change: -0.91% 1.31%
Inconclusive result (%-change mean confidence interval includes 0).

total bundles in shared programs: 25680 -> 25573 (-0.42%)
bundles in affected programs: 6148 -> 6041 (-1.74%)
helped: 37
HURT: 7
helped stats (abs) min: 1 max: 9 x̄: 3.14 x̃: 2
helped stats (rel) min: 0.63% max: 8.33% x̄: 2.02% x̃: 2.13%
HURT stats (abs)   min: 1 max: 2 x̄: 1.29 x̃: 1
HURT stats (rel)   min: 0.88% max: 11.11% x̄: 3.92% x̃: 1.30%
95% mean confidence interval for bundles value: -3.32 -1.54
95% mean confidence interval for bundles %-change: -2.00% -0.14%
Bundles are helped.

total quadwords in shared programs: 40887 -> 40815 (-0.18%)
quadwords in affected programs: 14203 -> 14131 (-0.51%)
helped: 61
HURT: 2
helped stats (abs) min: 1 max: 4 x̄: 1.21 x̃: 1
helped stats (rel) min: 0.16% max: 11.11% x̄: 1.11% x̃: 0.57%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 2.86% max: 4.00% x̄: 3.43% x̃: 3.43%
95% mean confidence interval for quadwords value: -1.32 -0.96
95% mean confidence interval for quadwords %-change: -1.46% -0.48%
Quadwords are helped.

total registers in shared programs: 3916 -> 3913 (-0.08%)
registers in affected programs: 46 -> 43 (-6.52%)
helped: 5
HURT: 1
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 10.00% max: 33.33% x̄: 14.89% x̃: 10.00%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for registers value: -1.79 0.79
95% mean confidence interval for registers %-change: -33.51% 25.37%
Inconclusive result (value mean confidence interval includes 0).

total threads in shared programs: 2455 -> 2454 (-0.04%)
threads in affected programs: 5 -> 4 (-20.00%)
helped: 1
HURT: 1
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%

total loops in shared programs: 6 -> 6 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 168 -> 168 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0

total fills in shared programs: 186 -> 186 (0.00%)
fills in affected programs: 0 -> 0
helped: 0
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>
2020-06-17 12:57:34 +00:00
Alyssa Rosenzweig
6318e46141 pan/mdg: Allow scheduling "x + x" to multipliers
One of the neat things with Midgard's wacky VLIW... on VADD/SADD this is
(x + x) literally, on VMUL/SMUL/VLUT this is (x * 2.0) where the 2.0 is
exactly representable in FP16 so it fits nicely as an inline constant.
So we don't need to restrict its scheduling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>
2020-06-17 12:57:34 +00:00
Alyssa Rosenzweig
bc356abea3 pan/mdg: Factor out unit check
We'd like to do something a bit more complicated.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>
2020-06-17 12:57:34 +00:00
Rhys Perry
de7c6950b3 aco: fix sub-dword opsel/sdwa checks
These should all check if the operand has a regclass. The opsel check
should also be skipped post-RA.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5504>
2020-06-17 10:57:17 +00:00
Rhys Perry
1e791e51a6 aco: fix validation error from vgpr spill/restore code
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5504>
2020-06-17 10:57:17 +00:00
Jonathan Marek
d37deebde5 turnip: fix cubic filtering with CmdBlitImage
This fixes the newly added cubic blit_image tests for A650, by falling back
to the 3D path and setting the filter correctly.

Note: there are still failures with the texture filtering tests.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5509>
2020-06-17 08:50:42 +00:00
Jonathan Marek
198b13974a turnip: fix 3D path always being used for CmdBlitImage
This change accidentally made it into 72d7df40a5, and started causing
blit_image flakes (because of the issue fixed in the previous patch)

Fixes: 72d7df40a5 ("turnip: add layered 3D path clear for CmdClearAttachments")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5509>
2020-06-17 08:50:42 +00:00
Jonathan Marek
1622787ee4 turnip: set VFD_INDEX_OFFSET in 3D clear/blit path
This was missing an causing flakes when used after a test that set it to
a non-zero value.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5509>
2020-06-17 08:50:42 +00:00
Samuel Pitoiset
4d13e35315 spirv: do not set num_components for non-vectorized mbcnt_amd intrinsic
Fixes: 167fa2887f ("nir/validate: validate intr->num_components")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5493>
2020-06-17 06:57:13 +00:00
Timothy Arceri
b2e9d21fdd st_glsl_to_nir: fix potential use after free
When updating the shader info used by GL for the API we must
remember to make sure to restore the pointers to its own name
and label strings. There are a number of ways in which the nir
copy of these strings can be freed before GL is finished with
them.

Fixes: 36be8c2fcf ("st/glsl_to_nir: use nir_shader_gather_info()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2875

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5488>
2020-06-17 11:35:38 +10:00
Timothy Arceri
7e8e02d543 glsl: small optimisation fix for uniform array resizing
The fix in the previous patch removed an erronous attempt to skip
resizing variable types in each stage. Now that has been removed
iterating over each shader stage is no longer required here.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5487>
2020-06-17 01:06:27 +00:00
Timothy Arceri
a5d3e061af glsl: fix uniform array resizing in the nir linker
The initial support tried to match uniform variables from different
shaders based on the variables pointer. This will obviously never
work, instead here we use the variables name whcih also means we
must disable this optimisation for spirv.

Using the base variable name works because when collecting uniform
references we never iterate past the first array dimension, and
only support resizing 1D arrays (we also don't support resizing
arrays inside structs).

We also drop the resized bool as we can't skip processing the var
just because is was resized in another shader, we must resize
the var in all shaders.

Fixes: a34cc97ca3 ("glsl: when NIR linker enable use it to resize uniform arrays")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3130

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5487>
2020-06-17 01:06:27 +00:00
Iván Briano
f63a578100 anv: Add VK_EXT_custom_border_color to relnotes
Missed it on 5425968d2e

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>
2020-06-17 00:48:39 +00:00
Iván Briano
ed7bebc17b anv: enable VK_EXT_pipeline_creation_cache_control
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>
2020-06-17 00:48:39 +00:00
Iván Briano
23633f6c69 anv: implement VK_PIPELINE_CREATE_FAIL_ON_PIPELINE_COMPILE_REQUIRED_BIT_EXT
v2:
* Set pPipeline to NULL in the corresponding
  graphics/compute_create_pipeline function.
* Keep current ANV behavior of bailing on the first real error.

v3:
* Don't return early if the pipeline succeeded.

v:4(5?):
* Simplify return conditions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>
2020-06-17 00:48:39 +00:00
Iván Briano
13f44596d7 anv: support externally synchronized pipeline caches
Implement the VK_PIPELINE_CACHE_CREATE_EXTERNALLY_SYNCHRONIZED_BIT_EXT
bits of the VK_EXT_pipeline_creation_cache_control extension.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>
2020-06-17 00:48:39 +00:00
Sagar Ghuge
a0ef4971d0 intel/compiler: Remove unnecessary optimization for MUL
2 source instruction only support immediate for src1 operand, so no
point in adding optimization condition for src0 oprand.

v2:
- Update commit message and don't remove ADD optimization (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5341>
2020-06-16 17:11:32 -07:00
Sagar Ghuge
d4f3f9390f intel/compiler: Optimize integer add with 0 into mov
Kaby Lake
total instructions in shared programs: 326560 -> 323616 (-0.90%)
instructions in affected programs: 178062 -> 175118 (-1.65%)
helped: 129
HURT: 0
helped stats (abs) min: 1 max: 118 x̄: 22.82 x̃: 8
helped stats (rel) min: 0.35% max: 6.56% x̄: 2.57% x̃: 2.47%
95% mean confidence interval for instructions value: -27.71 -17.93
95% mean confidence interval for instructions %-change: -2.81% -2.32%
Instructions are helped.

total cycles in shared programs: 43741127 -> 45397851 (3.79%)
cycles in affected programs: 40880261 -> 42536985 (4.05%)
helped: 94
HURT: 34
helped stats (abs) min: 5 max: 6160 x̄: 598.91 x̃: 45
helped stats (rel) min: 0.20% max: 34.86% x̄: 2.52% x̃: 1.09%
HURT stats (abs)   min: 1 max: 76198 x̄: 50383.00 x̃: 69677
HURT stats (rel)   min: 0.07% max: 48.41% x̄: 15.65% x̃: 6.49%
95% mean confidence interval for cycles value: 8023.10 17863.21
95% mean confidence interval for cycles %-change: <.01% 4.60%
Cycles are HURT.

total spills in shared programs: 1086 -> 978 (-9.94%)
spills in affected programs: 897 -> 789 (-12.04%)
helped: 24
HURT: 0

total fills in shared programs: 1686 -> 1584 (-6.05%)
fills in affected programs: 1371 -> 1269 (-7.44%)
helped: 24
HURT: 0

v2:
- Use brw_reg_type_is_integer (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5341>
2020-06-16 16:54:27 -07:00
Jan Beich
63b81c9915 meson: unbreak sysctl.h detection on BSDs
Code:
 #include <sys/sysctl.h>
Compiler stdout:

Compiler stderr:
 In file included from testfile.c:1:
/usr/include/sys/sysctl.h:1184:40: error: unknown type name 'size_t'
int     sysctl(const int *, u_int, void *, size_t *, const void *, size_t);
                                           ^
/usr/include/sys/sysctl.h:1185:40: error: unknown type name 'size_t'
int     sysctlbyname(const char *, void *, size_t *, const void *, size_t);
                                           ^
/usr/include/sys/sysctl.h:1186:42: error: unknown type name 'size_t'
int     sysctlnametomib(const char *, int *, size_t *);
                                             ^
3 errors generated.

Checking if "sys/sysctl.h" compiles: NO

<https://gitlab.freedesktop.org/mesa/drm/-/commit/1f8ada802391>
<https://gitlab.freedesktop.org/mesa/drm/-/commit/4083e8f2c659>

Reviewed-by: Niclas Zeising <zeising@daemonic.se>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5462>
2020-06-16 23:24:54 +00:00
Eric Anholt
2a80f96b51 docs: Add dri-devel to the mailing lists and drop the DRI wiki link.
The DRI wiki is a wasteland at this point, let's just fold the one bit of
useful information in here.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5507>
2020-06-16 22:09:47 +00:00
Jan Beich
46c368907f util: enable futex usage on BSDs after 7dc2f47882
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5460>
2020-06-16 21:44:35 +00:00
Rob Clark
680ca5b393 freedreno/ir3: add post-scheduler cp pass
A pass to eliminate extra mov's from an array.  We need to do this after
scheduling so we know that there are not any potentially conflicting
array writes between the original `mov` and it's use(s).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2124
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
a60d48a863 freedreno/ir3/cp: extract valid_flags
We'll also need this in the postsched-cp pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
5f1f8f7b17 freedreno/ir3: delay test support for vectorish instructions
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
92d6eb4dd5 freedreno/ir3: add helpers to move instructions
A bit cleaner than open coding the list manipulation.  Plus I want to
use it in the next patch, rather than adding more open coded list
futzing.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
9eed0c6011 freedreno/ir3/delay: calculate delay properly for (rptN)'d instructions
When a sequence of same instruction is encoded with repeat flag,
destination registers are written on successive cycles.  Teach the
delay calculation about this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
c3b30963dd freedreno/ir3: add test for delay slot calculation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
a69d28769a freedreno/ir3/print: print (r) flag
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
cd376a1434 freedreno/ir3/legalize: don't allow (nopN) if (rptN)
These two encodings are mutually exclusive.  If the instruction is a
vector(ish) `(rptN)` instruction, then we can't fold a `(nopN)` post-
delay into it.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
1418ea0d00 freedreno/a6xx: emit shader names in debug builds
To simplify mapping a shader in a cmdstream trace back to glsl.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
541c288b5f freedreno: splitup emit_string_marker
So that we can use it internally to emit string markers into a specified
rb.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
f35f711c71 freedreno/ir3/cp: properly handle already-folded RELATIV
In the `try_swap_mad_two_srcs()` case, valid_flags() gets called both
for the src that we want to try to fold, and for the other src that we
are trying to swap to make that possible.  It can happen in the 2nd case
that a RELATIV src has already been folded.  Since `ssa()` returns non-
null in both the `IR3_REG_SSA` and `IR3_REG_ARRAY` cases (in the later
case, it is the dependent array access that the current instruction
cannot be moved ahead of), we need to explicitly check that the src
reg we are looking at is still an SSA src.

Reported-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
1bee79996b freedreno/ir3/validate: also check instr->address
Verify that instructions which have a relative src and/or dest, have
`instr->address`.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
f598786775 freedreno/sched: reset delay counters at start of block
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Rob Clark
6717fd5719 freedreno/log-parser: fix compute times
We also need to clear the table of compute times at the end of the
frame, otherwise results shown will include all the compute jobs since
the beginning of the trace.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
2020-06-16 20:56:15 +00:00
Eric Anholt
8ea5d8ce83 docs: Replace ancient swrast conformance docs with more current information.
I don't think Mesa 4.0 swrast conformance is relevant at this point, just
point people to the current Khronos list.  Also, add some more information
on submitting results.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5482>
2020-06-16 20:54:44 +00:00
Erik Faye-Lund
429ff05491 docs/relnotes: update internal references
This time, let's use proper Sphinx roles for the referenes, so we can
reference documents and inline refs.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5471>
2020-06-16 20:36:38 +00:00
Erik Faye-Lund
9be0e2dbf4 docs: update internal references
This time, let's use proper Sphinx roles for the referenes, so we can
reference documents and inline refs.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5471>
2020-06-16 20:36:38 +00:00
Lionel Landwerlin
762706c5a6 anv: add an option to disable secondary command buffer calls
Those are currently hurting Felix' ability to look at the batches.

We can probably detect this in the aubinator but that's a bit more
work than falling back to the previous behavior.

v2: Condition VK_KHR_performance_query to not using this variable (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5391>
2020-06-16 20:23:52 +00:00
Jason Ekstrand
20b6ee82ac nir/intrinsics: Put the _intel intrinsics together at the end
All the other driver-specific intrinsics are at the end of the file so
Intel's should go there too.

Reviewed-by: Sagar Ghuge<sagar.ghuge@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5503>
2020-06-16 20:07:33 +00:00
Dave Airlie
2ac2f7a029 softpipe: change vendor name to something more generic.
For consistency with the llvmpipe driver.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed by: Jose Fonseca <jfonseca@vmware.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5483>
2020-06-17 05:19:37 +10:00
Dave Airlie
04d6edd725 llvmpipe: change vendor to be more generic.
If submitting for conformance it is probably better to have a generic
name for vendor here.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed by: Jose Fonseca <jfonseca@vmware.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5483>
2020-06-17 05:19:29 +10:00
Dave Airlie
94acd419da virgl: change vendor id to reflect reality more.
virgl vendor id should probably be little more generic now.

I think I picked this becuase the virtio pci id space was under
RH's name and they did pay for it, but at this point I think it's
better to just use something generic.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5483>
2020-06-17 05:19:01 +10:00
Jason Ekstrand
8f9b8af782 anv: Add anv_pipeline_init/finish helpers
This cleans up pipline create/destroy a bit after the compute/gfx split.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5457>
2020-06-16 17:02:44 +00:00
Jason Ekstrand
1b693341ac anv: Add an anv_batch_set_storage helper
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5457>
2020-06-16 17:02:44 +00:00
Jan Beich
fcdefa7e47 anv,iris: unbreak on BSDs after 812cf5f522ab,abf8aed68047
../src/intel/vulkan/anv_gem.c:31:10: fatal error: 'linux/sync_file.h' file not found
 #include <linux/sync_file.h>
          ^~~~~~~~~~~~~~~~~~~
../src/gallium/drivers/iris/iris_fence.c:29:10: fatal error: 'linux/sync_file.h' file not found
 #include <linux/sync_file.h>
          ^~~~~~~~~~~~~~~~~~~

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5463>
2020-06-16 16:02:33 +00:00
Jan Beich
0bd5f9a5bc drm-uapi: Add sync_file.h
Based on <linux/sync_file.h> with BSD portability conditional.
At least FreeBSD supports SYNC_IOC_* via LinuxKPI in DRM.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5463>
2020-06-16 16:02:33 +00:00
Daniel Schürmann
8006feda09 aco: don't allow SGPRs on logical phis
aco_validate() is called after phi lowering, now.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5496>
2020-06-16 14:46:19 +01:00
Daniel Schürmann
0e47fe3fa2 aco: reorder calls to aco_validate() and cleanup aco_compile_shader()
The first call of aco_validate should happen after phi lowering.
Otherwise, subdword restrictions might be violated

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5496>
2020-06-16 14:46:19 +01:00
Icecream95
ec628aba76 panfrost: Implement ARB_depth_clamp
This significantly improves the quality of shadows in OpenMW.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5453>
2020-06-16 12:59:10 +00:00
Icecream95
fd92dc6b17 panfrost: Clean up panfrost_frag_meta_rasterizer_update
Create a pointer to ctx->rasterizer->base so it isn't repeatedly
referred to.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5453>
2020-06-16 12:59:10 +00:00
Rohan Garg
bfe806c6ad iris: Fix documentation for _iris_batch_flush
_iris_batch_flush has no in_fence and out_fence parameters

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5470>
2020-06-16 11:47:35 +00:00
Erik Faye-Lund
6785d8c460 zink: expose GLSL 1.30
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5479>
2020-06-16 09:14:56 +00:00
Erik Faye-Lund
9bf2f4d411 zink: enable cull-distance if supported
This is already implemented, and we just need to flip the switch to turn
it on.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5479>
2020-06-16 09:14:56 +00:00
Erik Faye-Lund
a3d07c4a35 gallium/hud: don't use user vertex buffers
This gains back some performance lost in the previous commit, by
bypassing u_vbuf.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5417>
2020-06-16 08:02:29 +00:00
Erik Faye-Lund
7b86920ae2 Revert "gallium/hud: don't use user vertex buffers"
The approach taken in this commit only works on drivers that expose
the PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT capability. For drivers
that don't, the buffer has been unmapped by the time we get to
hud_draw_colored_prims, leading to crashes.

It's not easy to fix the code, but drivers that do support coherent
mapping will most likely do the right think themseleves, so let's just
go back to using user-buffers here.

This reverts commit 4fe1fd4df4.

Fixes: 4fe1fd4df4 ("gallium/hud: don't use user vertex buffers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3106
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5417>
2020-06-16 08:02:29 +00:00
Rob Clark
167fa2887f nir/validate: validate intr->num_components
Validate that num_components is only set for vectorized instructions, to
prevent other nir passes or driver backends from mistakenly relying on
num_components for non-vectorized instructions.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
2020-06-16 02:48:18 +00:00
Jose Maria Casanova Crespo
be16833d96 vc4: don't relay on intr->num_components for non-vectorized intrinsics
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
2020-06-16 02:48:18 +00:00
Rob Clark
c148dbe07e v3d: don't use intr->num_components for non-vectorized intrinsics
Squashed-in-fix-from: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
2020-06-16 02:48:18 +00:00
Rob Clark
5b5b45ebf6 spriv: don't set num_components for non-vectorised intrinsics
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
2020-06-16 02:48:18 +00:00
Rob Clark
2e5b5d9584 nir/lower-atomics-to-ssbo: don't set num_components
Of the possible intrinsics generated, only load_ssbo is vectorized (and
store_ssbo is never generated)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
2020-06-16 02:48:18 +00:00
Rob Clark
f70d6030e3 nir/builder: don't set intr->num_components
The "load-sysval" intrinsics are not vectorized.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
2020-06-16 02:48:18 +00:00
Rob Clark
603d3c2991 radv: don't set num_components for non-vectorized intrinsics
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
2020-06-16 02:48:18 +00:00
Rob Clark
28a14787c0 freedreno/ir3: don't rely on intr->num_components
It is better to use `nir_intrinsic_dest_components()` which also handles
the case of intrinsics with a fixed number of dest components.

Somehow this starts showing up with a nir_serialize round-trip with
shader-cache.  But we really shouldn't have been relying on
`intr->num_components` directly.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
2020-06-16 02:48:18 +00:00
Dave Airlie
fce02f4020 mesa/gles3: add support for GL_EXT_shader_group_vote
This is the GLES equivalent to ARB_shader_group_vote.

Passes: KHR-GLES31.core.shader_group_vote.*
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5490>
2020-06-16 12:02:21 +10:00
Dave Airlie
25a629558c gallivm/cache: don't require a null terminator for cache data.
Fixes crashes seen with
./bin/egl_ext_device_base
since cache support was added.

Fixes: 4962d3e107 ("gallivm: add cache interface to mcjit")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3118
Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5467>
2020-06-16 09:48:01 +10:00
Alyssa Rosenzweig
8b6820c92d panfrost: Simplify AFBC format check
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5484>
2020-06-15 21:53:09 +00:00
Alyssa Rosenzweig
27d3685528 panfrost: Enable AFBC for RGB565
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5484>
2020-06-15 21:53:09 +00:00
Alyssa Rosenzweig
92553b6290 panfrost: Correctly calculate tiled stride
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: bde19c0e7b ("panfrost: Fix tiled texture "stride"s on Bifrost")
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>
2020-06-15 21:41:18 +00:00
Alyssa Rosenzweig
6b1498f7ac panfrost: Fix level_2
We're not sure what this is but I've always seen it equal to levels.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>
2020-06-15 21:41:18 +00:00
Alyssa Rosenzweig
65e0e891d2 panfrost: Update sampler view in Bifrost path
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: fafc305600 ("panfrost: Create a new sampler view bo when the layout changes")
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>
2020-06-15 21:41:18 +00:00
Alyssa Rosenzweig
32b171d669 panfrost: Merge bifrost_bo/midgard_bo
The content is difference but a BO is a BO. Let's reduce code repition
between Midgard and Bifrost paths.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>
2020-06-15 21:41:18 +00:00
Dave Airlie
84779e5822 llvmpipe/setup: add planes for draw regions if no scissor.
Some tests were using a 1x1 fb bound, with a 2x2 viewport,
and all 4 pixels were getting rendered. Test if the fb bounds
need planes added or not.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3101

v2: add lines support

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5394>
2020-06-16 06:14:44 +10:00
Jonathan Marek
c1e1b13bfe turnip: simplify stage2 helpers
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5455>
2020-06-15 15:35:13 -04:00
Jonathan Marek
067370fe87 turnip: remove duplicated stage2opcode and stage2shaderdb
Reduce 3 copies of this same logic into a single one.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5455>
2020-06-15 15:34:52 -04:00
Rhys Perry
a02e7f6799 aco: fix encoding of certain s_setreg_imm32_b32 instructions
If the mode is too small, the operand will be an inline constant and the
literal dword won't be written.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
82c265a514 aco: improve check for moving temporaries out of fixed definitions
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
e9578e3033 aco: allow GFX9 partial writes with instructions which use opsel
Some instructions such as v_mad_f16 can do partial writes on GFX9.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
82de70d06e aco: add more opcodes to can_swap_operands
fossil-db (Navi, fp16 enabled):
Totals from 310 (0.24% of 127638) affected shaders:
CodeSize: 1290508 -> 1289716 (-0.06%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Samuel Pitoiset
3c1b55962e aco: allow to swap operands for some 16-bit float instructions
No fossil-db changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
575b431c80 aco: validate sub-dword pseudo instructions
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
d16a7190a3 aco: optimize 16-bit and 64-bit float comparisons
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
22d7122739 aco: copy-propagate constants through p_extract_vector/p_split_vector
fossil-db (Navi, fp16 enabled):
Totals from 1 (0.00% of 127638) affected shaders:
CodeSize: 4388 -> 4392 (+0.09%)
VMEM: 465 -> 458 (-1.51%)
Copies: 54 -> 55 (+1.85%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
3d6f67950d aco: improve 8/16-bit constants
fossil-db (Navi, fp16 enabled):
Totals from 1 (0.00% of 127638) affected shaders:
CodeSize: 4540 -> 4388 (-3.35%)
Instrs: 861 -> 830 (-3.60%)
Cycles: 3444 -> 3320 (-3.60%)
VMEM: 489 -> 465 (-4.91%)
SMEM: 107 -> 110 (+2.80%)
SClause: 31 -> 30 (-3.23%)
Copies: 58 -> 54 (-6.90%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
4784111abc aco: use 32-bit inline constants for 16-bit integer instructions
See https://reviews.llvm.org/D81841

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
dd23345567 aco: fix half_pi constant for 16-bit fsin/fcos
This worked because the optimizer didn't consider that the 16-bit
instruction would interpret the inline constant differently. This will
change in the next commit.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
9b69ed0bb9 aco: improve sub-dword check for sgpr/constant propagation
p_create_vector can have sub-dword operands with a v1 definition.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
1210e0bd62 aco: create 16-bit input and output modifiers
fossil-db (Navi, fp16 enabled):
Totals from 1 (0.00% of 127638) affected shaders:
CodeSize: 4552 -> 4540 (-0.26%)
Instrs: 863 -> 861 (-0.23%)
Cycles: 3452 -> 3444 (-0.23%)
VMEM: 490 -> 489 (-0.20%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
f5a5674178 aco: update comment about preserving fp16/fp64 denormals
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
7f511efa16 aco: create 16-bit mad/fma
fossil-db (Navi, fp16 enabled):
Totals from 1 (0.00% of 127638) affected shaders:
CodeSize: 4868 -> 4552 (-6.49%)
Instrs: 956 -> 863 (-9.73%)
Cycles: 3824 -> 3452 (-9.73%)
VMEM: 504 -> 490 (-2.78%)
SMEM: 109 -> 107 (-1.83%)
VClause: 19 -> 20 (+5.26%)
Copies: 54 -> 58 (+7.41%)
PreVGPRs: 43 -> 41 (-4.65%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
1b10764e50 aco: try to use fma instead of mad when denormals are enabled
v_mad_f32 doesn't support denormals but v_fma_f32 does.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
6cb42cdd8f aco: create mads when signed zeros should be preserved
This check was added because I thought v_mad_f32 didn't preserve the
signess of zero, but I can't reproduce that and this isn't mentioned
anywhere in LLVM.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
1b6a319c15 aco: add and set precise flag
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
a8f800a836 aco: use p_as_uniform in emit_vop1_instruction
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
b6d9e45f47 aco: improve code for f2{i,u}{8,16}
Use sub-dword definitions so that the RA can use SDWA

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Rhys Perry
34d481fd1f aco: use num_opcodes instead of last_opcode
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
2020-06-15 18:24:22 +00:00
Erik Faye-Lund
e838acf37d nir: do not try to merge xfb-outputs
It's tricky to merge XFB-outputs correctly, because we need there to not
be any overlaps when we get to `nir_gather_xfb_info_with_varyings` later
on. We currently trigger an assert there if we end up merging here.

So let's not even try. This is an optimization, and we can optimize this
in safe cases later if needed. For now, let's play it safe.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5329>
2020-06-15 16:13:58 +00:00
Rob Clark
b5c810d68b turnip: drop linking libfreedreno_drm
Now that it is no longer required.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5476>
2020-06-15 15:46:37 +00:00
Rob Clark
1a33faea8c freedreno/ir3: move the libdrm dependency out of shared code
The only reason for this dependency was the fd_bo used for the uploaded
shader.  But this isn't used by turnip.  Now that we've unified the
cleanup path from gallium, it isn't hard to pull the fd_bo upload/free
parts into ir3_gallium.

This cleanup has the added benefit that the shader disk-cache will not
have to deal with it.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5476>
2020-06-15 15:46:37 +00:00
Rob Clark
43e0062c5b freedreno/ir3: unify shader create/delete paths
In particular, to move the fd_bo create/delete (which is unneeded by
turnip) out of the shared ir3 code, it is useful to have a single
delete path.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5476>
2020-06-15 15:46:37 +00:00
Mike Blumenkrantz
828c767113 zink: rework input/output location emission
glsl builtins that have no analog in spirv are emitted as regular varyings,
which means they take up a slot.

we need to ensure that there's no conflict between these regular varying
slots (from user-defined varyings) and the glsl translated builtins, so
we do that by "reserving" the max number of varying slots that can be used
by a given stage, then remapping all glsl builtins with no spirv builtin
to a packed layout location that can be consistent across stages

sort of addresses mesa/mesa#3113 except now there's 10 fewer varying slots

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5432>
2020-06-15 15:36:06 +00:00
Mike Blumenkrantz
f90bc6daa9 zink: handle more glsl->spirv builtin translation
this should be all of them, though the check for vertex shader stage needs
to be changed to !fragment stage at some point

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5432>
2020-06-15 15:36:06 +00:00
Samuel Pitoiset
9b6a8d1742 spirv: fix using OpSampledImage with OpUndef instead of OpType{Image,Sampler}
This seems valid per the SPIR-V spec to use OpSampledImage with
OpUndef instead of OpTypeImage or OpTypeSampler. When the image
operand is undefined, SPIRV->NIR emits an undef instruction that
can be removed later by the compiler.

This fixes shader compilation crashes with Red Dead Redemption II.

Cc: mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5230>
2020-06-15 17:02:53 +02:00
Alyssa Rosenzweig
277b616962 pan/mdg: Precolour blend inputs
Instead of requiring an explicit unoptimized move, we can implicitly
colour the blend input intrinsic to r0, where it will be preloaded; this
is a simple task for RA, and does not conflict with anything. If there
are multiple duplicate loads, the latter ones can just be simple moves
which will be copypropped.

We don't need to include a explicit synthetic load, since (scanning
backwards) the read will cause the input to become live at the right
time and the lack of an explicit write will keep it live from the
beginning of the shader. So no need to make it more complicated than it
needs to be.

Saves a cycle in blend shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5449>
2020-06-15 13:29:25 +00:00
Yevhenii Kolesnikov
ad00159070 nvir: don't use designated initialisers in C++ code
This feature only available since C++20.

Fixes: fa0a241b33 ("nvir/nir: move nir options to codegen")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3114

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5430>
2020-06-15 13:29:23 +03:00
Samuel Pitoiset
013d096d15 ac: add ac_choose_spi_color_formats() to common code
It's similar between RADV and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5436>
2020-06-15 08:16:07 +02:00
Jonathan Marek
1d9e6e456a freedreno/ir3: fix ir3_nir_move_varying_inputs
ir3_nir_move_varying_inputs is broken when there a load input outside of
the first block which depends on the result of a previous load input.

This simplification/rework avoids the problem, and should also be faster.

Fixes this dEQP-VK test:

dEQP-VK.pipeline.multisample_interpolation.offset_interpolate_at_pixel_center.128_128_1.samples_2

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5465>
2020-06-14 17:53:47 +00:00
Eric Engestrom
356be07ce2 intel/tools: make test aware of the meson test wrapper
Suggested-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5155>
2020-06-13 20:32:08 +00:00
Eric Engestrom
ccaa5b034f intel/tools: rewrite run-test.sh in python
Old script created files in the source directory, which is generally
considered bad form.

The rewrite to python instead of duct-taping around in the shell script
goes towards the goal of only having cross-platform python scripts,
which is also harder to make mistakes in than shell scripts.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5155>
2020-06-13 20:32:08 +00:00
Eric Engestrom
ebb33b2c0a post_version.py: update script to the new rST way of things
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Eric Engestrom
8bc055fc52 gen_release_notes.py: update script to the new rST way of things
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
9d90791c19 docs/release-calendar: restore missing id
I'm not sure how this got dropped, but it somehow did during conversion.
Let's restore it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
8077267026 bin/perf-annotate-jit.py: update internal reference
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
cd01d0dee1 radv: update internal reference
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
7d497e4e09 docs/relnotes: update internal references
I'm not 100% sure if it feels right to update these. I mean, this keeps
links working as they should, even if exported to something else than
HTML. But it also feels a bit like history revisionism. It's probably
the right thing to do, though.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
f1fe74afb2 docs: update internal references
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
ea91f4769a README: update references to internal docs
These documents are no longer HTML files, so the internal reference
should be updated.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
0b4f5121f0 docs: drop news in favour of the introduction as index-page
This kind of only makes sense once we have a separate home-page. But I
think this is a good way of showing why we should do this; Sphinx
doesn't support pagination, because it's not meant as a general-purpose
website framewrork. And for documentation, pagination is not really
something you need.

There's probably a lot more pages that should be moved into a separate
webpage, similar to this. In general, I think this should be done for
pages that don't relate to the source code too much, e.g isn't needed to
understand the code, or for instance explains how to get the source code.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
064fe5f3f4 gitlab-ci: build and deploy docs
Dunno if alpine is a good idea. It's what the gitlab docs use for most
of their examples, so that's what I've gone with... Can probably be
changed to something else if wanted.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
381fc0eca5 docs: include specs into the generated docs
Unfortunately, it doesn't seem like there's a way to have sphinx copy
this without moving the files, becasue html_extra_path doesn't copy the
directory itself when given a directory, only files inside and
subdirectories.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
dd3add1b19 docs: bundle extra files
These are documents that are bundled in the root of the website, and
contains some useful, extra documentation. Let's include them.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
62abe35e34 docs: use rst-note for highlighted text
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
29c95ff627 docs: reformat license table as rst table
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
84140a7c06 docs: use rst footnotes instead of manual ones
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Laura Ekstrand
8342fe8302 docs: Add the favicon to the new page.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
17aefa73a1 docs: do not copy source-files to site
These docs have publically available sources in the first place, there's
no point in including a copy of them here as well.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Laura Ekstrand
21adb67048 docs: Remove version.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
54e38882a1 docs: add xlibdriver to table-of-contents
It's not so nice to have a hidden article, so let's add this one to the
TOC under "User Topics".

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
14f2a81b6f docs: drop open-coded toc for articles
Sphinx already provides a proper table-of-contents, so we don't need to
roll our own.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Erik Faye-Lund
d6be994ef8 docs: use code-blocks
Sphinx can syntax-highlight a block if we use the right syntax.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
bf3f0f7a82 docs: format notes as rst-notes
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Laura Ekstrand
5aea48001f docs: include meson in the toctree
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
7039310ae3 docs: use code-block with caption instead of table
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
dcaab1b311 docs: disable syntax-highlighting by default
The default is python, which we don't really do a whole lot of in
our docs, so let's just disable to none instead.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
00cd1346bf docs: use sphinx
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
0841da2fbb docs: fixup heading-levels
I have no idea why pandoc messed up these headers...

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
a71f08b715 docs: fixup broken rst
This removes a bit of markup, because it seems rst doesn't really
support markup on links this way. I'm not sure why Pandoc generates
this, but it misrenders.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
841a47fb28 docs: escape trailing underscores properly
In reStructuredText, a trailing underscore means a hyperlink reference,
but it seems pandoc doesn't get this right for symbols that have already
been escaped. So let's manually fix these up.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
2c0707d13d docs: escape asterisks
Seems pandoc messed these up, and left out some escpaing. Let's fix it
up by hand.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
ceb8084885 docs: escape double colons
It seems pandoc doesn't really understand that double colons needs to be
escaped. So let's fix that up by hand.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
10bd811abc docs: fixup botched table
Pandoc silently fails on colspan, breaking this table. But rst supports
this just fine, so let's just hand-convert this table instead.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
1633174b78 docs: delete no longer needed file
These files were used by the theming of the old website, and is no
longer needed.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
c9c53e3042 TEMP: remove rst-conversion scripts
These have now served their purpose, so let's get rid of them again.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
4d066836e3 docs: convert articles to reructuredtext
This uses the previously added scripts to convert the documentation to
reStructuredText, which is both easier to read offline, and can be used
to generate modern HTML for online documentation.

No modification to the generated results have been done.

Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Erik Faye-Lund
1df5dbf516 TEMP: add rst-conversion scripts
This is just a temporary commit, adding the scripts that performs the
automated conversion of the docs. The next commit contains the results
of the conversion, and the commit following that removes these scripts
again.

To redo the conversion in the next commit, rebase interactively to edit
this commit and delete the next one, and run './update-docs.sh' from the
root directory. Then continue the rebasing, and resolve any conflicts
that might have occurred in the manual fixes on top. Finally, build the
documentation to ensure no further fixups are needed.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:00 +00:00
Eric Engestrom
4de678cd30 iris: drop dead #include "config.h"
There hasn't been a config.h in a long time (it was an artifact of the
autotool build).

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5350>
2020-06-13 01:31:56 +00:00
Eric Engestrom
eeb51c2d36 i965: drop dead #include "config.h"
There hasn't been a config.h in a long time (it was an artifact of the
autotool build).

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5350>
2020-06-13 01:31:56 +00:00
Eric Engestrom
fd2858738b docs: update the blocks of unused EGL enums assigned to us
See src/egl/generate/egl.xml for reference.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5309>
2020-06-13 01:30:24 +00:00
Eric Engestrom
6497d1d304 intel/genxml: replace gen_sort_tags.py MIT licence with SPDX equivalent
Much more readable with the same information :)

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5362>
2020-06-13 01:16:17 +00:00
Eric Engestrom
ff0f1c6a27 intel/genxml: drop python 2 support for gen_sort_tags.py
Python 2 is dead and this script is only run by devs, all of which have
had python3 available for basically forever.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5362>
2020-06-13 01:16:17 +00:00
Eric Engestrom
6456f71f76 v3d: add missing unlock() in error path
CoverityID: 1435701
Fixes: e5a81ac704 ("broadcom/vc5: Don't forget to get the BO offset when opening a dmabuf.")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5263>
2020-06-13 00:45:47 +00:00
Jonathan Marek
8c152a5e2a turnip: remove some dead/redundant code
A bit of cleanup to reduce noise in the codebase.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5447>
2020-06-13 00:11:47 +00:00
Eric Anholt
32143cba4d ci/bare-metal: Terminate the job with an error on kernel panic.
Otherwise, we'll time out after 60 minutes of waiting for the run to
complete.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2651
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5393>
2020-06-12 23:34:44 +00:00
Eric Anholt
72fe7b98ea ci/bare-metal: Stop fetching the git tree.
Like for LAVA, make the tradeoff of moving the test scripts and data (55k)
into the artifacts in order to make the per-build jobs not have to pull
down the git tree (hundreds of MB when you don't hit a cached container
for your specific user, which I see happen multiple times a day in my CI
runs).

To do this, we have to be a bit more careful in some places about our
working directory potentially being dirty.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5393>
2020-06-12 23:34:44 +00:00
Eric Anholt
109816b518 ci/bare-metal: Use the deqp-runner bits straight out of the artifacts.
We've already uploaded and downloaded them from fd.o and put them in the
rootfs, so we can clean up the extra prep work.

Our test job now extends from .test so that the artifacts' install dir
with all the scripts is extracted.  This required moving the dependency on
meson-testing to the x86 test-gl/test-vk job blocks.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5393>
2020-06-12 23:34:44 +00:00
Eric Anholt
445f3eb0ea ci/bare-metal: Make which test to run configurable.
I'll use this to run tracie in a new job I'm working on.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5393>
2020-06-12 23:34:44 +00:00
Eric Anholt
a13209bdec ci/bare-metal: Reword the final output of the init script on the board.
I'm going to be adding tracie, which isn't deqp.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5393>
2020-06-12 23:34:44 +00:00
Icecream95
7ef648c0f3 panfrost: Tiled to linear layout conversion
Tiling is expensive, so this patch converts textures that appear to be
used for streaming to a linear layout.

Performance of mpv is significantly improved, with software-decoded
1080p mp4 playback on RK3288 going from 30fps to 50fps when testing
with `--untimed --no-audio`.

To keep things simple, conversion only happens when updating the whole
texture and no mipmapping is used.

v2: Make it clear that the heuristic doesn't rely on a texture being
uninitialized, since layout switching code can get confusing (Alyssa).

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4628>
2020-06-12 19:15:47 +00:00
Icecream95
fafc305600 panfrost: Create a new sampler view bo when the layout changes
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4628>
2020-06-12 19:15:46 +00:00
Icecream95
3baf10adb9 panfrost: Move sampler view bo creation to a separate function
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4628>
2020-06-12 19:15:46 +00:00
Matt Turner
66111bc95a intel/compiler: Drop opt_sampler_eot()
Gen9 and Cherryview have the ability to mark texture instructions with
the End-of-thread bit under some conditions, which allows the texture
result to be written to the render target directly, rather than
returning to the EU.

In order to handle overlapping primitives correctly, we have to use the
'sendc' instruction which stalls until other threads potentially writing
to the same locations in the render target are retired. Unfortunately,
this stall happens before the texture is sampled (rather than in
parallel with stall), so for some literal edge cases (like the diagonal
edge between two triangles forming a rectangle) there can be a
performance penalty. As a result, it's probably not a good idea to use
this optimization in general.

I had planned to leave it enabled only for BLORP, where we use rectangle
primitives and are typically clearing/blitting an entire render target
without any overlapping primitives, but I noticed that the optimization
wasn't applied in some normal cases anyway. For example, in the piglit
test tests/shaders/glsl-fs-texture2d-bias.shader_test it is applied to
one BLORP-blit shader but not another due to some kind of mishandling of
register types (the destination register type of the texture operation
is UD while the color source of the render target write is F).

Additionally the instruction scheduler assumed that the combined texture
and render target write operation took 0 cycles, leading to cycle
estimates that are wildly inaccurate. Since the optimization was not
implemented for SIMD32 and our decision whether to use the SIMD32
program is made by comparing the estimated performance with that of the
SIMD16 shader, we wrongly threw out a bunch of SIMD32 programs that are
likely profitable.

   total cycles in shared programs: 472807891 -> 473784245 (0.21%)
   cycles in affected programs: 108277 -> 1084631 (901.72%)
   helped: 0
   HURT: 1290

   total sends in shared programs: 998955 -> 1000245 (0.13%)
   sends in affected programs: 1400 -> 2690 (92.14%)
   helped: 0
   HURT: 1290

   LOST:   0
   GAINED: 33

This patch shows no performance changes in Intel's Mesa performance CI.

Given the problems, the lack of evidence that the pass improves
performance, and the fact that the hardware feature was removed from
subsequent GPU generations, I think that the pass is not valuable and
should be removed.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5412>
2020-06-12 19:01:26 +00:00
Eric Anholt
dd938356c7 ci: Disable some flaky tests on turnip.
These have appeared more than once in the flake reporting channel, and a
couple of them have spuriously failed marge-bot merges.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5429>
2020-06-12 18:39:58 +00:00
Eric Anholt
44d28dca26 ci: Fix weird filesystem globs appearing in failed test .qpa files.
When you get a filure and go looking in the results, you'll find weird stuff like this in the XML:

Reference images fill undefined pixels with 3x3 grid pattern.
Attachment 0 (p' = p bin boot builds
dEQP-VK.renderpass.suballocation.attachment_allocation.grow_shrink.89.qpa
deqp dev etc home init install lib media mnt proc results root run sbin
set-job-env-vars.sh sys tmp usr var (1, 1, 1, 1) + (-1, -1, -1, 1))

because we were not quoting the line and 'p *' was getting expanded.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5435>
2020-06-12 17:36:20 +00:00
Dylan Baker
0efaa55ef8 docs: update calendar, add news item, and link releases notes for 20.0.8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5444>
2020-06-12 17:23:38 +00:00
Dylan Baker
c947bde6c5 docs: Add sha256sums for 20.0.8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5444>
2020-06-12 17:23:38 +00:00
Dylan Baker
0226854e11 docs: Add release notes for 20.0.8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5444>
2020-06-12 17:23:38 +00:00
Alyssa Rosenzweig
7ae2110e61 pan/mdg: Prefer type over regmode for schedule constraints
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
2020-06-12 12:57:11 -04:00
Alyssa Rosenzweig
5cf5d3cc2d pan/mdg: Analyze types for 64-bitness in RA
Instead of reg_mode.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
2020-06-12 12:57:11 -04:00
Alyssa Rosenzweig
5e5ea25a0d pan/mdg: Explicitly type 64-bit uniform moves
Instead of relying on reg_mode.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
2020-06-12 12:57:11 -04:00
Jonathan Marek
c93753e618 turnip: add emit renderpass cache flushes for sysmem 3D CmdClearAttachments
This clear path behaves like a draw, it needs the same flush as tu_draw.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
2020-06-12 15:09:07 +00:00
Jonathan Marek
72d7df40a5 turnip: add layered 3D path clear for CmdClearAttachments
This fixes cases where the 3D path is used with layered rendering.

Fixes dEQP-VK.renderpass.suballocation.multisample_resolve.layers* failures

Note the blob's 3D fallback path behaves differently, and uses the
framebuffer information to clear each layer individually (changing the MRT
state each time). But that's not possible in all cases, and the blob fails
to clear properly in dEQP-VK.geometry.layered.*.secondary_cmd_buffer cases.
So this clear path is not based on the blob's behavior.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
2020-06-12 15:09:07 +00:00
Jonathan Marek
093c413722 turnip: share code between 3D blit/clear path and tu_pipeline
Instead of filling out registers manually, fill out ir3 structs and re-use
code from tu_pipeline.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
2020-06-12 15:09:06 +00:00
Jonathan Marek
13525a9c70 turnip: pipeline program state refactor
This refactor simplifies things a bit, and will make it easier to share
some logic with tu_clear_blit (see next patches).

This changes the order in which some things are emitted, and emits less
for disabled shader stages. There's also as extra write to SP_GS_PRIM_SIZE
that is removed.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
2020-06-12 15:09:06 +00:00
Alyssa Rosenzweig
1c1782c6b5 panfrost: Demote mediump varyings to fp16
Likewise lowp.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
a7f524674b panfrost: Override varying format to minimal precision
Spec allows this!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
f1de952b69 panfrost: Use shader_info harder
We already have this metadata..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
3cc425e27d panfrost: Only store varying formats
This reduces linking complexity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
8462ca076d panfrost: Allow R/RG/RGB varyings
This can be a bandwidth savings.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
a0578998a4 panfrost: Remove unused routines
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
79e349abca panfrost: Use new varying linking
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
6ab87c55bc panfrost: Add high-level varying emit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
e9e9b2b39b panfrost: Add helper to determine if we are capturing
That is, is the varying setup for xfb *and* is there a buffer for it?

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
c31af6fbca panfrost: Emit xfb records
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
df24209473 panfrost: Emit special varyings
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
0c0217d945 panfrost: Emit unlinked varyings
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
3d04ebf7f8 panfrost: Determine varying buffer presence
Essentially the same logic as before, but the assumptions are much more
explicit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
258b80b6eb panfrost: Introduce bitfields for tracking varyings
Rather than having all sorts of random state flyng about with varying
emission, we can use a simple present mask and general stride to encode
everything we need for non-XFB cases, and layer XFB on top easily
enough.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
e26ac2e165 panfrost: Add panfrost_streamout_offset helper
Calculates the bias required for an xfb record in the src_offset field
to account for truncating the address to force alignment.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
24c3b95925 panfrost: Calculate varying size by format
Will enable <16-byte varyings.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
7ac1bb047a pan/mdg: Avoid fusing ld_vary_16 with non-zero component
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Daniel Schürmann
1f98d8c804 aco: fix shared subdword loads
Shared subdword loads don't need byte alignment as they are split
into multiple loads if necessary.

Fixes: 5cde4989d3 ('aco: remove unnecessary split- and create_vector instructions for subdword loads')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5441>
2020-06-12 13:56:12 +00:00
Samuel Pitoiset
e7e9969efe radv: enable radv_enable_mrt_output_nan_fixup for RAGE 2
To fix game artifacts. It's always sad to have to fix game bugs
inside drivers ...

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
2020-06-12 14:43:58 +02:00
Samuel Pitoiset
54e7ae569b radv/llvm: implement radv_enable_mrt_output_nan_fixup workaround
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
2020-06-12 14:43:58 +02:00
Samuel Pitoiset
7b44f549b3 aco: implement radv_enable_mrt_output_nan_fixup workaround
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
2020-06-12 14:43:57 +02:00
Samuel Pitoiset
6f21995f98 radv: add new drirc option radv_enable_mrt_output_nan_fixup
To replace NaN from FS with zeros to fix game bugs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
2020-06-12 14:43:31 +02:00
Timothy Arceri
b33f811068 glsl: fix incorrect optimisation in opt_constant_variable()
When handling function inputs the optimisation pass incorrectly
assumes the inputs are undefined. Here we simply change things to
assume inputs have always been assigned a value. Any further
optimisations will be taken care of once function inlining takes
place.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2984
Fixes: 65122e9e80 ("ir_constant_variable: New pass to mark constant-assigned variables constant.")

Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5413>
2020-06-12 08:51:54 +00:00
Samuel Pitoiset
07aefe8065 radv: set DB_SHADER_CONTROL.CONSERVATIVE_Z_EXPORT correctly
Use the SPIR-V execution modes if set.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5404>
2020-06-12 08:22:47 +00:00
Mauro Rossi
900bf50c39 android: nvir/gv100: update sources in Makefile.sources
Fixes the following building errors:

FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
...
ld.lld: error: undefined symbol: nv50_ir::getTargetGV100(unsigned int)
...
ld.lld: error: undefined symbol: nv50_ir::getTargetGV100(unsigned int)
clang-9: error: linker command failed with exit code 1 (use -v to see invocation)

Fixes: 78103abe ("nvir/gv100: initial support")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
2020-06-12 07:50:08 +02:00
Rob Clark
ee29c682fe freedreno/ir3: limit pre-fetched tex dest
Teach RA to setup additional interference to prevent textures fetched
before the FS starts from ending up in a register that is too high to
encode.

Fixes mis-rendering in multiple playcanv.as webgl apps.

Note that the regression was not actually 733bee57eb8's fault, but
that was the commit that exposed the problem.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3108
Fixes: 733bee57eb ("glsl: lower samplers with highp coordinates correctly")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
2020-06-11 21:59:54 +00:00
Rob Clark
f80092dad2 freedreno/ir3: remove RA "q-values" optimization
This is mainly the "piglit optimization" (ie, since piglit launches an
separate process for for each test).  It was never wired up for a6xx,
and makes register class setup unnecessarily complicated.  Remove it to
simplify the next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
2020-06-11 21:59:54 +00:00
Rob Clark
562aaea07c freedreno/ir3: respect tex prefetch limits
Refactor a bit the limit checking in the bindless case, and add tex/samp
limit checking for the non-bindless case, to ensure we do not try to
prefetch textures which cannot be encoded in the # of bits available.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
2020-06-11 21:59:54 +00:00
Rob Clark
4cabc25fa4 freedreno/ir3: add debug code to print conflicting half-regs
I keep re-typing this from time to time when debugging various things.
Which is dumb.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
2020-06-11 21:59:54 +00:00
Rob Clark
399114329b nir/print: print tex dest type
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
2020-06-11 21:59:54 +00:00
Francisco Jerez
479249bce6 iris/icl+: Report same caching domain as main surface for clear color BO.
Even though the clear color BO is bound as a read-only buffer, report
the same caching domain as the main BO in use_surface() (typically
IRIS_DOMAIN_RENDER_WRITE) in order to avoid ping-ponging back and
forth between IRIS_DOMAIN_RENDER_WRITE and IRIS_DOMAIN_OTHER_READ,
which leads to increased stall-at-pixel-scoreboard synchronization
between draw calls.

Fixes a 5%-10% FPS regression in some benchmarks spotted on ICL.

Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Fixes: eb5d1c2722 "iris: Annotate all BO uses with domain and sequence number information."
Closes: #3097
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5411>
2020-06-11 14:00:49 -07:00
Mauro Rossi
7afdc549f4 android: aco: add aco_ir.cpp to Makefile.sources
Fixes the following building errors:

FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/vulkan.radv_intermediates/LINKED/vulkan.radv.so
...
ld.lld: error: undefined symbol: aco::can_use_SDWA(chip_class, std::__1::unique_ptr<aco::Instruction, aco::instr_deleter_functor> const&)
...
ld.lld: error: undefined symbol: aco::can_use_opsel(chip_class, aco_opcode, int, bool)
...
clang-9: error: linker command failed with exit code 1 (use -v to see invocation)

Fixes: d9cfb8ad ("aco: validate instructions reading/writing upper halves/bytes")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5425>
2020-06-11 20:00:16 +02:00
Eric Engestrom
19b18e7219 docs: update calendar, add news item, and link releases notes for 20.1.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5421>
2020-06-11 10:31:31 +00:00
Eric Engestrom
f94190e8b0 docs: Add release notes for 20.1.1
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5421>
2020-06-11 10:31:31 +00:00
Marek Olšák
0b3e344212 ac/surface: don't free dcc_retile_map on failure
because the hash table now owns it.

Fixes: bd553f0546 - ac/surface: cache DCC retile maps (v2)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
2020-06-11 10:01:57 +00:00
Marek Olšák
56f2a77a41 ac/surface: enable DCC for the first level in the mip tail on gfx10
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
2020-06-11 10:01:57 +00:00
Marek Olšák
7406ea37e6 ac/surface: require that gfx8 doesn't have DCC in order to be displayable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
2020-06-11 10:01:57 +00:00
Marek Olšák
374f6d568f ac/surface: don't set is_displayable if displayable DCC is missing
If flags.display isn't set, then displayable DCC will not be computed, so
is_displayable will always be false.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
2020-06-11 10:01:57 +00:00
Marek Olšák
0fcf55329b amd/addrlib: fix the C++ one definition rule violation
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1854

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5414>
2020-06-11 05:11:50 -04:00
Jason Ekstrand
27b7b89922 iris: Better handle metadata in NIR passes
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
2020-06-11 05:08:12 +00:00
Jason Ekstrand
92cfbb7d0c intel/nir: Call nir_metadata_preserve on !progress
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
2020-06-11 05:08:12 +00:00
Jason Ekstrand
2b676b2ce8 nir: Properly preserve metadata in more cases
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
2020-06-11 05:08:12 +00:00
Jason Ekstrand
5e1c42d85f nir: Call nir_metadata_preserve on !progress
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
2020-06-11 05:08:12 +00:00
Jason Ekstrand
b0d1f9a72f nir: Add a nir_shader_preserve_all_metadata helper
There are some passes which really work on the shader level and it's
easier if we have a helper which preserves metadata on the whole shader.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
2020-06-11 05:08:12 +00:00
Jason Ekstrand
e017ee95c1 nir: Add a nir_metadata_all enum value
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
2020-06-11 05:08:12 +00:00
Dave Airlie
30f94b3e7d gallivm/sample: fix texel type for stencil 8-bit
This has to be unsigned, so clamping works properly for border
colors.

Fixes dEQP-GLES31.functional.texture.border_clamp.range_clamp.nearest_uint_stencil

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
2020-06-11 14:41:23 +10:00
Dave Airlie
47c2318063 gallivm/conv: enable conversion min code. (v2)
I'm not sure why this code was if (0), but if (1) for it fixes
dEQP-GLES31.functional.texture.border_clamp.range_clamp.nearest_float_color
This test expects +inf to get mapped to 255 and -inf to 0, both values
were ending up at 0.

v2: also enable in the SSE paths

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
2020-06-11 14:41:19 +10:00
Dave Airlie
45606ee804 gallivm/format: convert unsigned values to float properly.
This fixes:
dEQP-GLES31.functional.draw_indirect.random.2

which ends up with 3x32-bit USCALED values going down this path
some of which have the top bit set, and end up converted to signed
float instead of unsigned float values.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
2020-06-11 14:41:14 +10:00
Dave Airlie
a2c16ecb2e llvmpipe: fix subpixel bits reporting.
This fixes some vulkan tests later.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
2020-06-11 14:41:09 +10:00
Dave Airlie
f6ce962f00 gallivm/nir: add group barrier support
Fixes crash in
dEQP-GLES31.functional.synchronization.inter_invocation.image_write_read

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
2020-06-11 14:41:05 +10:00
Dave Airlie
069aee7cc5 draw/gs: add more info to debugging.
adds invocations and vertex streams to default off debug,
fixes compile as well due to missing ,

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
2020-06-11 14:41:02 +10:00
Dave Airlie
092f6226ea draw/gs: fix emitting inactive primitives crash
Fixes dEQP-GLES31.functional.geometry_shading.emit.line_strip_emit_1_end_1

This test only emits 1 primitive, but the stores don't respect
the current mask, which might only have one lane active, for that single
primitive. Also fix the final emit path to use the emitted_mask
rather than the current execution mask.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
2020-06-11 14:40:57 +10:00
Eric Anholt
cc13ffffba ci: Leave a note as to what might be going on with a test.
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
fails pretty strangely (given that we're passing everything else) and
there's an old VK-GL-CTS bug open about this test, and it's suspicious
that all the ARM drivers seem to have trouble with it.  I tried dropping
to -O0 on guilding that file in the CTS and it didn't help, though.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5419>
2020-06-10 23:37:32 +00:00
Eric Anholt
d5e993af47 freedreno/a6xx: Fix clip_halfz support.
Same bit as on other gens, apparently it just got missed on this one.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5419>
2020-06-10 23:37:32 +00:00
Ben Skeggs
af3c2f3cfd nvc0: initial support for tu1xx
v2:
- add proper method definitions

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
268dc60d3a nvc0: initial support for gv100
v2:
- remove unnecessary MAX2()
- add proper method definitions

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
839aeffb49 nvc0: remove hardcoded blitter vertprog
I don't really feel like writing SM70 SASS by hand...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
4f3fbfb82e nvc0: move setting of entrypoint for a shader stage to a function
GV100 requires something different, cleaner to move this to a single place.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
550f1c6d33 nvc0: use NVIDIA headers for GP100- compute QMD
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
443d369bd5 nvc0: use NVIDIA headers for GK104->GM2xx compute QMD
v2:
- add header debug_printf(), and indent the output
v3:
- rename one of the helper macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
7458e21e2b nvir/gv100: enable support for tu1xx
SM75 has a bunch more stuff, but is otherwise backwards-compatible
with SM70 SASS.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
78103abe87 nvir/gv100: initial support
v2:
- add TargetGV100::isBarrierRequired() for OP_BREV
- use NV50_IR_SUBOP_LOP3_LUT() convenience macro where it makes sense
- separated out nir_lower_idiv into its own commit
- make use of the shared function to generate compiler options
- disable lower_fpow, nir's lowering is broken
v3:
- use replaceCvt() instead of custom NEG/ABS/SAT lowering
v4:
- remove WAR from peephole, not needed now we're using replaceCvt()

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
cacf296109 nvir/nir/gm107: switch off lower_extract_word
We can use PRMT here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
57259fa802 nvir/nir/gm107: switch off lower_extract_byte
We can use PRMT here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
d58290270a nvir/nir/gm107: turn on nir_lower_extract64
About to disable lowering for extract_byte/word in favour of a better
local implementation, but still need lowering for 64-bit versions.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
f29e6a9e7e nvir/nir/gm107: split nir shader compiler options from gf100
We can enable some more things here vs earlier GPUs.

v2:
- make use of the shared function to generate compiler options

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
5f8ddbd069 nvir/gm107: separate out header for sched data calculator
SM70 code emitter will want to reuse this.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:42 +00:00
Ben Skeggs
e0379e4549 nvir/gm107: replace SHR+AND+AND with PRMT+PRMT in PFETCH lowering
This is more SM70-friendly.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
4f7798be9f nvir/gm107: implement OP_PERMT
PFETCH lowering will be changed to use this as it's more SM70-friendly,
and this will also allow us to implement extract_byte/word opcodes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
9670c087a7 nvir/nir: use nir_lower_idiv
NIR provides a common implementation of this so we don't need to use a
hand-written built-in library.

v2:
- use idiv_precise instead

Especially important on SM70 where we don't have an assembler.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
59b44f90aa nvir/nir: nir expects the shift amount to wrap, rather than clamp
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
126954aade nvir/nir: implement nir_op_uror
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
23d56c842d nvir/nir: implement nir_op_urol
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
4af791c3bd nvir/nir: implement nir_op_extract_i16
v2:
- use getSSA() instead of getScratch()
v3:
- fix whitespace

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
bfdef484f5 nvir/nir: implement nir_op_extract_u16
v2:
- use getSSA() instead of getScratch()
v3:
- fix whitespace

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
37bef78c79 nvir/nir: implement nir_op_extract_i8
v2:
- use getSSA() instead of getScratch()
v3:
- fix whitespace

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
da390389d0 nvir/nir: implement nir_op_extract_u8
v2:
- use getSSA() instead of getScratch()
v3:
- fix whitespace

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
b80033abc6 nvir/nir: turn on lower_rotate
This isn't implemented, and won't be for GPUs that don't support SHF.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
2ad6f1b7bb nvir/nir: flesh out options
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
fa0a241b33 nvir/nir: move nir options to codegen
These seem to make more sense living with the compiler.

v2:
- use a shared function to generate the per-chipset structs
- remove nir.h include from header, not needed

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
789fa7e378 nvir/nir: fix fragment program output when using MRT
v2:
- use BITFIELD64_BIT()

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Karol Herbst
ce7754e31b nvir/nir: use component helpers instead of insn->num_components
We have nir_intrinsic_dest_components and nir_intrinsic_src_components
which handle all the corner cases.

Fixes a bunch of regressions like front_face stuff.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
a2420c2280 nvir: run replaceZero() before replaceCvt()
replaceCvt() will miss some cases otherwise.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
7dbb7572e2 nvir: add constant folding for OP_PERMT
Important for SM70 INSBF/EXTBF lowering, as these can can often be
eliminated completely.

v2:
- skip CF when subOp is set

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
a831967c72 nvir: introduce OP_FINAL
Required to support SM70 GS.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
5c3040e93a nvir: introduce OP_SGXT
Required for SM70 EXTBF lowering.

v2:
- added constant folding

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
6fd41da1ef nvir: introduce OP_BMSK
This replaces the existing implementation without adding lowering for
earlier GPUs.  The reason for this is because the existing code isn't
at all correct, and it also can't be hit anyway.

Will be required to support SM70 lowering passes.

v2:
- fixup source selection

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
e1e4d1d373 nvir: introduce OP_SHF
We already use a hack from NVC0LegalizeSSA::handleShift() on GK110 and
newer which encodes SHF into the existing SHL/SHR opcodes, but there's
a couple of problems with it:

- LO/HI are swapped in one of the directions, which is very confusing.
- The initial SM70 code will emit this from NIR->NVIR, and using the
  existing encodings will confuse the optimisation passes.

As I want to limit the impact on other GPUs from the initial bring-up
of Volta/Turing, let's add an explicit representation of SHF in the IR.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
60b28f7a50 nvir: introduce OP_BREV with lowering to EXTBF_REV for current GPUs
SM70 has this instruction, but no BFE.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
ddedfcdf21 nvir: introduce OP_WARPSYNC
Will be required to support SM70.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
4b9b7e4dd3 nvir: introduce OP_LOP3_LUT
Will be required to support SM70, but is also available on earlier GPUs.

v2:
- add convenience macro suggested by Karol

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Ben Skeggs
b80aff88fe nvir: bump max encoding size of instructions
SM70 SASS is encoded into 16 bytes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
2020-06-10 22:52:41 +00:00
Erik Faye-Lund
67ad75a282 gallium/hud: do not specify potentially invalid depth-range
Setting the depth-scale to 1 while leaving the depth-translation at 0
means our near-plane is at -1 in OpenGL semantics, which is
out-of-range on some drivers. In particular, Zink has this limitation.

But since we'll only pass a zero z in here anyway, we might as well
multiply it by zero, and get the same result. This avoids the problem.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5408>
2020-06-10 22:27:08 +00:00
Dave Airlie
978285f69a draw: add disk caching for draw shaders
This adds the cache search/insert and compile skipping for cached
objects to the VS/GS/TES/TCS stages in draw.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:41 +10:00
Dave Airlie
db82faff71 llvmpipe: hook draw disk cache up
Connect the draw callbacks into the llvmpipe code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:41 +10:00
Dave Airlie
e07e5137b0 draw: add disk cache callbacks for draw shaders
This provides a set of hooks from the driver that draw can
use to access the disk cache for the draw shaders.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:41 +10:00
Dave Airlie
c2864081e1 llvmpipe/cs: add shader caching
As for fragment shader, skip compilation step if we have the shaders

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:40 +10:00
Dave Airlie
f0d91c9af3 llvmpipe/fs: add caching support
Serialize and check if the object is in the cache, it there is
a cached object skip compilation code once we've constructed
the function interface.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:40 +10:00
Dave Airlie
1b2e345110 gallivm: don't cache shaders that use fetch functions.
This needs to be reworked, but it's a bit messy as we have to store
all the fetch pointers to be added as globals later once gallivm
has been initialised further. For now just refuse to cache shaders
that hit these paths (mainly ETC1 and BPTC).

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:40 +10:00
Dave Airlie
6c0c61cb48 llvmpipe: add infrastructure for disk cache support
This hooks up the gallium API and adds the APIs needed
for shader stages to search and add things to the cache.

It also adds cache stats debug printing.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:40 +10:00
Dave Airlie
4962d3e107 gallivm: add cache interface to mcjit
MCJIT uses an ObjectCache object to implement the cache,
this creates and instances of it and adds it to the MCJIT
instances, it stores the cached object for later use by
the outer layers.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:40 +10:00
Dave Airlie
b15ecb1717 gallivm: skip operations if we have a cached object.
If the object is loaded from the cache, a bunch of gallivm/llvm
interactions can be skipped.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:40 +10:00
Dave Airlie
7b7c02d161 gallivm: add support for a cache object
This plumbs the cache object into the gallivm API, nothing uses
it yet.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:40 +10:00
Dave Airlie
333ee94285 gallivm: rework debug printf hook to use global mapping.
Cached shaders require relinking, so hardcoding the pointer
can't work. This switches out the printf code to use new
proper API.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:40 +10:00
Dave Airlie
f511d2a553 gallivm: rework coroutine malloc/free callouts.
When using cached shaders we have to relink the shader with
external symbols when it's loaded. However the way gallivm does
function calls now hardcodes the function pointer into the shader.

LLVM had a mechanism for doing this properly using global mappings,
this switches the coroutine alloc/free code to use a global mapping.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:40 +10:00
Dave Airlie
d815d74f75 llvmpipe/draw: drop variant number from function names.
When we use an object cache for the MCJIT we can have identical
cache entries from the same shader variant in different shaders,
but the JIT objcache uses the function name to relink things,
so it has to be consistent. Just drop the variants from the
function names.

Note the modules still have the variant info.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:40 +10:00
Dave Airlie
e639e311a1 llvmpipe/cs: overhaul cs variant key state.
This just realigns it with the fs state, and fixes some issues
where shaders weren't getting cached correctly.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:28 +10:00
Dave Airlie
8735e96c53 util/disk_cache: add fallback for disk_cache_get_function_identifier
Otherwise drivers need to have a ifdef on windows, easier to fix
here hopefully.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049>
2020-06-11 06:05:28 +10:00
Christian Gmeiner
456e8103ef ci: fix possible spuriously run of jobs
Need to list arm_test-base here as well, or jobs using this
template may spuriously run if the arm_test-base job fails or
is cancelled.

Suggested-by: Michel Dänzer <mdaenzer@redhat.com>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5405>
2020-06-10 16:13:50 +00:00
Marek Olšák
bd553f0546 ac/surface: cache DCC retile maps (v2)
This reduces overhead when resizing windows or when allocating
similar image sizes over and over again.

v2: optimize the memory footprint of the cache

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398>
2020-06-10 15:35:46 +00:00
Marek Olšák
4cf674c8f7 ac/surface: add a wrapper structure to hold ADDR_HANDLE
and more things in the future.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398>
2020-06-10 15:35:46 +00:00
Marek Olšák
e6996d6fbd amd/addrlib: remove unused members of ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398>
2020-06-10 15:35:46 +00:00
Marek Olšák
a99f4d5382 amd/addrlib: don't recompute DCC info for every ComputeDccAddrFromCoord call
This decreases the DCC retile map overhead from 23% to 18%.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398>
2020-06-10 15:35:46 +00:00
Marek Olšák
a1b9eb62f6 ac/surface: don't recompute the DCC retile map for imported textures
The retile map is not used in this case, and the retile map computation
takes 39% of CPU time when resizing a window.

This brings it down to 23%.

The dcc_retile_use_uint16 setting has to be derived from DCC sizes.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398>
2020-06-10 15:35:46 +00:00
Rhys Perry
1b2e1163b2 aco: fix moving sub-dword values out of a register for a fixed definition
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5040>
2020-06-10 15:05:11 +00:00
Rhys Perry
edf863d1d2 aco: use Info::definition_size instead of definition's regclass
16-bit abs/neg creates v_xor_b32/v_and_b32 with v2b definitions. These
instructions never do partial writes without SDWA.

No shader-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5040>
2020-06-10 15:05:11 +00:00
Rhys Perry
207c35cbe8 aco: add Info::{operand_size,definition_size}
No shader-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5040>
2020-06-10 15:05:11 +00:00
Rhys Perry
62ea429a99 aco: prefer 4-byte aligned definitions
shader-db (Navi, fp16 enabled):
Totals from 42 (0.03% of 127638) affected shaders:
CodeSize: 811984 -> 806224 (-0.71%)
Instrs: 155733 -> 155939 (+0.13%); split: -0.04%, +0.18%
Cycles: 1982568 -> 1984400 (+0.09%); split: -0.06%, +0.15%
VMEM: 7187 -> 7121 (-0.92%); split: +0.86%, -1.78%
SMEM: 1770 -> 1769 (-0.06%)
VClause: 1475 -> 1476 (+0.07%)
Copies: 12406 -> 12606 (+1.61%); split: -0.46%, +2.07%
Branches: 5901 -> 5900 (-0.02%); split: -0.25%, +0.24%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5040>
2020-06-10 15:05:11 +00:00
Rhys Perry
56345b8c61 aco: allow reading/writing upper halves/bytes when possible
Use SDWA, opsel or a different opcode to achieve this.

shader-db (Navi, fp16 enabled):
Totals from 42 (0.03% of 127638) affected shaders:
VGPRs: 3424 -> 3416 (-0.23%)
CodeSize: 811124 -> 811984 (+0.11%); split: -0.12%, +0.23%
Instrs: 156638 -> 155733 (-0.58%)
Cycles: 1994180 -> 1982568 (-0.58%); split: -0.59%, +0.00%
VMEM: 7019 -> 7187 (+2.39%); split: +3.45%, -1.05%
SMEM: 1771 -> 1770 (-0.06%); split: +0.06%, -0.11%
VClause: 1477 -> 1475 (-0.14%)
Copies: 13216 -> 12406 (-6.13%)
Branches: 5942 -> 5901 (-0.69%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5040>
2020-06-10 15:05:11 +00:00
Rhys Perry
98060ba0f0 aco: p_extract_vector in 64-bit u2f16/i2f16
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5040>
2020-06-10 15:05:11 +00:00
Rhys Perry
d9cfb8ad48 aco: validate instructions reading/writing upper halves/bytes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5040>
2020-06-10 15:05:11 +00:00
Icecream95
3a1a40b443 panfrost: Add writes_stencil to the EARLY_Z disable list
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
deaef1df15 pan/mdg: Print writeout sources in mir_print_instruction
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
d37e901e35 pan/mdg: Add new depth store lowering
This uses the new nir_intrinsic_store_combined_output_pan intrinsic,
which can write depth, stencil and color in a single instruction. If
there are no color writes, the "depth RT" is written to.

Fixes the dEQP GLES3 depth write tests, as well as the piglit tests
fragdepth_gles2, glsl-1.10-fragdepth and when modified to not rely
on depth/stencil reload, glsl-fs-shader-stencil-export.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
a68063402b pan/mdg: Add depth/stencil support to emit_fragment_store
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
7534a31a11 pan/mdg: Move search_var to earlier in midgard_compile.c
It will be needed by the new zs lowering.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
2f3d60c84b pan/mdg: Add new depth writeout code
We schedule depth writeout to smul and stencil to vlut, so scheduling
to smul has to be disabled in these cases.

When only writing stencil, scheduling to smul is still disabled to
prevent stencil writeout from being scheduled there.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
92d3f1fe59 pan/mdg: Replace writeout booleans with a single value
A single value is easier to deal with than three separate booleans.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
bcc8f28b1a nir: Replace the zs_output_pan intrinsic with combined_output_pan
Depth and stencil writes are combined with color writes, so we need
this intrinsic which has sources for color, RT, depth and stencil.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
2a5504fb92 pan/mdg: Remove writeout case from bytemask_of_read_components
By setting the swizzle for the fragment color, and setting qmask to ~0
for branches, the special case for writeout branches can be removed
from mir_bytemask_of_read_components_index.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
8f36904bae pan/mdg: Remove old depth writeout code
We need to be able to do color writeout at the same time as depth
writeout. The old code can't do that, so needs to be removed.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
7da8667a7b pan/mdg: Remove old zs store lowering
It is broken for when there are also color writes, and will be
replaced with a new lowering which takes that into account.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
ddc2ae32cf pan/mdg: Move r1.w writeout to branch->dest
There will need to be sources for depth and stencil writeout, so
something has to be moved to the dest of the writeout branch.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Icecream95
5f5a973709 pan/mdg: Add a macro for printing instruction source information
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
2020-06-10 13:54:03 +00:00
Alyssa Rosenzweig
dc8bffe999 nir: Remove nir_intrinsic_output_u8_as_fp16_pan
Now unused in favour of nir_intrinsic_load_output, happily.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5287>
2020-06-10 09:30:31 +00:00
Pierre-Eric Pelloux-Prayer
8275dc1ed5 ac/surface: fix epitch when modifying surf_pitch
This is needed otherwise it can cause bad rendering of UYVY files.
The align(..., 256 / surf->bpe) constraint comes from addrlib.

Fixes: 69aadc4933 ("radeonsi: fix surf_pitch for subsampled surface")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5314>
2020-06-10 09:11:23 +00:00
Pierre-Eric Pelloux-Prayer
e9826a1bb2 ac/surface: set SCANOUT if surf->is_displayable
Fixes: ba10fb3f7f ("radeonsi: preserve the scanout flag for shared resources on gfx9 and gfx10")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5314>
2020-06-10 09:11:23 +00:00
Erik Faye-Lund
10f07495f6 zink: only report device-local memory as video-memory
While the definition of "video memory" isn't super clear, I think it's
pretty reasonable to assume host-memory isn't meant to be included. So
let's only count dedicated memory here.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3107
Reviewed-by: Witold Baryluk <witold.baryluk@gmail.com>
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5409>
2020-06-10 08:58:09 +00:00
Samuel Pitoiset
9b58c4958b ac/nir: fix integer comparisons with pointers
If we get a comparison between a pointer and an integer, LLVM
complains if the operands aren't of the same type.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3085
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5397>
2020-06-10 08:18:22 +00:00
Pierre-Eric Pelloux-Prayer
24ceb6a594 radeonsi/ngg: try GS multi-cycling mode if default mode failed
If gsprim_lds_size is larger than target_lds_size then gfx10_ngg_calculate_subgroup_info
will fail.

This commit adds a logic to try the multi-cycling in this case because it's
using less memory.

This fix glsl-1.50-gs-max-output when using NGG.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5401>
2020-06-10 09:33:58 +02:00
Pierre-Eric Pelloux-Prayer
ce7692fc19 radeonsi: add return value to gfx10_ngg_calculate_subgroup_info
gfx10_ngg_calculate_subgroup_info uses assert to detect invalid configuration,
but if asserts are disabled it will continue its execution.

This commits adds a boolean return value to let the caller know that something
went wrong and that the results mustn't be used.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3103
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5401>
2020-06-10 09:33:48 +02:00
Andrii Simiklit
2c711beb5c glsl: fix crash on glsl macro redefinition
In case shader contains two equal macro defines, first one with trailing spaces
and the second one without.
`#define A 1   `
`#define A 1`
The parser crashes

Fixes: 0346ad3774 ("glsl: ignore trailing whitespace when define redefined")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5312>
2020-06-10 03:29:39 +00:00
Jason Ekstrand
0c37cbf807 anv/allocator: Compare to start_offset in state_pool_free_no_vg
In d11e4738a8, we started using a start_offset to allow us to
allocate pools where the base address isn't at the start of the pool.
This is useful for binding table pools which want to be relative to
surface state base address (more or less), among other things.  However,
we had a bug where, if you have a negative offset, everything returned
to the pool would end up being returned to the "back" of the pool.  This
isn't what we want for binding tables in the softpin world.  This was
causing us to never actually re-use any binding table blocks.  How this
passed CTS, I have no idea.

Closes: #3100
Fixes: d11e4738a8 "anv/allocator: Add a start_offset to anv_state_pool"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5395>
2020-06-09 22:52:26 +00:00
Alyssa Rosenzweig
5d547858da panfrost: Ensure we have ro before using it
Even through the resouce requested has a BIND_SCANOUT or related tag,
this does not mean that we have a render-only driver.

This can trivially happen as one requests such resource from GBM, while
using the panfrost fd (and hence panfrost_dri.so)

Forward port of !3000

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Closes: #2664
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5410>
2020-06-09 22:09:07 +00:00
Samuel Pitoiset
64f2d45c3b radv/aco: enable shaderInt8 and VK_KHR_shader_float16_int8 on GFX6-GFX7
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Samuel Pitoiset
be4dd6abd1 radv/aco: enable shaderInt16 on GFX6-GFX7
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Samuel Pitoiset
b3aee3aa23 radv/aco: enable 8-bit/16-bit storage on GFX6-GFX7
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Daniel Schürmann
5cde4989d3 aco: remove unnecessary split- and create_vector instructions for subdword loads
This helps GFX6/7 by removing unnecessary shuffle code.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Samuel Pitoiset
5446e3cf2e aco: fix alignment of vectors with 4 elements
I think this case was just missing.

This fixes a bunch of 16-bit storage related CTS failures like
dEQP-VK.ssbo.phys.layout.single_basic_type.std430.u16vec4.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Samuel Pitoiset
c7bd0f8cd5 aco: implement 8-bit/16-bit conversions on GFX6-GFX7
Use v_bfe to implement small bitsize conversions because the
compiler probably optimizes this better.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Daniel Schürmann
db957f9135 aco: optimize packing of 16bit subdword registers on GFX6/7
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Daniel Schürmann
2a51840c52 aco: skip partial copies on first iteration when lowering to hw
Helps some Detroit : Become Human shaders.

Totals from affected shaders: (VEGA)
Code Size: 47693912 -> 47670212 (-0.05 %) bytes
Instructions: 9183788 -> 9177863 (-0.06 %)
Copies: 910052 -> 904127 (-0.65 %)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Daniel Schürmann
1d6f667193 aco: coalesce copies more aggressively when lowering to hw
Helps some Detroit : Become Human shaders.

Totals from affected shaders: (VEGA)
Code Size: 9880420 -> 9879088 (-0.01 %) bytes
Instructions: 1918553 -> 1918220 (-0.02 %)
Copies: 177783 -> 177450 (-0.19 %)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Daniel Schürmann
b21d2d9a9f aco: add and use scratch SGPR to lower subdword p_create_vector on GFX6/7
This is needed to lower some corner cases correctly,
in case the same operand occurs multiple times:
e.g. v0 = p_create_vector(v0[0:8], v0[0:8], v0[0:8], v0[0:8])

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Daniel Schürmann
9e8e12ea6d aco: adjust GFX6 subdword lowering workarounds for 8bit
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Daniel Schürmann
b083581010 aco: Workarounds subdword lowering on GFX6/7
As there are no SDWA instructions, we need to take care not to overwrite
the upper bits of other copy_operation's operands.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Daniel Schürmann
942e3c40c3 aco: use full-register instructions to implement subdword packing on GFX6/7
On GFX6/7, there are no SDWA instructions.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Daniel Schürmann
3f03db848d aco: simplify statistics collection for copies
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Daniel Schürmann
0560831593 aco: fix register assignment for p_create_vector on GFX6/7
In case, some operand was already placed in the definition space,
it could happen that it wasn't considered for live-range splits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
2020-06-09 21:25:38 +00:00
Mike Blumenkrantz
98d07bd5a0 zink: emit interpolation decorations for ntv outputs
this matches up with nir internal states pre/post ntv

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5384>
2020-06-09 20:56:09 +00:00
Mike Blumenkrantz
ad8e61621b zink: track program usages for each shader
when shaders are created and destroyed in large numbers, the same pointers
get reused for different shaders, which can lead to bad lookups in the
program_cache hash table.

now each shader tracks its program usage to automatically remove itself from
that program in order to avoid hash collisions

fixes mesa/mesa#3053

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5315>
2020-06-09 20:30:25 +00:00
Erik Faye-Lund
48925f6927 zink: assert that image-view format isn't undefined
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5407>
2020-06-09 19:35:26 +00:00
Erik Faye-Lund
2d3c6605d6 zink: emulate B8G8R8X8_SRGB with B8G8R8A8_SRGB
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5407>
2020-06-09 19:35:26 +00:00
Eric Anholt
3e11f04d4e turnip: Expose robustBufferAccess.
It is a required device feature, and all enabled tests in
dEQP-VK.robustness.* pass.

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5266>
2020-06-09 18:28:18 +00:00
Eric Anholt
3d5429d646 ci: Use rsync for initial nfsroot population on cheza.
rm -rf and then copying over all the contents again is a waste of time
when we'll almost always be using the same rootfs.  Saves about 30s of job
time.

Closes: #3065
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5266>
2020-06-09 18:28:18 +00:00
Eric Anholt
9e11cce517 ci: Enable pre-merge fractional vulkan CTS runs on the turnip driver.
Test 1/50th of the CTS on a630 pre-merge, since we've got hardware that
can do it and infrastructure that should handle instability with a
less-mature driver.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5266>
2020-06-09 18:28:18 +00:00
Eric Anholt
dd167788ec ci: Build the full VK CTS for baremetal testing.
I'm going to enable the VK CTS on cheza, so swap the deqp we have in the
container.  build-deqp-vk already included GLES deqp binaries and data,
and is a newer branch than the last opengl-es-cts tag.

This brings a few things back over from build-deqp-gl for testlog
extraction, and copyes out the GLES mustpass lists.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5266>
2020-06-09 18:28:18 +00:00
Eric Anholt
eca02ec44a ci: Disable shader cache on vulkan CI runs.
I found it to be flaky in freedreno CI, and tracked down the issue to
parallel-deqp-runner needing to manage the shader cache
(https://gitlab.freedesktop.org/mesa/parallel-deqp-runner/-/merge_requests/13).
Until we fix that in the runner, disable it.  This should matter less now
that we prebuild the SPIRV, though.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5266>
2020-06-09 18:28:17 +00:00
Eric Anholt
f70030d276 ci: Bump up to the current version of the VK CTS.
For enabling VK CTS on freedreno, I've heard there were important
stability fixes in the CTS recently.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5266>
2020-06-09 18:28:17 +00:00
Eric Anholt
58dd904c59 turnip: Fix crashes in compute with no descriptors to load.
Found when trying to rebase cheza VK CI on top of this change.

Fixes: 334204823e ("tu: Fix context faults loading unused descriptor sets")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5266>
2020-06-09 18:28:17 +00:00
Thong Thai
b2324f4560 frontends/vdpau: Default destination rect to source rect
mpv is passing in a NULL destination_video_rect, which results in a
black screen when playing videos using VDPAU in some cases.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5386>
2020-06-09 18:02:09 +00:00
Marek Olšák
0795241dde radeonsi: require LLVM 11 for gfx10.3
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
9538b9a68e radeonsi: add support for Sienna Cichlid
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
789cdab3b6 ac: align num_vgprs for gfx10.3
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
2cc4bfbe01 radeonsi: don't set any XNACK options on gfx10.3
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
430d384c31 radeonsi: set BIG_PAGE fields on gfx10.3
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
7edf15ad47 radeonsi: move L2_CACHE_CONTROL registers into si_emit_framebuffer_state
the next commit will set more fields.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
788696c7b2 radeonsi: implement R9G9B9E5 render target and image store support on gfx10.3
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
a54bcb9429 radeonsi: enable larger SDMA clears and copies on gfx10.3
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
c4b5fd9ab0 radeonsi: honor a user-specified pitch on gfx10.3
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
abe89e1329 ac/surface: add displayable DCC code for gfx10.3
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
a23802bcb9 ac,radeonsi: start adding support for gfx10.3
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
a1602516d7 ac,radeonsi: replace == GFX10 with >= GFX10 where it's needed
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
2020-06-09 16:17:36 +00:00
Marek Olšák
ceaf848c56 radeonsi: enable ARB_sparse_buffer
This seems to be working now, but it wasn't working before.
I don't know what fixed this. Tested on Raven and Navi14.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5402>
2020-06-09 16:00:38 +00:00
Connor Abbott
334204823e tu: Fix context faults loading unused descriptor sets
The app is allowed to never bind descriptor sets that are statically
unused by the pipeline, which would've caused a context fault since
CP_LOAD_STATE6 would try to load the descriptors that don't exist. Fix
this by not preloading descriptors from unused descriptor sets. We could
do more fine-grained accounting of which descriptors are used, but this
is enough to fix the problem.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5400>
2020-06-09 15:35:29 +00:00
Danylo Piliaiev
a751051248 i965: Work around incorrect usage of glDrawRangeElements in UE4
Unreal Engine 4 has a bug in usage of glDrawRangeElements,
causing it to be called with a number of vertices in place
of "end" parameter (which specifies the maximum array index
contained in indices).

Since there is unknown amount of games affected and we
could not identify that a game is built with UE4 - we are
forced to make a blanket workaround, disregarding max_index
in range calculations. Fortunately all such calls look like:
  glDrawRangeElements(GL_TRIANGLES, 0, 3, 3, ...);
So we are able to narrow down this workaround.

This was uncovered after b684030c3a
broke a bunch of UE4 games.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2917
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5203>
2020-06-09 15:04:35 +00:00
Connor Abbott
487aa807bd tu: Rewrite flushing to use barriers
Replace the various ad-hoc flushes that we've inserted, copied from
freedreno, etc. with a unified system that uses the user-supplied
information via vkCmdPipelineBarrier() and subpass dependencies.

There are a few notable differences in behavior:

- We now move setting RB_CCU_CNTL up a little in the gmem case, but
hopefully that won't matter too much. This matches what the Vulkan blob
does.

- We properly implement delayed setting of events, completing our
implementaton of events.

- Finally, of course, we should be a lot less flush-happy. We won't emit
useless CCU/cache flushes with multiple copies, renderpasses, etc. that
don't depend on each other, and also won't flush/invalidate the cache
around renderpasses unless we actually need to.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
2020-06-09 14:40:52 +00:00
Connor Abbott
29abf49886 tu: Remove useless event_write helpers
tu6_emit_cache_flush() was wrongly named, and with the removal of the
last parameter both are useless.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
2020-06-09 14:40:52 +00:00
Connor Abbott
f4f6a9be9f tu: Don't actually track seqno's for events
We just dropped the last user which actually cared about the seqno.
This never worked anyway, since the seqno was never reset between
multiple executions of the same command buffer. Turn the part of the
control buffer which used to track the seqno into a dummy dword, and
figure out automatically whether we need to include it. We will
implement seqnos again eventually, with timline semaphores, but that
will likely be totally different.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
2020-06-09 14:40:52 +00:00
Connor Abbott
dfb176a0ac tu: Remove useless post-binning flushes
The Vulkan blob doesn't do this, and based on my understanding of how
the blob works this is unnecessary. CACHE_FLUSH is already serialized
against all 3d commands so you don't need to wait for rendering commands
to finish before issuing it, and the subsequent wfi + WAIT_FOR_ME will
cause the CP to wait for the CACHE_FLUSH to finish, so there's also no
need to wait for it to complete. The CACHE_INVALIDATE also seems
unnecessary, and also isn't done by the blob.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
2020-06-09 14:40:51 +00:00
Icecream95
18c067f9f0 panfrost: Mark PIPE_BUFFER BOs as not renderable
Without this, memory usage explodes by 16x due to height alignment.

Closes: #2715
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4451>
2020-06-09 13:52:52 +00:00
Pierre-Eric Pelloux-Prayer
db57624c0c winsys/radeon: do not cast bo->va as void*
Using a util_hash_table_create_ptr_keys to store bo->va address doesn't
work on 32 bits.
This commit makes radeon_drm_winsys::bo_vas a hash_table_u64 instead.

Tested by Miklós Máté.

CC: 20.1 <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3056
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5380>
2020-06-09 11:28:16 +02:00
Christian Gmeiner
839bc2daa9 ci: use separate docker images for baremetal builds
Using arm_test-base as a separate base layer as well for storage &
network bandwidth efficiency.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5381>
2020-06-09 06:29:30 +00:00
Christian Gmeiner
408b36a11d ci: add arm_test-base docker image
Similar to x86_build-base.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5381>
2020-06-09 06:29:30 +00:00
Samuel Pitoiset
d7923c74d4 radv/llvm: expose VK_EXT_shader_demote_to_helper_invocation with LLVM 9+
It should already work with the LLVM backend.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5361>
2020-06-09 08:04:23 +02:00
Marek Olšák
d76e8131ac glthread: sync in glFlush for multiple contexts
See the code comment.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5382>
2020-06-09 05:07:01 +00:00
Marek Olšák
90c34aed1d gallium/u_vbuf: add a faster path for uploading non-interleaved attribs
+1% higher FPS in torcs.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5304>
2020-06-09 00:45:26 -04:00
Marek Olšák
88e8f1a38d gallium/u_vbuf: get rid of some pointer dereferences
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5304>
2020-06-09 00:45:23 -04:00
Ben Skeggs
a6c747e8e0 nir: use bitfield_insert instead of bfi in nir_lower_double_ops
NVIDIA hardware doesn't have an equivilant to bfi, but we do already have
a lowering for bitfield_insert->bfi.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5373>
2020-06-09 08:38:22 +10:00
Jonathan Marek
7b4f0eadc1 turnip: fix VFD_CONTROL for binning pass
Fixes some cases with TU_DEBUG=forcebin, specifically the failures in:
dEQP-VK.glsl.*_vertex

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
2020-06-08 16:28:48 -04:00
Jonathan Marek
ab72c07aef turnip: use common emit_xs_cntl to fill a6xx_sp_xs_ctrl_reg0
Note this changes the value of SP_GS_CTRL_REG0, by using FOUR_QUADS and
setting MERGEDREGS. ir3 expects MERGEDREGS, and using FOUR_QUADS instead
of TWO_QUADS doesn't seem to hurt.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
2020-06-08 16:28:43 -04:00
Jonathan Marek
e16608e233 turnip: fix HW binning with geometry shader
Fixes failures with TU_DEBUG=forcebin and geometry shaders, for example:
dEQP-VK.binding_model.*geometry*
dEQP-VK.transform_feedback.simple.query*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
2020-06-08 16:23:05 -04:00
Jonathan Marek
6ac4d778fa turnip: correctly emit non-binning vs in transform feedback case
The offset given to tu6_emit_shader_object was wrong, binning_vs_offset
should only be used when using the binning pass vs.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
2020-06-08 16:23:05 -04:00
Jonathan Marek
6cc95abb27 freedreno/a6xx: use nonbinning VS when GS is used
The current "ds = state->bs" seems broken, and the "vs = state->bs" is
unnecessary (already set above). Since it was added as part of a GS-related
patch, I think this is what was intended.

Note: tesselation disables GMEM rendering so we shouldn't have to worry
about hs/ds + binning interaction.

Fixes: 0eebedb619 ("freedreno/a6xx: Emit program state for GS")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
2020-06-08 16:23:05 -04:00
Jonathan Marek
88d5917cc1 turnip: clamp sampler minLod/maxLod
Otherwise A6XX_TEX_SAMP_1_{MIN,MAX}_LOD silently overflows.

This fixes these tests:
dEQP-VK.texture.explicit_lod.2d.derivatives.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5375>
2020-06-08 19:52:41 +00:00
Jonathan Marek
fecd83a0e8 turnip: update some properties based on blob driver
subTexelPrecisionBits/mipmapPrecisionBits change fixes some failures in:
dEQP-VK.texture.explicit_lod.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5375>
2020-06-08 19:52:41 +00:00
Jonathan Marek
8c26c9eed8 turnip: move HLSQ_UPDATE_CNTL write to before xs config writes
This matches the blob and gallium driver more closely, and fixes a
rendering issue observed on a650.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5376>
2020-06-08 18:08:23 +00:00
Caio Marcelo de Oliveira Filho
d1f6d2f3e8 nir: Fix logic that ends combine barrier sequence
The combination must stop when we see a scoped barrier that have
execution scope, i.e. it has control barrier behavior.  The code was
mistakenly looking at the wrong scope.

Fixes: 345b5847b4 ("nir: Replace the scoped_memory barrier by a scoped_barrier")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5365>
2020-06-08 15:49:24 +00:00
Caio Marcelo de Oliveira Filho
fe214d60bc intel/fs: Add Fall-through comment
Just to clarify the missing break is intentional.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5365>
2020-06-08 15:49:24 +00:00
Caio Marcelo de Oliveira Filho
e5bb4b1ee8 spirv: Memory semantics is optional for OpControlBarrier
Fixes: 3ed2123d77 ("spirv: Use scoped barriers for SpvOpControlBarrier")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5365>
2020-06-08 15:49:24 +00:00
Caio Marcelo de Oliveira Filho
b7a3821a5c nir: Fix printing execution scope of a scoped barrier
Fixes: 345b5847b4 ("nir: Replace the scoped_memory barrier by a scoped_barrier")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5365>
2020-06-08 15:49:24 +00:00
Christian Gmeiner
7ec2582087 etnaviv: drop translate_blend(..)
PIPE_BLEND_* matches 1:1 the hardware defines.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4187>
2020-06-08 15:35:13 +00:00
Danylo Piliaiev
9f1cf0e491 glsl: inline functions with unsupported return type before converting to nir
glsl_to_nir doesn't expect non-vector/scalar return types in functions.

Fixes: 7e60d5a501
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3058
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3060
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5333>
2020-06-08 15:01:50 +00:00
Rhys Perry
43e69475ad aco: use v_xor3_b32
fossil-db (Navi):
Totals from 334 (0.26% of 128321) affected shaders:
CodeSize: 3345532 -> 3345484 (-0.00%); split: -0.00%, +0.00%
Instrs: 624662 -> 622778 (-0.30%); split: -0.30%, +0.00%

Mostly affects some parallel-rdp shaders

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5357>
2020-06-08 13:20:01 +00:00
Rhys Perry
1234faa7bf ac/gpu_info, radv: set max_wave64_per_simd to 20 on GFX10
Fixes RADV max_waves reporting for GFX10

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5356>
2020-06-08 10:26:59 +00:00
Samuel Pitoiset
86f21e4eba nir/lower_explicit_io: fix NON_UNIFORM access for UBO loads
Make sure to propagate the NON_UNIFORM access for UBO loads, so
that non-uniform loads are correctly lowered.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5311>
2020-06-08 07:35:43 +00:00
Arcady Goldmints-Orlov
b38d3cdcea nir/spirv/glsl450: increase asin(x) precision
asin(x) is now implemented using a piecewise approximation, which
improves the precision for |x| < 0.5
Previously, we were using a polynomial approximation for both the
asin() and acos() functions. Unfortunately, for asin(), this polynomial
does not have enough precision to satisfy the Vulkan CTS requiremenents,
which define the asin() precision based on the precision of
atan2(x, sqrt(1.0 - x*x)). The piecewise approximation gives the needed
precision in the problematic range.

v2: Skip the piecewise approximation for acos

Closes: #1843

Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3809>
2020-06-08 07:10:17 +00:00
Samuel Pitoiset
008b0d1701 ac/nir: adjust an assertion for D16 on GFX6-GFX7
16-bit types can be used with MUBUF on GFX6-GFX7.

Fixes: c3e0ba52a0 ("ac/nir: support 16-bit data in buffer_load_format opcodes")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5325>
2020-06-08 08:45:32 +02:00
Peter Seiderer
b3beb6207f v3d_bufmgr: fix time_t printf
Fixes:

  error: format ‘%ld’ expects argument of type ‘long int’, but argument 3 has type ‘time_t’ {aka ‘long long int’}

Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4279>
2020-06-07 18:08:47 +02:00
Peter Seiderer
d512028d06 pan_bo.h: add time.h include for time_t
Fixes:

  ../src/gallium/drivers/panfrost/pan_bo.h:93:9: error: unknown type name ‘time_t’

Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4279>
2020-06-07 18:08:17 +02:00
Peter Seiderer
07ba5e47e6 vc4_bufmgr: fix time_t printf
Fixes:

  error: format ‘%ld’ expects argument of type ‘long int’, but argument 3 has type ‘time_t’ {aka ‘long long int’}

Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4279>
2020-06-07 18:07:47 +02:00
Timothy Arceri
e43ab7bb05 glsl: fix potential slow compile times for GLSLOptimizeConservatively
See code comment for full description of the change.

Fixes: 0a5018c1a4 ("mesa: add gl_constants::GLSLOptimizeConservatively")

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3034

Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5346>
2020-06-07 03:28:30 +00:00
Charmaine Lee
dd81f4853c llvmpipe: do not enable tessellation shader without llvm coroutines support
Tessellation shader in llvmpipe depends on llvm coroutines support. So do not
advertise tessellation shader support in llvmpipe if GALLIVM_HAVE_CORO is FALSE.

This fixes assertion in LLVMTokenTypeInContext() running tessellation shader
tests with llvm version < 6.

Fixes: eb522717 "llvmpipe: add support for tessellation shaders"

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5366>
2020-06-06 22:45:21 +00:00
Marcin Ślusarz
990b3782bc intel/compiler: fix Android build
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Fixes: 689acc7398 ("intel/compiler: Extract control barriers from scoped barriers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3087
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5354>
2020-06-06 18:42:03 +00:00
Vinson Lee
6a841dbf4e intel/genxml: Migrate from deprecated xml.etree.ElementTree getchildren.
xml.etree.ElementTree getchildren was deprecated since Python 2.7 and
will be removed in Python 3.9.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5348>
2020-06-06 08:20:13 +00:00
Mauro Rossi
06650a771d android: svga: fix build for GL4.1 support
Fixes the following building errors:

external/mesa/src/gallium/drivers/svga/svga_context.c:184: error: undefined reference to 'svga_init_ts_functions'
external/mesa/src/gallium/drivers/svga/svga_context.c💯 error: undefined reference to 'svga_cleanup_tcs_state'
out/target/product/x86_64/obj_x86/STATIC_LIBRARIES/libmesa_pipe_svga_intermediates/libmesa_pipe_svga.a(svga_state.o):svga_state.c:hw_draw_state_sm5: error: undefined reference to 'svga_hw_tes'
out/target/product/x86_64/obj_x86/STATIC_LIBRARIES/libmesa_pipe_svga_intermediates/libmesa_pipe_svga.a(svga_state.o):svga_state.c:hw_draw_state_sm5: error: undefined reference to 'svga_hw_tcs'

Fixes: ccb4ea5a "svga: Add GL4.1(compatibility profile) support in svga driver"
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5364>
2020-06-06 09:32:25 +02:00
Mauro Rossi
0570c7a7b5 android: util: fix build for GL4.1 support
Fixes the following building errors:

external/mesa/src/gallium/drivers/svga/svga_state_tgsi_transform.c:154: error: undefined reference to 'tgsi_write_vpos'
external/mesa/src/gallium/drivers/svga/svga_state_tgsi_transform.c:201: error: undefined reference to 'tgsi_remove_dynamic_indexing'

Fixes: 48a7456f ("util: Add util functionality for GL4.1 support")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5364>
2020-06-06 09:32:19 +02:00
Vinson Lee
faa339e666 Switch from cElementTree to ElementTree.
The xml.etree.cElementTree module will be removed in Python 3.9. Since
Python 3.3 the xml.etree.cElementTree module has been deprecated, the
xml.etree.ElementTree module uses a fast implementation whenever
available.

Builds using Python 2.7 can still work but with the slower
implementation.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5349>
2020-06-05 23:42:54 -07:00
Icecream95
a61532e4db Revert "panfrost: Keep cached BOs mmap'd"
This reverts commit 794c239a99.

A kernel bug causes cached BOs to not be unmapped correctly,
triggering "bad page cache" kernel messages and causing short hangs.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5355>
2020-06-05 23:51:32 +00:00
Icecream95
d97aaad155 pan/midgard: Use a signed value for checking inline constants
Inline constants are sign extended, so we should use a int16_t instead
of an unsigned type.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5351>
2020-06-05 22:51:45 +00:00
Eric Anholt
0bacb280a8 freedreno/ir3: Handle cases where we decide not to lower UBO 0 loads.
We advertize 4096 vec4s of GL uniform storage, but the HW can only store
512 vec4s in the const buffer.

Closes: #3049
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
2020-06-05 13:43:30 -07:00
Eric Anholt
e349f50279 freedreno/ir3: Drop the max_const on a6xx to 512.
The GLES blob on the p3a limits constlen to 512 between VS and FS across
a6xx gpu ids (615, 630, 640, and 650).  Experimentally, exceeding that
limit in any one stage results in rendering corruption or GPU hangs
(though my most detailed testing had a loop limit in a uniform, so that
may the cause of the hang).  Clamp the limit we use inside of a shader so
we don't exceed it within a stage.

This commit doesn't resovle limiting inter-stage.  Experimentally, I've
found that I can push up to a total of ~768 vec4s between VS and FS on
a630, with or without uniform updates between each draw.  We'll need to do
some shader key-based limiting of constlen at draw time to respect that
limit, but that's left for future work, and this commit is enough for the
google earth case that initiated this work.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
2020-06-05 13:36:29 -07:00
Eric Anholt
486b894307 freedreno/ir3: Account for driver params in UBO max const upload.
The const state setup needs to be able to push its driver params, so
account for them in the analyze_ubo_ranges.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
2020-06-05 13:36:29 -07:00
Eric Anholt
a25347ab92 freedreno/ir3: Stop shifting UBO 1 down to be UBO 0.
It turns out the GL uniforms file is larger than the hardware constant
file, so we need to limit how many UBOs we lower to constbuf loads.  To do
actual UBO loads, we'll need to be able to upload UBO 0's pointer or
descriptor.

No difference on nohw 1 UBO update drawoverhead case (n=35).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
2020-06-05 13:36:29 -07:00
Eric Anholt
9e58ab09ff freedreno/ir3: Drop unnecessary alignment of pushed UBO size.
The analysis pass gives us vec4-aligned size, and all of our other
constbuf allocations here are in vec4 units, so we can just divide by 16.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
2020-06-05 13:36:29 -07:00
Eric Anholt
07ec745014 freedreno/ir3: Stop pushing immediates once we've filled the constbuf.
If we filled the constbuf up with UBOs, we may need to avoid generating
more immediate push constants.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
2020-06-05 13:36:29 -07:00
Eric Anholt
ab29f2da42 freedreno/ir3: Refactor ir3_cp's lower_immed().
There was duplicated handling in the callers that we can just move inside.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
2020-06-05 13:36:29 -07:00
Eric Anholt
4065861807 freedreno: Upload gallium constbufs as needed when referenced as a UBO.
For now we never ask to set up UBO 0 as a real UBO, so this doesn't
trigger, but it gets us ready for handling the case where UBO 0 is too big
to be push constants in the HW.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>
2020-06-05 13:36:29 -07:00
Eric Anholt
d1f9d1e26a freedreno/a6xx: Add support for ALPHA_TO_ONE.
Fixes piglit ext_framebuffer_multisample-draw-buffers-alpha-to-one

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5343>
2020-06-05 18:11:22 +00:00
Eric Anholt
ac1ab9294a turnip: Add support for alphaToOne.
Comparing a blob trace using the feature to one not, the difference was
pretty obvious and in the spot you'd expect compared to alphaToCoverage.
The SP_ reg didn't have a corresponding bit set, though it also has an
alphaToCoverage.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5343>
2020-06-05 18:11:22 +00:00
Eric Anholt
79f3003445 turnip: Use tu_cs_emit_regs() for BLEND_CONTROL.
Just a cleanup since I was in the area.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5343>
2020-06-05 18:11:22 +00:00
Rhys Perry
5d13c7477e radv: set keep_statistic_info with RADV_DEBUG=shaderstats
Needed for RADV_DEBUG=shaderstats to dump ACO statistics.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5358>
2020-06-05 15:11:01 +00:00
Eric Engestrom
981d07c74a intel: fix gen_sort_tags.py
The script was failing for me (python 3.8), not sure if this is a recent
python version break or not as I don't know how often people have been
running this script:

    Processing ./gen9.xml... Traceback (most recent call last):
      File "./gen_sort_tags.py", line 177, in <module>
        main()
      File "./gen_sort_tags.py", line 170, in main
        genxml[:] = enums + sorted_structs.values() + instructions + registers
    TypeError: can only concatenate list (not "odict_values") to list

Turning the odict into a list fixes it for me, and the resulting xml
file are identical to before :)

Fixes: 903e142f0d ("genxml: add a sorting script")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5352>
2020-06-05 14:31:13 +00:00
Samuel Pitoiset
bfff330f06 radv/aco: enable VK_KHR_shader_subgroup_extended_types on GFX6-GFX7
CTS pass on Pitcairn (GFX6). This extension isn't really useful
without 8-bit/16-bit storage though but this is going to be exposed
soon.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5327>
2020-06-05 16:04:08 +02:00
Samuel Pitoiset
6391f9ab4c aco: fix nir_intrinsic_quad_* with 8-bit in GFX6-GFX7
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5327>
2020-06-05 16:04:06 +02:00
Samuel Pitoiset
e1523b34c2 aco: fix sign-extend 8-bit subgroup operations on GFX6-GFX7
SDWA is GFX8+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5327>
2020-06-05 16:04:05 +02:00
Samuel Pitoiset
ee4bc13de2 aco: use v_bfe_u32 for unsigned reductions sign-extension on GFX6-GFX7
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5327>
2020-06-05 16:04:03 +02:00
Eric Engestrom
a874132cc4 intel/genxml: drop sort_xml.sh and move the loop directly in gen_sort_tags.py
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5353>
2020-06-05 13:44:18 +00:00
Bas Nieuwenhuizen
c67ef7695a radv: Use ac_surface to allocate aux surfaces.
For consistency and a bunch of codesharing.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
63db31fdfc amd/common: Add total alignment calculation.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
f70b577683 radv: Allocate values/predicates at the end of the image.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
ec671e8718 radv: Disable HTILE in ac_surface.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
f84b4e2639 radv: Disable DCC in ac_surface.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
81dee6cf8f radv: Use offsets in surface struct.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
ffae3589c9 radv: Rely on ac_surface for avoiding cmask for linear images.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
b5488a863c radv: Enforce the contiguous memory for DCC layers in ac_surface.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
d3db633f6d radv: Pass no_metadata_planes info in to ac_surface.
Also do not allocate aux surfaces for multi-plane images. I may
have messed up and used plane 1 offsets for the other planes as well.
I cannot imagine that sharing aux surfaces between the planes will
work well.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
599ea341dd radv: Use ac_surface to determine fmask enable.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194>
2020-06-05 13:27:55 +00:00
Christian Gmeiner
4b7de75b4b ci: add U-Boot specific fetch strings
U-Boot's fastboot over udp generates the following output:
  Listening for fastboot command on x.y.z.w

Also add a general 'data abort' error string seen with an
too old U-Boot version:
  https://github.com/u-boot/u-boot/commit/95712af

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5258>
2020-06-05 11:02:35 +00:00
Christian Gmeiner
06d8171994 ci: extend expect-output.sh
We need to support different fastboot fetch strings for different
bootloader solutions. Lets extend expect-output.sh to support
multiple fetch strings (-f) and add support for error catch
strings (-e) to stop the CI run early.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5258>
2020-06-05 11:02:35 +00:00
Rob Clark
ef5b8bbc5e freedreno/computerator: fix missing dependency on generated header
Fixes:
```
 ../mesa-freedreno-20.2.0_pre/src/freedreno/computerator/ir3_asm.c:25:10: fatal error: 'ir3/ir3_parser.h' file not found
 #include "ir3/ir3_parser.h"
          ^~~~~~~~~~~~~~~~~~
 1 error generated.
```

Fixes: da467817e3 ("freedreno/ir3: Move ir3 assembler to backend compiler")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5340>
2020-06-05 09:48:47 +00:00
Eric Engestrom
7a68045b5d glapi: remove deprecated .getchildren() that has been replace with an iterator
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3086
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5342>
2020-06-05 09:16:13 +00:00
Samuel Pitoiset
c9a9b363ce radv/aco: enable 64-bit atomic features if RADV is linked with LLVM 8
Just in case someone links RADV with this old LLVM 8 and wants ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5331>
2020-06-05 07:40:29 +00:00
Neha Bhende
ba37d408da svga: Performance fixes
This is a squash commit of in house performance fixes and misc bug fixes
for GL4.1 support.

Performance fixes:
* started using system memory for constant buffer to gain 3X performance boost with metro redux

Misc bug fixes:
* fixed usage of vertexid in shader
* added empty control point phase in hull shader for zero ouput control point
* misc shader signature fixes
* fixed clip_distance input declaration
* clearing the dirty bit for the surface while using direct map if surface is already flushed
  and there is no pending primitive

This patch also uses SVGA_RETRY macro for commands retries. Part of it is already
used in previous patch.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5317>
2020-06-05 06:36:54 +00:00
Neha Bhende
ccb4ea5a43 svga: Add GL4.1(compatibility profile) support in svga driver
This patch is a squash commit of a very long in-house patch series.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5317>
2020-06-05 06:36:54 +00:00
Neha Bhende
52ce25be87 svga/include: Headers for GL4.1 support
This brings in the new types, enums and #defines for GL 4.1
features in the virtual device.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5317>
2020-06-05 06:36:54 +00:00
Neha Bhende
dc3505f87e winsys/drm: Add GL4.1 support in drm winsys
This is to check whether virtual hardware has SM5 support

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5317>
2020-06-05 06:36:54 +00:00
Neha Bhende
48a7456f4d util: Add util functionality for GL4.1 support
This patch adds the following tgsi utilities

* tgsi_dynamic_indexing: This utility flattens out the dyanamic indexing of constant buffers
* tgsi_vpos: This utility writes zeros to position at index 0 in vertex shader.
  This utility can be used if there is no shader output in vertex shader
* util_make_tess_ctrl_passthrough_shader: This adds passthough tessellation control shader.
  Input of passthrough tess ctrl shader is output of vertex shader
  and output is input of tessellation eval shader.
  If program has tessellation eval shader but no tessellation control shader,
  this utility can be used to create passthrough tessellation control shader.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5317>
2020-06-05 06:36:54 +00:00
Rob Clark
f1f81abfd4 freedreno/a6xx: more early-z
Technically we only have to do late-z in the alpha-test or discard case
if depth-write is enabled.  If depth write is disabled, the depth read /
test / conditional-write interlock that we need to emulate is not a
problem, so we can still use early-z test.

There is a slightly weird case when there is no zsbuf attachment (see
dEQP-GLES31.functional.fbo.no_attachments.*) where the hw wants us to
use LATE_Z.. not entirely sure if this is an interaction with occlusion
query or just a pecularity of how the hw works when there is no depth
buffer.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5336>
2020-06-05 00:57:44 +00:00
Dave Airlie
4d7ee2749f ci: bump virglrenderer to latest version
Need this for upcoming GL 4.0 llvmpipe support.

Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5323>
2020-06-04 20:05:26 +00:00
Eric Anholt
ec98cff6a9 turnip: Simplify vertex buffer bindings.
We were remapping the bindings so the HW binding points were consecutive,
which there's no need for.  Now that we don't shuffle, we can mostly drop
the dependency on the pipeline for this SDS.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5321>
2020-06-04 19:42:54 +00:00
Eric Anholt
5c9728d960 turnip: Don't bother clamping VB size.
From the VK spec: "All elements of pOffsets must be less than the size of
the corresponding element in pBuffers"

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5321>
2020-06-04 19:42:54 +00:00
Eric Anholt
52942f18c6 turnip: Move vertex buffer bindings to SET_DRAW_STATE.
This means that the HW can skip over the vertex buffer state when it's not
used in a bin.  The blob also has this behavior.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5321>
2020-06-04 19:42:54 +00:00
Dave Airlie
c8c7450fc7 llvmpipe: move coroutines out of noopt case
the virgl CI code was using the noopt path and crashing with a
wierd can't select llvm.coro.subfn.addr error, turns out we have
to call the cleanup pass no matter what.

This enable a lot more virgl gles31 passes, but we have
to disable tessellation shaders as now they executed, they
crash due to missing OES_gpu_shader5, I should try and reenable
them when llvmpipe is further along

Fixes: d32690b43c ("gallivm: add coroutine pass manager support")

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-by: Elie Tournier <elie.tournier@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5320>
2020-06-04 19:08:34 +00:00
Alyssa Rosenzweig
2d1688345a pan/mdg: Ensure ld_vary_16 is aligned
Otherwise packing may fail.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 5f8dd413bc ("pan/mdg: Handle 16-bit ld_vary")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5339>
2020-06-04 17:46:45 +00:00
Kristian H. Kristensen
de8be1de13 freedreno/a6xx: Fix VFD_CONTROL emit
The FETCH_CNT field isn't actually the FETCH count. We don't have a
lot of data where it's different from DECODE_CNT, so there's not much
to go by. It could be number of VFD_DEST_CNTL or maybe DECODE_CNT for
binning.  For now, setting both to number of DEST_CNTL gets Google
Earth working again.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5324>
2020-06-04 15:50:41 +00:00
Clément Guérin
202252566b radv: Always expose non-visible local memory type on dedicated GPUs
DOOM Eternal expects this type, but RADV doesn't expose it when the VRAM
is entirely host-visible, in my case on Fiji. Matches AMDVLK behavior.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/3054
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5308>
2020-06-04 15:16:30 +00:00
Alyssa Rosenzweig
622e3a8510 pan/mdg: Legalize inverts with constants
We need to force src_invert to be in the right place even if we flip
when lowering an embedded->inline constant.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 449e5ded93 ("pan/mdg: Treat inot as a modifier")
Reported-by: Icecream95 <ixn@keemail.me>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5299>
2020-06-04 13:17:11 +00:00
Erik Faye-Lund
e61a98877c nir: reuse existing psiz-variable
For shaders where there's already a psiz-variable, we should rather
reuse it than create a second one. This can happen if a shader writes
gl_PointSize, but disables GL_PROGRAM_POINT_SIZE.

Fixes: 878c94288a ("nir: add lowering-pass for point-size mov")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5328>
2020-06-04 09:12:54 +00:00
Lionel Landwerlin
57e4d0aa1c i965: fix export of GEM handles
We reuse DRM file descriptors internally. Therefore when we export a
GEM handle we must do so in the file descriptor used externally.

v2: Fix dmabuf leak
    Fix GEM handle leaks by tracking exported handles

v3: Check os_same_file_description error (Michel)
    Don't create multiple exports for a given GEM table

v4: Add WARN_ONCE (Ken)

v5: Remove blank line (Ian)
    Remove unused field (Ian)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2882
Fixes: 4094558e86 ("i965: share buffer managers across screens")
Tested-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861>
2020-06-04 07:31:38 +00:00
Lionel Landwerlin
aba3aed96e iris: fix export of GEM handles
We reuse DRM file descriptors internally. Therefore when we export a
GEM handle we must do so in the file descriptor used externally.

This change also fixes a file descriptor leak of the FD given at
screen creation.

v2: Don't bother checking fd equals, they're always different
    Fix dmabuf leak
    Fix GEM handle leaks by tracking exported handles

v3: Check os_same_file_description error (Michel)
    Don't create multiple exports for a given GEM table

v4: Add WARN_ONCE (Ken)
    Rename external_fd to winsys_fd

v5: Remove export lock in favor of bufmgr's

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2882
Fixes: 7557f16059 ("iris: share buffer managers accross screens")
Tested-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861>
2020-06-04 07:31:38 +00:00
Lionel Landwerlin
e41e820648 i965: don't forget to set screen on duped image
We'll start using this field more for querying image properties.
Without it we run into a crash.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861>
2020-06-04 07:31:38 +00:00
Lionel Landwerlin
604a86e46f iris: fix BO destruction in error path
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861>
2020-06-04 07:31:38 +00:00
Vinson Lee
c3025bde19 mesa: Fix NetBSD compiler macro.
Reported-by: Rafał Mikrut <mikrutrafal54@gmail.com>
Fixes: a63b90712a ("mesa: also check for __NetBSD__")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3015
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5191>
2020-06-03 21:09:54 -07:00
Rob Clark
e9cda38031 freedreno/a6xx: also consider alpha-test for ztest-mode
Looks like we don't have CI coverage for this (since deqp==GLES) but
alpha test is conceptually the same as frag shaders with discard, and
should be handled as such.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Rob Clark
1e3731e711 freedreno/a6xx: add early-lrz-late-z mode
Now that we are doing a better job of managing LRZ, add support for the
EARLY_LRZ_LATE_Z mode.  Since we properly disable LRZ write in cases
where we don't know a fragment's z value during the binning pass (or
when blend is enabled in a later draw, meaning we will need the earlier
fragment's color), we can enable a mode that keeps the early-lrz test
when the frag shader has kill/discard.  This will only discard geometry
that is definitely not visible.

This is a pretty big win for games/benchmarks that have a lot of frag
shaders with kill/discard.  More than 10% gain for gfxbench trex/mh and
40% gain for mh31.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Rob Clark
07887c9f34 freedreno/a6xx: re-work LRZ state tracking
In particular, properly detect reversal of depth-test direction.
With that we can remove a lot of cases where we were unnecessarily
invalidating LRZ, which was simply papering over the direction-
reversal issue in deqp.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Rob Clark
27e501bcfc freedreno/a6xx: update depth-plane control regs
And document the early-lrz-late-z mode.

Initially I thought this would be two bits to control early-lrz vs
early-z.  But having early-z without early-lrz does not make sense,
and the way the values line up makes an enum fit better.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Rob Clark
f6307426ed freedreno/a6xx: sync registers from envytools
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Rob Clark
ebcf3545db freedreno/ir3: split kill from no_earlyz
Unlike other conditions which prevent early-discard of fragments, kill
does not prevent early LRZ test.  Split `has_kill` from `no_earlyz` so
we can take advantage of this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5298>
2020-06-04 02:34:54 +00:00
Kristian H. Kristensen
346bb81f40 docs/features.txt: Update for freedreno
We've had GL_OES_texture_cube_map_array for a while for a4xx+ and
support for geometry and tessellation for a6xx+.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5319>
2020-06-04 00:56:20 +00:00
Kristian H. Kristensen
5fb7cad95c freedreno/a6xx: Turn on robustness extensions
With UBO access going through LDC, all memory access uses buffer based
io primitives.  We can then advertise
PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR and
PIPE_CAP_DEVICE_RESET_STATUS_QUERY, which turn on GL_EXT_robustness,
GL_KHR_robust_buffer_access_behavior and GL_KHR_robustness.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5319>
2020-06-04 00:56:20 +00:00
Vinson Lee
8b353524b0 vdpau: Fix wrong calloc sizeof argument.
Fix warning reported by Coverity Scan.

Wrong sizeof argument (SIZEOF_MISMATCH)
suspicious_sizeof: Passing argument 3544UL (sizeof
(vlVdpPresentationQueue)) to function calloc that returns a pointer of
type vlVdpPresentationQueueTarget * is suspicious because a multiple of
sizeof (vlVdpPresentationQueueTarget) /*16*/ is expected.

Fixes: 65fe0866ae ("vl: implemented a few functions and made stubs to get mplayer running")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3026
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5182>
2020-06-03 17:01:47 -07:00
Francisco Jerez
8252bb0ec6 OPTIONAL: iris: Perform BLORP buffer barriers outside of iris_blorp_exec() hook.
The iris_blorp_exec() hook needs to be executed under a single
indivisible sync region, which means that in cases where we need to
emit a PIPE_CONTROL for a buffer barrier we won't be able to track the
subsequent commands separately from the previous commands, which will
prevent us from optimizing out subsequent PIPE_CONTROLs if we
encounter the same buffers again.  In particular I've encountered this
situation in some SynMark test-cases which perform lots of BLORP
operations with the same buffer bound as both source and destination
(in order to generate mipmaps): In such a scenario if the source
requires flushing we'd also end up flushing for the destination
redundantly, even though a single PIPE_CONTROL would have been
sufficient.

This avoids a 4.5% FPS regression in SynMark OglHdrBloom and a 3.5%
FPS regression in SynMark OglMultithread.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
4b00338bde iris: Remove iris_flush_depth_and_render_caches().
This helper is unused now.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
46adb83a29 iris: Emit single render target flush PIPE_CONTROL on format mismatch.
The big-hammer iris_flush_depth_and_render_caches() is largely
redundant whenever a format mismatch is detected from
iris_cache_flush_for_render().  There is no need to kick the depth,
sampler nor constant caches in that case.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
b928188493 iris: Open-code iris_cache_flush_for_read() and iris_cache_flush_for_depth().
These have become one-liners now so they can be easily inlined.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
74c774dce9 iris: Remove render cache hash table-based synchronization.
The render cache hash table is now *mostly* redundant with the more
general seqno matrix-based cache tracking mechanism.  Most hash table
operations are now gone except for the format mismatch checks done in
iris_cache_flush_for_render().  Redundant code removed as a separate
patch for bisectability.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
aa78d05a23 iris: Remove depth cache set tracking and synchronization.
The depth cache set is now redundant with the more general seqno
matrix-based cache tracking mechanism.  Removed as a separate patch
for bisectability.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
6b98072511 iris: Perform compute predraw flushes from compute batch.
Whenever iris_predraw_resolve_inputs() ends up doing a flush or
invalidate, we really want it to be on the same batch which is going
to consume the result.  Any resolves should still be performed from
the render batch thanks to the previous patch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
8e8198f349 iris: Remove batch argument of iris_resource_prepare_access() and friends.
The resolves performed by this function are only expected to work from
the render batch, so make sure we use it independently of the batch
the caller wants to use.  This function provides no synchronization
guarantees anyway, the caller is expected to insert any cache flushing
and synchronization required for the resolved surface to be visible to
the target batch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
878c770d13 iris: Insert buffer barrier in existing cache flush helpers.
As a first step to phasing out the current hashtable-based depth and
render cache tracking mechanisms.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
e226590898 iris: Implement buffer-local memory barrier based on cache coherency matrix.
This takes advantage of the previously introduced cache tracking
infrastructure in order to define a multi-purpose barrier operation
that allows the caller to order memory operations with respect to
previous operations performed on the same buffer from any other cache
domain.

v2: Assorted CPU overhead micro-optimizations (Francisco).
v3: Use C99 designated initializers (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
8a6349eb86 iris: Update cache coherency matrix on PIPE_CONTROL.
This introduces a batch synchronization boundary at every PIPE_CONTROL
command, and updates the cache coherency status tracked during batch
construction according to the specified control bits.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
fc221875cf iris: Introduce cache coherency matrix for batch-local memory ordering.
This introduces a representation of the cache coherency status of the
GPU at any point in the batch.  This is done by defining a matrix C of
synchronization sequence numbers such that at any point of batch
construction, a memory operation from domain i introduced into the
batch is guaranteed to be ordered after any memory operation from
domain j in a previous batch section with seqno n if the following
condition holds:

  C_i_j >= n

This allows us to efficiently determine whether additional flushing
and/or invalidation is required in order to access a buffer object
from some arbitrary domain.

Except for batch buffer reset which requires clearing the whole
matrix, all operations on the matrix are either O(n) or O(1) on the
number of caching domains (which is basically constant).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
4b7fd91be6 iris: Report use of any in-flight buffers on first draw call after sync boundary.
This is the main performance trade-off of this cache tracking
mechanism: In order for the seqno vector of buffer objects to be
accurate, they need to be marked as used again every time the batch is
split into a new synchronization section if they remain bound to the
pipeline.  This can be achieved easily by re-using
iris_restore_render_saved_bos() and iris_restore_compute_saved_bos(),
which currently serve a similar purpose across batch buffer
boundaries.

The impact on Piglit drawoverhead results seems to be within a
standard deviation of the current results.

XXX - It might be possible to completely remove the current
      iris_batch::contains_draw flag at a small additional performance
      cost.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
ae88e79f69 iris: Drop redundant iris_address::write flag.
The write flag is redundant since it can be inferred easily from the
iris_address::access domain.  This allows the iris_address struct to
be laid out more efficiently in memory, leading to a measurable
improvement in several Piglit Drawoverhead test-cases.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
eb5d1c2722 iris: Annotate all BO uses with domain and sequence number information.
Probably the most annoying patch to review from the whole series --
Mark every buffer object use as accessed through some caching domain
with the sequence number of the current synchronization section of the
batch.  The additional argument of iris_use_pinned_bo() makes sure I'd
have gotten a compile error if I had missed any buffer added to the
batch validation list.

There are only a few exceptions where a buffer is left untracked while
adding it to the validation list, justified below:

 - Batch buffers: These are strictly read-only for the moment.

 - BLORP buffer objects: Their seqnos are bumped manually at the end
   of iris_blorp_exec() instead, in order to avoid plumbing domain
   information through BLORP address combining.

 - Scratch buffers: The contents of these are strictly thread-local.

 - Shader images and SSBOs: Accesses of these buffers are explicitly
   synchronized at the API level.

v2: Opt out of tracking more aggressively (Ken): In addition to the
    above, surface states, binding tables, instructions and most
    dynamic states are now left untracked, which means a *lot* more BO
    uses marked IRIS_DOMAIN_NONE which need to be reviewed extremely
    carefully, since the cache tracker won't be able to provide any
    coherency guarantees for them.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
e81c07de41 iris: Bracket batch operations which access memory within sync regions.
This delimits all batch operations which access memory between
iris_batch_sync_region_start() and iris_batch_sync_region_end() calls.
This makes sure that any buffer objects accessed within the region are
considered in use through the same caching domain until the end of the
region.

Adding any buffer to the batch validation list outside of a sync
region will lead to an assertion failure in a future commit, unless
the caller explicitly opted out of the cache tracking mechanism.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
8cbe953548 iris: Add infrastructure to partition batch into sync boundaries.
This introduces some minimalistic infrastructure which will be used in
order to partition the batch into a series of sections, each one with
a unique, monotonically-increasing sequence number.  Section
boundaries will typically lie at points in the batch where the
execution and memory coherency status of some previous commands are
known, e.g. at batch buffer boundaries or PIPE_CONTROL commands.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Francisco Jerez
7878cbec59 iris: Add batch-local synchronization book-keeping to iris_bo.
The purpose of this is to represent the cache coherency state of a
buffer as a vector of integers (AKA seqnos), one for each incoherent
caching domain of the GPU.  A seqno will identify a single section of
a batch buffer uniquely across the whole pipe_screen (which means that
there will be no ambiguity about what context a given seqno belongs to
even if there are multiple threads accessing the same buffer in
parallel), and is guaranteed to be allocated in monotonically
increasing order within any given context.  The iris_bo_bump_seqno()
helper is provided for marking the last update of a buffer from a
given caching domain in a lockless manner.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
2020-06-03 23:12:22 +00:00
Alyssa Rosenzweig
b73b339531 panfrost: Mark point sprites as todo on Bifrost
Emulating them will be a rather annoying dance. Let's not worry about
this until further down the line when we have a better sence of how to
do handle them efficiently.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5290>
2020-06-03 22:58:46 +00:00
Alyssa Rosenzweig
0ef527928c panfrost: Fix gl_PointSize out of GL_POINTS
In this case, vs->writes_point_size is true as the VS writes
gl_PointSize, but panfrost_writes_points_size() is false as we are not
drawing points so the hardware doesn't process it. Thus the varying
descriptor is emitted but elements is never written. When the VS runs,
it will attempt to write to elements, a NULL pointer.

The behaviour is architecture-independent. On Midgard, the write
silently fails, hence why this bug was never noticed before. On Bifrost,
this raises an MMU fault.

The fix is to set the format to VARYING_DISCARD to ignore the write.

Noticed on Neverball.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5290>
2020-06-03 22:58:46 +00:00
Alyssa Rosenzweig
3f8abd8676 panfrost: Prefer sysval for gl_PointCoord on Bifrost
It's like gl_FragCoord. Still not implemented. This unfortunately makes
point sprites a lot more complicated.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5290>
2020-06-03 22:58:46 +00:00
Alyssa Rosenzweig
bc7397f376 pan/bi: Disassemble gl_PointCoord reads.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5290>
2020-06-03 22:58:46 +00:00
Alyssa Rosenzweig
3e4a0c2bca panfrost: Explicitly convert to 32-bit for logic-ops
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Icecream95 <ixn@keemail.me>
Fixes: 19b4e586f6 ("panfrost: Switch to pan_lower_framebuffer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5289>
2020-06-03 22:48:10 +00:00
Alyssa Rosenzweig
6d00eaf733 panfrost: Readd MIDGARD_SHADERLESS quirk to t760
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Icecream95 <ixn@keemail.me>
Fixes: e53d27de61 ("panfrost: Add quirks for blend shader types")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5289>
2020-06-03 22:48:10 +00:00
Francisco Jerez
46183a999b iris: Extend iris_context dirty state flags to 128 bits.
We're nearly out of dirty bits, and some patches pending review on
GitLab no longer apply due to that.  Make room for them by splitting
off shader stage-specific bits into a separate stage_dirty mask.

An alternative would be to split compute-related bits into a separate
mask, but that would prevent the '<< stage' indexing done in various
parts of the driver from working.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5279>
2020-06-03 22:22:19 +00:00
Francisco Jerez
45918e0d8c iris: Simplify iris_batch_prepare_noop().
This makes iris_batch_prepare_noop() return a boolean instead of
passing through the relevant set of dirty flags.  It will make it
easier to change the representation of dirty flags.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5279>
2020-06-03 22:22:19 +00:00
Rob Clark
26a3c7b363 nir/lower_tex: fixes for fp16 yuv lowering
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3079
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5318>
2020-06-03 21:24:13 +00:00
Rob Clark
0f3255ef0a nir/builder: add bitsize conversion helpers
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5318>
2020-06-03 21:24:13 +00:00
Rob Clark
866618c5c8 nir: extract out convert_to_bitsize() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5318>
2020-06-03 21:24:13 +00:00
Rob Clark
924bfb6560 nir: get_base_type() should return enum type
Needed by the next patch, for c++ code which is more strict about
conversions between integers and enums.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5318>
2020-06-03 21:24:12 +00:00
Alyssa Rosenzweig
dce7722ef8 panfrost: Handle writes_memory correctly
We need to pass it thru to EARLY_Z and WRITES_GLOBAL instead of ignoring
and assuming respectively. Nontrivial performance fix.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5300>
2020-06-03 20:48:24 +00:00
Alyssa Rosenzweig
2447b3b9d3 panfrost: Document MALI_WRITES_GLOBAL bit
We've been setting this unconditionally -- oops!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5300>
2020-06-03 20:48:24 +00:00
Alyssa Rosenzweig
ee59d1ad77 panfrost: Update MALI_EARLY_Z description
Via the ES3.1 early-z testing force, I've confirmed this bit is e-z.
I've also confirmed e-z must be disabled for global writes, as expected.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5300>
2020-06-03 20:48:24 +00:00
Marcin Ślusarz
7e26a02e5f iris: remove unused iris_bo->swizzle_mode
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5313>
2020-06-03 18:38:00 +00:00
Samuel Pitoiset
77f08982af aco: sign-extend input/identity for 16-bit subgroup ops on GFX6-GFX7
16-bit subgroup ops are implemented with 32-bit instructions
on GFX6-GFX7.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5227>
2020-06-03 19:48:43 +02:00
Samuel Pitoiset
f31c9b4edf aco: fix subdword copies on GFX6-GFX7
SDWA is only GFX8+. Use v_mov_b32 since the upper 16 bits don't matter.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5227>
2020-06-03 19:48:42 +02:00
Samuel Pitoiset
a521c67d22 aco: implement 16-bit nir_intrinsic_quad_* on GFX6-GFX7
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5227>
2020-06-03 19:48:40 +02:00
Samuel Pitoiset
6b08d269bf aco: implement 16-bit reduce operations on GFX6-GFX7
No fp16 on GFX6-GFX7.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5227>
2020-06-03 19:48:37 +02:00
Alyssa Rosenzweig
0e73d879e3 pan/bi: Handle vectorized load_const
In preparation for 16-bit vectors.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5307>
2020-06-03 17:35:10 +00:00
Alyssa Rosenzweig
1b09c6993d pan/bi: Passthrough second argument of F32_TO_F16
At the NIR level this is a second vector source of the first (only)
argument; at the BIR level this is a pair of scalars.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5307>
2020-06-03 17:35:10 +00:00
Alyssa Rosenzweig
8a4efe2d73 pan/bi: Pack second argument of F32_TO_F16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5307>
2020-06-03 17:35:10 +00:00
Alyssa Rosenzweig
323eecaf13 pan/bi: Fix SEL.16 swizzle
2 scalar arguments, not 1 vector.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5307>
2020-06-03 17:35:10 +00:00
Alyssa Rosenzweig
9ed1ae4724 pan/bi: Handle SEL with vec3 16-bit
Otherwise we end up with a missing argument.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5307>
2020-06-03 17:35:10 +00:00
Alyssa Rosenzweig
afc18c62d7 panfrost: Passthrough NATIVE loads/stores
Now that we handle load_output directly, this works for e.g. RGB565 on
Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
36af05bbde pan/mdg: Handle regular nir_intrinsic_load_output
Instead of the vendored version. Only for blend shaders at the moment,
frag shaders fb_fetch has a lot more going on.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
293d37e19d pan/mdg: Allow f2u8 and friends thru
Now that we can handle destination sizes directly, this keeps us from
needing to chew through so many conversions.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
0ae0141f5b pan/mdg: Handle f2u8
This is similar to f2u16.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
f8b881f161 pan/mdg: Fold roundmode into applicable instructions
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
93513cd9ff pan/mdg: Implement *_rtz conversions with roundmode
Use rte as the canonical type.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
6290e83190 pan/mdg: Lower roundmodes
So now we can use the IR field semantically.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
1bef784867 pan/mdg: Add opcode roundmode property
When the output is rounded in a specified direction.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
2eb4c85e42 pan/mdg: Add roundmode enum
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
014d2e46a7 pan/mdg: Distinguish blend shaders in internal shader-db
Since these shaders are purely internal, the optimization criteria are a
bit different, so it's worth calling attention to this when dumping.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
2020-06-03 15:36:57 +00:00
Icecream95
99446c9f7d panfrost: Only use AFBC YTR with RGB and RGBA
The "lossless colorspace transform" is lossy for R and RG formats.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5293>
2020-06-03 15:19:43 +00:00
Icecream95
9ac106defe panfrost: Decode AFBC flag bits
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5293>
2020-06-03 15:19:43 +00:00
Timothy Arceri
a34cc97ca3 glsl: when NIR linker enable use it to resize uniform arrays
Here we turn on uniform array resizing in the NIR linker and disable
the GLSL IR resizing pass when the NIR linker is enabled.

This will potentially make uniform arrays smaller due to NIR
optimising away more uniform uses.

Shader-db results (SKL):

total instructions in shared programs: 14947192 -> 14944093 (-0.02%)
instructions in affected programs: 138088 -> 134989 (-2.24%)
helped: 822
HURT: 4

total cycles in shared programs: 324868402 -> 324794597 (-0.02%)
cycles in affected programs: 3904170 -> 3830365 (-1.89%)
helped: 2333
HURT: 1485

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
2020-06-03 10:34:22 +00:00
Timothy Arceri
7d1eadb790 glsl: gather uniform dereference info before main linking loop
We want to gather information for all stages here before the main
linking loop. In the following patch we will use to information
to reduce the size of uniform arrays where possible.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
2020-06-03 10:34:22 +00:00
Timothy Arceri
a13d8d48ce glsl: add update_array_sizes() helper to the NIR uniform linker
This will be used to reduce the size of uniform arrays and replace
the current glsl ir pass. Doing this in NIR allows us to better
optimise the size of uniform arrays.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
2020-06-03 10:34:22 +00:00
Timothy Arceri
6aea287b0a glsl: add struct to gather more info about uniform array access
This will be used in the following patches to allow the linker
to resize uniform arrays based on array dereferences.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
2020-06-03 10:34:22 +00:00
Timothy Arceri
d6d78f9b7f util: add BITSET_LAST_BIT() helper
This is the reverse of BITSET_FFS()

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
2020-06-03 10:34:22 +00:00
Timothy Arceri
f518508a81 i965: call brw_nir_lower_uniforms() after uniform linking is complete
i965 currently uses the NIR uniform linker for spirv support. Until
now the only reason there has been no issue with calling the
lowering pass before the linker is because no garbage collection
is done between the calls.

An upcoming change to the linker will add an optimisation to resize
unform arrays where possible. Because lowering causes the array
defs to no longer be used the new optimisation ends up resizing the
arrays to 0. To fix this we move the lowering call after the
linking calls.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
2020-06-03 10:34:22 +00:00
Simon Ser
907bacea13 gbm: document that gbm_bo_map exposes a linear view
Drivers (Gallium, i965) expose a linear view of the buffer via
gbm_bo_map.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Daniel Stone <daniel@fooishbar.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5238>
2020-06-03 10:09:52 +00:00
Danylo Piliaiev
9f3956fea0 glsl: Don't replace lrp pattern with lrp if arguments are not floats
We don't have "lrp(int, int, int)" and validation of ir_triop_lrp
fails down the road.

Fixes: 8d37e991
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3059
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5257>
2020-06-03 09:06:25 +00:00
Boris Brezillon
3ed2123d77 spirv: Use scoped barriers for SpvOpControlBarrier
If use_scoped_barrier is set to true, we don't have to split the control
and memory barriers.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4900>
2020-06-03 07:39:52 +00:00
Boris Brezillon
689acc7398 intel/compiler: Extract control barriers from scoped barriers
Add a lowering pass extracting all control barriers embedded in scoped
barriers into proper control barriers so we can get rid of the logic
inserting control barriers when an SpvOpControlBarrier with WorkGroup
scope is parsed in spirv_to_nir().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4900>
2020-06-03 07:39:52 +00:00
Boris Brezillon
345b5847b4 nir: Replace the scoped_memory barrier by a scoped_barrier
SPIRV OpControlBarrier can have both a memory and a control barrier
which some hardware can handle with a single instruction. Let's
turn the scoped_memory_barrier into a scoped barrier which can embed
both barrier types. Note that control-only or memory-only barriers can
be supported through this new intrinsic by passing NIR_SCOPE_NONE to the
unused barrier type.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Suggested-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4900>
2020-06-03 07:39:52 +00:00
Boris Brezillon
94438a64bf spirv: Split the vtn_emit_scoped_memory_barrier() logic
We are about to add support for scoped control+memory barriers. Let's
move the convert from SPIRV to NIR enums logic in helpers so we can
easily re-use them.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4900>
2020-06-03 07:39:52 +00:00
Samuel Pitoiset
d3c937c0e4 radv: enable zero VRAM for all VKD3D (DX12->VK) games
To fix rendering issues with Metro Exodus, RE2 and 3 and probably
more titles. It seems the default behaviour of DX12 anyways.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3064
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5262>
2020-06-03 08:00:19 +02:00
Samuel Pitoiset
fd5ffd3a83 radv: enable zero VRAM for Doom Eternal
That fixes some rendering issues. Probably some unitialized data
from the game.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3064
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5262>
2020-06-03 07:59:57 +02:00
Timothy Arceri
c183ea94af gitlab-ci: bump piglit checkout commit
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
2020-06-03 02:22:23 +00:00
Timothy Arceri
7873276f68 glsl/spirv: remove dead uniforms in spirv nir linker
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
2020-06-03 02:22:23 +00:00
Timothy Arceri
a494b62410 glsl: remove dead uniforms in the nir linker
This is now possible as we do uniform linking via a nir based linker.

Shader-db results for IRIS (SKL):

total instructions in shared programs: 14947192 -> 14946397 (<.01%)
instructions in affected programs: 39498 -> 38703 (-2.01%)
helped: 230
HURT: 18

total cycles in shared programs: 324868402 -> 324847058 (<.01%)
cycles in affected programs: 706701 -> 685357 (-3.02%)
helped: 599
HURT: 449

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
2020-06-03 02:22:23 +00:00
Timothy Arceri
60bee4c70c glsl: add can_remove_uniform() helper to the NIR linker
This helper reflects the rules we follow in the GLSL IR linker when
deciding if we can remove a dead uniform. This check is required to
avoid regressions when turning on NIR dead uniform clean up in the
following patch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
2020-06-03 02:22:23 +00:00
Timothy Arceri
04dbf709ed nir: add callback to nir_remove_dead_variables()
This allows us to do API specific checks before removing variable
without filling nir_remove_dead_variables() with API specific code.

In the following patches we will use this to support the removal
of dead uniforms in GLSL.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
2020-06-03 02:22:23 +00:00
Timothy Arceri
bc79442f3f nir: add glsl_get_ifc_packing() helper
This will be used in the following patch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
2020-06-03 02:22:23 +00:00
Alyssa Rosenzweig
7ac617c117 pan/mdg: Don't double-replicate blend on T720
We already do this unconditionally in NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5305>
2020-06-03 00:32:24 +00:00
Bas Nieuwenhuizen
edd56bad94 radv: Use common gfx10_format_table.h
Save some python code and build time, as well as some code duplication.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291>
2020-06-03 00:17:00 +00:00
Bas Nieuwenhuizen
560f095dd5 radv: Include gfx10_format_table.h only from a single source file.
The radeonsi variant has everything in the header, so lets not
include it everywhere.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291>
2020-06-03 00:17:00 +00:00
Bas Nieuwenhuizen
b351a50763 radeonsi: Define gfx10_format in the common header.
So we don't have to have multiple definitions of the struct when
sharing with radv.

While at it put the table properly in a C file so we don't have to
deal with multiple definitions, and the struct definition isn't
in generated source.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291>
2020-06-03 00:17:00 +00:00
Bas Nieuwenhuizen
c98e52f88a amd/common,radeonsi: Move gfx10_format_table to common.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291>
2020-06-03 00:17:00 +00:00
Bas Nieuwenhuizen
d936f69677 radeonsi: Explicitly map Z16_UNORM_S8_UINT to None for GFX10.
We should always use separate planes for textures with this format.

Fixes: 273ead81f1 "util/format: Add VK_FORMAT_D16_UNORM_S8_UINT."
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291>
2020-06-03 00:17:00 +00:00
Daniel Stone
415c88eebc Revert "CI: Disable Panfrost T720/T760"
Switches have been rewired, VLANs have been reconfigured, network
elements with non-functional remote management have been removed from
racks and thrown on desks in anger.

This reverts commit ae6e1aee7d1bd49ae494b8a25ca33d092a3a145a.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5301>
2020-06-02 23:16:05 +00:00
Christian Gmeiner
2dfc241e36 ci: bare-metal: make it possible to use a script for serial
Makes it possible to use e.g. a ser2net script to talk to the devices.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5268>
2020-06-02 22:20:46 +00:00
Erik Faye-Lund
a21966837a zink: Use store_dest_raw instead of storing an uint
I cleaned up the other similar call-sites, but somehow missed this one.
There's nothing different with this, so let's also fix this.

Fixes: 16339646f0 ("zink/spirv: rename functions a bit")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5250>
2020-06-02 21:45:30 +00:00
Oschowa
c310677a75 radv: Explicitly cast TIMESTAMP_NOT_READY value to uin32_t where needed.
Fixes a clang warning.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5228>
2020-06-02 21:31:17 +00:00
Oschowa
663e8cb4e6 aco: Use correct reference type in for-range-loop.
Fixes a clang warning.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5228>
2020-06-02 21:31:17 +00:00
Oschowa
7b1bc460fd aco: Don't std::move temporary object.
Fixes the following clang warning:

mesa/src/amd/compiler/aco_optimizer.cpp:2928:15: warning: moving a temporary object prevents copy elision [-Wpessimizing-move]
   ctx.uses = std::move(dead_code_analysis(program));

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5228>
2020-06-02 21:31:17 +00:00
Oschowa
536339b0dd aco: Don't declare 'Block' as class, but define as struct.
Fixes clang warnings.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5228>
2020-06-02 21:31:17 +00:00
Oschowa
c2a778ef0f radv: Don't take absolute value of unsigned type.
Fixes clang warnings.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5228>
2020-06-02 21:31:17 +00:00
Timur Kristóf
7d2fe60f1c radv/aco: Always enable subgroup shuffle.
It is now supported by both backends on all hw.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5223>
2020-06-02 21:12:13 +00:00
Timur Kristóf
045c9ffa7d aco: Implement subgroup shuffle on GFX6-7.
GFX6 and GFX7 don't have the ds_bpermute (or permute) instruction,
but we would like to support subgroup shuffle on these old GPUs.

So we introduce a new pseudio instruction which will be lowered
to an "unrolled loop" that emulates bpermute on GFX6 and GFX7
using readlane instructions, while also respecting the exec mask
thanks to v_cmpx.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5223>
2020-06-02 21:12:12 +00:00
Timur Kristóf
14a5021aff aco/gfx10: Refactor of GFX10 wave64 bpermute.
The emulated GFX10 wave64 bpermute no longer needs a linear_vgpr,
so we don't consider it a reduction anymore. Additionally, the
code is slightly reorganized in preparation for the GFX6 emulated
bpermute.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5223>
2020-06-02 21:12:12 +00:00
Marek Olšák
fe3947632c radeonsi: add a hack to disable TRUNC_COORD for shadow samplers
This fixes dEQP-GLES3.functional.shaders.texture_functions.textureprojlodoffset.sampler2dshadow_vertex.

This is probably a dEQP bug.

Fixes: d573d1d825

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209>
2020-06-02 20:47:49 +00:00
Marek Olšák
85a6bcca61 radeonsi: pass at most 3 images and/or shader buffers via user SGPRs for compute
This should slightly decrease shader lifetime.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209>
2020-06-02 20:47:49 +00:00
Marek Olšák
877c56bfdc radeonsi: remove const_buffers_declared hacks
This was a bug that was uncovered by 4553fc66a5.

Piglit: spec@arb_uniform_buffer_object@maxblocks

Fixes: 4553fc66a5

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209>
2020-06-02 20:47:49 +00:00
Marek Olšák
ce4575b3b5 radeonsi: remove unused leftover code for INDIRECT_BUFFER inside IBs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209>
2020-06-02 20:47:49 +00:00
Marek Olšák
cac24bee62 nir: gather which images are MSAA
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209>
2020-06-02 20:47:49 +00:00
Marek Olšák
6503e4be13 nir: gather which images are buffers
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209>
2020-06-02 20:47:49 +00:00
Marek Olšák
f8ef15c061 nir: don't count samplers and images in interface blocks
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209>
2020-06-02 20:47:49 +00:00
Marek Olšák
c6c8a9bd55 ac/nir: support v2f16 derivatives
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003>
2020-06-02 16:29:25 -04:00
Marek Olšák
7c423dd721 ac/nir: set the second v_cvt_pkrtz argument to undef if it's unused
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003>
2020-06-02 16:29:25 -04:00
Marek Olšák
bfb95725aa ac/nir: select v_cvt_pkrtz for all conversions from f32 to f16 for radeonsi
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003>
2020-06-02 16:29:25 -04:00
Marek Olšák
1d80015eaf ac/nir: handle nir_op_[fiu]2[fiu]mp opcodes
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003>
2020-06-02 16:29:25 -04:00
Marek Olšák
70b6d54011 ac/nir: support 16-bit data in image opcodes
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003>
2020-06-02 16:29:25 -04:00
Marek Olšák
c3e0ba52a0 ac/nir: support 16-bit data in buffer_load_format opcodes
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003>
2020-06-02 16:29:25 -04:00
Marek Olšák
b819ba949b ac/nir: remove type and num_channels args from ac_build_buffer_store_common
They were only used for type overloading where we can just use
the type of data.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003>
2020-06-02 16:29:25 -04:00
Marek Olšák
b98df7bf50 ac/nir: support vector types in the type suffix of overloaded intrinsics
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003>
2020-06-02 16:29:25 -04:00
Marek Olšák
e5ea87cde8 ac/nir: use more types from ac_llvm_context
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003>
2020-06-02 16:29:25 -04:00
Marek Olšák
116ec85012 ac: rename has_double_rate_fp16 -> has_packed_math_16bit
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003>
2020-06-02 16:29:25 -04:00
Marek Olšák
1af8fe4ed5 gallium: add shader caps INT16 and FP16_DERIVATIVES
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Marek Olšák
733bee57eb glsl: lower samplers with highp coordinates correctly
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Marek Olšák
0c0803c32f glsl: lower the precision of imageLoad
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Marek Olšák
1192989533 glsl: lower mediump partial derivatives
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Marek Olšák
6fe20ebaaa glsl: lower mediump integer types to int16 and uint16
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Marek Olšák
a052a9c277 glsl: handle int16 and uint16 types and add instructions for mediump
v2: add more changes to ir_validate.cpp

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Marek Olšák
9c14a87839 glsl: treat lowp as mediump when lowering builtins
This seems to have been missed.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Marek Olšák
116e006693 nir: add options::vectorize_vec2_16bit to limit vectorization to vec2 16
for hardware that is scalar but can do 2 16-bit operations on low and high
16 bits of registers at once.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Marek Olšák
a6916d1ce8 nir: fix lower_wpos for 16-bit fddy
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Marek Olšák
92333c6d1a nir: lower int16 and uint16 in nir_lower_mediump_outputs
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Marek Olšák
6f2e95f24d nir: add int16 and uint16 type helpers
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Marek Olšák
f798513f91 nir: add i2imp and u2ump opcodes for conversions to mediump
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Alyssa Rosenzweig
f3310cb3e1 nir: Fold f2f16(b2f32(x)) to b2f16(x)
By definition.

This reduces register pressure on freedreno so that the noubo expected
failure goes away.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002>
2020-06-02 20:01:18 +00:00
Eric Engestrom
d32144602c meson: remove "empty array"/"array of an empty string" confusion
Until Meson 0.47, setting `-D arrayoption=` was not the same as setting
`-D arrayoption=[]`; the latter cleared the array, while the former
filled it with an empty string option.

Since Meson 0.47 [1], the former maps to the latter, so empty items can
only be set by explicitly giving an array containing an empty string,
ie. `-D arrayoption="['']"`; however note that this is *not* what we
want in any of the current Mesa code anyway.

This makes the code handling array options a bit more complicated, and
a lot more error-prone, so let's get rid of the confusion by removing
the empty-string option.

[1] f3a8f9c34d

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/386>
2020-06-02 19:36:12 +00:00
Jonathan Marek
a2903dd767 turnip: fix RENDER_COMPONENTS value
This fixes render_components being 0 when mrt_count=8, because shift by 32
is UB and in arm64 it ends up shifting by 0. This fixes tests with 8 MRTs.

Fixes the 3d path sysmem CmdClearAttachments to set RENDER_COMPONENTS, as
it was previously relying on tu6_emit_mrt setting it, but it is now part of
the pipeline state.

Also switch back to the previous behavior of not setting render components
for VK_ATTACHMENT_UNUSED attachments: we don't update the MRT state for
such attachments so we definitely don't want to be trying writing to those.

Fixes: 078aa9df8d ("tu: Move RENDER_COMPONENTS setting to pipeline state")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5292>
2020-06-02 18:42:09 +00:00
Daniel Stone
d63bd09eb2 CI: Disable Panfrost T720/T760
We're reconfiguring our Cambridge office lab networking and physical
setup for more scalability amongst other things. We can still run jobs
on one RK3399 at the peak outage, but we'll lose the T7x0 this morning,
so disable it until it's all back.

T820 is still disabled due to an unrelated BayLibre internal outage.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5296>
2020-06-02 10:14:16 -07:00
Michel Dänzer
3acd5a68a4 gitlab-ci: Use separate docker images for cross builds
Using x86_build-base as a separate base layer as well for storage &
network bandwidth efficiency.

Using separate images allows dropping the workarounds from the cross
build job scripts.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5296>
2020-06-02 10:14:16 -07:00
Michel Dänzer
a85da8e3d5 gitlab-ci: Add x86_build-base docker image
Similar to x86_test-base.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5296>
2020-06-02 10:14:16 -07:00
Michel Dänzer
ae400553fb gitlab-ci: Move meson back to x86_test-gl/vk ephemeral packages lists
And python3-distutils back to x86_test-gl's list.

These are not used for building Mesa, only for other components used in
test jobs.

This partially reverts commit c1a290bdd5
"meson: Bump required version to 0.52.0".

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5296>
2020-06-02 10:07:10 -07:00
Michel Dänzer
b19c094dba gitlab-ci: Stop using packages from Debian testing
Not needed anymore (for now?).

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5296>
2020-06-02 10:07:07 -07:00
Michel Dänzer
c964be0cd7 gitlab-ci: Use Debian 10 wine-development packages
They're version 4.2, new enough for the MinGW job tests to pass.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5296>
2020-06-02 10:06:38 -07:00
Michel Dänzer
262e3885a2 gitlab-ci: Move LLVM/clang 6/7 packages to the x86_build_old image
They're available in Debian 9 (stretch) as well.

This will avoid conflicts with packages from Debian testing.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5296>
2020-06-02 10:06:27 -07:00
Rhys Perry
b30b6fded8 docs: add missing "shader_" in VK_KHR_shader_subgroup_extended_types
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5295>
2020-06-02 13:21:42 +01:00
Dylan Baker
fb62e642ae vulkan-overlay/meson: use install_data instead of configure_file
We don't want to copy the file into the build directory, we want to
install it. That's what install_data is for.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2924
Fixes: 56ccea58ae
       ("vulkan/overlay: Add basic overlay control script.")

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Dylan Baker
138c003d22 meson: deprecated 'true' and 'false' in combo options for 'enabled' and 'disabled'
To prepare to use meson's builtin feature options in the future, which
are more powerful and provide useful feature for packagers, like the
ability to turn all "automagic" features off, and then explicitly turn
on the ones they want.

This is designed to make the transition softer, since the 'true' and
'false' are still accepted, just with a warning.

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Dylan Baker
a63e5cbe48 meson: use 2 space not 3 space indent
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Dylan Baker
a8e2d79e02 meson: use gnu_symbol_visibility argument
This uses a meson builtin to handle -fvisibility=hidden. This is nice
because we don't need to track which languages are used, if C++ is
suddenly added meson just does the right thing.

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Dylan Baker
fc7301865e drm-shim/meson: Use portable override_options for setting C standard
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Dylan Baker
23df13c988 drm-shim/meson: The name of the target is a string not a list
This happens to work, but it's not guaranteed to

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Dylan Baker
17dcd535c1 meson: Use builtins for checking gnu __attributes__
This requires less code, and will fast skip on compilers that are known
to not have these, like MSVC.

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Dylan Baker
6ef314b4fa meson: Use build_always_stale instead of build_always
which was deprecated in 0.47. This doesn't change behavior, just shuts
up a warning.

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Dylan Baker
a16e8bfb94 meson: Use the check_header function
Instead of open coding it. This was new in 0.47

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Dylan Baker
c1a290bdd5 meson: Bump required version to 0.52.0
This matches what other graphics space projects require now, and allows
us to simplify a number of cases, as well as make use of new features in
meson.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2737
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Alyssa Rosenzweig
30a393f458 pan/mdg: Enable out-of-order execution after texture ops
We don't make great use of it (due to the scheduler not being aware
yet), but we can pack for it regardless and maybe pick up some win.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5286>
2020-06-01 18:38:49 +00:00
Alyssa Rosenzweig
7c0e82d4ab pan/mdg: Add quirk for missing out-of-order support
Added in T760, like the other good parts of Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5286>
2020-06-01 18:38:49 +00:00
Alyssa Rosenzweig
31de10c434 pan/mdg: Disassemble out-of-order bits
Optimization for texture instructions, allowing ALU and LD/ST within a
single thread while a texture read is still in flight.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5286>
2020-06-01 18:38:49 +00:00
Alyssa Rosenzweig
ca6759c3f9 panfrost: Remove unused nir_lower_framebuffer pass
Superseded.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5284>
2020-06-01 18:10:59 +00:00
Alyssa Rosenzweig
7de4b98193 panfrost: Don't flush explicitly when mipmapping
The reorder work already takes cares of this nicely.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5284>
2020-06-01 18:10:59 +00:00
Alyssa Rosenzweig
975238dc2a panfrost: Use VTX tag for vertex texturing
Fixes BARRIER faults.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5284>
2020-06-01 18:10:59 +00:00
Alyssa Rosenzweig
89a9cc7645 panfrost: Permit AFBC of RGB8
Ugly but hey.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5284>
2020-06-01 18:10:59 +00:00
Alyssa Rosenzweig
3a8e5eb1b1 panfrost: Fix PRESENT flag mix-up
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5284>
2020-06-01 18:10:59 +00:00
Alyssa Rosenzweig
7c793a4867 pan/mdg: Fuse f2f16 into load_interpolated_input
To become a ld_vary intrinsic.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5283>
2020-06-01 12:37:03 -04:00
Alyssa Rosenzweig
5f8dd413bc pan/mdg: Handle 16-bit ld_vary
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5283>
2020-06-01 12:36:46 -04:00
Alyssa Rosenzweig
e58112bc08 panfrost: Update fails list
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:24 +00:00
Alyssa Rosenzweig
e42950fe96 panfrost: Use internal_format throughout
Fixes R32F_S8 texturing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:24 +00:00
Alyssa Rosenzweig
e7765a8c7f panfrost: Add separate_stencil BO to batch
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:24 +00:00
Alyssa Rosenzweig
6aa7f6792d panfrost: Check for large tilebuffer requirements
Fixes the rest of dEQP-GLES3.functional.fragment_out.array.uint.*, this
situation occurs with MRT and large pixels.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:24 +00:00
Alyssa Rosenzweig
c46b11438d panfrost: Let Gallium pack colours
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
8dc8b66403 panfrost: Account for differing types in blend lower
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
0c9fe82ee9 panfrost: Conditionally allow fp16 blending
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
19b4e586f6 panfrost: Switch to pan_lower_framebuffer
It now supports what we need.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
4c286cc0a2 panfrost: Un/pack sRGB via NIR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
5d14757c03 panfrost: Un/pack R11G11B10
NIR has a helper for it already; we can reuse.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
e24e248b84 panfrost: Un/pack RGB10_A2_UINT
It's different. Because forget me.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
91cc678551 panfrost: Un/pack RGB10_A2_UNORM
It's a funny one.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
7de0e5500b panfrost: Un/pack RGB565 and RGB5A1
Basically the same as RGBA4

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
ff590702da panfrost: Un/pack UNORM 4
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
eab8701e7c panfrost: Flesh out dispatch
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
e937dd521b panfrost: Un/pack 8-bit UNORM
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
f01aabb829 panfrost: Un/pack pure 8-bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
9a6483bb47 panfrost: Un/pack pure 16-bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
c31bcca48e panfrost: Un/pack pure 32-bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
e5fcc193f7 panfrost: Stub out lowering boilerplate
Structure ourselves as a NIR pass replacing loads/stores with
unpacked/packed versions as necessary. Not actually functional yet.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
dbd72a8f94 panfrost: Determine classes for stores
Fewer special cases here, thankfully.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
18a767df35 panfrost: Determine load classes for formats
Via quirks.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
e53d27de61 panfrost: Add quirks for blend shader types
Every hardware has its own set of what it can and can't do... let's
document it all as quirks so the lowering code is GPU-agnostic.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
60d647f9de panfrost: Determine unpacked type for formats
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
5c82f8a097 panfrost: Add theory for new framebuffer lowering
We take a somewhat different strategy that should be more flexible.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
5a175e4a1b pan/mdg: Implement raw colourbuf loads on T720
Uses a similar path to the fp16 cbuf loads on T760. It should make sense
given the symmetry with T860.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
4f82aad7a2 pan/mdg: Drop the u8 from the colorbuf op names
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
49840a8a58 pan/mdg: Print 8-bit constants
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
0ff0291896 pan/mdg: Handle bitsize for packs
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
e9c780b1d0 pan/mdg: Treat packs "specially"
We maybe would prefer synthetic ops? We'll find out in due time..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
c495c6c295 pan/mdg: Add pack_unorm_4x8 via 8-bit
More efficient than the 32-bit version in NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Alyssa Rosenzweig
551d990a7c pan/mdg: Handle un/pack opcodes as moves
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5265>
2020-06-01 15:46:23 +00:00
Chris Wilson
605b0e8acf iris: Fixup copy'n'paste mistake in Makefile.sources
In changing iris_seqno.[ch] to iris_fine_fence.[ch] and moving the
lines earlier, the newline escape was forgotten.

Fixes: 034329128b ("iris: Rename iris_seqno to iris_fine_fence")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5264>
2020-05-31 22:01:48 +00:00
Satyeshwar Singh
aaec065f03 intel/dev: Don't consider all TGL SKUs as GT1 only
We should be passing _gt instead of 1 to GEN12_FEATURES or else all TGL
SKUs will be considered as gt1 only.

Fixes: 54996ad492 ("intel/dev: Split .num_subslices out of GEN12_FEATURES macro")
Signed-off-by: Satyeshwar Singh <satyeshwar.singh@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5261>
2020-05-30 17:24:58 -07:00
Vinson Lee
d2f8105b60 r300g: Remove extra printf format specifiers.
Fix warning reported by Coverity Scan.
Missing argument to printf format specifier (PRINTF_ARGS)
missing_argument: No argument for format specifier %s.

Fixes: 04c1536bf7 ("r300g: rasterizer debug logging")
Fixes: 85efb2fff0 ("r300g: try to use color varyings for texcoords if max texcoord limit is exceeded")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5274>
2020-05-30 14:28:01 -07:00
Ilia Mirkin
6e1c47b98d nouveau: allow invalidating coherent/persistent buffer backings
This is needed to support the core's usage of coherent buffers for
glVertex-style input. The reason why this was disallowed is that any
mappings will be invalidated. Let the state tracker worry about that,
and just reallocate when we're told.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5276>
2020-05-30 17:59:24 +00:00
Jason Ekstrand
c48f42e178 intel/fs: Emit HALT for discard on Gen4-5
Using HALT to immediately jump to the end of the shader is required to
implement GL_EXT_gpu_shader4 and OpenGL 3.0.  However, vanilla OpenGL
1.2 doesn't forbid it and it likely makes something somewhere faster.
We should be consistent and implement the same discard behavior on all
hardware if we can.

The rules for HALT on Gen4-5 are a bit different from Gen6+.  On the
older hardware, there is no stack for HALT; instead it's up to software
to save and restore mask registers.  However, there's no real saving
needed since we only use HALT to jump to the end of the program where
we're about about to do our FB writes.  All we need to do is reset AMask
to DMask, the value it was initialized to at the start of the thread.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5244>
2020-05-30 06:21:15 +00:00
Jason Ekstrand
94aa7997e4 intel/fs: Fix unused texture coordinate zeroing on Gen4-5
We were inserting the right number of MOVs but, thanks to the way we
advanced msg_end earlier in the function, were often writing the zeros
past the end of where we actually read in the register file.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5243>
2020-05-30 01:08:50 -05:00
Jason Ekstrand
a7c8811fe4 intel/vec4: Stomp the return type of RESINFO to UINT32
We already do this in the FS back-end; we just weren't doing it in vec4
so RESINFO messages weren't returning the right data.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5243>
2020-05-30 01:08:50 -05:00
Timothy Arceri
e843303d6f radv: fix regression with builtin cache
If the ~/.cache dir already exists continue on without failing.

Fixes: cd61f5234d ("radv: Handle failing to create .cache dir.")

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5249>
2020-05-30 04:01:28 +00:00
Bas Nieuwenhuizen
7e4c8949c6 gallium/dri: Remove lowered_yuv tracking for plane mapping.
Just heard that etnaviv is also compatible with it even
in the non-lowered cases, so let us enable it for everyone.

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5253>
2020-05-30 02:49:54 +00:00
Vinson Lee
13735c4f47 panfrost: Fix printf format specifier.
bifrost_sampler_descriptor.zero1 is of type uint8_t.

Fix warning reported by Coverity.

Invalid type in argument to printf format specifier (PRINTF_ARGS)
invalid_type: Argument s->zero1 to format specifier %lx was expected to
have type unsigned long but has type unsigned char.

Fixes: 6148d1be4b ("panfrost: Fix size of bifrost sampler descriptor")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5248>
2020-05-30 02:10:12 +00:00
Marek Olšák
4925fb97f6 glthread: don't upload for glDraw inside a display list and always sync
Let the vbo module handle it, not glthread.

This handles functions set in vbo_initialize_save_dispatch.

Fixes: 2840bc3065 ("glthread: upload non-VBO vertices and indices for non-Indirect non-IBM draws")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3001

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5246>
2020-05-30 01:42:56 +00:00
Bas Nieuwenhuizen
cf99267147 util/format: Add more multi-planar formats.
These don't have a fourcc code as far as I can tell, but we want
them for internal Vulkan use.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5195>
2020-05-30 01:22:51 +00:00
Bas Nieuwenhuizen
d491b0dfd9 util/format: Use correct pipe format for VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.
NV12 is UVUVUV (https://wiki.videolan.org/YUV#NV12) and in Vulkan is
VK_FORMAT_G8_B8R8_2PLANE_420_UNORM. So U=B and V=R. So plane order in
VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM is YUV, which is PIPE_FORMAT_IYUV.

Further confirmation: https://fourcc.org/yuv.php U=Cb V=Cr. From the nir
ycbcr conversion, B=Cb and R=Cr.

Fixes: 75d7ee8029 "util/format: translate 422_UNORM and 420_UNORM vulkan formats"
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5195>
2020-05-30 01:22:51 +00:00
Bas Nieuwenhuizen
273ead81f1 util/format: Add VK_FORMAT_D16_UNORM_S8_UINT.
Not participating in packing/unpacking/stencil-only/depth-only,
because it doesn't mix well in a single plane.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5195>
2020-05-30 01:22:51 +00:00
Vinson Lee
f047d585ee etnaviv: Fix memory leak on error path.
Fix warning reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable pq going out of scope leaks the storage it
points to.

Suggested-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Fixes: eed5a00989 ("etnaviv: convert perfmon queries to acc queries")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5220>
2020-05-30 01:04:30 +00:00
Alyssa Rosenzweig
bccb3deee2 panfrost: Probe G31/G52 if PAN_MESA_DEBUG=bifrost
We're not *quite* ready to open the flood gates on Bifrost (a major
blocker is CI, which is itself blocked on the lockdowns - expected to be
resolved in the coming months..)

Nevertheless, let's add a debug option to probe on compatible Bifrost
devices to avoid keeping out-of-tree patches around.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5272>
2020-05-29 19:24:45 -04:00
Alyssa Rosenzweig
be8cbe0b41 panfrost: Add GPU IDs for G31/G52
Dvalin/Gondul respectively.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5272>
2020-05-29 19:24:05 -04:00
Alyssa Rosenzweig
229084f5de panfrost: Disable QUAD_STRIP/POLYGON on Bifrost
Support was dropped and now raises a DATA_INVALID_FAULT on G31. Unknown
if retained on other devices. GL_QUADS is still ok.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:56 +00:00
Alyssa Rosenzweig
4be2cd604b pan/bi: Passthrough deps of the branch target
Now that we have the infrastructure, follow the branch.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:56 +00:00
Alyssa Rosenzweig
8230a04f51 pan/bi: Allow two successors in header packing
We need to take the union of the dependencies.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:56 +00:00
Alyssa Rosenzweig
db2c10d032 pan/bi: Measure backwards branches as well
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:56 +00:00
Alyssa Rosenzweig
a42731536d pan/bi: Add bi_foreach_block_from_rev helper
Needed for next commit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
c697992ca1 pan/bi: Defer block naming until after emit
This ensures names are meaningful.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
bd6ff4f7e1 pan/bi: Pack unconditional branch
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
e4791d2bf8 pan/bi: Set branch conditional bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
ffe7a61a46 pan/bi: Set back-to-back bit more accurately
See Connor's ISA notes. Basically set unless it's a branch (explicit or
fallthrough).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
3aacfaf87e pan/bi: Set branch_conditional if b2b is set
Match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
e945d4f79d pan/bi: Pack proper clause offsets
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
682b63cdc2 pan/bi: Measure distance between blocks
For branch offset calculation.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
64c49ab1fc pan/bi: Add bi_foreach_clause_in_block_from{_rev} helpers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
64bedbfa67 pan/bi: Link clauses back to their blocks
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
9c32956750 pan/bi: Preliminary branch packing
Simple == 0 branch packing. Offset is still to-do.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
cd9a08d4f2 pan/bi: Assign constant port for branch offsets
By convention.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
cdff3ebc9a pan/bi: Set branch_constant if there is a branch
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
b9967ab6da pan/bi: Pack branch offset constants
This is not fully generic but for a single constant it will do.
Extensions left for future work.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
627872ef7f pan/bi: Add branch constant field to IR
The offsets used for branches need some extra bits twiddled, so add a
field to the clause to indicate this is happening. This is not ambiguous
since a clause can only have a single branch.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
f1298ae336 pan/bi: Passthrough ZERO in branch packing
There's a special mode for it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
d619ff009b pan/bi: Fix branch condition typesize
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
1cdd55a81e pan/bi: Fix CONVERT component counting
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
d8c6a71878 pan/bi: Only rewrite COMBINE dest if not SSA
If it's already a register, there's no point in rewriting and it will
disturb the existing register, i.e. for

   if (..) {
      r0 = vecN ..
   } else {
      r0 = vecN ..
   }

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
e42a5dfd4f pan/bi: Fix emit_if successor assignment
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 9a00cf3d1e ("pan/bi: Add support for if-else blocks")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
b34eb94d9c pan/bi: Allow printing branches without targets
Useful for debugging codegen.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
a4fc16a1d4 pan/bi: Remove schedule_barrier
Legacy from Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
b3ae088b96 pan/bi: Add helper to measure clause size
Useful for branching.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
2a4e4477fc pan/bi: Add bi_layout.c for clause layout helpers
Figuring out what "shapes" of clauses are kosher happens during
scheduling, not packing, but shouldn't distract the scheduler. So let's
add a new file for these sorts of questions.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
c3de28bb49 pan/bi: Remove more artefacts of 2-pass scheduling
A clause is, by definition, already scheduled.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
4096be05af pan/bi: Add MUL.i32 to disasm
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
ec8665615f pan/bi: Disassemble pos=0xe
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
a658a4f7a5 pan/bi: Document constant count invariant
constants + instructions <= 13

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
ac64bf9b20 pan/bi: Move bi_flip_ports out of port assignment
It's more of a packing fixup than anything scheduler-y, and port
assignment will soon be the domain of the scheduler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
95e3776d3e pan/bi: Add FILE* argument to bi_print_registers
In case we need it in general IR printing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
dd96b451f6 pan/bi: Drop struct from bi_registers
It's a full-fledged part of the IR now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
b042ddef32 pan/bi: Move bi_registers to bi_bundle
Make it a part of the IR itself.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
79f30d8a86 pan/bi: Move bi_registers to common IR structures
Port assignments are critical to scheduling, this can't just live in
bi_pack.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
59f8f20306 pan/bi: Remove comment about old scheduler design
I've realized it really has to be 1-pass to be sane.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
635bf652ed pan/bi: Remove FMA? parameter from get_src
We can lower away zeroes a bit earlier.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig
20f6c7a913 panfrost: Preload gl_FragCoord on Bifrost
It's a precoloured register but we do need to specify in the cmdstream
that we want the preloading to happen.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5267>
2020-05-29 20:19:46 +00:00
Alyssa Rosenzweig
1d194f8ac4 panfrost: Set reads_frag_coord as a sysval
In addition to parsing out the varying. This is needed so it works on
Bifrost as well.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5267>
2020-05-29 20:19:46 +00:00
Alyssa Rosenzweig
52875a34aa panfrost: Don't generate gl_FragCoord varying on Bifrost
It's treated as a sysval there, so that's silly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5267>
2020-05-29 20:19:46 +00:00
Rob Clark
11470fcde2 freedreno/a6xx: fix vsc assert
Fixes a debug build assert seeing with an android app.  Not quite sure
which path was passing us draw_info w/ instance_count==0.  But we should
just treat non-instanced draws as having a single instance.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5091>
2020-05-29 19:35:08 +00:00
Kristian H. Kristensen
f6f7bc2979 freedreno/a6xx: Program VFD_DEST_CNTL from program stateobj
This only depends on the generated shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
2020-05-29 18:59:56 +00:00
Kristian H. Kristensen
7aa809e31c freedreno/a6xx: Create stateobj for VFD_DECODE
This now only depends on vertex state and we can create it once
up front in pctx->create_vertex_elements_state().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
2020-05-29 18:59:56 +00:00
Kristian H. Kristensen
8952dd6d99 freedreno/a6xx: Decouple VFD_FETCH and VFD_DECODE
We used to output a VFD_FETCH entry for each VFD_DECODE, but we can
instead output just one VFD_FETCH per VBO and point multiple
VFD_DECODE entries at the same VFD_FETCH entry.  There's typically
fewer VBOs than vertex elements so this is a small win in itselfs, but
more importantly, the VFD_DECODE state now only depends on program
state.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
2020-05-29 18:59:56 +00:00
Kristian H. Kristensen
c15db8928f freedreno/a6xx: Move per element offset to VFD_DECODE
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
2020-05-29 18:59:56 +00:00
Eric Anholt
601a029e67 ci: Rename x86_cross_arm_test to just arm_test.
This gets us back to the behavior we used to have for freedreno: clicking
play on arm_test gets you testing of the ARM platforms that aren't under
arm-build (the LAVA runners).

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
2020-05-29 16:46:44 +00:00
Eric Anholt
9c9ade4685 ci: Don't build an arm_test container now that the last user is gone.
db410c and cheza used to use it, and now both are on baremetal.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
2020-05-29 16:46:44 +00:00
Eric Anholt
6f4fc4ff71 ci: Switch cheza (freedreno a630) testing to baremetal.
Now that we have scripts in place to do baremetal testing of cheza, switch
it over.  As of this writing, we have 5 chezas for baremetal and 4 for the
old docker CI setup (just 2 fewer than we originally had before this work,
since some had had filesystem failures and I switched those first), and
once we are sure of this we can backport to stable branch CI and move the
rest of them to baremetal.

I've run a lot of jobs through the baremetal scripts as I worked on
sorting out vulkan CTS stability, so I feel good about the stability of
the GLES CTS here.

The options job is now split out to separate jobs, as we don't currently
have a way to stack multiple sets deqp runs with different env vars in a
single baremetal run, and just chaining cros_servo.sh invocations runs
into a lack of cleanup of the serial-watching scripts which we rely on
container exit sorting out for us.  This means a little less than 2x the
artifacts downloads we had before for a630 and a few more container
instantiations.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
2020-05-29 16:46:44 +00:00
Eric Anholt
c89a749f66 ci: Add scripts for controlling bare-metal chezas.
This will let us:

- deploy kernels for testing code depending on new kernel featuers
- Ensure a pristine state in the HW before starting our tests
- Avoid disk rot on the chezas taking them out (we'd lost 3/9 in a few
  months).

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
2020-05-29 16:46:44 +00:00
Eric Anholt
3a1010e21a ci: Build a cheza kernel.
This is a set of kernel options I've come up with mostly cribbing from
chrome os's kernel config snippet.  We also build an lzma kernel, as
uncompressed kernel is big but lzma is the only compression supported by
the bootloader.  With that image, we have to pack it into a FIT formatted
image+dtb blob.

CONFIG_SUNRPC_DEBUG is added so that you can set "nfsrootdebug" to figure
out what's going wrong with your nfs mount (mine were "both the tcp and
nfsvers options were required, and don't try to use 'default' as the root
path to defer to DHCP's answer because otherwise you get
/tftpboot/default, just use an empty root path which doesn't prepend
/tftpboot.")

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
2020-05-29 16:46:44 +00:00
Eric Anholt
b678568a5e ci: Disable the firmware loader user helper option in arm64 kernels.
We won't have a user helper, so don't block for 60 seconds for it to show
up.  Speeds up debug of new kernel builds.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
2020-05-29 16:46:44 +00:00
Samuel Pitoiset
9d645a19eb radv/aco: enable VK_KHR_subgroup_extended_types on GFX8+
Should be working now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Samuel Pitoiset
e22567089c aco: sign-extend input/indentity for 32-bit reduce ops on GFX10
Because some 16-bit instructions are already VOP3 on GFX10, we use
the 32-bit variants to remove the temporary VGPR and to use DDP with
the arithmetic instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Samuel Pitoiset
83dcd1690b aco: allow gfx10_wave64_bpermute with 8-bit/16-bit input
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Samuel Pitoiset
8ece71507d aco: allocate a temp VGPR for some 8-bit/16-bit reduction ops on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Samuel Pitoiset
2e0ea9bcca aco: implement 8-bit/16-bit reductions on GFX10
Some 16-bit instructions are VOP3 on GFX10 and we have to emit a
32-bit DPP mov followed by the ALU instruction.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Samuel Pitoiset
75a730ced5 aco: fix register allocation for subdword instructions on GFX10
Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
2020-05-29 11:20:58 +00:00
Bas Nieuwenhuizen
ad609bf55a frontend/dri: Implement mapping individual planes.
It is kinda surprising that

image2 = fromPlanar(image, 2, NULL)
mapImage(..., image2, ...)

does not map the third plane.

This implements that behavior in the case where the DRI frontend
lowers the multi-planar textures.

In the case it doesn't this would need driver support. AFAIU at
least etnaviv is impacted, and while it looks possible, I don't
have the etnaviv knowledge to implement it.

Instead of silently returning weird results (either always plane 0
or possibly something interleaved) this adds an error return on
mapping multi-planar textures otherwise.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5200>
2020-05-29 09:12:33 +00:00
Vinson Lee
a2ee293422 zink: Check fopen result.
Fix warning reported by Coverity.

Dereference null return value (NULL_RETURNS)
dereference: Dereferencing a pointer that might be NULL fp when calling
fwrite.

Fixes: 8d46e35d16 ("zink: introduce opengl over vulkan")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5235>
2020-05-29 08:59:19 +00:00
Samuel Pitoiset
7503863fe2 radv/aco: enable VK_EXT_subgroup_size_control
ACO should already support Wave32 on GFX10 with all shader stages
and CTS pass. RADV currently only allows Wave32 with the compute
shader stage.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5056>
2020-05-29 10:12:26 +02:00
Rob Clark
6f39126200 freedreno/a6xx: document LRZ flag buffer
Doesn't seem to be a big win, although I could still be missing
something in my implementation.  But might as well add the
documentation.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5217>
2020-05-29 00:38:28 +00:00
Rob Clark
a3947f9d24 freedreno/a6xx: LRZ fix for alpha-test
Similarly to stencil-test, if alpha-test is enabled, we don't know
necessarily whether the fragment will pass.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3045
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5217>
2020-05-29 00:38:28 +00:00
Neha Bhende
838666a41d util: Initialize pipe_shader_state for passthrough and transform shaders
mesa/st is initializing pipe_shader_state for user define shaders.
This patch intialized pipe_shader_state for all passthough
and transform shaders.

This fixes crashes for several opengl apps. Issue is found in vmware
internal testing

Fixes: f01c0565bb ("draw: free the NIR IR.")

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5240>
2020-05-28 23:27:53 +00:00
Chris Wilson
034329128b iris: Rename iris_seqno to iris_fine_fence
Rename iris_seqno to iris_fine_fence, borrowed from si_fine_fence, to
avoid introducing any confusion with any other seqno used for tracking
pipelines.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5233>
2020-05-28 12:47:19 -07:00
Gert Wollny
682e14d3ea nir: lower_tex: Don't normalize coordinates for TXF with RECT
v2: remove the option to actually request normalization and its
    application in Intel < Gen6 (Jason)

v3: Also don't lower for query operations (Jason)

Fixes: 1ce8060c25
    nir/lower_tex: support for lowering RECT textures

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5105>
2020-05-28 18:39:29 +00:00
Eric Anholt
f0c102c075 ci: Quick exit qpa extraction for non-matching qpas.
When you're bringing up a new driver in CI with significant number of
failures (or when a CI run breaks a driver), the QPA extraction can easily
take the whole job timeout as we go about processing each QPA (100 of them
in my early VK CI fails) per unexpected result we're saving (50), which
involves reading and each line of the file in shell.  By quickly filtering
out the QPA files not including our test, we can save all that shell
overhead, bringing QPA extract time down to a couple of minutes.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Eric Anholt
46d9b500f4 ci: Move baremetal DEQP_NO_SAVE_RESULTS setup to the yml.
I'm going to want it unset (artifacts enabled) for the cheza jobs.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Eric Anholt
33e0821a99 ci: Add DEQP_EXPECTED_RENDERER support for VK tests.
I used this to debug what was going on with freedreno VK in CI.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Eric Anholt
6766d51c15 ci: Auto-detect the architecture for VK ICD filenames.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Eric Anholt
044f50b9fd ci: Drop old comment about enabling --deqp-watchdog.
The parallel deqp runner does its own 60s watchdog.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Eric Anholt
c343d00ede ci: Drop double ".txt" suffix on the unexpected results file.
Just a cosmetic fix in reviewing logs.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
2020-05-28 16:23:59 +00:00
Samuel Pitoiset
10c4a7cf59 spirv,radv,anv: implement no-op VK_GOOGLE_user_type
This extension only allows HLSL shader compilers to optionally embed
unambiguous type information which can be safely ignored by the driver.

This fixes a crash with the recent Vulkan backend of Path Of Exile
(it uses the extension without checking if it's supported).

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5237>
2020-05-28 17:30:24 +02:00
Rhys Perry
01ce7887bf aco: fix 64-bit shared_atomic_exchange
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
2020-05-28 10:34:03 +00:00
Rhys Perry
1f2fd9c62e aco: don't reorder barriers in the scheduler
Unless we're reordering it around a barrier of the same type

No shader-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
2020-05-28 10:34:03 +00:00
Rhys Perry
e1900ee2c7 aco: preserve more fields when combining additions into SMEM
Totals from 11 (0.01% of 127638) affected shaders:

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 93c8ebfa78 ('aco: Initial commit of independent AMD compiler')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
2020-05-28 10:34:03 +00:00
Rhys Perry
95d5c1b8a1 aco: check instruction format before waiting for a previous SMEM store
Totals from 7 (0.01% of 127638) affected shaders:
CodeSize: 40336 -> 40320 (-0.04%)
Instrs: 7807 -> 7803 (-0.05%)
Cycles: 118588 -> 118344 (-0.21%); split: -0.23%, +0.02%
SMEM: 331 -> 339 (+2.42%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 1749953ea3 ('aco/gfx10: Wait for pending SMEM stores before loads')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
2020-05-28 10:34:03 +00:00
Rhys Perry
5ccc7c277c aco: consider SDWA during value numbering
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 23ac24f5b1
   ('aco: add missing conversion operations for small bitsizes')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5164>
2020-05-28 09:55:58 +00:00
Rhys Perry
8aa98cebc1 aco: fix interaction with 3f branch workaround and p_constaddr
The offset was incorrect if we inserted a nop before the p_constaddr.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 93c8ebfa ('aco: Initial commit of independent AMD compiler')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5164>
2020-05-28 09:55:58 +00:00
Michel Dänzer
1fc1b87762 gitlab-ci: Pull in GCC 9 from Debian testing in x86_test-gl/vk images
The GCC 8 packages from buster are no longer compatible with libc6 from
testing. We could use the GCC 8 packages from testing instead, but this
is easier.

v2:
* Update piglit-quick_gl test results, due to the piglit issue fixed by
  https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/294

Reviewed-by: Eric Anholt <eric@anholt.net> # v1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5186>
2020-05-28 08:01:24 +00:00
Michel Dänzer
c2366f01fd gitlab-ci: x86_test-base image as common base for x86_test-gl/vk
Making use of the relatively recent FDO_BASE_IMAGE feature of the
templates, the x86_test-base image contents are shared as a separate
layer by the x86_test-gl/vk images (meaning the former only needs to be
downloaded once for either or both of the latter). This should be more
efficient in terms of overall network bandwidth and storage, in
particular if the base image changes less often than the -gl/vk ones.

v2:
* List x86_test-base in needs: along with x86_test-gl/vk (see parent
  commit)
* Always put $STABLE/TESTING_EPHEMERAL on separate lines, will make it
  easier to add any non-ephemeral packages

Reviewed-by: Eric Anholt <eric@anholt.net> # v1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5186>
2020-05-28 08:01:24 +00:00
Michel Dänzer
43111ea745 gitlab-ci: Also list arm/x86_build in needs: of test jobs
Without this, the test jobs may spuriously run if the arm/x86_build
jobs fail.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5186>
2020-05-28 08:01:24 +00:00
Caio Marcelo de Oliveira Filho
bccf2a25a8 intel: Add helper to calculate GPGPU_WALKER::RightExecutionMask
Suggested by Jason.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho
78e400d4a5 iris, i965: Update limits for ARB_compute_variable_group_size
The CS compiler now produces multiple SIMD variants, so the previous
trade-off between "always using SIMD32" and "having a smaller max
invocations" is now gone.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho
46b428074f iris, i965: Drop max_variable_local_size
This was used to decide which SIMD width to generate code for
ARB_compute_variable_group_size.  Now that compiler will generate
multiple SIMD widths, this information is unused.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho
90ec26a800 intel/fs: Generate multiple CS SIMD variants for variable group size
This will make the GL drivers pick the right SIMD variant for a given
group size set during dispatch.  The heuristic implemented in
brw_cs_simd_size_for_group_size() is the same as in brw_compile_cs().

The cs_prog_data::simd_size field was removed.  The generated SIMD
sizes are marked in a bitmask, which is already used via
brw_cs_simd_size_for_group_size() by the drivers.

When in variable group size, it is OK if larger SIMD shader spill,
since we'd need it for the cases where the smaller one can't hold all
the invocations.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho
9b8347c988 anv: Use new helper functions to pick SIMD variant for CS
Also combine the existing individual anv helpers into a single one for
all CS related parameters.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho
594374dd8d iris: Use new helper functions to pick SIMD variant for CS
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho
c9f4bda6ce iris: Set CS KernelStatePointer at dispatch
There's an update for INTERFACE_DESCRIPTOR_DATA at dispatch, so we can
just move the KSP assignment there.  This flexibility will later allow
variable group size to pick the right SIMD variant.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho
ee0fc0f6dc i965: Use new helper functions to pick SIMD variant for CS
Also expand the existing i965 helper to return the other CS related
paramters.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho
cb26d9c311 intel/fs: Add helper to get prog_offset and simd_size
This indirection will be used by the variable group size case in a
later change.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho
5b5e77caa7 intel/fs: Support INTEL_DEBUG=no8,no32 in compute shaders
The "no32" flag will have precedence over "do32", like is done for FS.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Caio Marcelo de Oliveira Filho
10d0f39beb intel/fs: Remove min_dispatch_width spilling decision from RA
Move the decision one level up, let brw_compile_*() functions use the
spilling information to decide whether or not a certain width
compilation can spill (passed via run_*() functions).

The min_dispatch_width was used to compare with the dispatch_width and
decide whether "a previous shader is already available, so don't
accept spill".

This is replaced by:

- Not calling run_*() functions if it is know beforehand a smaller width
  already spilled -- since the larger width will spill and fail;

- Explicitly passing whether or not a shader is allowed to spill.  For
  the cases where the smaller width is available and haven't spilled,
  the larger width will be compiled but is only useful if it won't
  spill.

Moving the decision to this level will be useful later for variable
group size, which is a case where we want all the widths to be allowed
to spill.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
2020-05-27 18:16:31 -07:00
Eric Engestrom
9526e14b5c docs: update calendar, add news item, and link releases notes for 20.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5234>
2020-05-27 23:34:32 +00:00
Eric Engestrom
e94a811a46 docs: Add release notes for 20.1.0
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5234>
2020-05-27 23:34:32 +00:00
Mike Blumenkrantz
dff1bac634 zink: always use logical eq ops in ntv with 1bit inputs
integer and float compare ops cannot take boolean types, so the bit size
of the inputs should be checked here so that we can swap to the logical
equality functions if we're being passed a bool value

resolves tons of validator errors in glsl piglit tests

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5231>
2020-05-27 23:20:22 +00:00
Vinson Lee
df2c68ee4f pan/bi: Initialize struct fma_op_info member extended.
Fix warning reported by Coverity Scan.

Uninitialized scalar variable (UNINIT)
uninit_use: Using uninitialized value info. Field info.extended is
uninitialized.

Fixes: 8c79c710d4 ("pan/bi: Identify extended FMA opcodes")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5224>
2020-05-27 15:41:21 -07:00
Erico Nunes
b3023055e0 lima/ppir: use a ready list in node_to_instr
After the recent optimizations in ppir lowering that increase options
for combining, node_to_instr now may have multiple options of nodes to
insert and needs to decide which is better.
For example, if an instruction uses both a varying and a texture, there
are two nodes nodes that can be inserted to the load varying slot in the
same instruction (ld_var and ld_coords). It is much more advantageous to
pipeline the load texture coords since that enables the higher precision
path for texture coordinates. However, with the current recursive
expansion, this cannot be influenced.

This simple ready list implementation in node_to_instr allows it to
choose the next node to expand based on a priority score, rather than
relying on the random order coming from the recursive expansion.

Other than preferring nodes with pipeline output (which covers ld_coords
vs ld_var), nodes using later slots in the pipeline are now expanded
first, allowing node_to_instr to make all of the earlier (pipelineable)
nodes available in the ready list so the best one can be chosen when
picking nodes for the earlier slots.

Fixes: 632a921bd0 lima/ppir: optimize tex loads with single successor

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5092>
2020-05-27 21:15:33 +00:00
Alyssa Rosenzweig
9ae8b4af75 pan/bi: Suppress inf/nan for now
This is a (hopefully temporary) hack. The blob does it for ES2 at any
rate.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:58:00 -04:00
Alyssa Rosenzweig
6f589f4e04 pan/bi: Add CSEL.16 packing tests
Passing but let's increase coverage.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:45 -04:00
Alyssa Rosenzweig
87ca1c1eea pan/bi: Pack compact vertex texturing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:45 -04:00
Alyssa Rosenzweig
6650fa22c7 pan/bi: Add f16 TEXC.vtx op
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
731dfc6066 pan/bi: Allow vertex txl with lod=0 as compact
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
fd0324a1ce pan/bi: Document compute_lod bit for compact tex
At least I assume this works this way.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
d31bc0e21c pan/bi: Also add compact vertex texturing
This implies lod=0.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
f514bdd106 pan/bi: Add TEX.vtx opcode for vertex texturing
Always has an LOD.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
2fd3ad91c7 pan/decode: Decode Bifrost shader flags
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
ee6a5a5f05 panfrost: Set MALI_BIFROST_EARLY_Z as necessary
Fixes blending.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
3f78f25ce9 panfrost: Identify MALI_BIFROST_EARLY_Z flag
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
1c2d0418c1 panfrost: Add defines for bifrost unk1 flags
Instead of open-coding.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
55e3305a5b panfrost: Document Midgard Inf/NaN suppress bit
We should probably not be setting this..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig
0e88dff374 panfrost: Ensure nonlinear strides are 16-aligned
To match how they are encoded.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: bde19c0e7b ("panfrost: Fix tiled texture "stride"s on Bifrost")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:43 -04:00
Alyssa Rosenzweig
d45936c01c panfrost: Identify Bifrost texture format swizzle
We don't force w=1 for Bifrost textures. We already compose this into
the swizzle as necessary, so we can just ignore this field I think. But
let's identify it so we don't forget what it is.

The blob uses it to force w=1 for <= 3-channel formats (0x10), as well
as a flag to swap r/b for BGRA (0x4). There are probably other flags
here but it doesn't.. really matter to us.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:43 -04:00
Alyssa Rosenzweig
e3692fd53e panfrost: Set unk2 to accomodate blending
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:43 -04:00
Alyssa Rosenzweig
3d6cc14513 panfrost: Share MRT blend flag calculation with Bifrost
As far as I know the field is the same.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:43 -04:00
Alyssa Rosenzweig
f5cf54fc1d panfrost: Force Z/S tiling on Bifrost
Like we do on SFBD since we don't know the format bits yet.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:43 -04:00
Alyssa Rosenzweig
f512489b2e panfrost: Tweak Bifrost colour buffer magic
For tiled or linear.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:43 -04:00
Alyssa Rosenzweig
76e871d3ff panfrost: Tweak zsbuf magic numbers for Bifrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:43 -04:00
Alyssa Rosenzweig
aeb5801892 panfrost: Adjust null_rt for Bifrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:43 -04:00
Alyssa Rosenzweig
83cd3f0b4e panfrost: Fix Bifrost blending with depth-only FBO
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:41 -04:00
James Zhu
a91306677c ac/gpu_info: Correct Acturus cu bitmap
The cu bitmap in amd gpu info structure is
4x4 size array, and it's usually suitable for Vega
ASICs which has 4*2 SE/SH layout.
But for Arcturus, SE/SH layout is changed to 8*1.
To mostly reduce the impact, we make it compatible
with current bitmap array as below:
	SE4,SH0 --> cu_bitmap[0][1]
	SE5,SH0 --> cu_bitmap[1][1]
	SE6,SH0 --> cu_bitmap[2][1]
	SE7,SH0 --> cu_bitmap[3][1]

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5212>
2020-05-27 10:49:02 -04:00
Danylo Piliaiev
296c04d78c intel/fs: Work around dual-source blending hangs in combination with SIMD16
It was found that dual-source blending hangs with SIMD16 dispatch in some
specific but unknown situation. Which in the wild happen when rgba
anti-aliasing is enabled for fonts.

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2183
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5037>
2020-05-27 14:35:13 +03:00
Erik Faye-Lund
dd2bd68fa6 zink: use general-layout when blitting to/from same resource
This avoids a validator warning when for instance generating mipmaps.

Fixes: d2bb63c8d4 ("zink: Use optimal layout instead of general. Reduces valid layer warnings. Fixes RADV image noise.")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5199>
2020-05-27 09:01:17 +00:00
Pierre-Eric Pelloux-Prayer
d9eaac02e5 radeonsi/drirc: enable zerovram option for 7 Days to Die
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2686
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5168>
2020-05-27 09:28:46 +02:00
Jonathan Marek
ddfd2e626a turnip: support VkImageDrmFormatModifierExplicitCreateInfoEXT
This will be used to import images which have different layout from what
turnip uses by default. For example non-UBWC (linear) images from the video
decoder on some hardware have a 512 pitch alignment.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4596>
2020-05-27 04:02:58 +00:00
Jonathan Marek
da409fb7b8 freedreno/layout: add explicit offset/pitch argument to fdl6_layout
fdl6_layout will return false when the explicit pitch is not valid.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4596>
2020-05-27 04:02:58 +00:00
Timothy Arceri
f1acf492de glsl: fix slow linking of uniforms in the nir linker
Currently the nir linker resizes the amount of storage needed to hold
uniform information on the fly while linking. As shaders can contain
thousands of uniforms this can be very slow. For example some Godot
shaders can take 30 seconds to compile on some machines.

In this change we count the amount of storage needed before we start
processing the uniforms. This is what the GLSL IR linker does also.

Fixes: 95f555a93a ("st/glsl_to_nir: make use of nir linker for linking uniforms")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2996

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5137>
2020-05-27 00:59:20 +00:00
Timothy Arceri
f6214750eb glsl: stop cascading errors if process_parameters() fails
Generally we do not completely stop compilation as soon as we see an error,
instead we continue on to attemp to find any futher errors.

This means we shouldn't be checking state->error to see if any error has
happened during the compilation process, doing so was causing
process_parameters() to fail on completely valid functions if there was
any error found in the shader previously. This then caused the valid
functions not to be found because the paramlist was considered empty,
resulting in the compiler spewing out misleading error messages.

Here we simply add the IR error value to the param list when we have
an issue with processing a parameter, this leads to much better error
messaging.

Fixes: 53e4159eaa ("glsl: stop processing function parameters if error happened")

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5205>
2020-05-27 00:31:05 +00:00
Vinson Lee
755c040060 freedreno: Add missing va_end.
Fix warning reported by Coverity Scan.

Missing varargs init or cleanup (VARARGS)
missing_va_end: va_end was not called for ap.

Fixes: a0ca1462f3 ("freedreno: add logging infrastructure")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5221>
2020-05-27 00:12:38 +00:00
Jason Ekstrand
e91108691d nir: Fix sources for image atomic fadd
Somehow we ended up with an extra scalar source up-front.  It doesn't
look like any drivers use this opcode yet so no real harm has been done
by it being wrong.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5218>
2020-05-26 23:24:45 +00:00
Alyssa Rosenzweig
247f2fb32a pan/decode: Dump unknown2
Looks to be 0.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5219>
2020-05-26 22:58:21 +00:00
Alyssa Rosenzweig
6a19d49b2e pan/decode: Dump missing field on Bifrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5219>
2020-05-26 22:58:21 +00:00
Alyssa Rosenzweig
c2c8b1ac57 pan/decode: Fix tiler warning
../src/panfrost/pandecode/decode.c:1176:60: warning: taking address of
packed member of ‘struct mali_framebuffer’ may result in an unaligned
pointer value [-Waddress-of-packed-member]
 1176 |
      pandecode_midgard_tiler_descriptor(&fb->tiler, fb->width1 + 1,
fb->height1 + 1, is_fragment, true);

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5219>
2020-05-26 22:58:21 +00:00
Alyssa Rosenzweig
4bc7d521b1 pan/decode: Fix unused variable warning
Check unused for now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5219>
2020-05-26 22:58:21 +00:00
Alyssa Rosenzweig
a621235720 nouveau: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
9e53562980 etnaviv: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
bb5e10af24 iris: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
17199107fd i965: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
f59d02a86d intel: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
7ea2ad0b39 softpipe: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
9983c4cd68 panfrost: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
82996a8cff glsl: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
a024b39427 gallium/draw: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
747cb95e3c mesa/swrast: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
05bacdb917 mesa: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
0f1fde1faf util/format: Use SATURATE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Alyssa Rosenzweig
35938c15e2 util: Add SATURATE macro
Equivalent to clamp(x, 0.0, 1.0) or fsat in NIR. Useful for format
packing, among other uses given the variety of substituions in-tree.

v2: Drop brackets (Eric).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5100>
2020-05-26 22:31:31 +00:00
Caio Marcelo de Oliveira Filho
8cc7711924 intel/fs: Remove redundant assert()
This is covered by the two previous similar asserts.  Each time `v` is
assigned this is asserted.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5213>
2020-05-26 20:35:03 +00:00
Caio Marcelo de Oliveira Filho
462bc408fe intel/fs: Early return when can't satisfy explicit group size
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5213>
2020-05-26 20:35:03 +00:00
Caio Marcelo de Oliveira Filho
2a308ee4c7 intel/fs: Remove unused state from brw_nir_lower_cs_intrinsics
After 2663759af0 ("intel/fs: Add and use a new load_simd_width_intel
intrinsic") the local_workgroup_size is not used anymore except for
assertions at the pass' start, so drop it from state struct.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5213>
2020-05-26 20:35:03 +00:00
Caio Marcelo de Oliveira Filho
5e0525e145 intel/fs: Remove unused emission of load_simd_with_intel
The nir_intrinsic_load_simd_width_intel is always lowered by the
brw_nir_lower_simd() pass before the emission happens.  This is likely
a "leftover" from patch rewriting/squashing that happened when this
intrinsic was added.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5213>
2020-05-26 20:35:03 +00:00
Kristian H. Kristensen
a5a413e19a egl/android: Drop unused variable
src/egl/drivers/dri2/platform_android.c:332:29: warning: unused
variable 'dri2_dpy' [-Wunused-variable]

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
2020-05-26 12:46:18 -07:00
Kristian H. Kristensen
09efdccf4a egl/android: Move get_format under HAVE_DRM_GRALLOC guard where it's used
src/egl/drivers/dri2/platform_android.c:159:12: warning: unused
function 'get_format' [-Wunused-function]

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
2020-05-26 12:46:18 -07:00
Kristian H. Kristensen
c26317ebd6 mesa/st: Use memset to zero out struct
This is a non-stop source of warnings and build breakage. memset works
everywhere.

src/mesa/state_tracker/st_tgsi_lower_depth_clamp.c:354:45: warning:
suggest braces around initialization of subobject [-Wmissing-braces]

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
2020-05-26 12:46:18 -07:00
Kristian H. Kristensen
12653beacb mapi: Fix a couple of warning in generated code
safe_mul may not be used and clang doesn't understand the "optimize"
attribute.

src/mapi/glapi/gen/marshal_generated0.c:1216:16: warning: unknown
attribute 'optimize' ignored [-Wunknown-attributes]

src/mapi/glapi/gen/marshal_generated0.c:36:19: warning: unused
function 'safe_mul' [-Wunused-function]

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
2020-05-26 12:46:18 -07:00
Kristian H. Kristensen
8341f30f1e src/util: Remove out-of-range comparison
Silence the warning about this always-true comparison.

src/util/softfloat.c:214:42: warning: comparison of constant 32768
with expression of type 'int16_t' (aka 'short') is always false
[-Wtautological-constant-out-of-range-compare]
        } else if ((e > 0x1d) || (0x8000 <= m)) {
                                  ~~~~~~ ^  ~

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
2020-05-26 12:46:18 -07:00
Kristian H. Kristensen
f4e64e9f53 freedreno/ir3: Avoid {0} initializer for struct reginfo
First element is not a scalar.  Just initialize the struct like we do
elsewhere.

src/freedreno/ir3/disasm-a3xx.c:958:33: warning: suggest braces around
initialization of subobject [-Wmissing-braces]

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
2020-05-26 12:46:18 -07:00
Kristian H. Kristensen
06ab93d694 turnip: Use {} initializer to silence warning
We're already using the {} syntax elsewhere in turnip.

src/freedreno/vulkan/tu_formats.c:828:71: warning: suggest braces
around initialization of subobject [-Wmissing-braces]

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
2020-05-26 12:46:18 -07:00
Kristian H. Kristensen
697fe1c801 turnip: Use tu6_reduction_mode() to avoid warning
This makes it a little more explicit that the values line up.

src/freedreno/vulkan/tu_device.c:2209:75: warning: implicit conversion
from enumeration type 'const VkSamplerReductionMode' (aka 'const enum
VkSamplerReductionMode') to different enumeration type 'enum
a6xx_reduction_mode' [-Wenum-conversion]

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
2020-05-26 12:46:18 -07:00
Kristian H. Kristensen
fff17707ea turnip: Use hw enum when emitting A6XX_RB_STENCIL_CONTROL
We're hard-coding this value, so let's use the hw enum and avoid a
warning.

src/freedreno/vulkan/tu_clear_blit.c:2091:19: warning: implicit
conversion from enumeration type 'enum VkStencilOp' to different
enumeration type 'enum adreno_stencil_op' [-Wenum-conversion]

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5174>
2020-05-26 12:46:18 -07:00
Rob Clark
6aa3004d60 freedreno/gmem: split out helper to calc # of bins
Gets the `nbins_x`/`y` local vars out of the main layout function,
to prevent any confusion like what was fixed in the previous patch
from sneaking back in.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5189>
2020-05-26 19:29:34 +00:00
Rob Clark
fcecdcd822 freedreno/gmem: fix nbins_x/y mismatch
`layout_gmem()` recalculates the # of bins in x/y dimensions after
aligning the bin width/height to required dimensions.  Because of this,
the resulting gmem config could have fewer bins in either dimension.
But the tile/bin layout and the pipe assignment logic were still using
the original values.  Which could result in extraneous bins with a
width and/or height of zero.

Because the gmem rendering code uses `gmem->bin_w`/`h` to determine
the number of bins, this could result in some zero size bins being
executed, while later valid bins are skipped.  Which can leave un-
rendered portions of the screen (generally lower-right).

To fix this, be sure to use `gmem->bin_w`/`h` rather than the local
variables.

Fixes: 1bd38746d5 ("freedreno/gmem: rework gmem layout algo")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5189>
2020-05-26 19:29:34 +00:00
Rob Clark
9b91d88b33 freedreno/gmem: add some asserts
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5189>
2020-05-26 19:29:34 +00:00
Rob Clark
1679efe927 freedreno/gmemtool: add verbose mode
And real getopt arg parsing.. now that we have one.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5189>
2020-05-26 19:29:34 +00:00
Rob Clark
9c6693f0e4 freedreno/gmemtool: add a405
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5189>
2020-05-26 19:29:34 +00:00
Rob Clark
b20663c5ba freedreno/gmemtool: make GMEM alignment per-gen
`gmem_page_align` is generation specific (with the exception of a2xx
which has a different value for fast-clear).  So we should override the
value from the captured gmem_key according to the gpu we are emulating
for the purposes of calculating gmem config.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5189>
2020-05-26 19:29:34 +00:00
Rob Clark
fec8288081 freedreno/gmem: make noscis debug actually do something on a6xx
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5188>
2020-05-26 19:14:22 +00:00
Rob Clark
3024d00900 freedreno: handle PIPE_TRANSFER_MAP_DIRECTLY
Just something I noticed in the process of debugging the issue fixed in
the previous commit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5188>
2020-05-26 19:14:22 +00:00
Rob Clark
8728c42031 freedreno: clear last_fence after resource tracking
The resource tracking in the clear/draw_vbo/blit paths could itself
trigger a flush.  Which would update last_fence.  So we need to clear
last_fence *after* all the dependency tracking.

Fixes: ddb7fadaf8 ("freedreno: avoid no-op flushes by re-using last-fence")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2992
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5188>
2020-05-26 19:14:22 +00:00
Rob Clark
4c97a716a6 freedreno: add batch debugging
Something I cooked up in the process of debugging the issue fixed in the
next commit.  Might come in useful again in the future.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5188>
2020-05-26 19:14:22 +00:00
Rhys Perry
8e2009c448 nir: fix lowering to scratch with boolean access
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 18ed82b084
   ('nir: Add a pass for selectively lowering variables to scratch space')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5214>
2020-05-26 18:54:17 +00:00
Kristian H. Kristensen
e369b8931c freedreno: Use explicit *_NONE enum for undefined formats
This adds RB, VFMT and TFMT NONE values for a3xx-a5xx and FMT6_NONE
for a6xx.  Use those values instead of open coded (enum xxx) ~0 or
sometimes even ~0, which triggers out-of-enum range warnings.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5173>
2020-05-26 18:35:03 +00:00
Eric Anholt
5ec3747fbe freedreno/ir3: Use RESINFO for a6xx image size queries.
The closed GL driver uses resinfo on images with the writeonly flag (using
the texture-path's getsize only for readonly images).  The closed vulkan
driver seems to use resinfo regardless.  Using resinfo doesn't need any
fixups after the instruction.  It also avoids one of the needs for the
TEX_CONST state for the image, which is awkward to set up in the GL
driver.

The new handler goes into ir3_a6xx to be next to the other current image
code, but the a4xx version is left in place because it wants a bunch of
sampler helpers.

Fixes assertion failure in dEQP-VK.image.image_size.buffer.readonly_32.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3501>
2020-05-26 18:17:46 +00:00
Eric Anholt
2ec4c53ef9 freedreno/ir3: Move handle_bindless_cat6 to compiler_nir and reuse.
There was an open coded version for ldc, and now we can drop that.  I
needed to do it for resinfo as well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3501>
2020-05-26 18:17:46 +00:00
Eric Anholt
2068b01430 freedreno/ir3: Refactor out IBO source references.
All the users of the unsigned result just wanted an ir3_instruction to
reference.  Move a6xx's helpers to ir3_image.c and inline the old unsigned
results version.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3501>
2020-05-26 18:17:46 +00:00
Eric Anholt
00b9099dd5 freedreno: Set the immediate flag in a4/a5xx resinfos.
Noticed comparing our RESINFO asm to qcom's for the same test, and if I
drop this bit their disasm switches from immediate to reg.  ldgb seems to
have the same behavior.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3501>
2020-05-26 18:17:46 +00:00
Eric Anholt
ae00da5ddb freedreno: Fix resinfo asm, which doesn't have srcs besides IBO number.
In the process, clarify what's going on with the LDC/LDIB case.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3501>
2020-05-26 18:17:46 +00:00
Eric Anholt
c1cb75678d freedreno: Add more resinfo/ldgb testcases.
Since I'm going to start using the resinfo opcode, make sure we can disasm
the blob's instances of it that I've found.  And, since resinfo disasm
will impact ldgb on pre-a6xx, include some of those too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3501>
2020-05-26 18:17:46 +00:00
Eric Anholt
5d4a911d8c freedreno: Fix printing of unused src in disasm of cat6 RESINFO.
Compare to QC's disasm right next to ours, and we clearly had an extra src
that wouldn't make sense.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3501>
2020-05-26 18:17:46 +00:00
Eric Anholt
4f02b48071 freedreno/a6xx: Fix the size of buffer image views.
We were using the size of the underlying buffer (in R8 elements), while we
need to be using the size of the image view (which may be a subset of the
underlying buffer, and may be in a different format from R8).

This fix means less dereferencing off of the end of shader image views for
buffer images, but more importantly is needed to get the right answer from
resinfo if we are to switch to that.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3501>
2020-05-26 18:17:46 +00:00
Connor Abbott
3987e25c03 tu: Add missing storage image/texel buffer bits
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5122>
2020-05-26 11:16:09 +00:00
Connor Abbott
439a4ac025 tu: Respect VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
This came up with some image tests that are enabled by the next commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5122>
2020-05-26 11:16:09 +00:00
Connor Abbott
08d22bb908 tu: Fix IBO descriptor for cubes
They act the same as 2D arrays when used as storage images, and we're
supposed to override the IBO descriptor to reflect this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5122>
2020-05-26 11:16:09 +00:00
Marcin Ślusarz
f7ab9c4eb1 glsl: cleanup vertex shader input checks
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5133>
2020-05-26 10:15:17 +00:00
Marcin Ślusarz
e89d34aaca glsl_to_tgsi: add fallthrough comments
All those cases are supposed to hit an assert in ir_binop_bit_or case.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5133>
2020-05-26 10:15:17 +00:00
Marek Olšák
38a4b86145 radeonsi/gfx10: implement most performance counters
PAL has all of them.

GE perf counters don't work - no idea why.
I only tested the few that I like to use.

There is no documentation, though most of the enums had already been
in the headers.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184>
2020-05-26 06:00:54 -04:00
Marek Olšák
2a3806ffa3 amd: replace SH -> SA (shader array) in comments
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184>
2020-05-26 06:00:54 -04:00
Marek Olšák
2cf46f2e3d ac/gpu_info: replace num_good_cu_per_sh with min/max_good_cu_per_sa
Perf counters use the new max number.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184>
2020-05-26 06:00:54 -04:00
Marek Olšák
8c3fe285c9 radeonsi: don't hardcode most perf counter block counts
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184>
2020-05-26 06:00:54 -04:00
Erik Faye-Lund
f3c1833b77 docs/features: mark GL_ARB_texture_multisample as done for zink
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5159>
2020-05-26 07:55:17 +00:00
Erik Faye-Lund
cd1639cbe3 zink: expose PIPE_CAP_TEXTURE_MULTISAMPLE
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5159>
2020-05-26 07:55:17 +00:00
Erik Faye-Lund
4f90e818c8 zink: implement nir_texop_txf_ms
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5159>
2020-05-26 07:55:17 +00:00
Gert Wollny
caa83e4d79 r600/sfn: remove debug output leftover
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5187>
2020-05-26 06:17:42 +00:00
Gert Wollny
cead23cb8a r600/sfn: Correctly update the number of literals when forcing a new
group

When forcing a new instruction group by adding a ALU_OP_NOP, the
literals for the instruction that triggered this must be taken into
account for the next group, so update the number of literals
accordingly.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5187>
2020-05-26 06:17:42 +00:00
Gert Wollny
12381a0410 r600/sfn: use modern c++ in printing LDS read instruction
Closes #3021

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5187>
2020-05-26 06:17:42 +00:00
Gert Wollny
eccf939b6f r600/sfn: Fix mapping for f32tof64 and f64tof32
We define the mapping based on the vector unit opcode.

Closes #3013

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5187>
2020-05-26 06:17:42 +00:00
Gert Wollny
901793d558 r600: Fix duplicated subexpression in r600_asm.c
Fixes: 4422ce1b04
    r600: force new CF with TEX only if any texture value is written

Closes #3012

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5187>
2020-05-26 06:17:42 +00:00
Rob Clark
ceab349483 freedreno/drm: disallow exported buffers in bo cache
Otherwise we can MADVISE(WONTNEED) a bo that someone else is still
using.  We already handled that in the dma-buf and flink-name export
paths.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5204>
2020-05-25 20:47:24 +00:00
Vinson Lee
1241f8cb4c r600/sfn: Use correct setter method.
Fix warning reported by Coverity Scan.

Useless call (USELESS_CALL)
side_effect_free: Calling v->pin_to_channel() is only useful for its
return value, which is ignored.

Fixes: 5d10e3ec60 ("r600/nir: Pin interpolation results to channel")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5197>
2020-05-25 20:34:36 +00:00
Erik Faye-Lund
ed1fd7bcc6 zink: pass batch instead of context for queries
This makes things a bit more consistent IMO.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5141>
2020-05-25 20:20:49 +00:00
Erik Faye-Lund
43c691b5b0 zink: do not dig into resource for nr_samples
The pipe_surface also know this, so no point in digging so deep.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5141>
2020-05-25 20:20:49 +00:00
Erik Faye-Lund
e38513e828 zink: use samples from state
There's no reason to compute this, when it's already passed in.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5141>
2020-05-25 20:20:49 +00:00
Alyssa Rosenzweig
fcbc022787 nir: Add un/pack_32_4x8 opcodes
Complement the existing un/pack_32_2x16 opcodes. These are useful for
8-bit format packing. On Midgard, they are equivalent to just a 32-bit
move, but other GPUs could lower to other packs if needed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5107>
2020-05-25 20:03:52 +00:00
Dmitriy Nester
46d5b07c5c util: delete fnv1a hash function
xxhash is faster than fnv1a in almost all circumstances, so we're
switching to it globally.

Signed-off-by: Dmytro Nester <dmytro.nester@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2405
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4020>
2020-05-25 19:41:09 +00:00
Dmitriy Nester
bf4d652f3f zink: replace fnv1a hash function with xxhash
xxhash is faster than fnv1a in almost all circumstances, so we're
switching to it globally.

Signed-off-by: Dmytro Nester <dmytro.nester@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4020>
2020-05-25 19:41:09 +00:00
Dmitriy Nester
33fd35e2d3 r600: replace fnv1a hash function with xxhash
xxhash is faster than fnv1a in almost all circumstances, so we're
switching to it globally.

Signed-off-by: Dmytro Nester <dmytro.nester@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4020>
2020-05-25 19:41:09 +00:00
Dmitriy Nester
387176829b util/hash_table: replace fnv1a hash function with xxhash
xxhash is faster than fnv1a in almost all circumstances, so we're
switching to it globally.

Signed-off-by: Dmytro Nester <dmytro.nester@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4020>
2020-05-25 19:41:09 +00:00
Dmitriy Nester
013df58498 i965: replace fnv1a hash function with xxhash
xxhash is faster than fnv1a in almost all circumstances, so we're
switching to it globally.

Signed-off-by: Dmytro Nester <dmytro.nester@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4020>
2020-05-25 19:41:09 +00:00
Dmitriy Nester
edd62619a1 freedreno: replace fnv1a hash function with xxhash
xxhash is faster than fnv1a in almost all circumstances, so we're
switching to it globally.

Signed-off-by: Dmytro Nester <dmytro.nester@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4020>
2020-05-25 19:41:09 +00:00
Dmitriy Nester
0e9af02323 nir: replace fnv1a hash function with xxhash
xxhash is faster than fnv1a in almost all circumstances, so we're
switching to it globally.

Signed-off-by: Dmytro Nester <dmytro.nester@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4020>
2020-05-25 19:41:09 +00:00
Alyssa Rosenzweig
1d647b1c48 panfrost: Only run batch debug when specifically asked
It's expensive and in a hot path; even for general debug builds we won't
need this, only if we're specifically hacking on batch code.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5202>
2020-05-25 16:01:18 +00:00
Alyssa Rosenzweig
4c5d1e2860 panfrost: Add debug print before query flushes
Just so we know if they're happening.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5202>
2020-05-25 16:01:18 +00:00
Bas Nieuwenhuizen
be784cc77b radv: Implement vkGetSwapchainGrallocUsage2ANDROID.
This was implemented in version 6 of the VK_ANDROID_native_buffer
extension and we only implement version 5. However, the Android
Vulkan loader only checks whether vkGetInstanceProcAddr for the
function is not NULL.

This all went wrong when we switched to the layer code from ANV.
Because the function may now be different per device, it adds fallback
functions that dispatch to the dispatch table. So if we didn't implement
the function we still returned a pointer to the dispatch function,
which made the Android Vulkan loader believe it was supported.

Dispatch functions:
d555794f30/src/amd/vulkan/radv_entrypoints_gen.py (L328)

Fixes: d555794f30 "radv: update entrypoints generation from ANV"
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2936
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5198>
2020-05-25 15:34:44 +00:00
Simon Ser
9a74746bd1 EGL: sync headers with Khronos
Taken from EGL-Registry commit 90b78b0662e2f0548cfd1926fb77bf628933541b.

With this update EGL_WL_bind_wayland_display and
EGL_WL_create_wayland_buffer_from_image are now in the registry, so we
don't need to define them in eglmesaext.h anymore.

The eglSwapBufferWithDamage* functions now take a const rects argument.
The eglapi.c function signature is updated accordingly.

Signed-off-by: Simon Ser <contact@emersion.fr>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4953>
2020-05-25 14:06:38 +00:00
Danylo Piliaiev
045267d1e6 st/mesa: Clear texture's views when texture is removed from Shared->TexObjects
If texture is shared between several contexts, calling glDeleteTextures
will remove it from ctx->Shared->TexObjects - which makes impossible for
contexts, when destroyed, to release their views to this texture. Which
leaves dangling pointers to destroyed contexts.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2960
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5106>
2020-05-25 12:32:16 +00:00
Bas Nieuwenhuizen
a51ab5f956 radv: Do not close fd -1 when NULL-winsys creation fails.
Fixes: cd6ec2b1ab "radv: implement a dummy winsys for creating devices without AMDGPU"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5181>
2020-05-25 11:12:07 +00:00
Bas Nieuwenhuizen
cd0c5b64cc radv: Remove dead code.
pool is always non-NULL, and is also accessed before this check
in the function, so remove the pool = NULL case.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5181>
2020-05-25 11:12:07 +00:00
Bas Nieuwenhuizen
cd61f5234d radv: Handle failing to create .cache dir.
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5181>
2020-05-25 11:12:07 +00:00
Bas Nieuwenhuizen
906435fb0e radv/winsys: Remove extra sizeof multiply.
The pointer is already uint64_t*, so the sizeof was too much ...

Fixes: eeff7e1154 "radv: Add userspace fence buffer per context."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5181>
2020-05-25 11:12:07 +00:00
Michel Dänzer
6c99de98ec gitlab-ci: Enable -Werror in meson-s390x job
It's warning-clean.

v2:
* Prevent -Werror from being enabled in `meson-ppc64le` job as well

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5185>
2020-05-25 08:49:25 +00:00
Samuel Pitoiset
b3c0f82841 radv: advertise VK_AMD_texture_gather_bias_lod
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5147>
2020-05-25 08:51:10 +02:00
Samuel Pitoiset
2e265b94a2 radv: add support for querying which formats support texture gather LOD
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5147>
2020-05-25 08:51:10 +02:00
Samuel Pitoiset
94570e87bd aco: add support for bias/lod with texture gather
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5147>
2020-05-25 08:51:10 +02:00
Samuel Pitoiset
e99c818cf0 ac/nir: add support for bias/lod with texture gather
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5147>
2020-05-25 08:51:10 +02:00
Samuel Pitoiset
41dc3ce449 spirv: add support for bias/lod with OpImageGather
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5147>
2020-05-25 08:51:10 +02:00
Samuel Pitoiset
dd39bf52b0 spirv: add SpvCapabilityImageGatherBiasLodAMD
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5147>
2020-05-25 08:51:10 +02:00
Yevhenii Kolesnikov
c7943343a0 glsl: subroutine signatures must match exactly
From GLSL 4.60.7 spec, section 6.1.2 "Subroutines":

It is a compile-time error if arguments and return type don’t match
between the function and each associated subroutine type.

Before, if subroutine type and implementation function were declared
with types, that could be implicitly converted, it led to a runtime crash.

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5125>
2020-05-24 23:55:44 +00:00
Samuel Pitoiset
5bc18b79a4 radv: advertise shaderDeviceClock on GFX8+
Unsupported on GFX6-GFX7.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5117>
2020-05-24 20:37:59 +02:00
Samuel Pitoiset
14292310d9 ac/nir: implement nir_intrinsic_shader_clock with device scope
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5117>
2020-05-24 20:37:58 +02:00
Samuel Pitoiset
b034f6cf2a ac/nir: fix shader clock with subgroup scope
The compiler should emit s_memtime instead of s_memrealtime for
the subgroup scope. I don't know why this LLVM 9 checks was for
but LLVM 8 also has this amdgcn intrinsic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5117>
2020-05-24 20:37:54 +02:00
Samuel Pitoiset
cecd4aad46 aco: implement nir_intrinsic_shader_clock with device scope
Use s_memrealtime instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5117>
2020-05-24 20:37:52 +02:00
Samuel Pitoiset
37c88c670f spirv: add ReadClockKHR support with device scope
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5117>
2020-05-24 20:37:50 +02:00
Samuel Pitoiset
769bf48d16 radv: remove useless assignment in build_streamout_vertex()
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3025
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5158>
2020-05-24 18:28:07 +00:00
Samuel Pitoiset
e1fa60838e radv: cleanup physical device features
Similar to the physical device properties.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5116>
2020-05-24 20:06:03 +02:00
Samuel Pitoiset
198e5e2e9e radv: do not return from radv_GetPhysicalDeviceFeatures2()
This function returns void.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5116>
2020-05-24 20:06:02 +02:00
Christopher Egert
c130a3402e r600: Use TRUNC_COORD on samplers
As per d573d1d825 the same should be done
here. It seems like TRUNCATE_COORD not available on r600, so this is
limited to evergreen.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5078>
2020-05-24 01:40:50 +02:00
Vinson Lee
4174a13459 panfrost: Ensure final.no_colour is initialized.
Fix warning reported by Coverity Scan.

Uninitialized scalar variable (UNINIT)
uninit_use: Using uninitialized value final. Field final.no_colour is
uninitialized.

Fixes: 3e4e849e6a ("panfrost: Disable tib read/write when colourmask = 0x0")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5183>
2020-05-23 21:00:52 +00:00
Vinson Lee
73c0f60d8c r600/sfn: Initialize VertexStageExportForGS m_num_clip_dist member variable.
Fix warning reported by Coverity Scan.

Uninitialized scalar field (UNINIT_CTOR)
uninit_member: Non-static class member m_num_clip_dist is not
initialized in this constructor nor in any functions that it calls.

Fixes: f7df2c57a2 ("r600/sfn: extract class to handle the VS export to different stages")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5180>
2020-05-23 20:47:07 +00:00
Vinson Lee
76a2aeeef3 llvmpipe: Fix variable name.
Fix warning reported by Coverity Scan.

Unused value (UNUSED_VALUE)
assigned_value: Assigning value from res->nr_samples to
jit_tex->sample_stride here, but that stored value is overwritten before
it can be used.

Fixes: 2e5cddacf7 ("llvmpipe: add num_samples/sample_stride support to jit textures")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3022
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5179>
2020-05-23 20:30:15 +00:00
Eric Engestrom
4e147e2c94 docs: drop no-longer-relevant comment about bugzilla
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5172>
2020-05-23 16:06:40 +00:00
Eric Engestrom
444138d6d9 tree-wide: fix deprecated GitLab URLs
They will stop working in the next GitLab release, so let's update them
ASAP to make sure things are propagated to everyone by then.

See:
https://about.gitlab.com/releases/2020/05/06/gitlab-com-13-0-breaking-changes/#removal-of-deprecated-project-paths

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5111>
2020-05-23 15:33:50 +00:00
Marek Olšák
9375e72d8d radeonsi/gfx8: enable TC-compatible HTILE from the beginning as before
Fixes: 0d83e7f4b9 - radeonsi: enable TC-compatible HTILE on demand for best Z/S performance
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2921
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2967

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
2020-05-23 03:45:07 -04:00
Marek Olšák
d30e1e486d radeonsi: don't enable TC-compatible HTILE for stencil if stencil doesn't use it
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
2020-05-23 03:45:09 -04:00
Marek Olšák
caeb44aa24 radeonsi: split si_all_descriptors_begin_new_cs and rename functions
A future commit will extend it.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
2020-05-23 03:45:07 -04:00
Marek Olšák
7b6b35c6b5 radeonsi: move resetting tracked registers into a new function
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
2020-05-23 03:45:07 -04:00
Marek Olšák
3509d3bd53 ac: update register and packet definitions for preemption
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
2020-05-23 03:45:07 -04:00
Marek Olšák
56af131f33 Revert "radeonsi: don't wait for idle at the end of gfx IBs"
This reverts commit 266fec1307.

The kernel doesn't wait for idle as part of implicit sync.

Fixes: 266fec1307
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2950

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
2020-05-23 03:44:44 -04:00
Marek Olšák
3f1f23239a radeonsi: decrease the max GS invocation count to 32
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
2020-05-23 03:44:44 -04:00
Marek Olšák
3cd96b5109 radeonsi: don't use INDIRECT_BUFFER within IBs
It's fragile. If I change the size or alignment, it hangs. Better safe than
sorry.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
2020-05-23 03:44:44 -04:00
Marek Olšák
8db739880a ac/surface: don't compute single-sample CMASK if it's unaligned
Displayable DCC can cause this and fail the assertion later.

Fixes: cf61f635ff

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
2020-05-23 03:44:44 -04:00
Marek Olšák
21504eab78 ac/gpu_info: compute the best safe IB alignment
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
2020-05-23 03:44:44 -04:00
Kristian H. Kristensen
5f365affc9 freedreno: Use the right amount of &'s
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5176>
2020-05-22 15:03:55 -07:00
Vinson Lee
1f33ca1fed freedreno: Add missing break statement.
Reported-by: Coverity Scan
Fixes: 5a6beb6a24 ("freedreno: add adreno 650")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5169>
2020-05-22 19:08:30 +00:00
Jason Ekstrand
f0e075ce6e nir/copy_prop_vars: Record progress in more places
Fixes: 96c32d7776 "nir/copy_prop_vars: handle load/store of vector..."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5170>
2020-05-22 18:41:15 +00:00
Jason Ekstrand
db6d9cdf06 nir/opt_deref: Report progress if we remove a deref
Fixes: a1c688517d "nir/opt_deref: Properly optimize ptr_as_array..."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5170>
2020-05-22 18:41:15 +00:00
Jason Ekstrand
111b0a6699 nir/lower_double_ops: Rework the if (progress) tree
Fixes: d7d35a9522 "nir/lower_doubles: Use the new NIR lowering..."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5170>
2020-05-22 18:41:15 +00:00
Thong Thai
78786a219e frontends/va: Fix deinterlace bottom field first flag
Fixes an issue with mpv, where deinterlacing causes the picture to be
offset by one line every other frame in the video.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5157>
2020-05-22 18:23:53 +00:00
Alyssa Rosenzweig
569ca93751 pan/mdg: Allow DCE on ld_color_buffer masks
Helps with blend shader register pressure.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5153>
2020-05-22 18:05:14 +00:00
Alyssa Rosenzweig
d8c16200e9 pan/mdg: Ensure we don't DCE into impossible masks
We round up for ld/st.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5153>
2020-05-22 18:05:14 +00:00
Alyssa Rosenzweig
197b398c32 pan/mdg: Lower shifts to 32-bit
Kind of a hack..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5153>
2020-05-22 18:05:14 +00:00
Alyssa Rosenzweig
7a52e975e4 pan/mdg: Add pack_colour_32 opcode
Seen for RGB10_A2UI packing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5153>
2020-05-22 18:05:14 +00:00
Alyssa Rosenzweig
f7cf5a30c7 panfrost: Handle !independent_blend for blend shaders
Fixes MRT blending.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5153>
2020-05-22 18:05:14 +00:00
Alyssa Rosenzweig
f9283eff6d panfrost: Use _mesa_roundevenf when packing clear colours
Match blend shader approach.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5153>
2020-05-22 18:05:14 +00:00
Alyssa Rosenzweig
8bb51992c8 panfrost: Fix dated comment
Work register counts are not explicitly stored for blend shaders, and
blend shaders are used for far more than UNORM8.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5153>
2020-05-22 18:05:14 +00:00
Hanno Böck
be71e2fd08 Properly check mmap return value
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5150>
2020-05-22 17:15:30 +00:00
Eric Anholt
38f32372aa ci: Improve baremetal's logging of the job env var passthrough.
Trying to read the sh -x script output was rough, just cat the file once
we're done setting it up.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5089>
2020-05-22 16:44:46 +00:00
Eric Anholt
ae442c3598 ci: Enable a fractional run with UBO-to-constbuf disabled on a3xx.
This gets us coverage of an important case in the HW that the CTS
otherwise basically doesn't hit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5089>
2020-05-22 16:44:46 +00:00
Eric Anholt
b4bccbde36 ci: Don't forget to set NIR_VALIDATE in baremetal runs.
Given that a530 doesn't have cpufreq, we really don't have the time to be
running the validator on all of deqp.  This also helps explain why I had
to go to such a small fraction on the a3xx gles3 run (which we can now
increase).  However, a3xx gles2 seems to be fast enough that we can leave
it enabled and get coverage for older chips.

Because we run more tests now, clear out some stale xfails from the a3xx
list.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5089>
2020-05-22 16:44:46 +00:00
Eric Anholt
6839ad59e6 ci: Do an explicit NIR validation-enabled pass on freedreno a630.
We disable it for most of the CTS because it's slow, but let's do a
fractional run to make sure that we don't hit any obvious failures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5089>
2020-05-22 16:44:46 +00:00
Eric Anholt
90cf494338 ci: Fix DEQP_CASELIST_FILTER (used by a630 noubo run)
We were doing sed -i /filter/p, which printed everything but printed the
filtered things twice (though they'd only get tested once).  Now that the
filter works, run all the UBO tests instead of doing a 1/5 run, revealing
a new failure.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5089>
2020-05-22 16:44:46 +00:00
Krzysztof Raszkowski
09fc9c5f6c gallium/swr: Fix building swr with MSVC
Fix building swr with MSVC by turning off
UNICODE before including windows.h.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5166>
2020-05-22 17:34:26 +02:00
Danylo Piliaiev
4025583123 mesa: Fix double-lock of Shared->FrameBuffers and usage of wrong mutex
Fixes: 7534c536ca
Fixes: 8cfb3e4ee5
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3024
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5160>
2020-05-22 14:50:21 +00:00
Erik Faye-Lund
0d2ec80dea zink: hammer in an explicit wait when retrieving buffer contents for reading
this ensures that the buffer returned is synchronized as expected, though
it incurs a significant performance hit and will hopefully be improved in future
patches

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Mike Blumenkrantz
af2d993535 zink: reset query on-demand when beginning a new query from resume
the current query pool implementation expects queries to be reset at
the time they're initiated, which means queries started at this point
need to also be explicitly reset

the zink_begin_query() function can't be reused here or else the
query will be double-added to the active list, triggering an infinite loop

ref mesa/mesa#3000

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Mike Blumenkrantz
3933747d87 zink: fix vkCmdResetQueryPool usage
the final parameter here is the number of queries to reset, not the
index of the last query, meaning that the value passed needs to be
(curr_query + 1) in order to reset the query corresponding to
curr_query

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Mike Blumenkrantz
ae32a1ed20 zink: flush active queries on destroy and free query object
queries with a valid active_list pointer are likely to still be active,
and vk spec requires them to have completed prior to being destroyed

this isn't completely accurate, as it's currently possible for queries
to remain in the active list while not actually being active, but it
resolves driver crashes that can occur from destroying a stilll-running
query pool object

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Mike Blumenkrantz
4592c1d45d zink: add SpvId returns to a couple ntv functions
this is helpful for debugging

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Mike Blumenkrantz
21a7fdf97c zink: explicitly zero some arrays in ntv
just to be safe

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Pierre-Eric Pelloux-Prayer
e75effc629 radeonsi/sdma: remove useless compare
clang warning:
   result of comparison of constant 65536 with expression of type 'uint16_t'
   (aka 'unsigned short') is always true

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5119>
2020-05-22 09:12:18 +02:00
Pierre-Eric Pelloux-Prayer
004ac58509 amdgpu: fix unitialized variable
clang warning:
    variable 'va_handle' is used uninitialized whenever 'if' condition is false

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5119>
2020-05-22 09:12:14 +02:00
Pierre-Eric Pelloux-Prayer
d92ab0e763 radeonsi: fix inversed arguments in si_test_gds_memory_management
clang warning:
   implicit conversion from enumeration type 'enum radeon_bo_usage'
   to different enumeration type 'enum radeon_bo_domain'

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5119>
2020-05-22 09:12:06 +02:00
Pierre-Eric Pelloux-Prayer
dddd91eef3 amd/addrlib: fix forgotten char -> enum conversions
clang warning:
  result of comparison of constant 115 with expression of type
  'const enum Dim' is always false

Fixes: e3e704c7e7 ("amd/addrlib: Use enum instead of sparse chars to identify dimensions")
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5119>
2020-05-22 09:11:47 +02:00
Ian Romanick
685e79a64b glsl: Remove integer matrix support from ir_dereference_array::constant_expression_value
It looks like this code has existed since day 1, but I have no idea why.
There have never been integer matrices in GLSL.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5135>
2020-05-21 17:47:08 -07:00
Eric Anholt
22979f90d9 freedreno/a5xx: Define the 2D blit UBWC pitch fields
Syncing up with my changes to envytools for decoding texturator output.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5127>
2020-05-21 17:09:42 -07:00
Eric Anholt
6a154aea0d freedreno/a5xx: Set MIN_LAYERSZ on 3D textures like we do on a6xx.
These fields (TILE_ALL and MIN_LAYERSZ) seem to be the same on a5xx as
a6xx, having looked at some UBWC vs non-UBWC texturator cases.  Setting
MIN_LAYERSZ does fix the 3D fail we see in the CTS.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5127>
2020-05-21 17:09:42 -07:00
Eric Anholt
9f62566ef6 freedreno/a5xx: Add the outline of a unit test for a5xx layout.
Includes a few 3D cases from CTS layouts (since I was looking at CTS
failures) which do justify that a5xx's 3D layout workaround is actually
different from a6xx's.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5127>
2020-05-21 17:09:42 -07:00
Eric Anholt
e7003df717 freedreno/fdl: Separate the list of a6xx testcases from the the test code.
I'll be reusing the test code for a5xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5127>
2020-05-21 17:09:42 -07:00
Eric Anholt
a1a739995b freedreno/a5xx: Move resource layout to fdl.
I'm working on fixing the 3D layouts in CI so we can stabilize it, but I
wanted unit tests using the texturator scripts to make sure I don't break
things.  This also makes a5xx and a6xx layout easily comparable again.

This is a straightforward move of the code with prsc references replaced
by arguments in the style of fdl6.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5127>
2020-05-21 17:09:42 -07:00
Alyssa Rosenzweig
e85b6c4ab1 pan/mdg: Eliminate remaining divisions from compiler
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5154>
2020-05-21 18:29:53 -04:00
Alyssa Rosenzweig
2b9f6d30f8 pan/mdg: Avoid division in printing helpers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5154>
2020-05-21 18:29:53 -04:00
Alyssa Rosenzweig
4f5b3802dc pan/mdg: Eliminate 64-bit swizzle packing division
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5154>
2020-05-21 18:29:53 -04:00
Alyssa Rosenzweig
28a750c5f2 pan/mdg: Eliminate expand_writemask division
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5154>
2020-05-21 18:29:53 -04:00
Alyssa Rosenzweig
c6c906ecdf pan/mdg: Cleanup comments that look like division
Don't use a /.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5154>
2020-05-21 18:29:53 -04:00
Alyssa Rosenzweig
55da8bcede panfrost: Fix transform feedback types
Don't assume float for everything.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5152>
2020-05-21 20:17:52 +00:00
Alyssa Rosenzweig
ef57325fba panfrost: Don't set CAN_DISCARD for MFBD
It's likely harmless but let's match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 15:50:18 -04:00
Alyssa Rosenzweig
1085f74239 panfrost: Avoid redundant shader executions with mask=0x0
Only works for a few Midgard GPUs, but hey.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 15:49:47 -04:00
Alyssa Rosenzweig
3e4e849e6a panfrost: Disable tib read/write when colourmask = 0x0
There might still be Z/S updates so we can't drop the whole shader but
we can shortcircuit the colour pipeline.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 15:48:53 -04:00
Alyssa Rosenzweig
f69b6e9116 panfrost: Remove dated comment about leaks
It's been fixed for a while.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 15:48:53 -04:00
Alyssa Rosenzweig
6dd11a6dc3 panfrost: Limit blend shader work count
To 8, but later we should go much lower.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 15:48:03 -04:00
Alyssa Rosenzweig
b8bd356dff panfrost: Allow tiling on RECT textures
Except for the norm coords bit, they're identical to 2D.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig
c41cf03589 panfrost: Allow bpp24 tiling
It's dumb that we have to but it does help RGB8 nontrivially. Alas.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig
48cc608859 panfrost: Don't zero staging buffer for tiling
It's a little less safe but the memset does take time during
initialization. v3d doesn't either, so I think  it's ok.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig
9f2997dad0 panfrost: Don't set PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY
I'm not aware of any reason this might be necessary, let's avoid the
translate.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig
5a4eeb21bf panfrost: Fill in SCALED formats to format table
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig
98fc955c6e panfrost: Remove deadcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig
794c239a99 panfrost: Keep cached BOs mmap'd
It doesn't make sense to munmap/mmap repeatedly; they're mapped GPU-side
anyway. So just munmap on free, which will happen in low-mem regardless.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:31 -04:00
Alyssa Rosenzweig
485ec76108 panfrost: Guard experimental fp16 behind debug flag
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
e6293425bf pan/mdg: Pack 8-bit swizzles in 16-bit ops
Let's inch closer to 8-bit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
ca48143ec4 pan/mdg: Implement condense_writemask for 8-bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
f768cb04ed pan/mdg: Implement vector constant printing for 8-bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
28201af080 pan/mdg: Use shifts instead of division for RA sizes
We're only dealing with powers-of-two, so this eliminates potential
issues with divisions-by-zero that are otherwise hacked around. Probably
faster too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
3d435b334b pan/mdg: Pack barriers correctly
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
fde1f2b7cb pan/mdg: Fix type checking issues with compute
SSBO and barriers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
4e4c9f5f5a pan/mdg: Separately pack constants to the upper half
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
d475d19f09 pan/mdg: Only combine 16-bit constants to lower half
We can't swizzle both halves simultaneously.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
8b4e278628 pan/mdg: Factor out mir_adjust_constant
Each source is semi-independent, we don't need the extra indentation
when the logic is already so complex.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
b833702cc1 pan/mdg: Print constant vectors less wrong
For !32-bit types, we need to pay attention to rep_low/high/half to
determine the effective swizzle.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
cd26bd9425 pan/mdg: Round up bytemasks when spilling
So we can pack the spills for <32-bit types.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
68d2a889b7 pan/mdg: Print mask when dest=0
Forgot this convention differs from Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
553c2cf16b pan/mdg: Set RA bounds for fp16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
b91d71597e pan/mdg: Eliminate load_64
It can always be inferred from the types.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
1ff2cabe87 pan/mdg: Use type size to determine alignment
Generally, f16 needs to be aligned to 16-bit, f32 to 32-bit, ...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
51582e5454 pan/lcra: Allow per-variable bounds to be set
Different variables need to respect different bounds. In general,
16-bytes is okay, but for 4-channel 16-bit vectors, we can't cross 8
byte boundaries (else the swizzles will not be packable after), so we
update LCRA to allow this more general form.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
0737080ba6 pan/lcra: Remove unused alignment parameters
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
21405f6fcf pan/mdg: Ignore dest.type when offseting load swizzle
It's always as-if 32-bit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
4f5bad649b pan/mdg: Don't generate conversions for fp16 LUTs
We can just set the register mode appropriately and then we don't have
to care anywhere else, and there's no extra NIR to chew through. Make
sure we include sqrt too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
6b023b3545 pan/mdg: Implement b2f16
...as iand

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
1108eaa90d pan/mdg: Streamline dest_override handling
We can pass it all off to emit time, and let the types in the IR do the
heavylifting in the meantime, which is a lot easier to get right.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
1e4793a95c pan/mdg: Remove redundant redundancy
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
1cd65353c9 pan/mdg: Defer modifier packing until emit time
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
edf1479bea pan/mdg: Remove promote_float pass
Now unused.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
72c1e3a66a pan/mdg: Promote imov to fmov on a NIR level
Avoids dedicated MIR promote_fmov pass which is unnecessary.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
3cfe2fc1b1 pan/mdg: Identify scalar integer mods
Symmetric with vector mods, except for normal which is packed as
sign-extend. (flag 2 never seen in the wild)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
d4a42a78d8 pan/mdg: Use type to determine triviality of a move
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
df3d932bb4 pan/mdg: Use src_types to determine size in scheduling
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
95dd478ed3 pan/mdg: Add abs/neg/shift modifiers to IR
Rather than twiddling them into the ALU packed field.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
31e13956e1 pan/mdg: Explain ld/st sign/zero extension
Now we know why there are duplicates :-)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
dbcae7c667 pan/mdg: Respect !32-bit sizes in RA
So we can take advantage of mediump.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
8c012c8f8b pan/mdg: Handle dest up/lower correctly with swizzles
During emit time.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
8084fc3b66 pan/mdg: Include more types
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
e9a4bd90a8 pan/mdg: Remove mir_get_alu_src
Unused.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig
9915bb2c40 pan/mdg: Remove mir_*size routines
We'd rather use the actual type information than inferring modes all
over the place.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:13 +00:00
Alyssa Rosenzweig
40e9bee714 pan/mdg: Fix constant combining crash
We need to round up.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:13 +00:00
Alyssa Rosenzweig
eb28a3669b pan/mdg: Handle comparisons in fp16 path
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:13 +00:00
Samuel Pitoiset
2d4493ee11 aco: sign-extend the input and identity for 8-bit subgroup operations
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
2020-05-21 15:06:48 +00:00
Samuel Pitoiset
c76595aec2 aco: use a temporary SGPR for 8-bit/16-bit literal reduction identities
Otherwise, the compiler overwrites s0 which contains the exec mask.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
2020-05-21 15:06:48 +00:00
Samuel Pitoiset
b3c87c52ea aco: implement 8-bit/16-bit nir_intrinsic_quad_*
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
2020-05-21 15:06:48 +00:00
Samuel Pitoiset
dfa62d97a0 aco: implement 8-bit/16-bit nir_intrinsic_{shuffle,_read_invocation}
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
2020-05-21 15:06:48 +00:00
Samuel Pitoiset
f03e56eaf0 aco: implement 8-bit/16-bit nir_intrinsic_read_first_invocation
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
2020-05-21 15:06:48 +00:00
Samuel Pitoiset
af7e2c6133 aco: validate 8-bit/16-bit VGPR operands for readfirstlane/readlane/writelane
I would expect it to just work as intended and other solutions,
like v_and_b32 to make sure the upper bits are 0, might have some
overhead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
2020-05-21 15:06:48 +00:00
Samuel Pitoiset
86e2b03e3f aco: implement 8-bit/16-bit reductions
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
2020-05-21 15:06:48 +00:00
Samuel Pitoiset
cc79945b21 aco: declare 8-bit/16-bit reduce operations
The 8-bit float variants are only for consistency but are unused.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
2020-05-21 15:06:48 +00:00
Eric Engestrom
bf97150d45 no_extern_c.h: fix typo in comment
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5145>
2020-05-21 14:23:41 +00:00
Erik Faye-Lund
089b0310ef docs: fix broken release-calendar
This also removed the branch-row, which is needed to keep things sane.

Fixes: 34718070ef ("docs: update calendar for 20.1.0-rc4")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5143>
2020-05-21 14:15:24 +00:00
Rhys Perry
40ed7fcc0b aco: fix typo in insert_waitcnt's kill()
No shader-db changes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3004
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5126>
2020-05-21 13:01:41 +00:00
Daniel Schürmann
51f4b22fee aco: don't allow unaligned subdword accesses on GFX6/7
There are no SDWA instructions which means that only
full registers can be accessed.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5070>
2020-05-21 12:07:40 +00:00
Daniel Schürmann
ae390755fe aco: fix corner case in register allocation
We mark dead operands in the register file when searching for
a register for a definition. Only do so, if this space has not
yet been taken by a different definition.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5070>
2020-05-21 12:07:40 +00:00
Daniel Schürmann
acec00eae0 aco: don't move create_vector subdword operands to unsupported register offsets
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5070>
2020-05-21 12:07:40 +00:00
Daniel Schürmann
5201985332 aco: restrict copying of create_vector operands to GFX9+
This improves code size for Polaris and earlier due to less register swapping

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5070>
2020-05-21 12:07:40 +00:00
Pierre Moreau
8635c28a92 clover: Address unnecessary copy warnings
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4943>
2020-05-21 10:58:05 +00:00
Pierre Moreau
15a27ed73b clover/api: Address missing braces for subobj init
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4943>
2020-05-21 10:58:05 +00:00
Danylo Piliaiev
5500a2b7fc meson: Disable GCC's dead store elimination for memory zeroing custom new
Some classes use custom new operator which zeroes memory, however gcc does
aggressive dead-store elimination which threats all writes to the memory
before the constructor as "dead stores".

For now we disable this optimization.

The new operators in question are declared via:
 DECLARE_RZALLOC_CXX_OPERATORS
 DECLARE_LINEAR_ZALLOC_CXX_OPERATORS

The issue was found with lto builds, however there is no guarantee that
it didn't happen with ordinary ones.

CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2977
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1358
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5104>
2020-05-21 08:54:30 +00:00
Samuel Pitoiset
a3045cbc97 radv/winsys: remove useless free in radv_amdgpu_create_bo_list()
free(NULL) is fine but let's remove it.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3008
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5131>
2020-05-21 08:09:18 +00:00
Samuel Pitoiset
57a4837f6b radv: fix duplicated expression in ac_setup_rings()
Probably a search&replace mistake when that common struct was
introduced.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3006
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5130>
2020-05-21 07:51:55 +00:00
Samuel Pitoiset
ef042ae7c3 radv: fix missing break in radv_GetPhysicalDeviceFeatures2()
Wow, missed that one.

Fixes: 57e796a12a - ("radv: Implement VK_EXT_custom_border_color")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5128>
2020-05-21 07:36:32 +00:00
Samuel Pitoiset
1ad9a8a884 aco: fix missing break in label_instruction()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5129>
2020-05-21 09:00:02 +02:00
Dave Airlie
22554e1fbc llvmpipe: compute shaders work better with all the threads.
I got to benchmarking some vulkan compute benchmark and wondered
why my CPUs weren't being saturated, helps if you actually wake up
all the threads in the threadpool.

Fixes: 1b24e3ba75 (llvmpipe: add compute threadpool + mutex)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5138>
2020-05-21 14:10:41 +10:00
Nataraj Deshpande
02a1f95386 dri_util: Update internal_format to GL_RGB8 for MESA_FORMAT_R8G8B8X8_UNORM
The commit helps to resolve GL_INVALID_OPERATION error returned
during CTS test when Android format RGBX8888 fallback to RGBA8888
and then set color with glTexSubImage2D(format=GL_RGB).

Fixes android.hardware.nativehardware.cts.AHardwareBufferNativeTests:
 #SingleLayer_ColorTest_GpuSampledImageCanBeSampled_R8G8B8X8_UNORM

Cc: <mesa-stable@lists.freedesktop.org>
Fixes: bf576772ab ("dri_util: add driImageFormatToSizedInternalGLFormat function")
Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5034>
2020-05-21 01:52:46 +00:00
Kristian H. Kristensen
13fc03f4c0 freedreno/a6xx: Avoid stalling for occlusion queries
If we postpone computing the counter delta until after each tile (or
sysmem pass), we don't have to stall in the middle of the draw stream.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5064>
2020-05-21 00:16:55 +00:00
Kristian H. Kristensen
1c21577246 freedreno/a6xx: Emit VFD setup as array writes
We can use only one PKT4 for each of VFD_FETCH, VFD_DECODE and
VFD_DEST_CNTL and write all the elements if we split the loop into
three loops.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5064>
2020-05-21 00:16:55 +00:00
Kristian H. Kristensen
5f494636fa freedreno/a6xx: Allocate ringbuffer based on VFD count
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5064>
2020-05-21 00:16:55 +00:00
Kristian H. Kristensen
3275b8082a freedreno/a6xx: Map inputs to VFD entries up front
Break this logic out of the loop in preperation for splitting the VFD
state emit loop up.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5064>
2020-05-21 00:16:55 +00:00
Kristian H. Kristensen
5b7a73021c freedreno/a6xx: Create shader dependent streamout state at compile time
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5064>
2020-05-21 00:16:55 +00:00
Eric Engestrom
9bac0dd99b compiler: delete leftover autotools test wrapper
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5114>
2020-05-20 22:19:30 +00:00
Eric Engestrom
ba44990726 git_sha1_gen.py: fix whitespace
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5112>
2020-05-20 22:05:41 +00:00
Eric Engestrom
c909370117 git_sha1_gen.py: fix code style
Bare `except` are bad form as per PEP8.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5112>
2020-05-20 22:05:41 +00:00
Eric Engestrom
413c6f9905 git_sha1_gen.py: fix out-of-date comment
This hasn't been true since 7088622e5f ("buildsys: move file
regeneration logic to the script itself") almost 3 years ago.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5112>
2020-05-20 22:05:41 +00:00
Eric Engestrom
f68db81cbb anv: disable VK_EXT_calibrated_timestamps when the timestamp register is unreadable
When running in a virtual context, the timestamp register is unreadable
on Gen12+.
While we could work around this, that would result in very inaccurate
results for an extension where the whole point is accuracy, so let's
just disable the extension.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2797>
2020-05-20 21:49:10 +00:00
Eric Engestrom
a62ee262fd anv: replace magic | 1 with already #define'd name
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2797>
2020-05-20 21:49:10 +00:00
Eric Engestrom
e27f311c85 anv: pass the fd directly to anv_gem_reg_read()
This allows its use without the need for an anv_device.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2797>
2020-05-20 21:49:10 +00:00
Eric Anholt
6bf40c28c9 ci: Make a530's GLES3/31 fractional runs much more complete.
Now that we don't get scheduled to any 19mhz CPUs, the old GLES3 job went
from 12 minutes of deqp-runner runtime to 54s.  Increase how much of the
testsuite we cover in exchange, still keeping the runtime at 3-6 min
(compared to previous 10-17 min).  Since the tests we're running changed,
reset the xfails list.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5115>
2020-05-20 21:05:32 +00:00
Eric Anholt
6033c10092 ci: Disable SMP on the a5xx boards.
CPU0 comes up at some plausible freq, but the rest are at 19Mhz waiting
for cpufreq to come up, which has not been upstreamed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5115>
2020-05-20 21:05:32 +00:00
Andrii Simiklit
d1b7462849 i965/vec4: Ignore swizzle of VGRF for use by var_range_end()
Issue description from Matt's commit e7c376ad:
 "var_range_end(v, n) loops over the n components of variable number v and
  finds the maximum value, giving the last use of any component of v.
  Therefore it expects v to correspond to the variable associated with the
  .x channel of the VGRF.

  var_from_reg() however returns the variable for the first channel of the
  VGRF, post-swizzle.

  So, if the last register had a swizzle with y, z, or w in the swizzle
  component, we would read out of bounds. For any other register, we would
  read liveness information from the next register.

  The fix is to convert the src_reg to a dst_reg in order to call the
  dst_reg version of var_from_reg() that doesn't consider the swizzle."

Closes: #3003
Fixes: 48dfb30f ('intel/compiler: Move all live interval analysis results into vec4_live_variables')
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Andrii Simiklit <asimiklit.work@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4941>
2020-05-20 20:19:18 +00:00
Dave Airlie
10095387f5 r600/sfn: fix nop channel assignment.
this fixes a bunch of asserting tests on cayman

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5113>
2020-05-20 19:51:07 +00:00
Eric Engestrom
34718070ef docs: update calendar for 20.1.0-rc4
Adding another release candidate next week.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5134>
2020-05-20 21:45:49 +02:00
D Scott Phillips
81201e4617 anv/gen11+: Disable object level preemption
An unknown issue is causing vs push constants to become corrupted
during object-level preemption. For now, restrict to command
buffer level preemption to avoid rendering corruption.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5110>
2020-05-20 19:08:47 +00:00
Jonathan Marek
5a6beb6a24 freedreno: add adreno 650
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4611>
2020-05-20 18:24:28 +00:00
Jonathan Marek
72d7d2145c freedreno/a6xx: use RESOLVE_TS event
This is required on a650 to flush the GMEM store.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4611>
2020-05-20 18:24:28 +00:00
Jonathan Marek
e49748521e freedreno: reduce extra height alignment in a6xx layout
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4611>
2020-05-20 18:24:28 +00:00
Jonathan Marek
f6f8a19092 freedreno/a6xx: split up gmem/tile alignment requirements
RB_BLIT has a granularity of 16x4, but tile sizes must be 32x16 aligned.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4611>
2020-05-20 18:24:28 +00:00
Jonathan Marek
bf024c96ad freedreno/a6xx: don't use gmem_alignw for imported buffers
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4611>
2020-05-20 18:24:28 +00:00
Jonathan Marek
4b65fcb067 freedreno/a5xx: remove unused reference to gmem_alignw in layout code
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4611>
2020-05-20 18:24:28 +00:00
Jonathan Marek
aa2186db0e freedreno: move a4xx specific layout code to a4xx code
Every other gen has its own setup_slices

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4611>
2020-05-20 18:24:28 +00:00
Dylan Baker
5580322486 tests: Make tests aware of meson test wrapper
Meson 0.55.0 will set the MESON_EXE_WRAPPER environment variable to the
joined version of that wrapper if it is needed. Our tests that take
compiled targets as arguments can use that information to run cross
built binaries, or if there isn't a wrapper and we get an ENOEXEC, we
can skip the tests gracefully.

We try to use mesonlib.split_args, which handles windows arguments
better than python's builtin shlex module, but fall back to that if the
meson module isn't available for some reason.

Cc: 20.0 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5103>
2020-05-20 17:57:15 +00:00
Thong Thai
ef0d92459c gallium/auxiliary/vl: Fix compute shader scale_y for interlaced videos
Signed-off-by: Thong Thai <thong.thai@amd.com>
Fixes: 494b7ef0c1 ("gallium/auxiliary/vl: Fix compute shader scaling for non-square pixels")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5121>
2020-05-20 17:32:36 +00:00
Alyssa Rosenzweig
fc06b8b7dc pan/mdg: Optimize liveness computation in DCE
Rather than recompute liveness every block, compute it just once for the
whole shader, which ends up more efficient.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5123>
2020-05-20 17:06:34 +00:00
Alyssa Rosenzweig
c24dfc9da4 pan/mdg: Precompute mir_special_index
Rather than O(N) each call, we can precompute the whole set - also O(N)
- and then subsequent checks are O(1).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5123>
2020-05-20 17:06:34 +00:00
Alyssa Rosenzweig
4cf02b5d4a pan/mdg: Optimize pipelining logic
The test and rewrite were both accidentally O(N) to the shader size when
they should be O(1), so overall this takes the pass from O(N^2) to O(N).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5123>
2020-05-20 17:06:34 +00:00
Alyssa Rosenzweig
d39f95b75a pan/mdg: Emit fcsel when beneficial
If there are floating point modifiers, we emit fcsel instead of icsel
(and likewise if integer modifiers, icsel instead of fcsel) to minimize
redundant instructions.

total instructions in shared programs: 3628 -> 3626 (-0.06%)
instructions in affected programs: 139 -> 137 (-1.44%)
helped: 2
HURT: 0

total bundles in shared programs: 1886 -> 1885 (-0.05%)
bundles in affected programs: 19 -> 18 (-5.26%)
helped: 1
HURT: 0

total quadwords in shared programs: 3319 -> 3317 (-0.06%)
quadwords in affected programs: 127 -> 125 (-1.57%)
helped: 2
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5123>
2020-05-20 17:06:34 +00:00
Lionel Landwerlin
db9e16450d intel/aub_error_decoder: print driver identifier if found
You can find it right before the application batch :

HuC firmware: i915/kbl_huc_ver02_00_1810.bin
        status: fetch NONE, load NONE
        version: wanted 2.0, found 0.0
        header: offset 0, size 0
        uCode: offset 0, size 0
        RSA: offset 0, size 0
Driver identifier: i965 20.0.0-devel
--- batch buffer (rcs0 (submitted by glxgears [44455])) at 0x0000fffe ec000000
0xfffeec000000:  0x70000007:  MEDIA_VFE_STATE
0xfffeec000000:  0x70000007 : Dword 0
    DWord Length: 7
0xfffeec000004:  0x00000000 : Dword 1
    Per Thread Scratch Space: 0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
2020-05-20 15:58:22 +00:00
Lionel Landwerlin
64473fd8f7 anv: add identifier BO
A buffer added to all execbufs so that we can attribute a batch that
caused a hang to a particular driver.

v2: Reuse workaround BO

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
2020-05-20 15:58:22 +00:00
Lionel Landwerlin
507b1ca10c i965: add identifier BO
A buffer added to all execbufs so that we can attribute a batch that
caused a hang to a particular driver.

v2: Reuse workaround BO

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
2020-05-20 15:58:22 +00:00
Lionel Landwerlin
2a4c361b06 iris: add identifier BO
A buffer added to all execbufs so that we can attribute a batch that
caused a hang to a particular driver.

v2: Reuse workaround BO

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
2020-05-20 15:58:22 +00:00
Lionel Landwerlin
805b32cab9 intel: add identifier for debug purposes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
2020-05-20 15:58:22 +00:00
Lionel Landwerlin
e81de67d85 i965: store workaround_bo offset
This offset store the location where we read/write into the
workaround_bo. It will allow to select a different address later,
leaving the beginning of the buffer to some other use.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
2020-05-20 15:58:22 +00:00
Lionel Landwerlin
07781f0afe iris: store workaround address
This will allow to select a different address later, leaving the
beginning of the buffer to some other use.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
2020-05-20 15:58:22 +00:00
Lionel Landwerlin
33b452aae7 anv: store the workaround address
This will allow to select a different address later, leaving the
beginning of the buffer to some other use.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
2020-05-20 15:58:22 +00:00
Lionel Landwerlin
0ff5b9e692 blorp: rename workaround address function
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
2020-05-20 15:58:22 +00:00
Lionel Landwerlin
f36708b143 anv: fixup unwinding of device create failure
We appear to have the ordering mixed up a bit.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
2020-05-20 15:58:22 +00:00
Icecream95
faf28b83fd panfrost: Enable PIPE_CAP_VERTEX_COLOR_UNCLAMPED
This tells Mesa to clamp vertex colours in the vertex shader.

This improves rendering in a number of games such as Extreme Tux
Racer and H-Craft Championships.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5075>
2020-05-20 15:14:28 +00:00
Andrii Simiklit
3725aa7b5d glsl_type: don't serialize padding bytes from glsl_struct_field
This should fix such valgrind warnings:
==37417== Uninitialised byte(s) found during client check request
==37417==    at 0x6183471: blob_write_bytes (blob.c:163)
==37417==    by 0x629785B: encode_type_to_blob (glsl_types.cpp:2760)
==37417==    by 0x61E68D8: write_variable (nir_serialize.c:293)
==37417==    by 0x61E6F6A: write_var_list (nir_serialize.c:421)
==37417==    by 0x61EBA7A: nir_serialize (nir_serialize.c:2018)
==37417==    by 0x5B5E007: serialize_nir_part (brw_program_binary.c:135)
==37417==    by 0x5B5E7F3: brw_serialize_program_binary (brw_program_binary.c:299)
==37417==    by 0x5FEF5FF: write_program_payload (program_binary.c:177)
==37417==    by 0x5FEF7BB: _mesa_get_program_binary_length (program_binary.c:225)
==37417==    by 0x5E3D31D: get_programiv (shaderapi.c:912)
==37417==    by 0x5E3F730: _mesa_GetProgramiv (shaderapi.c:1827)
==37417==    by 0x111DA0: program_binary_save_restore (shader_runner.c:686)
==37417==  Address 0x8f59481 is 81 bytes inside a block of size 480 alloc'd
==37417==    at 0x483B7F3: malloc (vg_replace_malloc.c:309)
==37417==    by 0x618CE67: ralloc_size (ralloc.c:123)
==37417==    by 0x618CF35: rzalloc_size (ralloc.c:155)
==37417==    by 0x618D245: rzalloc_array_size (ralloc.c:234)
==37417==    by 0x629041D: glsl_type::glsl_type(glsl_struct_field const*, unsigned int, glsl_interface_packing, bool, char const*) (glsl_types.cpp:148)
==37417==    by 0x6293EC3: glsl_type::get_interface_instance(glsl_struct_field const*, unsigned int, glsl_interface_packing, bool, char const*) (glsl_types.cpp:1271)
==37417==    by 0x604C878: (anonymous namespace)::per_vertex_accumulator::construct_interface_instance() const (builtin_variables.cpp:365)
==37417==    by 0x6050722: (anonymous namespace)::builtin_variable_generator::generate_varyings() (builtin_variables.cpp:1568)
==37417==    by 0x60509CA: _mesa_glsl_initialize_variables(exec_list*, _mesa_glsl_parse_state*) (builtin_variables.cpp:1600)
==37417==    by 0x6149AE9: _mesa_ast_to_hir(exec_list*, _mesa_glsl_parse_state*) (ast_to_hir.cpp:131)
==37417==    by 0x60706D6: _mesa_glsl_compile_shader (glsl_parser_extras.cpp:2222)
==37417==    by 0x5E3DC16: _mesa_compile_shader (shaderapi.c:1211)

==37417== Use of uninitialised value of size 8
==37417==    at 0x529AE13: ??? (in /usr/lib/x86_64-linux-gnu/libz.so.1.2.11)
==37417==    by 0x6184075: util_hash_crc32 (crc32.c:127)
==37417==    by 0x5FEF401: write_program_binary (program_binary.c:95)
==37417==    by 0x5FEF8BC: _mesa_get_program_binary (program_binary.c:252)
==37417==    by 0x5E40E22: _mesa_GetProgramBinary (shaderapi.c:2411)
==37417==    by 0x4914057: stub_glGetProgramBinary (piglit-dispatch-gen.c:24737)
==37417==    by 0x111E4A: program_binary_save_restore (shader_runner.c:704)
==37417==    by 0x11F765: piglit_display (shader_runner.c:5112)
==37417==    by 0x499082F: run_test (piglit_fbo_framework.c:52)
==37417==    by 0x4980E89: piglit_gl_test_run (piglit-framework-gl.c:229)
==37417==    by 0x110DA9: main (shader_runner.c:72)

v2: - decode_glsl_struct_field_from_blob and
    encode_glsl_struct_field should be `static`
    ( Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> )
v3: - we can get rid of `struct packed_struct_field_flags`
    ( Tapani Pälli <tapani.palli@intel.com> )
    - we can get rid of `unsigned __pad: 15` bitfield
    ( Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> )

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Andrii Simiklit <asimiklit.work@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5054>
2020-05-20 14:15:00 +00:00
Jonathan Marek
0d9996e223 turnip: enable 422_UNORM formats
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4590>
2020-05-20 13:22:12 +00:00
Jonathan Marek
d070a7ba0c turnip: implement VK_KHR_sampler_ycbcr_conversion
Most changes based on radv, some simplification, since we don't need to
sample multiple planes, 422_UNORM/420_UNORM formats will be supported
directly using the hardware formats for those.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4590>
2020-05-20 13:22:12 +00:00
Jonathan Marek
70502f071c freedreno/registers: document 422_UNORM and 420_UNORM formats
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4590>
2020-05-20 13:22:12 +00:00
Jonathan Marek
75d7ee8029 util/format: translate 422_UNORM and 420_UNORM vulkan formats
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4590>
2020-05-20 13:22:12 +00:00
Lionel Landwerlin
d0e11231a4 intel/perf: repurpose INTEL_DEBUG=no-oaconfig
We initially used this debug option to mean "don't bother registering
the OA configuration into the kernel".

This change makes this option suppress any interaction with the
i915/perf interface. This is useful when debugging self modifying
batches with performance queries while running on the intel_mi_runner.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
2001a80d4a anv: Implement VK_KHR_performance_query
This has the same kernel requirements are VK_INTEL_performance_query

v2: Fix empty queue submit (Lionel)

v3: Fix autotool build issue (Piotr Byszewski)

v4: Fix Reset & Begin/End in same command buffer, using soft-pin &
    relocation on the same buffer won't work currently. This version
    uses a somewhat dirty trick in anv_execbuf_add_bo (Piotr Byszewski)

v5: Fix enumeration with null pointers for either pCounters or
    pCounterDescriptions (Piotr)
    Fix return condition on enumeration (Lionel)
    Set counter uuid using sha1 hashes (Lionel)

v6: Fix counters scope, should be COMMAND_KHR not COMMAND_BUFFER_KHR (Lionel)

v7: Rebase (Lionel)

v8: Rework checking for loaded queries (Lionel)

v9: Use new i915-perf interface

v10: Use anv_multialloc (Jason)

v11: Implement perf query passes using self modifying batches (Lionel)
     Limit support to softpin/gen8

v12: Remove spurious changes (Jason)

v13: Drop relocs (Jason)

v14: Avoid overwritting .sType in
     VkPerformanceCounterKHR/VkPerformanceCounterDescriptionKHR (Lionel)

v15: Don't copy the entire
     VkPerformanceCounterKHR/VkPerformanceCounterDescriptionKHR (Jason)
     Reuse anv_batch rather than custom packing (Jason)

v16: Fix missing MI_BB_END in reconfiguration batch
     Only report the extension with kernel support (perf_version >= 3)

v17: Some cleanup of unused stuff

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
ceb822f9e0 intel/perf: reuse offset specified in the query
The current code relies on the order of the function
gen_perf_query_result_accumulate() to match the descriptions written
by gen_perf.py. Let's just reuse the offset specified in the python
script.

v2: Use accumlator offsets more (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
63c193e921 anv: use a query filled by the perf code
We're about to use the offset fields from the query object. We can't
just use a made up object.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
93924ab091 intel/perf: report whether the platform supported
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
fe8e8e5099 intel/perf: add counter category to generated code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
c36933e081 intel/perf: add helper to compute metrics from counters
The produced array tells use what metric to enable for a given pass.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
a7890f559b intel/perf: emit counter units in generated code
We'll use this coming extension.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
d15369332f intel/perf: compute number of passes for a set of counters
We want to compute the number of passes required to gather performance
data about a set of counters.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
3f0c4c2afe intel/perf: create a unique list of counters
For a future extension we want to be able to list the counters. Our
existing sets counters might contain the same counters multiple times.
This is a side effect of the fixed OA counters in the HW. We track
thoses with a mask so that we know when a counter is available from
multiple metrics.

v2: Use BITFIELD64_BIT() (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
65d242ff5e intel/perf: update generated code to ralloc all data
Previously counter descriptions as well register values were written
in global static variables. This isn't really thread safe so instead
ralloc all the data back under the gen_perf_config object.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
a683e7f3dc intel/perf: store the appropriate OA formats in queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
8b8eaa84a3 intel/perf: make pipeline statistic query loading optional
On Vulkan most of those are already covered by standard queries so
add the ability to skip them.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
cc13bfbd05 intel/genxml: add PIPE_CONTROL command cache invalidate bit
This new bit invalidates the cache/prefetch of commands in the command
streamer. This will be useful for self modifying batches.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
34a0ce58c7 anv: add a new execution mode for secondary command buffers
This change adds a call/return execution mode for secondary command
buffer rather than the existing copy into the primary batch mode.

v2: Rework convention to avoid burning an ALU register (Jason)

v3: Use anv_address_add() (Jason)

v4: Move command emissions to anv_batch_chain.c (Jason)

v5: Also move last MI_BBS emission in secondary command buffer to
    anv_batch_chain.c (Jason)

v6: Fix end secondary command buffer end (Jason)

v7: Refactor anv_batch_address() to remove additional emit functions

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
a96d92a689 anv: don't reserve a particular register for draw count
By using the same mi_builder throughout the draw call, we can just
allocate a register from the mi_builder and unref it when we're done.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
796fccce63 intel/mi-builder: add framework for self modifying batches
v2: Use Jason's idea to store addresses to modify

v3: Add ALU flushes (Jason)

v4: Remove ALU flush from gen_mi_self_mod_barrier() (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v2)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Lionel Landwerlin
570bd760d3 intel/genxml: fix bits generation for MI_LOAD_REGISTER_IMM
This instruction has a group with the same name than another field above :

  <field name="Data DWord" start="64" end="95" type="uint"/>
  <group count="0" start="96" size="64">
    <field name="Register Offset" start="2" end="22" type="offset"/>
    <field name="Data DWord" start="32" end="63" type="uint"/>
  </group>

The script was replacing the offset of the field first with the second
one in the group.

This change ignore anything a group within an instruction.

v2: Drop unused variable (Rafael)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:26 +03:00
Denys
ee9b17fc26 gitlab: Ask about reproduction rate in the issue template
Reviewed-by: <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5055>
2020-05-20 10:20:00 +00:00
Jason Ekstrand
989619c05b nir: Add const to nir_intrinsic_src_components
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5108>
2020-05-19 20:45:55 +00:00
Alyssa Rosenzweig
29afa88941 pan/mdg: Apply outmods
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:28 +00:00
Alyssa Rosenzweig
db7b0eb911 pan/mdg: Use helpers for branch/discard inversion
Doesn't come up on glmark but would covered by the old passes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:28 +00:00
Alyssa Rosenzweig
5500b1f280 pan/mdg: Remove invert optimizations
Unused since last commit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:28 +00:00
Alyssa Rosenzweig
449e5ded93 pan/mdg: Treat inot as a modifier
With this, we may remove all invert passes and simply look at the src
modifier on NIR->MIR and fixup at pack time. No shader-db changes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:28 +00:00
Alyssa Rosenzweig
b124f5315c pan/mdg: Apply abs/neg modifiers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:27 +00:00
Alyssa Rosenzweig
24e2e24dc0 pan/mdg: Ingest fsat_signed/fclamp_pos
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:27 +00:00
Alyssa Rosenzweig
22bb5a9acb pan/mdg: Prepare for modifier helpers
We have to restructure to ensure NIR->MIR does not mutate the NIR and to
allow passing around dest/outmods for the new helpers. If NIR->MIR were
better designed this would be easier. Sigh.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:27 +00:00
Alyssa Rosenzweig
f0455de6fc pan/mdg: Drop nir_lower_to_source_mods
shader-db regressions fixed shortly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:27 +00:00
Alyssa Rosenzweig
acc5afb0af pan/mdg: Remove .pos propagation pass
Will be replaced later in the series. shader-db regressions but those
fixed momentarily.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:27 +00:00
Alyssa Rosenzweig
aeb55180ff panfrost: Add modifier detection helpers
With the goal of removing modifiers from NIR, these helpers let us
detect modifier patterns without mutating the underlying NIR. These were
intended for upstream, but due to various issues are being (temporarily)
vendored.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:27 +00:00
Alyssa Rosenzweig
c2b0f3c17d nir: Add fclamp_pos opcode
Corresponds to the .pos modifier on all Mali GPUs (lima and panfrost).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:27 +00:00
Alyssa Rosenzweig
0aedce417a nir: Add fsat_signed opcode
Exists on later Mali. Equivalent to clamp(x, -1.0, 1.0)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5102>
2020-05-19 20:21:27 +00:00
Connor Abbott
518909290b tu: Support VK_FORMAT_FEATURE_BLIT_SRC_BIT for texture-only formats
It turns out this is required for compressed formats, and we might as
well enable it for the one other texture-only format too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5098>
2020-05-19 19:55:11 +00:00
Connor Abbott
74f1c304e8 tu: Fix buffer compressed pitch calculation with unaligned sizes
We can just set the extent and not bufferRowLength/bufferImageHeight,
and the extent may not be a multiple of the block size if it covers the
entire image. In this case we have to first divide to get the
width/height in terms of blocks, and then multiply by the block size to
get the buffer's pitch and layer size. Multiplying and dividing instead
won't get the correct result when the extent covers the entire image and
isn't a multiple of the block size. This also makes the code easier to
follow because we don't calculate a pitch in non-sensical units (bytes
times the block width) as an intermediate step.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5098>
2020-05-19 19:55:11 +00:00
Connor Abbott
da68c72715 tu: Fall back to 3d blit path for BC1_RGB_* formats
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5098>
2020-05-19 19:55:11 +00:00
Connor Abbott
3d5cc5ff22 tu: Always initialize image_view fields for blit sources
Previously we only supported BLIT_SRC_BIT and BLIT_DEST_BIT together, so
we didn't have to worry about initializing blit-related fields for
texture-only formats, but it turns out that 2d blits work out just fine
with these formats and we'll need to enable BLIT_SRC_BIT for
texture-only formats due to a Vulkan requirement on compressed formats.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5098>
2020-05-19 19:55:11 +00:00
Jason Ekstrand
cc4a02d0ed nir: Add a store_reg helper and use the builder in phis_to_regs
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5094>
2020-05-19 19:31:26 +00:00
Jason Ekstrand
3fdbeb70e1 nir: Add a new helper for iterating phi sources leaving a block
This takes the same callback as nir_foreach_src except it walks all phi
sources which leave a given block.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5094>
2020-05-19 19:31:26 +00:00
Jason Ekstrand
2c8c5cc87d nir/clone: Re-use clone_alu for nir_alu_instr_clone
All it takes are a couple small tweaks to the clone infrastructure to
allow us to use it without any remap table at all.  This reduces code
duplication and the chances for bugs that come with it.  In particular,
the hand-rolled nir_alu_instr_clone didn't preserve no_[un]signed_wrap,
or source/destination modifiers.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5094>
2020-05-19 19:31:26 +00:00
Bas Nieuwenhuizen
4c62dbb145 radv/winsys: Finish mapping for sparse residency.
This adds the part that disables pagefaults when unbacked sparse
textures get accessed.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5079>
2020-05-19 19:17:35 +00:00
Ian Romanick
fec36c0668 intel/drm-shim: Return correct values for I915_PARAM_HAS_ALIASING_PPGTT
It sure looks like it should be a Boolean value, but it's not.  The
values that we really want for later platforms are either 2 or 3.  The
old intel_stub.c in shader-db just always returns 3
(I915_GEM_PPGTT_FULL).  This returns the same set of values per platform
that kernel 5.6.13 would.

When using the shim for ICL with i965 driver, this fixes:

    i965 requires softpin (Kernel 4.5) on Gen10+.

Fixes: 0f4f1d70bf ("intel: add stub_gpu tool")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5061>
2020-05-19 18:55:29 +00:00
Ian Romanick
c8635b6fd3 intel/drm-shim: Add noop ioctl handler for set_tiling
When using the shim for HSW and earlier, this fixes:

    DRM_SHIM: unhandled driver DRM ioctl 33 (0xc0106461)

Fixes: 0f4f1d70bf ("intel: add stub_gpu tool")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5061>
2020-05-19 18:55:29 +00:00
Bas Nieuwenhuizen
f8314291b3 radv: Expose VK_EXT_pipeline_creation_cache_control.
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2972
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5072>
2020-05-19 18:40:04 +00:00
Bas Nieuwenhuizen
32e9283145 radv: Support VK_PIPELINE_CACHE_CREATE_EXTERNALLY_SYNCHRONIZED_BIT_EXT.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5072>
2020-05-19 18:40:04 +00:00
Bas Nieuwenhuizen
e11f077bb2 radv: Support VK_PIPELINE_CREATE_EARLY_RETURN_ON_FAILURE_BIT_EXT.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5072>
2020-05-19 18:40:04 +00:00
Bas Nieuwenhuizen
dde998685e radv: Support VK_PIPELINE_COMPILE_REQUIRED_EXT.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5072>
2020-05-19 18:40:04 +00:00
Alyssa Rosenzweig
46624f277e panfrost: Enable AFBC for Z24X8
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5069>
2020-05-19 18:09:26 +00:00
Alyssa Rosenzweig
82792ef19f panfrost: Fix Z24 vs Z32 mixup
We don't actually support Z32_UNORM; the format we've been using as such
is in fact Z24X8 / Z24S8. Fix that and drop Z32_UNORM.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5069>
2020-05-19 18:09:26 +00:00
Alyssa Rosenzweig
861e7dcae6 panfrost: Switch formats to table
Rather than heuristically guessing what PIPE formats correspond to what
in the hardware, hardcode a table. This is more verbose, but a lot more
obvious -- the previous format support code was a source of endless
silent bugs.

v2: Don't report RGB233 (icecream95). Allow RGB5 for texturing
(icecream95).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5069>
2020-05-19 18:09:26 +00:00
Alyssa Rosenzweig
6be9e09473 pan/mfbd: Add format codes for PIPE_FORMAT_B5G5R5A1_UNORM
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5069>
2020-05-19 18:09:26 +00:00
Rhys Perry
aca15d5cba nir/opt_if: use nir_src_as_bool in opt_peel_loop_initial_if helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4757>
2020-05-19 17:46:38 +00:00
Rhys Perry
50bead32b1 nir/opt_if: run opt_peel_loop_initial_if after all other optimizations
Fixes dEQP-VK.graphicsfuzz.loops-ifs-continues-call with RADV.

opt_if_loop_terminator can cause this optimization or
opt_if_simplification to be run on the non-SSA code.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 52c8bc0130 ('nir: make opt_if_loop_terminator() less strict')
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2943
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4757>
2020-05-19 17:46:38 +00:00
Jason Ekstrand
d221f70299 nir: Add documentation for each jump instruction type
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5101>
2020-05-19 17:21:23 +00:00
Jason Ekstrand
d011fbde5c nir: Use a switch statement in nir_handle_add_jump
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5101>
2020-05-19 17:21:23 +00:00
Jason Ekstrand
8c87082c94 nir: Validate jump instructions as an instruction type
This has the downside of putting block successor validation in two
places that are a bit further apart.  However, handling them as a
special case makes the code more confusing than needed.  At least two
different people have not noticed that we don't have jump instruction
validation in the last week or two and added it.  Being able to search
for validate_jump_instr is useful.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5101>
2020-05-19 17:21:23 +00:00
Samuel Pitoiset
0fb3dc8d10 radv/aco: enable storageInputOutput16 on GFX9+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
cc1a1da8ab aco: fix off-by-one error with 16-bit MTBUF opcodes on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
1647e098e9 aco: implement 16-bit interp
For 16-bit bank LDS (ie. Kabini/Stoney) we need a slightly different
path. It's completely untested though because I don't have these
chips but according to vkpipeline-db the generated assembly seems fine.

Note that 16-bit I/O is currently only exposed on GFX9+ for both
compiler backends.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
bbbb4057e6 aco: emit v_interp_*_f16 instructions as VOP3 instead of VINTRP
This adds a separate emission path in the assembly for the 16-bit
interp instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
34f2c4dc6a aco: validate v_interp_*_f16 as VOP3 instructions instead of VINTRP
16-bit interp instructions are considered VINTRP by the compiler
but they are emitted as VOP3 by the assembler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
3fba5bb9cc aco: implement 16-bit vertex fetches with tbuffer_load_format_d16_*
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
7ffd394605 aco: implement 8-bit/16-bit mov's with p_create_vector
ACO doesn't lower 8-bit/16-bit mov's in NIR.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2997
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
860b4d16f4 aco: allow to load/store 16-bit values in VMEM for tess and geom
We only have to adjust some assertions to allow storing/loading
16-bit values.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
9bd3b67163 aco: convert 16-bit values before exporting MRTs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
462a5fe6f4 aco: store 16-bit temporary outputs as v2b
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Emmanuel Gil Peyrot
a3fb064e00 Expose EGL_KHR_platform_* when EXT is supported
On EGL 1.4, one had to check for the existence of EGL_EXT_platform_base
before querying the eglGetPlatformDisplayEXT() and
eglCreatePlatformWindowSurfaceEXT() symbols, to then use them if the
EGL_EXT_platform_* extension for the given platform was exposed.

Since EGL 1.5, the platform functionality was made core, which means we
can obtain the symbols unconditionally, but we can't know the EGL
version before having created a display, at which point we've already
done a platform selection by passing an EGLNativeDisplay.  The
EGL_KHR_platform_* extensions thus are used by clients to know whether
it's safe or not to dlsym() the EGL 1.5 symbols.

This commit adds those extensions when the given platform is enabled.

Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5052>
2020-05-19 16:41:54 +00:00
Alyssa Rosenzweig
52d6b4d6c0 pan/decode: Fix min/max_tile_coord mixup
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5099>
2020-05-19 16:24:49 +00:00
Alyssa Rosenzweig
deb78eec1b pan/decode: Use a page table for tracking mmaps
We create a hash table mapping GPU va's to mmap structures, such that
searching for a mapped address is effectively O(1) rather than O(N) to
the number of mapped entries as with the previous linked list approach.
This is a memory-time tradeoff, but the speed-up is tracing is notable.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5099>
2020-05-19 16:24:49 +00:00
Rob Clark
3c355f1ae8 freedreno/ir3/validate: add checking for types and opcodes
For cases where instructions have a src and/or dst type, validate that
it matches the src/dst register types.  And for cases where there are
different opcodes for half vs full, validate that the opcode matches.

Now that we maintain this properly throughout the stages of the ir, we
can drop the fixups from the RA pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
f484d63617 freedreno/ir3: add helpers to deal with src/dst types
Add some helpers to properly maintain src/dst types, and in the cases
where opcode depends on src or dst type, maintain that as well.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
3561d34fff freedreno/ir3: add simple validate pass
We can add to this as we notice other things that are worth validating
between ir3 passes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
554f3d54ca freedreno/ir3: fix mismatched wrmask for overlapping VS inputs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
16cd232dbc freedreno/ir3/cp: fix cmps folding
When we start doing cp iteratively, we hit the case that we've already
`cmps.s.*` into a `cmps.s.ne p0.x, ...`..  when we try to do that again
we can invert the logic condition.  So check specifically the condition
to prevent this.

TODO we could maybe be more clever about this to combine conditions.
But why isn't that happening in nir?  For example, see
dEQP-GLES31.functional.ssbo.layout.single_basic_array.packed.bool

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
39de27d3b9 freedreno/ir3/print: print cat2 condition
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
7b86b5ed7d freedreno/ir3: fix immed type in create_addr0()
We can also remove a bunch of manual src/dst flag munging, since the
instruction builders handle this automatically now.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
3474ba53b5 freedreno/ir3/cf: handle multiple cov's properly
There can be multiple (for ex.) f32f16's from a single source, in
particular appearing in different blocks.  We need to update all uses
of the src which had conversion folded in, not all the uses of the
individual cov.  Also, to avoid invalidating the ssa use info that was
gathered at the beginning of the pass, don't actually eliminate the
cov, but instead change it to a simple mov that the cp pass can gobble
up.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
3db5d146e9 freedreno/ir3: fix mismatched flags on split
We have to fixup the meta:split half flag, because `ir3_split_dest()` is
called before we fixup the dest type.  But we should fixup both the
split src and dest, as well as the thing it is splitting.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
b24b6a8365 freedreno/ir3/group: fix for half-regs
If we're inserting a mov to resolve a conflict between meta:collect's
(ie. for .zyx type swizzles, etc), we should use the correct precision.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
fcfe5eff63 freedreno/ir3: make input/output iterators declare cursor ptr
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
c1d33eed41 freedreno/ir3: make foreach_ssa_src declar cursor ptr
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
65f604e3b3 freedreno/ir3: make foreach_src declare cursor ptr
To match how the newer iterators work.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
599fd861d4 freedreno/ir3: be iterative
It does pick up a few more cf/cp opportunities, according to sharder-db.
But don't think it will be measurable.

But this will allow some future simplification to cp by pulling out it's
internal iteration.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
b828929ac9 freedreno/ir3: move where we preserve binning pass inputs
For a6xx, since we use same VBO state for binning and VS, we need to
preserve potentially unused inputs.  This needs to be done before DCE.
So move it before we add earlier DCE passes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
d0cfc06a2c freedreno/ir3: add IR3_PASS() macro
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
c9e5605720 freedreno/ir3/postsched: report progress
Or do the easy thing and claim we always changed something.  It is kinda
hard and not worth the effort to determine for real.

Also rip out unused error handling.  This pass should never fail.  And
we weren't even actually checking the return.

And while we're at it, switch over to taking the 'struct ir3 ir*`
instead of ctx, to standardize with the other passes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
c953794cd6 freedreno/ir3/legalize: report progress
It always does something.  Just return true for IR3_PASS()

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
c3630c9d29 freedreno/ir3/group: report progress
Not iterative, but this will let IR3_PASS() macro know if there are any
changes to print.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
721147a05d freedreno/ir3/deps: report progress
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
e4ecfde2dd freedreno/ir3/cp: report progress
Later when we do this pass iteratively, we can drop some of the internal
iteration and just rely on this pass getting run until there is no more
progress.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
372e466301 freedreno/cf: report progress
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
b6d121502d freedreno/ir3/dce: report progress
Eventually we'll pull the iteration out of the pass itself, but the
first step is to just report progress.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
9beb2baaff freedreno/ir3: juggle around ir3_debug_print()
In a later patch, this will get folded into an IR3_PASS() macro, at
least for most passes.  But to do that, it is better to standardize
on printing the ir3 after the pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
947aa23eff freedreno/ir3: remove Sethi-Ullman numbering pass
We haven't used this for a while.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Samuel Pitoiset
0ceb56a531 radv: fix missing break in radv_GetPhysicalDeviceProperties2()
Fixes: 57e796a12a ("radv: Implement VK_EXT_custom_border_color")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5097>
2020-05-19 15:51:14 +00:00
Rhys Perry
bcb0038c83 aco: fix disassembly with LLVM 11
SymbolInfoTy was modified in LLVM 11. It is also in MCDisassembler.h now
and we don't have to duplicate it anymore.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5060>
2020-05-19 14:18:26 +01:00
Gert Wollny
ff98b1b51a r600/sfn: Fix printing ALU op without dest
e.g. GROUP_BARRIER doesn't have a dest.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:14 +00:00
Gert Wollny
1124c3f1b6 r600/sfn: Don't reorder outputs by location
This was wrong, if anything it should be sorted by device_location, and NIR usually
provides this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:14 +00:00
Gert Wollny
9f942a8e7c r600/sfn: Fix splitting constants that come from different kcache banks.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:14 +00:00
Gert Wollny
723ae8177e r600/sfn: Fix clip vertex output as possible stream variable
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
7ae4b7938e r600/sfn: SSBO: Fix query of dest components
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
7c247f505c r600/sfn: use the per shader atomic base
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
cd2d7966ac r600/sfn: Add support for texture_samples
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
358b0a57bf r600/sfn: support indirect sampler buffer reads.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
2f3ce9b1d0 r600/sfn: assert when alu dest is missing
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
fd99a7737f r600/sfn: remove pointless check
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
ff92345a19 r600/sfn: Don't reject VARYING_SLOT_PCNT
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
15d6d35420 r600/sfn: Add FS output sample_mask
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
91a618eae9 r600/sfn: Handle loading sample_pos
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
70b84920be r600/sfn: Take FOGC, and backcolors into account im GS outputs
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
d777c04095 r600/sfn: Add support for viewport index output
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
607d7fb587 r600/sfn: Make 3vec loads skip possible moves
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
ac2c3fb010 r600/sfn: Fix handling of output register index
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
9db5536643 r600/sfn: Make allocate_reserved_registers forward to a virtual function
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
041df79496 r600/sfn: Fix RAT instruction assembly emission
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
8977946aa2 r600/sfn: Fix GDS assembly emission
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
b6eb19dd63 r600/sfn: Fix RING instruction assembly emission
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
e475eae0fe r600/sfn: Fix memring print output
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
13bb0a9701 r600/sfn: skip copying LOD if the target register is is the same
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
19673ce47d r600/sfn: re-use an allocated register in lookup
For texture coordinates we always allocate all four components so that
we can use these for LOD and, compare etc.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
dfb0ba8272 r600/sfn: Skip move instructions if they are only ssa and without modifiers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
aed9618e20 r600/sfn: rework getting a vector and uniforms from the value pool
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
afd47ea83b r600/sfn: Handle CF index loading from non-X channel
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
54c3d4bd24 r600: Add support for loading index register from other than chan X
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
3baad03616 r600: Lower lerp after tgsi_to_nir
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
b689de3444 r600: Lower int64 ops from TGSI-to-NIR shaders too
r600 uses a TGSI shaders with 64 bit ints for a query compute shader.

v2: Use screen version of tgsi_to_nir and fix compile error

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
32305c0959 r600/sfn: Fix printing vertex fetch instruction flags
Fixes: f718ac6268
    r600/sfn: Add a basic nir shader backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
65d8c692bd r600/sfn: Unify semantic name and index query and use TEXCOORD semantic
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Michel Dänzer
667126cc82 Revert "gallium/gallivm: fix compilation issues with llvm 11"
This reverts commit e2a7436dd1.

The corresponding LLVM changes were reverted.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2983

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5087>
2020-05-19 07:19:35 +00:00
Michel Dänzer
2a6811f0f9 Revert "ac,radeonsi: fix compilations issues with LLVM 11"
This reverts commit 42b1696ef6.

The corresponding LLVM changes were reverted.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5087>
2020-05-19 07:19:35 +00:00
Caio Marcelo de Oliveira Filho
c4544f4716 nir: Consider atomic counter intrinsics when setting writes_memory
In i965 these get lowered after gather info, so let's consider them
too.  Fixes

    piglit.spec.arb_framebuffer_no_attachments.arb_framebuffer_no_attachments-atomic

in Gen9, HSW and IVB.

Fixes: 6a6c36e977 ("intel/fs: Use writes_memory from shader_info")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5093>
2020-05-18 19:06:53 -07:00
Dave Airlie
ee90339cfb llvmpipe: add gl_SampleMaskIn support.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
2020-05-19 10:26:46 +10:00
Dave Airlie
310823eccd gallivm/nir: add sample_mask_in support
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
2020-05-19 10:26:46 +10:00
Dave Airlie
0dac24790e llvmpipe/fs: hook up the interpolation APIs.
This hooks the nir code to the interp code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
2020-05-19 10:26:46 +10:00
Dave Airlie
3f71a5e25f llvmpipe: add interp instruction support
This allows interpolating an attribute at offset/sample/centroid
locations.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
2020-05-19 10:26:46 +10:00
Dave Airlie
06c10fa3a5 llvmpipe/interp: refactor out centroid calculations
These will be reused in the interp instruction code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
2020-05-19 10:26:46 +10:00
Dave Airlie
c1f5a23a4d llvmpipe/interp: refactor out use of pixel center offset
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
2020-05-19 10:26:46 +10:00
Dave Airlie
ae5f6ddc05 gallivm/nir: add an interpolation interface.
This supports interpolating at a certain location, offsets,
sample or centroid.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
2020-05-19 10:26:46 +10:00
Dave Airlie
53fcb30c12 llvmpipe: remove non-simple interpolation paths.
These are broken since adding multisample, and unused for
quite a while.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
2020-05-19 10:26:46 +10:00
Dave Airlie
6b7e03175d llvmpipe/interp: fix interpolating frag pos for sample shading
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
2020-05-19 10:26:46 +10:00
Dave Airlie
c9690b7471 llvmpipe: use per-sample position not sample id for interp
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
2020-05-19 10:26:46 +10:00
Dave Airlie
5098764483 llvmpipe: don't use sample mask with 0 samples
piglit:
spec/arb_sample_shading/builtin-gl-sample-mask 0
spec/arb_sample_shading/builtin-gl-sample-mask-simple 0
CTS:
KHR-GL45.sample_variables.mask.rgba8.samples_0.mask_zero

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
2020-05-19 10:26:46 +10:00
Dave Airlie
b11aa12253 r600/sfn: add emit if start cayman support
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5084>
2020-05-18 21:56:29 +00:00
Dave Airlie
4746796b82 r600/sfn: add callstack non-evergreen support
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5084>
2020-05-18 21:56:29 +00:00
Dave Airlie
19273fb227 r600/sfn: cayman fix int trans op2
Fix integer multiplies

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5084>
2020-05-18 21:56:29 +00:00
Dave Airlie
38560e0d1d r600/sfn: fix cayman float instruction emission.
This is enough to get glxgears working.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5084>
2020-05-18 21:56:29 +00:00
Dave Airlie
ff9c95421a r600/sfn: plumb the chip class into the instruction emission
In order to emit the correct instruction sequences for cayman
we need this info.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5084>
2020-05-18 21:56:29 +00:00
Jason Ekstrand
164aed6c81 anv:gpu_memcpy: Emit 3DSTATE_VF_INDEXING on Gen8+
If this gets run right after something which uses
VK_VERTEX_INPUT_RATE_INSTANCE on its first vertex binding, we could end
up in serious trouble.

Fixes: 3d9747780b "anv: Add a helper for doing buffer copies with..."

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5090>
2020-05-18 21:42:05 +00:00
Caio Marcelo de Oliveira Filho
6a6c36e977 intel/fs: Use writes_memory from shader_info
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4815>
2020-05-18 21:09:17 +00:00
Caio Marcelo de Oliveira Filho
d89c28d314 nir: Use deref intrinsics to set writes_memory when gathering info
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4815>
2020-05-18 21:09:17 +00:00
Dave Airlie
d50069ab08 r600: enable TEXCOORD semantic for TGSI.
This should make intergrating with NIR easier

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5083>
2020-05-18 20:01:25 +00:00
Eric Anholt
68b3b5bcab ci: Switch the baremetal runner to be an x86 docker image.
The runner is an x86 system, so running the ARM image meant doing
everything at runtime under qemu, and for the xz of the test rootfs that
was quite expensive.  Also, we can rebuild x86 images much faster than we
can rebuild arm images for container development, which will help unblock
some of the other feature parity work I have to do versus the old docker
system that cheza is using.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5033>
2020-05-18 19:39:46 +00:00
Eric Anholt
8094a9ab68 ci: Update versions of packages to remove from rootfses.
testing's versions have updated, and the apt one was pretty big in the
stripped rootfs.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5033>
2020-05-18 19:39:46 +00:00
Eric Anholt
18fc6a95b6 ci: Make the create-rootfs more resilient.
If the file doesn't exist, fine.  We didn't happen to get that package
dragged in.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5033>
2020-05-18 19:39:46 +00:00
Eric Anholt
588ea3184c ci: Make cmake toolchain file for deqp cross build setup.
This adds a few more variables that we found we needed for x86-to-arm dEQP
cross builds.  Also note that we're now fixed to use ccache in the dEQP
builds.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5033>
2020-05-18 19:39:46 +00:00
Eric Anholt
a65521145c ci: Autodetect whether we need cross setup in lava_arm builds.
The x86 baremetal build would have an armhf cross file, and need the
kernel env setup.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5033>
2020-05-18 19:39:46 +00:00
Eric Anholt
188916bd06 ci: Move cross file generation to a shared script.
We're going to do this in another container soon, and it would also be
nice to consolidate cmake cross setup.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5033>
2020-05-18 19:39:46 +00:00
Chris Wilson
34195d69dd iris: Initialise stub iris_seqno to 0
We create a stub never-signaled seqno to force the iris_fence to use the
fence fd, but we need to fully initialise the iris_seqno struct so that
the unset pointers are NULL and we do not try to destroy them later.

  ==38644== Conditional jump or move depends on uninitialised value(s)
  ==38644==    at 0xF7FBFAA: pipe_resource_reference (u_inlines.h:142)
  ==38644==    by 0xF7FC22F: iris_seqno_destroy (iris_seqno.c:38)
  ==38644==    by 0xF7E8930: iris_seqno_reference (iris_seqno.h:89)
  ==38644==    by 0xF7E8BC3: iris_fence_destroy (iris_fence.c:131)
  ==38644==    by 0xF7E8C41: iris_fence_reference (iris_fence.c:143)
  ==38644==    by 0xEF24525: dri2_destroy_fence (dri_helpers.c:176)
  ==38644==    by 0x4865DC2: dri2_egl_unref_sync (egl_dri2.c:3302)
  ==38644==    by 0x48661E8: dri2_destroy_sync (egl_dri2.c:3433)
  ==38644==    by 0x4855BA4: _eglDestroySync (eglapi.c:1952)
  ==38644==    by 0x4855CF5: eglDestroySyncKHR (eglapi.c:1972)
  ==38644==    by 0x402628: test_cleanup (egl_khr_fence_sync.c:232)
  ==38644==    by 0x40421E: test_eglCreateSyncKHR_native_from_fd (egl_khr_fence_sync.c:1521)

Closes: #2909
Fixes: fd1907efb3 ("iris: Convert fences to using lightweight seqno")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5004>
2020-05-18 19:22:12 +00:00
Rob Clark
a6184eae31 freedreno/drm: handle ancient kernels
Older kernels did not support `MSM_INFO_GET_IOVA`.  But this is only
required for (a) clover (ie. `fd_set_global_binding()`) and drm paths
that are limited to newer kernels.  So move the location of the assert
to fix new userspace on old kernels.

Fixes: c9e8df61dc ("freedreno: Initialize the bo's iova at creation time.")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5081>
2020-05-18 19:00:47 +00:00
Rob Clark
106c2a65db freedreno/drm: don't pass thru 'DUMP' flag on older kernels
"softpin" mode was introduced in the same kernel as the 'DUMP' flag.  So
if we are using the legacy non-softpin path, clear the dump flag.  OTOH
the 'DUMP' flag isn't quite so needed on older kernels, since we would
get all cmdstream, even SDS stateobjs, dumped regardless, as they would
have cmd table entries.

Fixes: b2c23b1e48 ("freedreno: Mark all ringbuffer BOs as to be dumped on crash.")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5081>
2020-05-18 19:00:47 +00:00
Ilia Mirkin
e422f61e6e freedreno/a3xx: fix rasterizer discard
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5080>
2020-05-18 18:34:04 +00:00
Rob Clark
5e10506834 freedreno/fdperf: add dependency on generated headers
To fix an issue reported here:
https://bugs.chromium.org/p/chromium/issues/detail?id=1083815

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5088>
2020-05-18 17:53:45 +00:00
Pablo Saavedra
4504d6374d ci: Fix TypoError error when traces in traces.yml is an empty list
v2: Python's nitpick (Andres)

In case of an empty list of traces, the results.yml will contain an empty
curly braces. In YAML, an associative array can also be specified by text
enclosed in curly braces ({}),

This commit also adds the corresponding test to check the behavior of
tracie when no traces are added in the traces.yml file.

Signed-off-by: Pablo Saavedra <psaavedra@igalia.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4916>
2020-05-18 17:27:42 +00:00
Pablo Saavedra
e85dc9a240 ci: Split test_tracie_skips_traces_without_checksum in separate cases
test_tracie_skips_traces_without_checksum does the logic previous to
the commit 8546d1dd78. The traces.yml includes
several traces, only the one without checksum is ignored by tracie.

As a complementary action, this change adds an new test
(test_tracie_only_traces_without_checksum) to verify the behavior for
cases where the traces.yml only contains traces without checksum.

Finally, test_tracie_skips_traces_without_checksum is renamed as
test_tracie_traces_with_and_without_checksum

Signed-off-by: Pablo Saavedra <psaavedra@igalia.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4916>
2020-05-18 17:27:42 +00:00
Pablo Saavedra
550a4f7764 ci: Migrate tracie tests done in shell script to pytest
v2: Verbatim translation from the original shell script
    Make the corrections visible in explicit commits (Andres)
    Remove redundant code (Alexandros)
    Code style nitpick (Rohan)

Reimplementation of the tracie's self-tests using a pythonic test suit
(pytest).

The new tracie/test.py module is almost a direct translation of the
tests defined in the tracie/test.sh. This new implementation of the
test provides a more common framework where define the tests.
Also allows a better introspection for the tests results and/or
resulting errors.

This patch also adds python3-pytest as dependency for the built images
and adapts the tracie-runner scripts to run the self-test using pytest.

Signed-off-by: Pablo Saavedra <psaavedra@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com> [v1]
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4916>
2020-05-18 17:27:42 +00:00
Pablo Saavedra
37621da7b1 ci: ArgumentParser receives the args from the main parameters
Change the main function to receive the args parameter from
sys.argv[1:]. The args parameter will be passed to the
ArgumentParser.parse_args() function as argument.

This change provides an easier  main() function signature to use
with pythonic testsuites.

Signed-off-by: Pablo Saavedra <psaavedra@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4916>
2020-05-18 17:27:42 +00:00
Pablo Saavedra
eb1f22fb01 ci: TRACES_DB_PATH and RESULTS_PATH defined as relative paths
RESULTS_PATH and RESULTS_PATH, as variables in the module context, are
resolved one single time, only during the first module loading. If the
the Python code in execution changes the current dir at some point,
those paths are not going to be updated anymore keeping the paths
wrongly pointing to the old working dir.

This change modify the definition of those variables to use simply
relative paths.

Signed-off-by: Pablo Saavedra <psaavedra@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4916>
2020-05-18 17:27:42 +00:00
Lucas Stach
78c46c2126 etnaviv: don't expose timer queries
We don't support any timer queries, so stop lying about our
ability to do so.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5086>
2020-05-18 17:03:05 +02:00
Ilia Mirkin
b5accb3ff9 freedreno/a3xx: parameterize ubo optimization
A3xx apparently has higher alignment requirements than later gens for
indirect const uploads. It also has fewer of them. Add compiler
parameters for both settings, and set accordingly for a3xx and a4xx+.
This fixes all the ubo test failures caused by this optimization.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5077>
2020-05-17 19:51:40 -04:00
Ilia Mirkin
475fb28377 freedreno: fix off-by-one in assertions checking for const sizes
Caused assertions to trip even though everything was fine. The number of
constants can be equal to length, so we need less-than-or-equal.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5077>
2020-05-17 19:51:36 -04:00
Ilia Mirkin
1c05e16666 freedreno/a3xx: fix const footprint
In commit 5d8f40a53a, the change was done incorrectly, switching from
max_const to constlen + 1. Instead it should have been constlen - 1,
which is the analog to the former max_const.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5077>
2020-05-17 19:51:10 -04:00
Ilia Mirkin
9048adbd24 freedreno/ir3: avoid applying (sat) on bary.f
This causes failures on a3xx resulting in the non-sensical dEQP failures
on packUnorm2x16. The same test uses ldlv on a4xx+, so just disallow
(sat) on bary.f on all generations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5074>
2020-05-17 21:17:57 +00:00
Ilia Mirkin
8d86892ea3 freedreno/a3xx: reinstate rgb10_a2ui texture format
Rendering doesn't work, but having the format in place avoids an assert
when selecting the texture format in st_format. I believe it's required
for GLES3, so more tracing is required to determine what bit we're
missing to make rendering work.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5073>
2020-05-17 14:39:42 -04:00
Ilia Mirkin
ff4df32fae freedreno/a3xx: there's no r8i/ui rb format, only rg8i/rg8ui
This fixes a number of dEQP tests:

  dEQP-GLES3.functional.fbo.blit.conversion.r8*
  dEQP-GLES3.texture.specification.basic_teximage2d.r8*

and others. The reason why this enum showed up in traces for R8 is that
it was an "upgraded" texture to R8G8.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5073>
2020-05-17 14:39:42 -04:00
Christopher Egert
78615dcca1 radv: use util_float_to_half_rtz
Since commit 8b8af6d398 there is a
performance regression in dirt 4 on picasso APUs.

The game ends up feeding a large value into this which overflows on the
conversion to 16bit float. With the old implementation (which now lives
in util_float_to_half_rtz) it would be clamped to inf-1, while the new
one returns inf. This causes a performance hit somehow at some point
down the line.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 8b8af6d398 "gallium/util: Switch util_float_to_half to _mesa_float_to_half()'s impl."
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5062>
2020-05-17 01:12:59 +02:00
Erico Nunes
632a921bd0 lima/ppir: optimize tex loads with single successor
These don't need a mov, and can be used directly with pipeline output.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4975>
2020-05-16 17:24:03 +02:00
Erico Nunes
a4b7699d84 lima/ppir: rework tex lowering
Move steps from lowering to emit, since they can be done earlier in a
single place, rather than in two-steps.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4975>
2020-05-16 17:24:00 +02:00
Erico Nunes
92611e21c1 lima/ppir: improve handling for successors in other blocks
ppir doesn't register successors in other blocks, and causes
ppir_node_has_single_succ to be unreliable as it might return true for
nodes with successors in other blocks.
This is bad for optimization passes that try to pipeline registers or
avoid insertion of movs, as that can generally only be done for nodes
with a single user.
As of now, ppir can't just start adding successors in other blocks as
that breaks the scheduling code.
So this patch is a little hacky but enables pipelining optimizations
during lowering. It can hopefully be removed during future scheduler
rework.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4975>
2020-05-16 17:23:58 +02:00
Erico Nunes
96c1d5f629 lima/ppir: handle failures on all ppir_emit_cf_list paths
In some paths where ppir_emit_cf_list is called, compilation errors such
as in unsupported features were not being handled, allowing compilation
to continue and fail at some random point later.
Handle them properly so compilation aborts in the expected way rather
than what may look like a compiler crash/bug.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4975>
2020-05-16 17:23:48 +02:00
Eric Engestrom
fa3549c92b util/rand_xor: extend the urandom path to all non-Windows platforms
Any system that provides `/dev/urandom` should be allowed to try to use it.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2316>
2020-05-16 12:05:37 +00:00
Eric Engestrom
d76abe98cf util/rand_xor: fallback Linux to time-based instead of fixed seed
When the caller asked for a randomised_seed, we should fall back to the
time-based seed instead of the fixed seed.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2316>
2020-05-16 12:05:37 +00:00
Eric Engestrom
e0ce684aae util/rand_xor: drop unused header
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2316>
2020-05-16 12:05:37 +00:00
Eric Engestrom
f50f26325f util/rand_xor: make it clear that {,s_}rand_xorshift128plus take *exactly 2* uint64_t
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2316>
2020-05-16 12:05:37 +00:00
Eric Engestrom
576bff5c73 gitlab-ci: exclude scripts that don't affect the build
All the other files in bin/ are not used by any build system and as such
cannot affect the build.

I've been working on maintainer tools lately and it's frustrating to have
the CI wait for 45 minutes to rebuild everything and not even read/run
the files in the MR when it could've just been merged and moved on to
the next MR 45 minutes ago.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5046>
2020-05-16 11:40:14 +00:00
Thong Thai
494b7ef0c1 gallium/auxiliary/vl: Fix compute shader scaling for non-square pixels
Calculate the scale_y parameter instead of assuming square pixels.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5057>
2020-05-16 02:17:26 +00:00
Marek Olšák
fd6a5e112a gallium/u_threaded: execute transfer_unmap with THREAD_SAFE directly
This was the original intention, but it wasn't fully implemented.

Fixes: 7f22e0fd29

Closes: #2953

Tested by: John Galt <johngalt@fake.mail>

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5030>
2020-05-15 22:26:52 +00:00
Marek Olšák
c9ccceff10 radeonsi: test uncached clear/copy buffer performance with compute shaders
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
5acf99e81f radeonsi: compute perf tests - don't test 1 wave/SA limit, test no limit first
1 wave/SA is always slow and thus not useful

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
c45a2145f5 radeonsi: disable the L2 cache for CPU read mappings of buffers
for faster copying over PCIe and no need to flush L2

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
7356144fe4 radeonsi: disable the L2 cache for most CPU mappings of textures
for faster blits over PCIe and no need to flush L2

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
36c0124804 winsys/amdgpu: add RADEON_FLAG_UNCACHED for faster blits over PCIe
Small blits benefit more. Good access pattern is required.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
cbbc18bc67 radeonsi: use display_dcc_offset for setting displayable_dcc_cb_mask
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
b5ac9d18d8 radeonsi: use vi_dcc_enabled instead of using tex->surface.dcc_offset directly
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
2c4c1b0499 radeonsi: rename SI_RESOURCE_FLAG_TRANSFER to FORCE_LINEAR
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
4907bb44c3 radeonsi: simplify setting resource usage for si_init_temp_resource_from_box
usage was set twice, once in the function, and then after the function

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
f57276309b radeonsi: tweak clear/copy_buffer limits when to use compute
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
b158b117e1 radeonsi: optimize access pattern for compute blits with linear textures
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
9f8089139f radeonsi: use correct clear value size for EQAA in expand_fmask
based on the fmask_expand_values array.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák
2361e8e722 ac/nir: honor ACCESS_STREAM_CACHE_POLICY for L1 and L0 caches too
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Joshua Ashton
d573d1d825 radeonsi: Use TRUNC_COORD on samplers
The default behaviour (0) is: "round-nearest-even to n.6 and drop fraction when point sampling" whereas the OpenGL spec simply wants us to floor it (1) "truncate when point sampling".
See 8.14.2 in the OpenGL spec:

https://www.khronos.org/registry/OpenGL/specs/gl/glspec46.core.pdf

The Direct3D spec also mandates this (https://microsoft.github.io/DirectX-Specs/d3d/archive/D3D11_3_FunctionalSpec.htm#7.18.7%20Point%20Sample%20Addressing)

On WineD3D:
This fixes some point-sampling texture precision issues in some Direct3D 9 titles such as Guild Wars 2 and htoL#NiQ: The Firefly Diary that are not present on other vendors.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3953>
2020-05-15 21:56:44 +00:00
Sagar Ghuge
65c2362e88 iris: Use modfiy disables for 3DSTATE_WM_DEPTH_STENCIL command
Add new IRIS_DIRTY_STENCIL_REF dirty flag which would help us to trigger
separate 3DSTATE_WM_DEPTH_STENCIL packet using modify disable fields.

Instead of merging two packets into one in order to build
3DSTATE_WM_DEPTH_STENCIL state, set_stencil_ref can use
IRIS_DIRTY_STENCIL_REF bit and bind_zsa_state can use
IRIS_DIRTY_WN_DEPTH_STENCIL, both could cause packet to happen with
available information using modify disable bits which allow us to
construct packet by ignoring set of fields.

v2: (Kenneth Graunke)
- Fix condition ordering.
- Club GEN cases.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3688>
2020-05-15 21:41:12 +00:00
Thong Thai
864d8acbfd radeon: Fix whitespaces
Minor adjustment to whitespace to align text since the indentation changed

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3523>
2020-05-15 21:22:39 +00:00
Marek Olšák
f80d653d70 radeonsi: don't expose 16xAA on chips with 1 RB due to an occlusion query issue
Only Stoney and Raven2 are affected.

Cc: 20.0 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5047>
2020-05-15 21:04:55 +00:00
Samuel Pitoiset
844d561c58 spirv: handle OpCopyObject correctly with any types
This implements OpCopyObject as a blind copy and propagates the
access mask properly even if the source object type isn't a SSA
value.

This fixes some recent dEQP-VK.descriptor_indexing.* failures
since CTS changed and now apply nonUniformEXT after constructing
a combined image/sampler.

Original patch is from Jason Ekstrand.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4909>
2020-05-15 19:18:53 +00:00
Lucas Stach
9d1821adf0 etnaviv: retarget transfer to render resource when necessary
If we have a separate render resource, it may contain more up-to-date
data than what is available in the base resource, so we need to retarget
the transfer to this resource. As the most likely reason for the
existence of the render resource is a multi-tiled render layout we need
to allow this transfer to go through the resolve/blit copy path, as we
can't de-/tile those layouts in software.

Fixes: b962776530 (etnaviv: rework compatible render base)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5051>
2020-05-15 20:29:10 +02:00
Rafael Antognolli
bb3545a6ee intel: Store the aperture size in devinfo.
We will later use the devinfo from iris_bufmgr, where we don't have
access to the screen pointer. And since we are moving it, we can reuse
it in Anv and i965.

v2: return error code and check for it on Anv (Lionel).
v3: Remove anv_gem_get_aperture() from anv_private.h and stubs (Lionel).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5043>
2020-05-15 16:57:04 +00:00
Axel Davy
a887ad7c84 st/nine: Handle full pSourceRect better
Some apps do set pSourceRect to the full area even if not needed.

Filtering out this case is helpful, as we currently do not handle
properly resizing (pDestRect or window size not of the size of the resource)
when pSourceRect is set. Indeed in this case pSourceRect needs to be modified
before being passed to the presentation backend.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
dbb0825570 st/nine: Ignore pDirtyRegion
We supported it, but it's not much useful.
Besides it gets more complicated to handle right when
you support resizing before display.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
1c474dde28 st/nine: Improve pDestRect handling
pSourceRect and pDestRect allows to:
A) display a crop of the backbuffer
B) display the content in a subregion (after an offset)
C) resize the content before displaying

Before this patch, only features A and B were supported.
This patch adds C, but breaks A, which current support
relied on C not being implemented.

I think C is more important than A, and A can be added later.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
ffed34113b st/nine: Retry allocations after freeing some space
Managed resources can be released whenever we need.
When we have an allocation failure, free them and retry.
Try also to flush the csmt queue in case there were some things released.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
d771e0cc60 st/nine: Increase available GPU memory
This patch caps to 4GB the limit of GPU memory accessible
only for 32bits build.
This would deserve some tests on windows, so we might change that
behaviour in the future. For example, it's possible that
GetAvailableTextureMem is capped to 4GB on 64bits build.

We cap to a bit less than 4GB, which might help
https://github.com/iXit/Mesa-3D/issues/323

In addition, increase from 80% to 95% the allocation limit above
which we fail allocating.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
4cf13691be st/nine: Add missing NULL checks
Ideally apps shouldn't make buggy calls.
Still if some do, let's avoid crashing.

Without this patch, if some calls are invalid,
for example if replaying a trace of a game needing
a lot of VRAM on a card with not much VRAM, it can
crash.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
725ebc4657 st/nine: Fix a crash if the state is not initialized
I don't remember exactly the conditions of the crash,
but I had a trace which was crashing in the gallium driver
before doing any rendering (something about viewports being not initialized).

It's not the first time we hit such a problem, so rather than investigating
that crash, I chose to just initialize every states at device creation.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
0222c550c7 st/nine: Fix uninitialized variable in BEM()
tmp was not initialized.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
5d904d2749 st/nine: Improve return error code in CheckDeviceFormat
This seems suspicious, but is better than what we currently do.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
54a7a69085 st/nine: Pass more adapter formats for CheckDepthStencilMatch
It seems CheckDepthStencilMatch should accept A8R8G8B8
as adapter format. Given the lack of clarity of the doc
relative to the difference between display format
and adapter format (== display format modulo alpha bits),
for now just accept display formats with and without alpha bits.

Fixes: https://github.com/iXit/Mesa-3D/issues/317

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
edff31c0d9 st/nine: Do not return invalidcall on getrenderstate
To be fair I don't remember why I wrote this patch,
but it seems reasonable.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
2c61b4db7d st/nine: Return error when setting invalid depth buffer
Prevents a crash with the trace of
https://github.com/iXit/wine-nine-standalone/issues/40

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Axel Davy
c0f21cbaa1 st/nine: Add checks for pure device
Some Get* functions are forbidden for pure device.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5015>
2020-05-15 15:43:57 +00:00
Erik Faye-Lund
09ac0350fd zink: implement i2b1
This shuold really have been implemented before starting to use these,
but I guess I missed them.

Fixes a crash when starting a game in Warzone 2100.

Fixes: 7f6a491eec ("zink: lower b2b to b2i")
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5053>
2020-05-15 14:40:07 +00:00
Emmanuel Gil Peyrot
4c212a1168 util/rand_xor: use getrandom() when available
This function has been added in glibc 2.25, and the related syscall in
Linux 3.17, in order to avoid requiring the /dev/urandom to exist, and
doing the open()/read()/close() dance on it.

We pass GRND_NONBLOCK so that it doesn’t block if not enough entropy has
been gathered to initialise the /dev/urandom source, and fallback to the
next source in any error case.

Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2026>
2020-05-15 13:37:20 +02:00
Erik Faye-Lund
cf2b285c55 zink: mark depth-component cube-maps as done
This worked fine all along, nothing to be done for this feature. The
piglit tests mostly pass.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5044>
2020-05-15 09:54:08 +00:00
Jason Ekstrand
ea62c23703 nir: Use 8-bit types for most info fields
This shrinks nir_intrinsics.c.o from 73K to 35K and nir_opcodes.c.o from
64K to 31K on a release build.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5045>
2020-05-15 03:49:18 +00:00
Joshua Ashton
57e796a12a radv: Implement VK_EXT_custom_border_color
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4877>
2020-05-15 01:33:10 +00:00
Bas Nieuwenhuizen
9e3c6a7ba7 radv: Provide a better error for permission issues with priorities.
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4816>
2020-05-15 03:16:29 +02:00
Eduardo Lima Mitev
e7458f19e1 freedreno/uuid: Generate meaningful device and driver UUID
Device UUID becomes SHA1('freedreno' + gpu_id).
Driver UUID becomes SHA1(mesa-version + git-head-sha1).

v2: Don't use build_id for driver UUID since it generates different
    values for vulkan and gl shared objects. (Kristian)

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4847>
2020-05-14 19:05:02 +00:00
Eduardo Lima Mitev
9623debf48 freedreno: Centralize UUID generation into new files freedreno_uuid.c/h
The new files are created under a 'common' folder under 'src/freedreno',
where shared functionality between GL and Vulkan drivers (that is not
registers, layout or compiler) will be placed.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4847>
2020-05-14 19:05:02 +00:00
Rhys Perry
cdfede7336 aco: split operations that use a swap's definition
Instead of relying it's read being entirely within the swap's definition.

No shader-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4950>
2020-05-14 18:36:33 +00:00
Connor Abbott
f293d02dc4 tu: Advertise COLOR_ATTACHMENT_BLEND_BIT for blendable formats
Whoops. After fixing dual-source blending, dEQP-VK.pipeline.blend.* all
go from skipped to pass, and fixes a bunch of
dEQP-VK.api.info.format_properties.* tests where blending is required.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5039>
2020-05-14 18:15:31 +00:00
Connor Abbott
adbdab3ee8 tu: Implement dual-src blending
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5039>
2020-05-14 18:15:31 +00:00
Connor Abbott
078aa9df8d tu: Move RENDER_COMPONENTS setting to pipeline state
This needs to be pipeline state because it can change when dual-source
blending is active.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5039>
2020-05-14 18:15:31 +00:00
Connor Abbott
2a9d12d513 ir3: Fixup dual-source blending slot
The hardware expects that where MRT0 and MRT1 would normally go are the
dual sources for MRT0, whereas GLSL has an extra "index" parameter that
indicates which source it is. Remap it when handling FS outputs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5039>
2020-05-14 18:15:31 +00:00
Connor Abbott
0e0580550e freedreno/a6xx: Document dual-src blending enable bits
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5039>
2020-05-14 18:15:31 +00:00
Karol Herbst
4aeaef99c0 Revert "nir/validate: validate the stride for deref_ptr_as_array"
This reverts commit 667e14e7bd
2020-05-14 17:36:43 +00:00
Dylan Baker
2c6599d6d6 docs: update calendar, add news item, and link releases notes for 20.0.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5041>
2020-05-14 10:14:53 -07:00
Dylan Baker
212ee624f8 docs/relnotes Add sha256 sums to 20.0.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5041>
2020-05-14 10:14:39 -07:00
Dylan Baker
e5e9a0dfd7 docs: Add release notes for 20.0.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5041>
2020-05-14 10:14:36 -07:00
Ian Romanick
ceae09da15 intel: Silence unused parameter warning in __intel_log_use_args
...in every file that includes intel_log.h.

In file included from src/intel/vulkan/anv_private.h:93,
                 from src/intel/vulkan/genX_cmd_buffer.c:27:
src/intel/common/intel_log.h: In function ‘__intel_log_use_args’:
src/intel/common/intel_log.h:75:34: warning: unused parameter ‘format’ [-Wunused-parameter]

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4994>
2020-05-14 16:47:08 +00:00
Ian Romanick
4cb2330e56 anv: Silence unused parameter warning in anv_image_get_clear_color_addr
...in every file that includes anv_private.h.

In file included from src/intel/vulkan/genX_cmd_buffer.c:27:
src/intel/vulkan/anv_private.h: In function ‘anv_image_get_clear_color_addr’:
src/intel/vulkan/anv_private.h:3690:57: warning: unused parameter ‘device’ [-Wunused-parameter]

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4994>
2020-05-14 16:47:08 +00:00
Ian Romanick
b44eb50f2d anv/tests: Silence unused parameter warnings in main
src/intel/vulkan/tests/block_pool_no_free.c: In function ‘main’:
src/intel/vulkan/tests/block_pool_no_free.c:147:14: warning: unused parameter ‘argc’ [-Wunused-parameter]
src/intel/vulkan/tests/block_pool_no_free.c:147:27: warning: unused parameter ‘argv’ [-Wunused-parameter]

src/intel/vulkan/tests/block_pool_grow_first.c: In function ‘main’:
src/intel/vulkan/tests/block_pool_grow_first.c:27:14: warning: unused parameter ‘argc’ [-Wunused-parameter]
src/intel/vulkan/tests/block_pool_grow_first.c:27:27: warning: unused parameter ‘argv’ [-Wunused-parameter]

src/intel/vulkan/tests/state_pool.c: In function ‘main’:
src/intel/vulkan/tests/state_pool.c:36:14: warning: unused parameter ‘argc’ [-Wunused-parameter]
src/intel/vulkan/tests/state_pool.c:36:27: warning: unused parameter ‘argv’ [-Wunused-parameter]

src/intel/vulkan/tests/state_pool_padding.c: In function ‘main’:
src/intel/vulkan/tests/state_pool_padding.c:27:14: warning: unused parameter ‘argc’ [-Wunused-parameter]
src/intel/vulkan/tests/state_pool_padding.c:27:27: warning: unused parameter ‘argv’ [-Wunused-parameter]

src/intel/vulkan/tests/state_pool_no_free.c: In function ‘main’:
src/intel/vulkan/tests/state_pool_no_free.c:115:14: warning: unused parameter ‘argc’ [-Wunused-parameter]
src/intel/vulkan/tests/state_pool_no_free.c:115:27: warning: unused parameter ‘argv’ [-Wunused-parameter]

src/intel/vulkan/tests/state_pool_free_list_only.c: In function ‘main’:
src/intel/vulkan/tests/state_pool_free_list_only.c:35:14: warning: unused parameter ‘argc’ [-Wunused-parameter]
src/intel/vulkan/tests/state_pool_free_list_only.c:35:27: warning: unused parameter ‘argv’ [-Wunused-parameter]

v2: Use 'int main(void)' instead.  Suggested by Jason.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4994>
2020-05-14 16:47:08 +00:00
Ian Romanick
f4638cfdad anv/tests: Don't rely on assert or changing NDEBUG in tests
This is the last part of the fix for #2903.

v2: Add test_common.h.

Fixes: f7c56475d2 ("anv/tests: compile to something sensible in release builds")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4994>
2020-05-14 16:47:08 +00:00
Daniel Schürmann
66e3c74f9c aco: fix WQM coalescing
get_reg_specified() doesn't handle special registers like SCC.
Fixes: a5fc96b533 ('aco: coalesce parallelcopies during register allocation')

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5036>
2020-05-14 16:30:19 +00:00
Jason Ekstrand
4151bddab5 anv: Fix descriptor set clean-up on BO allocation failure
This was a bit of rebase fail when writing 682c81bdfb.  We stopped
freeing descriptor sets back to the pool and started calling
vk_object_base_finish.  This commit reverts a that hunk should have
never made its way into the final patch.

Fixes: 682c81bdfb "vulkan,anv: Add a base object struct type"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5032>
2020-05-14 16:14:34 +00:00
Jason Ekstrand
3f74c6a881 anv: Call vk_object_base_finish for image views
Fixes: 682c81bdfb "vulkan,anv: Add a base object struct type"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5032>
2020-05-14 16:14:34 +00:00
Erik Faye-Lund
ed95f69dd5 zink: correct PIPE_SHADER_CAP_MAX_SHADER_IMAGES
We don't support shader-images yet, so this is premature to expose.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5024>
2020-05-14 15:58:43 +00:00
Erik Faye-Lund
50ebe5a991 zink: do not expose real value for PIPE_CAP_MAX_VIEWPORTS
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5024>
2020-05-14 15:58:43 +00:00
Ian Romanick
adc6336273 meta: Remove support for multisample blits
Since i965 no longer uses this function for blitting color buffers,
there is no driver left that will ever support multisample textures and
use _mesa_meta_BlitFramebuffer.

v2: Delete blit_state::msaa_shaders and enum blit_msaa_shader.

   text     data     bss      dec    hex  filename
12243286 1344936 1290748 14878970 e308fa  before/lib64/dri/i965_dri.so
12240398 1344936 1290748 14876082 e2fdb2  after/lib64/dri/i965_dri.so

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>
2020-05-14 15:35:43 +00:00
Ian Romanick
bb28ce7988 meta: Coalesce the GLSL and FF paths in meta_clear
text     data     bss      dec    hex  filename
12243286 1344936 1290748 14878970 e308fa  before/lib64/dri/i965_dri.so
12243286 1344936 1290748 14878970 e308fa  after/lib64/dri/i965_dri.so

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>
2020-05-14 15:35:43 +00:00
Ian Romanick
5be7785190 meta: Use same vertex coordinates for GLSL and FF clears
text     data     bss      dec    hex  filename
12243446 1344936 1290748 14879130 e3099a  before/lib64/dri/i965_dri.so
12243286 1344936 1290748 14878970 e308fa  after/lib64/dri/i965_dri.so

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>
2020-05-14 15:35:43 +00:00
Ian Romanick
e5d2fbf352 meta: Stop frobbing MatrixMode
text     data     bss      dec    hex  filename
12243510 1344936 1290748 14879194 e309da  before/lib64/dri/i965_dri.so
12243446 1344936 1290748 14879130 e3099a  after/lib64/dri/i965_dri.so

v2: Use _mesa_load_matrix to set the projection matrix instead of
frobbing dirty bits directly.  Suggested by Jason.  Clean up some
comments in the neighborhood.  Since glOrtho isn't called, there's no
point in mentioning it in the comment.  Only _mesa_load_identity_matrix
on the projection matrix when it isn't set to an ortho matrix.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>
2020-05-14 15:35:43 +00:00
Ian Romanick
29f10ede71 mesa: Add function to calculate an orthographic projection
Unlike the existing _math_matrix_ortho, the new _math_float_ortho
function just stores the calculated matrix in an array of floats.  It
does not multiply the new matrix with data already stored.

   text     data     bss      dec    hex  filename
12243486 1344936 1290748 14879170 e309c2  before/lib64/dri/i965_dri.so
12243510 1344936 1290748 14879194 e309da  after/lib64/dri/i965_dri.so

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>
2020-05-14 15:35:43 +00:00
Ian Romanick
c731f2ab63 mesa: Add matrix utility functions to load matrices
These are basically DSA versions of glLoadIdentity() and glLoadMatrix()
that are available for internal Mesa use.

   text     data     bss      dec    hex  filename
12243574 1344936 1290748 14879258 e30a1a  before/lib64/dri/i965_dri.so
12243486 1344936 1290748 14879170 e309c2  after/lib64/dri/i965_dri.so

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>
2020-05-14 15:35:43 +00:00
Ian Romanick
b5a8d0319b meta: Remove support for clearing integer buffers
Since i965 no longer uses this function for clearing color buffers,
there is no driver left that will ever support integer textures and use
_mesa_meta_glsl_Clear.

As a side note, the has_integer_textures check was rubbish anyway
because meta always smashes the API to API_OPENGL_COMPAT.

   text     data     bss      dec    hex  filename
12244406 1344936 1290748 14880090 e30d5a  before/lib64/dri/i965_dri.so
12243574 1344936 1290748 14879258 e30a1a  after/lib64/dri/i965_dri.so

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>
2020-05-14 15:35:43 +00:00
Ian Romanick
a5d2c40fb9 meta: Make _mesa_meta_setup_sampler static
text     data     bss      dec    hex  filename
12244854 1344936 1290748 14880538 e30f1a  before/lib64/dri/i965_dri.so
12244406 1344936 1290748 14880090 e30d5a  after/lib64/dri/i965_dri.so

v2: Put static on the function definition too.  Suggested by Paulo.

v3: Reformat prototype.  Suggested by Jason.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> [v2]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>
2020-05-14 15:35:43 +00:00
Ian Romanick
27c2082a42 meta: Make _mesa_meta_texture_object_from_renderbuffer static
text	    data     bss      dec    hex  filename
12244974 1344936 1290748 14880658 e30f92  before/lib64/dri/i965_dri.so
12244854 1344936 1290748 14880538 e30f1a  after/lib64/dri/i965_dri.so

v2: Put static on the function definition too.  Suggested by Paulo.

v3: Reformat prototype.  Suggested by Jason.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> [v2]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>
2020-05-14 15:35:43 +00:00
Ian Romanick
067cb2f165 i965: Assert that blorp always handles color blits
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>
2020-05-14 15:35:43 +00:00
Karol Herbst
667e14e7bd nir/validate: validate the stride for deref_ptr_as_array
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4068>
2020-05-14 15:13:13 +00:00
Karol Herbst
7afc9632a6 nir/deref: copy ptr_stride when rematerializing
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4068>
2020-05-14 15:13:13 +00:00
Jan Palus
a1b69d101a targets/opencl: fix build against LLVM>=10 with Polly support
see https://bugs.llvm.org/show_bug.cgi?id=44870

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4511>
2020-05-14 14:43:52 +00:00
Eric Anholt
b1151cd2ff freedreno: Avoid duplicate BO relocs in FD_RINGBUFFER_OBJECTs.
For the piglit drawoverhead case, 5/18 of the objects' relocs were
duplicated.  We can dedupe them at object create time (since objects are
long-lived) and avoid repeated relocation work at emit time.

nohw drawoverhead program statechange throughput 2.34082% +/- 0.645832%
(n=10).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5020>
2020-05-14 14:12:15 +00:00
Eric Anholt
a6fe0799fa freedreno: Fix resource layout dump loop.
Apparently I've never dumped a fully populated slices array, so the 0-init
always terminated the loop.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5020>
2020-05-14 14:12:15 +00:00
Erik Faye-Lund
2eb180db94 zink: disable vkCmdResolveImage when respecting render-condition
vkCmdResolveImage doesn't respect render-condition, so let's fall back
to blitter in this case instead.

Fixes: 80d7cc6f129 ("zink: enable conditional rendering if available")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5008>
2020-05-14 13:55:44 +00:00
Danylo Piliaiev
06b6c687e2 anv: Fix deadlock in anv_timelines_wait
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2945
Fixes: 34f32a6d66
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5005>
2020-05-14 13:14:57 +00:00
Michel Dänzer
c059b22707 gitlab-ci: Install g++-mingw-w64-x86-64-win32 instead of mingw-w64
mingw-w64 pulls in a lot more packages we don't need.

g++-mingw-w64-x86-64-win32 is only available in Debian testing, so get
all mingw packages from there.

Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>
2020-05-14 12:54:09 +00:00
Michel Dänzer
dcbb189bbe gitlab-ci: Move lib{drm,pciaccess}-dev cross packages out of loop
Simpler like this, since they're only needed for one cross architecture
each.

Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>
2020-05-14 12:54:09 +00:00
Michel Dänzer
da3aee9263 gitlab-ci: Install WINE from Debian testing
Instead of a third-party repository which has proved unreliable at
times.

This pulls in glibc 2.30 from testing in the x86_build image, so we need
to update the x86_test-{gl,vk} images to match.

Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>
2020-05-14 12:54:09 +00:00
Michel Dänzer
fd9b445145 gitlab-ci: Add Debian testing repository for x86_build image
We don't want LLVM 8 packages to be pulled in from testing though (it
would make installing llvm-8-dev for cross architectures a lot more
complicated), so explicitly select buster-backports for them (they were
already implicitly installed from there before, since they're not
available in buster proper).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>
2020-05-14 12:54:09 +00:00
Michel Dänzer
f2773d7067 gitlab-ci: Move down container_pre_build.sh invocation in x86_build.sh
It was in the middle of package installations.

Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>
2020-05-14 12:54:09 +00:00
Michel Dänzer
1c79ac1069 gitlab-ci: Update to current templates
Notable changes:

* No longer generate a separate *-built-by-job-* image tag, instead
  store the pipeline/job information as labels in the image.
* Clean up some package information files which were accidentally left
  before, possibly resulting in slightly smaller images.

Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>
2020-05-14 12:54:09 +00:00
Duncan Hopkins
cc472a2a7c zink. Changed sampler default name.
Changed the sampler variable name from 'sampler' to 'sampler_<num>' to stop symbol classes in the Metal MSL shaders, as 'sampler' is a keyword.
Improves human readability when debugging issues.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4211>
2020-05-14 12:24:28 +00:00
Samuel Pitoiset
b1f0233077 radv: enable shaderResourceMinLod
This feature was missing for unknown reasons.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>
2020-05-14 10:05:44 +00:00
Samuel Pitoiset
0d63a1a84d ac/llvm: add support for texturing with clamped LOD
This is a requirement for the shaderResourceMinLod feature which
allows to clamp LOD. This uses all image_sample_*_cl variants.

All dEQP-VK.glsl.texture_functions.texture*clamp.* pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>
2020-05-14 10:05:44 +00:00
Samuel Pitoiset
aaf5706aa3 aco: add support for texturing with clamped LOD
This is a requirement for the shaderResourceMinLod feature which
allows to clamp LOD. This uses all image_sample_*_cl variants.

All dEQP-VK.glsl.texture_functions.texture*clamp.* pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>
2020-05-14 10:05:44 +00:00
Samuel Pitoiset
47a769143b aco: remove useless check for nir_tex_src_bias
I think only nir_texop_txb can have a bias operand anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>
2020-05-14 10:05:44 +00:00
Daniel Stone
0f46a3191f CI: Windows: Build LLVM and llvmpipe
We will eventually need to build our own LLVM on Windows in order to
build libclc and other bits which are required for the d3d12 build, as
well as to be able to test SPIR-V/OpenCL on llvmpipe.

Start doing this now, building into the base container, and exercise
this by building llvmpipe under Windows.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4946>
2020-05-14 06:40:54 +00:00
Daniel Stone
69ffbcb162 llvmpipe: Expect increased exp precision on Windows
'Newer' versions of MSVCRT than 2013 appear to have fixed the bug around expf
precision which caused bb9e8c5090. It's not clear when this was
changed, but at least on Windows 10 machines with Visual Studio 2019,
expf behaves in line with other implementations.

As there is no clear way to test for the version of the VCRT in use,
simply mark this test as expected-pass rather than xfail.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4946>
2020-05-14 06:40:54 +00:00
Rob Clark
cf21b76383 freedreno/ir3: use lower_wrmasks pass
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2020-05-13 20:24:53 -07:00
Rob Clark
42d38ad028 nir: add pass to lower disjoint wrmask's
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2020-05-13 20:24:49 -07:00
Rob Clark
a506d49fae nir: add helper to copy const_index[]
It seems less brittle to not assume they are in the same order for src
and dst instructions.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2020-05-13 20:24:45 -07:00
Rob Clark
3d3cfea78b nir: fix indices for ir3 ssbo_atomic intrinsics
Caught by the sanity checking in nir_intrinsic_copy_const_indices()
(which is introduced by the next patch).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2020-05-13 20:24:42 -07:00
Rob Clark
ea6b404294 freedreno/ir3: use const_index accessors
Cleans up a couple spots that were still open-coding this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2020-05-13 20:24:38 -07:00
Kristian H. Kristensen
14969aab11 freedreno/ir3: Drop wrmask for ir3 local and global store intrinsics
These intrinsics are supposed to map to the underlying hardware
instructions, which don't have wrmask. We use them when we lower
store_output in the geometry pipeline and since store_output gets
lowered to temps, we always see full wrmasks there.
2020-05-13 20:24:33 -07:00
Jason Ekstrand
4627bfcd69 nir: Add some docs to the metadata types
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5028>
2020-05-14 01:57:12 +00:00
Eric Anholt
3111cee2f6 freedreno: Fix attempts to push UBO contents past the constlen on pre-a6xx.
The binning variant likely won't have any UBO load code in it, so we were
writing past constlen (and sometimes asserting about it) when loading more
than one ubo block.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5027>
2020-05-14 01:30:31 +00:00
Eric Engestrom
7336caa52d docs: update calendar for 20.1.0-rc3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5026>
2020-05-14 01:26:41 +00:00
Icecream95
0dd24b381c panfrost: Fix background showing when using discard
This fixes problems in a number of games, including SuperTuxKart,
OpenMW and RVGL.

v2: Use MALI_READS_ZS | 0x20 instead of MALI_WRITES_Z to match with
the blob. Keep using 0x400 | 0x20 when depth is disabled.

Closes: #2620
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5001>
2020-05-14 01:08:21 +00:00
Danylo Piliaiev
15dd7933bc anv: Translate relative timeout to absolute when calling anv_timelines_wait
Fixes: 34f32a6d66
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5025>
2020-05-14 00:52:37 +00:00
Jason Ekstrand
0b5288492b anv: Set MOCS in 3DSTATE_CONSTANT_* on Gen9+
While we're here, we add a nice detailed comment about why always
assuming internal is ok.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5022>
2020-05-14 00:34:47 +00:00
Jason Ekstrand
e3d8edf3e0 anv: Set 3DSTATE_VF_INSTANCING on the SVGS element
It probably doesn't matter because that buffer should have a stride of
zero.  However, it still seems like a good idea just to be safe.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5022>
2020-05-14 00:34:47 +00:00
Eric Anholt
723208988e freedreno: Drop the noubo fails list for CI, since there aren't any now.
The remaining two fails in the list are the same as for the normal CI run.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14 00:10:43 +00:00
Eric Anholt
112c65825f freedreno/a6xx: Use LDC for UBO loads.
It saves addressing math, but may cause multiple loads to be done and
bcseled due to NIR not giving us good address alignment information
currently.  I don't have any workloads I know of using non-const-uploaded
UBOs, so I don't have perf numbers for it

This makes us match the GLES blob's behavior, and turnip (other than being
bindful).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14 00:10:43 +00:00
Eric Anholt
ab93a631b4 freedreno: Trim num_ubos to just the ones we haven't lowered to constbuf.
With the upcoming LDC usage in the GL driver, we don't want to be
uploading descriptors for every UBO when they aren't actually in use.
Trimming NIR's num_ubos will avoid that, and cleans up num_ubo handling
elsewhere right now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14 00:10:43 +00:00
Eric Anholt
d5176c453e freedreno/ir3: Move i/o offset lowering after analyze_ubo_ranges.
I found that when moving more UBOs to load_ubo_ir3, analyze_ubo_ranges
would move things back in a broken way.  We can just run this pass later
and drop the _ir3 path.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14 00:10:43 +00:00
Eric Anholt
5387c27140 freedreno/ir3: Leave the cursor alone during ir3_nir_try_propagate_bit_shift.
Otherwise, we might end up inserting the nir_intrinsic_load_ubo_ir3()
after the non-offset src's definition, leading to nir_validate() failures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14 00:10:43 +00:00
Eric Anholt
e0a4d1c4e5 freedreno/ir3: Clean up a silly nir_src_for_ssa(src.ssa).
Just copy the src through.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14 00:10:43 +00:00
Eric Anholt
d2a0cde390 nir: Include num_ubos in the printed shader (if nonzero).
I keep wanting this number for debugging shaders.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14 00:10:43 +00:00
Jason Ekstrand
492d664be0 util/ra: Add [de]serialization support
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>
2020-05-13 23:36:44 +00:00
Jason Ekstrand
38e68db778 util/vma: Add a debug print helper
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>
2020-05-13 23:36:44 +00:00
Jason Ekstrand
adbcef37d2 util/vma: Add an option to configure high/low preference
The vma_heap allocator was originally designed to prefer high addresses
in order to find bugs in ANV's high address handling.  However, there
are cases where you might want the allocator to prefer lower addresses
for some reason.  This provides a configure bit for exactly this
purpose.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>
2020-05-13 23:36:44 +00:00
Caio Marcelo de Oliveira Filho
f40f8f623a util/list: Add list_foreach_entry_from_safe
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>
2020-05-13 23:36:44 +00:00
Jason Ekstrand
aeb95fda54 util/list: Add a list pair iterator
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>
2020-05-13 23:36:44 +00:00
Iván Briano
5425968d2e anv: Implement VK_EXT_custom_border_color
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>
2020-05-13 23:20:50 +00:00
Iván Briano
5b07f142d7 anv: Add a way to reserve states from a pool
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>
2020-05-13 23:20:50 +00:00
Iván Briano
32d631dcd2 anv: Disable B5G6R5_UNORM_PACK16
It's not a required format and it causes issues with some features.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>
2020-05-13 23:20:50 +00:00
Iván Briano
6ae0762f5c anv: use the correct format on Android
Per https://android.googlesource.com/platform/frameworks/native/+/master/vulkan/libvulkan/swapchain.cpp#745
the format Android requires is R5G6B5, and we have it backwards here.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>
2020-05-13 23:20:50 +00:00
JibbityJobbity
4cf702c332 drirc: Enable glthread for PCSX2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5023>
2020-05-13 22:48:09 +00:00
Eric Engestrom
445e559e35 post_version.py: stop adding release candidates to the index and relnotes
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2870
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4929>
2020-05-13 21:35:24 +00:00
Eric Engestrom
ae26149e2e post_version.py: invert is_point into is_first_release to make its purpose clearer
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4929>
2020-05-13 21:35:24 +00:00
Eric Engestrom
5fba85bcb8 post_version.py: fix branch name construction for release candidates
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2870
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4929>
2020-05-13 21:35:24 +00:00
Marek Olšák
64c7363f7e glthread: stop using GLenum16 to get correct GL errors for out-of-bounds enums
Reported by Ian Romanick.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5016>
2020-05-13 20:10:42 +00:00
Marek Olšák
1152af2eda radeonsi: also enable tgsi_to_nir caching for compute shaders
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
2020-05-13 19:43:05 +00:00
Axel Davy
45e69e7d11 radeonsi: Enable tgsi to nir disk cache
Enable the tgsi to nir cache for radeonsi.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
2020-05-13 19:43:05 +00:00
Axel Davy
f83f538881 st/nine: Enable ttn cache
A trace of a Hat in Time, which builds thousands of shaders
takes 339 seconds to run the second time without this patch,
and 41 seconds with it (basically there is no more loading times).

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
2020-05-13 19:43:05 +00:00
Axel Davy
4db880d805 ttn: Implement disk cache
ttn is slow, let's disk cache it.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
2020-05-13 19:43:05 +00:00
Axel Davy
522bd414f3 ttn: Add new allow_disk_cache parameter
For now this parameter doesn't do anything.
It means the implementation is allowed to use
a cache on disk.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
2020-05-13 19:43:05 +00:00
Eric Anholt
6670475a44 freedreno/a6xx: Fix UBWC mipmapping height alignment.
After fixing the power of two sizing, pitches worked, but 1-pixel high and
unaligned height miplevels were off.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
2020-05-13 19:18:16 +00:00
Eric Anholt
81f21ff4ef freedreno/a6xx: Fix UBWC mipmap sizing.
The HW requires a log2 width/height of the level 0 meta_* size in the
descriptors, making it pretty clear that UBWC mipmapping is all
power-of-two sized.  Fixes a bunch of failures in the upcoming unit UBWC
layout unit tests.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
2020-05-13 19:18:16 +00:00
Eric Anholt
b5db2a2574 freedreno/a6xx: Fix UBWC blockheight for RG8.
Using texturator on a P3A at 1024x1024, RG8 has log2w/h of 6x7 instead of
R16I/UI's 6x8.  The other blockw/h I verified other than cpp=1
(R8/R8I/R8UI didn't use UBWC) and 32 (would need a bigger type).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
2020-05-13 19:18:16 +00:00
Eric Anholt
9da4ce9953 freedreno: Pull the tile_alignment lookup for a layout to a helper.
The r8g8 case UBWC alignment will be changing in the next commit, so
fdl6_get_ubwc_blockwidth needs to start paying attention to r8g8 too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
2020-05-13 19:18:16 +00:00
Eric Anholt
dc7ccdb3f5 freedreno/a6xx: Add a testcase for UBWC buffer sharing.
These offsets are hand-computed referencing msm_media_info.h, and match
our driver's current behavior.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
2020-05-13 19:18:16 +00:00
Eric Anholt
e32783c644 freedreno/a6xx: Improve layout testcase logging for UBWC fails.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
2020-05-13 19:18:16 +00:00
Eric Anholt
2e4ddb6353 freedreno/a4xx+: Increase max texture size to 16384.
Noticed when poking around with texture layouts and found that my big
texture layout from the blob buffer overflowed.  Values come from
http://vulkan.gpuinfo.org for Adreno 418, 512, 630.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
2020-05-13 19:18:16 +00:00
Daniel Schürmann
1f7d1541df nir: reset ssa-defs as non-divergent during divergence analysis instead of upfront
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>
2020-05-13 18:49:22 +00:00
Daniel Schürmann
1b881f3d8e nir: simplify phi handling in divergence analysis
This patch adds some control flow information to the
state to keep track whether a loop contains divergent
continue or break statements to not having to
recalculate this property for every phi.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>
2020-05-13 18:49:22 +00:00
Daniel Schürmann
450b1d87ba nir: rework phi handling in divergence analysis
This patch splits the visit_phi() function into
three different ones according to the kind of phi
(merge-node, loop-header or loop-exit) and calls
them when visiting the cf_nodes.
This allows to revisit loops if the loop header's
phis have changed, only.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>
2020-05-13 18:49:22 +00:00
Daniel Schürmann
febef22459 nir: refactor divergence analysis state
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>
2020-05-13 18:49:22 +00:00
Daniel Schürmann
b9ea0ca6ee nir: add nir_intrinsic_elect to divergence analysis
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>
2020-05-13 18:49:22 +00:00
Jason Ekstrand
ca2d53f451 nir: Make "divergent" a property of an SSA value
v2: fix usage in ACO (by Daniel Schürmann)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>
2020-05-13 18:49:22 +00:00
Marek Olšák
db94a2d03d gallium: remove more "state tracker" occurences
Trivial.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>
2020-05-13 13:47:27 -04:00
Marek Olšák
7480069703 gallium: rename PIPE_RESOURCE_FLAG_ST_PRIV to FRONTEND_PRIV
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>
2020-05-13 13:47:27 -04:00
Marek Olšák
8c9b9aac7d gallium: change comments to remove 'state tracker'
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>
2020-05-13 13:47:27 -04:00
Marek Olšák
d6287a94b6 gallium: rename 'state tracker' to 'frontend'
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>
2020-05-13 13:46:53 -04:00
Connor Abbott
b408734e5e tu: Implement fallback linear staging blit for CopyImage
Also, rewrite the format decision code so that we correctly decide when
the linear fallback is needed, even if UBWC is disabled. As part of
that, I also moved around some of the code to handle compressed formats
to make sure that copying compressed formats with a linear staging blit
works (this is now possible since we started allowing tiled compressed
textures).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5007>
2020-05-13 13:39:04 +00:00
Connor Abbott
40e842c009 tu: Add noubwc debug flag to disable UBWC
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5007>
2020-05-13 13:39:04 +00:00
Connor Abbott
ed79f805fa tu: Add a "scratch bo" allocation mechanism
This is simpler than a full-blown memory reuse mechanism, but is good
enough to make sure that repeatedly doing a copy that requires the
linear staging buffer workaround won't use excessive memory or be slowed
down due to repeated allocations.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5007>
2020-05-13 13:39:04 +00:00
Rhys Perry
7ce527a4fe aco: improve phi affinities with p_split_vector
Totals from 5860 (4.59% of 127638) affected shaders:
VGPRs: 460212 -> 460216 (+0.00%)
CodeSize: 65554356 -> 65464816 (-0.14%)
Instrs: 12655972 -> 12633578 (-0.18%)
Copies: 1309994 -> 1292163 (-1.36%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4990>
2020-05-13 13:12:08 +00:00
Rhys Perry
51e797e233 aco: consider affinities when creating v_mac_f32
Totals from 8487 (6.65% of 127638) affected shaders:
CodeSize: 62061988 -> 62058020 (-0.01%); split: -0.01%, +0.01%
Instrs: 11910757 -> 11885409 (-0.21%); split: -0.21%, +0.00%
Copies: 1065244 -> 1040945 (-2.28%); split: -2.30%, +0.02%
Branches: 349665 -> 348914 (-0.21%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4990>
2020-05-13 13:12:08 +00:00
Rhys Perry
138eed45b5 aco: mark phi definitions as last-seen phi operands
Totals from 14340 (11.23% of 127638) affected shaders:
SGPRs: 1251648 -> 1251512 (-0.01%)
VGPRs: 994556 -> 994104 (-0.05%); split: -0.06%, +0.01%
CodeSize: 122894528 -> 121099604 (-1.46%); split: -1.49%, +0.03%
MaxWaves: 106039 -> 106103 (+0.06%); split: +0.06%, -0.00%
Instrs: 23860066 -> 23414317 (-1.87%); split: -1.90%, +0.03%
Copies: 2448228 -> 2049305 (-16.29%); split: -16.37%, +0.07%
Branches: 789381 -> 757921 (-3.99%); split: -4.62%, +0.64%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4990>
2020-05-13 13:12:08 +00:00
Rhys Perry
c1c0cf7a66 aco: fix consecutively written vgprs from vmem instructions
If one VMEM instruction uses a sampler and the other doesn't, we can't do
this optimization.

Totals from 47 (0.04% of 127638) affected shaders:
CodeSize: 271744 -> 271656 (-0.03%); split: -0.04%, +0.01%
Instrs: 52783 -> 52761 (-0.04%); split: -0.05%, +0.01%
Cycles: 5547040 -> 5546952 (-0.00%); split: -0.00%, +0.00%
VMEM: 10022 -> 9887 (-1.35%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4949>
2020-05-13 12:26:42 +00:00
Rhys Perry
0c7bed72f7 aco: simplify consecutive ordered vmem/lds writes optimization
This was unnecessary and messed with statistics

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4949>
2020-05-13 12:26:42 +00:00
Andres Gomez
a6beb051af gitlab-ci: correct tracie behavior with replay errors
[dump_trace_images] Info: Dumping trace /tmp/tracie.test.ap5pshYcsg/traces-db/trace1/magenta.testtrace... ERROR
[dump_trace_images] Debug: === Failure log start ===
invalid literal for int() with base 16: 'in'
[dump_trace_images] Debug: === Failure log end ===
[check_image] Trace /tmp/tracie.test.ap5pshYcsg/traces-db/trace1/magenta.testtrace couldn't be replayed. See above logs for more information.
Traceback (most recent call last):
  File "/tmp/tracie.test.ap5pshYcsg/tracie.py", line 176, in <module>
    main()
  File "/tmp/tracie.test.ap5pshYcsg/tracie.py", line 164, in main
    ok, result = gitlab_check_trace(project_url, commit_id, args.device_name, trace, expectation)
TypeError: cannot unpack non-iterable bool object

Fixes: efbbf8bb81 ("tracie: Print results in a machine readable format")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4839>
2020-05-13 13:57:36 +03:00
Andres Gomez
8546d1dd78 gitlab-ci: create always the "results" directory with tracie
Otherwise, we will fail when the traces description file doesn't
contain any checksum for the specified device.

Fixes: efbbf8bb81 ("tracie: Print results in a machine readable format")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4839>
2020-05-13 13:57:13 +03:00
Samuel Pitoiset
1ef03dade1 radv: add a LLVM version string workaround for SotTR and ACO
When the LLVM version is too old or missing, SotTR applies shader
workarounds and that reduces performance by 2-5% with ACO.

SotTR workarounds are applied with LLVM 8 and older, so reporting
LLVM 9.0.1 should be fine.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4984>
2020-05-13 07:57:18 +00:00
Samuel Pitoiset
91c757b796 turnip: use the common code for generating extensions and dispatch tables
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4987>
2020-05-13 08:45:29 +02:00
Samuel Pitoiset
ddfae50b67 anv: use the common code for generating extensions and dispatch tables
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4987>
2020-05-13 08:45:28 +02:00
Samuel Pitoiset
857051c5c6 radv: use the common code for generating extensions and dispatch tables
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4987>
2020-05-13 08:45:26 +02:00
Samuel Pitoiset
bee8a57942 vulkan: import common code for generating extensions
ANV and RADV have similar Python code for generating extensions
and dispatch tables.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4987>
2020-05-13 08:45:23 +02:00
Samuel Pitoiset
9b1138e3f0 radv: implement VK_EXT_private_data
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4886>
2020-05-13 08:23:49 +02:00
Samuel Pitoiset
178adfa6a8 radv: use the base object struct types
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4886>
2020-05-13 08:23:23 +02:00
Samuel Pitoiset
65458528fc radv: use the common base object type for VkDevice
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4886>
2020-05-13 08:23:23 +02:00
Marek Vasut
2b535ac61b etnaviv: Disable seamless cube map on GC880
The GC880 on iMX6DL indicates in it's minorFeatures2 register that it
does support SEAMLESS_CUBE_MAP, however when the TE.SAMPLER_CONFIG1
VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP bit is set on GC880 on iMX6DL,
the result is corrupted image. In particular, the following ~112 dEQPs
are affected and fail:

  dEQP-GLES2.functional.texture.filtering.cube.*

This only happens on MX6DL GC880, MX6Q GC2000 and STM32MP1 GC400(GCnano)
do not report the minorFeatures2 SEAMLESS_CUBE_MAP bit and ignore the
TE_SAMPLER_CONFIG1 VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP bit (note
that ss->seamless_cube_map is unconditionally set by mesa at times even
PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE returns 0), so there is no visible
problem and there are no failing dEQP tests on the GC2000 and GCnano.

This might imply that the minorFeatures2 SEAMLESS_CUBE_MAP has some
different meaning on GC880 or the SEAMLESS_CUBE_MAP behaves differently
on the GC880.

This patch does not set the SEAMLESS_CUBE_MAP bit on hardware which does
not indicate support for seamless cube map and on GC880, which results
in reduction in failed dEQPs: 635 to 186 on GC880, 274 to 270 on GC2000
and no change on GC400(GCnano).

Fixes: 8dd26fa2f0 ("etnaviv: support GL_ARB_seamless_cubemap_per_texture")
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4865>
2020-05-13 05:40:21 +00:00
Rob Clark
f079c00ffc freedreno/a6xx: fix max-scissor opt
On a6xx we need a 0,0 based scissor in the binning pass, but can use the
blit-scissor to avoid restore/resolve of untouched pixels, and use the
conditional execution if the IB to bin to skip bins with no geometry
(due to the scissor).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5021>
2020-05-13 03:59:44 +00:00
Rob Clark
d6706fdc46 freedreno/ir3/sched: try to avoid syncs
Similar to what we do in postsched.  It is useful for pre-RA sched to be
a bit aware of things that would cause syncs.  In particular for the tex
fetches, since the vecN src/dst tends to limit postsched's ability to
re-order them.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4923>
2020-05-13 03:28:40 +00:00
Rob Clark
d95a6e3a0c freedreno/ir3/sched: avoid scheduling outputs
If an instruction's only use is as an output, and it increases register
pressure, then try to avoid scheduling it until there are no other
options.

A semi-common pattern is `fragcolN.a = 1.0`, this pushes all these
immed loads to the end of the shader.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4923>
2020-05-13 03:28:40 +00:00
Rob Clark
488cf208d5 freedreno/ir3/postsched: try to avoid (sy) syncs
Similar to avoidance of `(ss)` syncs, it turns out to be helpful to
avoid `(sy)` syncs as well.  This helps us turn an tex, (sy)alu, tex,
(sy)alu sequence into tex, tex, (sy)alu, alu, which is a big win in
gfxbench gl_fill2.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4923>
2020-05-13 03:28:40 +00:00
Rob Clark
25f4fb346e freedreno/ir3/postsched: reset sfu_delay on sync
Once we schedule an instruction that will require an `(ss)` sync flag,
there is no need to delay any further instructions that consume an
SFU result (until the next SFU instruction is scheduled).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4923>
2020-05-13 03:28:40 +00:00
Rob Clark
f351e1d137 freedreno/ir3: limit # of tex prefetch by shader size
It seems for short frag shaders, too much prefetch can be detrimental.
I think what we *really* want to do is decide after pre-RA sched, when
we also know about nop's and what the actual ir3 instruction count is.
But that will require re-working how prefetch lowering works.  For now
this is a super crude heuristic to attempt to approximate a good
solution.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4923>
2020-05-13 03:28:40 +00:00
Rob Clark
d69f6fd852 freedreno/ir3: fix indirect cb0 load_ubo lowering
We can no longer assume that `state->ranges[0]` is block 0.  It *often*
is, but when we encounter a "real" ubo that we lower to `load_uniform`
before a block 0 `load_ubo`, it could end up another entry in the table.
Resulting in the second pass after gathering ubo ranges, not finding a
valid range.  Which results in a `load_ubo` for a thing that is not
actually a ubo making it's way into ir3 frontend.  Resulting in grabbing
what we think is a ubo address out of some unrelated const register, and
trying to dereference that.  Which as you can imagine, fails in amusing
ways.

Fixes: fc850080ee ("ir3: Rewrite UBO push analysis to support bindless")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4954>
2020-05-12 23:51:46 +00:00
Rob Clark
c4dc877cb5 freedreno/ir3: don't allow negative const_offset
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4954>
2020-05-12 23:51:46 +00:00
Alyssa Rosenzweig
8d8ba7fb44 panfrost: Run dEQP-GLES3.functional.shaders.derivate.* on CI
Should be stable now, and should pass except for MSAA tests
(multisampling is still a todo overall).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5014>
2020-05-12 22:30:42 +00:00
Alyssa Rosenzweig
b7bd021c70 pan/mdg: Fix derivative swizzle
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5014>
2020-05-12 22:30:42 +00:00
Alyssa Rosenzweig
bac29316b0 pan/mdg: Set types for derivatives
Closes #2900

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5014>
2020-05-12 22:30:42 +00:00
Alyssa Rosenzweig
69e4d4fabe pan/mdg: Remove texture_op_count
Was used as a crude approximation of the terminate flag, which we now
can do properly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5014>
2020-05-12 22:30:41 +00:00
Alyssa Rosenzweig
344dd91497 pan/mdg: Use analysis to set .cont/.last flags
Corresponds roughly to what we analyze. Note that "terminate AND
execute" is a contradiction (rather: it's equivalent to just
terminating), hence why there are only three possibilities for the
states of the flags:

   .cont = continue, don't execute
   .last = don't continue, don't execute
   .cont.last = continue and execute

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5014>
2020-05-12 22:30:41 +00:00
Alyssa Rosenzweig
9a7f0e268b pan/mdg: Use the helper invo analyze passes
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5014>
2020-05-12 22:30:41 +00:00
Alyssa Rosenzweig
d429187bf3 pan/mdg: Analyze helper execution requirements
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5014>
2020-05-12 22:30:41 +00:00
Alyssa Rosenzweig
3228b3106a pan/mdg: Analyze helper invocation termination
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5014>
2020-05-12 22:30:41 +00:00
Alyssa Rosenzweig
0da03c68ae pan/mdg: Explain helper invocations dataflow theory
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5014>
2020-05-12 22:30:41 +00:00
Arcady Goldmints-Orlov
95fd950d35 intel/compiler: fix alignment assert in nir_emit_intrinsic
Fixes: c643979228 (intel/fs: Choose memory message type based on bit size)
Fixes: dEQP-VK.subgroups.ballot_broadcast.compute.subgroupbroadcast_i8vec2

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5000>
2020-05-12 22:14:31 +00:00
Eric Anholt
a663c595bc freedreno: Skip taking the lock for resource usage if it's already flagged.
Improves nohw drawoverhead 8-ubos update throughput by 13.493% +/-
0.391444% (n=15).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5011>
2020-05-12 21:42:00 +00:00
Eric Anholt
356f99161d freedreno: Move the resource_read early out to an inline.
Looking at perf, the drawoverhead test case was now spending 13% CPU (89%
in that function) on stack management.

nohw drawoverhead throughput 1.03902% +/- 0.380257% (n=13).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4996>
2020-05-12 21:19:50 +00:00
Eric Anholt
d393837332 freedreno: Add an early out for preparing to read a resource.
nohw drawoverhead 8 UBOs test throughput 1.06093% +/- 0.363376% (n=10).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4996>
2020-05-12 21:19:50 +00:00
Eric Anholt
3e424bcdfc freedreno: Split the fd_batch_resource_used by read vs write.
This is for an optimization I plan in a following commit.  I found I had
to add likely()s to avoid a perf regression from branch prediction.

On the drawoverhead 8 UBOs test, the HW can't quite keep up with the CPU,
but if I set nohw then this change is 1.32023% +/- 0.373053% (n=10).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4996>
2020-05-12 21:19:50 +00:00
Eric Anholt
fdcadf611e freedreno: Add a nohw flag to skip submitting to the kernel.
For some CPU-side-only optimizations, it can be nice to disable rendering
so that we can see what the impact is even on cases where the GPU can't
quite keep up.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4996>
2020-05-12 21:19:50 +00:00
Brian Ho
a43e974064 turnip: Execute ir3_nir_lower_gs pass again
This commit fixes a GS regression introduced in !4562 where
ir3's GS lowering pass was moved from common code (ir3_nir) to
freedreno-specific code (ir3_shader). For GS support in turnip, we
need to add the GS lowering pass back in, this time in tu_shader.

As for the nir_gather_info change, the GS lowering pass has always
introduced a discard_if intrinsic into the GS. Previously, we simply
ran nir_shader_gather_info before GS lowering, but now since we lower
the GS before we need to remove the assertion that only a FS can use
the discard_if intrinsic.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4892>
2020-05-12 13:42:55 -07:00
Rob Clark
1bd38746d5 freedreno/gmem: rework gmem layout algo
And try a bit harder to find an optimal layout.  Improves on a sub-
optimal layout we arrive at in the 4 MRT pass in manhattan, picking
up a bit more than 3%.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4976>
2020-05-12 18:16:48 +00:00
Rob Clark
c46f46befe freedreno/gmem: relax alignment on a6xx
The blob only uses single page alignment, and empirically that appears
to work just fine.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4976>
2020-05-12 18:16:48 +00:00
Rob Clark
ad6e06621b freedreno: add gmemtool
A simple standalone thing to run through a bunch of GMEM layouts for a
given gpu.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4976>
2020-05-12 18:16:48 +00:00
Rob Clark
ef5f238fd0 freedreno/gmem: add helper to dump GMEM layout
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4976>
2020-05-12 18:16:48 +00:00
Rob Clark
6a49d9c396 freedreno/gmem: add div_align() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4976>
2020-05-12 18:16:48 +00:00
Rob Clark
96b5a70f45 freedreno: initialize max_scissor
Somehow the initialization of this got lost somewhere along the way,
resulting in assuming minx/miny are always zero.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4976>
2020-05-12 18:16:48 +00:00
Rob Clark
1387e77801 freedreno/gmem: don't assume scissor opt when estimating # of bins
We potentially don't know yet what the resulting scissor bounds are, so
we can't assume this when estimating number of bins per pipe for VSC
size calculations.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4976>
2020-05-12 18:16:48 +00:00
Jason Ekstrand
3c87618d35 vulkan: Handle vkGet/SetPrivateDataEXT on Android swapchains
There is an annoying spec corner on Android.  Because VkSwapchain is
implemented in the Vulkan loader on Android which may not know about
this extension, we have to handle it as a special case inside the
driver.  We only have to do this on Android and only for VkSwapchainKHR.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4882>
2020-05-12 18:01:48 +00:00
Jason Ekstrand
51c6bc13ce anv,vulkan: Implement VK_EXT_private_data
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4882>
2020-05-12 18:01:48 +00:00
Jonathan Marek
d76e722ed6 turnip: enable tiling for compressed formats
Now that layout code supports this, we can enable it.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5009>
2020-05-12 17:25:38 +00:00
Jonathan Marek
f543d87f23 turnip: update "fetchsize" value to match fdl6_layout changes
It seems this is actually a "minimum pitch" value. For example
TFETCH6_2_BYTE means a minimum pitch of 128 bytes for mipmap levels.

This fixes breakage with compressed formats. For example this test:

dEQP-VK.pipeline.sampler.view_type.2d.format.eac_r11_snorm_block.mipmap.linear.lod.equal_min_3_max_3

Fixes: a34b3fa198 ("freedreno/fdl: Align after dividing by block size")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5009>
2020-05-12 17:25:38 +00:00
Eric Anholt
f789c5975c freedreno: Fix non-constbuf-upload UBO block indices and count.
The nir_analyze_ubo_ranges pass removes all UBO block 0 loads to reverse
what nir_lower_uniforms_to_ubo() had done, and we only upload UBO pointers
to the HW for UBO block 1-N, so let's just fix up the shader state.

Fixes an off by one in const state layout setup, and some really dodgy
register addressing trying to deal with dynamic UBO indices when the UBO
pointers happen to be at the start of the constbuf.

There's no fixes tag, though this fixes a bug from September, because it
would require the num_ubos fix in nir_lower_uniforms_to_ubo.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4992>
2020-05-12 17:01:55 +00:00
Eric Anholt
4553fc66a5 nir: Fix count when we didn't lower load_uniforms but did shift load_ubos.
The fixed commit was really nice in mostly fixing num_ubos to reflect the
shader after lowering, but for
dEQP-GLES31.functional.compute.basic.ubo_to_ssbo_single_invocation there
are no default uniforms and so we skipped the increment, even though we
shifted the block index up.

Fixes: 4777ee1a62 ("nir: Always create UBO variable when lowering uniforms to ubo")
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4992>
2020-05-12 17:01:55 +00:00
Eric Anholt
0f2e44d55b freedreno: Drop the "write" arg to emit_const_bo now relocs don't care.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4967>
2020-05-12 16:30:57 +00:00
Eric Anholt
51d7a71bd4 freedreno: Replace OUT_RELOCW with OUT_RELOC.
Final cleanup commit now that they're the same.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4967>
2020-05-12 16:30:57 +00:00
Eric Anholt
064f395a89 freedreno: Tell the kernel that all BOs are for writing.
Using non-write flags is pretty dubious -- it means the kernel tracking an
array of read-only consumers of the BO and having exclusive consumers wait
on each reader's fence.  It allows multiple readers through dma-bufs to do
work in parallel, but at the cost of kernel CPU time and memory management
of the shared array.  Other drivers have dropped this distinction since
dma-buf sharing is usually producer-consumer, not producer-two-consumers,
and the userspace and kernel space tracking is expensive.

For us, this lets us drop the flags passed in for relocs and tracked in
the ringbuffer reloc lists.  The end result of the flags reduction work is
drawoverhead uniforms test throughput 2.37195% +/- 0.365579% (n=15)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4967>
2020-05-12 16:30:57 +00:00
Eric Anholt
b2c23b1e48 freedreno: Mark all ringbuffer BOs as to be dumped on crash.
We can avoid passing these flags around in the DRM backends by just
marking ring BOs up front.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4967>
2020-05-12 16:30:57 +00:00
Eric Anholt
554b959df0 freedreno: Replace OUT_RELOCD with permanently flagging shader BOs for it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4967>
2020-05-12 16:30:57 +00:00
Eric Anholt
9d8d936dfc freedreno: Start moving relocs flags into the BOs.
It's silly to have all the reloc emitters passing around FD_RELOC_READ
when you have to have it set on all relocs (that don't include WRITE,
which implies read) for the kernel to actually track the fences on the BO.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4967>
2020-05-12 16:30:57 +00:00
Samuel Pitoiset
4235624b6a aco: optimize add/sub(a, cndmask(b, 0, 1, cond)) -> addc/subbrev_co(0, a, b)
v2: outline into a separate function and also optimize additions (by Daniel Schürmann)

Totals from affected shaders: (VEGA)
SGPRS: 938888 -> 941496 (0.28 %)
VGPRS: 832068 -> 831532 (-0.06 %)
Spilled SGPRs: 618 -> 618 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 3696 -> 3696 (0.00 %) dwords per thread
Code Size: 72893900 -> 72558928 (-0.46 %) bytes
LDS: 18201 -> 18201 (0.00 %) blocks
Max Waves: 64256 -> 64268 (0.02 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Co-authored-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4419>
2020-05-12 16:15:17 +00:00
Daniel Schürmann
a5fc96b533 aco: coalesce parallelcopies during register allocation
These are the result of lowering to CSSA, and should be removed if possible

Totals from affected shaders: (VEGA)
SGPRS: 544544 -> 544544 (0.00 %)
VGPRS: 418224 -> 418224 (0.00 %)
Spilled SGPRs: 141826 -> 141826 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 65853740 -> 64703380 (-1.75 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 13669 -> 13669 (0.00 %)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4952>
2020-05-12 15:59:31 +00:00
Jon Turney
38cc649fcb glthread: Fix use of alloca() without #include "c99_alloca.h"
../src/mesa/main/glthread_draw.c: In function ‘_mesa_marshal_MultiDrawElementsBaseVertex’:
../src/mesa/main/glthread_draw.c:812:36: error: implicit declaration of function ‘alloca’; did you mean ‘malloc’? [-Werror=implicit-function-declaration]
  812 |       const GLvoid **out_indices = alloca(sizeof(indices[0]) * draw_count);
      |                                    ^~~~~~
      |                                    malloc
../src/mesa/main/glthread_draw.c:812:36: error: initialization of ‘const GLvoid **’ {aka ‘const void **’} from ‘int’ makes pointer from integer without a cast [-Werror=int-conversion]
cc1: some warnings being treated as errors

Include c99_alloca.h to portably make the alloca() prototype available.

Fixes: 2840bc30
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4920>
2020-05-12 14:46:12 +00:00
Lucas Stach
dc6c42dc77 etnaviv: generalize FE stall before loading shader and sampler states
It seems that some of the new shader and sampler states added with
Halti0 are not self-synchronizing anymore. Make sure to stall the FE
before loading those new states to avoid corruption of the in-flight
draw state.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3963>
2020-05-12 16:13:31 +02:00
Daniel Stone
8e5fc97be6 CI: Re-enable Panfrost T7x0 jobs
The hardware issue in the lab preventing jobs from being run on those
machines (and limiting T820 availability), leading to them being
disabled in !4965, has been fixed.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Fixes: 696bafac40 ("CI: Disable Panfrost T7x0 jobs")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5006>
2020-05-12 11:33:06 +01:00
Samuel Pitoiset
8c6350d2bb radv: update the list of allowed Android extensions
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4985>
2020-05-12 10:29:48 +02:00
Samuel Pitoiset
021270cb31 radv: handle different Vulkan API versions correctly
Loosely based on ANV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4985>
2020-05-12 10:29:46 +02:00
Samuel Pitoiset
69430921fc radv: limit the Vulkan version to 1.1 for Android
Vulkan 1.2 seems rejected. This hardcodes the Android version to
1.1.107.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2936
Fixes: 7f5462e349 ("radv: enable Vulkan 1.2")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4985>
2020-05-12 10:29:44 +02:00
Gert Wollny
50eabb7035 r600: Fix nir compiler options, i.e. don't lower IO to temps for TESS
Also fix alignments and add umad24 and umul24 options.

Fixes: 6747a984f5
    r600: Enable tesselation for NIR

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4982>
2020-05-12 06:34:07 +00:00
Alejandro Piñeiro
f7fcbe9830 v3d/tex: use TMUSLOD register if possible
TMUSLOD register is the same that TMUS but having the same effect that
setting disable_autolod on the TMU configuration parameter 2.

So using that register is potentially more efficient, as in several
cases we would be able to skip writing P2.

One case where we can't use it is for texture cube maps, as we need to
use TMUSCM.

v2: don't put a comment in the middle of the conditions (Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4962>
2020-05-11 23:52:46 +00:00
Alejandro Piñeiro
c3af695bb0 v3d/tex: set up default values for Configuration Parameter 1 if possible
Texture access has three configuration parameters, P0 (texture), P1
(sampler) and P2(lookup). P1 and P2 are optional, but if P2 is needed
(like for example to set the offset for texelFetchOffset), then you
need to set P1.

But until now when setting up P1 we were asking the driver to fill up
the address with the shader state. But in that case we can just fill
that address with the default value NULL.

So let's avoid asking the driver to fill that default values, and do
it directly on the compiler. This is a good-to-have on OpenGL, and
likely would be needed on Vulkan.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4962>
2020-05-11 23:52:46 +00:00
Alejandro Piñeiro
50c2c76ea3 v3d/tex: only look up the 2nd texture gather offset for 1d non-arrays
Commit 1bc71e8b65 already did that for
the 3rd offset, but it also needs to do it for the 2nd (to handle 1d
array).

Fixes assertion failures with Vulkan CTS tests using 1darray
targets. Seems that there isn't too many 1darray tests on OpenGL CTS,
and OpenGL-ES don't support 1d arrays, but the same problem could
arise eventually on OpenGL.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4962>
2020-05-11 23:52:46 +00:00
Ani
ad8c5bba0a drirc: Enable glthread for rpcs3
Closes: #2939

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4988>
2020-05-11 23:25:19 +00:00
Icecream95
d1290e7948 pan/midgard: Fix old style shadows
This fixes the sky being red in OpenMW, as well as some of the Mesa
demos using shadows (shadowtex, shadow_sampler).

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4997>
2020-05-12 10:36:30 +12:00
Axel Davy
47bfc799da gallium/util: Fix leak in the live shader cache
When the nir backend is used, the create_shader
call is supposed to release state->ir.nir.
When the cache hits, create_shader is not called,
thus state->ir.nir should be freed.

There is nothing to be done for the TGSI case as the
tokens release is done by the caller.

This fixes a leak noticed in:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/2931

Fixes: 4bb919b0b8

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4980>
2020-05-11 19:42:37 +00:00
Ian Romanick
412e29c277 nir/algebraic: Eliminate useless extract before unpack
The shader helped for spills and fills is the big compute shader in Dirt
Showdown.  One of the shaders hurt for spills and fills on Broadwell is
the big compute shader in Bioshock Infinite, but combined with the
previous commit, it's still an impovement.

Tiger Lake
total instructions in shared programs: 21833218 -> 21832449 (<.01%)
instructions in affected programs: 66104 -> 65335 (-1.16%)
helped: 106
HURT: 14
helped stats (abs) min: 1 max: 67 x̄: 7.87 x̃: 5
helped stats (rel) min: 0.19% max: 5.76% x̄: 1.27% x̃: 0.95%
HURT stats (abs)   min: 1 max: 14 x̄: 4.64 x̃: 1
HURT stats (rel)   min: 0.19% max: 4.12% x̄: 1.41% x̃: 0.19%
95% mean confidence interval for instructions value: -8.51 -4.30
95% mean confidence interval for instructions %-change: -1.23% -0.69%
Instructions are helped.

total cycles in shared programs: 506180109 -> 506196314 (<.01%)
cycles in affected programs: 1671429 -> 1687634 (0.97%)
helped: 37
HURT: 84
helped stats (abs) min: 1 max: 490 x̄: 73.27 x̃: 24
helped stats (rel) min: 0.02% max: 7.98% x̄: 1.25% x̃: 0.41%
HURT stats (abs)   min: 1 max: 5000 x̄: 225.19 x̃: 8
HURT stats (rel)   min: 0.03% max: 10.22% x̄: 1.22% x̃: 0.42%
95% mean confidence interval for cycles value: 2.85 265.00
95% mean confidence interval for cycles %-change: 0.04% 0.88%
Cycles are HURT.

Ice Lake and Skylake had similar results. (Ice Lake shown)
total instructions in shared programs: 19961317 -> 19960543 (<.01%)
instructions in affected programs: 30268 -> 29494 (-2.56%)
helped: 39
HURT: 0
helped stats (abs) min: 1 max: 142 x̄: 19.85 x̃: 7
helped stats (rel) min: 0.19% max: 7.87% x̄: 2.33% x̃: 2.31%
95% mean confidence interval for instructions value: -29.46 -10.23
95% mean confidence interval for instructions %-change: -2.95% -1.71%
Instructions are helped.

total cycles in shared programs: 498863755 -> 498865843 (<.01%)
cycles in affected programs: 1831136 -> 1833224 (0.11%)
helped: 57
HURT: 65
helped stats (abs) min: 1 max: 1400 x̄: 128.93 x̃: 25
helped stats (rel) min: 0.05% max: 3.49% x̄: 0.89% x̃: 0.71%
HURT stats (abs)   min: 1 max: 1887 x̄: 145.18 x̃: 15
HURT stats (rel)   min: 0.02% max: 9.88% x̄: 1.83% x̃: 0.73%
95% mean confidence interval for cycles value: -58.30 92.53
95% mean confidence interval for cycles %-change: 0.16% 0.97%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 8774 -> 8773 (-0.01%)
spills in affected programs: 20 -> 19 (-5.00%)
helped: 1
HURT: 0

total fills in shared programs: 9496 -> 9494 (-0.02%)
fills in affected programs: 40 -> 38 (-5.00%)
helped: 1
HURT: 0

Broadwell
total instructions in shared programs: 17859373 -> 17858548 (<.01%)
instructions in affected programs: 38452 -> 37627 (-2.15%)
helped: 31
HURT: 0
helped stats (abs) min: 1 max: 143 x̄: 26.61 x̃: 10
helped stats (rel) min: 0.19% max: 7.87% x̄: 2.57% x̃: 2.69%
95% mean confidence interval for instructions value: -39.79 -13.44
95% mean confidence interval for instructions %-change: -3.25% -1.89%
Instructions are helped.

total cycles in shared programs: 525858109 -> 525869236 (<.01%)
cycles in affected programs: 2058597 -> 2069724 (0.54%)
helped: 44
HURT: 75
helped stats (abs) min: 2 max: 1330 x̄: 187.84 x̃: 23
helped stats (rel) min: 0.04% max: 31.31% x̄: 2.13% x̃: 0.85%
HURT stats (abs)   min: 1 max: 3915 x̄: 258.56 x̃: 47
HURT stats (rel)   min: 0.02% max: 10.53% x̄: 2.81% x̃: 2.21%
95% mean confidence interval for cycles value: -26.06 213.07
95% mean confidence interval for cycles %-change: 0.19% 1.78%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 25744 -> 25730 (-0.05%)
spills in affected programs: 1578 -> 1564 (-0.89%)
helped: 4
HURT: 2

total fills in shared programs: 31710 -> 31689 (-0.07%)
fills in affected programs: 4346 -> 4325 (-0.48%)
helped: 3
HURT: 3

Haswell
total instructions in shared programs: 16228399 -> 16227783 (<.01%)
instructions in affected programs: 22201 -> 21585 (-2.77%)
helped: 27
HURT: 0
helped stats (abs) min: 1 max: 68 x̄: 22.81 x̃: 11
helped stats (rel) min: 0.19% max: 7.87% x̄: 2.92% x̃: 2.86%
95% mean confidence interval for instructions value: -31.96 -13.66
95% mean confidence interval for instructions %-change: -3.68% -2.15%
Instructions are helped.

total cycles in shared programs: 538613967 -> 538701354 (0.02%)
cycles in affected programs: 1653044 -> 1740431 (5.29%)
helped: 36
HURT: 81
helped stats (abs) min: 2 max: 708 x̄: 104.50 x̃: 17
helped stats (rel) min: <.01% max: 15.01% x̄: 1.67% x̃: 0.65%
HURT stats (abs)   min: 1 max: 30100 x̄: 1125.30 x̃: 304
HURT stats (rel)   min: 0.02% max: 16.21% x̄: 8.98% x̃: 11.60%
95% mean confidence interval for cycles value: 23.78 1470.01
95% mean confidence interval for cycles %-change: 4.29% 7.12%
Cycles are HURT.

total spills in shared programs: 23418 -> 23409 (-0.04%)
spills in affected programs: 177 -> 168 (-5.08%)
helped: 2
HURT: 0

total fills in shared programs: 25919 -> 25896 (-0.09%)
fills in affected programs: 568 -> 545 (-4.05%)
helped: 3
HURT: 0

Ivy Bridge
total instructions in shared programs: 15265983 -> 15265759 (<.01%)
instructions in affected programs: 8418 -> 8194 (-2.66%)
helped: 5
HURT: 0
helped stats (abs) min: 18 max: 99 x̄: 44.80 x̃: 26
helped stats (rel) min: 1.74% max: 4.26% x̄: 3.12% x̃: 3.00%
95% mean confidence interval for instructions value: -86.29 -3.31
95% mean confidence interval for instructions %-change: -4.43% -1.81%
Instructions are helped.

total cycles in shared programs: 422930336 -> 422929589 (<.01%)
cycles in affected programs: 59347 -> 58600 (-1.26%)
helped: 3
HURT: 2
helped stats (abs) min: 72 max: 1060 x̄: 433.33 x̃: 168
helped stats (rel) min: 1.14% max: 3.48% x̄: 2.23% x̃: 2.06%
HURT stats (abs)   min: 265 max: 288 x̄: 276.50 x̃: 276
HURT stats (rel)   min: 4.79% max: 5.64% x̄: 5.22% x̃: 5.22%
95% mean confidence interval for cycles value: -829.08 530.28
95% mean confidence interval for cycles %-change: -4.43% 5.93%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 4953 -> 4946 (-0.14%)
spills in affected programs: 344 -> 337 (-2.03%)
helped: 2
HURT: 0

total fills in shared programs: 5548 -> 5521 (-0.49%)
fills in affected programs: 838 -> 811 (-3.22%)
helped: 2
HURT: 0

No shader-db changes on any earlier Intel platform.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4515>
2020-05-11 12:07:01 -07:00
Ian Romanick
bc0bbb8f0b nir/algebraic: Add some half packing optimizations for pack_half_2x16_split
Like 1f72857739 ("nir/algebraic: add some half packing optimizations"),
but for the pack_half_2x16_split variant.

The shader helped for spills and fills is the big compute shader in
Bioshock Infinite.

Tiger Lake
total instructions in shared programs: 21834539 -> 21833218 (<.01%)
instructions in affected programs: 60119 -> 58798 (-2.20%)
helped: 105
HURT: 0
helped stats (abs) min: 5 max: 50 x̄: 12.58 x̃: 9
helped stats (rel) min: 0.86% max: 26.46% x̄: 2.58% x̃: 1.70%
95% mean confidence interval for instructions value: -14.35 -10.81
95% mean confidence interval for instructions %-change: -3.20% -1.97%
Instructions are helped.

total cycles in shared programs: 506215169 -> 506180109 (<.01%)
cycles in affected programs: 1445088 -> 1410028 (-2.43%)
helped: 97
HURT: 8
helped stats (abs) min: 1 max: 16882 x̄: 387.76 x̃: 26
helped stats (rel) min: 0.05% max: 18.31% x̄: 1.77% x̃: 1.34%
HURT stats (abs)   min: 21 max: 635 x̄: 319.12 x̃: 212
HURT stats (rel)   min: 0.39% max: 20.08% x̄: 8.96% x̃: 4.46%
95% mean confidence interval for cycles value: -782.96 115.15
95% mean confidence interval for cycles %-change: -1.74% -0.16%
Inconclusive result (value mean confidence interval includes 0).

Ice Lake, Skylake, and Broadwell had similar results. (Ice Lake shown)
total instructions in shared programs: 19962974 -> 19961317 (<.01%)
instructions in affected programs: 63471 -> 61814 (-2.61%)
helped: 105
HURT: 0
helped stats (abs) min: 6 max: 82 x̄: 15.78 x̃: 11
helped stats (rel) min: 1.11% max: 28.65% x̄: 3.17% x̃: 2.16%
95% mean confidence interval for instructions value: -18.38 -13.18
95% mean confidence interval for instructions %-change: -3.86% -2.48%
Instructions are helped.

total cycles in shared programs: 498908953 -> 498863755 (<.01%)
cycles in affected programs: 1566998 -> 1521800 (-2.88%)
helped: 89
HURT: 15
helped stats (abs) min: 2 max: 17502 x̄: 532.19 x̃: 69
helped stats (rel) min: 0.07% max: 18.54% x̄: 4.71% x̃: 3.12%
HURT stats (abs)   min: 3 max: 661 x̄: 144.47 x̃: 16
HURT stats (rel)   min: 0.14% max: 20.57% x̄: 4.29% x̃: 0.30%
95% mean confidence interval for cycles value: -903.93 34.74
95% mean confidence interval for cycles %-change: -4.50% -2.32%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 8776 -> 8774 (-0.02%)
spills in affected programs: 25 -> 23 (-8.00%)
helped: 1
HURT: 0

total fills in shared programs: 9500 -> 9496 (-0.04%)
fills in affected programs: 46 -> 42 (-8.70%)
helped: 1
HURT: 0

Haswell
total instructions in shared programs: 16229912 -> 16228399 (<.01%)
instructions in affected programs: 61257 -> 59744 (-2.47%)
helped: 105
HURT: 0
helped stats (abs) min: 6 max: 51 x̄: 14.41 x̃: 11
helped stats (rel) min: 0.77% max: 28.65% x̄: 3.08% x̃: 2.15%
95% mean confidence interval for instructions value: -16.14 -12.68
95% mean confidence interval for instructions %-change: -3.77% -2.40%
Instructions are helped.

total cycles in shared programs: 538654481 -> 538613967 (<.01%)
cycles in affected programs: 1448966 -> 1408452 (-2.80%)
helped: 58
HURT: 47
helped stats (abs) min: 9 max: 22604 x̄: 957.00 x̃: 74
helped stats (rel) min: 0.40% max: 18.81% x̄: 6.22% x̃: 3.03%
HURT stats (abs)   min: 5 max: 3720 x̄: 318.98 x̃: 49
HURT stats (rel)   min: 0.20% max: 34.50% x̄: 5.05% x̃: 2.12%
95% mean confidence interval for cycles value: -999.84 228.14
95% mean confidence interval for cycles %-change: -2.86% 0.51%
Inconclusive result (value mean confidence interval includes 0).

Ivy Bridge
total instructions in shared programs: 15266086 -> 15265983 (<.01%)
instructions in affected programs: 7272 -> 7169 (-1.42%)
helped: 3
HURT: 0
helped stats (abs) min: 21 max: 41 x̄: 34.33 x̃: 41
helped stats (rel) min: 0.66% max: 5.43% x̄: 2.44% x̃: 1.23%

total cycles in shared programs: 422930883 -> 422930336 (<.01%)
cycles in affected programs: 49259 -> 48712 (-1.11%)
helped: 3
HURT: 0
helped stats (abs) min: 106 max: 221 x̄: 182.33 x̃: 220
helped stats (rel) min: 0.71% max: 5.95% x̄: 2.46% x̃: 0.72%

No changes on any earilier Intel platforms.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4515>
2020-05-11 12:07:01 -07:00
Ian Romanick
a2bf41ec65 nir/algebraic: Optimize ushr of pack_half, not ishr
When a = -1.0, pack_half_2x16(vec2(0x0000, 0xBC00)) will produce
0xBC000000.  The ishr will produce 0xFFFFBC00.  The replacement
pack_half_2x16(vec2(0xBC00, 0x0000)) will produce 0x0000BC00.

Fixes: 1f72857739 ("nir/algebraic: add some half packing optimizations")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4515>
2020-05-11 12:07:01 -07:00
Kenneth Graunke
ab16bff97d intel: Delete hardcoded devinfo->urb.size values for Gen7+ (sans DG1).
On all Gen7+ platforms except DG1, the URB is a subsection of the
configurable L3 cache, and so the size can vary.  The size listed
in the documentation on those platforms is an "example size", picked
by calculating it based on an arbitrarily chosen L3 config.

Hardcoding a value for those platforms provides no value and only
confuses people trying to fill out these tables when doing hardware
enabling.  anv and iris never use this field.  i965 uses it to
initialize brw->urb.size, but then updates that in update_urb_size()
to be the correct value, so the initial value doesn't matter.

Delete the values for Gen7+ and update the comment accordingly.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4969>
2020-05-11 09:40:56 -07:00
Abhishek Kumar
0bea2a1321 egl: Limit the EGL ver for android
Android support EGL 1.5 from Q onwards,
so limit EGL ver to 1.4 for P and below.

Closes: #2892

Signed-off-by: Abhishek Kumar <abhishek4.kumar@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4951>
2020-05-11 13:06:22 +00:00
Serge Martin
9c839e6394 amd/common: Fix incorrect use of asprintf instead of vasprintf
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2020-05-11 12:54:41 +02:00
Erik Faye-Lund
39d59cf87a docs/features: mark GL_NV_conditional_render as done for zink
Requires VK_EXT_conditional_rendering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4835>
2020-05-11 09:09:34 +00:00
Dave Airlie
5743fa6e70 zink: enable conditional rendering if available
This doesn't seem to work perfect, but I'm not sure what is possible
in GL vs Vulkan here

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2867
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4835>
2020-05-11 09:09:34 +00:00
Erik Faye-Lund
5c7dea394f zink: add a GET_PROC_ADDR macro to simplify load_device_extensions
This doesn't do much for now, but it will keep thing cleaner in the next
commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4835>
2020-05-11 09:09:34 +00:00
Erik Faye-Lund
b8fd70eef2 zink: load vk_GetMemoryFdKHR while creating screen
We're about to load some more extension-pointers as well, so let's
create a separate place for doing this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4835>
2020-05-11 09:09:34 +00:00
Pierre-Eric Pelloux-Prayer
c668bdf05c radeonsi: do not use cmask with encrypted texture
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:26:05 +02:00
Pierre-Eric Pelloux-Prayer
8873ea0e25 radeonsi: determine secure flag must be set for gfx IB
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer
92e64f4b41 amdgpu: use AMDGPU_IB_FLAGS_SECURE when requested
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer
2c2ab36f53 radeonsi: add support for PIPE_RESOURCE_FLAG_ENCRYPTED
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer
413d91bbcb gallium: PIPE_RESOURCE_FLAG_ENCRYPTED
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer
5c58cbe84d radeonsi/sdma: implement tmz support
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer
5d96c26b67 radeonsi: force using staging texture when uploading to secure texture
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer
fe2a3b804b amdgpu: add encrypted slabs support
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer
2853ed1a24 radeonsi: allocate framebuffer texture as secure when using tmz
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer
5a67b52de4 radeon: add RADEON_CREATE_ENCRYPTED flag
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer
856a03b4c1 radeonsi: add AMD_DEBUG=tmz option
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer
977e19d5cf amdgpu/radeon: add secure api
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer
506f5d9bda ac/surface: remove shadowing declaration
Fixes: 7691de0dce ("ac/surface,radeonsi: move the set/get_bo_metadata code to ac_surface.c")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2929
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4983>
2020-05-11 08:15:15 +00:00
Samuel Pitoiset
266978f7ca aco: prevent invalid loads/stores vectorization if robustness is enabled
Only UBO, SSBO, global and push constants accesses should matter.

This fixes a bunch of new robustness2 failures. Note that RADV/LLVM
isn't affected because it relies on LLVM for loads/stores
vectorization and LLVM doesn't vectorize in this situation as well.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4881>
2020-05-11 07:25:16 +00:00
Samuel Pitoiset
04718a9cd6 nir: do not vectorize load/store if offset can overflow and robustness enabled
This prevents vectorization for loads/stores that can overflow if
the low offset is negative and the range greater or equal than 0.

The caller can pass the list of variable modes that matter for
robust access.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4881>
2020-05-11 07:25:15 +00:00
Samuel Pitoiset
3fba0a7a6f aco: fix 64-bit trunc with negative exponents on GFX6
v_frexp_exp returns the exponent as an unsigned value.

Also, v_ashr returns either 0 or -1 depending on the sign of the
source operand, but what we want is only the sign bit.

Fixes a bunch of recent dEQP-VK.glsl.builtin.precision_double.* tests.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4921>
2020-05-11 08:31:23 +02:00
Guido Günther
56f955e485 etnaviv: drm: Normalize nano seconds
Make sure the nano second part is less than one second. This matches
what clock_settime expects and allows for more concise kernel
interfaces.

Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3534>
2020-05-10 07:32:12 +00:00
Guido Günther
022327f753 etnaviv: drm: Use NSEC_PER_SEC
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3534>
2020-05-10 07:32:12 +00:00
Mauro Rossi
a92a483ff7 freedreno: android: add adreno-pm4-pack.xml.h generation to android build
Fixes the following building errors:

In file included from external/mesa/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c:40:
external/mesa/src/gallium/drivers/freedreno/a6xx/fd6_pack.h:42:10: fatal error: 'adreno-pm4-pack.xml.h' file not found
         ^~~~~~~~~~~~~~~~~~~~~~~
1 error generated.

In file included from external/mesa/src/gallium/drivers/freedreno/a6xx/fd6_blend.c:36:
external/mesa/src/gallium/drivers/freedreno/a6xx/fd6_pack.h:42:10: fatal error: 'adreno-pm4-pack.xml.h' file not found
         ^~~~~~~~~~~~~~~~~~~~~~~
1 error generated.

In file included from external/mesa/src/gallium/drivers/freedreno/a6xx/fd6_const.c:26:
external/mesa/src/gallium/drivers/freedreno/a6xx/fd6_pack.h:42:10: fatal error: 'adreno-pm4-pack.xml.h' file not found
         ^~~~~~~~~~~~~~~~~~~~~~~
1 error generated.

Fixes: ee293160 "freedreno/a6xx: add OUT_PKT()"
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4973>
2020-05-09 16:19:14 +00:00
Mauro Rossi
5dc3b22dd0 freedreno/drm: android: add libfreedreno_registers static dependency
The dependency is required to get the necessary generated headers

Fixes the following building error:

In file included from external/mesa/src/freedreno/drm/msm_bo.c:27:
In file included from external/mesa/src/freedreno/drm/msm_priv.h:30:
In file included from external/mesa/src/freedreno/drm/freedreno_priv.h:51:
external/mesa/src/freedreno/drm/freedreno_ringbuffer.h:35:10: fatal error: 'adreno_common.xml.h' file not found
#include "adreno_common.xml.h"
         ^~~~~~~~~~~~~~~~~~~~~
1 error generated.

Fixes: 6c688ae8 ("freedreno: Deduplicate ringbuffer macros with computerator/fdperf")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4973>
2020-05-09 16:19:14 +00:00
Erico Nunes
e622e010fd lima/ppir: rework select conditions
This is yet another simple optimization that attemts to save the
insertion of an unnecessary mov for a large number of cases.
If the node outputting the condition for select satisfies a few
requirements (which are common in the case of comparison conditions),
it can just be changed to pipeline output and used directly.
In case of difficult corner cases, just fall back to the mov as before.

The sel_cond op is removed as the scheduler can be smart enough to place
nodes that output to ^fmul in the ALU_SCL_MUL slot, and as there can be
alu ops other than just mov.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4632>
2020-05-09 14:40:40 +02:00
Erico Nunes
a0c58867cd lima/ppir: add fallback mov option for const scheduler
It turns out that with more aggressive combining, there can be cases
where the available const slots are not enough for one instruction.
In particular, fcsel can take up to two consts, and a previous alu slot,
such as a comparison condition, might require an additional const.
So add a fallback for it like for uniforms.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4632>
2020-05-09 14:40:37 +02:00
Erico Nunes
8c47640731 lima/ppir: rework store output
In many cases, it is possible to avoid creating a mov for the store
output node.
Additionally, nodes other than alu, such as load varying, can be valid
store output nodes too.

This is another small optimization, but helps a vast majority of
programs by 1 instruction.
Shaders with discard easily become complicated to handle properly.
Some example issues: ppir has to rely on instruction ordering; or a
node with ssa output could be required both before a discard_if (as a
condition) and after it (as the instruction with the 'stop' bit set).
So don't try to handle them here.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4632>
2020-05-09 14:40:34 +02:00
Erico Nunes
570f1420db lima/ppir: rework emit nir to ppir
The previous code assumed that a ppir node would be created for each nir
instr and used that to add it to the list of nodes and verify success.
This didn't make much sense anymore since some emit paths create
multiple nodes anyway, and this didn't allow for an emit call to not
create any new ppir node while still returning success.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4632>
2020-05-09 14:40:21 +02:00
Erico Nunes
6b21b771f7 lima/ppir: remove unused clone functions
With the previous refactors moving these lowering steps to a nir pass,
these are no longer needed.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4535>
2020-05-09 11:30:07 +00:00
Erico Nunes
8c4157138f lima/ppir: duplicate consts in nir
Move the duplicate consts step to a nir pass.
This makes the nir representation closer to what ppir will have in the
result.
Additionally, it handles the case where a const is used multiple times
by a single node (which can happen in instructions like fcsel). The new
implementation will only emit a single load const for that case.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4535>
2020-05-09 11:30:07 +00:00
Erico Nunes
5e6c386118 lima/ppir: duplicate intrinsics in nir
Move the duplicate uniform and varying steps to a nir pass, along with
some changes in the duplicating strategy.

Node duplication is now done per user of the varying/uniform. This is
inspired by what the offline shader compiler seems to usually do, and as
usual aims to reduce register pressure and better utilize the ld_uni and
ld_var instruction slots.
It is worth noting that due to a bug/feature, ppir was already
duplicating uniforms per successor in ppir_node_add_src even if the
comment indicated it was meant to be per-block.
Additionally, ppir was duplicating load uniform nodes twice for nodes
that use the same uniform in more than one source, resulting in one
unnecessary (and unpipelineable) load. This new implementation in nir
only creates one load in that case.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4535>
2020-05-09 11:30:07 +00:00
Erico Nunes
09003ba070 lima/ppir: combine varying loads in node_to_instr
Varying loads with a single successor have a high potential to be
combined with its successor node, like ppir does for uniforms, rather
than being in a separate instruction.
Even if ppir becomes capable of combining instructions in a separate
step, combining varying loads during node_to_instr is trivial enough
that it seems to be worth doing it in this stage, and this benefits
pretty much every program that uses varyings.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4535>
2020-05-09 11:30:07 +00:00
Erico Nunes
c6a3987f32 lima/ppir: do not assume single src for pipeline outputs
Even if a node has pipeline output and a single successor, it is still
valid for that successor to have multiple references to that pipeline
node. A trivial example is add(u.x,u.y) where u is a uniform.
It is even possible for this to occur with consts as operands of fcsel.
So remove uses of ppir_node_get_src_for_pred as that would assume a
single src in the node that uses the pipeline.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4535>
2020-05-09 11:30:07 +00:00
Erico Nunes
741aa3439d lima/ppir: fix lod bias register codegen
The lod bias register is correctly run through the entire compilation
process, but in the end its allocated register value was never being
added to the instruction.
It seems that most programs were lucky enough that lod bias was assigned
register 0.x so that things worked anyway.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4535>
2020-05-09 11:30:07 +00:00
Erico Nunes
cef1c73634 lima/ppir: introduce liveness internal live set
The current solution for handling registers that live and die within a
single instruction does not handle all cases. In particular, these
intra-instruction use register also conflict with registers that are
part of the live_in set.
Unfortunately, adding them to the live_in set is not an easy solution as
that would cause them to be propagated upwards. So, add a separate set
to handle these registers in the particular instructions, without
propagating them.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4535>
2020-05-09 11:30:07 +00:00
Lionel Landwerlin
9e790fea7c genxml: pack: deal with default field not being simple integers
Storing integers into enums doesn't seem to cause issues in C, but
with our builder tests written in C++ this causes warnings/errors.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4938>
2020-05-09 07:20:48 +00:00
Lionel Landwerlin
942d4538a4 genxml: factor out utility functions
v2: Use the regexp version (Jordan)
    Also fix regexp that missed the ' character replacement (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4938>
2020-05-09 07:20:48 +00:00
Lionel Landwerlin
d07f69413e genxml: fix invalid end value for video fields
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4938>
2020-05-09 07:20:48 +00:00
Lionel Landwerlin
af17e392b2 genxml: run sorting script
Helps running diff/meld between generations :)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4938>
2020-05-09 07:20:48 +00:00
Jordan Justen
45c33313e6 intel/dev: Add device info for RKL
Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by : Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4955>
2020-05-09 01:39:43 +00:00
Jordan Justen
54996ad492 intel/dev: Split .num_subslices out of GEN12_FEATURES macro
The .num_subslices field makes it problematic to reuse the
GEN12_FEATURES macro in other macros.

This also fixes the number of L3 banks for tgl gt1, except that this
was already fixed by Jason (dynamically) in:

86f67952d3 ("intel/devinfo: Compute the correct L3$ size for Gen12")

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by : Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4955>
2020-05-09 01:39:43 +00:00
Qiang Yu
07b0fbea92 panfrost: don't always build bifrost_compiler
src/panfrost/shared is shared with lima driver, build
bifrost_compiler for lima driver is meaningless and
get link error when only lima driver is enabled.

So only build bifrost_compiler when configued with:
  meson -Dtools=panfrost

Fixes: ec2a59cd7a "panfrost: Move non-Gallium files outside of Gallium"
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4960>
2020-05-09 01:27:41 +00:00
Qiang Yu
727a0a53fd radeonsi: remove emacs style config file
As radeonsi has synced the code style with main mesa,
remove the orginal radeonsi spec emacs config file and
use the top level dir .dir-locals.el

Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4961>
2020-05-09 00:57:26 +00:00
D Scott Phillips
6c998c7adf intel/dump_gpu: Fix name of LD_PRELOAD in env append logic
Checking for the wrong environment variable name to be set causes
us to stomp any pre-existing LD_PRELOAD.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4970>
2020-05-08 14:49:07 -07:00
Marek Olšák
1a59590e5d ac/surface: fix broken pitch override on gfx8
Fixes: 441eaef6a9 - amd: unify code for overriding offset and stride for imported buffers

Closes: #2920

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4968>
2020-05-08 16:37:10 -04:00
Eric Anholt
c9e8df61dc freedreno: Initialize the bo's iova at creation time.
Avoids repeated conditionals at reloc time checking if we need to go ask
the kernel.

No statistically significant difference on the drawoverhead case I'm
looking at (n=300).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4957>
2020-05-08 12:35:39 -07:00
Eric Anholt
b3c4e6a597 freedreno: Rename append_bo() in case it doesn't get inlined.
In a debugoptimized build, it wasn't inlined and so I wasn't noticing
where a bunch of CPU usage was going in the DRM functions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4957>
2020-05-08 12:35:39 -07:00
Eric Anholt
e1c74f3fac freedreno: Clean up tests around ORing in the reloc flags.
gcc was surprisingly not seeing through this to just do an AND and an OR.
Improves drawoverhead's few uniforms / 1 change throughput 1.64141% +/-
0.188152% (n=60).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4957>
2020-05-08 12:35:39 -07:00
Eric Anholt
6c688ae81f freedreno: Deduplicate ringbuffer macros with computerator/fdperf
They're sugar around freedreno_ringbuffer.h, so put them there and reuse them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4957>
2020-05-08 12:35:38 -07:00
Hyunjun Ko
094c7646a3 freedreno,tu: Don't request fragcoord components not being read.
v1. Replace the existed bool type with new bitfield and edit register
files to take a mask instead of duplicating codes to do masking.

v2. Use fragcoord_compmask != 0 instead of fragcoord_compmask > 0 since
it represents a bitfield.

Tested with
  dEQP-VK.glsl.builtin_var.simple.fragcoord_xyz/w
  dEQP-GLES2.functional.shaders.builtin_variable.fragcoord_xyz/w

Closes: #2680

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4723>
2020-05-08 17:45:03 +00:00
Jason Ekstrand
ab5590e92b vulkan/object: Always include the type
This was causing problems for some of the ANV unit tests when run in
release mode.  Having a public struct whose layout depends on NDEBUG
seems kind-of sketchy anyway.

Fixes: 32f20783a5 "vulkan: Add run-time object type asserts in..."
Closes: #2903
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4959>
2020-05-08 17:09:27 +00:00
Jason Ekstrand
d11e4738a8 anv/allocator: Add a start_offset to anv_state_pool
This allows a pool's allocations to start somewhere other than the base
address.  Our first real use of this will be to use a negative offset
for the binding table pool to make it so that the offset is baked into
the pool and the code in anv_batch_chain.c doesn't have to understand
pool offsetting.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4897>
2020-05-08 16:54:17 +00:00
pal1000
772b15ad32 util: Make process_test path compatible with mingw native toolchains
v2: Make sure we require winepath when using mingw crosscompilers

v3: Also take into account mingw clang toolchains

Acked-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>

Fixes: f8f14130 ("util/u_process: add util_get_process_exec_path")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2788
CC: "20.1" <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4731>
2020-05-08 14:09:09 +00:00
Daniel Stone
696bafac40 CI: Disable Panfrost T7x0 jobs
One of the dispatchers in the office (with all the T7x0 boards) has gone
AWOL, and we don't have physical access to restore it. Disable it until
we can get in and fix it.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4965>
2020-05-08 14:44:09 +01:00
Con Kolivas
78d267e6da Linux: Change minimum priority threads from SCHED_IDLE to nice 19 SCHED_BATCH.
SCHED_IDLE on linux can lead to extraordinarily long periods of no scheduling
leading to starvation of minimum priority threads for such an extended period
that it can eventually lead to GUI stalls. Switch to renicing the threads to
the lowest priority and use the SCHED_BATCH scheduling policy which is a hint
to the scheduler that this is latency insensitive thread instead. This change
has been confirmed to address unexpected GUI related stalls in mesa
applications across a range of different linux kernels.

Signed-off-by: Con Kolivas <kernel@kolivas.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4912>
2020-05-08 10:14:40 +00:00
Erik Faye-Lund
f66bf5ba44 docs/features: add zink features
This is base on the exported extension strings, with some known-bad
extensions removed. There might be more that should be removed, as their
support isn't per-spec, but this gives us some more information, at
least.

There's also a few features that seems to be trivial to enable, simply
by flipping a cap. But let's document what is expected to work first.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2075
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4963>
2020-05-08 09:41:04 +00:00
Lionel Landwerlin
8bcfce2fcd anv: fix alignments for uniform buffers
We were not consistent with minimums reported in the physical device
properties.

Fixes a few CTS tests :
   dEQP-VK.memory.requirements.dedicated_allocation.buffer.regular
   dEQP-VK.memory.requirements.extended.buffer.regular
   dEQP-VK.memory.requirements.core.buffer.regular

v2: Use define for the limit

v3: Rename define

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a0de2e0090 ("anv: increase minUniformBufferOffsetAlignment to 64")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4940>
2020-05-08 08:59:02 +00:00
Samuel Pitoiset
f105b69464 radv: report correct backend IR in hang reports when ACO is used
Trivial.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4911>
2020-05-08 08:45:26 +02:00
Samuel Pitoiset
290d480c55 radv: do not print the LLVM version string twice in hang reports
It's already part of the device name, and it should now also
correctly report when ACO is used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4911>
2020-05-08 08:45:26 +02:00
Samuel Pitoiset
b1ef1c1211 radv: remove the LLVM version string when ACO is used
Now that ACO supports all shader stages (the only exception is NGG
GS on Navi10 but it fallbacks to legacy GS) it makes sense to remove
the LLVM version string reported as part of the device name.

The LLVM version string was added in the past for some Feral games
to workaround LLVM issues by detecting the version. With ACO, this
is unecessary because the Mesa version is enough to eventually enable
specific shader workarounds.

When the LLVM version string is missing, it is assumed that an old
LLVM is used and workarounds are automatically applied. The only
Vulkan games that might be affected is Shadow of The Tomb Raider
but the impact should be fairly small.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4911>
2020-05-08 08:45:26 +02:00
Tapani Pälli
ee2aef3ea5 anv: call base finish only if pass given in DestroyRenderPass
Fixes: 682c81bdfb ("vulkan,anv: Add a base object struct type")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4936>
2020-05-08 08:36:45 +03:00
Erik Faye-Lund
a885ee5258 st/wgl: allocate and resolve msaa-textures
LLVMpipe recently got the ability to render to MSAA-surfaces, but in
order for this to work on Windows, we need to allocate a separate MSAA
resource and resolve using a blit before we can display it.

Without this, we end up always displaying the first sample instead of
the resolved result.

Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4926>
2020-05-07 22:38:03 +00:00
Erik Faye-Lund
947bb04fcc st/wgl: pass st_context_iface into stw_st_framebuffer_present_locked
We're going to need this to be able to resolve MSAA buffers.

Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4926>
2020-05-07 22:38:03 +00:00
Blaž Tomažič
808eb20186 radeonsi: Fix omitted flush when moving suballocated texture
Fixes: 5e805cc74b "radeonsi: flush the context after resource_copy_region for buffer exports"

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4925>
2020-05-07 17:00:08 -04:00
Daniel Schürmann
37e89e3027 aco: either copy-propagate or inline create_vector operands
Don't do both at the same time as it breaks DCE

Fixes: 2dc550202e ('aco: copy-propagate p_create_vector copies of vectors')
Fixes: dEQP-VK.glsl.builtin.precision_double.ldexp.compute.scalar on GFX6-GFX7

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4922>
2020-05-07 20:40:41 +00:00
Marek Olšák
c9e7362402 ac/surface: override all offsets including metadata offsets
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
2020-05-07 20:13:41 +00:00
Marek Olšák
441eaef6a9 amd: unify code for overriding offset and stride for imported buffers
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
2020-05-07 20:13:41 +00:00
Marek Olšák
c164ea86e1 ac/surface,radeonsi: move the set/get_umd_metadata code into ac_surface.c
The indentation is on purpose. The whole file will be reindented to this
code style some other time.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
2020-05-07 20:13:41 +00:00
Marek Olšák
7691de0dce ac/surface,radeonsi: move the set/get_bo_metadata code to ac_surface.c
The indentation is on purpose. The whole file will be reindented to this
code style some other time.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
2020-05-07 20:13:41 +00:00
Marek Olšák
56e37374dd amd: assume HTILE is always rb/pipe_aligned, remove ac_surface.u.gfx9.htile
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
2020-05-07 20:13:41 +00:00
Marek Olšák
cf61f635ff amd: assume CMASK is always rb/pipe_aligned, remove ac_surface.u.gfx9.cmask
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
2020-05-07 20:13:41 +00:00
Marek Olšák
127aaf0b9a amd: remove duplicated definitions from amdgpu_drm.h
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
2020-05-07 20:13:41 +00:00
Marek Olšák
25edf9b136 amd: update amdgpu_drm.h
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
2020-05-07 20:13:41 +00:00
Dave Airlie
89d4b6b5c8 llvmpipe: make sample position a global array.
I messed this up and LLVM asserts on it.

Use the gallivm struct wrappers to make it clearer.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2913

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4933>
2020-05-07 18:38:51 +00:00
Ian Romanick
3b6449d453 nir/algebraic: Optimize some bfe patterns
v2: Use -x instead of 32-x in shift counts.

Tiger Lake
total instructions in shared programs: 17597691 -> 17597405 (<.01%)
instructions in affected programs: 224557 -> 224271 (-0.13%)
helped: 74
HURT: 17
helped stats (abs) min: 1 max: 71 x̄: 14.36 x̃: 7
helped stats (rel) min: 0.08% max: 1.80% x̄: 0.50% x̃: 0.37%
HURT stats (abs)   min: 1 max: 141 x̄: 45.71 x̃: 40
HURT stats (rel)   min: 0.03% max: 3.55% x̄: 1.20% x̃: 1.14%
95% mean confidence interval for instructions value: -10.53 4.24
95% mean confidence interval for instructions %-change: -0.38% 0.01%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 333595656 -> 333180770 (-0.12%)
cycles in affected programs: 70056467 -> 69641581 (-0.59%)
helped: 91
HURT: 4
helped stats (abs) min: 1 max: 25174 x̄: 4571.40 x̃: 400
helped stats (rel) min: <.01% max: 2.23% x̄: 0.40% x̃: 0.21%
HURT stats (abs)   min: 1 max: 370 x̄: 277.75 x̃: 370
HURT stats (rel)   min: 0.01% max: 0.04% x̄: 0.04% x̃: 0.04%
95% mean confidence interval for cycles value: -5981.55 -2752.89
95% mean confidence interval for cycles %-change: -0.48% -0.29%
Cycles are helped.

Ice Lake, Skylake, Broadwell, and Haswell had similar results. (Ice Lake shown)
total instructions in shared programs: 16117204 -> 16116723 (<.01%)
instructions in affected programs: 207109 -> 206628 (-0.23%)
helped: 100
HURT: 0
helped stats (abs) min: 1 max: 9 x̄: 4.81 x̃: 7
helped stats (rel) min: 0.10% max: 1.58% x̄: 0.23% x̃: 0.20%
95% mean confidence interval for instructions value: -5.51 -4.11
95% mean confidence interval for instructions %-change: -0.27% -0.19%
Instructions are helped.

total cycles in shared programs: 330487341 -> 330082421 (-0.12%)
cycles in affected programs: 68037050 -> 67632130 (-0.60%)
helped: 89
HURT: 7
helped stats (abs) min: 2 max: 24610 x̄: 4567.07 x̃: 400
helped stats (rel) min: <.01% max: 1.52% x̄: 0.39% x̃: 0.22%
HURT stats (abs)   min: 1 max: 370 x̄: 221.29 x̃: 170
HURT stats (rel)   min: 0.01% max: 1.66% x̄: 0.58% x̃: 0.04%
95% mean confidence interval for cycles value: -5780.79 -2655.05
95% mean confidence interval for cycles %-change: -0.42% -0.22%
Cycles are helped.

Ivy Bridge
total instructions in shared programs: 11873641 -> 11873137 (<.01%)
instructions in affected programs: 147464 -> 146960 (-0.34%)
helped: 54
HURT: 0
helped stats (abs) min: 9 max: 10 x̄: 9.33 x̃: 9
helped stats (rel) min: 0.29% max: 0.41% x̄: 0.34% x̃: 0.34%
95% mean confidence interval for instructions value: -9.46 -9.20
95% mean confidence interval for instructions %-change: -0.35% -0.33%
Instructions are helped.

total cycles in shared programs: 175769085 -> 175549519 (-0.12%)
cycles in affected programs: 60770592 -> 60551026 (-0.36%)
helped: 54
HURT: 0
helped stats (abs) min: 252 max: 13434 x̄: 4066.04 x̃: 1290
helped stats (rel) min: 0.02% max: 0.74% x̄: 0.34% x̃: 0.26%
95% mean confidence interval for cycles value: -5323.59 -2808.48
95% mean confidence interval for cycles %-change: -0.41% -0.27%
Cycles are helped.

No changes on any earlier Intel platforms.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4156>
2020-05-07 10:55:50 -07:00
Ian Romanick
f46eabf84e nir/algebraic: Split ibfe and ubfe with two constant sources
I also tried splitting ubfe instructions with one or zero constants,
and zero shaders in shader-db were affected.

The "lost" shader is a compute shader that was promoted from SIMD8 to
SIMD16, so is also counted as the gained shader.

v2: Further restrict bfe splitting.  bfe with multiple constants is
better on at least some Radeon GPUs.  Use -x instead of 32-x in shift
counts.

v3: Fix the outer shift count for ibfe lowering.  Add c=0 optimizations
to prevent bad lowering.  Both suggested by Rhys.  Add shift by -32
optimizations.

Tiger Lake
total instructions in shared programs: 17608764 -> 17596316 (-0.07%)
instructions in affected programs: 303765 -> 291317 (-4.10%)
helped: 113
HURT: 46
helped stats (abs) min: 1 max: 458 x̄: 120.67 x̃: 21
helped stats (rel) min: 0.09% max: 11.23% x̄: 3.47% x̃: 1.39%
HURT stats (abs)   min: 1 max: 201 x̄: 25.83 x̃: 6
HURT stats (rel)   min: 0.23% max: 5.18% x̄: 1.53% x̃: 1.11%
95% mean confidence interval for instructions value: -101.13 -55.45
95% mean confidence interval for instructions %-change: -2.61% -1.44%
Instructions are helped.

total cycles in shared programs: 338390770 -> 333530868 (-1.44%)
cycles in affected programs: 79438330 -> 74578428 (-6.12%)
helped: 112
HURT: 64
helped stats (abs) min: 2 max: 268955 x̄: 44261.93 x̃: 1452
helped stats (rel) min: <.01% max: 29.51% x̄: 4.72% x̃: 2.23%
HURT stats (abs)   min: 2 max: 17618 x̄: 1522.41 x̃: 84
HURT stats (rel)   min: <.01% max: 7.34% x̄: 1.35% x̃: 0.34%
95% mean confidence interval for cycles value: -37232.47 -17993.69
95% mean confidence interval for cycles %-change: -3.37% -1.65%
Cycles are helped.

total spills in shared programs: 8944 -> 8138 (-9.01%)
spills in affected programs: 3240 -> 2434 (-24.88%)
helped: 67
HURT: 0

total fills in shared programs: 9373 -> 7842 (-16.33%)
fills in affected programs: 4736 -> 3205 (-32.33%)
helped: 67
HURT: 0

LOST:   1
GAINED: 2

Ice Lake and Skylake had similar results. (Ice Lake shown)
total instructions in shared programs: 16123288 -> 16116876 (-0.04%)
instructions in affected programs: 241155 -> 234743 (-2.66%)
helped: 126
HURT: 2
helped stats (abs) min: 1 max: 209 x̄: 50.90 x̃: 7
helped stats (rel) min: 0.07% max: 5.94% x̄: 1.76% x̃: 0.65%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.05% max: 0.24% x̄: 0.15% x̃: 0.15%
95% mean confidence interval for instructions value: -61.29 -38.89
95% mean confidence interval for instructions %-change: -2.05% -1.42%
Instructions are helped.

total cycles in shared programs: 335419163 -> 330438819 (-1.48%)
cycles in affected programs: 77515502 -> 72535158 (-6.42%)
helped: 139
HURT: 37
helped stats (abs) min: 2 max: 269140 x̄: 36374.19 x̃: 597
helped stats (rel) min: <.01% max: 28.60% x̄: 3.67% x̃: 1.31%
HURT stats (abs)   min: 4 max: 17618 x̄: 2045.08 x̃: 174
HURT stats (rel)   min: 0.02% max: 8.32% x̄: 2.61% x̃: 0.62%
95% mean confidence interval for cycles value: -37799.30 -18795.51
95% mean confidence interval for cycles %-change: -3.13% -1.57%
Cycles are helped.

total spills in shared programs: 8065 -> 7306 (-9.41%)
spills in affected programs: 3153 -> 2394 (-24.07%)
helped: 67
HURT: 0

total fills in shared programs: 8710 -> 7412 (-14.90%)
fills in affected programs: 4466 -> 3168 (-29.06%)
helped: 67
HURT: 0

LOST:   1
GAINED: 1

Broadwell
total instructions in shared programs: 14970538 -> 14965967 (-0.03%)
instructions in affected programs: 227040 -> 222469 (-2.01%)
helped: 126
HURT: 2
helped stats (abs) min: 1 max: 136 x̄: 36.29 x̃: 8
helped stats (rel) min: 0.07% max: 6.02% x̄: 1.47% x̃: 0.89%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.05% max: 0.24% x̄: 0.14% x̃: 0.14%
95% mean confidence interval for instructions value: -43.05 -28.37
95% mean confidence interval for instructions %-change: -1.69% -1.19%
Instructions are helped.

total cycles in shared programs: 336237662 -> 333035960 (-0.95%)
cycles in affected programs: 72066394 -> 68864692 (-4.44%)
helped: 134
HURT: 42
helped stats (abs) min: 4 max: 122640 x̄: 24344.54 x̃: 1833
helped stats (rel) min: <.01% max: 26.93% x̄: 4.02% x̃: 2.38%
HURT stats (abs)   min: 1 max: 17205 x̄: 1439.69 x̃: 92
HURT stats (rel)   min: <.01% max: 7.12% x̄: 1.34% x̃: 0.62%
95% mean confidence interval for cycles value: -23753.58 -12629.40
95% mean confidence interval for cycles %-change: -3.50% -1.98%
Cycles are helped.

total spills in shared programs: 21122 -> 20204 (-4.35%)
spills in affected programs: 3644 -> 2726 (-25.19%)
helped: 67
HURT: 0

total fills in shared programs: 24879 -> 23460 (-5.70%)
fills in affected programs: 4883 -> 3464 (-29.06%)
helped: 67
HURT: 0

Haswell
total instructions in shared programs: 13148269 -> 13145444 (-0.02%)
instructions in affected programs: 137046 -> 134221 (-2.06%)
helped: 97
HURT: 3
helped stats (abs) min: 1 max: 137 x̄: 30.58 x̃: 3
helped stats (rel) min: 0.14% max: 4.38% x̄: 1.38% x̃: 0.44%
HURT stats (abs)   min: 1 max: 70 x̄: 47.00 x̃: 70
HURT stats (rel)   min: 0.05% max: 5.82% x̄: 3.90% x̃: 5.82%
95% mean confidence interval for instructions value: -37.15 -19.35
95% mean confidence interval for instructions %-change: -1.56% -0.89%
Instructions are helped.

total cycles in shared programs: 321221834 -> 318333159 (-0.90%)
cycles in affected programs: 54932349 -> 52043674 (-5.26%)
helped: 95
HURT: 53
helped stats (abs) min: 4 max: 123390 x̄: 30648.39 x̃: 702
helped stats (rel) min: <.01% max: 28.87% x̄: 4.27% x̃: 2.87%
HURT stats (abs)   min: 4 max: 2357 x̄: 432.49 x̃: 113
HURT stats (rel)   min: <.01% max: 3.44% x̄: 1.03% x̃: 0.54%
95% mean confidence interval for cycles value: -26154.16 -12881.99
95% mean confidence interval for cycles %-change: -3.20% -1.55%
Cycles are helped.

total spills in shared programs: 19878 -> 19293 (-2.94%)
spills in affected programs: 3020 -> 2435 (-19.37%)
helped: 41
HURT: 2

total fills in shared programs: 20918 -> 19875 (-4.99%)
fills in affected programs: 3968 -> 2925 (-26.29%)
helped: 41
HURT: 2

LOST:   0
GAINED: 1

Ivy Bridge
total instructions in shared programs: 11875585 -> 11873641 (-0.02%)
instructions in affected programs: 78065 -> 76121 (-2.49%)
helped: 27
HURT: 0
helped stats (abs) min: 8 max: 134 x̄: 72.00 x̃: 72
helped stats (rel) min: 0.36% max: 4.23% x̄: 2.42% x̃: 2.42%
95% mean confidence interval for instructions value: -83.68 -60.32
95% mean confidence interval for instructions %-change: -2.78% -2.07%
Instructions are helped.

total cycles in shared programs: 178232734 -> 175769085 (-1.38%)
cycles in affected programs: 50018707 -> 47555058 (-4.93%)
helped: 27
HURT: 0
helped stats (abs) min: 82035 max: 99953 x̄: 91246.26 x̃: 92278
helped stats (rel) min: 4.40% max: 5.69% x̄: 4.93% x̃: 4.95%
95% mean confidence interval for cycles value: -93674.20 -88818.32
95% mean confidence interval for cycles %-change: -5.09% -4.78%
Cycles are helped.

total spills in shared programs: 4182 -> 3739 (-10.59%)
spills in affected programs: 1089 -> 646 (-40.68%)
helped: 27
HURT: 0

total fills in shared programs: 5216 -> 4345 (-16.70%)
fills in affected programs: 1874 -> 1003 (-46.48%)
helped: 27
HURT: 0

No changes on any earlier Intel platforms.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4156>
2020-05-07 10:55:50 -07:00
Ian Romanick
0d605a8bbf nir/algebraic: Recognize open-coded byte or word extract from bfe
v2: Move word-extract patterns up near the byte-extract patterns.
Suggested by Rhys.

Tiger Lake
total instructions in shared programs: 21369236 -> 21368712 (<.01%)
instructions in affected programs: 913104 -> 912580 (-0.06%)
helped: 209
HURT: 165
helped stats (abs) min: 1 max: 30 x̄: 5.35 x̃: 3
helped stats (rel) min: 0.03% max: 6.92% x̄: 0.28% x̃: 0.12%
HURT stats (abs)   min: 1 max: 18 x̄: 3.61 x̃: 3
HURT stats (rel)   min: 0.04% max: 0.87% x̄: 0.16% x̃: 0.12%
95% mean confidence interval for instructions value: -2.04 -0.76
95% mean confidence interval for instructions %-change: -0.14% -0.04%
Instructions are helped.

total cycles in shared programs: 490161481 -> 490175959 (<.01%)
cycles in affected programs: 72557244 -> 72571722 (0.02%)
helped: 193
HURT: 189
helped stats (abs) min: 1 max: 14240 x̄: 509.16 x̃: 71
helped stats (rel) min: <.01% max: 13.71% x̄: 0.44% x̃: 0.05%
HURT stats (abs)   min: 2 max: 4210 x̄: 596.53 x̃: 173
HURT stats (rel)   min: <.01% max: 5.59% x̄: 0.54% x̃: 0.14%
95% mean confidence interval for cycles value: -96.33 172.13
95% mean confidence interval for cycles %-change: -0.07% 0.16%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 10780 -> 10782 (0.02%)
spills in affected programs: 18 -> 20 (11.11%)
helped: 0
HURT: 1

total fills in shared programs: 10396 -> 10370 (-0.25%)
fills in affected programs: 2292 -> 2266 (-1.13%)
helped: 27
HURT: 1

Ice Lake
total instructions in shared programs: 19556356 -> 19555446 (<.01%)
instructions in affected programs: 833336 -> 832426 (-0.11%)
helped: 400
HURT: 0
helped stats (abs) min: 1 max: 20 x̄: 2.27 x̃: 2
helped stats (rel) min: 0.07% max: 4.42% x̄: 0.14% x̃: 0.10%
95% mean confidence interval for instructions value: -2.42 -2.13
95% mean confidence interval for instructions %-change: -0.18% -0.11%
Instructions are helped.

total cycles in shared programs: 488026481 -> 488008714 (<.01%)
cycles in affected programs: 81581708 -> 81563941 (-0.02%)
helped: 193
HURT: 206
helped stats (abs) min: 1 max: 3615 x̄: 576.35 x̃: 131
helped stats (rel) min: <.01% max: 4.50% x̄: 0.49% x̃: 0.22%
HURT stats (abs)   min: 1 max: 2244 x̄: 453.73 x̃: 170
HURT stats (rel)   min: <.01% max: 5.71% x̄: 0.36% x̃: 0.14%
95% mean confidence interval for cycles value: -127.23 38.17
95% mean confidence interval for cycles %-change: -0.12% 0.03%
Inconclusive result (value mean confidence interval includes 0).

total fills in shared programs: 9935 -> 9908 (-0.27%)
fills in affected programs: 2208 -> 2181 (-1.22%)
helped: 27
HURT: 0

Skylake
total instructions in shared programs: 17766078 -> 17765186 (<.01%)
instructions in affected programs: 822017 -> 821125 (-0.11%)
helped: 399
HURT: 1
helped stats (abs) min: 1 max: 20 x̄: 2.27 x̃: 2
helped stats (rel) min: 0.07% max: 4.46% x̄: 0.15% x̃: 0.10%
HURT stats (abs)   min: 12 max: 12 x̄: 12.00 x̃: 12
HURT stats (rel)   min: 0.50% max: 0.50% x̄: 0.50% x̃: 0.50%
95% mean confidence interval for instructions value: -2.39 -2.07
95% mean confidence interval for instructions %-change: -0.18% -0.11%
Instructions are helped.

total cycles in shared programs: 470905548 -> 470907497 (<.01%)
cycles in affected programs: 78598491 -> 78600440 (<.01%)
helped: 202
HURT: 192
helped stats (abs) min: 1 max: 3690 x̄: 228.98 x̃: 60
helped stats (rel) min: <.01% max: 4.51% x̄: 0.24% x̃: 0.03%
HURT stats (abs)   min: 1 max: 2260 x̄: 251.05 x̃: 77
HURT stats (rel)   min: <.01% max: 5.31% x̄: 0.24% x̃: 0.06%
95% mean confidence interval for cycles value: -45.01 54.90
95% mean confidence interval for cycles %-change: -0.07% 0.05%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 9941 -> 9943 (0.02%)
spills in affected programs: 26 -> 28 (7.69%)
helped: 0
HURT: 1

total fills in shared programs: 10293 -> 10268 (-0.24%)
fills in affected programs: 2391 -> 2366 (-1.05%)
helped: 27
HURT: 1

Broadwell
total instructions in shared programs: 17463211 -> 17462366 (<.01%)
instructions in affected programs: 861444 -> 860599 (-0.10%)
helped: 399
HURT: 1
helped stats (abs) min: 1 max: 20 x̄: 2.14 x̃: 2
helped stats (rel) min: 0.03% max: 4.46% x̄: 0.14% x̃: 0.09%
HURT stats (abs)   min: 7 max: 7 x̄: 7.00 x̃: 7
HURT stats (rel)   min: 0.33% max: 0.33% x̄: 0.33% x̃: 0.33%
95% mean confidence interval for instructions value: -2.26 -1.97
95% mean confidence interval for instructions %-change: -0.17% -0.10%
Instructions are helped.

total cycles in shared programs: 507048912 -> 506898243 (-0.03%)
cycles in affected programs: 79806433 -> 79655764 (-0.19%)
helped: 248
HURT: 136
helped stats (abs) min: 1 max: 8450 x̄: 1124.18 x̃: 64
helped stats (rel) min: <.01% max: 5.91% x̄: 0.83% x̃: 0.05%
HURT stats (abs)   min: 2 max: 7632 x̄: 942.12 x̃: 103
HURT stats (rel)   min: <.01% max: 5.62% x̄: 0.71% x̃: 0.08%
95% mean confidence interval for cycles value: -647.01 -137.73
95% mean confidence interval for cycles %-change: -0.47% -0.10%
Cycles are helped.

total spills in shared programs: 22996 -> 22998 (<.01%)
spills in affected programs: 31 -> 33 (6.45%)
helped: 0
HURT: 1

total fills in shared programs: 25951 -> 25923 (-0.11%)
fills in affected programs: 2444 -> 2416 (-1.15%)
helped: 29
HURT: 1

Haswell
total instructions in shared programs: 15841325 -> 15840554 (<.01%)
instructions in affected programs: 869679 -> 868908 (-0.09%)
helped: 394
HURT: 6
helped stats (abs) min: 1 max: 20 x̄: 2.15 x̃: 2
helped stats (rel) min: 0.06% max: 4.46% x̄: 0.14% x̃: 0.09%
HURT stats (abs)   min: 7 max: 18 x̄: 12.83 x̃: 13
HURT stats (rel)   min: 0.32% max: 0.82% x̄: 0.59% x̃: 0.61%
95% mean confidence interval for instructions value: -2.16 -1.69
95% mean confidence interval for instructions %-change: -0.16% -0.09%
Instructions are helped.

total cycles in shared programs: 520417167 -> 520279766 (-0.03%)
cycles in affected programs: 80949963 -> 80812562 (-0.17%)
helped: 246
HURT: 139
helped stats (abs) min: 1 max: 8152 x̄: 790.08 x̃: 129
helped stats (rel) min: <.01% max: 11.46% x̄: 0.70% x̃: 0.09%
HURT stats (abs)   min: 1 max: 7085 x̄: 409.78 x̃: 80
HURT stats (rel)   min: <.01% max: 5.25% x̄: 0.31% x̃: 0.06%
95% mean confidence interval for cycles value: -526.34 -187.43
95% mean confidence interval for cycles %-change: -0.49% -0.18%
Cycles are helped.

total spills in shared programs: 21714 -> 21729 (0.07%)
spills in affected programs: 174 -> 189 (8.62%)
helped: 0
HURT: 6

total fills in shared programs: 22136 -> 22132 (-0.02%)
fills in affected programs: 2848 -> 2844 (-0.14%)
helped: 31
HURT: 6

Ivy Bridge
total instructions in shared programs: 15177059 -> 15177003 (<.01%)
instructions in affected programs: 79370 -> 79314 (-0.07%)
helped: 29
HURT: 0
helped stats (abs) min: 1 max: 2 x̄: 1.93 x̃: 2
helped stats (rel) min: 0.06% max: 0.16% x̄: 0.08% x̃: 0.07%
95% mean confidence interval for instructions value: -2.03 -1.83
95% mean confidence interval for instructions %-change: -0.09% -0.07%
Instructions are helped.

total cycles in shared programs: 420424359 -> 420417254 (<.01%)
cycles in affected programs: 29562648 -> 29555543 (-0.02%)
helped: 23
HURT: 6
helped stats (abs) min: 2 max: 2741 x̄: 432.57 x̃: 142
helped stats (rel) min: <.01% max: 0.26% x̄: 0.04% x̃: 0.02%
HURT stats (abs)   min: 4 max: 1184 x̄: 474.00 x̃: 226
HURT stats (rel)   min: <.01% max: 0.11% x̄: 0.05% x̃: 0.05%
95% mean confidence interval for cycles value: -553.48 63.48
95% mean confidence interval for cycles %-change: -0.05% <.01%
Inconclusive result (value mean confidence interval includes 0).

total fills in shared programs: 6420 -> 6393 (-0.42%)
fills in affected programs: 1901 -> 1874 (-1.42%)
helped: 27
HURT: 0

No changes on any earlier Intel platforms.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4156>
2020-05-07 10:55:50 -07:00
Jan Zielinski
58dfb38f78 gallium/swr: Fix crashes in sampling code
Add missing functions used by the new
sampling code in llvmpipe (num_samples and
sample_stride)

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4947>
2020-05-07 17:31:21 +00:00
Tomeu Vizoso
58b66f82e6 panfrost: Handle MALI_RGB8_UNORM in panfrost_format_to_bifrost_blend
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4944>
2020-05-07 17:16:53 +00:00
Tomeu Vizoso
9c3e82296c panfrost: Don't trample on top of Bifrost-specific unions
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4944>
2020-05-07 17:16:53 +00:00
Alyssa Rosenzweig
7e53cce3ba pan/decode: Fix flags_hi printing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4944>
2020-05-07 17:16:52 +00:00
Tomeu Vizoso
a4d41a1510 panfrost: Add checksum BOs to batch
So they don't get released before the last frame finishes rendering.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4944>
2020-05-07 17:16:52 +00:00
Lionel Landwerlin
4f17e9eef6 anv: don't expose VK_INTEL_performance_query without kernel support
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2b5f30b1d9 ("anv: implement VK_INTEL_performance_query")
Acked-by: Timothy Strelchun <timothy.strelchun@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4937>
2020-05-07 16:42:44 +00:00
Connor Abbott
6d513eb0db tu: Support pipelines without a fragment shader
Apparently this is allowed, and the CTS started doing this more often
recently which resulted in frequent hangs running the entire CTS. I
copied the code to create an empty FS from radv.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4928>
2020-05-07 16:05:53 +00:00
Erik Faye-Lund
7ba2333cc1 util/os_memory: never use os_memory_debug.h
This is currently broken hard, because this code is being used in more
places that it used to be, and fixing that is prohibitively hard right
now.

This is far from ideal, as it leaves the same inconsistency in the
EMBEDDED_DEVICE code-path. But that only used by VMWare, so it's
probably better if they fix it, as they know their requirements better
than we do.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2911
Fixes: 76f79db3f5 ("util: stop including files from mesa/main")
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4919>
2020-05-07 13:34:30 +00:00
Jose Maria Casanova Crespo
905edc376d v3d: Include supported DXT formats to enable s3tc/dxt extensions
DXT1_RGBA and sRGB variants of DXT[135] formats are enabled as
valid format on V3D.

Once all S3TC formats supported by V3C are enabled the following
extensions become exposed by gallium.

    * GL_ANGLE_texture_compression_dxt3
    * GL_ANGLE_texture_compression_dxt5,
    * GL_EXT_texture_compression_dxt1
    * GL_EXT_texture_compression_s3tc
    * GL_S3_s3tc
    * GL_EXT_texture_compression_s3tc_srgb

This enables 206 passing piglit test related to gl_compressed.*s3tc_dxt

Cc: 20.0 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4934>
2020-05-07 14:03:34 +02:00
Jose Maria Casanova Crespo
e3ecf48dda v3d: Fix swizzle in DXT3 and DXT5 formats
Swizzles were ignoring the W component of the format DXT3_RGBA and
DXT5_RGBA.

This fixes 15 piglit tests:

spec/!opengl 1.1/copyteximage 2d
spec/!opengl 1.2/copyteximage 3d
spec/arb_texture_compression/fbo-generatemipmap-formats/gl_compressed_rgba
spec/arb_texture_compression/fbo-generatemipmap-formats/gl_compressed_rgba npot
spec/arb_texture_compression/texwrap formats bordercolor-swizzled/gl_compressed_rgba, swizzled, border color only
spec/arb_texture_compression/texwrap formats bordercolor/gl_compressed_rgba, border color only
spec/arb_texture_cube_map/copyteximage cube
spec/arb_texture_cube_map/copyteximage cube samples=2
spec/arb_texture_cube_map/copyteximage cube samples=4
spec/arb_texture_rectangle/copyteximage rect
spec/arb_texture_rectangle/copyteximage rect samples=2
spec/arb_texture_rectangle/copyteximage rect samples=4
spec/ext_texture_array/copyteximage 2d_array
spec/ext_texture_array/copyteximage 2d_array samples=2
spec/ext_texture_array/copyteximage 2d_array samples=4

Fixes: 469bbd8387 "broadcom/vc5: Move the formats table to per-V3D-version compile."
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4934>
2020-05-07 14:03:34 +02:00
Rhys Perry
17ed4a01ee docs/envvars: update RADV_FORCE_FAMILY
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4907>
2020-05-07 11:32:06 +00:00
Rhys Perry
5c6afd0f34 docs/envvars: document ACO_DEBUG
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4907>
2020-05-07 11:32:06 +00:00
Rhys Perry
1aaec1f3f4 docs: add src/amd/ to sourcetree.html
This file doesn't seem to have been updated in years but this was pretty
easy to do.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4907>
2020-05-07 11:32:06 +00:00
Pierre Moreau
38bbfd3a57 clover/nir: Check the result of spirv_to_nir
Fixes: deb04adf2a ("clover: add support for passing kernels as nir to the driver")
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4901>
2020-05-07 11:05:04 +00:00
Rhys Perry
abc4a82857 nir: make fsat return 0.0 with NaN instead of passing it through
This is how lower_fsat and ACO implements fsat and is a more useful
definition since it can be exactly created from fmin(fmax(a, 0.0), 1.0).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3716>
2020-05-07 10:39:19 +00:00
Rhys Perry
d8a27c0bb3 compiler/spirv: flag nclamp/nmin/nmax as exact
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3716>
2020-05-07 10:39:19 +00:00
Elie Tournier
9a11aa4ece docs/features: Add ARB_clear_texture to virgl
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4345>
2020-05-07 10:21:50 +00:00
Elie Tournier
2e6bbab9ae virgl: Enable CAP_CLEAR_TEXTURE if host supports it
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4345>
2020-05-07 10:21:50 +00:00
Elie Tournier
e705a2a9f4 virgl: implement ARB_clear_texture
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4345>
2020-05-07 10:21:50 +00:00
Gert Wollny
a6321c4b5a r600: Fix warning regarding mixing enums and unsigned in ?: expression
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4939>
2020-05-07 11:01:02 +02:00
Gert Wollny
5469fcea75 r600: remove some unused variables to silence warnings
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4939>
2020-05-07 11:00:54 +02:00
Gert Wollny
79f20eb819 r600/sb: replace memset by using member initialization/assignment
Closes #2860

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4939>
2020-05-07 11:00:51 +02:00
Gert Wollny
ee3f4ab2f4 r600: remove unused static functions
Related #2860

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4939>
2020-05-07 11:00:47 +02:00
Gert Wollny
9a244778f7 r600: Annotate some case fallthroughs
Also fix indentions where aproprate

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4939>
2020-05-07 11:00:26 +02:00
Samuel Pitoiset
f9dbca8db5 ci: run radv-fossils with Pitcairn (GFX6) and Bonaire (GFX7) too
This job is really small and it shouldn't hurt to cover two more
generations. This will prevent breaking the world on GFX6-GFX7
because we don't regularly test these chips.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4873>
2020-05-07 09:24:24 +02:00
Samuel Pitoiset
a44cfac502 ci: set ACO_DEBUG=validateir,validatera global for RADV testing
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4873>
2020-05-07 09:24:17 +02:00
Samuel Pitoiset
5dbf862b13 ci: remove unused .test-radv-fossilize rule
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4873>
2020-05-07 09:24:14 +02:00
Arcady Goldmints-Orlov
a0de2e0090 anv: increase minUniformBufferOffsetAlignment to 64
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4904>
2020-05-06 19:45:01 -05:00
Rob Clark
e8cdf12511 freedreno/a6xx: enable tiled compressed textures
I wasn't expecting this to be too useful, since compressed textures are
already block based.. but gfxbench gl_fill says otherwise.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4868>
2020-05-06 17:11:34 -07:00
Rob Clark
193560c44b freedreno/a6xx: compressed blit fixes
width/height are not necessarily aligned to block boundaries, so we need
to round up.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4868>
2020-05-06 17:11:34 -07:00
Kristian H. Kristensen
85f2cd84ac freedreno/a6xx: Set tfetch correctly for compressed formats
The fetchsize is just the blocksize for compressed formats, which gets
rid of the ASTC special cases add handles ETC1/2 as well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4868>
2020-05-06 17:11:34 -07:00
Kristian H. Kristensen
a34b3fa198 freedreno/fdl: Align after dividing by block size
For compressed formats, we need to align the number of blocks, not the
logical number of pixels in the texture.  Only compressed formats have
block width/height > 1, so we can just unconditionally multiply the
alignment by the block width/height.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4868>
2020-05-06 17:11:34 -07:00
Eric Engestrom
6292059662 docs: update calendar for 20.1.0-rc2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4927>
2020-05-06 21:54:47 +00:00
Eric Anholt
2637961d29 ci: Fix the nick used in IRC reporting.
robclark found that we needed unique IDs when multiple runners were trying
to report flakes at the same time, but it turns out due to nick limits (16
chars on freenode) we were just getting all the runners appended with
"-142" (or whatever the prefix of the pipelines are these days).  And, for
the new flake reporting from baremetal, all the runners ended up being
just "google-freedreno".

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4896>
2020-05-06 18:34:38 +00:00
Eric Anholt
2c50176dfe ci: Improve the flakes reports on IRC.
We were incorrectly taking the merge-request on non-MR pipelines (the
master build after merge) due to a missing '$'.  And, for those pipelines,
it would be nice to note whether they're for master or a stable branch.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4896>
2020-05-06 18:34:38 +00:00
Eric Anholt
3b5e71cb18 ci: Enable IRC flake reporting on freedreno baremetal boards.
The IRC channel is useful for me to track and ban flaky tests before they
irritate people too much.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2654
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4896>
2020-05-06 18:34:38 +00:00
Eric Anholt
c7bbc211d6 ci: Clean up setup of the job-specific env vars in baremetal testing.
Avoids copy and paste errors when adding more vars.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4896>
2020-05-06 18:34:38 +00:00
Marek Olšák
29da521280 radeonsi: fix compilation of monolithic PS
This was totally broken. Monolithic PS is only used if FBFETCH or
interpolateAtSample are used.

When the PS prolog was built, it overwrote ctx->main_fn.

Discovered by @eefano.

Fixes: 8832a88434 "radeonsi: move PS LLVM code into si_shader_llvm_ps.c"
Closes: #2814

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4918>
2020-05-06 17:02:23 +00:00
Marek Olšák
d5109741f3 tgsi_to_nir: translate non-vec4 image stores correctly
set the correct number of components for src data and the intrinsic

Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4908>
2020-05-06 16:39:07 +00:00
Danylo Piliaiev
784358bd6e i965: Fix out-of-bounds access to brw_stage_state::surf_offset
../src/mesa/drivers/dri/i965/brw_wm_surface_state.c:1378:32: runtime error: index 3503345872 out of bounds for type 'uint32_t [149]'

brw_assign_common_binding_table_offsets has the following comment:
 "Unused groups are initialized to 0xd0d0d0d0 to make it obvious that they're
 unused but also make sure that addition of small offsets to them will
 trigger some of our asserts that surface indices are < BRW_MAX_SURFACES."

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4350>
2020-05-06 16:09:20 +00:00
Erik Faye-Lund
7f6a491eec zink: lower b2b to b2i
Zink requires 1-bit booleans, but this requirement was missed before
b2b1s started getting automatically inserted. Let's lower these away, to
avoid piglit regressions.

Fixes the following piglits:
- shaders@glsl-vs-if-bool
- spec@!opengl 2.0@vertex-program-two-side

Fixes: c217ee8d35 ("nir: Insert b2b1s around booleans in nir_lower_to")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2902
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4903>
2020-05-06 09:20:27 +00:00
Samuel Pitoiset
f457e1b6d5 radv/winsys: do not count visible VRAM buffers twice in the budget
The VRAM size returned to apps is computed as follows:
vram_size = real_hw_vram_size - visible_vram_size.

Visible VRAM buffers should be counted only in the visible VRAM
counter and not twice. Buffers with the NO_CPU_ACCESS flag are
known to not be mappable, so they are counted in the VRAM counter.

Other buffers, with the CPU_ACCESS flag, or without any of both
(imported buffers) are counted in the visible VRAM counter because
they are mappable.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4834>
2020-05-06 06:58:24 +00:00
Samuel Pitoiset
f3e37f5d26 radv: display an error message if the winsys init failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4806>
2020-05-06 06:44:21 +00:00
Samuel Pitoiset
701f2c3dfc radv: use a linked list for physical devices
Instead of a static array inside the instance object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4806>
2020-05-06 06:44:21 +00:00
Samuel Pitoiset
8d993c9d2c radv: don't report error with other vendor DRM devices
Enumeration should just skip unsupported DRM devices.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4806>
2020-05-06 06:44:21 +00:00
Samuel Pitoiset
f03abd5041 radv: report INITIALIZATION_FAILED when the amdgpu winsys init failed
The driver should be capable if it reaches the winsys initialization.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4806>
2020-05-06 06:44:21 +00:00
Samuel Pitoiset
9c62e63aca radv: fix a memleak if the physical device initialization failed
The disk cache object should be freed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4806>
2020-05-06 06:44:20 +00:00
Samuel Pitoiset
b867a677e9 radv: rename radv_devices() to radv_enumerate_physical_devices()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4806>
2020-05-06 06:44:20 +00:00
Samuel Pitoiset
c504328741 radv: cleanup radv_CreateInstance()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4806>
2020-05-06 06:44:20 +00:00
Dave Airlie
dab8803af4 llvmpipe: enable ARB_sample_shading
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
8a83db4204 llvmpipe: add min samples support to the fragment shader.
This isn't enabled yet until the state gets hooked up

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
d237e03a16 llvmpipe: enable GL_ARB_shader_texture_image_samples
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
f036643772 gallivm/nir: hooks up texture samples queries
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
8d09d62137 gallivm/sample: add num samples query for txqs (v2)
v2: add false to the existing users (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
3cc50cabf1 llvmpipe: enable 4x sample MSAA + texture multisample
This enables proper support for 4xMSAA and for texture mulitsample
extension.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
94c4577331 drisw: add multisample support to sw dri layer.
This allocates the msaa resources like the dri2 layer
and adds the flushes

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
7898978377 llvmpipe: don't choose pixel centers for multisample
Don't pick the pixel centers for multisample rendering, fix
the setup program.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
8297513aa9 llvmpipe: choose correct position for multisample
For multisample we don't want pixel centers at this stage,
so don't add them in for that case.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
b72f504e99 llvmpipe: choose multisample rasterizer functions per triangle (v2)
This just picks the correct cmds to add to the scene.

v2: drop using 32-bit ms (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
26cc01cefd llvmpipe: generate multisample triangle rasterizer functions (v2)
This uses the templating to generate multisample version of the
tri plane raster functions

This doesn't generate any optimised version for lower plane numbers,
maybe this is worth doing in the future.

v2: drop generating 32-bit msaa (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
8611a6b34b llvmpipe: fixup multisample coverage masks for covered tiles
For fully covered tiles just pass in the filled out mask.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
2d13591ba4 llvmpipe: build 64-bit coverage mask in rasterizer
This adds the logic to build the per-sample masks at the lowest
level of the rasterizer block hierarchy

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
88851c4798 llvmpipe: add fixed point sample positions to scene.
These will be used in the rasterizer to generate the coverage masks

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
78b7f22838 llvmpipe: add new rast api to pass full 64-bit mask.
The 64-bit mask is a 16-bit mask per sample for up to 4 samples.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
c638a59fa8 llvmpipe: disable opaque variant for multisample
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
c5021ebb15 llvmpipe: fix multisample occlusion queries.
This needs to check the per-sample mask inside the loop if
multisample is enabled.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
335938cffd llvmpipe: move color storing earlier in frag shader
Move the color storage before the late Z test as for sample
shading it needs to be inside a loop with the fragment shader.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
acba9a93ef llvmpipe: pass mask store into interp for centroid interpolation
This enables centroid interpolation to work, using the current
coverage masks.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
367332b0fc llvmpipe: don't allow branch to end for early Z with multisample
Don't allow the branching optimisation with multisample enabled
as we have to check all samples.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
d9276ae965 llvmpipe: handle gl_SampleMask writing.
This is using a load/store to make it easier to add sample shading later.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:38 +00:00
Dave Airlie
69009949e0 llvmpipe: add multisample alpha to one support
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
66a92e5d92 llvmpipe: add multisample alpha to coverage support.
Converts alpha into coverage mask.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
38e81938b6 llvmpipe: hook up sample position system value
This creates a global static with the current sample positions,
and passes it to the fragment shader which uses it for interpolation
and sample position support.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
210d714f46 llvmpipe: handle multisample color stores.
Extract the final per-sample masks and store to the multisample
color buffers using them.

This retypes the pointer to a uint8_t at entry to make the
GEP simpler, then recasts to the blend type.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
102558912b llvmpipe: interpolate Z at sample points for early depth test.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
a0195240c4 llvmpipe: handle multisample early depth test/late depth write
A set of values have to be passed from the early depth test to the
late depth write, when multisampling is enabled, a range of those
values have to be stored between stages, so create storage for them
and pass the values through the storage.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
9f8c7e232e llvmpipe: multisample sample mask + early/late depth pass
Start adding support for multisample masks and the depth passes

The depth passes have to run per-sample, this isn't complete support
it adds the loops, and handles the execution masks.

One mask is stored per sample, they are combined post the early Z
pass into a single shader execution mask, and then the resulting
shader execution mask is anded back in for the late Z pass.

Init the vars to NULL to avoid gcc warnings

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
f12dac5e10 llvmpipe: move some fs code around
this just moves the num_fs loop around for follow on refactors

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
5e949b16c1 llvmpipe: add per-sample depth/stencil test
The current depth stencil test code has some optimisations using
the mask when there is only one depth value, multisample requires
per-sample zstencil testing, and for that case just pass in the
mask that needs updating.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
d297f2ecf1 llvmpipe: move getting mask value out of depth code. (v2)
In order to add per-sample support to this code, the mask
value is needed not the value from the exec mask.

v2: update comment

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
18fd62a26e llvmpipe: add per-sample interpolation.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
8154bdf25b llvmpipe: add centroid interpolation support.
This just adds the implementation and API to the interpolation builders.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
5697b9c00c llvmpipe: pass interp location into interpolation code.
This just tracks the attribute interpolation location into the
interp code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
339a3a4dea nir/tgsi: translate the interp location
translate sample and centroid locations.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
28cc2ed79c gallivm: add mask api to force mask
For per-sample shading the mask needs to be forced for each
iteration of the fragment shader.

Just adds the API for now.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
d89499063b gallivm: add sample id/pos intrinsic support
The sample position is looked up in an incoming array using the
sample id.

(These are mostly for ARB_sample_shading support)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
455c8e3584 llvmpipe: add cbuf/zsbuf + coverage samples to the fragment shader key.
These will cause different fragment shaders to be generated.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
d2f488684a llvmpipe: change mask input to fragment shader to 64-bit.
In order to handle a 4xMSAA mask (16-bits per sample) increase
the fragment shader API to be 64-bit.

v2: drop pointless if (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
67ec1760ee llvmpipe: add multisample bit to fragment shader key.
The fragment shader needs to be regenerated when multisample changes.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
f5463576b9 llvmpipe: plumb multisample state bit into setup code.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
e47d39aee1 llvmpipe/rast: fix tile clearing for multisample color and depth tiles
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
01e9779c00 llvmpipe: record sample info for color/depth buffers in scene
This adds the nr_samples + sample_stride to the scene records
for cbufs and zsbuf.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
a30db60ede llvmpipe: pass color and depth sample strides into fragment shader.
This just adds the interface and passes the depth and sample strides
into the fragment shader, nothing uses them yet.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
24cf7a2b36 draw: disable point/line smoothing for multisample (v2)
When MSAA is enabled smoothing is ignored

v2: As pointed out by Roland I got this completely wrong,
fix this to work the other way

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
4c72bb4a96 llvmpipe: handle multisample render target clears
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
782271c0e1 llvmpipe: add clear texture support for multisample textures.
This adds the clear paths for multisample textures.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
c8740cbf01 llvmpipe: add multisample resource copy region support.
This allows direct copies of all samples between two resources.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
178df06821 llvmpipe: add internal multisample texture mapping path.
For clearing and copying textures llvmpipe needs to internally
access the per-sample data.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
cab13f9174 llvmpipe: pass incoming sample_mask into fragment shader context.
This links up the api changing the sample mask to passing it into
the fragment shader.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
c070af8511 llvmpipe/jit: pass fragment sample mask via jit context.
The incoming sample mask for the fragment shader can be passed
via the jit context

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
0a6150251a llvmpipe: add get_sample_position support (v2)
This just adds the sample values for 4xmsaa, and hooks them
up to the get_sample_position API

v2: move to vulkan standard sample positions

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
f6383673c9 llvmpipe: fix race between draw and setting fragment shader.
There is a race with u_blitter shaders + pipeline shaders (aaline/aapoint)
where the draw bind can cause a pipeline flush which can use bind_fs_state to
 be reenters and llvmpipe->fs gets the wrong value. Fix this by only
setting the llvmpipe->fs value after the draw binding is complete.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
6befeb6607 gallium/util: split out zstencil clearing code.
llvmpipe will want to reuse this for it's multisample clears.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
bcbe5b3d26 llvmpipe: add a max samples define set to 4.
I doubt I'll care about much higher MSAA levels, so 4 it is.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
1b02eb1a4c llvmpipe: add multisample support to texture allocator.
This adds a sample stride field and allocates enough memory for
each sample storage. Hook up the sample_stride field to draw
and jit textures and images

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
339aec7241 util: add a resource wrapper to get resource samples
This return 1 as a baseline and should be used in allocator paths.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
1970390026 llvmpipe: add samples support to image jit
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
2e5cddacf7 llvmpipe: add num_samples/sample_stride support to jit textures
This adds the support for num_samples/sample_stride retrieval to the
jit texture infrastructure.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
bc3641d616 draw: add support for num_samples + sample_stride to the image paths
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
026bf26599 draw: introduce sampler num samples + stride members
This adds the num samples + sampler stride into the texture mapping paths,
currently drivers just pass 0 for now.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
609a3bea16 gallivm/nir: add multisample image operations
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
be8a10e265 gallivm/nir: add multisample support to image size
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
ae95a08b9c gallivm/nir/tgsi: add multisample texture sampling.
Both paths are required as u_blitter needs the TGSI path.

This just hooks the instructions up to the sampling code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
eb5919d9d8 gallivm/sample: add multisample image operation support
Just adds in the sample stride.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Dave Airlie
c2545c9b15 gallivm/sample: add multisample support for texel fetch
This adds a new callback to get the stride between the per-sample
images, adds a new value for the per-sample index to lookup,
and a flag to use multisampling.

gallivm/sample: add num samples interface for dynamic samplers

This will be used for getting number of samples in jit code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
2020-05-06 06:20:37 +00:00
Tomeu Vizoso
b6a20804ad virgl: Properly check for encode_stride when encoding transfers
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4763>
2020-05-06 08:04:58 +02:00
Dave Airlie
99fce3a6d7 llvmpipe: simple texture barrier implementation.
Just flush.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4774>
2020-05-06 15:09:42 +10:00
Dave Airlie
870b6a6050 llvmpipo/nir: free compute shader NIR
I forgot this in the last round.

Fixes: 18f896e55d (llvmpipe: add initial nir support)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4899>
2020-05-06 05:11:19 +10:00
Dave Airlie
d1ad1be35a draw/tess: free tessellation control shader i/o memory.
Fixes: 0d02a7b8ca (draw: add main tessellation code)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4899>
2020-05-06 05:11:07 +10:00
Rhys Perry
a46aa3dc2e nir: add missing group_memory_barrier handling
Totals from 2 (0.00% of 127638) affected shaders:
VGPRs: 164 -> 168 (+2.44%)
CodeSize: 18420 -> 18756 (+1.82%)
Instrs: 3658 -> 3700 (+1.15%)
Cycles: 82912 -> 83080 (+0.20%)
VMEM: 70 -> 69 (-1.43%)
PreVGPRs: 155 -> 168 (+8.39%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
CC: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4889>
2020-05-05 18:34:02 +00:00
Eric Anholt
9a6bbf4c80 freedreno/ir3: Disable sin/cos range reduction for mediump.
robclark noted that the blob wasn't doing range reduction in the mediump
case, and I confirmed it on
dEQP-GLES3.functional.shaders.operator.angle_and_trigonometry.sin.mediump_float_fragment
vs
dEQP-GLES3.functional.shaders.operator.angle_and_trigonometry.sin.highp_float_fragment.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4893>
2020-05-05 17:23:34 +00:00
Axel Davy
aac964af4a st/nine: Set correctly blend max_rt
Currently nine_convert_blend_state has no way
of knowing the number of rts.
For now set to an upper bound.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4891>
2020-05-05 16:45:06 +00:00
Marek Olšák
0d83e7f4b9 radeonsi: enable TC-compatible HTILE on demand for best Z/S performance
I haven't measured this, but it can only help.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866>
2020-05-05 16:27:29 +00:00
Marek Olšák
39571d384e radeonsi: allow tc_compatible_htile to be mutable
Move the relevant code from si_init_depth_surface to
si_emit_framebuffer_state, so that it can be changed after a pipe_surface
is initialized.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866>
2020-05-05 16:27:29 +00:00
Marek Olšák
04085bedc2 radeonsi/gfx9: always use IMG_DATA_FORMAT_S8_32 for 8-bit stencil
I wanna remove dependency on tc_compatible_htile from non-dynamic states.
This should be the same as 8_UINT if HTILE is disabled.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866>
2020-05-05 16:27:29 +00:00
Marek Olšák
345b8aed5c ac/surface: unset RADEON_SURF_TC_COMPATIBLE_HTILE if HTILE hasn't been computed
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866>
2020-05-05 16:27:29 +00:00
Marek Olšák
266fec1307 radeonsi: don't wait for idle at the end of gfx IBs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4894>
2020-05-05 11:52:21 -04:00
Pierre-Eric Pelloux-Prayer
ae4379d81e ac/nir: export some undef as zero
NIR already optimizes undef usage.
If undef reaches llvm, it's probably because of a broken shader.

In this situation, rather than letting llvm use the undef values
to do more optimization and probably produce incorrect results,
we replace undef values by 0.

"undef" values that are directly used in exports are kept as undef,
because this allows llvm to optimize them away.

This is only enabled for radeonsi.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2689
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607>
2020-05-05 12:26:26 +02:00
Pierre-Eric Pelloux-Prayer
0ee1a724bf gallium: add a new cap PIPE_CAP_GLSL_ZERO_INIT
Allows driver to select a zero init mode between the 3 possible values.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607>
2020-05-05 12:26:02 +02:00
Pierre-Eric Pelloux-Prayer
ea289d1502 mesa: extend GLSLZeroInit semantics
This commit introduces a new way to zero-init variables but keep the
old one to not break any existing behavior.

With this change GLSLZeroInit becomes an integer, with the following
possible values:
 - 0: no 0 init
 - 1: current behavior
 - 2: new behavior. Similar to 1, except ir_var_function_out type are
      0 initialized but ir_var_shader_out.

The rationale behind 2 is: zero initializing ir_var_shader_out can
prevent some optimization where out variables are completely eliminated
when not written to.

On the other hand, zero initializing "ir_var_function_out" has no
effect on correct shaders but typically helps shadertoy since the main
function is:

   void mainImage(out vec4 fragColor) { ... }

So with this change we're sure that fragColor will always get a value.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607>
2020-05-05 12:26:02 +02:00
Pierre-Eric Pelloux-Prayer
679421628b glsl: add a is_implicit_initializer flag
Shared globals and glsl_zero_init can cause linker errors if the
variable is only initialized in 1 place.

This commit adds a flag to variables that have been implicitely
initialized to be able in this situation to keep the explicit
initialization value.

Without this change the global-single-initializer-2-shaders piglit
test fails when using glsl_zero_init.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607>
2020-05-05 12:26:02 +02:00
Pierre-Eric Pelloux-Prayer
fa6b22d36a glsl: rework zero initialization
This commit makes zero_init a bitfield of types of variables to zeroinit.

This will allow some flexibility that will be used in the next commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607>
2020-05-05 12:26:02 +02:00
Pierre-Eric Pelloux-Prayer
84f58a0863 glsl: init gl_FragColor if zero_init=true
This fixes shaders doing "gl_FragColor += ..." and doesn't hurt correct
shaders, because the zero init is discarded.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607>
2020-05-05 12:26:02 +02:00
Pierre-Eric Pelloux-Prayer
547e81655a radeonsi: don't print gs_copy_shader stats for shaderdb
Fixes: dbc86fa3de ("radeonsi: dump shader stats when hitting the live cache")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607>
2020-05-05 12:26:02 +02:00
Samuel Pitoiset
b0a7499d28 radv: enable shaderInt16 unconditionally with LLVM and only GFX8+ with ACO
The Vulkan spec says:

"shaderInt16 specifies whether 16-bit integers (signed and unsigned)
are supported in shader code. If this feature is not enabled, 16-bit
integer types must not be used in shader code."

I think it's just safe to enable it because 16-bit integers should
be fully supported with LLVM and also with ACO and GFX8+. On GFX8
and earlier generations, throughput of 16-bit int is same as 32-bit
but that should't change anything.

For GFX6-GFX7 ACO support, we have to implement conversions without
SDWA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4874>
2020-05-05 10:04:36 +00:00
Pierre-Eric Pelloux-Prayer
64662dd5ba radeonsi: add workaround for issue 2647
For unknown reasons pixel shaders in KSP game get executed with
infinite interpolation coefficients and this causes an infinite
loop in the shader.

This commit adds a hacky workaround that kills pixel shaders if
invalid interp coeffs are detected and enables it for KSP.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2174
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2647
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4700>
2020-05-05 09:41:14 +00:00
Erik Faye-Lund
7983d97174 zink: use nir_lower_uniforms_to_ubo
Instead of open-coding uniform -> UBO lowering, let's instead use the
one that already exists. This should make things a bit simpler going
forward.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4734>
2020-05-05 09:17:52 +00:00
Louis-Francis Ratté-Boulianne
4777ee1a62 nir: Always create UBO variable when lowering uniforms to ubo
Zink needs to know the sizes of UBOs, and for normal UBOs we get this
from the nir_var_mem_ubo variables. This allows us to treat all of these
the same way.

We're about to need the same information for the in-progress D3D12
driver, so let's do this in a central location instead of in the driver.

This version is also a bit more careful than the Zink version. In
particular, for two reasons:
1. We increase the variable bindings when we adjust the pre-existing
   UBOs.
2. We increase shader->info.num_ubos when we insert a new UBO variable.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4734>
2020-05-05 09:17:51 +00:00
Erik Faye-Lund
354474b9e5 mesa/st: consider NumUniformBlocks instead of num_ubos when binding
This is the number of uniform blocks at linking time, not after
finalizing shaders.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4734>
2020-05-05 09:17:51 +00:00
Erik Faye-Lund
8471f7a5fa compiler/glsl: explicitly store NumUniformBlocks
It's not great to use shader_info for this information, because it
might have gone through lowering of uniforms to UBOs, which can change
the number of UBOs. So let's make sure we know the size of the
UniformBlocks array from when the shader was linked instead.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4734>
2020-05-05 09:17:51 +00:00
Danylo Piliaiev
8059f206da glsl: rename has_implicit_uint_to_int_conversion to *_int_to_uint_*
There is no uint to int implicit conversion in glsl, this is just
a typo in the name of this function. The correct one would be:
has_implicit_int_to_uint_conversion.

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4884>
2020-05-05 08:18:14 +00:00
Pierre-Eric Pelloux-Prayer
403eb507f5 driconf: add force_integer_tex_nearest option
And enable it for "GRID Autosport" and "DIRT: Showdown" games.

CC: 20.1 <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1258
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4647>
2020-05-05 09:40:29 +02:00
Pierre-Eric Pelloux-Prayer
12fb7d7008 mesa: add gl_coontext::ForceIntegerTexNearest
Some applications incorrectly use GL_LINEAR* values for integers texture.
copyimage.c already implemented a tolerance for such app in prepare_target_err.

This commit adds a boolean that will treat GL_LINEAR* filters as
GL_NEAREST for integer textures.

CC: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4647>
2020-05-05 09:40:29 +02:00
Samuel Pitoiset
90d9f9a37e aco: remove unecessary p_split_vector with v2b reg class
Should be fine now that RA take full registers for v2b if it's
not an SDWA instruction.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4879>
2020-05-05 08:50:10 +02:00
Joshua Ashton
b0cb38f360 vulkan: Update Vulkan XML and headers to 1.2.140
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4878>
2020-05-05 00:28:00 +00:00
Joshua Ashton
785803a2e5 turnip: Remove RANGE_SIZE usage
These were removed from the latest Vulkan headers
https://github.com/KhronosGroup/Vulkan-Docs/issues/1230

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4878>
2020-05-05 00:28:00 +00:00
Joshua Ashton
24f9aea770 radv: Remove RANGE_SIZE usage
These were removed from the latest Vulkan headers
https://github.com/KhronosGroup/Vulkan-Docs/issues/1230

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4878>
2020-05-05 00:28:00 +00:00
Joshua Ashton
c4d11ea3c4 anv: Remove RANGE_SIZE usage
These were removed from the latest Vulkan headers
https://github.com/KhronosGroup/Vulkan-Docs/issues/1230

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4878>
2020-05-05 00:27:59 +00:00
Mauro Rossi
5779694698 android: iris: add iris_seqno.{c,h} to Makefile.sources
Fixes the following undefined symbol building errors:

ld.lld: error: undefined symbol: iris_seqno_init
>>> referenced by iris_batch.c:187 (external/mesa/src/gallium/drivers/iris/iris_batch.c:187)
>>>               iris_batch.o:(iris_init_batch) in archive out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_iris_intermediates/libmesa_pipe_iris.a

Fixes: e31b703c ("iris: Place a seqno at the end of every batch")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
2020-05-04 22:33:04 +02:00
Marek Olšák
c4cdef64ad ac/surface: fix MSAA crash with FORCE_SWIZZLE_MODE on gfx9
Fixes: 3dc2ccc14c "ac/surface: replace RADEON_SURF_OPTIMIZE_FOR_SPACE with !FORCE_SWIZZLE_MODE"

Closes: #2884

Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4862>
2020-05-04 20:03:15 +00:00
Alyssa Rosenzweig
1dcf291e3b pan/bit: Add IMATH packing tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
8fcc23bf28 pan/bit: Factor out identity swizzle helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
36e4ffa382 pan/bit: Use swizzle helper for round
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
118d53bf93 pan/bit: Remove test names
We already have the disasm which is authoritative.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
52cdaaacbb pan/bit: Interpret v4i8 ops
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
66163614db pan/bit: Interpret IMATH
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
1799435df0 pan/bi: Don't schedule <32-bit IMATH to FMA
The ops don't exist.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
2925e88996 pan/bi: Add SUB.v2i16/SUB.v4i8 opcodes to disasm
Like their ADD counterparts. Only on ADD.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
10c18c6f69 pan/bi: Pack ADD IADD/ISUB for 8/16/32
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
a463b2c2ed pan/bi: Pack FMA IADD/ISUB 32
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
cf3c3563e0 pan/bi: Use IMATH for nir_op_iadd
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig
1a94daef58 pan/bi: Rename BI_ISUB to BI_IMATH
We'll use this for iadd, etc too which share similar characteristics.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Eric Anholt
5c81f51c3c freedreno/ir3: Define the bindful uniform/nonuniform desc modes for cat6 a6xx.
These come from the disasm tests, and fix our disasm of blob's
uniform/nonuniform cat6 operands.  We also now include human-readable names
for all the modes we know about (though bindless gets distinguished by its
.baseN, like Connor's original disasm).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4857>
2020-05-04 11:15:50 -07:00
Eric Anholt
97b21110b8 freedreno/ir3: Sync some new changes from envytools.
With this I also brought in a few new control flow instruction disasm
tests that I'd made back when I wrote the disasm test, but which were too
far from correct to include until now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4857>
2020-05-04 11:14:46 -07:00
Eric Anholt
1e5b0c92c5 freedreno/ir3: Add some more tests of cat6 disasm.
I put these together from traces I had while trying to do LDC for GL.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4857>
2020-05-04 11:14:46 -07:00
Marek Olšák
b97cc41aa2 Revert "ac: reassociate FP expressions for inexact instructions for radeonsi"
This reverts commit cf2f3c2753.

It breaks shadows in Unigine Superposition.

Fixes: cf2f3c2753

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4837>
2020-05-04 11:51:37 -04:00
Alyssa Rosenzweig
5f01869f74 pan/bit: Add ICMP tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:16 -04:00
Alyssa Rosenzweig
9bc684cad8 pan/bit: Add more 16-bit fmod tests
Swizzles and more abs.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:16 -04:00
Alyssa Rosenzweig
041ba62e87 pan/bit: Add swizzles to round tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:16 -04:00
Alyssa Rosenzweig
35c806e701 pan/bi: Don't pack ICMP on FMA
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:16 -04:00
Alyssa Rosenzweig
5cbdf29b7e pan/bi: Pack ADD ICMP 16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:16 -04:00
Alyssa Rosenzweig
5bd4172280 pan/bi: Pack ADD ICMP 32
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:16 -04:00
Alyssa Rosenzweig
336d5128f9 pan/bi: Structify ADD ICMP 16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:16 -04:00
Alyssa Rosenzweig
fdf154d24a pan/bi: Pack ADD.DISCARD
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:16 -04:00
Alyssa Rosenzweig
7a9b9859e7 pan/bi: Handle discard/branch in get_component_count
No dest requires special handling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:16 -04:00
Alyssa Rosenzweig
8ab5c97895 pan/bi: Fuse conditions into discard_if
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
201a11a13a pan/bi: Add float-only mode to condition fusing
Useful for discards.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
7d867f787f pan/bi: Emit discard (not if)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
c9ab73296c pan/bi: Handle discard_if in NIR->BIR naively
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
6627b20de3 pan/bi: Unwrap BRANCH into CONDITIONAL class
We can simplify the IR considerably and unify more conditions, which
gives conditional discard for free.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
6e5d207293 pan/bi: Remove BI_GENERIC
Goofy.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
20cb039457 pan/bi: Structify DISCARD
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
5c03340fd1 pan/bi: Fix DISCARD ops in disasm
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
31a41bb6a6 pan/bi: Disable CSEL4 emit for now
We need proper scheduling for 4-src ops to work, so for now disable
condition fusing so we cap at 3-src at a performance penalty. A bit of a
hack but I'd rather not build hacks into a scheduler that will be
rewritten soon anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
e14e3065a9 pan/bi: Fix incorrectly flipped swizzle
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
8415b3d552 pan/bi: Fix missing swizzle
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
c9634894a6 pan/bi: Fix double-abs flipping
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
ef9b4b3a0b pan/bi: Set clause type for gl_FragCoord.z
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig
47c84ee735 pan/bi: Lower gl_FragCoord
We accept a sysval and emit various forms for each component.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:14 -04:00
Alyssa Rosenzweig
c5ef35c433 pan/bi: Passthrough direct ld_var addresses
Don't bother wasting a constant.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:14 -04:00
Alyssa Rosenzweig
513c774d58 pan/bi: Print bad instruction on src packing fail
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:14 -04:00
Alyssa Rosenzweig
0561fe3a06 pan/bi: Futureproof COMBINE lowering against non-u32
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:14 -04:00
Alyssa Rosenzweig
c48839086d pan/bi: Abort on unhandled intrinsics
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:14 -04:00
Alyssa Rosenzweig
94e6263c0b pan/bi: Abort on unknown op packing
We're stable enough this is better than just nop'ing it out.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:14 -04:00
Alyssa Rosenzweig
5a415259fc pan/bi: Add clause type for gl_FragCoord.zw load
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:14 -04:00
Alyssa Rosenzweig
30f07e0d84 panfrost: Setup gl_FragCoord as sysval on Bifrost
..rather than a varying.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:14 -04:00
Christian Gmeiner
89a41dae77 etnaviv: do not use int filter when anisotropic filtering is used
The blob does not use this combination. This change moves the
decision if int filter gets used to state emit time.

Fixes: 7aaa0e5908 ("etnaviv: add anisotropic filter support")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4872>
2020-05-04 14:39:24 +00:00
Christian Gmeiner
b38e51bd96 etnaviv: fix SAMP_ANISOTROPY register value
This caused some serious problems like shredded output, ~1fps and GPU hungs.

Fixes: 7aaa0e5908 ("etnaviv: add anisotropic filter support")
Reported-by: Lukas F. Hartmann <lukas@mntmn.com>
Tested-by: Lukas F. Hartmann <lukas@mntmn.com>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4872>
2020-05-04 14:39:24 +00:00
Jason Ekstrand
cb1e0db23e vulkan/wsi: Make wsi_swapchain inherit from vk_object_base
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
2020-05-04 14:06:27 +00:00
Jason Ekstrand
32f20783a5 vulkan: Add run-time object type asserts in handle casts
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
2020-05-04 14:06:27 +00:00
Jason Ekstrand
7628585dd7 anv: Refactor setting descriptors with immutable sampler
Don't call anv_sampler_from_handle if the handle may be invalid.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
2020-05-04 14:06:27 +00:00
Jason Ekstrand
73fb7cdbe1 vulkan,anv: Move the DEFINE_HANDLE_CASTS macros to vk_object.h
We've already got these duplicated a bunch of places.  They should
really probably live in common code.  The new versions take two more
arguments:

 1. The struct member which gets you from __driver_type to the
    vk_object_base.  This requires drivers which use this to also use
    vk_object_base.

 2. The VkObjectType enum which represents that object type.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
2020-05-04 14:06:27 +00:00
Jason Ekstrand
682c81bdfb vulkan,anv: Add a base object struct type
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
2020-05-04 14:06:27 +00:00
Jason Ekstrand
369703774c anv: Allocate CPU-side memory for events
As discrete graphics looms, we really need to stop storing CPU data
structures in GPU memory.  One of the most egregious instances of this
was VkEvent where we had a CPU data structure living inside a dynamic
state pool allocation.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
2020-05-04 14:06:27 +00:00
Jason Ekstrand
4ac4e8e11f anv: Stop clflushing events
They're allocated out of the dynamic state pool which is snooped.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
2020-05-04 14:06:27 +00:00
Jason Ekstrand
a9158f7951 vulkan,anv: Add a common base object type for VkDevice
We should keep this very minimal; I don't know that we need to go all
struct gl_context on it.  However, this gives us at least a tiny base on
which we can start building some common functionality.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
2020-05-04 14:06:27 +00:00
Jason Ekstrand
9d10bde5a8 vulkan: Allow destroying NULL debug report callbacks
Fixes: 086cfa5652 "anv: implementation of VK_EXT_debug_report extension"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4690>
2020-05-04 14:06:27 +00:00
Tapani Pälli
46b3cb011f st/mesa: destroy only own program variants when program is released
Earlier commit tried to achieve this but actually did more. This makes
sure the variants for other contexts continue to live.

Fixes: de3d7dbed5 ("mesa/st: release variants for active programs before unref")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2865
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4831>
2020-05-04 13:28:49 +00:00
Pierre-Eric Pelloux-Prayer
7e7bb38bd8 radeonsi: fix export count
Fixes: 17acff01a0 ("radeonsi: skip vs output optimizations for some outputs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2877
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4871>
2020-05-04 15:11:09 +02:00
Erik Faye-Lund
af55bdd05d vtn/opencl: native sqrt support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
2020-05-04 11:31:29 +00:00
Erik Faye-Lund
337ff9c088 vtn/opencl: native rsqrt support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
2020-05-04 11:31:29 +00:00
Erik Faye-Lund
2ab6a58c19 vtn/opencl: native recip support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
2020-05-04 11:31:29 +00:00
Erik Faye-Lund
a698c2eedb vtn/opencl: native powr support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
2020-05-04 11:31:29 +00:00
Erik Faye-Lund
594c49be08 vtn/opencl: native divide support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
2020-05-04 11:31:29 +00:00
Erik Faye-Lund
bce8a86b65 vtn/opencl: native variants of sin/cos
These obviously map directly to nir opcodes.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
2020-05-04 11:31:29 +00:00
Erik Faye-Lund
f76b379a9a vtn/opencl: add native_tan-support
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
2020-05-04 11:31:29 +00:00
Erik Faye-Lund
aab1361d59 compiler/nir: move tan-calculation to helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4811>
2020-05-04 11:31:29 +00:00
Dmitriy Nester
58bb817257 mesa: check draw buffer completeness on glClearBufferfv/glClearBufferuiv
From OpenGL 4.6, section 9.4.4 "Effects of Framebuffer Completeness on
Framebuffer Operations", page 332:

"An INVALID_FRAMEBUFFER_OPERATION error is generated by attempts to render
to or read from a framebuffer which is not framebuffer complete.
This error is generated regardless of whether fragments are actually read
from or written to the framebuffer. For example, it is generated when a
rendering command is called and the framebuffer is incomplete, even if
RASTERIZER_DISCARD is enabled."

Signed-off-by: Dmytro Nester <dmytro.nester@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4833>
2020-05-04 13:16:30 +03:00
Marek Olšák
f1a40a26a9 Revert "ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set"
This reverts commit f6d87ec8a9.

It breaks RADV.

Fixes: f6d87ec8a9 "ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4864>
2020-05-02 20:12:38 +00:00
Dave Airlie
ee8f60da19 i965: disable shadow batches when batch debugging.
If you want to dump batch state, it needs to have the relocs processed
but the relocs don't get processed on the shadow batch.

Choose debugging over speed here.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4846>
2020-05-03 05:47:23 +10:00
Dave Airlie
b2164320a0 i965: add support for gen 5 pipelined pointers to dump
I wanted to see inside these, so added support to the dumper.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4846>
2020-05-03 05:47:16 +10:00
Bas Nieuwenhuizen
df9629e593 radv: Extend tiling flags to 64-bit.
SCANOUT is bit 63 ....

Fixes: bfd9e7ff24 "radv: Use new scanout gfx9 metadata flag."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2879
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4859>
2020-05-02 14:19:01 +00:00
Rhys Perry
b5f7b0ce19 aco: add message to static_assert
static_assert without a message is only supported with C++17 and later.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: c99107ece0
    ('aco: add explicit padding for all Instruction sub-structs')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4850>
2020-05-02 13:59:05 +00:00
Rhys Perry
8e02de4d7f aco: remove use of f-strings
f-strings require Python 3.6 but 3.5 is still maintained and used.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2839
Fixes: 2ab45f41 ("aco: implement sub-dword swaps")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4850>
2020-05-02 13:59:05 +00:00
Nataraj Deshpande
49cc9e9526 anv: Disable extensions based on Android versions
This extends commit 2243f0cd for anv with additional
extensions for Pie and Q versions.

Fixes tests with 9_R11 CTS:
dEQP-VK.api.info.android#no_unknown_extensions
dEQP-VK.api.info.device#extensions.

v2: Use snake_case function name (Jason Ekstrand)
    Drop Change-Id in commit (Kristian H. Kristensen)

v3: Resolve meson-clang error for ANDROID_API_LEVEL.

Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4827>
2020-05-01 21:04:26 +00:00
Nataraj Deshpande
a77cf797f1 anv: Limit vulkan version to 1.1 for Android
Current Android dessert versions such as Pie, Q reject
vulkan version > 1.1. Clamp the vulkan versions to 1.1
for platforms running these Android desserts.

Fixes android.graphics.cts.VulkanFeaturesTest and
dEQP-VK.api.info.device#properties.

v2: Limit version with '!ANDROID' (Eric Engestrom and Tapani Pälli)

Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4781>
2020-05-01 20:50:54 +00:00
Caio Marcelo de Oliveira Filho
33c61eb2f1 iris: Implement ARB_compute_variable_group_size
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
2020-05-01 12:50:37 -07:00
Caio Marcelo de Oliveira Filho
e645bc6939 intel: Let drivers call brw_nir_lower_cs_intrinsics()
The motivating factor is: this lowering may cause
nir_intrinsic_load_local_group_size intrinsics to be added to the
shader, and by moving this around we make possible for the drivers to
lower that intrinsic by themselves.

Iris will do just that in a later patch for implementing variable
group size.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
2020-05-01 12:50:37 -07:00
Caio Marcelo de Oliveira Filho
2663759af0 intel/fs: Add and use a new load_simd_width_intel intrinsic
Intrinsic to get the SIMD width, which not always the same as subgroup
size.  Starting with a small scope (Intel), but we can rename it later
to generalize if this turns out useful for other drivers.

Change brw_nir_lower_cs_intrinsics() to use this intrinsic instead of
a width will be passed as argument.  The pass also used to optimized
load_subgroup_id for the case that the workgroup fitted into a single
thread (it will be constant zero).  This optimization moved together
with lowering of the SIMD.

This is a preparation for letting the drivers call it before the
brw_compile_cs() step.

No shader-db changes in BDW, SKL, ICL and TGL.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
2020-05-01 12:50:37 -07:00
Caio Marcelo de Oliveira Filho
4b000b491a intel/fs: Add an option to lower variable group size in backend
Adding this since Iris will handle variable group size parameters by
itself.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
2020-05-01 12:50:28 -07:00
Caio Marcelo de Oliveira Filho
0edb58a84e intel/fs: Clean up variable group size handling in backend
Just use the information from NIR shader_info.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
2020-05-01 12:50:28 -07:00
Kenneth Graunke
1800e4b58c iris: Implement PIPE_FLUSH_DEFERRED support.
(Co-authored with Chris Wilson.)

Frequently, games create fences and later check them with a timeout of
0 to see if that work has completed yet.  They do not want the work to
be flushed immediately upon fence creation.

This is what PIPE_FLUSH_DEFERRED does - it inhibits the flush at fence
creation time, but still guarantees that a flush will occur later on
once fence_finish() is called.

Since syncpts can only occur at batch boundaries, when deferring a
flush, we have to wait for the syncpt at the end of the batch being
constructed.  This is later than desired, but safe if blocking.  To
avoid extra delays, we additionally insert a PIPE_CONTROL to write an
availability bit at the exact point of the fence.  We can poll this
on the CPU, allowing us to check whether the fence has gone by, even
if the batch hasn't completed.  It can also let us skip kernel calls.

Improves performance in Bioshock Infinite by 10% on Icelake GT2 on
-ForceCompatLevel=5 settings.  Thanks to Felix Degrood and Mark Janes
for helping notice the extraneous stalls and batches, Marek Olšák for
adding deferred flush support to Gallium to solve this issue, and
Chris Wilson for reworking a lot of the internals of this work.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Kenneth Graunke
df09efe8df iris: Detect DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT kernel support
We will use this for implementing deferred flushes in the next commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Kenneth Graunke
615270502c intel: Move anv_gem_supports_syncobj_wait to common code.
This will let me use this in iris.

We leave the existing anv function for anv_gem_stubs.c faking, but
move the contents to a helper in a new src/intel/common/gen_gem.c file.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Kenneth Graunke
07fb925ad8 iris: Flush any current work in iris_fence_await before adding deps
Receiving a fence_server_sync (iris_fence_await) means that any future
work needs to wait for the fence.  But previous work doesn't need to.

So flush it now, to avoid delaying it arbitrarily.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Chris Wilson
3dbde89111 iris: Store a seqno for each batch in the fence
In the next patch, we will introduce deferred fences where we will need
to flush a fence later. To do this, we need to know which batch requires
flushing, so keep a 1:1 mapping between seqno[] and the associated
batch.

It's also substantially less confusing to have a 1:1 mapping.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Chris Wilson
fd1907efb3 iris: Convert fences to using lightweight seqno
By using the breadcrumbs we inject into the batch, we can build a
lightweight fence - that can be evaluated in userspace without having to
check in the kernel. In order to pass the fences between processes, and
to wait efficiently, we continue to track the syncobj for each batch and
use that as a terminator for the fence, and for passing coarse
scheduling decisions to the kernel on execbuf.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Chris Wilson
e31b703c42 iris: Place a seqno at the end of every batch
We can use seqno as a basic for fast userspace fences: where we can
check a value directly to test for fence completion without having to
query using the kernel. To do so we need to write a breadcrumb from the
batch and track those writes as the basis for our lightweight fences.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Kenneth Graunke
fb95ac6855 iris: Destroy transfer slab after batches
Batches are going to have an uploader in the next commit, so destroying
batches will destroy uploaders, which will unmap transfers, which will
return things to the slab allocator.  So we need to reorder destroying
the slab allocator to the end to avoid crashing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Kenneth Graunke
c94379c770 iris: Give up on not passing ice to iris_init_batch
We're going to need it to create a uploader in the batch soon.  We still
avoid storing it, to maintain the charade of separation, and make people
think twice about fetching random fields from there and intertwining
things even worse.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Kenneth Graunke
4a1ed75b85 iris: Rename iris_syncpt to iris_syncobj for clarity.
This is just a refcounted wrapper around a drm_syncobj.  There is
enough terminology going on in the area of synchronization (sync
objects, sync files, ...) that I'd rather not invent our own.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Kenneth Graunke
812cf5f522 anv: Include linux/sync_file.h instead of cut and pasting contents
Linux 4.7 has been out for a long time, this is probably safe to
depend on at this point, rather than cut and pasting the contents.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Kenneth Graunke
abf8aed680 iris: Include linux/sync_file.h instead of cut and pasting contents
Lets us drop some cut and pasted kernel header contents.

Linux 4.7 came out 4 years before we the first officially supported
release of this driver; iris won't run on kernels older than 4.16,
and 4.18.11+ is strongly recommended.  So I suspect it's safe to
assume that a kernel header from 4.7 will exist at build time.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Alyssa Rosenzweig
a807c9e91d panfrost: Update dEQP expectation list
These tests were recently fixed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
2020-05-01 18:26:37 +00:00
Alyssa Rosenzweig
211dee42d0 pan/mdg: Enable nir_opt_algebraic_distribute_src_mods
Helps cleanup some issues otherwise missed by the new source mod
handling. (Noticed a double negative)

total instructions in shared programs: 3606 -> 3605 (-0.03%)
instructions in affected programs: 41 -> 40 (-2.44%)
helped: 1
HURT: 0

total bundles in shared programs: 1883 -> 1883 (0.00%)
bundles in affected programs: 0 -> 0
helped: 0
HURT: 0

total quadwords in shared programs: 3296 -> 3324 (0.85%)
quadwords in affected programs: 596 -> 624 (4.70%)
helped: 0
HURT: 2

total registers in shared programs: 337 -> 336 (-0.30%)
registers in affected programs: 6 -> 5 (-16.67%)
helped: 1
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
2020-05-01 18:26:36 +00:00
Alyssa Rosenzweig
1c2d469506 pan/mdg: Drop opt in name of midgard_opt_cull_dead_branch
It's necessary for conformance - not an optimization.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
2020-05-01 18:26:36 +00:00
Alyssa Rosenzweig
ba9f3d1702 pan/mdg: Drop forever todo
Not much to be done.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
2020-05-01 18:26:36 +00:00
Alyssa Rosenzweig
23a20cfcf3 pan/mdg: Move constant switch opts to algebraic pass
No shader-db changes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
2020-05-01 18:26:36 +00:00
Alyssa Rosenzweig
1628c144a9 pan/mdg: Rename .one to .sat_signed
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
2020-05-01 18:26:36 +00:00
Alyssa Rosenzweig
f47c60b411 pan/mdg: Ingest actual isub ops
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4852>
2020-05-01 18:26:36 +00:00
Jose Fonseca
f8601110e4 glthread: Add GLAPIENTRY to _mesa_marshal_MultiDrawArrays.
Fixes MSVC build.  Trivial.

Fixes: 2840bc3065
2020-05-01 19:15:11 +01:00
Caio Marcelo de Oliveira Filho
2a05ba5414 intel/dev: Bail when INTEL_DEVID_OVERRIDE is not valid
Avoids surprises where you set an OVERRIDE but it gets ignored and the
system PCI ID is used.

Also fixes the bug that the error of invalid platform name being
printed too early, even when the passed platform was a PCI ID (which
is also supported).

For the case where euid != uid, a warning was added but the behavior
wasn't changed: it is still going to fallback to system PCI ID.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4841>
2020-05-01 10:12:01 -07:00
D Scott Phillips
65b05ebdda anv,iris: Fix input vertex max for tcs on gen12
gen12 does away with the single patch dispatch mode for tcs, and
increases some limits so that 8_patch mode can always work. Make the
necessary changes so we don't try to fall back to single patch mode.

Fixes KHR-GL46.tessellation_shader.single.max_patch_vertices and others

Fixes: 44754279ac ("intel/fs/gen12: Use TCS 8_PATCH mode.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4843>
2020-05-01 16:49:11 +00:00
Eric Anholt
8f01fa1fb3 freedreno/ir3: Set the FS .msaa flag to true during precompiles.
If you're going out of your way to do per-sample interpolation, you are
almost surely going to be doing so to an MSAA framebuffer.  Should reduce
recompiles with MSAA enabled.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:32 +00:00
Eric Anholt
812c55b079 freedreno: Immediately compile a default variant of shaders.
Now that we normalize our keys fairly well, build a variant at shader
state creation time so that hopefully you don't have to call the compiler
at draw time (as is now the case with glmark2 ES and most of the humus GL
demos).

Fixes: #2782
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:32 +00:00
Eric Anholt
29f58cfbd0 freedreno/ir3: Set up outputs for multi-slot varyings.
Necessary to avoid compiler assertion failures in:

dEQP-GLES31.functional.program_interface_query.program_output.type.interface_blocks.out.named_block_explicit_location.struct.mat3x2

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:32 +00:00
Eric Anholt
88dcfaf0ee freedreno/ir3: Stop initializing regid of so->outputs during setup.
It's unused and overwritten by ir3_compile_shader_nir().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:32 +00:00
Eric Anholt
8c1c218909 freedreno/ir3: Improve shader key normalization.
We can remove a bunch of conditional code at key comparison time by
computing a bitmask of used key bits at ir3_shader creation time.  This
also gives us a nice place to put additional key simplification to reduce
how many variants we create (like skipping rastflat if we don't read
colors in the FS, or skipping vclamp_color if we don't write colors).

It does mean walking the whole key to AND it, but the key is just 28 bytes
so far so that seems pretty fine.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:32 +00:00
Eric Anholt
6f1e3235f2 freedreno: Emit debug messages when doing draw-time recompiles of shaders.
Right now that's "always" unless you have shaderdb set.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:32 +00:00
Eric Anholt
a361567c46 freedreno/ir3: Remove unused half precision shader key flag.
The code using it was removed in 4af86bd0b9 ("freedreno/ir3: remove
half-precision output")

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:32 +00:00
Eric Anholt
05be0659fe freedreno: Fix assertion failures on GS/tess shaders with shader-db enabled.
We weren't filling in the tess mode of the key, or setting has_gs on GS
shaders, resulting in assertion failures when NIR intrinsics didn't get
lowered.

We have to make a guess at prim mode for TCS, but it should be better to
have some shader-db coverage than none, and it will avoid these failures
happening when we start precompiling shaders.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:32 +00:00
Eric Anholt
f91e49ee29 freedreno/ir3: Skip tess epilogue if the program is missing stores.
Some of the negative API tests make shaders for tess stages that don't do
all the stores they need to.  Once we start precompiling (or doing
shader-db of tess), we need to at least not segfault when generating them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:32 +00:00
Eric Anholt
fd8f3b62a4 freedreno: Stop doing binning shaders other than the VS in shader-db.
ir3_cache.c only ever asks for binning variants for VS.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:32 +00:00
Eric Anholt
b420d04e1f freedreno/ir3: Fix register allocation assertion failures.
We were failing to tell the allocator about the restriction that scalar
texture instructions (allocated as scalar regs) couldn't be allocated such
that the start of the full unwritemasked vector started before r0.  There
was a patch in select_reg_callback on a6xx that tried to work around that,
but you could still end up backed into a corner you shouldn't be because
we didn't tell the RA what it needed.

Fixes compiler assertion failures on a300-a400's blit_z shader, used for
Z32F gmem blits.

Looks like as a result we get tighter register allocation but more nops:

instructions in affected programs: 757945 -> 760356 (0.32%)
nops in affected programs: 317983 -> 320468 (0.78%)
non-nops in affected programs: 27525 -> 27451 (-0.27%)
mov in affected programs: 3098 -> 3023 (-2.42%)
dwords in affected programs: 109664 -> 110656 (0.90%)
last-baryf in affected programs: 112701 -> 112847 (0.13%)
full in affected programs: 4326 -> 4011 (-7.28%)
sstall in affected programs: 120550 -> 120836 (0.24%)
(ss) in affected programs: 13939 -> 13918 (-0.15%)
(sy) in affected programs: 3006 -> 2786 (-7.32%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:32 +00:00
Kristian H. Kristensen
73f34e0d46 freedreno/ir3: Drop hack to clean up split vars
When the GS lowering was working on store_output intrinsics, we had to
clean up the split vars to avoid getting confused.  Now that we shadow
the output vars instead, there's no confusion and we can drop this
hack.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:31 +00:00
Kristian H. Kristensen
dd8d257a30 freedreno/ir3: Lower GS builtins before lowering IO
We mostly got away with replacing a store_output with a store_var, but
for complex types like structs, that doesn't work. Once the IO has
been lowered from vars to intrinsic, we've lost the deref chains and
can't properly shadow the outputs.

This commits moves the GS lowering up so we do it before the output
variables get lowered to store_output.  This way the pass works much
like nir_lower_io_to_temporaries() and cleanly shadows the outputs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:31 +00:00
Kristian H. Kristensen
79355fd901 freedreno/ir3: Add ir3_nir_lower_to_explicit_input() pass
This pass lowers per-vertex input intrinsics to load_shared_ir3. This
was open coded in the TCS and GS lowering passes before - this way we
can share it. Furthermore, we'll need to run the rest of the GS
lowering earlier (before lowering IO) so we need to split off this
part that operates on the IO intrinsics first.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:31 +00:00
Kristian H. Kristensen
b7bfccf085 freedreno/ir3: Rename ir3_nir_lower_to_explicit_io
We rename it to ir3_nir_lower_to_explicit_output, since it only
handles output and we'll add a lowering pass for input next.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:31 +00:00
Kristian H. Kristensen
a16ee14f37 freedreno/ir3: Pass stream output info to ir3_shader_from_nir
We need shader->stream_output filled out when we layout the push
constants in ir3_setup_const_state(). Otherwise
const_state->offsets.tfbo ends up as ~0, which doesn't work.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:31 +00:00
Eric Anholt
07f89126cd freedreno/ir3: Fix the a3xx TF outputs stores.
We were trying to deref the vector-collected outputs[] array before it's
been set up, but we want the per-component outputs anyway.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:31 +00:00
Eric Anholt
b0b8011e3e freedreno/ir3: Set up the block predecessors for a3xx TF
Fixes a segfault in ir3_legalize.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
2020-05-01 16:26:31 +00:00
D Scott Phillips
7bd15135a6 intel/fs: Update location of Render Target Array Index for gen12
Render Target Array Index has moved from R0.0[26:16] to
R1.1[26:16] on gen12.

Fixes dEQP-VK.multiview.input_attachments.*

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4836>
2020-05-01 08:48:22 -07:00
Tomeu Vizoso
7eb2bc8f52 pan/decode: Properly print tripped zeroes
The "%" got lost.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Fixes: 6148d1be4b ("panfrost: Fix size of bifrost sampler descriptor")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:52:46 +02:00
Tomeu Vizoso
3a81abf3b2 panfrost: Add Bifrost texture trampoline BO to batch
Fixes: d3eb23adb5 ("panfrost: Emit sampler descriptor on bifrost")
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:52:40 +02:00
Alyssa Rosenzweig
c46731527a pan/bi: Lower for now sincos
Will be implemented later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:52:36 +02:00
Tomeu Vizoso
3baf251487 panfrost: mali_attr_meta.unknown1 is zero on Bifrost
For unknown1 reasons :)

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:52:32 +02:00
Tomeu Vizoso
c4400b05be panfrost: GPUs newer than G-71 don't have swizzles...
for attributes and varyings.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:52:28 +02:00
Tomeu Vizoso
c409428006 pan/decode: Trace to stderr with PANDECODE_DUMP_FILE=stderr
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:52:23 +02:00
Alyssa Rosenzweig
d6588b87bf panfrost: Update Bifrost fields in mali_shader_meta
Not much is known currently about these fields and their values, but
this gets things going in the scenarios we have been testing with so
far.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:52:19 +02:00
Tomeu Vizoso
07b31f3437 pan/bi: Print shaders only if BIFROST_MESA_DEBUG=shaders
Similar to how it's done in the Midgard compiler.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:52:16 +02:00
Alyssa Rosenzweig
9c7d30fb4a pan/bi: Enable lower_mediump_outputs NIR pass
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:52:11 +02:00
Tomeu Vizoso
7104e28651 panfrost: Add a bit more info about some tiler fields
Has been observed that after the job chain has completed, those fields
become populated.

tiler_heap_next_start contains an address inside the tiler heap, a bit
before the value that the GPU writes to tiler_heap_free.

used_hierarchy_mask contains a hex value that corresponds to values
observed as hierarchy masks.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:52:07 +02:00
Tomeu Vizoso
4d581a4bc6 panfrost: Create additional BO for the checksum of imported BOs (Bifrost)
Similar to what the blob does. My reason for doing this was mainly so
traces weren't as different, which makes it more work to spot
relevant differences.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:52:03 +02:00
Tomeu Vizoso
28902ba87e panfrost: Split bit out of format.unk3
On Bifrost traces, we can observe that this bit is always enabled.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
2020-05-01 16:51:36 +02:00
Samuel Pitoiset
7f130e76ea ci: add lists of expected failures & skipped tests for RAVEN with ACO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4848>
2020-05-01 16:07:47 +02:00
Andres Gomez
263ed2e777 scripts: remove unittest.mock dependency when not used
Found upon inspection.

Signed-off-by: Andres Gomez <agomez@igalia.com
Reviewed-and-Tested-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4840>
2020-05-01 15:01:51 +03:00
Samuel Pitoiset
cc2c3b41b8 ci: fix reporting the number of unexpected/flakes
`wc -l $file` returns the number of lines and the filename.

Fixes: b8c66aeb93 ("ci: Clean up some excessive use of pipes in dEQP results processing.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4829>
2020-05-01 07:51:44 +00:00
Michel Dänzer
23daa49d4c gitlab-ci: Use YAML anchor for llvmpipe paths in virgl rules
Instead of duplicating them.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4808>
2020-05-01 07:19:05 +00:00
Rob Clark
60912f1ebd freedreno: we don't need aligned vbo's
This gets rid of the last reason that mesa/st would use `u_vbuf` on
a6xx.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4812>
2020-05-01 02:05:00 +00:00
Rob Clark
9a7c179473 freedreno/a6xx: add some more formats
u_vbuf was translating these for us.. which isn't really necessary.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4812>
2020-05-01 02:05:00 +00:00
Alyssa Rosenzweig
6f7d94580e pan/decode: Don't crash on missing payload
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
bde19c0e7b panfrost: Fix tiled texture "stride"s on Bifrost
They're not real strides like linear textures but the hw does use them
so we do have to get it right annoyingly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
bbecbedb4c panfrost: Fix norm coords on bifrost sampler
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
401409eff3 panfrost: Fix sampler wrap/filter field orders
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
6148d1be4b panfrost: Fix size of bifrost sampler descriptor
Should be 32-bytes, it looks like.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
884f869992 panfrost: Fix texture field size
I have to imagine this was UB.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
d04be375cc pan/bit: Add round tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
6bbedf8359 pan/bit: Interpret ROUND
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
f1f4f1b816 pan/bit: Add framework forinterpreting double vs float
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
130a3fba1c pan/bi: Pack round opcodes (FMA, either 16 or 32)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
5f35cdaa8d pan/bi: Pipe multiple textures through
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig
fc634dc3b2 pan/bi: Add texture indices to IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
2020-05-01 00:27:23 +00:00
Rob Clark
f8424d3b99 freedreno/a6xx: fix LRZ hang
In detecting the case where we actually do need to re-emit LRZ state
(due to new batch), we were checking `ctx->last.dirty` to detect when
we cannot trust previous state.  But this is cleared before we check
it.

Move where it is cleared to the end of the draw_vbo() path.

Fixes: dfa702e94b ("freedreno/a6xx: limit LRZ state emit")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4842>
2020-05-01 00:02:28 +00:00
Eric Anholt
0e51082cfa freedreno/ir3: Leave bools as 1-bit, storing them in full regs.
If use NIR's 1-bit bool representation , we get exactly the bool behavior
the hardware provides: CMPS produces true or false, AND/OR/XOR work as
intended without extra absnegs, and we can pass those half values directly
to other CMPS.  We emit an absneg for b2b1 ("turn a memory load into a
1-bit NIR boolean"), but we would have done so for the ir3_n2b() on the
use of that value anyway.  The most awkward bit is that inot(a@1) is now a
sub(1, a), but we can encode the 1 as an immediate so it's fine.

No significant changes to GL_TIME_ELAPSED on my set of traces (n=21).

instructions in affected programs: 1570638 -> 1548702 (-1.40%)
nops in affected programs: 624053 -> 611381 (-2.03%)
non-nops in affected programs: 959061 -> 949797 (-0.97%)
mov in affected programs: 5258 -> 5252 (-0.11%)
cov in affected programs: 15099 -> 15902 (5.32%)
dwords in affected programs: 469600 -> 452768 (-3.58%)
last-baryf in affected programs: 162211 -> 154726 (-4.61%)
full in affected programs: 4881 -> 4797 (-1.72%)
sstall in affected programs: 173953 -> 174545 (0.34%)
(ss) in affected programs: 10922 -> 10934 (0.11%)
(sy) in affected programs: 728 -> 745 (2.34%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4518>
2020-04-30 23:36:09 +00:00
Eric Anholt
769adc9546 freedreno/ir3: Drop redundant IR3_REG_HALF setup in ALU ops.
It's set by ir3_put_dst() immediately after.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4518>
2020-04-30 23:36:09 +00:00
Marek Olšák
bdd2f284d9 radeonsi: revert an accidental change in si_clear_buffer
The change was in: 7b0b085c94

Fixes: 7b0b085c94 ("radeonsi: drop the negation from fmask_is_not_identity")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák
5afec9bc9f radeonsi: fix si_compute_clear_render_target with render condition enabled
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák
19db1a540c radeonsi: add a workaround to fix KHR-GL45.texture_view.view_classes on gfx9
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák
d6acdbd935 radeonsi: implement and use compute-based DCC decompression on gfx9-10
DCC_DECOMPRESS doesn't work. Instead of trying to figure out why,
use a compute blit where the load is compressed and the store is
uncompressed.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák
d3da73954a radeonsi: add SI_IMAGE_ACCESS_DCC_OFF to ignore DCC for shader images
A shader-based DCC decompress pass will use this.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák
93d5c86081 radeonsi: bind shader images after DCC is disabled for image stores
This prevents an infinite recursion with a compute-based DCC decompression
when it restores shader images.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák
44d27fd6fb radeonsi: clean up and deduplicate code around internal compute dispatches
In addition to the cleanup, there are these changes in behavior:
- clear_render_target waits for idle after the dispatch and then flushes
  L0-L1 caches (this was missing)
- sL0 is no longer invalidated before the dispatch, because src resources
  don't use it
- sL0 is no longer invalidated after the dispatch if dst is an image

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák
e58dcc47c3 radeonsi: unify and align down the max SSBO/TBO/UBO buffer binding size
Rounding down the size fixes:
    KHR-GL45.enhanced_layouts.ssb_member_invalid_offset_alignment

Fixes: 03e2adc990

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák
b7ffa1560c tgsi_to_nir: handle TGSI_OPCODE_BARRIER
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák
d35c3dc80e tgsi_to_nir: handle TGSI_SEMANTIC_BLOCK_SIZE
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
2020-04-30 22:27:31 +00:00
Marek Olšák
2840bc3065 glthread: upload non-VBO vertices and indices for non-Indirect non-IBM draws
This is basically the same thing u_vbuf does.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
1485a3ff7b glthread: handle gl{Push,Pop}ClientAttrib{DefaultEXT} for glthread states
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
57bf51a973 glthread: handle POS vs GENERIC0 aliasing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
09f94632e0 glthread: initialize VAOs properly
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
47cf310a67 glthread: track primitive restart state
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
9037005d60 glthread: track instance divisor changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
c9c9f57b02 glthread: track pointers and strides for Pointer & EXT_dsa attrib functions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
befbd54864 glthread: don't use atomics for refcounting to decrease overhead on AMD Zen
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
7f22e0fd29 glthread: do glBufferSubData as unsynchronized upload + GPU copy
1. glthread has a private upload buffer (as struct gl_buffer_object *)
2. the new function glInternalBufferSubDataCopyMESA is used to execute the copy
   (the source buffer parameter type is struct gl_buffer_object * as GLintptr)

Now glthread can handle arbitrary glBufferSubData sizes without syncing.

This is a good exercise for uploading data outside of the driver thread.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
70847eb0a9 mesa: add _mesa_InternalBind{ElementBuffer,VertexBuffers} for glthread
Uploaded non-VBO user data will be set via these functions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
a82889e537 mesa: add glInternalBufferSubDataCopyMESA for glthread
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
3707cef4fb mesa: inline vbo_context inside gl_context to remove vbo_context dereferences
The number of lines in the disassembly of vbo_exec_api.c.o decreased
by 4.5%, which roughly corresponds to a decrease in instructions
for immediate mode thanks to the removal of ctx->vbo_context dereferences.

It increases performance in one Viewperf11 subtest by 2.8%.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
42842306d3 mesa,st/mesa: add a fast path for non-static VAOs
Skip most of _mesa_update_vao_derived_arrays if the VAO is not static.
Drivers need a separate codepath for this.

This increases performance by 7% with glthread and the game "torcs".

The reason is that glthread uploads vertices and sets vertex buffers
every draw call, so the overhead is very noticable. glthread doesn't
hide the overhead, because the driver thread is the busiest thread.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
2e3a9d7828 mesa: don't update shaders on fixed-func state changes if user shaders are bound
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
256d5ca80a mesa: don't set unnecessary program flags in _mesa_update_state
_NEW_PROGRAM is already set.
_NEW_FRAG_CLAMP is not used by the fixed-func fragment shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Mathias Fröhlich
b2b4afdc17 mesa: set _NEW_FRAG_CLAMP only when needed
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
21ff963c3a mesa: don't call _mesa_update_state for _mesa_get_clamp_fragment_color
It's not needed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Mathias Fröhlich
f1538002b8 st/mesa: Move _NEW_FRAG_CLAMP to NewFragClamp driver flag.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Marek Olšák
eb04db7344 mesa: optimize glPush/PopClientAttrib by removing malloc overhead
just declare all structures needed by the stack in gl_context.

This improves performance by 5.6% in the game "torcs". FPS: 101.01 -> 106.73

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
2020-04-30 22:01:55 +00:00
Rob Clark
beb02a781c freedreno/a6xx: don't set SP_FS_CTRL_REG0.VARYING for fragcoord
Similar change to 5785bcc8a0.  It appears
on a6xx and in fact this could cause varying corruption before the FS
had a chance to consume the varyings from varying storage.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2838
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4838>
2020-04-30 21:38:52 +00:00
Lionel Landwerlin
612e35c8d9 iris: don't assert on unfinished aux import in copy paths
After a resource is created the first command using it could be a copy
command.

In iris_state we finish the import on surface/view creation but we
don't do that for copies.

v2: Move finish call to gallium entrypoints (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2725
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4657>
2020-04-30 21:18:42 +00:00
Rob Clark
d56b8c4554 freedreno: sync registers with envytools
Pull in the `SP_xS_BRANCH_COND` regs to keep the mesa and envytools
copies from getting out of sync.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
200765457e freedreno/a6xx: more OUT_REG()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
f62cad6b7f freedreno: scissor vs disabled scissor micro-opt
We don't need to deref and check rast state every time scissor changes,
only when rast state changes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
373e9ab27c freedreno/a6xx: convert const emit to OUT_PKT()
This is another hot packet.  This splits out each of the four cases
(geom vs frag, and indirect vs inline) intentionally, to avoid some
parity bit calc.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
710537b19c freedreno/ir3: inline const emit
Drop vfunc callbacks for per-gen packet emit, and instead have a header
that is #include'd once per gen.

We'll end up with multiple copies of some of this, but since we never
have multiple gen's of adreno on a single device, only one copy will be
paged in (and hopefully in the I-cache for hot-paths)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
aff93f5419 freedreno/a6xx: split out const emit
In order to inline the const emit and drop the per-gen vfuncs to emit
the correct sort of packet, we should consolidate all of the entry-
points to const emit in one object file, otherwise we'll end up with
multiple copies per gen.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
58fd1d7ecd freedreno/a6xx: convert draw packet to OUT_PKT()
This is one of the hotter pkt7 packets, since it is guaranteed to happen
on every draw.  Switch to OUT_PKT() for less driver overhead in the draw
path.

Slight bit of cheating for using CP_DRAW_INDX_OFFSET_0 for the first
dword in all cases.  Possibly *gen_header.py* could be more clever
and use typedef's in the cases of bitsets like vgt_draw_initiator.
But this works out because it is always the first dword.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
ee293160d7 freedreno/a6xx: add OUT_PKT()
Similar to OUT_REG(), this has the benefits of:

1. No more messing up pkt size
2. Detects errors of mixing up the order of dwords in the packet
3. Optimizes to more efficient code

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
a142bb8992 freedreno/a6xx: skip unnecessary MRT blend state
To lower CP overhead.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
5d554987c2 freedreno/a6xx: combine sample mask into blend state
This gets rid of one lone register we used to emit directly in IB2
whenever blend state changes, at the expense of needing blend state
variants when sample-mask changes.  I think typically sample-mask
should not change frequently, so this seems like a fair trade-off.

To further limit the # of variants, we ignore sample-mask bits that
are not relavant for the current # of samples.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
880edb9dc5 freedreno/a6xx: move blend-color to stateobj
To reduce CP overhead for draws skipped in a bin.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
dfa702e94b freedreno/a6xx: limit LRZ state emit
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
3c268afd29 freedreno/a6xx: limit PROG_FB_RAST state emit
The dependency on RASTERIZER state is only when rasterizer_discard
changes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
46e177389f freedreno/a6xx: move scissor state to stateobj
To reduce CP overhead for draws skipped in a given tile.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
8cfa765049 freedreno/a6xx: move const state to single stateobj
In practice, we end up updating all the shader stages at the same time.
So collapse this into a single group.

Reduces CP overhead.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
89dbdb806f freedreno/a6xx: avoid unnecessary clearing VS DP state
If there is no (potentially unflushed) VS driver-param state, we don't
need to emit a DISABLE on each frame.  So avoid that to reduce CP
overhead.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
f583dc68e5 freedreno/a6xx: small query cleanup
Don't open-code `fd6_event_write()`

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
e3fc8dd001 freedreno/drm: inline the things
The existing structure dates back to when this code was part of libdrm,
and we wanted some of this not to be exposed as ABI between libdrm and
mesa.  Now that this is no longer a constraint, inline things.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Rob Clark
75435d5e2a freedreno/drm: drop atomic refcnts
Since we dropped the async flush_queue, we no longer need the refcnts to
be atomic.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
2020-04-30 20:03:17 +00:00
Eric Anholt
4715502975 freedreno/ir3: Initialize the unused dwords of the immediates consts.
Avoids having spurious differences (and weird values to look at!) in
traces from uninitialized memory.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4824>
2020-04-30 19:23:39 +00:00
Jason Ekstrand
3fac55ce0d Revert "anv/gen12: Temporarily disable VK_KHR_buffer_device_address (and EXT)"
This reverts commit c61ad77cd2.  We now no
longer have a problem with these.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4819>
2020-04-30 14:45:50 +00:00
Jason Ekstrand
4985e380dd intel/eu: Use non-coherent mode (BTI=253) for stateless A64 messages
We don't care about full IA coherency since we always have the
opportunity in GL or Vulkan to flush the data cache.  Using IA-coherent
mode is likely just making A64 access slower than it needs to be.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4819>
2020-04-30 14:45:50 +00:00
Tomeu Vizoso
0edc29020b pan/decode: Use correct printf modifier for long int
As reported by Coverity:
>>>     CID 1462605:  API usage errors  (PRINTF_ARGS)
>>>     Argument "p->zero5" to format specifier "%x" was expected to have type "unsigned int" but has type "unsigned long".

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4724>
2020-04-30 16:27:46 +02:00
Tomeu Vizoso
03963febef pan/decode: Check for correct unknown field
As reported by Coverity:

>>>     CID 1462606:  Incorrect expression  (COPY_PASTE_ERROR)
>>>     "unk1" in "s->unk1" looks like a copy-paste error.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4724>
2020-04-30 16:27:42 +02:00
Tomeu Vizoso
bc11deb86d panfrost: Don't leak temporary descriptors array
As found by Coverity:

>>>     CID 1462596:  Resource leaks  (RESOURCE_LEAK)
>>>     Variable "descriptors" going out of scope leaks the storage it points to.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4724>
2020-04-30 16:27:38 +02:00
Tomeu Vizoso
3c98c452f0 panfrost: Emit blend descriptors on Bifrost
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4724>
2020-04-30 16:27:34 +02:00
Alyssa Rosenzweig
33b13b9fbd panfrost: Enumify bifrost blend types
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4724>
2020-04-30 16:27:29 +02:00
Andres Gomez
5e9ae40430 gitlab-ci: update tracie README after changes in main script
v2:
  - Update the default location for the traces when there is no
    traces-db entry in the traces definition file (Alexandros).

Fixes: 90a39af5f6 "(ci: Drop the git dependency in tracie)"
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4640>
2020-04-30 12:21:28 +00:00
Andres Gomez
bd86399db0 .mailmap: add an alias for Andres Gomez
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4739>
2020-04-30 14:33:20 +03:00
Andres Gomez
3cde4c3a08 .mailmap: add an alias for Iago Toral Quiroga
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4739>
2020-04-30 14:33:20 +03:00
Lionel Landwerlin
2a70fee7dc ci: Add intel to shaderdb runs
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4594>
2020-04-30 11:32:54 +03:00
Lionel Landwerlin
0f4f1d70bf intel: add stub_gpu tool
Run shaderdb like this :

   intel_stub_gpu -p bxt ./run ./shaders/*

List of platform names is available from
gen_device_name_to_pci_device_id() (src/intel/dev/gen_device_info.c).

v2: Add missing getparam support
    Raise max soft limit of file descriptors

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4594>
2020-04-30 11:32:54 +03:00
Lionel Landwerlin
8c3c1d8a99 intel/dev: print out error when platform is not found by name
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4594>
2020-04-30 11:32:54 +03:00
Lionel Landwerlin
fd3c014672 drm-shim: silence warnings
Matt is seeing a bunch of warnings :

   drm_shim.c:312:4: warning: ignoring return value of ‘asprintf’, declared with attribute warn_unused_result [-Wunused-result]

v2: Add nofail variants of *asprintf (Eric)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4594>
2020-04-30 11:32:54 +03:00
Lionel Landwerlin
764ef4bf1a drm-shim: don't create a memfd per BO
Running shader-db on big servers with many cores, we're running out of
file descriptors.

Use a single 4Gb memfd instead and allocate from it using a VMA.

v2: Align VMA allocation to 4096 (Eric)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4594>
2020-04-30 11:32:54 +03:00
Lionel Landwerlin
6b34c8d35f drm-shim: move handle lock to shim_fd
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4594>
2020-04-30 09:50:16 +03:00
Rob Clark
f78af33721 gallium: extract out logicop helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4826>
2020-04-30 03:45:12 +00:00
Roland Scheidegger
51a82ec3e4 gallivm: fix half to float conversions with llvm 11
LLVM 11 removes the intrinsic for half to float conversion, so use the fpext
function instead. This function actually works now with half to float, albeit
a quick experiment showed at least the x86 backend cannot lower it itself if
the cpu doesn't support it natively and tries to call external library, which
crashes (and would be very slow anyway as it would be lowered to scalar code),
so for now only use it where we previously used the f16c intrinsic.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2603

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4800>
2020-04-30 01:21:21 +00:00
Eric Engestrom
ec6565bb26 cut 20.1 branch
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4823>
2020-04-29 23:52:43 +00:00
Francisco Jerez
0842758ec0 intel/ir: Update performance analysis parameters for memory fence codegen changes.
The SFID field of the SHADER_OPCODE_MEMORY_FENCE and
SHADER_OPCODE_INTERLOCK instructions now indicates the target function
of the memory fence.  Account the cycle-count cost to the right shared
unit.

Fixes: f858fa26b4 ("intel/fs,vec4: Pull stall logic for memory fences up into the IR")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4817>
2020-04-29 23:40:36 +00:00
Dylan Baker
82aa446049 docs: update calendar, add news item, and link releases notes for 20.0.6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4822>
2020-04-29 23:31:32 +00:00
Dylan Baker
06b5a646e8 docs: Add SHA256 sums for 20.0.6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4822>
2020-04-29 23:31:32 +00:00
Dylan Baker
55bb55e93c docs: Add release notes for 20.0.6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4822>
2020-04-29 23:31:32 +00:00
Alyssa Rosenzweig
e70cfe47b3 pan/mdg: Be a bit more pedantic in invert passes
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4820>
2020-04-29 23:07:03 +00:00
Alyssa Rosenzweig
074815ca0e pan/mdg: Track more types
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4820>
2020-04-29 23:07:03 +00:00
Rob Clark
a0fe98b478 freedreno: fix buffer import
`rsc->layout.cpp` is zero until we `fd_resource_layout_init()`

Fixes: 5a8718f01b ("freedreno: Make the slice pitch be bytes, not pixels.")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4818>
2020-04-29 22:34:25 +00:00
Marcin Ślusarz
2efa76f795 i965: remove unused variable
Last use was removed in 54525808aa.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4809>
2020-04-29 21:16:45 +00:00
Bas Nieuwenhuizen
85fe0e551f radv: Fix implicit sync with recent allocation changes.
the implicit sync flag gets set at the beginning at the function,
but I used = instead of |= later.

Fixes: bec9285027 "radv: Stop using memory type indices."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4814>
2020-04-29 21:03:39 +00:00
Rob Clark
27cafa9a51 freedreno: switch to simple_mtx
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4810>
2020-04-29 20:37:00 +00:00
Rob Clark
336a8cd82a freedreno: add screen lock wrappers
This will make it easier to swap out to simple_mtx_t

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4810>
2020-04-29 20:37:00 +00:00
Rob Clark
8aacaeca68 util/simple_mtx: add assert_locked()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4810>
2020-04-29 20:37:00 +00:00
Jonathan Marek
3e1b93ec4f turnip: fix wrong substream size in parse_multisample_and_color_blend
Missed updating this when adding tu6_emit_sample_locations

Fixes: a92d2e1109 ("turnip: implement VK_EXT_sample_locations")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4795>
2020-04-29 20:09:54 +00:00
Eric Anholt
05e6f763e7 util/ra: Improve ra_set_finalize() performance.
BITSET_FOR_EACH_SET can walk a sparse set (such as a register class's set
of registers) much faster than just iterating over individual bits.

Improves freedreno startup time (as measured by shader-db ./run
shaders/closed/gputest/triangle on my x86 system) by -4.12679% +/-
1.99006% (n=151)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4537>
2020-04-29 19:46:08 +00:00
Eric Anholt
53ac2dabec util/ra: Use util_dynarray for handling the conflict lists.
Again, shortens the code significantly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4537>
2020-04-29 19:46:08 +00:00
Eric Anholt
57088854e6 util/ra: Use util_dynarray for the adjacency list.
This make the code significantly more readable, I think (along with
shorter).  Also, using util_dynarray_delete_unordered() saves us a move of
the rest of the list when removing adjacency on a node.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4537>
2020-04-29 19:46:08 +00:00
Eric Anholt
a1de267a21 util/ra: Sanity check that we're adding a valid reg to a class.
BITSET_SET might not segfault on you right away if you're just slightly
off, and an assert is nicer anyway.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4537>
2020-04-29 19:46:08 +00:00
Eric Anholt
5bcaf30aba util/ra: Sanity check that the driver selected a valid reg.
freedreno was returning -1 when it didn't pick a reg from the given bitset
due to an off-by-a-small-number error.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4537>
2020-04-29 19:46:08 +00:00
Konrad Dybcio
fc66800032 freedreno/a4xx: enable A405
This patch brings support for Adreno A405
as found on MSM8939. That chip is a cut-down
version of A4XX IP and requires no special handling.

Tested on Asus Zenfone 2 Laser (Z00T) smartphone.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4753>
2020-04-29 19:15:58 +00:00
Mike Blumenkrantz
328cc00d39 iris: handle PIPE_CAP_CLEAR_SCISSORED
this allows passing scissored clear calls through the driver where it can
be handled by a repclear shader

fix kwg/mesa#61

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4310>
2020-04-29 18:05:06 +00:00
Mike Blumenkrantz
1c8bcad81a gallium: add pipe cap for scissored clears and pass scissor state to clear() hook
this adds a new pipe cap that drivers can support which enables passing buffer
clears with scissor test enabled through to be handled by the driver instead
of having mesa draw a quad

also adjust all existing clear() hooks to have the new parameter

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4310>
2020-04-29 18:05:06 +00:00
Caio Marcelo de Oliveira Filho
882928dcaa i965: Use correct constant for max_variable_local_size
Fixes: 5664bd6db3 ("i965: Implement ARB_compute_variable_group_size")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4799>
2020-04-29 17:12:42 +00:00
Mike Blumenkrantz
91375f13ce iris: move iris_vtable to iris_screen
instead of inlining this into every context, now a struct is used in the screen
struct to reduce memory usage and simplify a couple of the methods

Closes: https://gitlab.freedesktop.org/kwg/mesa/-/issues/6
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4376>
2020-04-29 16:59:45 +00:00
Jason Ekstrand
e581ddeeee intel/fs: Don't delete coalesced MOVs if they have a cmod
Shader-db results on ICL:

    total instructions in shared programs: 17133088 -> 17133287 (<.01%)
    instructions in affected programs: 61300 -> 61499 (0.32%)
    helped: 0
    HURT: 199

This means it's likely fixing 199 bugs. :-)  All the changed shaders are
in Mad Max.  It's surprisingly difficult to get the back-end compiler to
generate a pattern that hits this we don't tend to emit a lot coalescable
MOVs.  The pattern in Mad Max that's able to hit is fsign(fsat(x)) under
the right conditions.

Closes: #2820
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4773>
2020-04-29 16:45:51 +00:00
Marek Olšák
6fe7d6758a st/mesa: expose more SPIR-V capabilities
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4760>
2020-04-29 16:25:06 +00:00
Marek Olšák
a2542deb63 mesa: report GL_INVALID_OPERATION for invalid glTextureBuffer target
This fixes:
    KHR-GL46.direct_state_access.textures_buffer_errors
    KHR-GL46.direct_state_access.textures_buffer_range_errors

Fixes: 98e64e538a - main: Added entry point for glTextureBuffer

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4759>
2020-04-29 15:58:45 +00:00
Alyssa Rosenzweig
ffa314eab3 pan/mdg: Replicate 16-bit swizzles
We don't support vec8 quite yet anyway, this fixes dot products.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
c571d31b8b pan/mdg: Ensure fdot is scalar out in disasm
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
95664b177f pan/mdg: Move condense_writemask to disasm
The compiler should *never* use this. Packing should be 1 way.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
efc9ab6dcc pan/mdg: Pass through some types from scheduling
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
d8d7df6f09 pan/mdg: Don't crash on unknown branch target
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
e27fd4b3ec pan/mdg: Make some branch targets more explicit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
dfa7c26ff8 pan/mdg: Always print the mask
Meaningful for fp16.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
459cf59c61 pan/mdg: Specialize swizzle to type
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
62768590d5 pan/mdg: Lower specials to 32-bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
bb0e85fca4 pan/mdg: Move sampler_type emission to pack time
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
08af4c788d pan/mdg: Set texture full fields at pack time
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
4fb02174a3 pan/mdg: Track texture types
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
53c183736e pan/mdg: Track v_mov type (force uint32 for now?)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
74fadc8859 pan/mdg: Denoise prints
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
714eba8762 pan/mdg: Track a primary type for I/O
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
04f76ad8ae pan/mdg: Another goofy comment gone
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
ecf946638e pan/mdg: Track ALU dest type
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
6757c480ab pan/mdg: Track ALU src types
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
742b272314 pan/mdg: Add type fields to IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
b9f7f06a61 pan/bi: Share ALU type printing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
6c08e294c8 pan/mdg: Set lower_flrp16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
05f5267f23 pan/mdg: Remove old hack
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
d7f98a87f2 pan/mdg: Remove goofy 16-bit comment
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
3b10bcd417 pan/mdg: Don't break SSA
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
23337fd590 pan/mdg: SSA_FIXED_MINIMUM already covered by PAN_IS_REG
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
63eec105b2 pan/mdg: Use PAN_IS_REG
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
d4600c4340 pan/mdg: Remove nir_alu_src_index
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
fbbe3d4b75 pan/bi: Use common IR indices
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
5860b18665 panfrost: Move Bifrost IR indexing to common
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
e3062edff4 panfrost: Fix BO reference counting
Typo.

Fixes: 3283c7f4da ("panfrost: Inline reference counting routines")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Marek Olšák
22a4cb4937 ac: enable displayable DCC on Navi12 & Navi14
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
3b45631d7a ac/surface: validate that DCC is enabled correctly on gfx9+
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
5e31e4b697 ac/surface: add code for gfx10 displayable DCC
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
e2fbba7720 ac/surface: move non-displayable DCC to the end of the buffer
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
a3dc7fffbb ac/surface: don't compute DCC if it's unsupported by DCN on gfx9+
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
5d785f99b7 ac/surface: match get_display_flag() with expectations for is_displayable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
3dc2ccc14c ac/surface: replace RADEON_SURF_OPTIMIZE_FOR_SPACE with !FORCE_SWIZZLE_MODE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
f6d87ec8a9 ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set
So that drivers can enable it without worrying how the texture was
allocated.

v2: reworked the mechanism, hopefully fixes now
    added Bas Nieuwenhuizen's diff to fix radv

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
25d3cc293e ac/surface: rename micro tile mode enums like gfx10 uses them
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Thomas Hellstrom
298e247776 winsys/svga: Optionally avoid caching buffer maps
Mapping of graphics kernel buffers is quite costly. Therefore the svga
drm winsys caches all kernel buffer maps. However, that may lead to
less testing coverage of the unmap paths and (possibly) processes running
out of virtual memory space. Introduce a possibility to avoid that caching
by setting the environment variable SVGA_FORCE_KERNEL_UNMAPS to 1.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Matthew McClure <mcclurem@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4804>
2020-04-29 13:45:12 +00:00
Thomas Hellstrom
422148de52 gallium/pipebuffer: Use persistent maps for slabs
Instead of the ugly practice of relying on the provider caching maps,
introduce and use persistent pipebuffer maps. Providers that can't handle
persistent maps can't use the slab manager.

The only current user is the svga drm winsys which always maps
persistently.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4804>
2020-04-29 13:45:12 +00:00
Timur Kristóf
e4e1a0ac13 radv: Use smaller esgs_itemsize for ACO.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
ee5f04c9c9 aco: Use new default driver locations.
The way the new locations are set up has much fewer gaps
between each I/O slot, so this results in a massive reduction
in the LDS usage of tessellation shaders.

Totals (GFX10):
VGPRS: 3976792 -> 3974864 (-0.05 %)
Code Size: 260552784 -> 260532860 (-0.01 %) bytes
LDS: 48723 -> 30179 (-38.06 %) blocks
Max Waves: 1053407 -> 1053583 (0.02 %)

Totals from affected shaders (1407 shaders on GFX10):
SGPRS: 59144 -> 59216 (0.12 %)
VGPRS: 63024 -> 61096 (-3.06 %)
Code Size: 2695508 -> 2675584 (-0.74 %) bytes
LDS: 47109 -> 28565 (-39.36 %) blocks
Max Waves: 12999 -> 13175 (1.35 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
efa4976709 radv: Use new linking helper to set default driver locations.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
7aa61c84fe nir: Add new linking helper to set linked driver locations.
This commit introduces a new function nir_assign_linked_io_var_locations
which is intended to help with assigning driver locations to shaders
during linking, primarily aimed at the VS->TCS->TES->GS stages.

It ensures that the linked shaders have the same driver locations,
and it also packs these as close to each other as possible.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
7056714f50 aco: Set config->lds_size when TES or VS is running on HW ESGS.
This doesn't fix anything, just reports the LDS size used by
merged ESGS shaders, such as vertex_geometry_gs and
tess_eval_geometry_gs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
baa46878d4 aco: Calculate workgroup size of legacy GS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
fdbb296853 aco: Remember VS/TCS output driver locations.
Instead of relying on calling shader_io_get_unique_index repeatedly,
remember the which output driver location corresponds to which
varying slot.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
ab07c4ea70 aco: Use context variables instead of calculating TCS inputs/outputs.
VS needs the number of TCS inputs, and TES needs the number of TCS
outputs.

It is error-prone to repeat those calculations in both instruction
selection and setup. Just set them in one place instead.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
fd0248c37b radv: Refactor calculate_tess_lds_size and get_tcs_num_patches.
Previously these functions needed the bit mask of the TCS outputs
and patch outputs written, and concluded the number of outputs
from that.

Now, they take the number of outputs and patch outputs instead.
This will allow the backend compiler to better optimize the
LDS layout.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Rhys Perry
9392ddab43 aco: consider blocks unreachable if they are in the logical cfg
unreachable was true if the last block is unreachable in the linear cfg,
but it should also be true if it is unreachable in the logical cfg.

Fixes dEQP-VK.graphicsfuzz.for-with-ifs-and-return

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 8d8c864beb
    ('aco: improve check for unreachable loop continue blocks')

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4764>
2020-04-29 11:07:09 +00:00
Christopher James Halse Rogers
98675d34c1 egl/wayland: Fix zwp_linux_dmabuf usage
There's no guarantee that the formats advertised by wl_drm and the formats
advertised by zwp_linux_dmabuf_v1 are the same.

get_back_bo() handles this by falling back from createImageWithModifiers() to
createImage() when there's a wl_drm format but no corresponding linux_dmabuf
format, but create_wl_buffer() unconditionally tries to create a linux_dmabuf
buffer unless DRIimage has DRM_FORMAT_MOD_INVALID.

Fix this by always checking if the DRIimage modifier has been advertised
by zwp_linux_dmabuf_v1, and falling back to wl_drm if not.

If DRM_FORMAT_MOD_INVALID has been advertised then we trust the client
has allocated something appropriate and treat any modifier as matching.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2220
Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4294>
2020-04-29 11:29:40 +01:00
Danylo Piliaiev
8f0d387441 iris/bufmgr: Check if iris_bo_gem_mmap failed
After refactoring of iris_bo_map_cpu and iris_bo_map_wc - immediate
return of NULL on failure to mmap a buffer was lost.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2855
Fixes: 5bc3f52dd8
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4786>
2020-04-29 08:51:33 +00:00
Tapani Pälli
1a33358b27 anv: remove assert from GetImageMemoryRequirements[2]
This assert is actually correct but due to how android hardware buffer
support is implemented we should remove it, otherwise debug build of
mesa hits the assert with Android CTS tests.

Test creates VkImage with non-external format and sets up
VkExternalMemoryImageCreateInfo to indicate that image *may* be used
with Android hardwarebuffer handle. Then test attempts to get image
memory requirements. Problem with this is that we setup all android
supporting images as having external format and thus hit the assert as
the size has not been set yet. This is not a problem in practice since
android will bind ahw memory with the image later on.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2807
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4762>
2020-04-29 08:30:42 +00:00
Samuel Pitoiset
2f6648dc3c gitlab-ci: add a list of expected failures for FIJI with ACO
Timur has this chip now. The depth stencil resolve failures are
somehow unexpected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4805>
2020-04-29 09:53:48 +02:00
Samuel Pitoiset
0e6afbbe56 radv: advertise VK_EXT_robustness2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Samuel Pitoiset
0f1ead7b53 radv: handle NULL vertex bindings
With VK_EXT_robustness2, an element of pBuffers can be NULL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Samuel Pitoiset
c1ef225d18 radv: handle NULL descriptors
All fields must be zero, otherwise the HW hangs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Samuel Pitoiset
60cc065c7d aco: fix adjusting the sample index with FMASK if value is negative
The SPIR-V spec doesn't say explicitly that the sample index
must be an unsigned integer.

This fixes crashes with some new VK_EXT_robustness2 tests.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Samuel Pitoiset
a112ec4c11 aco: fix nir_texop_texture_samples with NULL descriptors
With VK_EXT_robustness2, descriptors can be NULL and the number of
samples returned by nir_texop_texture_samples should be 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Samuel Pitoiset
aa94213781 ac/llvm: fix nir_texop_texture_samples with NULL descriptors
With VK_EXT_robustness2, descriptors can be NULL and the number of
samples returned by nir_texop_texture_samples should be 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Caio Marcelo de Oliveira Filho
a3cba3c771 intel/fs: Only stall after sending all memory fence messages
In Gen11+, when emitting a fence for both L3 and SLM, the generated
code would look like

    SEND, MOV (for stall), SEND, MOV (for stall)

This commit change that so two SENDs are emitted before the MOVs for
stall.  This is similar to the approach used in Ivy Bridge for the
render fence.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3278>
2020-04-29 07:17:27 +00:00
Caio Marcelo de Oliveira Filho
f858fa26b4 intel/fs,vec4: Pull stall logic for memory fences up into the IR
Instead of emitting the stall MOV "inside" the
SHADER_OPCODE_MEMORY_FENCE generation, use the scheduling fences when
creating the IR.

For IvyBridge, every (data cache) fence is accompained by a render
cache fence, that now is explicit in the IR, two
SHADER_OPCODE_MEMORY_FENCEs are emitted (with different SFIDs).

Because Begin and End interlock intrinsics are effectively memory
barriers, move its handling alongside the other memory barrier
intrinsics.  The SHADER_OPCODE_INTERLOCK is still used to distinguish
if we are going to use a SENDC (for Begin) or regular SEND (for End).

This change is a preparation to allow emitting both SENDs in Gen11+
before we can stall on them.

Shader-db results for IVB (i965):

    total instructions in shared programs: 11971190 -> 11971200 (<.01%)
    instructions in affected programs: 11482 -> 11492 (0.09%)
    helped: 0
    HURT: 8
    HURT stats (abs)   min: 1 max: 3 x̄: 1.25 x̃: 1
    HURT stats (rel)   min: 0.03% max: 0.50% x̄: 0.14% x̃: 0.10%
    95% mean confidence interval for instructions value: 0.66 1.84
    95% mean confidence interval for instructions %-change: 0.01% 0.27%
    Instructions are HURT.

  Unlike the previous code, that used the `mov g1 g2` trick to force
  both `g1` and `g2` to stall, the scheduling fence will generate `mov
  null g1` and `mov null g2`.  During review it was decided it was not
  worth keeping the special codepath for the small effect will have.

Shader-db results for HSW (i965), BDW and SKL don't have a change
on instruction count, but do report changes in cycles count, showing
SKL results below

    total cycles in shared programs: 341738444 -> 341710570 (<.01%)
    cycles in affected programs: 7240002 -> 7212128 (-0.38%)
    helped: 46
    HURT: 5
    helped stats (abs) min: 14 max: 1940 x̄: 676.22 x̃: 154
    helped stats (rel) min: <.01% max: 2.62% x̄: 1.28% x̃: 0.95%
    HURT stats (abs)   min: 2 max: 1768 x̄: 646.40 x̃: 362
    HURT stats (rel)   min: <.01% max: 0.83% x̄: 0.28% x̃: 0.08%
    95% mean confidence interval for cycles value: -777.71 -315.38
    95% mean confidence interval for cycles %-change: -1.42% -0.83%
    Cycles are helped.

  This seems to be the effect of allocating two registers separatedly
  instead of a single one with size 2, which causes different register
  allocation, affecting the cycle estimates.

while ICL also has not change on instruction count but report changes
negative changes in cycles

    total cycles in shared programs: 352665369 -> 352707484 (0.01%)
    cycles in affected programs: 9608288 -> 9650403 (0.44%)
    helped: 4
    HURT: 104
    helped stats (abs) min: 24 max: 128 x̄: 88.50 x̃: 101
    helped stats (rel) min: <.01% max: 0.85% x̄: 0.46% x̃: 0.49%
    HURT stats (abs)   min: 2 max: 2016 x̄: 408.36 x̃: 48
    HURT stats (rel)   min: <.01% max: 3.31% x̄: 0.88% x̃: 0.45%
    95% mean confidence interval for cycles value: 256.67 523.24
    95% mean confidence interval for cycles %-change: 0.63% 1.03%
    Cycles are HURT.

  AFAICT this is the result of the case above.

Shader-db results for TGL have similar cycles result as ICL, but also
affect instructions

    total instructions in shared programs: 17690586 -> 17690597 (<.01%)
    instructions in affected programs: 64617 -> 64628 (0.02%)
    helped: 55
    HURT: 32
    helped stats (abs) min: 1 max: 16 x̄: 4.13 x̃: 3
    helped stats (rel) min: 0.05% max: 2.78% x̄: 0.86% x̃: 0.74%
    HURT stats (abs)   min: 1 max: 65 x̄: 7.44 x̃: 2
    HURT stats (rel)   min: 0.05% max: 4.58% x̄: 1.13% x̃: 0.69%
    95% mean confidence interval for instructions value: -2.03 2.28
    95% mean confidence interval for instructions %-change: -0.41% 0.15%
    Inconclusive result (value mean confidence interval includes 0).

  Now that more is done in the IR, more dependencies are visible and
  more SWSB annotations are emitted.  Mixed with different register
  allocation decisions like above, some shaders will see more `sync
  nops` while others able to avoid them.

  Most of the new `sync nops` are also redundant and could be dropped,
  which will be fixed in a separate change.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3278>
2020-04-29 07:17:27 +00:00
Caio Marcelo de Oliveira Filho
0e96b0d6dd intel/fs: Allow FS_OPCODE_SCHEDULING_FENCE stall on registers
It will generate the MOVs (or SYNC_NOP in Gen12+) needed for stall.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3278>
2020-04-29 07:17:27 +00:00
Bas Nieuwenhuizen
9248b04528 radv: Expose 4G element texel buffers.
Old value seems to be copied from anv.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4787>
2020-04-29 07:05:04 +00:00
Kenneth Graunke
506414e837 iris: Fix downcast of bound_vertex_buffers from uint64_t to int
This is the wrong data type, the original field - and the values we're
adding in - are both 64-bit unsigned.  Keep the original data type.

Thanks to Dave Airlie for finding this while reading the code.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4802>
2020-04-29 06:50:54 +00:00
Francisco Jerez
5e2a7e11b4 intel/ir: Remove scheduling-based cycle count estimates.
The cycle count estimation logic part of the scheduler is now
redundant with the shader performance modeling pass, and the estimates
can be consolidated into the brw::performance analysis result object
instead of being part of the CFG, which guarantees that the estimates
cannot be accessed without previously calling the
performance_analysis::require() method, which makes sure that the
right analysis pass is executed at the right time if we don't already
have up-to-date cached results.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
486f3b04a5 intel/ir: Pass block cycle count information explicitly to disassembler.
So we can eventually remove the cycle count estimates from the CFG
data structure and consolidate performance information in the
brw::performance object.

It would be cleaner to pass the brw::performance object directly to
the disassembler but that isn't straightforward since the disassembler
is built as a plain C file unlike the rest of the compiler back-end.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
6579f562c3 intel/ir: Use brw::performance object instead of CFG cycle counts for codegen stats.
These should be more accurate than the current cycle counts, since
among other things they consider the effect of post-scheduling passes
like the software scoreboard on TGL.  In addition it will enable us to
clean up some of the now redundant cycle-count estimation
functionality in the instruction scheduler.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
65342be3ae intel/fs: Add INTEL_DEBUG=no32 debugging flag.
This is useful in order to identify codegen issues caused by SIMD32.
It doesn't currently have any effect on compute shaders since SIMD32
dispatch is only enabled for CS when it's strictly necessary to do so
in order to support the workgroup size requested for the shader --
That might change in the future though when we hook up the SIMD32
heuristic to CS compilation.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
14f0a5cf64 intel/fs: Implement performance analysis-based SIMD32 heuristic for fragment shaders.
The heuristic enables the SIMD32 fragment shader based on whether the
IR performance modeling pass predicts it to have greater throughput
than the SIMD16 and SIMD8 variants of the same shader.  It would be
straightforward to do the same thing in order to control whether
SIMD16 dispatch is enabled, but it's pending additional performance
evaluation.

The INTEL_DEBUG=do32 option is left around in order to force the
SIMD32 shader to be used regardless of the result of the heuristic,
since it's useful as a debugging aid e.g. in order to identify
SIMD32-specific codegen issues which may be masked by the SIMD32
heuristic, or cases where the heuristic is incorrectly disabling
SIMD32 shaders that offer a performance advantage.

Currently this is only enabled on Gen6+, since SIMD32 codegen support
is incomplete on earlier platforms.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
d6aa0c261f intel/fs: Heap-allocate fs_visitors in brw_compile_fs().
This makes brw_compile_fs() look a bit more similar to
brw_compile_cs().  It saves us three v*_shader_stats local variables,
and will save us additional triplicated declarations as we start
tracking IR performance analysis results.

The triplicated cfg pointers are left around because they're set to
NULL to mark specific dispatch modes as disabled (e.g. in order to
enforce hardware restrictions).  Doing the same thing with the visitor
pointers would cause data leaks.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
188a3659ae intel/ir: Import shader performance analysis pass.
This introduces an analysis pass intended to estimate several
performance statistics of the shader, including cycle count latency
and throughput values, based on static modeling.  It has instruction
performance information more comprehensive than the current scheduling
pass for all platforms between Gen4-11, and works on both the FS and
VEC4 back-end.

The most immediate purpose of this pass is to implement a heuristic
meant to determine whether using SIMD32 dispatch for a fragment shader
can be expected to help more than it hurts.  In addition this will
allow the effect of passes run after scheduling (e.g. the TGL software
scoreboard pass and the VEC4 dependency control pass) to be visible in
shader-db statistics.

But that isn't the end of the story, other potential applications of
this pass (not part of this MR) I've been playing around with are:

 - Implement a similar SIMD16 heuristic allowing the identification of
   inefficient SIMD16 fragment shaders.

 - Implement similar SIMD16 and SIMD32 heuristics for the compute
   shader stage -- Currently compute shader builds always use the
   SIMD16 shader if available and never use the SIMD32 shader unless
   strictly necessary, which is suboptimal under certain conditions.

 - Hook up to the instruction scheduler in order to improve the
   accuracy of its timing information.

 - Use as heuristic in order to drive the selection of scheduling
   modes (Matt was experimenting with that).

 - Plug to the TGL software scoreboard pass in order to implement a
   more effective SBID token allocation algorithm, since in general
   the optimal token allocation depends on the timings of all
   instructions in the program.

 - Use its bottleneck detection functionality in order to implement a
   heuristic computing a more optimal bound for the number of fragment
   shader threads executed in parallel (by adjusting the
   MaximumNumberofThreadsPerPSD control of 3DSTATE_PS).

As a follow-up I'm planning to submit updated timing information for
Gen12 platforms -- Everything else required to support Gen12 like SWSB
handling is already included in this patch, but there were some IP
concerns regarding the TGL timing parameters since they cannot
currently be obtained with the documentation and hardware which is
publicly available.  The timing parameters for any previous Gen7-11
platforms can be obtained by anyone by sampling the timestamp register
using e.g. shader_time, though I have some more convenient
instrumentation coming up.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:03 -07:00
Francisco Jerez
c8ce1cfc9c intel/vec4: Fix constness of vec4_instruction::reads_flag() and ::writes_flag().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
bda1d72dd9 intel/fs: Replace fs_visitor::bank_conflict_cycles() with stand-alone function.
This will be re-usable by the IR performance analysis pass.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
d2ed740795 intel/fs: Fix constness of argument of fs_instruction_scheduler::is_compressed().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
6310a05f68 intel/fs: Rename half() helpers to quarter(), allow index up to 3.
Makes more sense considering SIMD32.  Relaxing the assertion in
brw_ir_fs.h will be required in order to avoid assertion failures on
SNB with SIMD32 fragment shaders.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
bdad7f429a intel/ir: Add missing initialization of backend_reg::offset during construction.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
e549e4f6c0 intel/fs/gen12: Fix Render Target Read header setup for new thread payload layout.
In Gen12 the Poly 0 Info DWORD containing the Viewport Index and
Render Target Index fields were moved from r0.0 to r1.1 in order to
make room for dual-polygon dispatch.  The render target message format
was updated to expect that information in the same location, so we
didn't need to make any changes for framebuffer fetch to work with
SIMD8 and SIMD16 dispatch.  Unfortunately that won't work with SIMD32,
since the render target message header is assembled from r0 and r2
instead of r1, and the r2 thread payload wasn't updated with an
additional copy of the same information.  We need to fix things up
manually instead.  This avoids a handful of
EXT_shader_framebuffer_fetch regressions in combination with SIMD32
fragment shaders.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
72324035fb intel/fs/gen12: Work around dual-source blending hangs in combination with SIMD32.
This applies the same work-around I commited as b84fa0b31e
"intel/fs/gen11: Work around dual-source blending hangs in combination
with SIMD32." to Gen12, which seems to suffer from the same hardware
bug found empirically.  The failure mode seems to be identical.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:28 -07:00
Francisco Jerez
d6ae079771 intel/fs/gen12: Fix hangs with per-sample SIMD32 fragment shader dispatch.
The Gen12 docs are rather contradictory regarding the dispatch
configurations supported by the fragment shader -- The same table
present in previous generations seems to imply that only one dispatch
mode can be enabled when doing per-sample shading, but a restriction
documented in the 3DSTATE_PS_BODY page implies the opposite: That
SIMD32 can only be used in combination with some other dispatch mode.

The latter seems to match the behavior of real hardware as I could
tell from my testing: A bunch of multisample test-cases that do
per-sample shading hang if we only provide a SIMD32 shader.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:28 -07:00
Dylan Baker
35ee6b3d36 mesa: Follow OpenGL conversion rules for values that exceed storage size
Section 2.2.2 (Data Conversions For State Query Commands) of the
OpenGL 4.5 spec says:

  Following these steps, if a value is so large in magnitude that
  it cannot be represented by the returned data type, then the
  nearest value representable using that type is returned.

The current code doesn't do the correct thing, because it truncates a
long (potentially a 64bit values) to an int.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2828
Fixes: 53c36dfcfe
       ("replace IROUND with util functions")

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4673>
2020-04-29 04:26:41 +00:00
Alyssa Rosenzweig
76c5688018 pan/bit: Add BITWISE test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790>
2020-04-29 00:30:05 +00:00
Alyssa Rosenzweig
844c3f94b5 pan/bit: Interpret BI_BITWISE
No shifting yet.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790>
2020-04-29 00:30:05 +00:00
Alyssa Rosenzweig
a077da6273 pan/bi: Handle iand/ior/ixor in NIR->BIR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790>
2020-04-29 00:30:05 +00:00
Alyssa Rosenzweig
ef9582738e pan/bi: Pack BI_BITWISE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790>
2020-04-29 00:30:05 +00:00
Alyssa Rosenzweig
9b415bf6a0 pan/bi: Add bitwise modifiers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790>
2020-04-29 00:30:05 +00:00
Rob Clark
6de01faac5 freedreno/a6xx: invalidate tex state cache entries on rebind
When a resource's backing bo changes, its seqno will be incremented.
Which would result in a new tex state cache key, and nothing to clean
up the old tex state until the sampler view/state is destroyed.  But
in some games, that may never happen, or at least not happen before
we run out of memory.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2830
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
ca05e6b04d freedreno: rebind_resource() *before* bo changes
This will matter in the next patch, where we need the original
rsc->seqno.

It means slight shuffling of where we call rebind_resource() in the
`fd_try_shadow_resource()` path.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
d9e56d8a69 freedreno: rebind resource in all contexts
If the resource is rebound, we need to invalidate in all contexts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
f12188ff52 freedreno: optimize rebind_resource()
Track how resources are used, ie. which state they may potentially dirty
if the backing bo is changed/reallocated, to optimize rebind_resource().

This will be more important in a later patch when we hook up eviction of
entries in a6xx tex state cache.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
1e18c58047 freedreno: mark more state dirty when rebinding resources
Plus a bonus typo fix.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
bf97cc9221 freedreno: don't realloc idle bo's
The `DISCARD_WHOLE_RESOURCE` is just a hint.  And `rebind_resource()` is
a bunch of faffing about (and going to get worse in a later patch), so
let's not bother when the bo is already idle.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
938b6ed645 freedreno: small whitespace fix
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Jan Zielinski
a93b728bc6 gallium/swr: Fix crashes and failures in vertex fetch
This commit fixes two problems:
- In some cases SWR does not correctly report to Gallium
  which formats are supported.
- Incorrect LLVM instructions are used in vertex fetch in some situations

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4788>
2020-04-28 23:53:08 +00:00
Rob Clark
de0d3d1726 freedreno/log-parser: support to read gzip'd logs
~50MB gzip'd log files are nicer than ~300MB uncompressed

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4750>
2020-04-28 23:31:58 +00:00
Rob Clark
f561e516c8 freedreno/a6xx: pre-calculate expected vsc stream sizes
We should only rely on overflow detection for indirect draws, where we
have no other option.

This doesn't use quite the worst-possible-case sizes, which in practice
seem to be ~20x larger than what is required.  But instead uses roughly
half of that.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4750>
2020-04-28 23:31:58 +00:00
Rob Clark
99d802ccc7 freedreno: add helper to estimate # of bins per pipe
For vsc size calculation, we need to know the # of bins per pipe.  Or at
least the worst-case # of bins, assuming we don't eliminate an unused depth/
stencil buffer.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4750>
2020-04-28 23:31:58 +00:00
Rob Clark
a9c255d70c freedreno/a6xx+tu: rename VSC_DATA/VSC_DATA2
These are the draw-stream and primitive-stream, so lets give them more
descriptive names.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4750>
2020-04-28 23:31:58 +00:00
Rhys Perry
3ee3ad561a aco: fix vgpr nir_op_vecn with sgpr operands
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
c5eda3c746 aco: improve clamped integer addition disassembly workaround
Make it work with 16-bit and GFX10.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
4ed83e2f94 aco: add various GFX10 int16 opcodes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
43f2ba39ef aco: fix sub-dword overwrite check in RA validator
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
cca8d6ce06 aco: fix sub-dword out-of-bounds check in RA validator
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
307aca83a2 aco: add missing adjust_max_used_regs()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
99ca96fbf5 aco: improve RA for uneven p_split_vector
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
24116a8a56 aco: don't recurse in sub-dword get_reg_simple()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
09c584caeb aco: split self-intersecting copies instead of swapping
Example situation:
v1 = {v0.hi, v1.lo}
v0.hi = v1.hi

The 4-byte copy's definition is completely used, but swapping it makes no
sense. We have to split it to generate correct code:
swap(v0.hi, v1.lo)
swap(v0.hi, v1.hi)

Found in dEQP-VK.spirv_assembly.type.vec3.i16.constant_composite_vert

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
be4a34966c aco: fix neighboring register check in get_reg_simple()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
fb59ed6bb9 aco: check alignment of non-subdword registers in get_reg_specified()
When splitting a v6b vector into v1 and v2b components, we should ensure
the v1 definition doesn't start at the upper half.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
916cc3e231 aco: make RegisterFile::block() take a regclass
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Jason Ekstrand
b43366497b anv: Claim VK_EXT_robustness2 support
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
b07d26be65 anv: Handle null vertex buffer bindings
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
fd817291c7 anv: Handle NULL descriptors
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
ac581a06a4 nir/combine_stores: Handle volatile
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
cb9292091b nir/dead_write_vars: Handle volatile
We can't remove volatile writes and we can't combine them with other
volatile writes so all we can do is clear the unused bits.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
ed67717167 nir/copy_prop_vars: Report progress when deleting self-copies
Fixes: 62332d139c "nir: Add a local variable-based copy prop..."

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
d9af5277b3 nir/copy_prop_vars: Handle volatile better
For deref_store, we can still delete invalid stores that write to
statically OOB data.  For everything, we need to make sure that we kill
aliases of destinations even if it's volatile.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
118f045fb7 vulkan: Update Vulkan XML and headers to 1.2.139
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
76d2772472 anv: Allow all clear colors for texturing on Gen11+
Starting with Gen11, we have two indirect clear colors: An unconverted
float/int version which is us used for rendering and a converted pixel
value version which is used for texturing.  Because the one used for
texturing is stored as a single pixel of that color, it works no matter
what format is being used.  Because it's a simple HW indirect and
doesn't involve copying surface states around, we can use it in the
sampler without having to worry about surface states having out-of-date
clear values.  The result is that we can now allow any clear color when
texturing.

This cuts the number of resolves in a RenderDoc trace of Dota2 by 95%
on Gen11+ (you read that right) and improves perf by 3.5%.  It improves
perf in a handful of other workloads by < 1%.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
e63c662c26 anv: Use anv_layout_to_aux_usage for color during render passes
Previously, we tried to treat color image layouts as a special case
during render passes.  This is largely an artifact of history as our
initial understanding of Vulkan placed much more emphasis on render
passes than our current understanding.  The only real practical use for
magic layouts in the middle of a render pass, as far as I can tell, is
to allow more clear colors to get passed through to input attachments.
However, most apps aren't very creative with their clear colors and very
few of them (none coming from DXVK) actually use render passes in any
interesting way.  Therefore, the risk of being able to pass fewer clear
colors through to input attachments should be minimal.

There are, however, three very big advantages to this change:

 1. We are now consistent in our handling of aux usage and layouts
    between color and depth/stencil.

 2. We are now actually following the layout guidelines from the app and
    aren't nearly as likely to see strange behavior due to us overriding
    the image layouts manually.

 3. It's more obviously correct.  While I think our old render pass code
    was probably correct, it was full of corner cases and it's very
    possible that it was behaving badly in weird ways.  This follows the
    Vulkan API much more blindly and, as such, is more likely to be
    correct and behave the same as other implementations.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
30016f6e82 anv: Split color_attachment_compute_aux_usage in two
In particular, we split out an anv_can_fast_clear_color_view helper
which only cares about fast-clear and not aux_usage itself.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
3fe45a9b6c anv: Rework depth_stencil_attachment_compute_aux_usage
Instead of making it a function that pretends to choose aux usage (which
isn't what it does at all), make it a function which returns whether or
not we want to do a fast clear.  This is far more accurate to the
purpose of the function.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
26e6da90ab anv: Refactor cmd_buffer_setup_attachments
This commit just renames some things so that we use names for temporary
variables which are more consistent with other places in the code-base.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
36a74835df anv: Stop allowing non-zero clear colors in input attachments
Previously, we bent over backwards to allow non-zero clear colors input
attachments whenever we could.  However, very few apps use input
attachments and very few use non-zero clear colors.  Getting rid of
support for non-zero clear colors input attachments will allow us to
treat them identically to textures which should help us simplify things
a good bit.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
bf92e96d9c anv: Disallow fast-clears which require format-reinterpretation
In order to actually hit this case you have to be using a very odd
color/view combination.  The common cases of clear-to-zero and 0/1 clear
colors with an sRGB view don't require any re-interpretation.  This is
probably better than always resolving whenever we have a format mismatch
like we are today because that hits the sRGB case every time.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
20e72e435c intel: Move swizzle_color_value from blorp to ISL
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
814dc66935 anv: Allocate surface states per-subpass
Instead of allocating surface states for attachments in BeginRenderPass,
we now allocate them in begin_subpass.  Also, since we're zeroing
things, we can be a bit cleaner about or implementation and just fill
out all those passes for which we have allocated surface states.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
a3d185d091 anv: Split command buffer attachment setup in three
This commit splits genX(cmd_buffer_setup_attachments)() into three
functions: one which sets up cmd_buffer->state.attachments, one which
allocates surface states, and one which fills out the surface states.
While we're here, we make both functions take the framebuffer (if any)
as an argument instead of pulling it from the command buffer so it's
more clear what things are inputs to the functions.  We also make the
render pass and framebuffer parameters const as those are immutable
objects.  The only functional change here should be that we now
vk_zalloc the attachments which should be a bit safer.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
c195d55161 anv: Mark images written in end_subpass
This makes a lot more sense than marking them written in begin_subpass
since, at that point, we haven't written them yet.  This should reduce
the chances of accidental extra resolves.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
d5e30872ca anv: Use ANV_FROM_HANDLE for pInheritanceInfo fields
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
7cbc5fde13 anv: Assert surface states are valid
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
eaa8f043cd anv: Stop filling out the clear color in compute_aux_usage
It's a pointless micro-optimization that just makes compute_aux_usage
unnecessarily entangled with setting up surface states.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
5808efdf40 anv: Add TRANSFER_SRC to pass usage not subpass usage
The subpass usage flags are supposed to always be one bit and never
multiple bits.  However, when adding in TRANSFER_SRC usage for resolve
attachments we were adding it to the subpass bits and not the render
pass bits.  This potentially is causing issues where images aren't
getting marked written properly.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
513ed7542a anv: Return an error if allocating attachment memory fails
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Samuel Pitoiset
0549fba3cc radv: advertise VK_AMD_memory_overallocation_behavior
Doom Eternal explicitly allows overallocation via this extension
but that shouldn't change anything because it's the default RADV
behavior.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4785>
2020-04-28 21:03:26 +00:00
Samuel Pitoiset
5832f2b8a3 radv: track memory heaps usage if overallocation is explicitly disallowed
By default, RADV supports overallocation by the sense that it doesn't
reject an allocation if the target heap is full.

With VK_AMD_overallocation_behaviour, apps can disable overallocation
and the driver should account for all allocations explicitly made by
the application, and reject if the heap is full.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4785>
2020-04-28 21:03:26 +00:00
Samuel Pitoiset
32035cca3f radv: remove unused radv_device_memory::map_size field
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4785>
2020-04-28 21:03:25 +00:00
Ian Romanick
7b869710a1 nir/algebraic: Require operands to iand be 32-bit
With the mask value 0x80000000, the other operand must be 32-bit.  This
fixes failures in
dEQP-VK.subgroups.ballot_mask.ext_shader_subgroup_ballot.*.gl_subgroupgemaskarb_*
tests from Vulkan 1.2.2 CTS.

Checking one of the tests, it appears that the tests are doing 64-bit
iand with 0x0000000080000000, then comparing the result with zero.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2834
Fixes: 88eb8f190b ("nir/algebraic: Simplify logic to detect sign of an integer")
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4770>
2020-04-28 20:33:56 +00:00
Rob Clark
656051d735 freedreno/ir3/ra: only assign array base in first pass
In particular, we specifically don't want to let the base change between
passes, as it could end up conflicting with registers assigned in the
first pass.

Mostly-closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2838
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4780>
2020-04-28 20:06:49 +00:00
Rob Clark
3d8ec96762 freedreno/ir3/ra: split out helper for array assignment
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4780>
2020-04-28 20:06:49 +00:00
Rob Clark
6313b8d881 freedreno/ir3/ra: use ir3_debug_print helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4780>
2020-04-28 20:06:49 +00:00
Rob Clark
8b3ac7084a freedreno/ir3/ra: remove unused variable
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4780>
2020-04-28 20:06:49 +00:00
Rob Clark
997828e31b freedreno/computer: add script to test widening/narrowing
Just something I hacked together to help figure out which instructions
can fold in a wideing/narrowing conversion.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4780>
2020-04-28 20:06:49 +00:00
Alyssa Rosenzweig
6b551d9f36 pan/bi: Add initial fcmp test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
778e27b5ac pan/bit: Interpret CMP
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
71501972e9 pan/bit: Prepare condition evaluation for vectors
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
0b8724c340 pan/bi: Relax double-abs condition
Only if both ports (<==> registers) same.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
81156ad55a pan/bi: Pack fma.fcmp16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
7a689470d0 pan/bi: Factor out fp16 abs logic
Also used for fcmp16

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
c94d41ad7c pan/bi: Pack FMA 32 FCMP
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
1520131d82 pan/bi: Fix source mod testing for CMP
Outputs u32.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
12ca99f2c1 pan/bi: Structify ADD ICMP 32
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
ddcefefa7d pan/bi: Structify FMA ICMP 16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
3d41468e7d pan/bi: Structify FMA ICMP 32
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
527d7303ca pan/bi: Structify ADD FCMP16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
74795dd328 pan/bi: Structify FMA FCMP16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
28afe3037a pan/bi Strucitfy ADD FCMP 32
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
c861292ce2 pan/bi: Structify FMA FCMP
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
7fe3c145d9 pan/bi: Remove bi_round_op
No purpose.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
95fc71ece2 pan/bi: Deduplicate csel/cmp cond
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
df486689c0 pan/bi(t): Fix SELECT tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
814f2f1d33 pan/bi: Add CSEL.8 opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
e23d191245 pan/bi: Add FCMP.GL.v2f16 on ADD opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
b4f2d3a51c pan/bi: Add 64-bit int compares
Likewise.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
52cc7165c6 pan/bi: Add some 8-bit compares
Not all but enough to see the pattern.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
2f286eed2a pan/bi: Add CSEL.64 opcode
Chain twice for full 64-bit CSEL.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
100edfe26d pan/bi: Add bool->float opcodes
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Samuel Pitoiset
523e9603d3 radv: enable FMASK for color attachments only
The reason behind this is that FMASK requires CMASK and also that
FMASK for non color attachments looks unnecessary. It's currently
much easier to add this simple check because the driver tries to
always enable DCC first and if we enable FMASK only if CMASK, we
might loose some FMASK compressions.

This helps fixing some new robustness2 tests which fails because
only FMASK is enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4783>
2020-04-28 17:23:05 +02:00
Jason Ekstrand
81ac741f89 anv: Expose CS workgroup sizes based on a maximum of 64 threads
Otherwise, we'll hit asserts in brw_compile_cs.

Fixes: cf12faef61 "intel/compiler: Restrict cs_threads to 64"
Closes: #2835
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4746>
2020-04-28 14:51:08 +00:00
Jason Ekstrand
86f67952d3 intel/devinfo: Compute the correct L3$ size for Gen12
Fixes: 8125d7960b "intel/dev: Add preliminary device info for Tigerlake"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4782>
2020-04-28 14:34:17 +00:00
Bas Nieuwenhuizen
7262c743dc radv: Determine memory type for import based on fd.
This would be necessary for an application to figure out if the
memory was allocated using a memory type with VK_MEMORY_PROPERTY_PROTECTED_BIT.

It also allows one to determine VRAM vs. GTT etc.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4751>
2020-04-28 15:45:03 +02:00
Bas Nieuwenhuizen
f30983be3a radv/winsys: Add function to get domains/flags from fd.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4751>
2020-04-28 15:45:00 +02:00
Bas Nieuwenhuizen
bec9285027 radv: Stop using memory type indices.
Lots of extra coding was involved in managing them.

And for protected memory I was thinking of making a function that
goes from domain+flags to memory types, which can reuse this array.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4751>
2020-04-28 15:44:56 +02:00
Bas Nieuwenhuizen
4a8d172d3f radv: Use actual memory type count for setting app-visible bitset.
Otherwise we might make a bitset that is too large.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4751>
2020-04-28 15:44:27 +02:00
Bas Nieuwenhuizen
8e03cf15f9 radeonsi: Count planes for imported textures.
For the DRI2 lowered YUV import separate pipe_resources get created
but in the end the first resource just gets asked for NPLANES.

Since

1) (Almost) everything uses the first resource + a plane index in the
  Gallium interface.
2) This mirrors non-imported textures.

lets fix this in the driver.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4779>
2020-04-28 11:16:03 +00:00
Gert Wollny
6747a984f5 r600: Enable tesselation for NIR
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
b6d4452661 r600/sfn: Add tesselation shaders
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
d77b81ce50 r600/sfn: Add lowering passes for Tesselation IO
Lower the input and output intrinsics to r600 specific LDS intrinsics

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
1b3e103d0b r600/sfn: Move removing of unused variables
It doesn't make sense to do this in the optimization loop

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
74e0a0a723 r600/sfn: Handle LDS output in VS
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
f102301cc4 r600/sfn: derive the GS from the vertex stage for a common interface
The GS can also provide the primid

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
f7df2c57a2 r600/sfn: extract class to handle the VS export to different stages
This code can be shared with the TESS_EVAL shader

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
38038b369f r600/sfn: Move some shader base methods to the public interface
This will be needed for handling the VS stage export better.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
93f5f9e584 r600/sfn: Add methods to valuepool to get a vector of values
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
7cbca9cf64 r600/sfn: Move emission of barrier from compute shader to shader base
Tess shaders also use these barriers.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
46a3033b43 r600/sfn: Emit some LDS instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
a122303711 r600/sfn: Handle umul24 and umad24
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
7e064659cb r600/sfn: Add IR instruction to fetch the TESS parameters
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
075ea32e48 r600/sfn: Add TF write instruction
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
230beac5f8 r600/sfn: Add LDS instruction to assembly conversion
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
b9d175bed2 r600/sfn: Add LDS IO instructions to r600 IR
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
172868167e r600/sfn: Don't emit inline constants in the r600 IR
This can be handled when lowering to assembly, and it makes testing
for indirect buffer and sampler access easier.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
9bc6c135ac r600/sfn: simplify UBO lowering pass
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
096a026354 r600: Handle texcoord semantics in LDS index evaluation
With NIR the texcoord semantic is enabled, and hence we have to handle
index evaluation differently here.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Christian Gmeiner
7d476a1360 ci: bare-metal: power down device after tests
Helps to save electricity.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4754>
2020-04-28 07:17:24 +00:00
Icecream95
b4cc116339 panfrost: Fix GL_EXT_vertex_array_bgra
Previously, attributes would always use an RGBA swizzle, even if the
format was BGRA.

Fixes piglit tests bgra-sec-color-pointer and bgra-vert-attrib-pointer.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4752>
2020-04-28 00:20:53 +00:00
Dave Airlie
0e135ca227 ci: add llvmpipe paths to virgl rules
since llvmpipe changes will affect virgl

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4777>
2020-04-28 09:55:49 +10:00
Samuel Pitoiset
7a0a6a7180 radv: do not expose GTT as device local memory mostly for APUs
On APUs, the memory is unified (all heaps are equally fast) and
apps should count all memory heaps together. But some games like
Id Tech games (Youngblood and such) don't manage memory correctly
on APUs and they spill everything when one VRAM heap is full.

Instead of spilling buffers, they should just allocate new buffers
in the second heap but it seems like these games are confused if
two memory heaps have the DEVICE_LOCAL_BIT set.

This is probably a first step towards better memory management on
APUs but there is still some work to do if we want to run most apps
with a small dedicated VRAM (256MB or so).

This gives a huge boost for Id Tech games on APUs, and doesn't
seem to reduce Feral games performance.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4771>
2020-04-27 22:41:41 +00:00
Jan Zielinski
4a523baa00 gallium/swr: Fix LLVM 11 compilation issues
Changes needed to adapt to LLVM API changes in vector
and pointer types.

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4769>
2020-04-27 22:29:52 +00:00
Eric Anholt
5082ac007d ci/freedreno: Add a test run of a few driver options.
This lets us get coverage of corner cases of the driver that are tricky to
force a testcase to hit.  We don't want to do a full run of the CTS with
each option because that's a lot of runner time, so stack a bunch of
fractional runs in one test job to amortize the test run setup overhead.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Eric Anholt
b8c66aeb93 ci: Clean up some excessive use of pipes in dEQP results processing.
Given that we use set -x in the script, this actually makes the user
experience of viewing logs nicer.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Eric Anholt
951e101fec ci: Allow namespacing of dEQP run results files.
I want to do multiple runs of some bits of the CTS in one test job to test
some driver options, but I want to be able to see the results from any of
them.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Eric Anholt
69c8dfd49f freedreno: Fix calculation of the const buffer cmdstream size.
The HW packet requires padding the number of pointers you emit, and we
would assertion fail about running out of buffer space if the number of
UBOs to be uploaded was odd.

Fixes: b4df115d3f ("freedreno/a6xx: pre-calculate userconst stateobj size")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Eric Anholt
8b221e0914 ci: Add sanity checking that dEQP gets the expected GL_RENDERER.
It's easy to get something wrong in the driver build or container or
something that results in falling back to swrast, and then your only clue
was runtime and how your failure cases suspiciously match a swrast
driver's.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Eric Anholt
a9e6a3ecc7 ci: Enable --compact-display false on all dEQP runs.
We always want to see status updates happening in the logs, otherwise it
can like maybe your machine hung until the run actually completes.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Mike Blumenkrantz
acc56300dc zink: explicitly unref old fb object when setting new one
this object has a ref from being created, and its lifetime is expected to
be a single frame, so remove that initial ref when we expect to stop
using it

Closes: #2648
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4768>
2020-04-27 21:55:51 +00:00
Mike Blumenkrantz
d3f0022a43 zink: remove framebuffer cache
this can only match when re-rendering identical frames, which is not a
typical case. the lack of cache eviction also leads to memory ballooning.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4768>
2020-04-27 21:55:51 +00:00
Bas Nieuwenhuizen
afd9274d48 st/dri: Set next in template instead of after creation. (v2)
This should prevent horrors like Iris has with the delayed calls
to iris_resource_finish_aux_import just because info is not
available at allocation time.

AFAICT all drivers just copy the template except radeonsi/r600
which reset the next pointer.

AFAICT there is also no other place we get a state tracker setting
next ptrs on a resource.

v2: Updated Gallium docs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3792>
2020-04-27 21:08:01 +00:00
Erik Faye-Lund
a1e453f504 mesa/st: call _mesa_initialize() early
This allows drivers to reliably do things like using the GLSL
type-system during initialization.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Erik Faye-Lund
57f4c66028 mesa/main: one_time_init() -> _mesa_initialize()
This exposes the logic inside one_time_init() as _mesa_initialize(), so
drivers who needs to use functionality initialized in one_time_init
earlier if they need.

This means we can reliably use the GLSL type-system when compiling
driver built-in shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Erik Faye-Lund
6ff94735c9 mesa/main: Do not pass context to one_time_init
There's no longer any reason to pass the context down to one_time_init,
because we always do the same thing regardless of the context, and we
don't change the context.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Erik Faye-Lund
ac9d30431e mesa/main: do not init remap-table per api
This hasn't really been nessecary since 8386088e3d ("dispatch: stop
using _mesa_create_exec_table_es1() for GLES1."), when we stopped
diverging the logic here based on the context-API. So let's simplify the
code a bit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Erik Faye-Lund
9bc98778a4 mesa/main: do not pass context to one-time extension init
_mesa_problem doesn't use the ctx argument for anything, so there's no
reason to pass it. This saves us from needing a context passed down this
code-path in the first place.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Erik Faye-Lund
05c69752cf mesa/main: do not store unrecognized extensions in context
We process extension overrides only when we initialize the first
context, which means that unrecognized extensions only appear in the
first context created.

Let's instead store them in a global array, so we can apply them to all
contexts. This has the added benefit of making the initialization of the
first context less special, which allows us to clean up code a bit more.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Dave Airlie
9bc5b2d169 vulkan: add initial device selection layer. (v6.1)
This is code Bas has out of tree but I think mesa should be shipping it, and I've improved it.

Initially-written-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
v2: add infinite recursion fix (Bas)
v3: Fix wayland/xcb barrier, whitespace
v4: use a macro for getting apis, shorten some lines, use outarray
v5: rewrite in C, use hash_table/mutex.
v6: use once_init to init the mutex, fix freeing ht

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1766>
2020-04-27 19:57:49 +00:00
Eric Anholt
4a42a50585 freedreno/ir3: Add support for disasm of cat2 float32 immediates.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
292231596b freedreno/ir3: Refactor out print_reg_src().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
3bcf819b43 freedreno/ir3: Convert remaining disasm src prints to reginfo.
More lines of code, but they're much more intelligible.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
1462b00391 freedreno/ir3: Add a unit test for our disassembler.
Makes sure that we can maintain consistent output from our disassembly as
we refactor.  I've only included stuff that matches qcom's disasm so far.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
90984ba853 freedreno/ir3: Print a space after nop counts, like qcom's disasm.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
916629f9d7 freedreno/ir3: Fix the disasm of half-float STG dests.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
6c01152c92 ci: Enable GLES 3.1 testing on db820c (a530).
The driver exposes GLES3.1, so let's make sure we're not regressing its
featureset.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4685>
2020-04-27 19:06:57 +00:00
Eric Anholt
b34ee185f4 freedreno: Fix derivatives without texturing on a3xx-a5xx.
The shader variant tells us if we should set the PIXLODENABLE flag.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4685>
2020-04-27 19:06:57 +00:00
Eric Anholt
fa49a5032f ci: Enable GLES3 testing on db410c/db820c (freedreno a306 and a530).
We haven't had it enabled due tointermittent failures.  Those failures
are, as far as I can tell, due to GPU faults from buffer overflows where a
failing test in a thread stomps an otherwise passing thread's buffers.  By
running deqp single-threaded, we can get more consistent failures, at the
cost of needing to do a tiny subset of the tests to keep runtime down.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4685>
2020-04-27 19:06:57 +00:00
Eric Anholt
c259b3ea12 ci: Drop redundant freedreno stage specification.
The source rules give us the stage.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4685>
2020-04-27 19:06:57 +00:00
Jonathan Marek
065068c66a freedreno/ir3: run nir_lower_pack
This lowers pack_32_2x16/unpack_32_2x16 into the scalar versions of those
instructions.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4738>
2020-04-27 18:40:03 +00:00
Jonathan Marek
42093bb694 nir: add pack_32_2x16_split/unpack_32_2x16_split lowering
The new option replaces the two other _split lowering options, since
there's no need for separate options.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4738>
2020-04-27 18:40:03 +00:00
Bas Nieuwenhuizen
cbeda7f78e radv: Add WSI buffers to BO list only if they can be used.
Also reverse the BO list removal loop. This way typical WSI usage
should find the entry in O(active swapchains) iterations, which
should not be a performance issues. Tested with Doom(2106) which
found the entry in 1 iteration every time.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4306>
2020-04-27 18:01:24 +00:00
Bas Nieuwenhuizen
9a61f2a8a9 vulkan/wsi: Add callback to set ownership of buffer.
For radv BO list pruning.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4306>
2020-04-27 18:01:24 +00:00
Samuel Pitoiset
42b1696ef6 ac,radeonsi: fix compilations issues with LLVM 11
Latest LLVM replaced LLVMVectorTypeKind.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2826
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4755>
2020-04-27 17:13:36 +00:00
Jan Zielinski
52aa730d07 gallium/gallivm: remove unused header include for newer LLVM
In the top of the trunk LLVM (11) llvm/IR/CallSite.h header
has been removed. The file compiles without this include also
for LLVM 8, but I'm not sure about 9, 10, and older versions
so I disable it only for the latest LLVM

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4748>
2020-04-27 16:53:44 +00:00
Jan Zielinski
e2a7436dd1 gallium/gallivm: fix compilation issues with llvm 11
Top of the trunk LLVM removes old vector type
and introduces two new ones - one for fixed-width
and one for scalable vectors. This commit fixes
compilation issues by switching from LLVMVectorTypeKind
to LLVMFixedVectorTypeKind for new LLVM.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4748>
2020-04-27 16:53:44 +00:00
Alyssa Rosenzweig
6943eda5c9 ir3: Use shared mediump output lowering
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4716>
2020-04-27 16:32:24 +00:00
Alyssa Rosenzweig
42c9bbaeed nir: Move nir_lower_mediump_outputs from ir3
(Original code from ir3)

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4716>
2020-04-27 16:32:24 +00:00
Ian Romanick
ba8f7f3fa2 nir/algebraic: Detect some kinds of malformed variable names
I spent over an hour trying to debug a problem if a condition on a
variable not being applied.  The problem turned out to be
"a(is_not_negative" instead of "a(is_not_negative)".  This commit would
have detected that problem and failed to build.

v2: Just add $ to the end of the existing regex, and it will fail to
match a malformed string.  Suggested by Jason.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4720>
2020-04-27 09:08:34 -07:00
Alyssa Rosenzweig
fc4eb0714c pan/bi: Implement 16-bit COMBINE lowering
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
280b65126e pan/bi: Fix RA wrt 16-bit swizzles
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
64c33a459f pan/bit: Add SELECT tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
23ffaa16c7 pan/bit: Interpret BI_SELECT
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
a5bfe59196 pan/bi: Force BI_SELECT arguments scalar
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
c12081dca1 pan/bi: Pack ADD SEL16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
d31e4879f0 pan/bi: Pack FMA SEL8
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
7b31f04bac pan/bi: Pack FMA SEL16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
ee561f0e6b pan/bi: Rename BI_SWIZZLE to BI_SELECT
The select version is more general.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
b2c6cf2b6d pan/bi: Eliminate writemasks in the IR
Since the hardware doesn't support them, they're a burden to deal with,
so let's ensure we never get to a place where we would need to at all.

Disables COMBINE lowering for now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
1622478fbd pan/bi: Fix ADD.v4i8 opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
de12311431 pan/bi: Add missing BI_VECTOR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
667190d38a pan/bi: Assign blend descriptor for BLEND op
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:25 +00:00
Alyssa Rosenzweig
1a8f1a324a pan/bi: Passthrough blend types
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:25 +00:00
Alyssa Rosenzweig
5f953b8f50 pan/bi: Passthrough type for ATEST
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:25 +00:00
Alyssa Rosenzweig
462af10bb7 pan/bi: Pack fp16 ATEST
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:25 +00:00
Michel Dänzer
c50bbfa0ab mesa: Skip 3-byte array formats in _mesa_array_format_flip_channels
Byte swapping makes no sense for 3-byte formats: Swapping the order of 2
or 4 bytes at a time would inevitably result in bytes getting mixed up
between neighbouring pixels.

Fixes crash with a debugging build on a big endian machine due hitting
the unreachable() at the end of the function.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2665
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4735>
2020-04-27 14:14:00 +00:00
Marek Olšák
ad5da3e63e mesa: replace GLenum target with gl_shader_stage in NewProgram
So that the GLSL compiler doesn't have to use the GLenum conversion
functions.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4756>
2020-04-27 12:49:53 +00:00
Bas Nieuwenhuizen
531728d6cb drm-uapi,radv,radeonsi: Add amdgpu_drm.h header.
Use it instead of the libdrm provided amdgpu_drm.h header. I used
the kernel revision from the README to get the header so the
header versions should be consistent.

Tested by removing /usr/include/libdrm/amdgpu_drm.h from my dev-machine.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4749>
2020-04-27 12:27:02 +00:00
Marek Olšák
03ba57c6c5 mesa: extend _mesa_bind_vertex_buffer to take ownership of the buffer reference
This reduces overhead of _mesa_reference_buffer_object_ from 6% to 4%
with glthread when profiling the game "torcs" with non-VBO data uploaded
by glthread.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
e9afe045cf mesa: add offset_is_int32 param into _mesa_bind_vertex_buffer for glthread
glthread will pass signed integer offsets, so don't reset negative offsets
to 0 there.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
b8223244c3 mesa: add Const.BufferCreateMapUnsynchronizedThreadSafe & MESA_MAP_THREAD_SAFE
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
19eb89b0f3 gallium: add PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE for glthread
and add radeonsi support.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
6215465842 glthread: sort variables in marshal structures to pack them optimally
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
6f8a387b37 glthread: use GLenum16 in batch buffers to save space
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
b6b1ab8d54 glthread: reduce dereferences of the next batch
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
fc4b78f4cc glthread: use 32-bit align instead of 64-bit ALIGN
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
41671ec544 mesa: remove exec="dynamic" from Draw functions that are not really dynamic
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
00b5791541 mesa: reset primitive restart state in glClientAttribDefaultEXT
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
ee0263e03f mesa: replace _NEW_EVAL with vbo_exec_update_eval_maps
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
cf2f3c2753 ac: reassociate FP expressions for inexact instructions for radeonsi
Totals:
SGPRS: 2591784 -> 2590696 (-0.04 %)
VGPRS: 1666888 -> 1666736 (-0.01 %)
Spilled SGPRs: 4131 -> 4107 (-0.58 %)
Spilled VGPRs: 38 -> 38 (0.00 %)
Private memory VGPRs: 2176 -> 2176 (0.00 %)
Scratch size: 2228 -> 2228 (0.00 %) dwords per thread
Code Size: 52715468 -> 52693584 (-0.04 %) bytes
LDS: 92 -> 92 (0.00 %) blocks
Max Waves: 479897 -> 479892 (-0.00 %)
Wait states: 0 -> 0 (0.00 %)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4696>
2020-04-27 11:20:16 +00:00
Marek Olšák
4b9370cb0f ac: generate FMA for inexact instructions for radeonsi
NIR mostly does this already.

Totals:
SGPRS: 2588520 -> 2591784 (0.13 %)
VGPRS: 1666984 -> 1666888 (-0.01 %)
Spilled SGPRs: 4074 -> 4131 (1.40 %)
Spilled VGPRs: 38 -> 38 (0.00 %)
Private memory VGPRs: 2176 -> 2176 (0.00 %)
Scratch size: 2228 -> 2228 (0.00 %) dwords per thread
Code Size: 52726872 -> 52715468 (-0.02 %) bytes
LDS: 92 -> 92 (0.00 %) blocks
Max Waves: 479872 -> 479897 (0.01 %)
Wait states: 0 -> 0 (0.00 %)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4696>
2020-04-27 11:20:16 +00:00
Marek Olšák
f2c2a28073 ac: update and document fast math flags used by radeonsi
This should have no effect, because we never use FP division, but
it's safer for the future.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4696>
2020-04-27 11:20:16 +00:00
Marek Olšák
3bb65c0670 ac: force enable -structurizecfg-skip-uniform-regions for LLVM 11
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4696>
2020-04-27 11:20:16 +00:00
Danylo Piliaiev
eeab9c93db st/mesa: Treat vertex inputs absent in inputMapping as zero in mesa_to_tgsi
After updating vertex inputs being read based on optimized NIR, they may go out
of sync with inputs in mesa IR. Which is translated to TGSI and used together
with NIR if draw doesn't have llvm.

It's much easier to treat such inputs as zero because there is no pass to
entirely get rid of them and they don't contribute to shader's output.

Fixes: d684fb37bf
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2815
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4705>
2020-04-27 09:30:06 +00:00
Samuel Pitoiset
b785ad5853 gitlab-ci: add lists of expected failures for RADV CI
Currently only supports PITCAIRN, POLARIS10, VEGA10 and NAVI10
with ACO only, but it's a start.

Unfortunately, we have to duplicate and we will have to try to
keep these lists up-to-date, but it's better than nothing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4689>
2020-04-27 07:59:27 +00:00
Samuel Pitoiset
574196d5f6 radv: fix robust_buffer_access if enabled via VkPhysicalDeviceFeatures2
It can be enabled via pEnabledFeatures or via vkPhysicalDeviceFeatures2.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4706>
2020-04-27 09:33:44 +02:00
Dave Airlie
8faa0e2c1b gallivm: fix stencil border
Fixes:
dEQP-GLES31.functional.texture.border_clamp.unused_channels.depth32f_stencil8_sample_stencil
dEQP-GLES31.functional.texture.border_clamp.sampler.uint_stencil

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
565df65651 llvmpipe: clamp color storage for integer types.
If storing to an integer for lower bit size (i.e. 16-bit uint to
10-bit uint), we need to clamp to the maximum value not truncate.

Fixes:
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.color.r16_uint.a2b10g10r10_uint_pack32.optimal_optimal_nearest

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
024b5dfc1c llvmpipe: enable stencil only formats. (v2)
This fixes two bugs, one in clearing and one in sign extensions
for S8 only types, and enables it for use.

These are useful for vulkan support later.

v2: move casting to same place as Z casting.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
65906d1331 llvmpipe/setup: add point size clamping
Fixes
dEQP-GLES2.functional.rasterization.limits.points
dEQP-VK.rasterization.primitive_size.points.point_size*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
1f071db43a llvmpipe: fix d32 unorm depth conversions.
When the depth value was 1.0 and was being converted to Z32_UNORM
the conversion would scale it up to INT32_MAX + 1 which would
cause FPToSI to give incorrect results, changing it to use
FPToUI for the unsigned 32-bit case only fixes it.

Fixes:
GTF-GL45.gtf30.GL3Tests.depth_texture.depth_texture_fbo_clear

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
fe5a8e1ace draw/tess: fix TES patch vertices in.
Fixes CTS KHR-GL45.tessellation_shader.single.max_patch_vertices

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
7b4a7a1117 llvmpipe: fix ssbo alignment
KHR-GL45.geometry_shader.api.max_shader_storage_blocks

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
93b8d89275 llvmpipe: bump max images to 16
This is needed to make some tests run, and helps for vulkan later.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
e1c006204f util/indirect: handle stride less than number of parameters.
It's legal to have a stride less than the num of parameters,
in this case no need to try and over map the buffer which asserts

Fixes:
GTF-GL45.gtf43.GL3Tests.multi_draw_indirect.multi_draw_indirect_stride

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
23efd323aa gallivm/nir: add helper invocation support
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:21 +10:00
Dave Airlie
13e5f331db gallivm/nir: fix image store conversions
This fixes a few of the image store paths, to do the
correct clamping of unsigned/signed values

Fixes: KHR-GLES31.core.layout_binding.block_layout_binding_block_ComputeShader
KHR-GL45.shader_image_load_store.basic-allFormats-store
KHR-GL46.shader_image_load_store.multiple-uniforms

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 10:06:00 +10:00
Connor Abbott
bf3c9d2770 tu: Don't invert point coords
We shouldn't need to invert them, and the Vulkan blob doesn't either.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4733>
2020-04-25 16:15:48 +00:00
Connor Abbott
180f98678f ir3: Remove VARYING_SLOT_PNTC remapping hack
The st now does this for us.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4732>
2020-04-25 15:52:05 +00:00
Connor Abbott
662e9c1801 st/nir: Fix assigning PointCoord location with !PIPE_CAP_TEXCOORD
This was trying to emulate the effect of mapping GL -> TGSI -> NIR,
but failed to handle VARYING_SLOT_PNTC which led to a kludgy workaround
in freedreno.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4732>
2020-04-25 15:52:05 +00:00
Connor Abbott
a64d266134 freedreno/a6xx: Implement PrimID passthrough
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4704>
2020-04-25 01:06:21 +00:00
Connor Abbott
a661d18a39 tu: Implement PrimID passthrough
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4704>
2020-04-25 01:06:21 +00:00
Connor Abbott
1f9839907a ir3: Skip missing VS outputs in VS out map when linking
The hardware is capable of automatically filling in certain values in
the VPC without writing them from the last geometry stage, like
gl_PointCoord or gl_PrimitiveID when there is no GS. However, we *do*
have to enable these outputs (i.e. set the VPC_VAR_DISABLE bit to 0) as
VPC_VAR_DISABLE is really about FS inputs rather than VS outputs. To do
this, we move the computation of the enable bits to ir3_link_add(),
which is also a nice refactor anyway. In addition we detect the PrimID
case specifically so that the driver can program the location.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4704>
2020-04-25 01:06:21 +00:00
Connor Abbott
cc530858c1 freedreno/a6xx: Document PrimID passthrough registers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4704>
2020-04-25 01:06:21 +00:00
Joshua Ashton
0b44582394 radv: Pass logical device to si_emit_graphics
We'll need this in order to retrieve the va of a bo for a future ext.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4728>
2020-04-25 00:32:20 +00:00
Kristian H. Kristensen
bf542484ea freedreno/ir3: Print @tex write mask using 0x%x
That way we can parse it again with the assembler.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen
c801228f0d freedreno/ir3: Reset lex line number when we start parsing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen
34e7179dfa freedreno/ir3: Parse, but ignore @in, @out and @tex headers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen
da467817e3 freedreno/ir3: Move ir3 assembler to backend compiler
For easier reuse.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen
869d86e664 freedreno/computerator: Decouple ir3 assembler
Specifically, don't include ir3_asm.h in the parser as that's
computerator specific.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Andres Gomez
375c7a3863 Revert "meson,ci: Disable sparse_array tests on windows"
The Wine version in the build image has been upgraded.

This reverts commit 6be65b0777.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4678>
2020-04-24 20:01:31 +00:00
Andres Gomez
cb055c6ca4 gitlab-ci: install winehq-stable to get 5.0 instead of 4.0
Additionally, purge the winehq-stable package and its dependencies to
avoid crashing when building for s390x.

v2:
  - Remove winehq-stable and dependencies for s390x.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2657
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Daniel Stone <daniels@collabora.com> [v1]
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4678>
2020-04-24 20:01:31 +00:00
Marek Vasut
c8ccd63911 etnaviv: Fix depth stencil ops on GC880/GC2000
This patch fixes depth stencil ops on MX6S GC880 and MX6Q GC2000.
The following dEQPs now pass:
  dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_depth_funcs.*
  dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_ops.*
which is roughly 600 fixed dEQP tests.

The problem is that if the front-facing stencil has a value mask 0x00 and
the back-facing stencil has some non-zero value mask, then the stencil part
of the depth stencil buffer is written with 0x00 unconditionally. The blob
replicates the value mask of the back-facing stencil to the value mask of
the front-facing stencil to achieve correct rendering, replicate the same
behavior here.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4275>
2020-04-24 21:22:55 +02:00
Rhys Perry
5c5c2dd48f radv/aco: enable 8/16-bit storage and int8/int16 on GFX8+
With this, Doom Eternal should now run with ACO on GFX8+.

The generated 8/16-bit storage code is okay but the generated int8/int16
code is currently pretty bad but it works and apparently Doom Eternal
doesn't actually use it (even though it requires it).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4707>
2020-04-24 20:04:39 +01:00
Rhys Perry
eeccb1a941 aco: lower 8/16-bit integer arithmetic
dEQP-VK.spirv_assembly.type.* passes with the features and extensions
enabled.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4707>
2020-04-24 20:03:59 +01:00
Rhys Perry
bcd9467d5c aco: improve sub-dword emit_split_vector() with sgprs
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
a3dc1441f0 aco: clobber scc in s_bfe_u32 in get_alu_src()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
78389f4cbc aco: handle undef p_create_vector operands in the optimizer
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
deea4b7c5a aco: vectorize global loads/stores
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
7db7206631 aco: allow 8/16-bit shared loads
These should work now

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
48b7beb7b0 aco: add and use get_buffer_store_op() helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
936b70c8cf aco: refactor visit_store_scratch() to use new helpers
Should support 8/16-bit stores now

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
18817041f7 aco: refactor visit_store_global() to use new helpers
Should support 8/16-bit stores now

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
c7bd69b3ae aco: refactor visit_store_ssbo() to use new helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
f75c830433 aco: refactor store_vmem_mubuf() to use new helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
98b4cc7110 aco: refactor store_lds() to use new helpers
It should also work correctly for 8/16-bit stores

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
562353e1f1 aco: add helpers for splitting stores
split_store_data() splits a vector and p_as_uniforms it if needed.

scan_write_mask()/advance_write_mask() are similar to
u_bit_scan_consecutive_range(), but makes it easier to only clear part of
the range and will also give ranges for zero'd bits.

split_buffer_store() is a helper for splitting VMEM/SMEM stores.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
211a9f2057 aco: use emit_load helper for VMEM/SMEM loads
Also implements 8/16-bit loads for scratch/global.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
57e6886f98 aco: refactor load_lds to use new helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
542733dbbf aco: add emit_load helper
This helper is used for recombining split loads, passing the result to
p_as_uniform, aligning the offset down and shifting it right if needed and
handling large constant offsets.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
b77d638e1b aco: add and use RegClass::get() helper
Eventually, we'll probably want to replace the current
RegClass(type, size) constructor with this.

This has a functional change in that get_reg_class() now creates v1/v2
instead of v4b/v8b.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
69b92db131 aco: be more careful about using SMEM for load_global
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
03568249f9 radv: allocate larger shader memory slabs if needed
Fixes dEQP-VK.ssbo.phys.layout.random.16bit.scalar.13 hang with ACO
(features needed for the test are implemented in a later commit)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
51363bd475 radv: align buffer descriptor sizes to dword
This is needed to prevent bounds checking issues when load 8/16-bit values
with dword loads.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Timur Kristóf
62ff2ff808 aco: Move s_setprio to correct place after the gs_alloc_req.
Previously the setprio was inside the branch, so it would only reset
the priority on the first wave, but not the others.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
277f37d036 aco: Use 24-bit multiplication for NGG wave id and thread id.
Both of them should always fit 24 bits anyway.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
eafc1e7365 aco: Use 24-bit multiplication in TCS I/O
The TCS inputs and outputs must always fit into the LDS,
which implies that their addresses also always fit 24 bits.

On AMD GPUs, 24-bit multiplication is much faster than 32-bit
multiplication, so we can take the opportunity to use that
for TCS I/O instead.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
64332a0937 aco: Const correctness for aco_print_ir.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
0c0691d43e aco: Const correctness for get_barrier_interaction.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
f321dc33c8 aco: Abort when RA can't find a register.
Previously, it was just unreachable, which means it will generate
invalid shaders when it encounters a situation when it can't allocate
registers for eg. a large load.

This commit makes it slightly easier to notice such problems without
triggering a GPU hang.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
f2e7aee244 aco: Increase barrier_count to 7 to include barrier_barrier.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
25775d346c aco: Only store TCS outputs to VMEM when they are read by TES.
Totals from affected shaders (GFX10):
Code Size: 10832 -> 10736 (-0.89 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
b779d05d71 radv: Add inputs read by TES to radv_shader_info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Jonathan Marek
c3ef0275c4 turnip: add adreno 650
Tile alignment is 96, with gmem alignment of 0x6000

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
2020-04-24 17:42:01 +00:00
Jonathan Marek
aa3624b8ab turnip: use RESOLVE_TS event
This is required on a650 to flush the GMEM store.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
2020-04-24 17:42:01 +00:00
Jonathan Marek
f81e56c9a0 turnip: remove unused RB_UNKNOWN_8E04_blit
New blit code doesn't change this value, and different values seem to be
related to the driver version and not the GPU version.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
2020-04-24 17:42:01 +00:00
Mike Blumenkrantz
c683138689 zink: set UBO alignments in nir_intrinsic_load_uniform lowering
resolves this error
  error: nir_intrinsic_align_offset(instr) < nir_intrinsic_align_mul(instr) (../src/compiler/nir/nir_validate.c:582)
in ext_packed_depth_stencil-readdrawpixels piglit test

port of f5b14d983e

Fixes: fb64954d9d ("nir: Validate that memory load/store ops work on whole bytes")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4711>
2020-04-24 17:27:30 +00:00
Fritz Koenig
155033bbb3 freedreno: allow FMT6_8_UNORM as a UBWC format
FMT6_8_UNORM is necessary for NV12 textures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4722>
2020-04-24 17:10:39 +00:00
Jason Ekstrand
9c2a11430e spirv: Rewrite CFG construction
This commit completely rewrites the way we extract a structured CFG from
SPIR-V.  The new approach is different in a few ways:

 1. It does a breadth-first search instead of depth-first.  This means
    that we've visited the merge node for a construct before we visit
    any of the nodes inside the construct.  This makes it easier to
    validate things like loop and switch nesting.

 2. We record more information in the CFG.  Earlier commits added a
    parent pointer to vtn_cf_node but we now record all of the merge and
    other special blocks for each CFG node.  This lets us validate
    things more precisely.

 3. It makes heavy use of merge blocks for walking the CFG.  Previously,
    we sort of used them as hints for trying to guess the CFG structure
    but things got dicey whenever a merge was missing.  We had some
    heuristics for how to handle short-circuiting if statements but it
    was a bunch of special cases.

    Now, we make them a fundamental part of walking the CFG.  When we
    encounter a control-flow construct, we add the body components of
    the construct to the BFS work list and then jump to the merge block
    if one exists to continue scanning the current CFG nesting level.
    If no merge block exists, we assume that means that control-flow
    never re-converges in a normal way and that the only way to get back
    to normality is with a direct jump such as a loop break or continue.
    This should make things far more robust when trying to deal with the
    more creative placement (or lack thereof) of merge instructions.

Reviewed-by: Alan Baker <alanbaker@google.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
Closes: #2760
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4446>
2020-04-24 16:29:24 +00:00
Jason Ekstrand
80ffbe915f anv: Add support for HiZ+CCS
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
752eefdb3d intel/isl: Refactor isl_surf_get_ccs_surf
This refactor breaks out a new isl_surf_supports_ccs function which does
most of the validity checking.  The isl_surf_get_ccs_surf function calls
this function and then dives right into constructing the CCS aux_surf.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
3eb1993625 intel/isl: Delete a misleading comment
Untyped messages are only use on Gen9+ for UBOs and SSBOs.  They will
never be used on anything using an isl_surf.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
483a1d5e6c anv/cmd_buffer: Move anv_image_init_aux_tt higher
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
65e541ab16 anv: Simplify a case in layout_to_aux_usage
If it's depth, the only possible value of planes[plane].aux_usage is
ISL_AUX_USAGE_HIZ at least right now.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
5cb6c5d11d intel/blorp: Allow more HiZ usages in hiz_clear_depth_stencil
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
0d91dae7f0 anv: Generalize some aux usage checks
For the checks dealing with fast-clear values, we change them to check
for the depth aspect because the distinction there really is between
color and depth more than between HiZ and CCS.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
86ded00c40 anv/blorp: Do less hard-coding of aux usages
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:44 +00:00
Jason Ekstrand
54b525caf0 anv: Rework anv_layout_to_aux_state
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:44 +00:00
Jason Ekstrand
eb0cede586 anv: Be more conservative about image view usage
We were ORing together the image and stencil usage rather than actually
following the formula in the spec.  This can lead to assertions in other
parts of the driver if we're not careful.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:44 +00:00
Jason Ekstrand
d2f3576d33 anv: Move vk_image_layout_is_read_only higher
While we're at it, we drop some _KHR suffixes

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:44 +00:00
Jason Ekstrand
5de9f4409a anv: Add a vk_image_layout_to_usage_flags helper
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:44 +00:00
Rafael Antognolli
e3ab86c599 anv: Enable HiZ on multi-layer depth buffers.
Improves The Witcher 3 fps by 2-10% on ICL (depending on the configs and
system).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4661>
2020-04-24 15:14:59 +00:00
Christian Gmeiner
709f26c47d etnaviv: support for using generic blit path
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1641>
2020-04-24 13:51:28 +00:00
Christian Gmeiner
b043c40edd etnaviv: call util_blitter_save_fragment_constant_buffer_slot(..)
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1641>
2020-04-24 13:51:28 +00:00
Christian Gmeiner
e731740388 etnaviv: drop default state for FE_HALTI5_ID_CONFIG
It gets emitted when needed - see emit_halti5_only_state(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4729>
2020-04-24 13:39:58 +00:00
Christian Gmeiner
4b0a732db3 docs/features: mark GL_ARB_texture_filter_anisotropic as done for etnaviv
Needs GPUs with HALT0.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4725>
2020-04-24 13:36:56 +00:00
Jonathan Marek
73f7f73ef3 freedreno/ir3: fix incorrect conversion folding
Fixes dEQP-VK.glsl.builtin.function.pack_unpack.unpackhalf2x16_compute

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4708>
2020-04-24 13:11:58 +00:00
Jonathan Marek
dd49a40410 freedreno/ir3: set even bit for f2f16_rtne
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4708>
2020-04-24 13:11:58 +00:00
Jonathan Marek
edc35c1f54 freedreno/ir3: fix 16-bit ssbo access
Update cat6 instruction type, and shift 1 in lower_offset_for_ssbo.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4708>
2020-04-24 13:11:58 +00:00
Rhys Perry
ede1c171c5 aco: fix outdated label_vec from p_create_vector labelling
Fixes random dEQP-VK.transform_feedback.fuzz.* crashes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 2dc550202e
    ('aco: copy-propagate p_create_vector copies of vectors')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4730>
2020-04-24 12:21:15 +00:00
Jason Ekstrand
fdf9b674ee nir/lower_subgroups: Mask off unused bits in ballot ops
Thanks to VK_EXT_subgroup_size_control, we can end up with
gl_SubgroupSize being as low as 8 on Intel.

Fixes: d10de25309 "anv: Implement VK_EXT_subgroup_size_control"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4694>
2020-04-24 11:37:03 +00:00
Jason Ekstrand
9c009da208 anv: Drop an assert
Ever since Vulkan 1.2, this feature has been in core so enabling the
extension is no longer required.

Fixes: 4ef3f7e3d3 "anv: Enable Vulkan 1.2 support"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4694>
2020-04-24 11:37:03 +00:00
Marek Olšák
b520a58cc1 radeonsi: use pipe_blend_state::max_rt to update fewer blend registers
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698>
2020-04-24 10:38:55 +00:00
Marek Olšák
b4fd8f1919 ac,radeonsi: simplify checking for Navi1x chips
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698>
2020-04-24 10:38:54 +00:00
Marek Olšák
d8443b211e ac: out-of-order rasterization is not supported on gfx10
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698>
2020-04-24 10:38:54 +00:00
Jonathan Marek
e43fc003e0 turnip: divide cube map depth by 6
This matches the GL driver and fixes these tests:

dEQP-VK.glsl.texture_functions.query.texturesize.samplercubearray*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4709>
2020-04-24 10:24:55 +00:00
Jason Ekstrand
bc5c438289 spirv: Fix passing combined image/samplers through function calls
Fixes dEQP-VK.spirv_assembly.instruction.function_params.sampler_param

cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4684>
2020-04-24 09:43:21 +00:00
Jason Ekstrand
a1a08a5802 nir/opt_deref: Remove certain sampler type casts
The SPIR-V parser sometimes generates casts from specific sampler types
like sampler2D to the bare sampler type.  This results in a cast which
causes heartburn for drivers but is harmless to remove.

cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4684>
2020-04-24 09:43:21 +00:00
Jason Ekstrand
f4addfdde3 spirv: Use nir_const_value for spec constants
When we originally wrote spirv_to_nir we didn't have a good scalar value
union to handily use so we rolled our own thing for spec constants.  Now
that we have nir_const_value, we can use that and simplify a bunch of
the spec constant logic.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
2020-04-24 09:23:59 +00:00
Jason Ekstrand
6211e79ba5 turnip: Properly handle all sizes of specialization constants
cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
2020-04-24 09:23:59 +00:00
Jason Ekstrand
a4885df9f8 radv: Properly handle all sizes of specialization constants
cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
2020-04-24 09:23:59 +00:00
Jason Ekstrand
a44e63398b anv: Properly handle all sizes of specialization constants
Closes: #2812
cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
2020-04-24 09:23:59 +00:00
Jason Ekstrand
64e4297629 spirv: Allow constants and NULLs in SpvOpConvertUToPtr
We were accidentally asserting that the value had to be a vtn_ssa_value
which isn't true if it, for instance, comes from a spec constant.

Fixes: fb282a68bc "spirv: Implement OpConvertPtrToU and OpConvertUToPtr"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
2020-04-24 09:23:59 +00:00
Eduardo Lima Mitev
4dc7b76276 anv/radv: Resolving 'GetInstanceProcAddr' should not require a valid instance
Since vk_icdGetInstanceProcAddr() is wired through
vkGetInstanceProcAddr() in both drivers, we lost the ability for
'GetInstanceProcAddr' to resolve itself prior to having a valid
instance.

An upcoming spec change will fix that and allow
vkGetInstanceProcAddr() to resolve itself passing NULL as
instance. See https://gitlab.khronos.org/vulkan/vulkan/issues/2057
for details.

This patch implements the change in both radv and anvil.

CTS changes have already landed:
https://gitlab.khronos.org/Tracker/vk-gl-cts/issues/2278

vulkan-loader changes have also landed:
https://gitlab.khronos.org/Tracker/vk-gl-cts/issues/2278

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4273>
2020-04-24 09:09:14 +00:00
Rhys Perry
665250e830 aco: fix v_or(s_lshl) and v_add(s_lshl) optimizations
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: d1621834f3
    ('aco: combine VALU and SALU into various VOP3 instructions')

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2822
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4717>
2020-04-24 08:55:19 +00:00
Timothy Arceri
58b8fbb824 glsl: remove some duplicate code from the nir uniform linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4721>
2020-04-24 08:31:01 +00:00
Timothy Arceri
ffbec55072 glsl: some nir uniform linker fixes
This fixes find_and_update_named_uniform_storage() for subroutines
and also updates num_shader_uniform_components for non opaque
uniforms.

The following patch will ensure this type of bug won't happen again.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4721>
2020-04-24 08:31:01 +00:00
Lionel Landwerlin
9df1d92bbd drm-shim: stub syncobj wait ioctl
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4726>
2020-04-24 10:19:43 +03:00
Lionel Landwerlin
53f151f422 drm-shim: provide a valid fake syncobj handle at creation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4726>
2020-04-24 10:19:43 +03:00
Quentin Glidic
00f5ea9fdc meson: Use dependency.partial_dependency()
It avoids calling pkg-config which was searched for in a wrong way, thus
breaking setup where unprefixed pkg-config was banned (e.g. on Exherbo).

Signed-off-by: Quentin Glidic <sardemff7+git@sardemff7.net>
Fixes: 53f9131205
       ("meson: fix getting cflags from pkg-config")

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4701>
2020-04-24 06:58:32 +00:00
Christian Gmeiner
7aaa0e5908 etnaviv: add anisotropic filter support
I have not seen any usage of TEXTURE_FILTER_ANISOTROPIC in the cmd streams
from the binary blob. Maybe it gets used on some model/rev combinations.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2888>
2020-04-24 06:46:00 +00:00
Christian Gmeiner
1d4c191572 etnaviv: update headers from rnndb
Update to etna_viv commit b40ec2a.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2888>
2020-04-24 06:46:00 +00:00
Christian Gmeiner
7d77295515 etnaviv: anisotropic filtering is supported starting with HALTI0
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2888>
2020-04-24 06:46:00 +00:00
Caio Marcelo de Oliveira Filho
7ee9f851e2 spirv: Update the headers from latest Khronos master
This corresponds to 2ad0492fb00919d99500f1da74abf5ad3c870e4e ("Discuss
generator magic number reservations.")  in
https://github.com/KhronosGroup/SPIRV-Headers.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4682>
2020-04-24 05:56:05 +00:00
Caio Marcelo de Oliveira Filho
5620c3efd8 spirv: Handle instruction aliases in vtn_gather_types
Same solution as done in spirv_info generation.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4682>
2020-04-24 05:56:05 +00:00
Tomeu Vizoso
8cba1a13fa gitlab-ci: Test Virgl with traces
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4659>
2020-04-24 05:37:06 +00:00
Tomeu Vizoso
5a5316ee1b gitlab-ci: Test OpenGL ES 3.1 on virgl
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4659>
2020-04-24 05:37:06 +00:00
Tomeu Vizoso
9b7c20b315 gitlab-ci: Allow test jobs to add options to the dEQP invocation
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4659>
2020-04-24 05:37:06 +00:00
Tomeu Vizoso
34ed5fff5b gitlab-ci: Update virglrenderer in the x86_test-gl image
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4659>
2020-04-24 05:37:06 +00:00
Alyssa Rosenzweig
a3d2936a8e panfrost: The texture descriptor has a pointer to a trampoline
Not to the texture itself, and can have a stride right after for linear
textures.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:55:05 +02:00
Alyssa Rosenzweig
36d49b1fb1 panfrost: Identify texture layout field
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:55:02 +02:00
Alyssa Rosenzweig
ad4024968e pan/decode: Remove is_zs weirdness
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:54:36 +02:00
Tomeu Vizoso
e41894ba15 panfrost: Emit texture descriptor on bifrost
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:42 +02:00
Tomeu Vizoso
d3eb23adb5 panfrost: Emit sampler descriptor on bifrost
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:39 +02:00
Alyssa Rosenzweig
497977bbe6 panfrost: decode textures and samplers on bifrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:34 +02:00
Alyssa Rosenzweig
0167391a1a panfrost: Add tentative bifrost_texture_descriptor
It looks very similar to the Midgard texture descriptor, just with a
bunch of fields moved around and the whole descriptor flattened (so
basically just memory access optimizations, from what I can tell).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:30 +02:00
Alyssa Rosenzweig
81a31911dd panfrost: Set clear_color_[12] in the extra fb desc
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:26 +02:00
Tomeu Vizoso
0a0b670d63 panfrost: Clean up a bit the tiler structs for Bifrost
And set a fixed hierarchy mask for now that seems to generally work.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:21 +02:00
Eric Anholt
0d6019302e vc4: Use NIR shader's num_outputs for generating our new output.
Simplifies the code (we don't have struct or matrix varyings that would
have previously made this code break), and makes sure we keep
s->num_outputs accurate.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Eric Anholt
5593d80a2c freedreno/ir3: Fix sizing of the inputs/outputs array.
If you have a struct, the var's base driver location is not the last
driver location that will be accessed in that var.  We have a shader
struct member with this number for us, already.  Fixes overflows in:

dEQP-GLES31.functional.program_interface_query.program_output.type.interface_blocks.out.named_block_explicit_location.struct.mat3x2

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Eric Anholt
ac937bf878 freedreno/ir3: Fix driver_location of the added vertex_flags varying.
It was ignoring the sizes of the output variables and assuming
single-slot, and failing to update num_outputs.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Eric Anholt
e82ce1852a gallium: Fix setup of pstipple frag coord var.
If the last input was a struct or matrix, we would have overlapped driver
locations for our new position var.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Eric Anholt
035fd4fb9f nir/lower_clip: Fix picking of unused driver locations.
This fixes things when the last input/output is a struct or matrix.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Eric Anholt
91668ae839 nir/lower_two_sided_color: Fix picking of new driver location.
We have shader->num_inputs for "last used input + 1" already, which
respects struct/matrix varyings.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Gert Wollny
49ce749d0e nir: Add umad24 and umul24 opcodes
So far only the singed versions are defined.

v2: Make umad24 and umul24 non-driver specific (Eric Anholt)

v3: Take care of nir_builder and automatic lowering of the
    opcodes if they are not supported by the backend.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4610>
2020-04-23 18:23:04 +00:00
Gert Wollny
42aa348dad nir: Add r600 specific intrinsics for tesselation shader IO
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4610>
2020-04-23 18:23:04 +00:00
Eric Anholt
e9add0c501 drm-shim: Let the driver choose to overwrite the first render node.
When I was writing drm-shim, I was focused on the v3d kmsro case -- use my
intel device as the kmsro display device and add on a simulator-based v3d
device that we could render with.  But for the noop backends we use for
shader-db, it's a lot more useful to just overwrite the first render node
in the system so that you don't have to pass a -d <how many render nodes I
already have in my system> argument.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4664>
2020-04-23 17:54:54 +00:00
Eric Anholt
5a8718f01b freedreno: Make the slice pitch be bytes, not pixels.
Back in a2xx, HW pitches were in pixels, so storing that was reasonable.
Ever since then, the HW wants pitches in bytes, and we have only one
instance of using pitch in pixels in the code (a3xx sysmem path).

Flip things around so that only a2xx has to worry about the cpp for
looking at pitches.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4558>
2020-04-23 16:37:50 +00:00
Eric Anholt
bd76a24fd1 freedreno: Introduce a "cpp_shift" value for cpp divs/muls.
This only converts part of the driver to use it, leaving the rest to the
following commit (which inspired this one).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4558>
2020-04-23 16:37:50 +00:00
Samuel Pitoiset
6a6e71524d radv: adjust the supported subgroup stages
VK_SHADER_STAGE_ALL now includes all ray-tracing related stages.
Noticed while comparing vulkaninfo with some other drivers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4679>
2020-04-23 16:16:09 +00:00
Lionel Landwerlin
efdb7fa9a8 anv: force whole EU array to be powered for perf queries
Because of functional requirements for Gen11, when perf is enabled we
only power half the EU array.

This change forces it to enable everything.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021>
2020-04-23 15:55:59 +00:00
Lionel Landwerlin
a7998371ed intel/perf: specify sseu configuration when supported
Because of functional requirements for Gen11, when perf is enabled we
only power half the EU array.

This change forces it to enable everything.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021>
2020-04-23 15:55:59 +00:00
Lionel Landwerlin
8f152ed101 intel/perf: store default sseu configuration
This is the powergating configuration of the EU array. The default is
everything powered.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021>
2020-04-23 15:55:59 +00:00
Lionel Landwerlin
ea8cb79742 include/drm-uapi: bump headers
From drm-next at the following commit :

  commit 1aa63ddf726ea049279989b93b69b57ce6efd75b
  Merge: 774f1eeb18b0 14d0066b8477
  Author: Dave Airlie <airlied@redhat.com>
  Date:   Wed Apr 22 10:40:34 2020 +1000

      Merge tag 'drm-misc-next-2020-04-14' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021>
2020-04-23 15:55:59 +00:00
Samuel Pitoiset
ff3f775476 radv: simplify checking for Navi1x chips
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4702>
2020-04-23 15:54:32 +02:00
Rhys Perry
0d9fe0405f aco: improve code for 32-bit isign
No shader-db changes on Navi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4667>
2020-04-23 12:39:33 +00:00
Rhys Perry
d1621834f3 aco: combine VALU and SALU into various VOP3 instructions
shader-db (Navi):
Totals from 2916 (2.28% of 127638) affected shaders:
SGPRs: 184427 -> 184283 (-0.08%); split: -0.10%, +0.02%
VGPRs: 143520 -> 143640 (+0.08%); split: -0.00%, +0.09%
CodeSize: 14913548 -> 14913288 (-0.00%); split: -0.00%, +0.00%
MaxWaves: 26034 -> 26012 (-0.08%)
Instrs: 2935435 -> 2930960 (-0.15%); split: -0.15%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4667>
2020-04-23 12:39:33 +00:00
Rhys Perry
607fb4153d aco: move call to store_output_to_temps in store_ls_or_es_output earlier
Skips get_intrinsic_io_basic_offset()

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4667>
2020-04-23 12:39:33 +00:00
Rhys Perry
b497b774a5 aco: remove copy in load_input_from_temps()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4667>
2020-04-23 12:39:33 +00:00
Rhys Perry
2dc550202e aco: copy-propagate p_create_vector copies of vectors
Instead of copying the operands of the other p_create_vector and labelling
the definition with label_vec, copy the operands and label it with
label_temp so that it can be copy-propagated.

This was found while removing a redundant copy in load_input_from_temps()
which removed duplicate p_create_vector instructions.

shader-db (Navi):
Totals from 139 (0.11% of 127638) affected shaders:
VGPRs: 8472 -> 7948 (-6.19%)
CodeSize: 514592 -> 512368 (-0.43%)
MaxWaves: 1089 -> 1195 (+9.73%)
Instrs: 100214 -> 99658 (-0.55%)
Cycles: 400856 -> 398632 (-0.55%)
VMEM: 15545 -> 15338 (-1.33%)
Copies: 5140 -> 4584 (-10.82%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4667>
2020-04-23 12:39:33 +00:00
Rhys Perry
e4383b5c7f aco: decrease the uses of other copy operations after splitting/removing
For copies like v[7:8] = v[8:9], what currently happens is:
- do_copy() will skip the second dword
- the uses of the second dword will be reduced to 0
- the copy operation will be removed from the map
and v8 will never be set to v9.

So just decrease the uses of other operations after splitting or removing
the current operation, so: "v8 = v9" will be split off, it's uses reduced
and then the new copy will be done in the next iteration.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4686>
2020-04-23 11:39:23 +00:00
Erik Faye-Lund
7f17a0a809 meson: correct windows-version define
The macro "_WINVER" does nothing, the macro definitions that matter for
windows API version selection are "_WIN32_WINNT" and "WINVER".

The header "sdkddkver.h" (which is included from thousands of
different windows-headers) defines "WINVER" to the same value as
"_WIN32_WINNT" of only the latter is defined, which explains why this
works right now. But we shouldn't depend on that kind of luck, and
instead define the right maco.

Fixes: 3aee462781 ("meson: add windows compiler checks and libraries")
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4681>
2020-04-23 11:19:52 +00:00
Rhys Perry
32d871b48f nir/algebraic: don't undo lowering of 8/16-bit comparisons to 32-bit
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4387>
2020-04-23 10:57:38 +00:00
Rhys Perry
6d79298992 nir/lower_bit_size: fix lowering of {imul,umul}_high
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4387>
2020-04-23 10:57:38 +00:00
Rhys Perry
715ef95700 nir/lower_bit_size: fix lowering of shifts
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4387>
2020-04-23 10:57:38 +00:00
Joshua Ashton
58f25098a0 radv: Use TRUNC_COORD on samplers
The default behaviour (0) is: "round-nearest-even to n.6 and drop fraction when point sampling" whereas the Vulkan spec simply wants us to floor it (1) "truncate when point sampling".

See 15.6.1 in the Vulkan spec.
https://www.khronos.org/registry/vulkan/specs/1.2-extensions/html/vkspec.html#textures-normalized-operations

The Direct3D spec also mandates this (https://microsoft.github.io/DirectX-Specs/d3d/archive/D3D11_3_FunctionalSpec.htm#7.18.7%20Point%20Sample%20Addressing)

This fixes some point-sampling texture precision issues in some Direct3D 9 titles such as Guild Wars 2 and htoL#NiQ: The Firefly Diary that are not present on other vendors.

Fixes dEQP-VK.pipeline.sampler.exact_sampling.*

https://github.com/Joshua-Ashton/d9vk/issues/450
https://github.com/doitsujin/dxvk/issues/1433

CC: <mesa-stable@lists.freedesktop.org>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3951>
2020-04-23 09:57:08 +00:00
Samuel Pitoiset
7086b38c81 radv: make sure to export the viewport index if FS needs it
If FS reads gl_ViewportIndex but VS doesn't export it, it should
be zero to avoid reading garbage.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2818
Fixes: b424d49ac0 ("radv/llvm: fix exporting the viewport index if the fragment shader needs it")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4687>
2020-04-23 08:10:25 +00:00
Indrajit Kumar Das
133efa112d radeonsi: enable support for AlphaToCoverageDitherControlNV
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4543>
2020-04-23 12:02:56 +05:30
Indrajit Kumar Das
ede36a2efe mesa: add support for AlphaToCoverageDitherControlNV
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4543>
2020-04-23 12:02:45 +05:30
Indrajit Kumar Das
d82f057218 gallium: prepare framework for supporting AlphaToCoverageDitherControlNV
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4543>
2020-04-23 11:58:49 +05:30
Hyunjun Ko
227df2a2ba turnip: Fix crashes when geometry shader constants aren't used
Fixes dEQP-VK.transform_feedback.fuzz.2_level_array.float.geometry, for
example.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4693>
2020-04-23 05:19:04 +00:00
Rob Clark
85f84ea148 gallium: add # of MRT to blend state
To make it possible for drivers to avoid unnecessary blend state change
for unused MRTs.  Otherwise the driver would have to manage different
blend CSOs for different potential #s of render targets.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4619>
2020-04-23 04:49:52 +00:00
Rob Clark
b88778e2de mesa/st: avoid u_vbuf for GLES
64b VBO types are not required for GLES.  So avoid u_vbuf if that was
otherwise the only reason it was used.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4619>
2020-04-23 04:49:52 +00:00
Rob Clark
7e1b57a6d9 mesa: avoid redundant VBO updates
Avoids re-emitting unchanged VBO state, which is a big chunk of the
state updates in gfxbench driver2

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4619>
2020-04-23 04:49:52 +00:00
Kenneth Graunke
155bb74ea9 nir: Actually do load/store vectorization beyond vec2
nir_opt_load_store_vectorize has an is_strided_vector() function that
looks for types with weird explicit strides.  It does so by comparing
the explicit stride against the type-size-derived typical stride.

This had a subtle bug.  Simple vector types (vec2/3/4) have no explicit
stride, so glsl_get_explicit_stride() returns 0.  This never matches the
typical stride for a vector, so is_strided_vector() would return true
for basically any vector type, causing the vectorizer to bail.

I found this by looking at a compute shader with scalar SSBO loads at
offsets 0x220, 0x224, 0x228, 0x22c.  nir_opt_load_store_vectorize would
properly vectorize the first two into a vec2 load, but would refuse to
extend it to a vec3 and ultimately vec4 load because is_strided_vector()
saw a vec2 and freaked out.

Neither ACO nor ANV do load/store vectorization before lowering derefs,
so this shouldn't affect them.  However, I'd like to fix this bug to
avoid the trap for anyone who decides to in the future.  In a branch
where anv used this lowering, this cut an additional 38% of the send
messages in the shader by properly vectorizing more things.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4255>
2020-04-22 21:22:36 -07:00
Simon Zeni
51c1c4d95a mesa: enable GL_EXT_draw_instanced for gles2
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3204>
2020-04-23 03:56:03 +00:00
Hyunjun Ko
0edff5123c turnip: Skip unused regs when setting up streamout buffers
Fixes: 374406a7c4

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Brian Ho <brian@brkho.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4604>
2020-04-23 01:14:19 +00:00
Hyunjun Ko
e892733b80 turnip : Fix wrong offset calculation for xfb buffer.
In vulkan, offsets are already provided through the api
vkCmdBindTransformFeedbackBuffersEXT, so this is duplicated
calculation.

Fixes : 9ff1959ca5

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Brian Ho <brian@brkho.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4604>
2020-04-23 01:14:19 +00:00
Hyunjun Ko
e34b0d65f9 turnip: Implement and enable VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT
Tested by
dEQP-VK.transform_feedback.simple.query*

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Brian Ho <brian@brkho.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4604>
2020-04-23 01:14:19 +00:00
Hyunjun Ko
aff02dd76b turnip: make the struct slot_value of queries get 2 values
In case of transform feedback query, it writes two integer values,
which one is for primitives written and another is for primitives
generated.

To handle this, the second member of the struct slot_value is worth
to be presented not as a padding.

In addition, we also need to modify get/copy_result to access both
values.

This patch is the prep work for the transform feedback query support.

Tested with
dEQP-VK.pipeline.timestamp.*
dEQP-VK.query_pool.occlusion_query.*

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Brian Ho <brian@brkho.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4604>
2020-04-23 01:14:19 +00:00
Kenneth Graunke
259cae4442 intel/compiler: Don't create 64-bit src1 immediates in opt_peephole_sel
64-bit immediates are only allowed as src0.  Long ago, we decided to
avoid constructing such illegal situations in the IR, rather than
allowing them in the IR but then promoting bogus immediates to GRFs
later.  So, we need to fix opt_peephole_sel to not put 64-bit immediates
as src1 of the new SEL instruction.

Fixes: a4b36cd3dd ("intel/fs: Coalesce when the src live range is contained in the dst")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2816
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4692>
2020-04-23 00:53:14 +00:00
Kenneth Graunke
4459a70a6e intel/compiler: Delete abs/neg handling in fsign code
This should have gone away when removing source modifiers.  They won't
be set any longer, so this is simply dead code.

Fixes: b7c47c4f7c ("intel/compiler: Drop nir_lower_to_source_mods() and related handling.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4691>
2020-04-22 17:04:37 -07:00
Kenneth Graunke
220f0e10d8 intel/compiler: Don't copy prop source mods into PICK_HIGH_32BIT
VEC4_OPCODE_PICK_HIGH_32BIT performs 32-bit UD access on a 64-bit DF
value.  abs and negate make sense on DF, but break entirely when
trying to access pieces of the value as unsigned integer dwords.

Fixes an fsign Piglit test on Ivybridge:
tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/vs-sign-neg-abs

It had regressed when I removed nir_lower_to_source_modifiers, as that
caused us to start generating different code which provoked this bug.

Fixes: b7c47c4f7c ("intel/compiler: Drop nir_lower_to_source_mods() and related handling.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2817
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4691>
2020-04-22 17:03:18 -07:00
Dylan Baker
be33cf8ad0 docs: update calendar, add news item, and link releases notes for 20.0.5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4688>
2020-04-22 22:10:31 +00:00
Dylan Baker
defc6400e1 docs: Add sha256 sums for 20.0.5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4688>
2020-04-22 22:10:31 +00:00
Dylan Baker
c790e1c642 docs: Add relnotes for 20.0.5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4688>
2020-04-22 22:10:31 +00:00
Alejandro Piñeiro
ad460c5dd6 v3d: support for textureQueryLOD
Fixes all the ARB_texture_query_lod piglit tests, and needed to get
the Vulkan CTS textureQueryLOD passing with the ongoing Vulkan driver.

Note that LOD Query bit flag became only available on V42 of the hw,
but the v3d40_tex is using V41 as reference. In order to avoid setting
up the infrastructure to support both v41 and v42, we manually set the
bit if the device version is the correct one.

We also fix how the ARB_texture_query_lod (so EXT_texture_query_lod)
is exposed. Before this commit it was always exposed (wrongly as it
was not really supported). Now it is exposed for devinfo.ver >= 42.

v2: move _need_sampler helper to nir.h (Eric Anholt)

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
2020-04-22 23:43:23 +02:00
Alejandro Piñeiro
9fd180394b nir: add nir_tex_instr_need_sampler helper
That is basically nir_tex_instr sampler_index documentation comment
expressed as a helper.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
2020-04-22 23:43:18 +02:00
Alejandro Piñeiro
41bfd0812b v3d/packet: fixing TMU_Config_Parameter_2 definition
v41 interchanged the size and start values for the Padding, and it
seems that v42 inherited it when adding the LOD Query bit.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
2020-04-22 23:39:41 +02:00
Alejandro Piñeiro
9967c26ae6 v3d/tex: Configuration Parameter 1 can be only skipped if P2 can be skipped too
Configuration Parameter packets 1 and 2 are pointed as optional, but
it is not clearly stated if you can skip only P1 when P2 is needed.

In the practice, it seems that the situation P0 - non-P1 - P2 can
causes problems, and at least on the simulator, it seems that sampler
info are attempted to be accessed. So let's just be conservative, and
only skip P1 configuration if we can skip P2 configuration too.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
2020-04-22 23:39:34 +02:00
Alejandro Piñeiro
d0b644d9f9 v3d/tex: don't configure tmu config 1 if not needed
TMU configuration parameter 1 configures the sampler for the texture
operation. But there are some texture operations that doesn't need a
sampler. Skipping the configuration could provide a small perf
improvement on OpenGL. On the incoming Vulkan driver, would allow us
to avoid to set up an unneeded sampler.

Note that we still need to add the sampler configuration parameter if
the output is a 32bit, as it is on the sampler where we configure that
info.

Also, note that for images this is done comparing against a unpacked
p1 default. But in order to do that it is needed to go through the
code that fills up the unpacked p1. We can skip that too.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
2020-04-22 23:38:18 +02:00
Jonathan Marek
c552b5fd1d turnip: implement VK_EXT_sampler_filter_minmax
Passes dEQP-VK.pipeline.sampler.view_type.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4662>
2020-04-22 20:12:14 +00:00
Jonathan Marek
a77e2ac835 turnip: enable cube arrays
Passes dEQP-VK.pipeline.sampler.view_type.cube_array.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4663>
2020-04-22 19:57:20 +00:00
Jonathan Marek
9daeb50454 turnip: implement VK_EXT_filter_cubic
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4672>
2020-04-22 19:03:58 +00:00
Jonathan Marek
a92d2e1109 turnip: implement VK_EXT_sample_locations
Passes tests in:

dEQP-VK.pipeline.multisample.sample_locations_ext.*

Note that these tests fail because of gl_PrimitiveID not working correctly:

dEQP-VK.pipeline.multisample.sample_locations_ext.verify_location.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4665>
2020-04-22 18:46:46 +00:00
Jonathan Marek
83b2f1d8cf turnip: set shader key msaa field
Fixes per-sample interpolation.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4665>
2020-04-22 18:46:46 +00:00
Daniel Schürmann
36e0d2f39b aco: coalesce v_mad's accumulator with definition's affinities
Totals from affected shaders:
Code Size: 8922676 -> 8915192 (-0.08 %) bytes

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
d000d76f13 aco: use upper part of gap in register file if it is beneficial for striding
Totals from affected shaders:
SGPRS: 1717288 -> 1716984 (-0.02 %)
VGPRS: 1305924 -> 1304904 (-0.08 %)
Code Size: 138508892 -> 138420144 (-0.06 %) bytes
Max Waves: 115726 -> 115735 (0.01 %)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
d666d83be2 aco: try to always find a register with stride for even sizes
Totals from affected shaders:
SGPRS: 1162400 -> 1162400 (0.00 %)
VGPRS: 947364 -> 946960 (-0.04 %)
Code Size: 98399300 -> 98399004 (-0.00 %) bytes
Max Waves: 74665 -> 74682 (0.02 %)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
5a3c1f4f0b aco: stop get_reg_simple after reaching max_used_gpr
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
2796cb4c24 aco: refactor get_reg_simple() to return early on exact matches
in the best fit algorithm

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
6792e134f3 aco: don't create vector affinities for operands which are not killed or are duplicates
Totals from affected shaders:
SGPRS: 825184 -> 825184 (0.00 %)
VGPRS: 697640 -> 697240 (-0.06 %)
Code Size: 79244104 -> 79201072 (-0.05 %) bytes
Max Waves: 42388 -> 42386 (-0.00 %)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
edc2b57ac1 aco: allocate full register for subdword definitions if HW doesn't support it
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
97a870cf88 aco: move attempt to find strided register into get_reg_simple()
This simplifies code and helps some shaders

Totals from affected shaders:
Code Size: 51227172 -> 51202216 (-0.05 %) bytes
Max Waves: 19955 -> 19948 (-0.04 %)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
c7f97f110c aco: use DefInfo in more places to simplify RA
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
734f86db6b aco: create and use DefInfo struct in RA
for maintaining all information necessary to find a register.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
5b2f628da3 aco: create pseudo dummy instruction in RA to be used for live-range splits
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
d9f7d1d5cb aco: refactor get_reg() to also handle affinities
This simplifies definition handling and
helps a few shaders

Totals from affected shaders:
Code Size: 659540 -> 659376 (-0.02 %) bytes

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
7c8f4ebca9 aco: refactor get_reg() to take Temp instead of RegClass
This patch also moves get_reg_specified() and
get_reg_vec() before get_reg() to make use of it later.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:22 +00:00
Daniel Schürmann
0a9ed98178 aco: simplify operand handling in RA
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:22 +00:00
Jonathan Marek
a5cce95280 turnip: enable VK_FORMAT_S8_UINT as stencil format
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4588>
2020-04-22 17:45:33 +00:00
Jonathan Marek
44c6c145da turnip: improve GMEM load/store logic
Determine load/store at renderpass creation time.

This also fixes behavior with S8_UINT.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4588>
2020-04-22 17:45:33 +00:00
Jonathan Marek
e72201c787 turnip: disable depth test for S8_UINT attachment
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4588>
2020-04-22 17:45:33 +00:00
Rhys Perry
f13049f48a aco: implement 64-bit sgpr swaps
In our pipeline-db, helps almost exclusively Detroit: Become Human.

Totals from 6726 (5.36% of 125503) affected shaders:
CodeSize: 74680952 -> 74102228 (-0.77%)
Instrs: 14551507 -> 14406001 (-1.00%)
Cycles: 1748272436 -> 1690173104 (-3.32%)
VMEM: 964671 -> 964058 (-0.06%)
Copies: 1993312 -> 1847806 (-7.30%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4469>
2020-04-22 13:25:17 +00:00
Rhys Perry
2ab45f41e0 aco: implement sub-dword swaps
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4469>
2020-04-22 13:25:17 +00:00
Rhys Perry
83fdb1ed3d aco: add VOP3P_instruction
The optimizer isn't yet updated to handle this, since lower_to_hw_instr
will be the only user for now.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4469>
2020-04-22 13:25:17 +00:00
Rhys Perry
8fc24f9a45 aco: fix copy statistic for 64-bit vgpr constant copy
The statistic is in units of instructions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4469>
2020-04-22 13:25:17 +00:00
Connor Abbott
4daa3917a3 ir3: Fix bug with shaders that only exit via discard
discard is supposed to be a terminator, killing the thread, so that it's
possible to exit main solely by a discard e.g. inside of an infinite
loop. However, it currently isn't treated as a terminator in NIR due to
workarounds turning it into demote (d3d-style kill) and even if that
were fixed, we probably wouldn't want to treat discard_if as a jump
since otherwise the scheduler wouldn't be able to schedule things around
it. So, add this workaround which inserts jump instructions as
necessary to guarantee that the program always terminates.

This fixes a hang in dEQP-VK.graphicsfuzz.while-inside-switch, which
conditionally does a discard inside an infinite loop.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4658>
2020-04-22 09:49:40 +00:00
Connor Abbott
8cfa60eab8 ir3: Don't double-insert the first block
The first block was being added to the list twice, once here and once in
emit_block(), leading to list corruption and infinite loops when trying
to traverse the list of blocks backwards.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4658>
2020-04-22 09:49:40 +00:00
Danylo Piliaiev
66229aa169 spirv: Expand workaround for OpControlBarrier on old GLSLang
In SPIRV of compute shader in Aztec Ruins benchmark there is:

OpControlBarrier %uint_1 %uint_1 %uint_0
// ControlBarrier(Device, Device, rdcspv::MemorySemantics(0));

which is an incorrect translation of glsl barrier().

GLSLang, prior to c3f1cdfa, emitted the OpControlBarrier with
Device instead of Workgroup for execution scope.

2365520c covers similar case but isn't applied when execution_scope
is SpvScopeDevice.

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2742
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4660>
2020-04-22 08:46:12 +00:00
Lionel Landwerlin
f402b7c576 iris: fail screen creation when kernel support is not there
v2: Bump check to I915_PARAM_HAS_CONTEXT_ISOLATION (v4.16) (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2803
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4643>
2020-04-22 08:18:33 +00:00
Samuel Pitoiset
bca97abffa gitlab-ci: add a list of excluded tests for RADV
Exclude WSI related tests in CI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4656>
2020-04-22 09:11:53 +02:00
Jason Ekstrand
f1a12d6855 meta,i965: Rip GL_EXT_texture_multisample_blit_scaled support out of meta
i965 is the only driver that ever linked to this code and it's been
doing it in BLORP for a long time now.  The only possible case where it
would have fallen back to meta was for depth/stencil but that should
have ended starting with 6cec618e82.  Rip out the dead code.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4622>
2020-04-22 03:02:23 +00:00
Alyssa Rosenzweig
c6244f9311 panfrost: Assert on unimplemented fragcoord etc
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:18 +00:00
Alyssa Rosenzweig
133c1aba05 panfrost: Fix crashes with small BOs
Affects Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:18 +00:00
Alyssa Rosenzweig
5c6952108c pan/bi: Assert out multiple textures
Only for a moment.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:18 +00:00
Alyssa Rosenzweig
3551c138de pan/bi: Pack TEX compact instructions
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:18 +00:00
Alyssa Rosenzweig
cd5fe3b9e0 pan/bi: Generate TEX_COMPACT instruction
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
0769036a5c pan/bi: Stub out tex_compact logic
We may generate either texture type.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
f85746af35 pan/bi: Add normal/compact/dual switch to IR
For tex.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
93be49b14b pan/bi: Feed data register to BI_TEX
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
76d1bb03d5 pan/bi: Include TEX_COMPACT f16 opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
bfc06b10de pan/bi: Structify TEX compact
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
cf7b952308 pan/bi: Disassemble f16 dual tex
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
a2c735350f pan/bi: Document when dual-tex is triggered
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
6fe41a12e3 pan/bi: Print tex_compact coordinates
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Kenneth Graunke
902c8731f4 intel/compiler: Put back saturate on [iu]add_sat opcodes
I deleted one too many inst->saturate = ... lines.  This one must stay.

Fixes: b7c47c4f7c ("intel/compiler: Drop nir_lower_to_source_mods() and related handling.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4669>
2020-04-22 00:47:40 +00:00
Roman Stratiienko
f699bb42af panfrost: Align Android makefiles with recent changes
Signed-off-by: Roman Stratiienko <roman.stratiienko@nure.ua>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4634>
2020-04-22 00:27:15 +00:00
Eric Anholt
2f4a3c1ca0 freedreno/ir3: Drop handling FRAG_RESULT_DEPTH writing to .z
Since we consume NIR, we get FRAG_RESULT_DEPTH in .x.  Something must have
been working out for this code to not be trying to get an undefined value,
but go ahead and drop it now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4668>
2020-04-21 23:30:53 +00:00
Jonathan Marek
eab73799d1 turnip: fix GMEM resolve in CmdNextSubpass
The BLIT scissor must be set correctly for tu_store_gmem_attachment.

Fixes this deqp test:

dEQP-VK.pipeline.multisample_shader_builtin.sample_id.137_191_1.samples

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4666>
2020-04-21 23:04:34 +00:00
Andres Gomez
e4521aeafc gitlab-ci: adapt query_traces_yaml to gitlab specific changes
This change was missing after acf7e73be5 "(gitlab-ci: make explicit
tracie is gitlab specific)".

Fixes: acf7e73be5 "(gitlab-ci: make explicit tracie is gitlab specific)".
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4638>
2020-04-22 01:37:21 +03:00
Emil Velikov
0a884d7304 egl: simplify client/platform extension handling
For GLVND reasons the client/platform extensions strings should be
split. While in the non GLVND case they're one big string.

Currently we handle this distinction at run-time for not obvious reason.
Adding additional code and complexity.

Swap those with a few well placed #if USE_LIBGLVND guards.

As a side result this removes a minor memory leak due to the
concatenation in the non GLVND case.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4491>
2020-04-21 22:20:24 +00:00
Erik Faye-Lund
013d9e40fe mesa/gallium: do not use enum for bit-allocated member
The signedness of enums are undefined, so on platforms with signed
enums, this isn't going to work. One such platform is Microsoft Windows.

So let's just use an unsigned here instead.

Fixes: b1c4c4c7f5 ("mesa/gallium: automatically lower alpha-testing")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4648>
2020-04-21 21:56:21 +00:00
Jesse Natalie
a842dc154d util/ralloc: fix ralloc alignment on Win64
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4648>
2020-04-21 21:56:21 +00:00
Kenneth Graunke
b7c47c4f7c intel/compiler: Drop nir_lower_to_source_mods() and related handling.
I think we're unanimous in wanting to drop nir_lower_to_source_mods.
It's a bit of complexity to handle in the backend, but perhaps more
importantly, would be even more complexity to handle in nir_search.

And, it turns out that since we made other compiler improvements in the
last few years, they no longer appear to buy us anything of value.
Summarizing the results from shader-db from this patch:

 - Icelake (scalar mode)

   Instruction counts:

   - 411 helped, 598 hurt (out of 139,470 shaders)
   - 99.2% of shaders remain unaffected.  The average increase in
     instruction count in hurt programs is 1.78 instructions.
   - total instructions in shared programs: 17214951 -> 17215206 (<.01%)
   - instructions in affected programs: 1143879 -> 1144134 (0.02%)

   Cycles:

   - 1042 helped, 1357 hurt
   - total cycles in shared programs: 365613294 -> 365882263 (0.07%)
   - cycles in affected programs: 138155497 -> 138424466 (0.19%)

 - Haswell (both scalar and vector modes)

   Instruction counts:

   - 73 helped, 1680 hurt (out of 139,470 shaders)
   - 98.7% of shaders remain unaffected.  The average increase in
     instruction count in hurt programs is 1.9 instructions.
   - total instructions in shared programs: 14199527 -> 14202262 (0.02%)
   - instructions in affected programs: 446499 -> 449234 (0.61%)

   Cycles:

   - 5253 helped, 5559 hurt
   - total cycles in shared programs: 359996545 -> 360038731 (0.01%)
   - cycles in affected programs: 155897127 -> 155939313 (0.03%)

Given that ~99% of shader-db remains unaffected, and the affected
programs are hurt by about 1-2 instructions - which are all cheap
ALU instructions - this is unlikely to be measurable in terms of
any real performance impact that would affect users.

So, drop them and simplify the backend, and hopefully enable other
future simplifications in NIR.

Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4616>
2020-04-21 21:42:21 +00:00
Dylan Baker
fdd0ce12ac meson: update llvm dependency logic for meson 0.54.0
In meson 0.54.0 I fixed the llvm cmake dependency to return "not found"
if shared linking is requested. This means that for 0.54.0 and later we
don't need to do anything, and for earlier versions we only need to
change the logic to force the config-tool method if shared linking is
required.

Fixes: 821cf6942a
       ("meson: Use cmake to find LLVM when building for window")

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4556>
2020-04-21 20:55:12 +00:00
Dylan Baker
8e3696137f remove final imports.h and imports.c bits
This moves the fi_types to a new mesa_private.h and removes the
imports.c file. The vast majority of this patch is just removing
pound includes of imports.h and fixing up the recursive includes.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:04 -07:00
Dylan Baker
289f02d1d5 dri/nouveau: replace assert with unreachable
I don't know why removing imports.h suddenly makes clang realize that
this function can not return in a non-debug build, but it does.
Unreachable is better because it doesn't have this problem.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
c3db0936ef mesa: move ADD_POINTERS to macros.h
I'm not really sure where else to put it. Since imports.h only has two
things left in it (neither of which are abstractions for smoothing away
libc differences) I'd like to get them out of there. macros.h is the
only place I can think of to put this macro.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
bf188f3494 mesa|mapi: replace _mesa_[v]snprintf with [v]snprintf
MSVC 2015 and newer has perfectly valid snprintf and vsnprintf
implementations, let's just use those.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
c495c3af26 replace imports memory functions with utils memory functions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
bb560f2d65 util: Add an aligned realloc function
Mesa has one of these in imports.h, so u_memory needs one as well. This
is the version from mesa ported.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
b85775900d replace malloc macros in imports.h with u_memory.h versions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
9ee6e78a87 Replace IS_INF_OR_NAN with util_is_inf_or_nan
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
369f002591 move windows strtok_r define to u_string
This makes more sense for it, it's only used in the glsl compiler
currently, so we could probably move it there, but this seems fine for a
header only #define.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
53c36dfcfe replace IROUND with util functions
This adds two new util functions to rounding.h, _mesa_iroundf and
mesa_lround, which are just wrappers around roundf and round, that cast
to int and long int respectively. This is possible since mesa recently
dropped support for VC2013, since 2015 and 2017 support roundf.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
df3ce8fb77 mesa/main: remove unused IROUNDD
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
64014c8302 Replace IROUND_POS with _mesa_roundevenf
Which has the same behavior as long as you don't change the FPU rounding
mode. Other code in mesa makes the same assumption so it should be safe
to make that assumption more generally.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
9d9a2819ee replace IFLOOR with util_ifloor
which are exactly the same function with exactly the same implementation

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
72acb66527 u_math: add x86 optimized version of ifloor
This is copied from the one in src/mesa/main/imports.h, which is the
same otherwise.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
bd4e769515 replace LOG2 with util_fast_log2
The implementation is somewhat different, although if you go back in
time far enough they're the same, but the one in u_math was changed a
long time back to be faster.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
f8e4542bad replace _mesa_logbase2 with util_logbase2
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
e190e8cef2 replace _mesa_next_pow_two_* with util_next_power_of_two_*
The 64 bit variant in imports.h isn't even used.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
e533fad182 replace _mesa_is_pow_two with util_is_power_of_two_*
Mostly this uses util_is_power_of_two_or_zero, which has the same
behavior as _mesa_is_pow_two when the input is zero. In cases where the
value is known to be != 0 ahead of time I used the _nonzero variant as
it may be faster on some platforms.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Eric Anholt
c1e7c1f422 freedreno/drm-shim: Add support for faking other adreno chips.
I wanted to look at the effect of a core NIR change on a2xx codegen, but I
don't have any of those boards.  This could also prove useful for quickly
sanity-checking the compiler by running shader-db on it -- a2xx fails in a
few ways on glmark2, and a3xx-a5xx fails on glmark2 in a debug_assert
(which we don't have enabled in our dEQP runs).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4652>
2020-04-21 15:47:39 +00:00
Gert Wollny
cc23920746 r600/sfn: use new temp register allocation when loading single value temporaries
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
50b66622f1 r600/sfn: Count only literals that are not inline to split instruction groups
An instruction group can only support 4 distinct literals, but inline
constants count into this number, so skip them when counting.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
9c7ce4d76e r600/sfn: Fix using the result of a fetch instruction in next fetch
The result of a fetch instruction can't be used as source in the same CF
block, so force a new CF block when the result would be used in the same
vertex fetch block.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
67495ff9aa r600/sfn: Fix handling of GS inputs
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
58d6cda5f5 r600/sfn: Handle b2b1 like it was a mov
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
de7ea88ff8 r600/sfn: Fix null pointer deref in live range evalation
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
5d10e3ec60 r600/nir: Pin interpolation results to channel
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
5e036fef1f r600/sfn: Implementing instructions blocks
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
b51ced7306 r600/sfn: Fix setting alignments when lowering UBOs
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
bc9cf6adff r600/sfn: Reduce array limit for scratch usage
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
6fdc75d1c6 r600: Dump a few more variables when requested
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Abhishek Kumar
f06e4ab319 anv/android: fix assert in anv_import_ahw_memory
Commit fixes assert that triggers when running
   dEQP-VK.api.external.memory.android_hardware_buffer.dedicated.buffer#bind_export_import_bind

on a debug build of Mesa.

Fixes: c79a528d ("anv/android: support import/export of AHardwareBuffer objects")
Signed-off-by: Abhishek Kumar <abhishek4.kumar@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4655>
2020-04-21 11:50:15 +00:00
Danylo Piliaiev
829013d0ca st/mesa: Re-assign vs in locations after updating nir info for ffvp/ARB_vp
After call to nir_shader_gather_info - inputs_read may have changed so
st_nir_assign_vs_in_locations should be called for shader to remain in
sync with vbo state.

Fixes piglit tests:
  gl-1.0-fpexceptions
  gl-1.1-color-material-unused-normal-array
  arb_vertex_program-unused-attributes
regression on several gallium drivers.

Fixes: d684fb37bf
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4645>
2020-04-21 11:16:41 +00:00
Connor Abbott
ae169f38ce tu: Fix the advertised maxFragmentInputComponents
This appears to be limited by VPC_CNTL_0::NUMNONPOSVAR, which is an
8-bit bitfield with no possibility for expansion. Also, in practice
we'll be limited by the vertex shader output maximum, which includes
gl_Position, of 128, so that users won't be able to use more than 124
components anyways. Lower it to match the GL blob.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4641>
2020-04-21 10:04:13 +00:00
Connor Abbott
45ec9c0f3d freedreno/a6xx: Expand various varying-count bitfields
The extra bit needs to be used when using the maximum of 128 varying
components. I confirmed that PC_PRIMITIVE_CNTL_1 and SP_PRIMITIVE_CNTL
are expanded using a trace of the Vulkan blob with the maximum number of
varyings, and changed the others by analogy.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4641>
2020-04-21 10:04:13 +00:00
Erik Faye-Lund
d29fea77b9 docs: remove outdated sentence
The releasing documentation no longer contains this step, so this seems
out of date. The anchor for this link is also removed, making it point
nowhere.

Fixes: d4cb9ef826 ("docs: Update release notes with current process")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4654>
2020-04-21 09:49:22 +00:00
Pierre-Eric Pelloux-Prayer
56f174d14e st/omx: fix gcc warnings
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4584>
2020-04-21 09:16:28 +02:00
Pierre-Eric Pelloux-Prayer
07071cac7b gallium/utils: silence strncpy warning
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4584>
2020-04-21 09:16:26 +02:00
Pierre-Eric Pelloux-Prayer
dbfeec62c3 mesa: fix crash in find_value
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4584>
2020-04-21 09:16:18 +02:00
Jason Ekstrand
7c43b8ce1b nir: Delete the fnoise opcodes
As of the previous commit, they are never used.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4624>
2020-04-21 06:16:13 +00:00
Jason Ekstrand
4386c06770 glsl: Hard-code noise to zero in builtin_functions.cpp
Version 4.4 of the GLSL spec changed the definition of noise*() to
always return zero and earlier versions of the spec allowed zero as a
valid implementation.

All drivers, as far as I can tell, unconditionally call lower_noise()
today which turns ir_unop_noise into zero.  We've got a 10-year-old
comment in there saying "In the future, ir_unop_noise may be replaced by
a call to a function that implements noise."  Well, it's the future now
and we've not yet gotten around to that.  In the mean time, the GLSL
spec has made doing so illegal.

To make things worse, we then pretend to handle the opcode in
glsl_to_nir, ir_to_mesa, and st_glsl_to_tgsi even though it should never
get there given the lowering.  The lowering in st_glsl_to_tgsi defines
noise*() to be 0.5 which is an illegal implementation of the noise
functions according to pre-4.4 specs.  We also have opcodes for this in
NIR which are never used because, again, we always call lower_noise().

Let's just kill the whole opcode and make builtin_builder.cpp build a
bunch of functions that just return zero.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4624>
2020-04-21 06:16:13 +00:00
Timothy Arceri
95f555a93a st/glsl_to_nir: make use of nir linker for linking uniforms
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4395>
2020-04-21 01:57:34 +00:00
Timothy Arceri
0f79e0f7c6 glsl: fix gl_nir_set_uniform_initializers() for bindless textures
We need to skip opaque variables inside blocks, this is handled
elsewhere and will cause a crash here.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4395>
2020-04-21 01:57:34 +00:00
Timothy Arceri
9546440227 glsl: add bindless support to nir uniform linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4395>
2020-04-21 01:57:34 +00:00
Eric Engestrom
57e65cabd4 pick-ui: show commit sha in the pick list
Useful to get more context when a manual merge is needed, for instance.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4651>
2020-04-21 01:25:44 +00:00
Eric Engestrom
32451a15ec pick-ui: make .pick_status.json path relative to the git root instead of the script
This allows the script to be called from another git worktree for instance,
which I need for my workflow :)

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4649>
2020-04-21 01:13:53 +00:00
Eric Engestrom
26a26a3584 pick-ui: compute .pick_status.json path only once
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4649>
2020-04-21 01:13:53 +00:00
Jason Ekstrand
a4b36cd3dd intel/fs: Coalesce when the src live range is contained in the dst
Consider the following case:

    // g119-123 are written somewhere above
    mul.sat(16)   g67<1>F    g6.4<0,1,0>F   g125<8,8,1>F
    mul.sat(16)   g69<1>F    g6.5<0,1,0>F   g125<8,8,1>F
    mul.sat(16)   g71<1>F    g6.6<0,1,0>F   g125<8,8,1>F
    mov(16)       g119<1>F   g67<8,8,1>F
    mov(16)       g121<1>F   g69<8,8,1>F
    mov(16)       g123<1>F   g71<8,8,1>F

We should be able to coalesce it into

    mul.sat(16)   g119<1>F   g6.4<0,1,0>F   g125<8,8,1>F
    mul.sat(16)   g121<1>F   g6.5<0,1,0>F   g125<8,8,1>F
    mul.sat(16)   g123<1>F   g6.6<0,1,0>F   g125<8,8,1>F

What's stopping us is an overly conservative check for writes to the two
registers being coalesced.  The check walks over the intersection of
their live ranges and checks for no writes to either one.  However,
because the register which starts the live range (the mul.sat in this
case) is inside that intersection, we flag it as a write in the
intersection and don't coalesce.  However, this case is safe because the
destination register of the copy is never read after the source is
written.

Shader-db changes on ICL:

    total instructions in shared programs: 16043613 -> 16042610 (<.01%)
    instructions in affected programs: 43036 -> 42033 (-2.33%)
    helped: 226
    HURT: 0
    helped stats (abs) min: 1 max: 30 x̄: 4.44 x̃: 4
    helped stats (rel) min: 0.09% max: 26.67% x̄: 4.89% x̃: 3.43%
    95% mean confidence interval for instructions value: -4.86 -4.02
    95% mean confidence interval for instructions %-change: -5.57% -4.22%
    Instructions are helped.

    total cycles in shared programs: 334766372 -> 334710124 (-0.02%)
    cycles in affected programs: 617548 -> 561300 (-9.11%)
    helped: 214
    HURT: 2
    helped stats (abs) min: 15 max: 1512 x̄: 263.21 x̃: 212
    helped stats (rel) min: 0.30% max: 75.36% x̄: 25.30% x̃: 21.58%
    HURT stats (abs)   min: 40 max: 40 x̄: 40.00 x̃: 40
    HURT stats (rel)   min: 0.15% max: 0.15% x̄: 0.15% x̃: 0.15%
    95% mean confidence interval for cycles value: -277.91 -242.90
    95% mean confidence interval for cycles %-change: -27.58% -22.55%
    Cycles are helped.

No spill/fill changes or gained/lost

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4627>
2020-04-21 01:00:24 +00:00
Jason Ekstrand
14b8d979db intel/fs: Rename block to scan_block in can_coalesce_vars
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4627>
2020-04-21 01:00:24 +00:00
Jonathan Marek
064d39e620 radv: use common nir_convert_ycbcr
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: D Scott Phillips <d.scott.phillips@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4528>
2020-04-20 22:01:43 +00:00
Jonathan Marek
7870d71459 anv: use common nir_convert_ycbcr
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: D Scott Phillips <d.scott.phillips@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4528>
2020-04-20 22:01:43 +00:00
Jonathan Marek
71820c6b02 nir: convert_ycbcr: preserve alpha channel
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: D Scott Phillips <d.scott.phillips@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4528>
2020-04-20 22:01:43 +00:00
Jonathan Marek
f8558fb1ce nir: add common convert_ycbcr for vulkan csc
Copied from anv, replaced state with passing model/range directly.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: D Scott Phillips <d.scott.phillips@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4528>
2020-04-20 22:01:43 +00:00
Dave Airlie
c2d8a4bf17 nir/linking: fix issue with two compact variables in a row. (v2)
If we have a clip dist float[1] compact followed by a tess factor
float[2] we don't want to overlap them, but the partial check
only happens for non-compact vars.

This fixes some issues seen with my sw vulkan layer with
dEQP-VK.clipping.user_defined.clip_distance*

v2: v1 failed with clip/cull mixtures, since in that
case the cull has a location_frac to follow after the clip
so only reset if we get a location_frac of 0 in a subsequent
clip var

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4635>
2020-04-20 21:08:54 +00:00
Eric Engestrom
a24ab26ff7 pick-ui: auto-scroll the feedback window
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4650>
2020-04-20 22:11:00 +02:00
Dylan Baker
8b8a99ba56 bin/pick-ui: Add a new maintainer script for picking patches
In the long term the goal of this script is to nearly completely
automate the process of picking stable nominations, in a well tested
way.

In the short term the goal is to provide a better, faster UI to interact
with stable nominations.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3608>
2020-04-20 19:40:55 +00:00
Dylan Baker
0123b8f634 bin/gen_release_notes.py: Fix version detection for .0 release
The previous version is being calculated incorrectly, resulting in
20.0.0 deciding it's version is 19.3.x+1. This fixes that.

Fixes: 3226b12a09
       ("release: Add an update_release_calendar.py script")

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4070>
2020-04-20 19:21:15 +00:00
Rafael Antognolli
4abf0837cd anv: Add support for new MMAP_OFFSET ioctl.
v2: Update getparam check (Ken).

[jordan.l.justen@intel.com: use 0 offset for MMAP_OFFSET]

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:06 -07:00
Rafael Antognolli
0d387da083 anv: Add anv_device parameter to anv_gem_munmap.
Also update all of its callers.

On the next commit, the device will be used by anv_gem_munmap to choose
whether we need to call the valgrind code or not, depending on which
type of mmap we are using.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:06 -07:00
Rafael Antognolli
d1c1ead7cd iris/bufmgr: Add support for MMAP_OFFSET ioctl.
Use the new DRM_IOCTL_I915_GEM_MMAP_OFFSET ioctl when available.

[jordan.l.justen@intel.com: iris port]
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>

v2: Update getparam check (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:06 -07:00
Rafael Antognolli
ae6f06c509 i965/bufmgr: Add support for MMAP_OFFSET ioctl.
Use the new DRM_IOCTL_I915_GEM_MMAP_OFFSET ioctl when available.

v2: update getparam check (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:06 -07:00
Rafael Antognolli
5bc3f52dd8 iris/bufmgr: Factor out GEM_MMAP ioctl from mmap_cpu and mmap_wc.
We want to add a new ioctl for mmap'ing buffers, so let's avoid
duplicating that code on both functions by extracting it from them
first.

[jordan.l.justen@intel.com: iris port]
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>

v2: Rename helper function names (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:06 -07:00
Rafael Antognolli
a42d715784 i965/bufmgr: Factor out GEM_MMAP ioctl from mmap_cpu and mmap_wc.
We want to add a new ioctl for mmap'ing buffers, so let's avoid
duplicating that code on both functions by extracting it from them
first.

v2: Update helper function names (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:05 -07:00
Rafael Antognolli
16be8ff022 drm-uapi: Update headers from Linux 5.7-rc1.
commit 8f3d9f354286745c751374f5f1fcafee6b3f3136
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Sun Apr 12 12:35:55 2020 -0700

    Linux 5.7-rc1

Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:05 -07:00
Caio Marcelo de Oliveira Filho
a1f6ae4744 spirv: Fix propagation of OpVariable access flags
After the decorations of a variable are evaluated, propagate the
access flag to the associated vtn_pointer.  This was done when
creating the pointer but at that point there was no access flags for
the variable.

Inline the pointer creation to make this point clearer, in isolation
the helper made the impression that the value was being propagated.

Issue found by Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4620>
2020-04-20 16:46:06 +00:00
Caio Marcelo de Oliveira Filho
c76f2292b5 intel/fs,vec4: Properly account SENDs in IVB memory fence
Change brw_memory_fence to return the number of messages emitted, and
use that to update the send_count statistic in code generation.

This will fix the book-keeping for IVB since the memory fences will
result in two SEND messages.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4646>
2020-04-20 09:29:09 -07:00
Daniel Schürmann
c3c1f4d6bc aco: move src1 to vgpr instead of using VOP3 for VOP2 instructions during isel
Is simpler and helps a couple of shaders.
Totals from affected shaders: (Vega)
Code Size: 16341296 -> 16335460 (-0.04 %) bytes

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4642>
2020-04-20 15:12:50 +00:00
Daniel Schürmann
be0bb7e101 aco: fix 64bit fsub
Fixes: 425558bfd5 ('aco: use v_subrev_f32 for fsub with an sgpr operand in src1')

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4642>
2020-04-20 15:12:50 +00:00
Tomeu Vizoso
ad3ef6d0fc gitlab-ci: Test virgl driver
Add virglrenderer to the container and use the vtest transport to test
the Gallium driver. On the "host", llvmpipe is used.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4433>
2020-04-20 13:53:09 +00:00
Erik Faye-Lund
d6b7439619 meson: do not disable incremental linking for debug-builds
Meson specifies /EDITANDCONTINUE for MSVC projects when using the debug
build-type. This collides with our across-the-board disabling of
incremental linking.

It's clear that we don't want to do incremental linking for
release-builds; it increase the code-size, and adds some needless jumps
to be able to patch in new code. But for debug-builds this seems like a
good thing; we can now debug and on-the-fly recompile changes if we want
to.

This flag seems to have been simply forwarded from the SCons build
system, where it makes a bit more sense; SCons doesn't really integrate
with visual studio, so you can't properly debug with it. But Meson does,
so let's keep some bells-and-whistles here.

So let's avoid disabling incremental linking for debug-builds. For other
builds we still want to do this, because Meson only disables it
automatically for minsize-builds.

This avoids a boat-loads of warnings on the form:

warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/INCREMENTAL:NO' specification

Acked-by: Jose Fonseca <jfonseca@vmware.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4572>
2020-04-20 12:25:42 +00:00
Erik Faye-Lund
ed29b24e23 gtest: Update to 1.10.0
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4576>
2020-04-20 11:57:11 +00:00
Samuel Pitoiset
59427b6d1d nir/opt_algebraic: lower 64-bit fmin3/fmax3/fmed3
This unconditionally lowers 64-bit fmin3/fmax3/fmed3 because
AMD hardware doesn't have native instructions, and no drivers
except RADV uses these instructions.

Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.*.f64.*
with ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4570>
2020-04-20 06:59:47 +00:00
Samuel Pitoiset
eed0ace466 nir/lower_int64: lower imin3/imax3/umin3/umax3/imed3/umed3
Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.*.i64.*
with ACO because this backend compiler expects most of the 64-bit
operations to be lowered.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4570>
2020-04-20 06:59:47 +00:00
Pierre-Eric Pelloux-Prayer
17acff01a0 radeonsi: skip vs output optimizations for some outputs
If PT_SPRITE_TEX is enabled, PS inputs are overriden at runtime so
we can't apply the vs output optim.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2747
Fixes: 3ec9975555 ("radeonsi: eliminate trivial constant VS outputs")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4559>
2020-04-20 08:45:16 +02:00
Timothy Arceri
839818332c nir/gcm: dont move movs unless we can replace them later with their src
This helps us avoid moving the movs outside if branches when there
src can't be scalarized.

For example it avoids:

   vec4 32 ssa_7 = tex ssa_6 (coord), 0 (texture), 0 (sampler),
   if ... {
      r0 = imov ssa_7.z
      r1 = imov ssa_7.y
      r2 = imov ssa_7.x
      r3 = imov ssa_7.w
      ...
   } else {
      ...
      if ... {
         r0 = imov ssa_7.x
         r1 = imov ssa_7.w
         ...
      else {
         r0 = imov ssa_7.z
         r1 = imov ssa_7.y
         ...
      }
      r2 = imov ssa_7.x
      r3 = imov ssa_7.w
   }
   ...
   vec4 32 ssa_36 = vec4 r0, r1, r2, r3

Becoming something like:

   vec4 32 ssa_7 = tex ssa_6 (coord), 0 (texture), 0 (sampler),
   r0 = imov ssa_7.z
   r1 = imov ssa_7.y
   r2 = imov ssa_7.x
   r3 = imov ssa_7.w

   if ... {
      ...
   } else {
      if ... {
         r0 = imov r2
         r1 = imov r3
         ...
      else {
         ...
      }
      ...
   }

While this is has a smaller instruction count it requires more work
for the same result. With more complex examples we can also end up
shuffling the registers around in a way that requires more registers
to use as temps so that we don't overwrite our original values along
the way.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Timothy Arceri
e4e5beee8a nir/gcm: be more conservative about moving instructions from loops
Here we only pull instructions further up control flow if they are
constant or texture instructions. See the code comment for more
information.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Timothy Arceri
bf4a6c99d2 nir/gcm: allow derivative dependent intrinisics to be moved earlier
We can't move them later as we could move them into non-uniform
control flow, but moving them earlier should be fine.

This helps avoid a bunch of spilling in unigine shaders due to
moving the tex instructions sources earlier (outside if branches)
but not the instruction itself.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
50a6dd0d65 nir/gcm: Prefer the instruction's original block
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
d4cf2df01a nir/gcm: Delete dead instructions
Classically, global code motion is also a dead code pass.  However, in
the initial implementation, the decision was made to place every
instruction and let conventional DCE clean up the dead ones.  Because
any uses of a dead instruction are unreachable, we have no late block
and the dead instructions are always scheduled early.  The problem is
that, because we place the dead instruction early, it  pushes the
placement of any dependencies of the dead instruction earlier than they
may need to be placed.  In order prevent dead instructions from
affecting the placement of live ones, we need to delete them.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
dca3f351e5 nir/gcm: Add a real concept of "progress"
Now that the GCM pass is more conservative and only moves instructions
to different blocks when it's advantageous to do so, we can have a
proper notion of what it means to make progress.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
5b1615fdb7 nir/gcm: Move block choosing into a helper function
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
1f60f1aa3d nir/gcm: Use an array for storing the early block
We are about to adjust our instruction block assignment algorithm and we
will want to know the current block that the instruction lives in.  In
order to allow for this, we can't overwrite nir_instr::block in the
early scheduling pass.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
6006a9e275 nir/gcm: Loop over blocks in pin_instructions
Now that we have the new block iterators, we can simplify things a bit.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
4d083b52c0 nir/dominance: Better handle unreachable blocks
v2: Fix minor comments (Ken)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Daniel Schürmann
425558bfd5 aco: use v_subrev_f32 for fsub with an sgpr operand in src1
This fixes an accidentally introduced regression.

Fixes: 9be4be515f ('aco: implement 16-bit nir_op_fsub/nir_op_fadd')
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4633>
2020-04-19 16:16:27 +00:00
Daniel Stone
adeef43d15 CI: Disable Lima jobs due to lab unhealthiness
The BayLibre LAVA host appears to be down.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4631>
2020-04-19 12:57:04 +01:00
Daniel Stone
e6c7bdc851 ci/windows: Make Chocolatey installs more reliable
Chocolatey installs depend on downloading binaries from SourceForge,
which is an unreliable host: container builds often fail because it
cannot pick up winflexbison.

Add a loop to retry chocolatey installs if any installs have failed, and
ensure Python is in the accessible PowerShell path rather than relying
on the path being externally refreshed.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4631>
2020-04-19 12:55:02 +01:00
Arcady Goldmints-Orlov
ec1b96fdc8 nir: Lower returns correctly inside nested loops
Inside nested flow control, nir_lower_returns inserts predicated breaks
in the outer block. However, it would omit doing this if the remainder
of the outer block (after the inner block) was empty. This is not
correct in the case of loops, as execution just wraps back around to the
start of the loop, so this change doesn't skip the predication inside
loops.

Fixes: 79dec93ead (nir: Add return lowering pass)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2724

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4603>
2020-04-19 02:54:08 +00:00
Jason Ekstrand
969aeb6a93 anv: Apply any needed PIPE_CONTROLs before emitting state
Push constants in particular can get picked up by the hardware at weird
times that happen *before* 3DPRIMITIVE.  Therefore, we need to flush
before we emit all our state to ensure that any data they may pick up is
in memory in time.  This fixes an app which does vkCmdCopyBuffers
immediately followed by a vkCmdBeginRenderPass and vkCmdDraw which uses
the destination of the copy as a UBO which we push.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4601>
2020-04-19 02:41:22 +00:00
Jason Ekstrand
ffc84eac0d anv: Move vb_emit setup closer to where it's used in flush_state
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4601>
2020-04-19 02:41:22 +00:00
Albert Astals Cid
06c5875fd6 Fix promotion of floats to doubles
Use the f variants of the math functions if the input parameter is a
float, saves converting from float to double and running the double
variant of the math function for gaining no precision at all

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3969>
2020-04-18 19:55:45 +00:00
Connor Abbott
94cb129d51 ir3/ra: Fix off-by-one issues with live-range extension
The intersects() function assumes that inside each instruction values
always die before they are defined, so that if the end of one range is
the same instruction as the beginning of the next then they don't
intersect. However, this isn't the case for values that become live at
the beginning of a basic block, which become live *before* the first
instruction, or instructions that die at the end of a basic block which
die after the last instruction.

For example, imagine that we have two values, A which is defined earlier
in the block and B which is defined in the last instruction of the block
and both die at the end of the basic block (e.g. are used in the next
iteration of a loop). We would compute a range for A of, say, (10, 20)
and for B of (20, 20) since each block's end_ip is the same as the ip of
the last instruction, and RA would consider them to not interfere.
There's a similar problem with values that become live at the beginning.

The fix is to offset the block's start_ip and end_ip by one so that they
don't correspond to any actual instruction. One way to think about this
is that we're adding fake instructions at the beginning and end of a
block where values become live & die. We could invert the order, so that
values consumed by each instruction are considered dead at the end of
the previous instruction, but then values that become dead at the
beginning of the basic block would incorrectly have an empty live range,
with a similar problem at the end of the basic block if we try to say
that values are defined at the beginning of the next instruction. So
the extra padding instructions are unavoidable.

This fixes an accidental infinite loop in the shader for
dEQP-VK.spirv_assembly.type.scalar.u32.switch_vert.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4614>
2020-04-18 17:31:56 +00:00
Lionel Landwerlin
cdc4377591 util/sparse_free_list: manipulate node pointers using atomic primitives
Probably doesn't fix anything but those should be accessed in an
atomic way just like the head pointer.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e4f01eca3b ("util: Add a free list structure for use with util_sparse_array")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4613>
2020-04-18 12:18:03 +00:00
Timothy Arceri
36d2a0eed6 glsl: only set stage ref when uniforms referenced in stage
This updates the NIR uniform linker to behave like the GLSL IR
linker and fixes a number of CTS tests once we enable the NIR
linker for glsl.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
6afd0954e1 glsl: pull mark_array_elements_referenced() out into common helper
We will reuse this helper in the NIR linker in the following
patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
5d992b539e glsl: fix block index in NIR uniform linker
We only want to set the index for the first block of an array. Also
add a comment about why we do not break here.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
5dbebf4982 glsl: error check max user assignable uniform locations
This adds the error check to the NIR uniform linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
c7355c4fb9 glsl: fix explicit locations for the glsl linker
We already reserved explicit locations in the GLSL linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
5442712c6d Revert "glsl: fix resizing of the uniform remap table"
This reverts commit e0aa0a839f.

Instead we fix it correctly in the following patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
723edf859f glsl: tidy up uniform storage value count code in NIR linker
This makes the code cleaner and better reflects what the existing
glsl IR  linker does possibly fixing subtle bugs.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
3e2dbb6e70 glsl: fix struct offsets in the nir uniform linker
This change properly applies layouts to structs of uniforms in a
similar way to the GLSL IR linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
c19ebca308 nir: add matrix_layout to nir_variable data
This will be used by the following patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Lionel Landwerlin
f27c707585 anv: skip writing perfcntr in results on Gen12+
We were not capturing the register already so don't bother writing the
delta in the results (we were previously doing a delta between two 0
values).

v2: Fix unused function warning

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4586>
2020-04-18 13:32:27 +03:00
Lionel Landwerlin
086ea1ac7e intel/perf: Enable MDAPI queries for Gen12
We're missing the cases for gen12 leading to those metrics going
missing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 15b7b56eb2 ("intel/perf: add TGL support")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4586>
2020-04-18 02:04:09 +03:00
Alyssa Rosenzweig
29fb5451a9 pan/bit: Add fp16 min/max tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
532dfebc71 pan/bit: Add constants test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
15fe8d5d7b pan/bit: Add fexp2_fast test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
20f255b18e pan/bit: Add fexp2_fast interp
Kind of a hack and not at all how the h/w does it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
8890fa4050 pan/bit: Add FMA_MSCALE test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
b7dd5b579d pan/bit: _MSCALE interp
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
1e3960a725 pan/bit: Add BI_TABLE test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
93fffd8a11 pan/bit: Add log2 helper interp
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
1c45b58ceb pan/bit: Add FMA_REDUCE test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
5546d1958b pan/bit: Add BI_REDUCE_FMA interp
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
68b4e708f1 pan/bit: Add frexp_log test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
36cfe722e5 pan/bit: Add FREXP interp support
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
c05860789a pan/bi: Lower special ops to 32-bit
We don't have 16-bit tables. We could probably do a bit better to avoid
so many conversions but hey.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
4d0f941036 pan/bi: Round constants to 32-bit
We can only access lo/hi at 32-bit intervals.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
d30df466b5 pan/bi: Dump extra bits for disasm
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
590d66fa0c pan/bi: Pack MAX.v2f16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
f87403c4c1 pan/bi: Pack ADD.v2f16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
7e76c2b806 pan/bi: Structify add and min/max fp16 ADD
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
1647884cec pan/bi: Workaround constant packing errata
Incomplete fix.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
d772bf0101 pan/bi: Try to reuse constants in ALU
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
aba7f09902 pan/bi: Handle st_vary with <4 components
Still no writemasks.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
438e445e17 pan/bi: Fix vec2/3 handling
Otherwise we get moves from null.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
031ad0ecc2 pan/bi: Implement flog2
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
8e52206dbe pan/bi: Add fexp2 implementation
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
b1d4d8f743 pan/bi: Fix lower_combine swizzle rewrite
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
60f252708f pan/bi: Fix packing with low-nibble-set on hi constant
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
10fb5fb460 pan/bi: Fix packing with multiple constants
Need to use bottom nibble of the 64, not the half.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
86c2a6b9fe pan/bi: Fix bi_get_immediate with multiple imms
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
df69304ac8 pan/bi: Ensure CONSTANT srcs have types
So the next commit is valid.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
8f70f4432c pan/bi: Split src/dest index printing
So we can handle constant printing correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
db5c1ae8fd pan/bi: Add fexp2_fast packing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
c3eebfeb11 pan/bi: Pack FMA_MSCALE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
0cb703984e pan/bi: Structify FMA_MSCALE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
4570c34fc7 pan/bi: Add _MSCALE flag for FMA/ADD
So we can bias by exponents.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
d3643cdd81 pan/bi: Add log2_help packing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
6039d51e32 pan/bi: Pack ADD_FREXPM
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
ffa9f6a789 pan/bi: Add bi_pack_fma_2src helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
9904ed170a pan/bi: Add frexp_log packing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
e067fd7b00 pan/bi: Add log_frexpe op to IR
As part of BI_FREXP

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
40befaa965 pan/bi: Add FLOG2_U op to disassembler
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
62c8c3445e pan/bi: Add op for ADD_FREXPM
Used in log2. Needs a new class as well due to scheduling silliness.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
cc61156626 pan/bi: Add special op for exp2
Needs some extra help but basically exp2_fast

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
af01378dce pan/bi: Add BI_TABLE for fast table accesses
Used to implement SPECIAL ops. Separate class since they are faster
which means you can pair them with actual work on FMA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
83d961b0c2 pan/bi: Disable FMA scheduling for CONVERT
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
86c0ea383d pan/bi: Add disasm for ADD.i8
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Jason Ekstrand
f5deed138a spirv,nir: Move the SPIR-V vector insert code to NIR
This also makes spirv_to_nir a bit simpler because the new
nir_vector_insert helper automatically handles a constant component
selector like nir_vector_extract does.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
Jason Ekstrand
feca439697 spirv: Call nir_builder directly for vector_extract
The nir_builder helper already handles checking if the component
selector is an immediate and returns an undef in the OOB case.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
Jason Ekstrand
acaccff4d3 nir/builder: Handle any bit-size selector in nir_extract
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
Jason Ekstrand
4b160c6776 spirv: Error if OpCompositeInsert/Extract has OOB indices
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
Jason Ekstrand
c478f8ad6c spirv,nir: Add a better vector_insert
The old one in spirv_to_nir was besel'ing the whole vector for every
component.  If we think about this as a vector operation, we can do it
way more efficiently.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
Jason Ekstrand
380bf556bf spirv: Handle OOB vector extract operations
We use vtn_vector_extract to handle vector component level derefs.  This
makes us gracefully handle the case where your vector component is OOB
and give you an undef.  The SPIR-V working group is still working out
whether or not this is technically legal but it's very little code for
us to handle it so we may as well.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
D Scott Phillips
dc3a17997b util/sparse_array: don't stomp head's counter on pop operations
By temporarily storing the new_head by a uint32_t, we wipe out the
counter section of the head pointer.

Fixes: e4f01eca ("util: Add a free list structure for use with util_sparse_array")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4612>
2020-04-17 18:41:40 +00:00
Danylo Piliaiev
d684fb37bf st/mesa: Update shader info of ffvp/ARB_vp after translation to NIR
We must update stp->Base.info after translation and before
st_prepare_vertex_program is called, because inputs_read
may become outdated after NIR optimization passes.

For ffvp/ARB_vp inputs_read is populated based on declared
attributes without taking their usage into consideration.
When creating shader variants we expect that their inputs_read
would match the base ones for input mapping to work properly.

Cc: <mesa-stable@lists.freedesktop.org>
Fixes: 8a0dd0af3f
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2758
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4598>
2020-04-17 20:16:15 +03:00
Samuel Pitoiset
c4ca9e66dd aco: fix exporting the viewport index if the fragment shader needs it
It's like the layer, it has to be exported via the pos and also
as a varying if the fragment shader reads it.

Fixes dEQP-VK.draw.shader_viewport_index.fragment_shader_*

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4564>
2020-04-17 16:23:24 +00:00
Samuel Pitoiset
b424d49ac0 radv/llvm: fix exporting the viewport index if the fragment shader needs it
It's like the layer, it has to be exported via the pos and also
as a varying if the fragment shader reads it.

Fixes dEQP-VK.draw.shader_viewport_index.fragment_shader_*

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4564>
2020-04-17 16:23:24 +00:00
Samuel Pitoiset
19aa68ae31 radv: set missing SHARED_VGPR_CNT for NGG VS and ACO
shuffle is implemented with shared VGPRs with ACO and Wave64.

Fixes dEQP-VK.subgroups.shuffle.framebuffer.subgroupshuffle*_vertex
with Wave64.

Fixes: c24d9522da ("radv: Enable ACO for NGG VS/TES, but disable NGG for ACO GS.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4595>
2020-04-17 16:11:17 +00:00
Samuel Pitoiset
fd6e44236c radv: fix geometry shader primitives query with ACO on GFX10
Fixes
dEQP-VK.query_pool.statistics_query.*.geometry_shader_primitives.*.

Fixes: c24d9522da ("radv: Enable ACO for NGG VS/TES, but disable NGG for ACO GS.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4593>
2020-04-17 17:39:16 +02:00
Ian Romanick
f7d620f47d intel/compiler: Fixup operands in fs_builder::emit() that takes array
The versions that take a specific number of operands will do various
fixups depending on the platform and the opcode.  However, the version
that takes an array of sources did not.  This makes all version operate
similarly.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:47 -07:00
Ian Romanick
39ad0c2af8 intel/compiler: CSEL can do saturate
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:46 -07:00
Ian Romanick
5afaa407c1 intel/compiler: Only GE and L modifiers are commutative for SEL
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:43 -07:00
Ian Romanick
a80e44902f intel/compiler: Silence unused parameter warning in update_inst_scoreboard
src/intel/compiler/brw_fs_scoreboard.cpp: In function ‘void {anonymous}::update_inst_scoreboard(const fs_visitor*, const ordered_address*, const fs_inst*, unsigned int, {anonymous}::scoreboard&)’:
src/intel/compiler/brw_fs_scoreboard.cpp:793:45: warning: unused parameter ‘shader’ [-Wunused-parameter]
  793 |    update_inst_scoreboard(const fs_visitor *shader, const ordered_address *jps,
      |                           ~~~~~~~~~~~~~~~~~~^~~~~~

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:42 -07:00
Ian Romanick
c836295dfd intel/compiler: Silence unused parameter warning in fs_live_variables::setup_one_read
src/intel/compiler/brw_fs_live_variables.cpp: In member function ‘void brw::fs_live_variables::setup_one_read(brw::fs_live_variables::block_data*, fs_inst*, int, const fs_reg&)’:
src/intel/compiler/brw_fs_live_variables.cpp:56:67: warning: unused parameter ‘inst’ [-Wunused-parameter]
   56 | fs_live_variables::setup_one_read(struct block_data *bd, fs_inst *inst,
      |                                                          ~~~~~~~~~^~~~

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:40 -07:00
Ian Romanick
62f70a353f intel/compiler: Silence unused parameter warnings in vec4_tcs_visitor
In file included from src/intel/compiler/brw_vec4_tcs.cpp:31:
src/intel/compiler/brw_vec4_tcs.h: In member function ‘virtual void brw::vec4_tcs_visitor::emit_urb_write_header(int)’:
src/intel/compiler/brw_vec4_tcs.h:74:43: warning: unused parameter ‘mrf’ [-Wunused-parameter]
   74 |    virtual void emit_urb_write_header(int mrf) {}
      |                                       ~~~~^~~
src/intel/compiler/brw_vec4_tcs.h: In member function ‘virtual brw::vec4_instruction* brw::vec4_tcs_visitor::emit_urb_write_opcode(bool)’:
src/intel/compiler/brw_vec4_tcs.h:75:57: warning: unused parameter ‘complete’ [-Wunused-parameter]
   75 |    virtual vec4_instruction *emit_urb_write_opcode(bool complete) { return NULL; }
      |                                                    ~~~~~^~~~~~~~

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:37 -07:00
Jason Ekstrand
030e5ceac4 intel/blorp: Delete an unused enum
This was lying around from back when BLORP write to fs_visitor directly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4606>
2020-04-17 15:01:10 +00:00
Jason Ekstrand
d0d039a4d3 anv: Emit pushed UBO bounds checking code in the back-end compiler
This commit fixes performance regressions introduced by e03f965280
in which we started bounds checking our push constants.  This added a
LOT of shader code to shaders which use the robustBufferAccess feature
and led to substantial spilling.  The checking we just added to the FS
back-end is far more efficient for two reasons:

 1. It can be done at a whole register granularity rather than per-
    scalar and so we emit one SIMD8 SEL per 32B GRF rather than one
    SIMD16 SEL (executed as two SELs) for each component loaded.

 2. Because we do it with NoMask instructions, we can do it on whole
    pushed GRFs without splatting them out to SIMD8 or SIME16 values.
    This means that robust buffer access no longer explodes our register
    pressure for no good reason.

As a tiny side-benefit, we're now using can use AND instead of SEL which
means no need for the flag and better scheduling.

Vulkan pipeline database results on ICL:

    Instructions in all programs: 293586059 -> 238009118 (-18.9%)
    SENDs in all programs: 13568515 -> 13568515 (+0.0%)
    Loops in all programs: 149720 -> 149720 (+0.0%)
    Cycles in all programs: 88499234498 -> 84348917496 (-4.7%)
    Spills in all programs: 1229018 -> 184339 (-85.0%)
    Fills in all programs: 1348397 -> 246061 (-81.8%)

This also improves the performance of a few apps:

 - Shadow of the Tomb Raider: +4%
 - Witcher 3: +3.5%
 - UE4 Shooter demo: +2%

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4447>
2020-04-17 14:48:06 +00:00
Jason Ekstrand
eb5a10ff63 intel/cfg: Add first/last_block helpers
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4447>
2020-04-17 14:48:06 +00:00
Connor Abbott
64e3b8d66b tu: Use tu_cs_add_entries() with non-render-pass secondaries
Even though vkCmdRenderPassBegin() isn't allowed inside a secondary
command buffer, vkCmdDispatch() is, and we emit an IB with compute
dispatches, which means that if the secondary command buffer records a
vkCmdDispatch() then we'll have an IB inside an IB, which is illegal.
Fixes hangs in e.g.
dEQP-VK.api.command_buffers.record_simul_use_secondary_one_primary.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4605>
2020-04-17 14:11:07 +00:00
Ilia Mirkin
ac0b8d58b9 mesa: add interaction between compute derivatives and variable local sizes
This is an added interaction in NV_compute_shader_derivatives added in
Sep 2019.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4583>
2020-04-17 13:51:11 +00:00
Karol Herbst
8c949b2aa6 st/mesa: properly guard fallback_copy_texsubimage aginst failed maps
Fixes random crashes in some packed_pixel GLES CTS tests

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4592>
2020-04-17 11:50:21 +00:00
Pierre-Eric Pelloux-Prayer
8521acd660 radeonsi: don't assume ctx is always a threaded_context
Fixes: dcb1e8fef8 ("radeonsi: use thread_context::bytes_mapped_limit")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4587>
2020-04-17 11:36:20 +02:00
Daniel Stone
791134658e Revert "CI: Disable Windows/VS2019 builds"
DNS is now fixed.

This reverts commit 460b8b1758d953b2b820443615d73ccdb1455b5e.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4591>
2020-04-16 22:40:24 +00:00
Ilia Mirkin
2f009c4b49 docs: update for recently-added nvc0 features
Also sort while we're at it.

And add NV_pixel_buffer_object.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4599>
2020-04-16 15:58:37 -04:00
Ilia Mirkin
6ae214ac2e nv50,nvc0: update with latest caps
One notable change is that DRAW_INFO_START_WITH_USER_INDICES is enabled.
An audit of the code indicates that it should work, and a number of
piglit tests exercising glMultiDrawElements continue to function.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4520>
2020-04-16 18:19:27 +00:00
Jason Ekstrand
029471c3c4 intel/batch_decoder: Stop printing to stdout
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4597>
2020-04-16 17:26:16 +00:00
Jason Ekstrand
b8acf9a3d4 anv: Report correct SLM size
Fixes: d787a2d0 "anv: Implement VK_KHR_pipeline_executable_properties"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4597>
2020-04-16 17:26:16 +00:00
Jason Ekstrand
e003104605 intel: Add _const versions of prog_data cast helpers
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4597>
2020-04-16 17:26:16 +00:00
Jason Ekstrand
9b17d7caac nir: Add some sanity assertions in opt_large_constants
We make some assumptions in opt_large_constants such as the size_align
function returning the obvious sizes for vectors.  Now that we've got
the deref_size lying around, we may as well assert it's consistent with
our assumptions.  In particular, we now assert that it really claims
booleans are 32-bit.  If anyone's driver ever decides to be clever and
change this, we'll now catch the breakage earlier.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4468>
2020-04-16 17:00:13 +00:00
Jason Ekstrand
33eb43349e nir: Add an alignment to nir_intrinsic_load_constant
In f1883cc73d we tried to pass through alignments from load_constant
intrinsics when rewriting them to load_ubo in iris.  However, those
intrinsics don't have ALIGN_MUL or ALIGN_OFFSET indices.  It's easy
enough to add them.  We just call the size/align function on the vector
type at the end of our deref chain and use the alignment returned from
there.  It's possible we could do better by walking the whole deref
chain but this should be good enough.

Fixes: f1883cc73d "iris: Set alignments on cbuf0 and constant reads"
Closes: #2739
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4468>
2020-04-16 17:00:13 +00:00
Jan Vesely
8cbeb13704 clover: Check if the detected clang libraries are usable
clang-cpp.so is broken in LLVM-9 and doesn't exist in LLVM<9,
however meson will find and try to use system libraries in these cases.

v2: Use helper variable to dedpulicate test code
    Move second test inside the condition to avoid testing good clang-cpp twice
v3: Check for cross compilation
v4: style fixes

Fixes: ff1a3a00cb
Signed-off-by: Jan Vesely <jano.vesely@gmail.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4457>
2020-04-16 16:29:44 +00:00
Rhys Perry
839c886b34 aco: add missing scc clobber to nir_op_unpack_32_2x16_split_y
The ISA doc is inconsistent whether this instruction writes SCC. It does.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4552>
2020-04-16 17:04:53 +01:00
Rhys Perry
ac74367bef aco: implement various 8/16-bit conversions
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4552>
2020-04-16 17:04:45 +01:00
Rafael Antognolli
0443a4a0af iris: Enable EXT_depth_bounds_test extension.
It was implemented in 1df871f8ff, but to
really enable it we need to enable PIPE_CAP_DEPTH_BOUNDS_TEST.

v2: Add release notes (Ian).

Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4540>
2020-04-16 15:28:59 +00:00
Erik Faye-Lund
daeff19608 meson: tell flex that we support c99
flexint.h uses stdint.h if the compiler claims to support C99. MSVC
doesn't support enough of C99 to enable this flag, but it supports
enough to keep flex happy.

Without this, we end up with *both* some flex-specific definitions as
well as our own definitions from mesa-headers, producing a slew of
compiler warnings.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Erik Faye-Lund
0752648a99 vbo: avoid including wingdi.h on win32
On Windows, main/glheader.h ends up including windows.h which in turn
includes wingdi.h unless the NOGDI macro is defined. And wingdi.h
defines a macro called "ERROR", which we end up redefining below.

To avoid a warning on the redefinition, we can define NOGDI to prevent
wingdi.h from implicitly being included.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Erik Faye-Lund
b55b033f76 mesa: fixup cast expression
This cast-expression was meant to cast the result of the terniary
expression, but it just casted the condition expression instead. Let's
correct this, to silence a compiler-warning.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Erik Faye-Lund
c55fc35435 util/tests: initialize variable
This just silences a compiler-warning about a potentially uninitialized
variable. It's not uninitialized, but it's a bit hard for the compiler
to see. So let's just initialize it to zero.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Erik Faye-Lund
522bb08131 wgl: silence some cast-warnings
These casts cause warnings on x64. We're passing integers through
pointers, which works fine.

So let's make the casts a bit more explicit, to silence that warning.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Erik Faye-Lund
e9ad8af6f3 meson: use override_options to change warning-level
This pevents MSVC from complaining about multiple warning-levels on the
command-line.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Jonathan Marek
2437808671 turnip: image_view rework
Instead of exposing various layout functions, move image-related logic
into tu_image.c and have the image_view pre-fill relevant register values.

This changes the clear/blit code to use image_view.

This will make it much easier to deal with aspect masks, in particular for
planar formats and D32_S8.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4581>
2020-04-16 14:04:18 +00:00
Jonathan Marek
300d0e2b80 turnip: don't limit framebuffer size to image size
Minor cleanup, I couldn't find anything that suggests this should be done,
and anv doesn't do it either.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4581>
2020-04-16 14:04:18 +00:00
Jonathan Marek
b6455e9a6a turnip: compute render_components/srgb_cntl at renderpass creation time
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4581>
2020-04-16 14:04:18 +00:00
Bas Nieuwenhuizen
d80fb02430 winsys/amdgpu: Retrieve WC flags from imported buffers.
Otherwise reading from an imported mapped GTT+WC linear texture
is painfully slow.

Sadly no radeon winsys implementation, as I don't know a suitable
kernel driver operation.

Hit this  in vaGetImage with an image imported from minigbm (which
we are switching to allocate WC for SCANOUT images).

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4542>
2020-04-16 13:51:28 +00:00
Marek Olšák
80797edd71 st/mesa: fix a crash due to passing a draw vertex shader into the driver
Fixes: bc99b22a30
Closes: #2754

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4527>
2020-04-16 13:31:46 +00:00
Daniel Stone
7a794b1de4 CI: Disable Windows/VS2019 builds
An update seems to have poisoned gitlab-runner, and it can no longer
resolve DNS even though the host system can.

Disable this until we can figure out what's going on.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4589>
2020-04-16 14:03:49 +01:00
Daniel Stone
9ecd9463de meson: Make shared-llvm into a tri-state boolean
Choosing LLVM's link mode is legitimate on UNIX systems, but only static
actually really works under Windows.

Give shared-llvm a default 'auto' mode which will pick the previous
default of true (shared) on UNIX systems, but newly defaulting to false
(static) on Windows.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Suggested-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4555>
2020-04-16 12:18:36 +00:00
Connor Abbott
0c05d46237 tu: Align GMEM resolve blit scissor
Even though we normally use the CP_BLIT path with resolves that aren't
aligned, there's a special case when we're resolving the entire image
and there's enough padding so that we can still use CP_EVENT_WRITE::BLIT
when the render area isn't aligned. The hardware seems to not like
unaligned scissors when not clearing, and sometimes hangs rather than
silently round the scissor. This causes hangs in e.g.
dEQP-VK.glsl.derivate.dfdx.texture.msaa4.float_highp.

There was some concern that the CP_BLIT path might use this scissor
also, but I confirmed that this isn't the case by setting it to 0 before
resolving and then noting that CP_BLIT still works (but CP_EVENT_WRITE
doesn't). Furthermore, this is actually impossible because of how the 2D
engine is set up: it gets its own pair of register banks, which can be
switched independently of the 3D register banks, so that 2D events
(CP_BLIT) normally aren't synchronized relative to 3D events
(CP_EVENT_WRITE, CP_DRAW_*, and CP_EXEC_CS) and therefore they can't
share any registers except for non-pipelined registers like RB_CCU_CNTL
that don't use the register bank mechanism at all.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4585>
2020-04-16 12:00:22 +00:00
Erik Faye-Lund
d2e172c03f .mailmap: add an alias for Zhongmin Wu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
eafacdc0fa .mailmap: add alias for Zhaowei Yuan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
56222c13cf .mailmap: add an alias for Yaakov Selkowitz
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
8be72b4c79 .mailmap: add an alias for Xavier Bouchoux
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
a96e1a2d9f .mailmap: specify spelling for Wladimir J. van der Laan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
f9e1e5857d .mailmap: specify spelling for Vivek Kasireddy
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
47d17238dd .mailmap: add an alias for Varad Gautam
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
55f883b8ea .mailmap: add an alias for Vadym Shovkoplias
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
d8982ce84c .mailmap: add an alias for Topi Pohjolainen
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
0399b4f298 .mailmap: add an alias for Tomasz Figa
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
049ce5f417 .mailmap: add an alias for Tom Stellard
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
05b2a4471c .mailmap: add an alias for Tim Wiederhake
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
e430136cc9 .mailmap: add a couple of aliases for Timothy Arceri
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
34ab507c1f .mailmap: add an alias for Timo Aaltonen
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
cb177e054a .mailmap: add an alias for Thierry Reding
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
032a603e3c .mailmap: add a couple of aliases for Suresh Guttula
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
6d1fe4a687 .mailmap: add a couple of aliases for Steinar H. Gunderson
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
5ee82189f2 .mailmap: specify spelling for Sonny Jiang
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
d3f36056fa .mailmap: add an alias for Sergii Romantsov
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
00d9496a12 .mailmap: add an alias for Samuel Li
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
9a5bd1512a .mailmap: add an alias for Rodrigo Vivi
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
c6fcca4bd8 .mailmap: add an alias for Rob Clark
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
b7c1f150c9 .mailmap: add an alias for Renato Caldas
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3dac186704 .mailmap: specify spelling for Randy Xu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
9e904253e4 .mailmap: add an alias for Qiang Yu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3ba1d912a0 .mailmap: add an alias for Plamena Manolova
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
b42a25320e .mailmap: update aliases for Pierre-Eric Pelloux-Prayer
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3ffa511d60 .mailmap: add an alias for Philipp Zabel
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
2b82c50e79 .mailmap: update aliases for Nicolai Hähnle
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
f40c48c0c4 .mailmap: add an alias for Nicholas Bishop
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
004c69fbfa .mailmap: specify spelling for Nian Wu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3ce0e25a98 .mailmap: add an alias for Neil Roberts
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
1ac6946ded .mailmap: add an alias for Neha Bhende
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
a9ed1085ab .mailmap: add alias for Matthias Groß
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3223198b4d .mailmap: update aliases for Marc-André Lureau
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
79bb330904 .mailmap: specify spelling for Liviu Prodea
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
25dcbcbb5b .mailmap: add an alias for Lionel Landwerlin
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
2e53e65e23 .mailmap: add a few aliases for Kristian Høgsberg
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
69489e48bc .mailmap: add a few aliases for Kevin Rogovin
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
ab4c32a50e .mailmap: add a few aliases for Karol Herbst
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
92e4597544 .mailmap: add an alias for Julien Isorce
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
ec001fd323 .mailmap: clean up aliases for Jeremy Huddleston
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
f131469d14 .mailmap: add an alias for Jan Beich
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
d8cb7efd30 .mailmap: specify spelling for James Zhu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
16ed147cab .mailmap: add an alias for Illia Iorin
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
b7f912f11a .mailmap: add an alias for Igor Gnatenko
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
ebaa8765fe .mailmap: specify spelling for Henri Verbeet
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
eb96435aaf .mailmap: specify spelling for Heinrich Fink
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
02b2dc22d3 .mailmap: add an alias for Harish Krupo
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3c86bc03b3 .mailmap: add an alias for Haihao Xiang
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
5ea2e1044e .mailmap: specify spelling for Gurchetan Singh
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
194c9f9982 .mailmap: specify spelling for Francesco Ansanelli
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
edb4e21e26 .mailmap: add an alias for Erik Faye-Lund
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
c11e1d4408 .mailmap: add an alias for Emmanuel Gil Peyrot
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
8efee3cea3 .mailmap: add a couple of aliases for Dylan Noblesmith
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
ee068df4f5 .mailmap: add an alias for Dylan Baker
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
e7699f92e9 .mailmap: add an alias for Dave Airlie
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
4e793b7b4b .mailmap: add an alias for Danylo Piliaiev
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
aa6ad898ba .mailmap: add an alias for Daniel Schürmann
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
e8764917c4 .mailmap: add an alias for Craig Stout
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
7f4d26b3cd .mailmap: specify spelling for Constantine Kharlamov
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
5437ccda31 .mailmap: add an alias for Colin McDonald
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
a07c11b0fe .mailmap: add a few aliases for Christoph Haag
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
0d6af7f9b1 .mailmap: add an alias for Christian Inci
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
832d1f913e .mailmap: add an alias for Christian Gmeiner
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
9278ea2920 .mailmap: add alias for Chenglei Ren
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
43bdff8a5c .mailmap: add a couple of aliases for Chandu Babu Namburu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
d89e963133 .mailmap: add an alias for Chad Versace
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
a3a2c49e13 .mailmap: update aliases for Carl-Philip Hänsch
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
88eb6b7d58 .mailmap: add an alias for Bruce Cherniak
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
da8a309882 .mailmap: add an alias for Boris Brezillon
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
0efc82183d .mailmap: add an alias for Axel Davy
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
84a9fe7766 .mailmap: add an alias for Anuj Phogat
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
5cf8dc7f54 .mailmap: add an alias for Andrii Simiklit
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
174e97e969 .mailmap: add an alias for Alyssa Rosenzweig
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
12ec5b94ea .mailmap: add an alias for Alan Swanson
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Tapani Pälli
a934c8e7ed mesa/st: initialize all winsys_handle fields for memory objects
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reported-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4547>
2020-04-16 11:25:29 +00:00
Michel Dänzer
e3e704c7e7 amd/addrlib: Use enum instead of sparse chars to identify dimensions
The enum values can be used directly as indices into arrays, simplifying
the code.

This significantly cuts down the number of CPU cycles spent inside

* Addr::V2::Gfx9Lib::HwlComputeDccAddrFromCoord:

+------------------------------------------------------------------------+
|+         +++    +                                                x x xx|
|    |_____AM____|                                                 |_A__||
+------------------------------------------------------------------------+
    N           Min           Max        Median           Avg        Stddev
x   5         14.89         15.44         15.14        15.156    0.24704251
+   5          8.26          9.96          9.37         9.282     0.6262747
Difference at 95.0% confidence
	-5.874 +/- 0.694294
	-38.7569% +/- 4.58098%
	(Student's t, pooled s = 0.476051)

* Addr::V2::CoordEq::solve:

+------------------------------------------------------------------------+
| +                                                                x     |
| + +   +   +                                       x           x  x    x|
||__MA____|                                              |______A__M____||
+------------------------------------------------------------------------+
    N           Min           Max        Median           Avg        Stddev
x   5          8.11          9.59          9.21          9.02    0.55605755
+   5          4.28          5.05          4.48         4.564    0.32867917
Difference at 95.0% confidence
	-4.456 +/- 0.666135
	-49.4013% +/- 7.38509%
	(Student's t, pooled s = 0.456744)

(The measured numbers are the percentages of samples inside the
respective function and its calles for
`perf record --call-graph=fp kitty -e false`, measured on a Lenovo
Thinkpad E595 (Picasso))

v2:
* Add missed 'coords[dim] |= bit << ord;' (Pierre-Eric Pelloux-Prayer)
* Put 'ADDR_ASSERT(dim < DIM_S);' where the code previous had
  'ADDR_ASSERT_ALWAYS()' for the s/m dimensions.
* Use 1u for BitsValid (since it's 32-bit unsigned values).
* Use parens in 'BitsValid[dim] & (1u << ord)' for clarity.

Acked-by: Marek Olšák <marek.olsak@amd.com> # v1
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4523>
2020-04-16 11:10:52 +00:00
Michel Dänzer
e58509cdec gbm/dri: Propagate queryDmaBufModifiers return value
We were treating count == 0 as the format not being supported at all,
but queryDmaBufModifiers would return false in that case.

Fixes spuriously reporting all formats as unsupported with radeonsi
(which doesn't support modifiers yet), which would e.g. cause mutter
to think the HW cursor format isn't supported and fall back to SW
cursor.

Suggested-by: Daniel Stone <daniels@collabora.com>
Fixes: 4e3a7dcf6e "gallium: enable
                     EGL_EXT_image_dma_buf_import_modifiers
                     unconditionally"

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4532>
2020-04-16 10:19:35 +00:00
Erik Faye-Lund
b5b25ee032 zink: be less picky about tiled resources
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2678>
2020-04-16 09:57:25 +00:00
Erik Faye-Lund
040a2643c0 st/dri: make sure software color-buffers are linear
Otherwise, we might end up with a tiling-capable driver creating a
tiled resource here instead of linear. This is currently possible with
Zink, although we currently force all display-targets to be linear.

But that doesn't seem like a good idea in the long run, so let's loosen
this restriction.

Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2678>
2020-04-16 09:57:25 +00:00
Lepton Wu
1c4f68b089 virgl: Use ETC2 formats directly when possible.
Don't emulate them with uncompressed formats if the host
support them since uncompressed formats like GL_R16 could
be not available on GLES hosts.

Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
2020-04-16 09:21:21 +00:00
Pierre-Eric Pelloux-Prayer
dcb1e8fef8 radeonsi: use thread_context::bytes_mapped_limit
Limit the amount of "in-flight" mapping to 1/4 of the total RAM.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2735
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4508>
2020-04-16 08:36:04 +00:00
Pierre-Eric Pelloux-Prayer
15cf7d170b gallium/u_threaded: flush batch when hitting mapping limit
tc_transfer_map maps buffers directly, but the unmap operation is executed
in the driver thread.
When an application does a lot of map/unmap operations, without flushing,
this increase the RAM used (and eventually get the app killed by the oom-killer).

This commit allows tc to keep track of how many bytes were mapped during
the current batch. When this estimation becomes higher than a threshold,
we flush the batch.

See: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2735
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4508>
2020-04-16 08:36:04 +00:00
Samuel Pitoiset
35b3963928 radv: do not abort with unknown/unimplemented descriptor types
To workaround a crash with Wolfeinstein Younglood because the
games creates one descriptor with
VK_DESCRIPTOR_TYPE_ACCELERATION_STRUCTURE_NV...

I reported the problem to Machine Games, but still no answer, so
let's remove the unreachable calls (which are technically not
unreachable for buggy apps) to help gamers.

Note that AMDVLK and AMDGPU-PRO don't crash because they ignore
unsupported descriptor types.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4571>
2020-04-16 08:14:56 +00:00
Samuel Pitoiset
11faaf646d aco: fix emitting stream output with tess eval shaders
Fixes dEQP-VK.transform_feedback.simple.winding_patch_list_12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4553>
2020-04-16 07:57:39 +00:00
Samuel Pitoiset
91aa596ca7 aco: implement nir_op_f2i8/nir_op_f2u8
I think we should really refactor the conversions path.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4551>
2020-04-16 08:47:49 +02:00
Ilia Mirkin
04a7ec7c8a nvc0: enable GL_NV_viewport_array2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:21:18 -04:00
Ilia Mirkin
cd092bf937 st/mesa: add support for GL_NV_viewport_array2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:48 -04:00
Ilia Mirkin
b0d0a3c916 gallium: add PIPE_CAP_VIEWPORT_MASK
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:48 -04:00
Ilia Mirkin
8f191e0c37 gallium: add TGSI_PROPERTY_LAYER_VIEWPORT_RELATIVE
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:00 -04:00
Ilia Mirkin
17308c1014 gallium: add TGSI_SEMANTIC_VIEWPORT_MASK
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:00 -04:00
Ilia Mirkin
2d4787d77e mesa: add NV_viewport_array2 enable, attach to glsl
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:00 -04:00
Ilia Mirkin
cc6661bfc8 glsl: add NV_viewport_array2 support
This enables gl_Layer/gl_ViewportIndex when the ext is enabled, as well
as adding the new gl_ViewportMask[] array and viewport_relative layout
qualifier for gl_Layer.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:00 -04:00
Ilia Mirkin
54424a3d13 compiler: add VARYING_SLOT_VIEWPORT_MASK
See GL_NV_viewport_array2::gl_ViewportMask for how this is supposed
to work.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:00 -04:00
Connor Abbott
3a9e66277a ir3: Handle load_ubo_ir3 when promoting to constants
This restores support for promoting UBO loads to constant loads when
using LDC.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4568>
2020-04-15 22:38:20 +00:00
Connor Abbott
abcfb64370 ir3: Fix LDC offset units
I had missed that LDC actually uses vec4 units for its offset. This
means that we have to create a new instruction, and lower it in
ir3_nir_lower_io_offsets, similar to the existing SSBO instructions.
Unfortunately we can't assume that loads are always vec4-aligned, so we
have to use the alignment information that NIR gives us. Unfortunately,
it's currently woefully inadequate, and will have to be fixed to give us
good codegen in the future.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4568>
2020-04-15 22:38:20 +00:00
Karol Herbst
2d489f76f4 Revert "nvc0: fix line width on GM20x+"
This reverts commit a0e57432b7.

It's unclear what caused the test to fail back then. Now it's seems to be
reversed. I tested with a close enough piglit and mesa branch and wasn't
able to reproduce the same test result I've got in some older piglit runs.

Fixes:
dEQP-GLES2.functional.rasterization.primitives.lines_wide
dEQP-GLES2.functional.rasterization.primitives.line_strip_wide
dEQP-GLES2.functional.rasterization.primitives.line_loop_wide
dEQP-GLES2.functional.rasterization.limits.points
dEQP-GLES2.functional.clipping.line.wide_line_z_clip
dEQP-GLES2.functional.clipping.line.wide_line_z_clip_viewport_center
dEQP-GLES2.functional.clipping.line.wide_line_z_clip_viewport_corner
dEQP-GLES2.functional.clipping.line.wide_line_clip
dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_center
dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_corner
dEQP-GLES2.functional.clipping.line.wide_line_attrib_clip
dEQP-GLES2.functional.polygon_offset.default_result_depth_clamp
dEQP-GLES2.functional.polygon_offset.default_factor_1_slope
dEQP-GLES2.functional.polygon_offset.fixed16_result_depth_clamp
dEQP-GLES2.functional.polygon_offset.fixed16_factor_1_slope

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4575>
2020-04-15 22:03:46 +00:00
Jason Ekstrand
26a1adce5b anv: Fix UBO range detection in anv_nir_compute_push_layout
This fixes two bugs:  First, if the same block index showed up twice, we
only pick the first one.  Second, we weren't multiplying by 32.  This
didn't show up in tests because RBA testing is garbage.  Found while
looking at shaders from the UE4 Shooter demo.

Fixes: e03f9652 "anv: Bounds-check pushed UBOs when..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4578>
2020-04-15 21:51:55 +00:00
Jason Ekstrand
b2e4157143 anv: Advertise SEND count through VK_EXT_pipeline_executable_properties
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4578>
2020-04-15 21:51:55 +00:00
Paulo Zanoni
2c82b13c8f iris: make BATCH_SZ smaller by BATCH_RESERVED bytes
Iris allocates gem buffers using buckets of allocation sizes that are
page aligned. We always ask for batch buffers of size BATCH_SZ +
BATCH_RESERVED, which is not page aligned: we ask for 65552 bytes,
which ends up in the bucket of size 81920, resulting in 20% unused
space. Adjust things so there is no waste of space: BATCH_SZ +
BATCH_RESERVED is now 65536.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4561>
2020-04-15 21:35:14 +00:00
Paulo Zanoni
103cb32c79 iris: remove useless bo->gtt_offset assignment
We assign a real value a few lines below, and none of the lines in
between rely on the zeroed bo->gtt_offset value.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4561>
2020-04-15 21:35:14 +00:00
Paulo Zanoni
c586cb23e0 iris: remove unnecessary forward declaration
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4561>
2020-04-15 21:35:14 +00:00
Paulo Zanoni
f3f5016c0b iris: remove hole from struct iris_bo
This decreases the size of the struct on a 64bit machine from 144 to
136. While that's not a lot, this is one of the structs that we're
allocating all the time.

For a full Aztec run on BDW we allocate this struct 3273 times, and we
can have up to 3259 of them live at the same time. So we end up saving
just a little over 6 pages for this benchmark.

Spotted this while trying to add another bool for an unrelated
feature.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4561>
2020-04-15 21:35:14 +00:00
Jon Turney
0158f73f08 Fix util/process test on Cygwin
It seems meson returns the filename with extension for full_path(), even
though Cygwin does it's best to pretend the file doesn't have that
extension.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4514>
2020-04-15 21:10:11 +00:00
Dave Airlie
befe2ff3a6 llvmpipe/nir: free the nir shader
Fixes: 18f896e55d (llvmpipe: add initial nir support)
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4563>
2020-04-16 06:25:46 +10:00
Dave Airlie
cb0a2b3df6 draw/tess: free the NIR
Fixes: 0d02a7b8ca (draw: add main tessellation code)
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4563>
2020-04-16 06:25:43 +10:00
Dave Airlie
f01c0565bb draw: free the NIR IR.
Not sure how I missed this, the ownership was a bit blurry,
free the NIR.

Fixes: bf12bc2dd7 (draw: add nir info gathering and building support)
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4563>
2020-04-16 06:25:39 +10:00
Brian Ho
13ce637f1b freedreno/turnip: Update GRAS_LAYER_CNTL to GRAS_MAX_LAYER_INDEX
After some experimentation, I believe that GRAS_LAYER_CNTL is
actually just a count register storing the number of layers in the
render target. While debugging cube_array geometry tests, I noticed
that the blob was setting an unknown 0x8 to LAYER_CNTL, so I checked
the value of LAYER_CNTL for various layer sizes:

1: LAYER_CNTL=0
2: LAYER_CNTL=1
3: LAYER_CNTL=2
4: LAYER_CNTL=3
9: LAYER_CNTL=8
256: LAYER_CNTL=255
2000: LAYER_CNTL=1999

Seems like this register just stores a count of the largest layer
that can be written to via gl_Layer. This commit updates the reg
docs, freedreno's gs implementation, and turnip's gs implementation.

Fixes dEQP-VK.geometry.layered.cube_array.*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4541>
2020-04-15 16:19:34 +00:00
Brian Ho
c2399e9574 turnip: Emit geometry shader descriptor consts
Without these consts, the geometry shader is unable to read from
textures or uniforms.

Fixes dEQP-VK.geometry.layered.*.readback

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4541>
2020-04-15 16:19:34 +00:00
Brian Ho
d6d5ee29ab turnip: Correctly set layer stride for 3D images
Previously we were using layout.layer_size for the layer stride, but
in Vulkan, you can alias a 3D image as an array of 2D images via the
VK_IMAGE_CREATE_2D_ARRAY_COMPATIBLE_BIT flag. One reason to use
this behavior is so the geometry shader can write to a specific
depth in a 3D framebuffer with gl_Layer.

Since the 3D image is not a *true* layered image, layer_size is 0.
Instead, we can copy what freedreno does and use the slice size.

Fixes dEQP-VK.geometry.layered.3d.*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4541>
2020-04-15 16:19:34 +00:00
Karol Herbst
7e525d29ab gallium: initialize viewport swizzle in cso_set_viewport_dims
Fixes: dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_* and more
Fixes: 4137a79c2a ("gallium: add viewport swizzling state and cap")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4567>
2020-04-15 16:43:57 +02:00
Karol Herbst
1aefe78b47 mesa: fix enum value of VIEWPORT_SWIZZLE_POSITIVE_W_NV
Fixes: ff168b297d ("mesa: add GL_NV_viewport_swizzle support")
Reported-by: Roy Spliet <nouveau@spliet.org>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4567>
2020-04-15 16:43:36 +02:00
Samuel Pitoiset
e2650db952 radv/aco: do not advertise VK_KHR_shader_subgroup_extended_types
It's unsupported because small bitsizes are still not completely
supported. It should have been disabled by default with ACO.

Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4549>
2020-04-15 14:45:43 +02:00
Karol Herbst
4ee2370972 nvc0: enable ASTC and ETC on GM20B
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4554>
2020-04-15 12:08:02 +00:00
Emil Velikov
22406da756 glx: omit loader_loader() for macOS
Earlier commit added the code unconditionally, since the loader code
itself is already built on macOS.
Although it did not consider the #include mayhem that src/glx is.

In particular, none of the __GLXDRI{screen,context,drawable) are
available for macOS... those are pulled by dri_common.[ch].

Ideally we'll untangle that, but for the time being simply #ifdef out
the include/call.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2726
Fixes: b699d070a6 ("glx: set the loader_logger early and for everyone")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4490>
2020-04-15 11:37:21 +00:00
Karol Herbst
471fd41e84 clover: expose cl_arm_shared_virtual_memory for devices with SVM support
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
657ff3b3b8 clover: implement cl_arm_shared_virtual_memory
v2: use static array to keep name -> func mapping
v3: use unordered_map
v4: handle ARM constants
    reorder dispatch table
    wrap enqueue APIs as the command value differs between khr and arm
v5: move declarations into dispatch.hpp
    handle CL_MEM_USES_SVM_POINTER_ARM in clGetMemObjectInfo
v6: breaking long lines

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
a218658556 clover: implement SVM functions for devices with fine grained system SVM support
all of the functionality can be mapped to malloc/free if the device supports
fine grained system SVM.

v2: fix some API bugs found with the OpenCL CTS
v3: remove validate_even_wait_list
    improve implementation of clSetKernelExecInfo
    make clEnqueueSVMFree spec compliant
    rename can_emulate_non_system_svm to has_system_svm and make it a member method
    improve validation in clEnqueueSVMMemFill
    handle CL_MEM_USES_SVM_POINTER in clGetMemObjectInfo
v4: break long lines and other minor cosmetic adjustments

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
d6754eb920 clover: implement clSetKernelArgSVMPointer
it is pretty much identical to a clSetKernelArg for a scalar field, except
it is only valid for global and constant memory pointers.

Also the type equals void* on the Host, so we can just check the size of it.

v2: prefer using target_size to extend the pointer value
v3: handle more corner cases in combiation to clSetKernelArg

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
035e882819 clover: implement CL_DEVICE_SVM_CAPABILITIES
v2: without supporting userptrs SVM can't be implemented as it's impossible
    to ensure memory consistency with HOST_PTR buffers
v3: fix comment style
v4: fixes typo in comment

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
c170c0cfe4 clover: add stubs for SVM
although most of those are 2.0 core functions, there is
cl_arm_shared_virtual_memory to expose those in a 1.2 context. But we
should be able to expose this extension with 1.1 as well as there is no
technicaly reason why this shouldn't work.

v2: move svm functions into existing files
v3: rename func args to match convention

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
e738967d6e gallium: add PIPE_CAP_SYSTEM_SVM
v2: split enum in specific caps to abstract the CL enum
v3: remove BUFFER_SVM caps

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Rhys Perry
c818b5c089 aco: fix 1D textureGrad() on GFX9
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 6f718edced ('aco: simplify gathering of MIMG address components')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4550>
2020-04-15 10:45:07 +00:00
Lionel Landwerlin
8ce46f352e iris: drop cache coherent cpu mapping for external BO
We have to assume any external buffer could be used by the display HW.
In the case that buffer is also CPU mapped, we want to assume no cache
coherency as it is only available between GT & CPU, not display.

Many thanks to Michel Dänzer for the hint!

v2: Move cache coherent drop to bufmgr (Chris)

v3: Also make BO external if created with PIPE_BIND_SHARED (Eric)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2552
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4533>
2020-04-15 09:01:52 +00:00
Samuel Pitoiset
08a396033b aco: fix nir_op_frexp_exp with 16-bit floats and negative exponents
v_frexp_exp_i16_f16 returns the two's complement for negative
exponents. For example, with 0.333252 it returns 0.666504 for
the mantissa and 65535 for the exponent (-1 in decimal).

RADV/LLVM and AMDVLK do a v_bfe_i32 and AMDGPU-PRO uses SDWA with
the sign extension bit set. The latter is probably what we want to
do in long term but for now RA doesn't support changing non-SDWA
instructions to SDWA if useful/needed.

Fixes dEQP-VK.glsl.builtin.precision_fp16_storage16b.frexp.compute.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4546>
2020-04-15 10:12:44 +02:00
Dave Airlie
9bf8e92386 u_blitter: fix stencil blitting
Fixes: KHR-GL45.packed_depth_stencil.blit.depth32f_stencil8

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:33 +10:00
Dave Airlie
381e9fe64a draw: fix user culling pipeline order. (v2)
GL spec requires user culling, then clipping then face culling.
llvmpipe was doing clipping then user culling then face culling.

Fix the ordering by adding a new user_cull stage that does the user
culling

Fixes piglit clip_cull-4.shader_test

v2: simplify this a lot (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:29 +10:00
Dave Airlie
30ef6f5137 draw/cull: run pipeline for culled points.
This just appears to be missing:
Fixes:
KHR-GL45.cull_distance.functional

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:24 +10:00
Dave Airlie
dc261cdd42 llvmpipe/setup: move line stats collection earlier.
You have to count the stats pre-culling here.

Fixes:
KHR-GL45.pipeline_statistics_query_tests_ARB.functional_primitives_vertices_submitted_and_clipping_input_output_primitives

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:20 +10:00
Dave Airlie
80fa8304c8 draw: fix tessellation stats query
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:17 +10:00
Dave Airlie
335827eade llvmpipe: fix no tokens detections.
this only applies to the TGSI path, fixes
KHR-GLES31.core.geometry_shader.api.program_pipeline_vs_gs_capture

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:14 +10:00
Dave Airlie
ccc6a48ec5 gallivm/draw: calloc prim id toavoid undef
Otherwise masked off channels can access random bad memory

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:11 +10:00
Dave Airlie
e20b3b3720 gallivm/nir: lower implicit lod to tex.
Fixes some sampling issues in vertex shaders

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:08 +10:00
Dave Airlie
c494ed0467 gallivm: fix left over shader vote debug
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:06 +10:00
Dave Airlie
7690606bf7 llvmpipe/query: fix transform feedback overflow any queries.
The any queries need to signal if any stream has overflowed,
so we have to track all the streams.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:03 +10:00
Dave Airlie
96e12ca7d7 llvmpipe: report tessellation shader statistics.
Fixes KHR-GL45.pipeline_statistics_query_tests_ARB.functional_tess_queries

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:00 +10:00
Dave Airlie
202bc38ce9 draw: collect tessellation invocations statistics
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:25:56 +10:00
Dave Airlie
f4edc6f8bd llvmpipe: fixup context leaks.
Make sure we unreference all resources for all shaders on context
destruction.

Fixes: eb5227173f (llvmpipe: add support for tessellation shaders)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:25:50 +10:00
Vinson Lee
68b40cfe27 swr: Remove Byte Order Mark.
before:
$ file src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py
src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py: Python script text executable, UTF-8 Unicode (with BOM) text

after:
$ file src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py
src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py: Python script text executable, ASCII text

This patch also fixes this build error.

  File "src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py", line 1

    # Copyright (C) 2014-2018 Intel Corporation.   All Rights Reserved.

    ^

SyntaxError: invalid character in identifier

Fixes: c6e67f5a93 ("gallium/swr: add OpenSWR rasterizer")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4221>
2020-04-14 13:23:38 -07:00
Danylo Piliaiev
600c91fed8 glsl/list: Fix undefined behaviour of foreach_* macros
These macros produced a lot of errors with ubsan preventing us from
expanding the ubsan coverage on CIs.

C++ spec has such clause:

 "If the prvalue of type "pointer to cv1 B" points to a B that is
  actually a subobject of an object of type D, the resulting pointer
  points to the enclosing object of type D. Otherwise, the result
  of the cast is undefined."

Ubsan error example:

 ../src/compiler/glsl/builtin_functions.cpp:4945:4: runtime error: downcast of address 0x559b926abb50 which does not point to an object of type 'ir_instruction'
 0x559b926abb50: note: object has invalid vptr
  9b 55 00 00  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  58 ba 6a 92 9b 55 00 00  01 00 00 00
               ^~~~~~~~~~~~~~~~~~~~~~~
               invalid vptr
     #0 0x559b914dbe1a in call ../src/compiler/glsl/builtin_functions.cpp:4945

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4129>
2020-04-14 19:29:38 +00:00
Jonathan Marek
23be216071 freedreno/ir3: don't overwrite wrmask in ir3_SAM
Fixes (with other patches to allow these tests to run):

dEQP-VK.ycbcr.query.size_lod.vertex.*

Suggested-by: Rob Clark <robclark@gmail.com>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4557>
2020-04-14 19:12:47 +00:00
Jonathan Marek
aeb5b9cebf freedreno/ir3: fix emit_tex_info split_dest
Fixes a "free(): invalid next size (fast)" error in:

dEQP-VK.glsl.texture_functions.query.texturequerylevels.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4557>
2020-04-14 19:12:47 +00:00
Gert Wollny
cb08f451d0 gallium/tgsi_to_nir: Set nir_intrinsic_align_mul to 16 and offset to 0
Since the alignment is now checked in the validator we must set it.

v2: Use alignement of 4, i.e. dest bit size by eight.
v3: Use alignment 16 (Rhys Perry & Jason Ekstand)
v4: Use nir_intrinsic_set_align to make it clear that align offset is 0
    (Jason)

Fixes: e78a7a1825
    nir: Assert memory loads are aligned

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4544>
2020-04-14 18:47:09 +00:00
Connor Abbott
31988baba4 ir3: Fix txs with bindless
I missed that this had a micro-optimization to assume that there was
only ever one source, which is no longer valid for the bindless model
since we now have a bindless handle source. Remove the optimization to
fix assertion failures with turnip.

Fixes e.g.
dEQP-VK.glsl.texture_functions.query.texturesize.sampler2d_fixed_vertex

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4548>
2020-04-14 16:25:34 +00:00
Andres Gomez
acf7e73be5 gitlab-ci: make explicit tracie is gitlab specific
Tracie main script and traces.yml file talk about repo(sitory) when it
actually means GitLab's project.

Since the script is GitLab's API specific, make it clear.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4496>
2020-04-14 16:07:28 +03:00
Andres Gomez
1ca91683e2 gitlab-ci: protect usage of shell variables with double quotes
Not really needed right now, but seems dangerous to have paths without
the double quote.

I went ahead and used in the rest of values too.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4496>
2020-04-14 16:07:19 +03:00
Andres Gomez
35782b6593 gitlab-ci: Vulkan tracie runner to return last command exit code
No need to cache the return value if there is only a single trace
execution call.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4496>
2020-04-14 16:06:51 +03:00
Alexandros Frantzis
4c6ce826af gitlab-ci: Check the Mesa version used for tracie tests
Verify that the Mesa version used when running tracie tests is the
one that was built by CI, rather than any installed distro version.

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3894>
2020-04-14 11:34:02 +00:00
Rhys Perry
fbd2be3f5d aco: clear moved operands in get_reg_create_vector()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4507>
2020-04-14 10:49:12 +00:00
Rhys Perry
52cc1f8237 aco: improve p_create_vector RA for sub-dword operands
These's still improvements needed for sub-dword definitions, but that's
not as simple.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4507>
2020-04-14 10:49:12 +00:00
Rhys Perry
e18711cda3 aco: fix p_extract_vector validation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4507>
2020-04-14 10:49:12 +00:00
Rhys Perry
41ac44e1b3 aco: improve vector optimization with sub-dword vectors
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4507>
2020-04-14 10:49:12 +00:00
Samuel Pitoiset
849eb0a776 radv: use RMW packets for updating the maximum sample distance
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4531>
2020-04-14 11:31:37 +02:00
Samuel Pitoiset
cb6ab17d1f radv: add radeon_set_context_reg_rmw() helper
For emitting RMW packets in the command stream. This new helper
will be useful for implementing extended dynamic states to only
overwrite the fields that need to be updated instead of storing
more values in the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4531>
2020-04-14 11:31:33 +02:00
pal1000
f0b94262c1 scons/windows: Support build with LLVM 10.
LLVM engine component contains 2 new libraries, LLVMCFGuard and LLVMTextAPI.
Without them build fails like in this run: https://ci.appveyor.com/project/Alexpux/mingw-packages/builds/32102425/job/wkmb4gimfqkkb3cg

Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4521>
2020-04-14 08:40:56 +00:00
Tobias Jakobi
c38946e62d meson: Link Gallium Nine with ld_args_build_id
This fixes an assertion in iris_disk_cache_init() when the initialization
goes through drm_create_adapter(), which lives in d3dadapter9.so.
In this case build_id_find_nhdr_for_addr() fails and returns NULL, since
the shared library does not include a build ID.

The issue can be reproduced with an iris capable GPU and Xnine, while
removing the shader cache prior to launching the application.

Fix this by doing the same as in 29ea92e6a1.

Fixes: 4756864cdc "iris: Start wiring up on-disk shader cache"
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4499>
2020-04-14 00:22:45 +00:00
Greg V
924f3f3de7 svga: fix build on FreeBSD
MADV_HUGEPAGE only exists on Linux

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3966>
2020-04-13 23:51:43 +00:00
Eric Anholt
9ce4db6231 freedreno/a5xx+: Skip compiling the old gmem blit programs.
Saves a bunch of noise for me to sort through in IR3_SHADER_DEBUG=vs,fs
shader-db/run <single shader_test>.  I found that we were crashing on
destroy of NULL programs in fd_prog_fini, so I replicated the gpu_id < 300
early exit from fd_prog_init() down to _fini as well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4538>
2020-04-13 22:50:58 +00:00
Alyssa Rosenzweig
2513d0257c pan/bit: Add BI_CONVERT tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
9f50b19534 pan/bit: Add BI_CONVERT interpretation
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
640d69d166 pan/bi: ADD packing for CONVERT
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
8cfe660326 pan/bi: Rewrite conversion packing
To support roundmodes and other goodies.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
0b000c54c0 pan/bi: Fix incorrect swizzle packing assert
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
d0cf8b977c pan/bi: Set BI_ROUNDMODE for BI_CONVERT
It's rarely used in GL but converts do have roundmodes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
2799353f5b pan/midgard: Fix f2u naming confusion
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Matt Turner
e4268ffb99 meson: Specify the maximum required libdrm in dri.pc
When dealing with a regression in libdrm-2.4.101, I masked the package
in Gentoo. In doing so, we discovered that Mesa's dri.pc specifies a
version requirement in dri.pc for >= the version of libdrm Mesa was
built against, thus preventing packages from being rebuilt with the
older version of libdrm installed.

Let's reduce this version requirement to the latest libdrm required by
Mesa instead, since libdrm is backward compatible.

Fixes: a3a16d4aa7 ("meson: use dep_libdrm version for pkg-config")
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4534>
2020-04-13 22:07:41 +00:00
Rob Clark
4b24b9647d freedreno/ir3/ra: cleanup some leftovers
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
751c11a8c7 freedreno/ir3: rename depth->dce
Since DCE is the only remaining function of this pass, after the pre-RA
scheduler rewrite.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
cf74048fd1 freedreno/ir3: better cleanup when removing unused instructions
Do a better job of pruning when removing unused instructions, including
cleaning up dangling false-deps.

This introduces a new ssa src pointer iterator, which makes it easy to
clear links without having to think about whether it is a normal ssa
src or a false-dep.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
96ff2a4099 freedreno/ir3/ra: handle array case for SFU select_reg opt
The src of the SFU instruction could also be array/reg (non-SSA).
Handle this case too.

The postsched cp pass makes this scenario more likely.

Fixes: cc82521de4 ("freedreno/ir3: round-robin RA")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
b787b353d0 freedreno/ir3: add mov/cov stats
While not always avoidable, cov instructions are a useful thing to look
at to see if we could fold into src.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
89a78a07de freedreno/ir3/postsched: avoid moving tex ahead of kill
Add extra dependencies of tex/mem instructions on previous kill
instructions to avoid moving them ahead of kills.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
017fdab217 freedreno/ir3/postsched: remove some leftovers
These aren't used in postsched.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
9701008d64 freedreno/ir3/sched: awareness of partial liveness
Realize that certain instructions make a vecN live, and account for
this, in hopes of scheduling the remaining components of the vecN
sooner.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
d2f4d332db freedreno/ir3: new pre-RA scheduler
This replaces the depth-first search scheduler with a more traditional
ready-list scheduler.  It primarily tries to reduce register pressure
(number of live values), with the exception of trying to schedule kills
as early as possible.  (Earlier iterations of this scheduler had a
tendency to push kills later, and in particular moving texture fetches
which may not be necessary ahead of kills.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
0f22f85fe7 freedreno/ir3: fix location of inserted mov's
If the group pass must insert a mov to resolve conflicts, avoid the mov
appearing *after* the meta:collect whose src it is.

The current pre-RA scheduler doesn't really care about the initial
instruction order, but the new one will in some cases.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
908044ef4b freedreno/ir3: simplify grouping pass
Since bdf6b7018c the logic only needs to
handle grouping collect srcs, So remove the now unnecessary indirection.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
860f5981f0 freedreno/ir3: make falsedep use's optional
Add option when collecting uses to control whether they include
falsedeps or not.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
d09e3afdcc freedreno/ir3: spiff out disasm a bit
for verbose mode, print also the instruction "cycle" (which takes into
account (rptN) and (nopN)) in addition to instruction offset.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Jonathan Marek
40ccbae622 freedreno/computerator: support bindless sampler instructions
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4526>
2020-04-13 20:15:48 +00:00
Jonathan Marek
bc9a28beed freedreno/computerator: support nop prefix
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4526>
2020-04-13 20:15:48 +00:00
Eric Anholt
95d4a956c0 freedreno/ir3: CSE the up/downconversion of SEL's cond's size.
Not many programs hit this, but if you were, say, selecting between vec4s,
you'd convert the cond 4 times.

instructions in affected programs: 2957 -> 2717 (-8.12%)
nops in affected programs: 989 -> 899 (-9.10%)
non-nops in affected programs: 1968 -> 1818 (-7.62%)
dwords in affected programs: 3232 -> 2752 (-14.85%)
last-baryf in affected programs: 102 -> 90 (-11.76%)
full in affected programs: 5 -> 4 (-20.00%)
sstall in affected programs: 329 -> 329 (0.00%)
(ss) in affected programs: 86 -> 105 (22.09%)
(sy) in affected programs: 14 -> 12 (-14.29%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4516>
2020-04-13 19:24:52 +00:00
Eric Anholt
82375ccaa4 freedreno/ir3: Stop doing b2n on the SEL condition.
SEL_B32 (and presumably B16) checks for 0 or nonzero in the condition
(tested by just stuffing a uniform's value into it), so there's no need to
do ir3_b2n() on it, or any preceding ir3_n2b().

instructions in affected programs: 664444 -> 659927 (-0.68%)
nops in affected programs: 267898 -> 266312 (-0.59%)
non-nops in affected programs: 420260 -> 417329 (-0.70%)
dwords in affected programs: 144032 -> 137568 (-4.49%)
last-baryf in affected programs: 10801 -> 10321 (-4.44%)
full in affected programs: 2003 -> 2002 (-0.05%)
sstall in affected programs: 76670 -> 77405 (0.96%)
(ss) in affected programs: 4515 -> 4525 (0.22%)
(sy) in affected programs: 612 -> 604 (-1.31%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4516>
2020-04-13 19:24:52 +00:00
Ian Romanick
0d1917da86 tnl: Code formatting in t_rebase.c
Many little changes.  Almost everything is indentation or removal of
trailing whitespace.  Some places move a loop variable declaration to
the loop.  Some comments either re-wrapped or converted to single
line.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:27:00 -07:00
Ian Romanick
887ae78718 tnl: Code formatting in t_draw.c
So many little changes.  Almost everything is indentation or removal of
trailing whitespace.  There's a couple places where an "else" is moved
to the previous line with the "}".  Some places move a loop variable
declaration to the loop.  One change of assert to unreachable.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:57 -07:00
Ian Romanick
ac13258a6e tnl: Silence unused parameter warnings in _tnl_split_inplace
Unused since db0eb3a437 ("vbo: Fix up in-place splitting for non-contiguous/indexed primitives.") which landed in 2010.

src/mesa/tnl/t_split_inplace.c: In function ‘_tnl_split_inplace’:
src/mesa/tnl/t_split_inplace.c:270:27: warning: unused parameter ‘min_index’ [-Wunused-parameter]
  270 |                    GLuint min_index,
      |                    ~~~~~~~^~~~~~~~~
src/mesa/tnl/t_split_inplace.c:271:27: warning: unused parameter ‘max_index’ [-Wunused-parameter]
  271 |                    GLuint max_index,
      |                    ~~~~~~~^~~~~~~~~

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:54 -07:00
Ian Romanick
7a004f7987 tnl: Silence unused parameter warnings in dump_draw_info
src/mesa/tnl/t_split_copy.c: In function ‘dump_draw_info’:
src/mesa/tnl/t_split_copy.c:149:35: warning: unused parameter ‘ctx’ [-Wunused-parameter]
  149 | dump_draw_info(struct gl_context *ctx,
      |                ~~~~~~~~~~~~~~~~~~~^~~
src/mesa/tnl/t_split_copy.c:154:23: warning: unused parameter ‘min_index’ [-Wunused-parameter]
  154 |                GLuint min_index,
      |                ~~~~~~~^~~~~~~~~
src/mesa/tnl/t_split_copy.c:155:23: warning: unused parameter ‘max_index’ [-Wunused-parameter]
  155 |                GLuint max_index)
      |                ~~~~~~~^~~~~~~~~

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:51 -07:00
Ian Romanick
114e078001 tnl: Silence unused parameter warnings in _tnl_draw_prims
A tangled mess of a couple parameters that nobody wanted.

src/mesa/tnl/t_draw.c: In function ‘_tnl_draw_prims’:
src/mesa/tnl/t_draw.c:440:42: warning: unused parameter ‘tfb_vertcount’ [-Wunused-parameter]
  440 |     struct gl_transform_feedback_object *tfb_vertcount,
      |     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~
src/mesa/tnl/t_draw.c:441:35: warning: unused parameter ‘stream’ [-Wunused-parameter]
  441 |                          unsigned stream)
      |                          ~~~~~~~~~^~~~~~

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:48 -07:00
Ian Romanick
1996f1d3dd tnl: Silence unused parameter 'attrib' warning in convert_half_to_float
Also clean up some trivial code / whitespace style issues.

src/mesa/tnl/t_draw.c: In function ‘convert_half_to_float’:
src/mesa/tnl/t_draw.c:121:57: warning: unused parameter ‘attrib’ [-Wunused-parameter]
  121 |                       const struct gl_array_attributes *attrib,
      |                       ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:45 -07:00
Ian Romanick
7a03240b63 tnl: Don't dereference NULL obj pointer in t_rebase_prims
Structurally the code is now similar to the handling of other
gl_buffer_object::obj pointers elsewhere in TNL.  The fixes tag is a
little bit misleading.  I think the change in that commit just exposes a
previously existing bug.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2746
Fixes: f3cce7087a ("mesa: don't ever bind NullBufferObj for glBindBuffer targets")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:43 -07:00
Ian Romanick
2e43b32e72 tnl: Don't dereference NULL obj pointer in replay_init
Structurally the code is now similar to the handling of other
gl_buffer_object::obj pointers elsewhere in TNL.  The fixes tag is a
little bit misleading.  I think the change in that commit just exposes a
previously existing bug.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2746
Fixes: f3cce7087a ("mesa: don't ever bind NullBufferObj for glBindBuffer targets")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:40 -07:00
Ian Romanick
65f14fd68d tnl: Don't dereference NULL obj pointer in bind_indices
Structurally the code is now similar to bind_inputs.  The fixes tag is a
little bit misleading.  I think the change in that commit just exposes a
previously existing bug.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2746
Fixes: f3cce7087a ("mesa: don't ever bind NullBufferObj for glBindBuffer targets")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:38 -07:00
Daniel Schürmann
28d36d26c2 aco: fix p_extract_vector optimization in presence of unequally sized vector operands
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4506>
2020-04-13 16:35:40 +00:00
Alyssa Rosenzweig
0e4432bfba pan/bi: Lower fsqrt
For G72+ anyway. G71 will want something a bit more fine grained. I hope
this has enough precision for GL (the blob apparently does some exponent
fixup).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4530>
2020-04-13 15:44:31 +00:00
Alyssa Rosenzweig
3025ea6abe panfrost: Drop dependency on nonexistant write_value
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4530>
2020-04-13 15:44:31 +00:00
Tapani Pälli
53e4159eaa glsl: stop processing function parameters if error happened
Fixes: d1fa69ed61 ("glsl: do not attempt assignment if operand type not parsed correctly")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2696
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4341>
2020-04-13 15:53:15 +03:00
Samuel Pitoiset
fc1068de0d aco: fix nir_op_pack_32_2x16_split if one operand is a constant
Because 16-bit constants are represented with the s1 RegClass, we
have to extract the low half.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4509>
2020-04-13 11:51:17 +00:00
Samuel Pitoiset
4cfaef68d7 aco: implement 16-bit nir_op_f2i64/nir_op_f2u64
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4509>
2020-04-13 11:51:17 +00:00
Samuel Pitoiset
729bdc0d70 aco: fix f2i64/f2u64 with sgprs if the exponent computation overflow
This fixes f16->{i64,u64} conversions for +0/-0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4509>
2020-04-13 11:51:17 +00:00
Michel Dänzer
6a8e5dde66 gitlab-ci: Use all_paths in .test-manual rules
Without this, the .test-manual jobs could end up as 'when: manual' when
the jobs they depend on were 'when: never', which was flagged as
invalid YAML, preventing the pipeline from being created.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4522>
2020-04-13 10:29:48 +00:00
Ilia Mirkin
5e6267b20b nvc0: add NV_viewport_swizzle support for GM200+
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4519>
2020-04-12 12:01:46 -04:00
Ilia Mirkin
90fcb3fef2 st/mesa: add NV_viewport_swizzle support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4519>
2020-04-12 12:01:46 -04:00
Ilia Mirkin
ff168b297d mesa: add GL_NV_viewport_swizzle support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4519>
2020-04-12 12:01:46 -04:00
Ilia Mirkin
4137a79c2a gallium: add viewport swizzling state and cap
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4519>
2020-04-12 12:01:46 -04:00
Tapani Pälli
e2457bedd3 glsl: remove redudant assignment
CID: 1461087
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4500>
2020-04-12 16:48:53 +03:00
Tapani Pälli
e667802a7c mesa: remove redudant assignment
CID: 1461397
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4500>
2020-04-12 16:48:45 +03:00
Tapani Pälli
fd24172200 mesa: remove redudant check
CID: 1461410
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4500>
2020-04-12 16:48:27 +03:00
Qiang Yu
25a61cce7d lima: set offset when export resource
We missed set reource offset.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4517>
2020-04-12 10:02:24 +00:00
Lionel Landwerlin
4094558e86 i965: share buffer managers across screens
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
2020-04-11 22:04:37 +03:00
Lionel Landwerlin
865b840a6b i965: store DRM fd on intel_screen
v2: Fix storing of drm fd (Ajax)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
2020-04-11 22:04:33 +03:00
Lionel Landwerlin
0a497eb130 iris: make resources take a ref on the screen object
Because St creates resources from a screen and attach them onto
another we need to ensure the resources associated to a screen &
bufmgr stay around until we don't need them anymore.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
2020-04-11 22:04:28 +03:00
Lionel Landwerlin
7557f16059 iris: share buffer managers accross screens
St happilly uses pipe_resources created with one screen with other
screens. Unfortunately our resources have a single identifier that
related to a given screen and its associated DRM file descriptor.

To workaround this, let's share the buffer manager between screens for
a given DRM device. That way handles are always valid.

v2: Don't forget to close the fd that bufmgr now owns
    Take a copy of the fd to ensure it stays alive even if the dri
    layer closes it

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
2020-04-11 22:04:25 +03:00
Lionel Landwerlin
bd3e505453 iris: properly free resources on BO allocation failure
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
2020-04-11 22:04:22 +03:00
Rob Clark
7aa6720ba4 freedreno/log: better decoding for multiple chunks per batch
For larger render targets or smaller GMEM size, we could end up needing
multiple chunks of tracepoints per batch.  But we still want to decode
the traces as single batch.  So we need a bit of a state across
process_chunk() calls to accumulate timestamp information.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4510>
2020-04-10 19:29:54 +00:00
Rob Clark
7aa55f5acb freedreno/log: spiff out parser some more
Extract breakdown of time in GMEM passes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4510>
2020-04-10 19:29:54 +00:00
Rob Clark
b5b32387d6 freedreno/log: android support
In particular, when stdout doesn't go anywhere useful we need to log to
file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4510>
2020-04-10 19:29:54 +00:00
Eric Anholt
904d5d63b4 freedreno: Fix leak of binning shader variants.
The v->binning variant is never added to shader->variants, so just free
each one as we free the nonbinning variant.

Noticed from drm-shim mode running out of open fds, since each bo ends up
with an fd.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4502>
2020-04-10 18:42:20 +00:00
Kristian H. Kristensen
5ec1f264f1 freedreno/ir3: Fix sz vs class confusion
Add bounds checking to make sure we don't silently access out of
bounds again.

Fixes: 90f7d12236 ("freedreno/ir3/ra: pick higher numbered scalars in first pass")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4503>
2020-04-10 10:24:14 -07:00
Alyssa Rosenzweig
65e2eaa4d3 pan/decode: Print Bifrost blend descriptor
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:54:02 +02:00
Alyssa Rosenzweig
80dd692813 pan/bi: Let !b2b imply branch_cond
Like the blob. Probably doesn't matter.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:59 +02:00
Alyssa Rosenzweig
3439c24bdb panfrost: Fix BI_BLEND packing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:57 +02:00
Alyssa Rosenzweig
e34add229f pan/bi: Fix backwards registers ports
Will matter when packing multiple instructions per bundle.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:56 +02:00
Alyssa Rosenzweig
23620d1830 panfrost: Pass compiler-appropriate options
FMAs need to fuse for Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:54 +02:00
Alyssa Rosenzweig
e30091bc51 panfrost: Move uniform_count to pan_assemble
Again, not Midgard specific.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:53 +02:00
Alyssa Rosenzweig
d10423989e panfrost: Move varying linking to cmdstream
This isn't ISA/compiler specific, it's just looking at the NIR. So let's
move it from midgard to pan_assemble.c so it runs for Bifrost too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:51 +02:00
Alyssa Rosenzweig
776697dd34 pan/midgard: Remove unused max_varying variable
I don't know why this was here.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:50 +02:00
Alyssa Rosenzweig
90e02db9a1 pan/bi: Fix nondeterministic register packing
Uninitialized read.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:48 +02:00
Alyssa Rosenzweig
8016906cf2 panfrost: Call the Bifrost compiler on bi devices
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:47 +02:00
Alyssa Rosenzweig
0a9fa4bcb6 panfrost: Set mfbd.msaa.sample_locations on Bifrost
And mfbd.shared_memory only on Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:44 +02:00
Tomeu Vizoso
46e4246d49 panfrost: On Bifrost, set the right tiler descriptor
On both fragment and tiler jobs.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:39 +02:00
Tomeu Vizoso
547f999e2c panfrost: Don't emit write_value jobs on Bifrost
As on Bifrost GPUs there's a different mechanism for reusing the tiler
data structures.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:31 +02:00
Tomeu Vizoso
30e7027e1c panfrost: Pass IS_BIFROST to pandecode_jc
So we can decode the right structures on Bifrost hw.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:21 +02:00
Tomeu Vizoso
7b10d4ece6 panfrost: Remove most usage of midgard_payload_vertex_tiler
By passing the prefix and postfix structs around, we can use most of the
cmdstream functions as well for bifrost, as those structs haven't
changed between midgard and bifrost.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:03 +02:00
Alyssa Rosenzweig
b010a6d5f1 panfrost: Unify vertex/tiler structures
Some fields were shuffled but these are essentially the same across the
generations.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:52:59 +02:00
Alyssa Rosenzweig
aee68b06c8 panfrost: Staticize a few cmdstream functions
They are only used within the same source file.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:52:56 +02:00
Alyssa Rosenzweig
dd09571c77 panfrost: Populate bifrost-specific structs within mali_shader_meta
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:52:54 +02:00
Alyssa Rosenzweig
b096a1dbd3 panfrost: Add IS_BIFROST quirk
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:51:57 +02:00
Christian Gmeiner
693480a581 etnaviv: remove the "active" member of queries
The state tracker only gets to begin/query/destroy when !active and end
when active, so we have no need to try to track this ourselves.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4456>
2020-04-10 12:42:24 +00:00
Christian Gmeiner
7cb98e02e4 etnaviv: change begin_query(..) to a void function
We always return true.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4456>
2020-04-10 12:42:24 +00:00
Christian Gmeiner
7a9cbb2b61 etnaviv: drop redundant calls to etna_acc_query_suspend(..)
Introduced by accident during rebase.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4456>
2020-04-10 12:42:24 +00:00
Jose Maria Casanova Crespo
b06fdb8edd v3d: Primitive Counts Feedback needs an extra 32-bit padding.
Store Primitive Counts operations write 7 counters in 32-bit words
but also a padding 32-bit with 0. So we need 8 32-bit words instead
of the current 7 allocated.

This was causing an corruption in the next buffer when Transform
Feedback was enabled that were exposed on tests like:
dEQP-GLES3.functional.transform_feedback.*.points.*

This patch fixes 196 tests that were failing when they were run isolated
but they were passing when run using cts-runner.

Fixes: 0f2d1dfe65 ("v3d: use the GPU to record primitives written to transform feedback")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2674
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4501>
2020-04-10 10:02:56 +02:00
Daniel Schürmann
38622de2ec aco: make some reg_file helpers private and fix their uses
Fixes various subdword RA issues

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Daniel Schürmann
331794495e aco: rename aco_lower_bool_phis() -> aco_lower_phis()
We also lower subdword phis, now.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Daniel Schürmann
1d41521b16 aco: lower subdword phis with SGPR operands
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Daniel Schürmann
a39df3bfce aco: don't constant-propagate into subdword PSEUDO instructions
PSEUDO instructions are lowered using SDWA, and thus,
cannot take literals and before GFX9 cannot take constants
at all. As the in-register representation differs between
32bit and 16bit floats, we first need to ensure correct
behavior.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Daniel Schürmann
1de18708cb aco: ensure correct bit representation of subdword constants
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Daniel Schürmann
637f45f390 aco: setup subdword regclasses for ssa_undef & load_const
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Samuel Pitoiset
67b567d0d0 aco: implement nir_op_b2f16/nir_op_i2f16/nir_op_u2f16
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
3119f978e5 aco: implement 16-bit comparisons
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
ccf8e23f59 aco: implement 16-bit nir_op_fmax3/nir_op_fmin3/nir_op_fmed3
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
981ced07a5 aco: implement 16-bit nir_op_ldexp
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
55537ed9d3 aco: implement 16-bit nir_op_f2i32/nir_op_f2u32
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
68339ff7a7 aco: implement 16-bit nir_op_bcsel
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
0646562a17 aco: implement 16-bit nir_op_fsign
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
6793ae1c5e aco: implement 16-bit nir_op_fsat
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
0ecca65d11 aco: implement 16-bit nir_op_fmul
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
b0c60999bc aco: implement 16-bit nir_op_fcos/nir_op_fsin
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
9be4be515f aco: implement 16-bit nir_op_fsub/nir_op_fadd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
b0b637ca17 aco: implement 16-bit nir_op_fabs/nir_op_fneg
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
acc5912786 aco: implement 16-bit nir_op_fmax/nir_op_fmin
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
66d5bfb09a aco: implement 16-bit nir_op_ffloor/nir_op_fceil
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
c097c9f20c aco: implement 16-bit nir_op_fsqrt/nir_op_frcp/nir_op_frsq
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
26ed9fb79e aco: implement 16-bit nir_op_ftrunc/nir_op_fround_even
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
ee96181ad9 aco: implement 16-bit nir_op_fexp2/nir_op_flog2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
b8486041df aco: implement 16-bit nir_op_ffract
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:04 +02:00
Samuel Pitoiset
a8b45d7034 aco: implement 16-bit nir_op_frexp_sig/nir_op_frexp_exp
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:04 +02:00
Caio Marcelo de Oliveira Filho
db74ad0696 intel/compiler: Remove cs_prog_data->threads
At this point all drivers are doing this math on their own -- since
most of them need to cover the variable group size case, in which at
compile time the group size (and number of threads) is not defined.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:20 -07:00
Caio Marcelo de Oliveira Filho
9ff55621d9 iris: Stop using cs_prog_data->threads
This is a preparation for dropping this field since this value is
expected to be calculated by the drivers now for variable group size
case.  And also the field would get in the way of brw_compile_cs
producing multiple SIMD variants (like FS).

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:12 -07:00
Caio Marcelo de Oliveira Filho
928f5f5434 anv: Stop using cs_prog_data->threads
Move the calculation to helper functions -- similar to what GL already
needs to do.

This is a preparation for dropping this field since this value is
expected to be calculated by the drivers now for variable group size
case.  And also the field would get in the way of brw_compile_cs
producing multiple SIMD variants (like FS).

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:12 -07:00
Plamena Manolova
5664bd6db3 i965: Implement ARB_compute_variable_group_size
This patch adds the implementation of ARB_compute_variable_group_size
for i965. We do this by storing the local group size in a push constant.

Additional changes made by Caio Marcelo de Oliveira Filho.

Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:12 -07:00
Plamena Manolova
c77dc51203 intel/compiler: Add support for variable workgroup size
Add new builtin parameters that are used to keep track of the group
size.  This will be used to implement ARB_compute_variable_group_size.

The compiler will use the maximum group size supported to pick a
suitable SIMD variant.  A later improvement will be to keep all SIMD
variants (like FS) so the driver can select the best one at dispatch
time.

When variable workgroup size is used, the small workgroup optimization
is disabled as it we can't prove at compile time that the barriers
won't be needed.

Extracted from original i965 patch with additional changes by
Caio Marcelo de Oliveira Filho.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:12 -07:00
Caio Marcelo de Oliveira Filho
c54fc0d07b intel/compiler: Replace cs_prog_data->push.total with a helper
The push.total field had three values but only one was directly
used (size).  Replace it with a helper function that explicitly takes
the cs_prog_data and the number of threads -- and use that in the
drivers.

This is a preparation for ARB_compute_variable_group_size where the
number of threads (hence the total size for push constants) is not
defined at compile time (not cs_prog_data->threads).

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:12 -07:00
Vinson Lee
0536ca20d7 swr/rasterizer: Use private functions for min/max to avoid namespace issues.
This is a similiar fix as bb2287ccdf ("gallivm/tessellator: use
private functions for min/max to avoid namespace issues").

Fixes: ab55708200 ("swr/rasterizer: Add tessellator implementation to the rasterizer")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4208>
2020-04-09 17:57:02 -07:00
Connor Abbott
089e1fb287 tu: Implement descriptor set update templates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
e1595026f6 tu: Add missing code for immutable samplers
Actually fill out the samplers, based on the radv implementation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
a07b55443b tu: Emit CP_LOAD_STATE6 for descriptors
This restores the pre-loading of descriptor state, using the new
SS6_BINDLESS method that allows us to pre-load bindless resources.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
d37843fee1 tu: Switch to the bindless descriptor model
Under the bindless model, there are 5 "base" registers programmed with a
64-bit address, and sam/ldib/ldc and so on each specify a base register
and an offset, in units of 16 dwords. The base registers correspond to
descriptor sets in Vulkan. We allocate a buffer at descriptor set
creation time, hopefully outside the main rendering loop, and then
switching descriptor sets is just a matter of programming the base
registers differently. Note, however, that some kinds of descriptors
need to be patched at command recording time, in particular dynamic
UBO's and SSBO's, which need to be patched at CmdBindDescriptorSets
time, and input attachments which need to be patched at draw time based
on the the pipeline that's bound. We reserve the fifth base register
(which seems to be unused by the blob driver) for these, creating a
descriptor set on-the-fly and combining all the dynamic descriptors from
all the different descriptor sets. This way, we never have to copy the
rest of the descriptor set at draw time like the blob seems to do. I
mostly chose to do this because the infrastructure was already there in
the form of dynamic_descriptors, and other drivers (at least radv) don't
cheat either when implementing this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
fc850080ee ir3: Rewrite UBO push analysis to support bindless
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
274f3815a5 ir3: Plumb through bindless support
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
7d0bc13fca ir3: LDC also has a destination
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
1842961e58 ir3: Also don't propagate immediate offset with LDC
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
de7d90ef53 ir3: Plumb through support for a1.x
This will need to be used in some cases for the upcoming bindless
support, plus ldc.k instructions which push data from a UBO to const
registers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
c8b0f90439 ir3: Add bindless instruction encoding
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
122a900d7d freedreno/a6xx: Add registers for the bindless model
In Vulkan, descriptors for samplers, SSBO's, etc. are collected into
descriptor sets, and shaders can use multiple descriptor sets. At
command-recording time, users can swap out only some of the descriptor
sets, and the driver is supposed to do the minimum amount necessary to
update any internal binding tables, knowing that only some of the
descriptors have changed.

With the old binding model, focused on GL, where there are separate
tables for each type of resource, we can do somewhat better than now by
preserving descriptors from lower descriptor sets when switching higher
descriptor sets. However we still have to copy around descriptors before
each draw.

At least for a6xx, qualcomm went further, essentially copying the Vulkan
binding model as an alternate way to load resources. There's an array of
registers (actually an array for compute and one for everything else),
where each register holds a pointer to a descriptor set that can contain
various different descriptor types. The descriptors are padded out to 16
dwords, so that every instruction can use an index instead of a dword
offset. It's called "bindless", I think, because it can also be used to
implement the old GL bindless extensions (presumably it allows more
samplers and textures than the old model).

This commit adds the register and cmdstream parts. Next up will be the
instruction encoding.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
e088d82aa6 freedreno/a6xx: Add UBO size field
Verified with the vulkan blob, which uses ldc and UBO descriptors, and
turnip will too soon.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
d3b7681df2 tu: ir3: Emit push constants directly
Carve out some space at the beginning for push constants, and push them
directly, rather than remapping them to a UBO and then relying on the
UBO pushing code. Remapping to a UBO is easy now, where there's a single
table of UBO's, but with the bindless model it'll be a lot harder. I
haven't removed all the code to move the remaining UBO's over by 1,
though, because it's going to all get rewritten with bindless anyways.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
63c2e8137d tu: Dump out shader assembly when requested
We don't use the ir3 variant machinery, so we have to do this ourselves.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Daniel Schürmann
d22e2b3bd0 aco: RA - move all std::function objects into proper functions
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
5351fee56a aco: move all needed helper containers to ra_ctx
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
2ae27b96ef aco: change live_out variables to std::unordered_set
Improves performance of live_var_analysis for larger shaders

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
acc10a7e51 aco: change some std::map to std::unordered_map in register_allocation
This improves compile times slightly for larger shaders

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
69b6069dd2 aco: refactor try_remove_trivial_phi() in RA
Minor refactoring to avoid some pointer chasing.
This patch also changes the live_out argument to be
passed by reference to avoid an unnecessary copy.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
b66f474121 aco: improve speed of live_var_analysis
by merging live_sgprs and live_vgprs sets.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
09850e0a94 aco: during RA only insert into renames table if a variable got renamed
This improves the speed of register allocation.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
48a74b6815 aco: replace assignment hashmap by std::vector in register allocation
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
ba482c2e5f aco: improve register assignment when live-range splits are necessary
When finding a good place for a register, we can ignore
killed operands.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
fb5a7902f2 aco: improve hashing for value numbering
An improved hashing greatly reduces the number of collisions,
and thus, increases the speed for lookups in the hash table.
The hash function now uses Murmur3 written by Austin Appleby.

This patch also pre-reserves space for the hashmap to avoid rehashing.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
c99107ece0 aco: add explicit padding for all Instruction sub-structs
This patch also adds static_asserts on the size of Instructions
to ensure no internal padding is present.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
7f962a9362 aco: guarantee that Temp fits in 4 bytes
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Jonathan Marek
2e084c2cb3 turnip: new clear/blit implementation with shader path fallback
The shader path is used to implement the following cases:
* stencil aspect mask on D24S8 (for image_to_buffer,buffer_to_image)
* clear/copy msaa destination (2D engine can't have msaa dest)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
de6967488a turnip: add vk_format_is_snorm/is_float
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
51fe52d2fd turnip: rework format helpers
* Take tile_mode as input directly
* tu6_format_gmem to tu6_base_format, use may not be limited to GMEM
* Add new helpers that will return the correct tile_mode as for image level
  as part of the format.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
009082dcff turnip: use dirty bits for dynamic viewport/scissor state
CmdClearAttachments shader path will overwrite this state, so it needs to
be re-emitted with dirty bits in that case.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
ed83281f0c turnip: save attachment samples in renderpass state
This is needed to be able to know the number of samples during
CmdClearAttachments which can be used while the framebuffer is unknown.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
0637eab678 turnip: disable 8x msaa
Not everything supports 8x msaa, and the blob doesn't support it at all.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
f03e63cd99 turnip: fix nir validate failure from push constant lowering
Fixes newly added checks in nir validate failing.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
86d1a4c907 turnip: split up gmem/tile alignment
Note: the x1/y1 align in tu6_emit_blit_scissor was broken

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
f494799a7f turnip: RB_CCU_CNTL fixes
* Correct bypass value for a618
* Bypass value for blitter
* Don't set RB_CCU_CNTL again unnecessarily in tu6_emit_binning_pass

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
cca7c29980 freedreno/a6xx: set bypass RB_CCU_CNTL value for blitter
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
e4c05a5335 freedreno/registers: add RB_CCU_CNTL bitfields
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Samuel Pitoiset
2d8453e6e6 radv: allow TC-compat HTILE with GENERAL outside of render loops
This gives +8% with Wolfeinstein Youngblood on my Vega64, and
according to someone else, it also improves performance with Doom
2016 and Wolfenstein 2 (and probably other ID Tech games).

This improvement is because Youngblood uses GENERAL for the main
depth-only pass and TC-compat HTILE is now enabled with GENERAL if
we know that we are outside of a render loop. This obviously also
reduces the number of HTILE decompressions from/to GENERAL.

Note that Youngblood violates the Vulkan spec regarding render loops
because they are only allowed with input attachments. Expect possible
rendering issues if apps use render loops with the wrong way (ie.
without input attachmens) because HTILE might not be coherent if
a depth-stencil texture is sampled and rendered in the same draw.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2704
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4391>
2020-04-09 12:10:37 +00:00
Samuel Pitoiset
4de84c8cbd radv: only enable TC-compat HTILE for images readable by a shader
If no texture fetches happen it's useless to enable TC-compat HTILE.

Because the driver currently doesn't support TC-compat HTILE for
storage images we don't have to check.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4497>
2020-04-09 11:55:59 +00:00
Samuel Pitoiset
63f07a3047 radv: only expose fp16 control features for chips with double rate fp16
This disables all fp16 shader control features on GFX8 because only
GFX9+ supports double rate packed math.

This improves consistency regarding other AMD Vulkan drivers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4453>
2020-04-09 13:35:08 +02:00
Samuel Pitoiset
1e4bd1de98 radv: only expose storageInputOutput16 for chips with double rate fp16
This feature allows to use both 16-bit integers and 16-bit floats
as inputs/outputs.

This disables storageInputOutput16 on GFX8 because only GFX9+ supports
double rate packed math.

This improves consistency regarding other AMD Vulkan drivers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4453>
2020-04-09 13:35:08 +02:00
Samuel Pitoiset
1d74c6565d radv: only expose shaderFloat16 for chips with double rate fp16
This disables shaderFloat16 on GFX8 because only GFX9+ supports
double rate packed math.

This improves consistency regarding other AMD Vulkan drivers and
it makes no sense to enable that feature without packed math.

This also reduces performance with Wolfeinstein Youngblood if
fp16 is forced enabled on GFX8, while it's similar on GFX9.

We might re-introduce that feature in the future with ACO support
if it ends up being faster and correct.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4453>
2020-04-09 13:34:36 +02:00
Samuel Pitoiset
a3113e07b9 ac,radv: add ac_gpu_info::has_double_rate_fp16
Only GFX9+ support double rate packed math instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4453>
2020-04-09 13:30:54 +02:00
Jonathan Marek
420ca1e4a1 turnip: use buffer size instead of bo size for VFD_FETCH_SIZE
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4224>
2020-04-09 02:05:52 +00:00
Jonathan Marek
e62f8ae15a turnip: improve vertex input handling
Emit vertexBindingDescriptionCount bindings, instead of one per attribute.

Verified with dEQP-VK.pipeline.vertex_input.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4224>
2020-04-09 02:05:52 +00:00
James Zhu
98743f648a radeonsi: fix Segmentation fault during vaapi enc test
Fix Segmentation fault during vaapi enc test on Arcturus.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by Leo Liu <leo.liu@amd.com>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4472>
2020-04-08 18:11:45 +00:00
Bas Nieuwenhuizen
a7e2efa7c9 radv: Use correct buffer count with variable descriptor set sizes.
Fixes dEQP-VK.binding_model.descriptorset_random.sets16.noarray.ubolimitlow.sbolimitlow.imglimitlow.iublimitlow.frag.ialimitlow.0

CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2607
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4489>
2020-04-08 15:26:50 +00:00
Bas Nieuwenhuizen
bb7e44a23d radv: Whitespace fixup.
Review comment that I did, but forgot to git add before amending ...

From https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4334

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4488>
2020-04-08 11:18:18 +00:00
Samuel Iglesias Gonsálvez
8b42d26132 radv: set sparseAddressSpaceSize to RADV_MAX_MEMORY_ALLOCATION_SIZE
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4487>
2020-04-08 11:03:35 +00:00
Samuel Iglesias Gonsálvez
cc678c9ce9 radv: check buffer size in vkCreateBuffer()
Fixes:

   dEQP-VK.api.buffer.basic.size_max_uint64

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4487>
2020-04-08 11:03:35 +00:00
Bas Nieuwenhuizen
a3682670c8 radv: Consider maximum sample distances for entire grid.
The other pixels in the grid might have samples with a larger
distance than the (0,0) pixel.

Fixes dEQP-VK.pipeline.multisample.sample_locations_ext.verify_location.samples_8_packed
when CTS is compiled with clang.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4480>
2020-04-08 10:53:33 +00:00
Samuel Pitoiset
9f005f1f85 radv: enable lowering of GS intrinsics for the LLVM backend
This replaces emit_vertex with:
   if (vertex_count < max_vertices) {
      emit_vertex_with_counter vertex_count ...
      vertex_count += 1
   }

Which is exactly what NIR->LLVM was doing but at NIR level. This
pass is already called by ACO.

pipeline-db changes on GFX10:
Totals from affected shaders:
SGPRS: 1952 -> 1912 (-2.05 %)
VGPRS: 2112 -> 2044 (-3.22 %)
Code Size: 189368 -> 185620 (-1.98 %) bytes
Max Waves: 494 -> 491 (-0.61 %)

No pipeline-db changes on other generations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4182>
2020-04-08 08:24:05 +02:00
Samuel Pitoiset
cd99ea7318 radv: remove radv_layout_has_htile() helper
The goal of this function was to return whether a depth-stencil image
has HTILE, in comparison to radv_layout_is_htile_compressed() which
is used to know whether a depth-stencil image has HTILE compressed.

These two functions are actually similar and they have never been
used for what they were supposed to. Remove radv_layout_has_htile()
in favour of radv_layout_is_htile_compressed() for now. If it's
needed in the future, I will re-introduce this concept properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4389>
2020-04-08 07:55:16 +02:00
Samuel Pitoiset
ffea3e7348 radv: cleanup creating the decompress/resummarize pipelines
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4389>
2020-04-08 07:55:14 +02:00
Samuel Pitoiset
6f6276bd24 radv: rename extra graphics pipeline decompress/resummarize fields
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4389>
2020-04-08 07:55:12 +02:00
Samuel Pitoiset
8b7586655f radv: rename decompress/resummarize depth/stencil functions
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4389>
2020-04-08 07:55:10 +02:00
Jonathan Marek
d6a8591f72 turnip: fix compute shaders crashing after geometry shader change
Fixes: 1af71bee73 ("turnip: Set has_gs in ir3_shader_key")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4483>
2020-04-08 01:56:53 +00:00
Timothy Arceri
52c8bc0130 nir: make opt_if_loop_terminator() less strict
nir_cf_{extract,reinsert}() can't stitch a block together
if the block we are extracting ends in a jump but other jumps
nested in further ifs should be fine to move.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4477>
2020-04-08 01:35:45 +00:00
Timothy Arceri
1f649ff107 radeonsi: don't lower constant arrays to uniforms in GLSL IR
This re-enables the change made in 2f5783bc2b which was
incorrectly disabled by 3e1dd99adc.

For radeonsi, we will prefer the NIR pass as it'll generate better code
(some index calculation and a single load vs. a load, then index
calculation, then another load) and oftentimes NIR optimization can kick
in and make all the access indices constant.

Fixes: 3e1dd99adc ("radeonsi: Remove a bunch of default handling of pipe caps.")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4474>
2020-04-08 01:23:40 +00:00
Dominik Behr
c682ea598f meson: fix debug build on Android
debug_stack functions are implemented in another file for Android.
Also add backtrace library dependency.

Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-bu: Kristian H. Kristensen <hoegsber@google.com>
Signed-off-by: Dominik Behr <dbehr@chromium.org>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2435>
2020-04-07 23:15:11 +00:00
Bas Nieuwenhuizen
940ed5078d radv: Store 64-bit availability bools if requested.
Fixes dEQP-VK.query_pool.*.reset_before_copy.* on RAVEN.

CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2296
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4334>
2020-04-07 22:57:24 +00:00
Vinson Lee
ff8daa0136 gallivm: Add missing header for powf.
Fix build error after llvm-11 commit 3a29393b4709 ("Remove
math.h/cmath include from DataTypes.h").

src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c: In function ‘lp_build_linear_to_srgb’:
src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c:194:44: error: implicit declaration of function ‘powf’ [-Werror=implicit-function-declaration]
  194 |                                  exp2f_c * powf(coeff_f, 1.0f / exp_f));
      |                                            ^~~~
src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c:194:44: warning: incompatible implicit declaration of built-in function ‘powf’
src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c:78:1: note: include ‘<math.h>’ or provide a declaration of ‘powf’
   77 | #include "lp_bld_format.h"
  +++ |+#include <math.h>
   78 |

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4473>
2020-04-07 21:48:31 +00:00
Kristian H. Kristensen
4399cacaf0 turnip: Drop dep_llvm from dependencies
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4478>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4478>
2020-04-07 18:44:21 +00:00
Kristian H. Kristensen
5789505ab3 turnip: Make Android platform build
We still don't have a way to keep this from breaking, but I don't
think this ever built.  Let's call it progress.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4478>
2020-04-07 18:44:21 +00:00
Kristian H. Kristensen
97578c69e8 turnip: Stub out VK_KHR_external_{fence,semaphore}_fd
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4478>
2020-04-07 18:44:21 +00:00
Kristian H. Kristensen
e99f6f2ea1 turnip: Add missing VKAPI_ATTR annotations
Make sure the types match.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4478>
2020-04-07 18:44:21 +00:00
Rohan Garg
80c13a81b1 tracie: Reformat code to fix indentation
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4435>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4435>
2020-04-07 18:21:32 +00:00
Rohan Garg
efbbf8bb81 tracie: Print results in a machine readable format
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4435>
2020-04-07 18:21:32 +00:00
Eric Anholt
1618159772 freedreno/a6xx: Set a level's pitch based on minified level0 pitch, not width0.
Found from piglit fbo-generatemipmaps failures, then tracked down with the
texturator test.  The piece that really revealed things was finding that
1024x1 linear RGBA8 on the older blob drivers would have a pitch of 5120
instead of 4096, and the following levels minified that pitch.

Fixes ~124 piglit tests (~8.5% of piglit failures) on cheza.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
2020-04-07 18:02:56 +00:00
Eric Anholt
4b881d5270 freedreno: Add the outline of a test for a6xx texture layout.
Trying to work out texture layout by remembering what things looked like
in texturator is hard.  Instead, let's use texture layouts from tracing
the blob as a source of truth to make sure that we pick the same layouts
they do (and don't break known-good ones).  More testcases will be added
as I fix layout bugs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
2020-04-07 18:02:56 +00:00
Eric Anholt
9c6bfe8733 freedreno/a6xx: Drop the "alignment" layout temporary.
It's just 1 for !3d, which means that the align we're doing in that case
is pointless.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
2020-04-07 18:02:56 +00:00
Eric Anholt
59a2220398 freedreno/a6xx: Remove the "aligned_height" temporary.
Now that we're not incrementally minifying height, we can just modify it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
2020-04-07 18:02:56 +00:00
Eric Anholt
cdff81fa9a freedreno/a6xx: Sink the per-level size temps inside the loop.
u_minify(n, 1) is no cheaper than u_minify(n, level), and this makes the
logic a lot simpler to follow.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
2020-04-07 18:02:56 +00:00
Michel Dänzer
4176dfa880 gitlab-ci: Run merge request pipelines automatically only for Marge Bot
MR pipelines not triggered by Marge Bot can still be triggered manually.

Motivation: The main & forked Mesa project CI pipelines combined are
currently generating over 1 TB of egress traffic per week. ~80% of this
is from pre-merge pipelines. Assuming this corresponds to 4 pre-merge
and one post-merge pipeline per MR on average, this change could
potentially eliminate up to ~60% of the overall traffic (by preventing
3 of the 4 pre-merge pipelines from running automatically).

(Of course, this could be subverted if all jobs of the other pipelines
were triggered manually anyway... In most cases, manually triggering
just a few jobs should suffice)

v2:
* $GITLAB_USER_NAME was the wrong variable, $GITLAB_USER_LOGIN should
  do the trick.

Suggested-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4432>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4432>
2020-04-07 17:36:15 +00:00
Michel Dänzer
42fe600c0c gitlab-ci: Don't require triggering build/test jobs manually
Let them run automatically once all their dependencies have passed.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4432>
2020-04-07 17:36:15 +00:00
Michel Dänzer
27c4ef1397 gitlab-ci/lava: Add needs: for container image to test jobs (again)
Without this, the test jobs could spuriously run after the container
job failed or was cancelled, even if the build job didn't run at all.

(I already did this in 94cfe59070, but it
got dropped accidentally in 22d976454f)

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4432>
2020-04-07 17:36:15 +00:00
Michel Dänzer
c12576efbe gitlab-ci: Rename "paths" YAML anchor to "all_paths"
To avoid confusion with `paths:` elements.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4432>
2020-04-07 17:36:15 +00:00
Caio Marcelo de Oliveira Filho
cf54785239 anv/gen12: Lower VK_KHR_multiview using Primitive Replication
Identify if view_index is used only for position calculation, and use
Primitive Replication to implement Multiview in Gen12.  This feature
allows storing per-view position information in a single execution of
the shader, treating position as an array.

The shader is transformed by adding a for-loop around it, that have an
iteration per active view (in the view_mask).  Stores to the position
now store into the position array for the current index in the loop,
and load_view_index() will return the view index corresponding to the
current index in the loop.

The feature is controlled by setting the environment variable
ANV_PRIMITIVE_REPLICATION_MAX_VIEWS, which defaults to 2 if unset.
For pipelines with view counts larger than that, the regular
instancing will be used instead of Primitive Replication.  To disable
it completely set the variable to 0.

v2: Don't assume position is set in vertex shader; remove only stores
    for position; don't apply optimizations since other passes will
    do; clone shader body without extract/reinsert; don't use
    last_block (potentially stale). (Jason)

    Fix view_index immediate to contain the view index, not its order.
    Check for maximum number of views supported.
    Add guard for gen12.

v3: Clone the entire shader function and change it before reinsert;
    disable optimization when shader has memory writes. (Jason)

    Use a single environment variable with _DEBUG on the name.

v4: Change to use new nir_deref_instr.
    When removing stores, look for mode nir_var_shader_out instead
    of the walking the list of outputs.
    Ensure unused derefs are removed in the non-position part of the
    shader.
    Remove dead control flow when identifying if can use or not
    primitive replication.

v5: Consider all the active shaders (including fragment) when deciding
    that Primitive Replication can be used.
    Change environment variable to ANV_PRIMITIVE_REPLICATION.
    Squash the emission of 3DSTATE_PRIMITIVE_REPLICATION into this patch.
    Disable Prim Rep in blorp_exec_3d.

v6: Use a loop around the shader, instead of manually unrolling, since
    the regular unroll pass will kick in.
    Document that we don't expect to see copy_deref or load_deref
    involving the position variable.
    Recover use_primitive_replication value when loading pipeline from
    the cache.
    Set VARYING_SLOT_LAYER to 0 in the shader.  Earlier versions were
    relying on ForceZeroRTAIndexEnable but that might not be
    sufficient.
    Disable Prim Rep in cmd_buffer_so_memcpy.

v7: Don't use Primitive Replication if position is not set, fallback
    to instancing; change environment variable to be
    ANV_PRIMITVE_REPLICATION_MAX_VIEWS and default it to 2 based on
    experiments.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
2020-04-07 17:16:09 +00:00
Caio Marcelo de Oliveira Filho
395de69b1f intel/fs: Allow multiple slots for position
Change brw_compute_vue_map() to also take the number of pos slots.  If
more than one slot is used, the VARYING_SLOT_POS is treated as an
array.

When using Primitive Replication, instead of a single position, the
VUE must contain an array of positions.  Padding might be
necessary (after clip distance) to ensure rest of attributes start
aligned.

v2: Add note about array in the commit message and assert that
    pos_slots >= 1 to make clear 0 is invalid. (Jason)
    Move padding to be after the clip distance.

v3: Apply the correct offset when gathering the sources from outputs.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v2]
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
2020-04-07 17:16:09 +00:00
Caio Marcelo de Oliveira Filho
afa5447312 intel/gen12: Add XML description for 3DSTATE_PRIMITIVE_REPLICATION
v2: Use groups for the 16-element arrays "Viewport Offset"
    and "RTAI Offset". (Ken)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
2020-04-07 17:16:09 +00:00
Caio Marcelo de Oliveira Filho
5dc85abc4f nir: Add per_view attribute to nir_variable
If a nir_variable is tagged with per_view, it must be an array with
size corresponding to the number of views.  For slot-tracking, it is
considered to take just the slot for a single element -- drivers will
take care of expanding this appropriately.

This will be used to implement the ability of having per-view position
in a vertex shader in Intel platforms.

Acked-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
2020-04-07 17:16:09 +00:00
Simon Ser
0bc77bcdb2 mesa: add support for NV_pixel_buffer_object
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4422>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4422>
2020-04-07 16:52:15 +00:00
Jonathan Marek
a1727598a0 turnip: implement timestamp query
Passes tests in:
dEQP-VK.pipeline.timestamp.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4027>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4027>
2020-04-07 14:58:47 +00:00
Brian Ho
d64a7d6e69 turnip: Enable geometryShader device feature
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:21 +00:00
Brian Ho
bdf6b481d8 turnip: Enable geometry shaders for CP_DRAWs
Enable geometry shading on draw if the pipeline has a geometry
stage.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
b80dc4f5a6 turnip: Populate tu_pipeline.active_stages
This can be used to determine if the pipeline has a specific shader
stage (e.g. geometry shader).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
8eb0096312 turnip: Update maxGeometryShaderInvocations to match blob
Geometry shaders support an invocations parameter up to a limit
defined by maxGeometryShaderInvocations. This was set to 127, but
executing with invocations > 32 causes a crash. As it turns out, the
blob only advertises a max of 32 invocations, so we set that in
turnip as well.

Fixes dEQP-VK.geometry.instanced.draw_*_instances_{127, 64}_geometry_invocations

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
3550e20229 turnip: Selectively configure GRAS_LAYER_CNTL
One of the features of geometry shaders is the ability to render to
different layers by assigning to the gl_Layer (Layer in SPIR-V)
builtin.

While have already plumbed the layer regid to the geometry shader,
we also need to GRAS_LAYER_CNTL to actually use layered rendering.
In addition, gmem does not support layered rendering, so we need to
force sysmem.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
475fe500bf turnip: Set up REG_A6XX_SP_GS_CONFIG
Updates GS_CONFIG and HLSQ_GS_CNTL registers to match those emitted
by the blob and fd.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
fceccc411a turnip: Configure VFD_CONTROL with gsheader and primitiveid
This commit updates VFD_CONTROL to use the GS header and primitive
ID sysvals if a geometry shader stage is present in the pipeline.
Like in the case of VPC, the code here is adapted from fd6_program.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
012773be26 turnip: Configure VPC for geometry shaders
This commit updates tu6_emit_vpc to selectively emit GS-specifc
configuration. Most of this is repurposed from fd6_program.c.

This also refactors `link_geometry_stages` to ir3_nir_lower_tess.c
so it can be shared between fd and tu.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
6eabd6bd51 turnip: Emit geometry shader obj and related consts
Like with other shader types, we need to emit the geometry shader
object and the consts it uses. In addition, we need to emit
additional geometry-specific consts that link primitive/vertex stride
between the vs and gs. In conjunction with the gsheader, these are
used by the vs to determine where to stlw outputs and used by the gs
to determine where to ldlw those outputs from.

FD emits these consts in the draw call because in GL, you can mix
and match shaders in different programs. In Vulkan, however, we
compile and link the shaders at pipeline creation, so we can emit
these in the pipeline IB instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
1af71bee73 turnip: Set has_gs in ir3_shader_key
The ir3 compiler only lowers the VS and GS for geometry shading if
the corresponding has_gs key is set in the shader key. Without it,
GS-specific intrinsics like load_per_vertex_input won't get lowered
and the GS header will be initialized with invalid values.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Timur Kristóf
db2ee3686d radv: Print shader stage before disassembly.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
aa42b504d6 aco: Print shader stage in aco_print_program.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
c24d9522da radv: Enable ACO for NGG VS/TES, but disable NGG for ACO GS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
64225c4f96 aco/ngg: Run GS_ALLOC_REQ on priority 3 for NGG VS and TES.
It is recommended to do this as quickly as possible.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
e4da482d9e aco/ngg: Schedule position exports of NGG VS/TES.
Similarly to the HW VS stage, the HW NGG GS stage also
benefits from executing these exports as early as possible.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
c633edad72 aco/ngg: Implement NGG VS and TES.
When NGG is used, vertex and tess eval shaders are executed on the
hardware NGG geometry stage. There is a series of steps they
must perform:

* Request GS space using GS_ALLOC_REQ
* Export the primitive
* Finally, export the normal VS outputs

In this commit, two modes are implemented:

* "late" which matches what the RADV LLVM backend currently does
* "early" which is an optimized version as seen in radeonsi

Vulkan doesn't allow the shader to write the edge flags, so we can
currently always use the "early" mode.

Exporting the primitive ID is also supported by having the GS threads
write that into LDS and reading them from LDS in the ES threads.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
c5ed0883fc aco/ngg: Setup NGG VS and TES stages.
ngg_vertex_gs and ngg_tess_eval_gs work very similarly to
vertex_vs and tess_eval_vs, but they run on the HW NGG GS stage.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
d7b4bb3a88 aco/ngg: Fix exports for NGG VS and TES.
The exports in NGG VS and TES work just like VS exports,
so the assembler needs to fix these too in the same manner.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
ec72c504c6 aco/ngg: Initialize exec mask for NGG VS and TES.
They behave like merged ESGS shaders, so the exec mask needs
to be manually initialized for these NGG shaders too.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
1436c0b8e0 aco/ngg: Add new stage for hw_ngg_gs.
This is needed to distinguish between NGG and legacy.
Otherwise, vertex_geometry_gs and ngg_vertex_geometry_gs
have the same value, which we want to avoid.

Also, there is no such thing as ngg_vertex_tess_control_hs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
35e58314d8 aco: Treat s_setprio as a scheduling barrier.
We want to execute instructions after s_setprio in the given
priority, so we must prevent the scheduler from scheduling beyond
s_setprio, otherwise some instructions could be executed in a
different priority.

Rename hazard_fail_memtime to hazard_fail_unreorderable and include
s_setprio in the list of unreorderable opcodes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
d345bfe195 aco: Extract merged_wave_info_to_mask to its own function.
Currently we only use this at the beginning of merged shader parts,
but we are going to need to use	it with	some NGG code as well.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
90b1047fdf aco: Print block_kind_export_end.
Useful when debugging issues with exports.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
b9cbdb6a45 aco: Extract uniform if handling to separate functions.
Currently we only use this for uniform ifs that come from NIR,
but we are going to need to use it with some NGG parts as well.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
cc8a85d05a aco: Fix crash in insert_wait_states.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4465>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4465>
2020-04-07 09:51:14 +00:00
Alyssa Rosenzweig
eeb626257d pan/bit: Wire up add/add op+test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
e456630bd9 pan/bit: Add fmin/max16 tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
fc446dc322 pan/bit: Enable more debug for run
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
0e0f7f110c pan/bit: Add min/max support to interpreter
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
e9967e9f80 pan/bit: Unify test frontends
Random.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
f91929e515 pan/bi: Force ADD scheduling for MINMAX
Might be GPU version specific.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
9279ed1550 pan/bi: Fix incorrect abs flip in fma/fadd16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
3bbce876e6 pan/bi: Set BI_MODS for MINMAX
We support it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
822f127fe5 pan/bi: Add ADD add/min/max fp32 packing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
36e4c6b267 pan/bi: Structify ADD unit add/min/max
..since it's missing for FMA

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
f6bd0ec907 pan/bi: Implement min/max on FMA
Unfortunately, while this looks fine to the disasm, it's raising
INSTR_INVALID_ENC on my g31 board here. Looks like it might be ADD only
on newer Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
545fc7b26a pan/bit: Add special unit test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
8e50d44950 pan/bit: Add special op interpreting
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
c37c799284 pan/bi: Add fp16 support for frcp/frsq
More ops.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
d7bb7b79a8 pan/bi: Add 32-bit _FAST packing
For frcp/frsq on newer Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
a6ae2d8f94 pan/bi: Remove nontrivial SPECIAL ops
These require a lot more handholding in the IR than we can deal with at
this stage; we need to restrict ourselves to frcp/sqrt.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Rhys Perry
20a4b1461b aco: zero-initialize Temp
Fixes dEQP-VK.transform_feedback.* crashes from accesses garbage
temporaries in emit_extract_vector().

Fixes: 85521061 ("aco: prepare helper functions for subdword handling")
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4463>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4463>
2020-04-06 19:15:19 +00:00
Rhys Perry
8dd6a51e80 aco: remove divergence check in sanitize_if()
We also need to do this if a side ends in a divergent break.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4461>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4461>
2020-04-06 18:39:29 +00:00
Rob Clark
57557783f6 nir/lower_amul: fix slot calculation
Fixes incorrect indexing in
dEQP-GLES31.functional.ssbo.layout.instance_array_basic_type.packed.mat2x3

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4455>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4455>
2020-04-06 18:00:17 +00:00
Rob Clark
4638a16a93 nir: add some swizzle helpers
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4455>
2020-04-06 18:00:17 +00:00
Jason Ekstrand
e78a7a1825 nir: Assert memory loads are aligned
We've had alignment parameters on these operations for a while but a
bunch of places weren't setting them.  That should be resolved now so we
can start validating that they're always set.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4441>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4441>
2020-04-06 15:57:30 +00:00
Marek Olšák
068a3bf0d7 util: move and adjust the vertex upload heuristic equation from u_vbuf
This will also be used by glthread.

The new equation is optimized for glthread.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:30:10 -04:00
Marek Olšák
d9cb0ec5e6 vbo: expose helper function vbo_get_minmax_index_mapped for glthread
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:29:52 -04:00
Marek Olšák
e69e59778c mesa: split _mesa_primitive_restart_index into a function without gl_context
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:29:38 -04:00
Marek Olšák
e6bc1702f4 mesa: precompute _mesa_primitive_restart_index during state changes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:29:16 -04:00
Marek Olšák
10beee8a77 mesa: remove no longer needed _mesa_is_bufferobj function
All buffers have Name != 0.

Note that there is no longer the pointer dereference to get Name,
so it's faster.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:28:53 -04:00
Marek Olšák
58fab9a6fe mesa: remove NullBufferObj
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:28:53 -04:00
Marek Olšák
54525808aa mesa: don't ever bind NullBufferObj to glBindBuffer(Base,Range) slots
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:28:53 -04:00
Marek Olšák
f3cce7087a mesa: don't ever bind NullBufferObj for glBindBuffer targets
Since VAOs don't use NullBufferObj for vertex attribs anymore, let's remove
more uses of NullBufferObj.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:28:53 -04:00
Marek Olšák
e630271e0e mesa: don't ever set NullBufferObj in gl_vertex_array_binding
This improves performance by 5% in the game "torcs", FPS: 98.83 -> 103.73

It does a lot of glPush/PopClientAttrib, which exacerbates the overhead
of setting NullBufferObj.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:28:53 -04:00
Marek Olšák
a0a0c68150 mesa: optimize initialization of new VAOs
Precompute the default state in gl_context, and just copy it when we create
a VAO.

This also helps glPushClientAttrib function, which always creates a VAO,
which has a substantial CPU overhead in profiles.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:27:59 -04:00
Mauro Rossi
dbdd0149ed android: aco: add various compiler statistics
Fixes a building error due to compiler/aco_statistics.cpp
missing in src/amd/Makefile.sources

Fixes: b1544352 ("aco: add various compiler statistics")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
2020-04-06 12:59:13 +02:00
Hyunjun Ko
9f174eb2df nir: fix wrong assignment to buffer in xfb_varyings_info
Tested with dEQP-VK.transform_feedback.fuzz.various_buffers.buffers100_instance_array_vertex

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4459>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4459>
2020-04-06 08:55:05 +00:00
Tapani Pälli
84e845c969 mesa/st: release variants for active programs before unref
Programs can be shared among many contexts and each program holds a
variant list which has context specific variants. When context gets
destroyed it must make sure it relases all variants, otherwise remaining
context that utilizes same program will attempt to save a zombie shader
for already deleted context when releasing program and its variants.

Fixes:
   dEQP-EGL.functional.sharing.gles2.program.render

and other flaky multihread dEQP-EGL failures.

v2: pass program pointer via & (Marek)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4386>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4386>
2020-04-06 08:00:00 +03:00
Tapani Pälli
4822cc9700 mesa/st: unbind shader state before deleting it
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4386>
2020-04-06 08:00:00 +03:00
Alyssa Rosenzweig
82597c46c3 pan/bit: Add mode to run unit tests
Probably the most useful of the bunch going forward.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
1a1c55709e pan/bit: Make run more useful
..by printing some output.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
50476efb61 pan/bit: Add csel tests
..and pull out common instruction generation to reduce duplication in
tests a bit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
9b262208b6 pan/bit: Add CSEL to interpreter
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
069189ff0f pan/bit: Add FMA tests
Now that the earlier reg ctrl issue is fixed these should pass.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
78ba6d50a4 pan/bit: Add 16-bit fmod tests
These raise another set of issues -- indeed, not all of these tests are
passing, since it turns out I have an actual bug in the packing code. So
after all this work, test bringup has identified an actual issue :)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
40160c576d pan/bit: Add verbose printing for tests
We'd like to dump both the generated IR (so we know exactly what's being
tested) as well as the compiled program (so we know what's running for
comparison).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
7c887d368e pan/bit: Add helper for generating floating mod tests
We can iterate them, isn't that adorable!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
14c5343867 pan/bit: Add packing test framework
Given an instruction, we'd like to wrap it in a clause with some I/O on
each end so we can pack it up and send it to the hardware to compare
against the simulator.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
5e3e32e368 pan/bit: Implement floating source mods
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
dbb8a564f2 pan/bit: Implement outmods
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
ab58185604 pan/bit: Add preliminary FMA/ADD/MOV implementations
Missing some details about modifiers but the core structure should
look like this for 32 and 16-bit, I think. My sincerest apologies for
the macro magic, I tried to make it the least bad I could but trying to
keep down repitition.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
fbe504e221 pan/bit: Handle read/write
We case the various sources and destinations to model register file
access and passthrough in particular.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
7904a29340 pan/bit: Stub out BIR interpreter
We'd like to step through a BIR program to evaluate it for testing.
Let's stub out some infrastructure for modeling Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
8eefb2765a pan/bi: Match CSEL argument order with hw
It turns out ports need to be in order of the arguments of an
instruction (port 3, that is), which breaks on instructions whose IR
argument order is different from the packed order, like csel. So fix
that.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
9114ebbe79 pan/bi: Add helper to debug port assignment
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
0ab3f687c0 pan/bi: Handle BIFROST_FIRST_WRITE_FMA_P2_READ_P3
It's a special case for unclear reasons, and if you mess it up you get
INSTR_INVALID_ENC. Isn't hardware fun?

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
75aabc6ea1 pan/bi: Allow BI_FMA to take mods
It doesn't take abs but it can take outmod/neg.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
69dde49f80 pan/bi: Don't gobble zero ports
In case we've reading/writing R0.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
c7a6df4638 pan/bi: Fix negation in ADD.v2f16
When we flip the sources we need to flip the negates as well to stay
consistent.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
5f48caf98b pan/bi: Fix duplicated source in ADD.v2f16
Typo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
08fe1081b7 pan/bi: Export bi_class_name
For use in naming tests.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Vasily Khoruzhick
c04964c690 lima: avoid situations when scissor minx > maxx or miny > maxy
Clip scissor to viewport and then to framebuffer to avoid that since
hardware can't handle this case.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4427>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4427>
2020-04-05 18:52:11 +00:00
Christian Gmeiner
eed5a00989 etnaviv: convert perfmon queries to acc queries
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
20e0ef88ed etnaviv: move generic perfmon functionality into own file
This change removes the basic infrastructure to work with perfmon
from the perfmon query impl and puts it into its own place.
Makes the whole series easier to review and ends smaller changes.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
c111f79b1c etnaviv: extend acc sample provide with an allocate(..)
We might be able to sub-class etna_acc_query.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
e0bc251ef8 etnaviv: extend result(..) to return if data is ready
For the upcoming conversion of perfmon queries to the acc query
framework we need a way to tell that the data is not ready.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
e5b0eed0f5 etnaviv: make use of a fixed size array to track of all acc query provider
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
6963fcd81f etnaviv: extend acc query provider with supports(..) function
Move the logic if a query provider supports a query_type
directly to the provider.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
f47b4eddd9 etnaviv: rework wait/flush logic
Saves us from doing an extra flush in !wait case and seems more
logical now. Also evaluate etna_bo_cpu_prep(..) retun value.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
d1697fef1a etnaviv: reset no_wait_cnt after triggered flush
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
2381904030 etnaviv: explicitly call resource_written(..)
We might end in cases where etna_acc_get_query_result(..) gets called
within one draw call (aka before flushing). At this point the status
of the resource was not set but gets used in etna_acc_get_query_result(..)
to handle different wait cases. Fix this issue by calling resource_written(..)
explicitly.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
f2c4892512 etnaviv: rework etna_acc_sample_provider
Simplify the interface a sampler provider needs to implement. The start(..)
and stop(..) functions got called by resume(..) and suspend(..) so lets
get rid of start(..) and stop(..). Also the way we count and use samples
is much easier to follow now.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
46096a4cb4 etnaviv: rename hw queries to acc queries
The name hw queries was choosen as occlusion queries are 'feeling'
like nothing special. It is possible to interact with them only
via the command stream - unlike perfom queries where some kernel
magic is needed.

Accumulated HW queries is a much better name for this type of queries.
We read some hardware values over some draw calls and need to accumulate
them to get the final result.

This is some prep work for the following perfmon changes.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Eric Engestrom
7af813d48a glx: use anonymous namespace to avoid -Wodr issues when building with LTO enabled
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2597>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2597>
2020-04-04 17:46:05 +00:00
Eric Engestrom
17d783b2ed glx: fix 630 times -Wlto-type-mismatch when building with LTO enabled
The prototypes are simply copied from include/GL/gl*.h

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2597>
2020-04-04 17:46:05 +00:00
Jason Ekstrand
a0a4df7e4f Revert "spirv: Rewrite CFG construction"
This reverts commit fa5a36dbd4.
2020-04-04 09:47:00 -05:00
Dave Airlie
51492f20f7 Revert "gallivm: disable rgtc/latc SNORM accellerated fetches"
This reverts commit 4897e70ccd.

Fixed in previous commits.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4425>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4425>
2020-04-04 12:37:20 +10:00
Dave Airlie
aa95b6aed5 gallivm/rgtc: enable fast path for snorm types.
As per Roland's suggestions it should be easy to enable the
fast path fetch for rgtc snorm as well here.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4425>
2020-04-04 12:37:20 +10:00
Dave Airlie
03204dadbc gallivm/rgtc: fix the truncation to 8-bit
The 8 bit type wasn't 8-bit so when doing signed work we lost
the sign bit. This fixes it to use a proper vector type,
even if we just end up in here with the 1-wide path for now.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4425>
2020-04-04 12:33:49 +10:00
Rob Clark
0b06adb750 glsl: don't limit fp16 lowering to frag
This restriction doesn't belong in core code.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
f054230ea3 freedreno: limit fp16 to frag and compute
To avoid dealing w/ some backend varying linking issues when mixing
precision vs geom/tess.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
c0d56efa31 freedreno/ir3: also precompile compute shaders for shaderdb
Similar as with draw shaders, nothing will trigger the final variant in
shader-db.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
37e052c8b0 freedreno: fix missing locking
Fixes: d0b3ccb060 ("freedreno: Fix detection of being in a blit for acc queries.")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
f8fc690d1c freedreno/a6xx: add some compute logging
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
629c0cee0a freedreno/ir3/cf: use ssa-uses
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
72f6b03aec freedreno/ir3: add a pass to collect SSA uses
We don't really track these as the ir is transformed, but it would be a
useful thing for some passes to have.  So add a pass to collect this
information.  It uses instr->data (generic per-pass ptr), with the
hashsets hanging under a mem_ctx for easy disposal at the end of the
pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
67dbe8088f freedreno/ir3/cf: skip array load/store
Don't fold conversions into array (incl phi lowered to regs/array).
These aren't SSA.  Avoids crashes in particular in frag shaders with
flow control, which would leave a dangling array write disconnect from
the original cov src.

Possibly this could be slightly relaxed, if there is no other consumer
of the src, and it were in the same block.  But it would require
updating block->keeps, and taking care of barrier state.  Which isn't a
thing the cf pass does currently.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
c2d0cc8b8d freedreno/ir3: fixup cat3 32b vs 16b
These should be keyed on src arg type.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
e73a8a9703 freedreno/ir3/cf: handle widening too
We can also fold f16->f32 conversions.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
bf64648864 nir: fix definition of imadsh_mix16 for vectors
Fixes: c27b3758fa ("nir/opcodes: Add new 'umul_low' and 'imadsh_mix16' opcodes")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Daniel Schürmann
1d293096d0 aco: use MUBUF to load subdword SSBO
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
8cfddc9199 aco: implement 8bit/16bit store_ssbo
Currently without alignment check, so that
we can only use the _byte and _short versions
and multi-component stores are split.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
3df0a41c75 aco: implement 8bit/16bit load_buffer
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
c70d014455 aco: implement storagePushConstant8 & storagePushConstant16
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
5718347c2b aco: implement vec2/3/4 with subdword operands
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
85521061d6 aco: prepare helper functions for subdword handling
- get_alu_src()
- emit_extract_vector()
- emit_split_vector()

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
fe08f0ccf9 aco: add byte_align_scalar() & trim_subdword_vector() helper functions
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
23ac24f5b1 aco: add missing conversion operations for small bitsizes
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
d223e4e8de aco: don't vectorize 8/16bit load/store_ssbo
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
0bb3537676 aco: don't assume split_vector(create_vector) has the same number of elements when optimizing
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
c436743b0c aco: don't propagate SGPRs into subdword PSEUDO instructions
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
8f1712ba2f aco: lower subdword shuffles correctly.
Note that subdword swaps are not yet implemented

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
ca38c1f1f1 aco: add builder function for subdword copy()
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
9f779a2518 aco: small refactoring of shuffle code lowering
Uses now bytes instead of 32bit size

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
0680b258f4 aco: align subdword registers during RA when necessary
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
031edbc4a5 aco: adapt register allocation for subdword registers
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
2c74fc98b8 aco: create helper function to collect variables from register area
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
aca2bbf975 aco: add notion of subdword registers to register allocator
To not having to split the register file into single bytes,
we maintain a map with registers which contain subdword variables.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
90811554da aco: remove unnecessary reg_file.fill() operation in get_reg_create_vector()
No pipelinedb changes

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
7de003473c aco: fix Temp and assignment of renamed operands during RA
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
2d957311f1 aco: print subdword registers
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
3c0c28a1ff aco: validate RA of subdword assignments
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
799bb10328 aco: validate uninitialized operands
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
9374659426 aco: validate register alignment of subdword operands and definitions
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
ad4e104bb9 aco: validate p_create_vector with subdword elements properly
Also allows for undef operands

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
f01bf51a2b aco: refactor regClass setup for subdword VGPRs
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Rhys Perry
c4223fa512 aco: add emission support for register-allocated sdwa sels
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
8acb384471 aco: add sub-dword regclasses
Co-authored-by: Rhys Perry <pendingchaos02@gmail.com>

Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Rhys Perry
9915af5ca1 aco: print and validate opsel
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Rhys Perry
b84d59af50 aco: add SDWA_instruction
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
00312f3c95 aco: add comparison operators for PhysReg
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Rhys Perry
34424b81df aco: make PhysReg in units of bytes
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
dc69738b0f nir: fix unpack_64_4x16 in lower_alu_to_scalar()
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Lionel Landwerlin
373f1eb9de drm-shim: stub libdrm's use of realpath()
libdrm started using realpath to get the type of bus associated with a
given device. This stubs the very specific usage that prevents
drm-shim's device from being listed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4429>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4429>
2020-04-03 21:14:18 +00:00
Lionel Landwerlin
c3e305616c drm-shim: return device platform as specified
v2: Embed the libdrm dependency inside the drm-shim dependency

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Eric Anholt <eric@anholt.net> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4429>
2020-04-03 21:14:18 +00:00
Jason Ekstrand
fa5a36dbd4 spirv: Rewrite CFG construction
This commit completely rewrites the way we extract a structured CFG from
SPIR-V.  The new approach is different in a few ways:

 1. It does a breadth-first search instead of depth-first.  This means
    that we've visited the merge node for a construct before we visit
    any of the nodes inside the construct.  This makes it easier to
    validate things like loop and switch nesting.

 2. We record more information in the CFG.  Earlier commits added a
    parent pointer to vtn_cf_node but we now record all of the merge and
    other special blocks for each CFG node.  This lets us validate
    things more precisely.

 3. It makes heavy use of merge blocks for walking the CFG.  Previously,
    we sort of used them as hints for trying to guess the CFG structure
    but things got dicey whenever a merge was missing.  We had some
    heuristics for how to handle short-circuiting if statements but it
    was a bunch of special cases.

    Now, we make them a fundamental part of walking the CFG.  When we
    encounter a control-flow construct, we add the body components of
    the construct to the BFS work list and then jump to the merge block
    if one exists to continue scanning the current CFG nesting level.
    If no merge block exists, we assume that means that control-flow
    never re-converges in a normal way and that the only way to get back
    to normality is with a direct jump such as a loop break or continue.
    This should make things far more robust when trying to deal with the
    more creative placement (or lack thereof) of merge instructions.

Reviewed-by: Alan Baker <alanbaker@google.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
2de5a41595 spirv: Add a parent field to vtn_cf_node
This makes it easier to crawl up the CF tree when trying to validate the
incoming SPIR-V control-flow.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
d94e464a9f spirv: Make vtn_function a vtn_cf_node
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
255aacbec1 spirv: Make vtn_case a vtn_cf_node
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
9d7fcf1de0 spirv: Add cast and loop helpers for vtn_cf_node
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
8c5c65d0d6 spirv: Add a vtn_block() helper
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
991c426160 intel/nir: Enable load/store vectorization
This commit enables the I/O vectorization pass that was originally
written for ACO for Intel drivers.  We enable it for UBOs, SSBOs, global
memory, and SLM.  We only enable vectorization for the scalar back-end
because it vec4 makes certain alignment assumptions.

Shader-db results with iris on ICL:

    total instructions in shared programs: 16077927 -> 16068236 (-0.06%)
    instructions in affected programs: 199839 -> 190148 (-4.85%)
    helped: 324
    HURT: 0
    helped stats (abs) min: 2 max: 458 x̄: 29.91 x̃: 4
    helped stats (rel) min: 0.11% max: 38.94% x̄: 4.32% x̃: 1.64%
    95% mean confidence interval for instructions value: -37.02 -22.80
    95% mean confidence interval for instructions %-change: -5.07% -3.58%
    Instructions are helped.

    total cycles in shared programs: 336806135 -> 336151501 (-0.19%)
    cycles in affected programs: 16009735 -> 15355101 (-4.09%)
    helped: 458
    HURT: 154
    helped stats (abs) min: 1 max: 77812 x̄: 1542.50 x̃: 75
    helped stats (rel) min: <.01% max: 34.46% x̄: 5.16% x̃: 2.01%
    HURT stats (abs)   min: 1 max: 22800 x̄: 336.55 x̃: 20
    HURT stats (rel)   min: <.01% max: 17.11% x̄: 2.12% x̃: 1.00%
    95% mean confidence interval for cycles value: -1596.83 -542.49
    95% mean confidence interval for cycles %-change: -3.83% -2.82%
    Cycles are helped.

    total sends in shared programs: 814177 -> 809049 (-0.63%)
    sends in affected programs: 15422 -> 10294 (-33.25%)
    helped: 324
    HURT: 0
    helped stats (abs) min: 1 max: 256 x̄: 15.83 x̃: 2
    helped stats (rel) min: 1.33% max: 67.90% x̄: 21.21% x̃: 15.38%
    95% mean confidence interval for sends value: -19.67 -11.98
    95% mean confidence interval for sends %-change: -23.03% -19.39%
    Sends are helped.

    LOST:   7
    GAINED: 2

Most of the helped shaders were in the following titles:

 - Doom
 - Deus Ex: Mankind Divided
 - Aztec Ruins
 - Shadow of Mordor
 - DiRT Showdown
 - Tomb Raider (Rise, I think)

Five of the lost programs are SIMD16 shaders we lost from dirt showdown.
The other two are compute shaders in Aztec Ruins which switched from
SIMD8 to SIMD16.

Vulkan pipeline-db stats on ICL:

    Instructions in all programs: 296780486 -> 293493363 (-1.1%)
    Loops in all programs: 149669 -> 149669 (+0.0%)
    Cycles in all programs: 90999206722 -> 88513844563 (-2.7%)
    Spills in all programs: 1710217 -> 1730691 (+1.2%)
    Fills in all programs: 1931235 -> 1958138 (+1.4%)

By far the most help was in the Tomb Raider games.  A couple of Batman
games with DXVK were also helped.  In Shadow of the Tomb Raider:

    Instructions in all programs: 41614336 -> 39408023 (-5.3%)
    Loops in all programs: 32200 -> 32200 (+0.0%)
    Cycles in all programs: 1875498485 -> 1667034831 (-11.1%)
    Spills in all programs: 196307 -> 214945 (+9.5%)
    Fills in all programs: 282736 -> 307113 (+8.6%)

Benchmarks of real games I've done on this patch:

 - Rise of the Tomb Raider: +3%
 - Shadow of the Tomb Raider: +10%

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
36a32af008 nir/load_store_vectorize: Add support for nir_var_mem_global
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
b6273291b5 nir/load_store_vectorize: Use nir_iadd_imm for offsets
This makes it capable of handling 64-bit offsets

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
04d08ea149 nir/load_store_vectorize: Fix shared atomic info
These were clearly copied and pasted from SSBOs.  The shared atomics
don't have an SSBO index so their offset is src0 and data is src1.

Fixes: ce9205c03b "nir: add a load/store vectorization pass"
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
c1bcb025db intel/nir: Lower memory access bit sizes later
We're about to do load/store vectorization right before this but we need
that to happen after we've done a round of optimization.  Otherwise,
we'll be getting unoptimized NIR in from ANV and the vectorizer won't be
able to do anything with it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
f1883cc73d iris: Set alignments on cbuf0 and constant reads
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
4c8b100388 anv: Improve brw_nir_lower_mem_access_bit_sizes
This commit makes us take both bit size and alignment into account so
that we can properly handle cases such as when we have a 32-bit store
to an 8-bit-aligned address.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
c643979228 intel/fs: Choose memory message type based on bit size
Thanks to the NIR vectorizing pass, we're about to see alignments that
are higher than the bit size.  Previously, we could use either and we
just happened to choose alignment (probably the wrong choice) so it's
harmless to switch to detecting based on bit size.  This commit changes
things to take both into account which is more accurate to what the
messages we're using do.  We also beef up the asserts and make them more
consistent, more accurate, and more complete.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Brian Ho
6e76453472 ir3: Disable copy prop for immediate ldlw offsets
Immediate offsets are currently collapsed for ldlw, but ldlw does
behave correctly with immediate values. For example,
`ldlw.u32 r0.x, l[4], 1` actually means to use the value of
regid 4 (r1.x) as the offset when we actually want it to use the
imm value of 4 as the offset.

This commit disables copy prop for ldlw offsets so the same
intrinsic gets compiled to:
  mov.u32u32 r0.y, 0x00000004
  ldlw.u32 r0.x, l[r0.y], 1

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4439>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4439>
2020-04-03 19:44:46 +00:00
Rhys Perry
ea51f8f79a radv: fix null winsys gpu_info array
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: de550805c5 ('radv/winsys: spoof some values for num_render_backends in the null winsys')
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4437>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4437>
2020-04-03 17:40:32 +00:00
Icecream95
319158a814 pan/midgard: Fix a divide by zero in emit_alu_bundle
util_dynarray_grow_bytes divides by eltsize, but it's possible for
bundle->padding to be zero.

I changed the other call to util_dynarray_grow_bytes for consistency.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4397>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4397>
2020-04-03 16:49:04 +00:00
Brian Ho
355abfeed5 turnip: Advertise 8 bit subpixel precision
Previously, turnip advertised 4-bit subpixel precision when in
practice, a6xx seems to render with 8-bit precision. This caused
dEQP-VK.renderpass2.suballocation.subpass_dependencies.late_fragment_tests.*
to fail because they compare images rendered with turnip against
ones rendered via a software reference implementation parameterized
by turnip's VkPhysicalDeviceLimits.subPixelPrecisionBits value.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4172>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4172>
2020-04-03 16:27:56 +00:00
Pierre-Eric Pelloux-Prayer
61566f2ae1 mesa: update pipeline when re-linking a program in use
Updating was only done for bound program, so add the
same logic for existing pipelines.

This fixes piglit test arb_shader_storage_buffer_object-issue1258.
It might also help the following issue:
  https://gitlab.freedesktop.org/mesa/mesa/-/issues/1258

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4404>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4404>
2020-04-03 13:42:43 +00:00
Ilia Mirkin
1288ac7632 nv50: don't try to upload MSAA settings for BUFFER textures
We need the MSAA scaling parameters to properly fetch samples from MSAA
textures. These are stored in the miptree which wraps all regular
textures. However it does not wrap buffer textures, so make sure to skip
them rather than accessing out-of-bounds or unmapped memory.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2727
Fixes: 3bd40073b9 ("nv50: add support for texelFetch'ing MS textures")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4424>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4424>
2020-04-03 13:00:08 +00:00
Lionel Landwerlin
b38c32a573 intel/aub_viewer: fix access to freed memory
Windows closed while we're displaying them might lead to invalid
memory accessed, so use the safe iterators on the list of windows.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4430>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4430>
2020-04-03 15:46:24 +03:00
Rhys Perry
7e6aec6687 radv, aco: collect statistics if requested but executables are not
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
2020-04-03 12:12:08 +00:00
Rhys Perry
507956ed04 aco: add vmem/smem score statistic
This isn't perfect (for example, changes might not be too meaningful when
comparing shaders with different control flow) but it should be useful for
evaluating scheduler changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
2020-04-03 12:12:08 +00:00
Rhys Perry
b1544352c0 aco: add various compiler statistics
Adds these statistics:
- hash of code and constant data
- number of instructions
- number of copies from pseudo-instructions
- number of branches
- estimate of cycles spent not waiting in s_waitcnt
- number of vmem/smem "clauses"
- sgpr/vgpr usage before scheduling

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
2020-04-03 12:12:08 +00:00
Rhys Perry
ad2703653f radv: add code for exposing compiler statistics
Statistics will be added to ACO in later commits.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
2020-04-03 12:12:08 +00:00
Daniel Stone
bfb9c08e5c EGL: Add eglSetDamageRegionKHR to GLVND dispatch list
This was missed in the original conversion, which added support for
eglSetDamageRegionKHR to local EGL exports, but forgot to generate
updated dispatch for GLVND.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: 9827547313 ("egl/android: support for EGL_KHR_partial_update")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4403>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4403>
2020-04-03 12:22:51 +01:00
Eric Engestrom
8af2eba424 docs: update calendar, add news item, and link releases notes for 20.0.4
Note that the next 20.0.x releases numbers have been shifted as this was
not one of the planned releases.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428>
2020-04-03 13:16:07 +02:00
Eric Engestrom
a89b08b744 docs/relnotes: add sha256sum for 20.0.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428>
2020-04-03 13:11:59 +02:00
Eric Engestrom
71e6f15a24 docs: add release notes for 20.0.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428>
2020-04-03 13:11:59 +02:00
Pierre-Eric Pelloux-Prayer
43f785419c util/xmlconfig: fix sha1 comparison code
Fixes: 8f48e7b1e9 ("util/xmlconfig: add new sha1 application attribute")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2730
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4426>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4426>
2020-04-03 11:44:00 +02:00
Samuel Pitoiset
655e8449d0 radv/llvm: enable 16-bit storage features on GFX6-GFX7
Should allow to play Doom Eternal on GFX6-GFX7 because the
driver now supports storageBuffer16BitAccess.

It's now supported and all CTS tests pass.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/857
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
3cd5450df5 ac/nir: split 16-bit SSBO stores on GFX6
Due to possible alignment issues, make sure to split stores of
16-bit vectors.

Doom Eternal requires storageBuffer16BitAccess.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
55fdcc03de ac/nir: split 16-bit load/store to global memory on GFX6
Due to possible alignment issues, make sure to split loads/stores
of 16-bit vectors.

Doom Eternal requires storageBuffer16BitAccess.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
7308f2e912 radv/llvm: enable 8-bit storage features on GFX6-GFX7
It's now supported and all CTS tests pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
c6bf1597d1 ac/nir: split 8-bit SSBO stores on GFX6
Due to possible alignment issues, make sure to split stores of
8-bit vectors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
433f3380eb ac/nir: split 8-bit load/store to global memory on GFX6
Due to possible alignment issues, make sure to split loads/stores
of 8-bit vectors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
c953292630 aco: always optimize v_mad to v_madak in presence of literals
v_mad and v_madak are both 64-bit instructions, so it doesn't
increase code size to always apply a 32-bit literal instead of
using v_mad and a sgpr which contains that literal.

Found with some Youngblood shaders but help some other games.

vkpipeline-db (VEGA10):
Totals from affected shaders:
SGPRS: 46168 -> 46016 (-0.33 %)
VGPRS: 45576 -> 45564 (-0.03 %)
Code Size: 5187208 -> 5179584 (-0.15 %) bytes
Max Waves: 3297 -> 3297 (0.00 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4410>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4410>
2020-04-03 07:30:49 +00:00
Neil Roberts
63b4fcba33 glsl/lower_precision: Use vector.back() instead of vector.end()[-1]
The use of vector.end()[-1] seems to generate warnings in Coverity about
not allowing a negative argument to a parameter. The intention with the
code snippet is just to access the last element of the vector. The
vector.back() call acheives the same thing, is clearer and will
hopefully fix the Coverity warning.

I’m not exactly sure why Coverity thinks the array index can’t be
negative. cplusplus.com says that vector::end() returns a random access
iterator and that the type of the array index operator argument to that
should be the difference type for the container. It then also says that
difference_type for a vector is "a signed integral type".

Reviewed-by: Eric Anholt <eric@anholt.net>
2020-04-03 09:10:17 +02:00
Karol Herbst
ff1a3a00cb clover: fix build with single library clang build
Closes: #2560
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4417>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4417>
2020-04-03 04:07:38 +00:00
Drew Davenport
2243f0cd01 radv: Filter extensions not whitelisted for Android
Android enforces through CTS a whitelist of Vulkan extensions that are
allowed in each Android version. When building radv for Android, disable
extensions that are unknown to the version of Android for which
radv is being built.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4398>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4398>
2020-04-03 02:25:50 +00:00
Ilia Mirkin
d6368d404b st/vdpau: make query test for 2D support
The 3D check has been there since the dawn of time, but I see no reason
for it, most likely a typo. When the surfaces are actually created, they
use the 2D resource type (as expected).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4108>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4108>
2020-04-03 01:40:35 +00:00
Ilia Mirkin
c1cc79739a st/vdpau: avoid asserting on new VDP_YCBCR_* formats
Depending on user's vdpau headers, not all of those defines may exist.
Eventually we may want a private copy of these, but this is simple
enough for now.

Fixes asserts when running vdpauinfo which supports these recently added
formats.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4108>
2020-04-03 01:40:35 +00:00
Jason Ekstrand
c71c1f44b0 nir/from_ssa: Only chain movs when a src is also a dest
The algorithm we use for resolving parallel copy instructions plays this
little shell game with the values.  The reason for this is that it lets
us handle cases where, for instance we have a -> b and b -> a and we
need to use a temporary to do a swap.  One result of this algorithm is
that it tends to emit a lot of mov chains which are typcially really bad
for GPUs where a mov is far from free.  For instance, it's likely to
turn this:

    r16 = ssa_0; r17 = ssa_0; r18 = ssa_0; r15 = ssa_0

into this:

    r15 = mov ssa_0
    r18 = mov r15
    r17 = mov r18
    r16 = mov r17

which, if it's the only thing in a block (this is common for phis) is
impossible for a scheduler to fix because of the dependencies and you
end up with significant stalling.  If, on the other hand, we only do the
chaining in the actual case where we need to free up a so that it can be
used as a destination, we can emit this:

    r15 = mov ssa_0
    r18 = mov ssa_0
    r17 = mov ssa_0
    r16 = mov ssa_0

which is far nicer to the scheduler.  On Intel, our copy propagation
pass will undo the chain for us so this has no shader-db impact.
However, for less intelligent back-ends, it's probably a lot better.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4412>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4412>
2020-04-02 19:06:46 +00:00
Connor Abbott
73e574acb8 freedreno: Rename RB_DONE_TS
This makes the various cache_flush implementations make more sense.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4065>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4065>
2020-04-02 16:18:25 +00:00
Connor Abbott
36133a5434 freedreno: Cleanup event names
It turns out that every *_TS event, i.e. every event which requires a
seqno pointer, also allows generating an interrupt in the kernel, at
least since a3xx. And furthermore these interrupts are named by the kgsl
kernel driver and already in envytools. Therefore it's possible to map
out what the *_TS events are with 100% certainty, given access to the
hardware, by sending a CP_EVENT_WRITE with bit 31 set, unmasking all
interrupts in the kernel, and logging which ones get hit. I've done this
for a6xx, and I've also looked at the a5xx firmware, and the list of TS
interrupts is the same as a6xx, so I have a pretty good idea of what the
a5xx events are. I also fixed a few related things along the way:

- VIZQUERY_END overlaps with WT_DONE_TS, but VIZQUERY_START was also a
mess, with neither VIZQUERY_START nor HLSQ_FLUSH using variants. I added
what seems like reasonable variants, based on the existing comment
and the fact that HLSQ_FLUSH is only used in Mesa with a3xx and a4xx.
- CACHE_FLUSH_AND_INVALIDATE seems to come straight from R600, and I
have no idea if it's actually valid with a2xx, but given that RB_DONE_TS
exists in the interrupt mask since a3xx, I guessed that RB_DONE_TS
hasn't changed position since then and put it down as a3xx+ and limited
CACHE_FLUSH_AND_INVALIDATE to a2xx. Someone with the relevant hardware
should be able to confirm.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4065>
2020-04-02 16:18:25 +00:00
Roland Scheidegger
2077421437 gallivm: fix stream id fetch
Fetching the stream id directly can crash since bld->immediates may not
exist (if there's too many immediates or we use the array due to indirect
accesses). So just call emit_fetch_immediate instead.

v2: fix the swizzle

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416>
2020-04-02 15:53:23 +00:00
Roland Scheidegger
0a3a880670 gallivm: switch the mask6/mask7 cases for signed rgtc formats
This fixes some regressions where -1.0/1.0 results got flipped, but it's still
broken in some cases.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416>
2020-04-02 15:53:23 +00:00
Roland Scheidegger
ebb5b88a02 gallivm: fix rgtc2 format
In some cases, there can be garbage in the upper bits after the channel
decode - for dxt5 this didn't matter (as the upper bits are shifted out
anyway) but for rgtc2 formats it does.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416>
2020-04-02 15:53:23 +00:00
Jason Ekstrand
5cc27d59a1 anv/image: Use align_u64 for image offsets
The ALIGN functions in util/u_math.h work on uintptr_t whose size
changes depending on your platform.  Use ones which take an explicit
64-bit type instead to avoid 32-bit platform issues.

Cc: mesa-stable@lists.freedesktop.org
Reported-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4414>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4414>
2020-04-02 15:08:42 +00:00
Adam Jackson
4e3a7dcf6e gallium: enable EGL_EXT_image_dma_buf_import_modifiers unconditionally
This is a re-do of [1].

Enable EGL_EXT_image_dma_buf_import_modifiers with
EXT_image_dma_buf_import. This allows users to use queryDmaBufFormats to
query the list of supported formats even if modifiers are not supported.

With this change, queryDmaBufModifiers always returns zero modifiers. A
compositor survey reveals that this should be fine: wlroots [2],
Weston [3], Mutter [4] [5], kwin [6] and xorg-xserver [7] seem to all
support this case gracefully.

Tested with Sway and wlroots by running weston-info and checking the
list of formats advertised by zwp_linux_dmabuf_v1. Also ran weston-simple-egl
and checked zwp_linux_dmabuf_v1 was used instead of wl_drm.

[1]: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1812
[2]: 8707a9b7ec/render/egl.c (L629)
[3]: 786490cb53/libweston/renderer-gl/gl-renderer.c (L2337)
[4]: f0df07cba3/src/wayland/meta-wayland-dma-buf.c (L486)
[5]: 0a6034ef3a/src/backends/native/meta-renderer-native.c (L399)
[6]: https://cgit.kde.org/kwin.git/tree/platformsupport/scenes/opengl/egl_dmabuf.cpp?id=9b7ab4d16a8ee0cb35108362ee5aa046f4ae20b7#n473
[7]: 26004df63c/glamor/glamor_egl.c (L682)

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4298>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4298>
2020-04-02 14:22:58 +00:00
Marek Olšák
e0aa203fa9 driconf: whilelist more games for glthread
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4402>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4402>
2020-04-02 09:55:57 -04:00
Rohan Garg
d0f836e5ae tracie: Switch to using shutil.move for cross filesystem moves
When running tracie in a docker container, renaming files from
inside the container to a bind-mounted folder on the host causes
a invalid cross-device link due to os.rename limitations.

Switching to shutil allows us to overcome this.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4377>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4377>
2020-04-02 10:53:05 +00:00
Erik Faye-Lund
7b7dbd4fc8 wgl: do not create screen from DllMain
There's a lot of operations that aren't allowed from DllMain, so we
shouldn't create a driver-screen from there. So let's instead delay this
until it's needed from a normal function call.

See https://docs.microsoft.com/en-us/windows/win32/dlls/dllmain for
details about what is allowed and isn't from DllMain.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307>
2020-04-02 09:51:58 +00:00
Erik Faye-Lund
99a0864b48 wgl: move screen-init to a helper
This will be useful in the next commit.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307>
2020-04-02 09:51:58 +00:00
Erik Faye-Lund
098d4cf25f wgl: drop unused member
While we're at it, drop trying to re-calculate the max-size from the
max-level. It's not accurate on any drivers where the max-size isn't a
power of two anyway.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307>
2020-04-02 09:51:58 +00:00
Erik Faye-Lund
0a8da6102d wgl: drop pointless debug_printf
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307>
2020-04-02 09:51:58 +00:00
Pierre-Eric Pelloux-Prayer
dbc86fa3de radeonsi: dump shader stats when hitting the live cache
With the introduction of the live shader cache, when a shader is
fetched from the cache no stats are printed for shaderdb.
So in a sequence like this: vs1, fs1, vs1, fs2, shaderdb may see
3 or 4 lines, depending on the threads being used.
If one run produces 3 lines while the other produces 4 lines, it
would compare vs1 stats with fs2 stats.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4355>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4355>
2020-04-02 08:31:37 +02:00
Pierre-Eric Pelloux-Prayer
8306c533fe gallium/util: let shader live cache users know if a hit occured
This will be used in next commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4355>
2020-04-02 08:31:37 +02:00
Timothy Arceri
d259768e62 glsl_to_nir: remove dead code
This code was made unused by the changes described in be2990d8fb.

NIR based Gallium drivers switched to the NIR based lowering in
efa4fc0ebd.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4415>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4415>
2020-04-02 04:49:10 +00:00
Juan A. Suarez Romero
191ced539a anv/pipeline: allow more than 16 FS inputs
A fragment shader can have more than 16 inputs, so SBE emission should
deal with all of them.

This fixes dEQP-VK.pipeline.max_varyings.*

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2010>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2010>
2020-04-01 23:36:28 +00:00
Juan A. Suarez Romero
460de2159e intel/compiler: store the FS inputs in WM prog data
Store the fragment shader inputs in the program data so we can use them
later when required without needing the NIR shader.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2010>
2020-04-01 23:36:28 +00:00
Juan A. Suarez Romero
67c7cabd7f anv: use urb_setup_attribs in SBE
Avoid looping over all VARYING_SLOT_MAX urb_setup arrray entries.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2010>
2020-04-01 23:36:28 +00:00
Eric Engestrom
1ac9f362e0 docs: update calendar, add news item, and link releases notes for 20.0.3
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4413>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4413>
2020-04-02 00:06:57 +02:00
Eric Engestrom
a264edd74c docs/relnotes: add sha256sum for 20.0.3
(cherry picked from commit a680481532)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4413>
2020-04-02 00:04:10 +02:00
Eric Engestrom
2e01090b54 docs: add release notes for 20.0.3
(cherry picked from commit b04ae1f964)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4413>
2020-04-02 00:04:10 +02:00
Dave Airlie
2a2fd4c530 gallium/llvmpipe: add an optimised 32-bit memset
This might have other users beyond filling/clearing buffers,

increase a fullscreen 4k gears from 68->74 fps on my Ryzen
since gears is really just a clear benchmark, and this helps
clearing.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4394>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4394>
2020-04-01 20:58:23 +00:00
Mark Janes
c07bbdbe82 nir: place aligned members after bitfields in shader_info.tess
The placement of new shader_info.tess members unnecessarily wastes
space by interspersing 64bit members between bitfields.

Fixes: f1dd81ae10 ("nir: Collect if shader uses cross-invocation or indirect I/O.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4408>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4408>
2020-04-01 20:25:55 +00:00
Mark Janes
90a8b458ac nir: check shader type before writing to shaderinfo.tess union
If the shader is not a tesselation shader, then writing to the tess
member of the shaderinfo union will overwrite other members and crash.

Closes: #2722
Fixes: f1dd81ae10 ("nir: Collect if shader uses cross-invocation or indirect I/O.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4408>
2020-04-01 20:25:55 +00:00
Danylo Piliaiev
e47bf7dadf anv: Do not sample from 3d depth image with HiZ
For Gen8-11, there are some restrictions around sampling from HiZ.
The Skylake PRM docs for RENDER_SURFACE_STATE::AuxiliarySurfaceMode
say:

    "If this field is set to AUX_HIZ, Number of Multisamples must
    be MULTISAMPLECOUNT_1, and Surface Type cannot be SURFTYPE_3D."

Fixes: dEQP-VK.geometry.layered.3d.*.readback

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2720
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Arcady Goldmints-Orlov <agoldmints@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4409>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4409>
2020-04-01 20:12:29 +00:00
Krzysztof Raszkowski
0487130d34 gallium/swr: Re-enable scratch space for client-memory buffers
Commit 7d33203b44 fixed race condition
in freeing scratch memory mechanism but that approach creates
performance regression in some cases. This change revert previous
changes and fix freeing scratch memory mechanism.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4406>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4406>
2020-04-01 20:00:06 +00:00
Krzysztof Raszkowski
37b8130bf9 gallium/swr: Fix array stride problem.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4405>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4405>
2020-04-01 19:43:50 +00:00
Eric Anholt
c1e7e83d52 ci: Consistently use -j4 across x86 build jobs and -j8 on ARM.
Our shared runners are set up for concurrent jobs ~= CPUs / 4 (x86) or 8
(ARM).  If you use more build processes than that, then jobs may be
fighting each other for shared system resources, possibly to the point of
failure (we've seen one of the runners OOM on some jobs before, though I'm
not sure if this was the cause).

To try to systematically prevent the problem, we make a ninja wrapper in
the containers that passes the -j flags, and set MAKEFLAGS in the
container builds.  This doesn't cover make in non-container builds, but I
believe we don't have any of those.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3782>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3782>
2020-04-01 18:33:58 +00:00
Samuel Pitoiset
2f424c83e0 aco: only break SMEM clauses if XNACK is enabled (mostly APUs)
According to LLVM, it seems only required for APUs like RAVEN, but
we still ensure that SMEM stores are in their own clause.

pipeline-db (VEGA10):
Totals from affected shaders:
SGPRS: 1775364 -> 1775364 (0.00 %)
VGPRS: 1287176 -> 1287176 (0.00 %)
Spilled SGPRs: 725 -> 725 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 65386620 -> 65107460 (-0.43 %) bytes
Max Waves: 287099 -> 287099 (0.00 %)

pipeline-db (POLARIS10):
Totals from affected shaders:
SGPRS: 1797743 -> 1797743 (0.00 %)
VGPRS: 1271108 -> 1271108 (0.00 %)
Spilled SGPRs: 730 -> 730 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 64046244 -> 63782324 (-0.41 %) bytes
Max Waves: 254875 -> 254875 (0.00 %)

This only affects GFX6-GFX9 chips because the compiler uses a
different pass for GFX10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4349>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4349>
2020-04-01 17:50:31 +00:00
Jason Ekstrand
68f325b256 Revert "spirv: Implement OpCopyObject and OpCopyLogical as blind copies"
This reverts commit 7a53e67816.
2020-04-01 12:40:34 -05:00
Emil Velikov
91478db20d loader: fallback to kernel name, if PCI fails
Currently, if the PCI machinery fails, we return a NULL driver name.
In the past this has resulted in various workarounds.

To avoid those, fallback to loader_get_kernel_driver_name(). It's not
perfect, yet perfectly reasonable.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:57:22 +01:00
Emil Velikov
bf1838838a loader: move "using driver..." message to loader_get_kernel_driver_name
Move the message to the function which fetches the name.

While here use the same DEBUG/WARNING approach like in the PCI case. The
current method spam a tad much, plus isn't consistent.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:57:22 +01:00
Emil Velikov
e3572f977f loader: simplify codeflow in drm_get_pci_id_for_fd
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:57:22 +01:00
Emil Velikov
164f4a9a4a loader: simplify loader_get_user_preferred_fd()
Reoder the function a bit to make the code-flow more obvious and short.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:57:22 +01:00
Emil Velikov
25b2b32588 loader: use a maximum of 64 drmDevices
Currently that's the hard-coded maximum in the kernel, even though the
libdrm API allows for more. Latter is done with extendability in mind.

Allocate 64 pointers^Wdevices on stack for now. Making for shorter and
ever-so-slightly faster code.

v2: Use single MAX_DRM_DEVICES #define (Eric)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com> (v1)
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:57:22 +01:00
Emil Velikov
d3c9143971 Revert "egl/dri2: Don't dlclose() the driver on dri2_load_driver_common failure"
This reverts commit 1b87f4058d.

dlclose() of the handle is perfectly reasonable, a follow-up NULL
assignment is missing.

As-is this causes a leak for nearly every platform, since they call
dri2_load_driver* initially, followed by a second swrast fallback call.

Some platforms even loop through the existing drivers probing.

Revert the commit and add the NULL check.

Fixes: 1b87f4058d ("egl/dri2: Don't dlclose() the driver on dri2_load_driver_common failure")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:24:19 +01:00
Emil Velikov
fa5e800e05 egl/drm: reinstate (kms_)swrast support
With earlier commit we've added a generic LIBGL_ALWAYS_SOFTWARE handling
yet did not consider that the existing codebase unconditionally errors
out when set. That was fixed with a latter commit, while the fix itself
added erroneous restriction for egl/drm.

As mentioned in the report - the feature was working for ages. It was a
Gnome developer who added kms_swrast support for gbm in the first place.

Admittedly kms_swrast is somewhat in the middle between traditional
swrast and HW drivers, regardless - reinstate support.

Fixes: 47273d7312 ("egl: set UseFallback if LIBGL_ALWAYS_SOFTWARE is set")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/165
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:21:36 +01:00
Emil Velikov
b699d070a6 glx: set the loader_logger early and for everyone
Currently we set the logger only for DRI3. Even though it's used nearly
everywhere. For platforms where we don't the function is effectively a
no-op.

With this in place, LIBGL_DEBUG=verbose works across the board.

Fixes: d971a4230d ("loader: Factor out the common driver opening logic from each loader.")
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:21:32 +01:00
Emil Velikov
06f758b093 meson: glx: drop with_glx == dri check
We can get into src/glx only with with_glx == dri. Thus there's no point
in the secondary, nested, check - it's always true.

Cc: Dylan Baker <dylan@pnwbakers>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:21:28 +01:00
Erik Faye-Lund
70ac7f5b0c mesa/main: remove unused macro
This macro is no longer used, so let's get rid of it.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
9ddd9d454c mesa/main: clean up extension-check for GL_TEXTURE_EXTERNAL
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
dd6b35c99e mesa/main: clean up extension-check for GL_RASTERIZER_DISCARD
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
0006dfbaed mesa/main: clean up extension-check for GL_TEXTURE_CUBE_MAP_SEAMLESS
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
994675b24d mesa/main: clean up extension-check for GL_FRAGMENT_SHADER_ATI
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
541708680f mesa/main: clean up extension-check for AMD_depth_clamp_separate
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
e2dbd31dc0 mesa/main: clean up extension-check for GL_DEPTH_BOUNDS_TEST
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
67a7022f83 mesa/main: clean up extension-check for GL_STENCIL_TEST_TWO_SIDE
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
421a1accf0 mesa/main: clean up extension-check for GL_TEXTURE_RECTANGLE
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
81d901aef1 mesa/main: clean up extension-check for GL_VERTEX_PROGRAM_POINT_SIZE
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
a5e781aa80 mesa/main: clean up extension-check for GL_VERTEX_PROGRAM_TWO_SIDE
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
12e228fc9c mesa/main: clean up extension-check for GL_VERTEX_PROGRAM
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
23570066bf mesa/main: clean-up extension-checks for point-sprites
This is the only user of the CHECK_EXTENSION2 macro, so let's remove
that while we're at it.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
70b6972140 mesa/main: correct extension-checks for GL_BLACKHOLE_RENDER_INTEL
KHR_blend_equation_advanced_coherent isn't exposed on OpenGL ES 1.x
nor OpenGL versions prior to 30, so we shouldn't allow to query its
enum-states there either.

Fixes: 74ec39f66d ("mesa: add INTEL_blackhole_render")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:43 +02:00
Eric Anholt
1e3b74ee73 loader: Warn when we fail to open a device node due to permissions.
This is definitely not the first time I've debugged why I'm getting swrast
on a device only to find out I'm not a member of the render node's group.

This does mean that you'll get a warning print even without EGL_LOG_LEVEL
set.  This may be an issue if we expect people outside of the DRI node's
group to actually be using swrast instead of getting their permissions
fixed.  Right now surfaceless throws a "libEGL warning: No hardware driver
found, falling back to software rendering" in that case anyway, so this is
just more informative.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3703>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3703>
2020-04-01 09:32:25 +00:00
Thomas Hellstrom
15a9f6c072 svga: Treat forced coherent maps as maps of persistent memory
A previous commit made sure we sent a BindGBSurface command at map time
rather than at unmap time for persistent memory. To be consistent, do the
same for forced coherent maps. This makes it possible to avoid the
explicit UpdateGBSurface at unmap time for discard maps and to instead rely
on the kernel's dirty-tracking mechanism at the cost of an additional flush.

Tested with SVGA_FORCE_COHERENT=1, piglit run quick. No regressions.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4399>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4399>
2020-04-01 08:58:28 +02:00
Thomas Hellstrom
46fdc288fb svga, winsys/svga: Fix persistent memory discard maps
The kernel driver requires immediate notification using a
BindGBSurface command when a graphics coherent memory resource changes
backing MOB, so that it can start dirty-tracking the new MOB.
Since we always use graphics coherent memory for persistent memory, enqueue
and flush a BindGBSurface commmand at map time rather than at unmap time.
Since we're dealing with persistent memory, It's OK to flush while mapped.

This fixes an issue with gnome-shell / Wayland which uses persistent
memory together with discard maps when we advertise ARB_buffer_storage.
XWayland clients will render incorrectly.

Fixes: 71b43490dd ("svga: Support ARB_buffer_storage")
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4399>
2020-04-01 08:38:04 +02:00
Alyssa Rosenzweig
1b16d6354b pan/bi: Fix outmod/roundmode flip
I misread the disassembler, the fields are in the other order.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
12cf9f43f0 pan/bi: Handle fmov class ops
We need to lower them to something reasonable (ideally, the modifier
would be attached but we need to do something for the case it's not). We
specifically have to lower pre-sched as well, but we can do the lower
literally at schedule time for now (if this proves annoying, we can move
it earlier, but I want to leave room for modifier-aware copyprop should
that prove interesting).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
357b8b5906 pan/bi: Fix unused port swapping
Fixes INSTR_INVALID_ENC

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
b150fa214b pan/bi: Add cmdline option for verbose disassembly
Useful for debugging packing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
ae4f48b2bc pan/bi: Don't set the back-to-back bit yet
This is bad for performance but we can't assume it's true without some
analysis, which we presently don't do. Leave it for future work and
don't break the present.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
0b241c70b6 pan/bi: Use STAGE srcs for scheduler nops
..rather than using port 0 for the source, which may or may not actually
exist.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
2292e2aa10 pan/bi: Fix writes_component for VECTOR
I'm not convinced this is the best way and it's sort of a hack, but it
fixes RA for st_vary.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
b033189dd7 pan/bit: Wire through I/O
We'd like to wire in attributes and uniforms as inputs and look at the
varying as output for automatic testing on-device, building up a test
framework for us.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
b26214e907 pan/bit: Add run mode to the cmdline
This emulates the functionality of shader_runner (built for kbase) using
the bifrost testing infrastructure so it runs on mainline. Ideally this
will let us test shaders from the assembler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Jose Fonseca
cb56d5d9f8 appveyor: Remove Meson job.
Appveyor Meson fails misteriously some times, e.g.,
- https://ci.appveyor.com/project/mesa3d/mesa/builds/31780753/job/w8b28iahboxq4na2
- https://ci.appveyor.com/project/mesa3d/mesa/builds/31857376
and now that we have msvc coverage on gitlab ci this is no longer necessary.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4392>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4392>
2020-04-01 01:13:21 +00:00
Rob Clark
59754409cc freedreno/log: fix build error
It seems some versions of gcc are less clever about const initializers:

```
../src/gallium/drivers/freedreno/freedreno_log.c:58:33: error: initializer element is not constant
 const unsigned msgs_per_chunk = bo_size / sizeof(uint64_t);
                                 ^~~~~~~
```

See https://gitlab.freedesktop.org/mesa/mesa/-/issues/2713

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4390>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4390>
2020-04-01 00:51:09 +00:00
Ian Romanick
b097e326b8 nir/algebraic: Remove a redundant fabs pattern
Made redundant by 5544b2cbbd ("nir/algebraic: Use value range analysis
to eliminate useless unary ops").

No shader-db changes on any Intel platform.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
2020-04-01 00:28:38 +00:00
Ian Romanick
af1bc7e0c7 nir/algebraic: Use value range analysis to convert fmax to fsat
This is conceptually similar to the 1-fsat(a) <=> fsat(1-a) rearragement
done in:

3b74790941 ("nir/algebraic: Recognize open-coded flrp(a, b, fsat(c))")

2d259713b7 ("nir/algebraic: Commute 1-fsat(a) to fsat(1-a) for all
non-fmul instructions").

Note: this helps the Aztex Ruins shader that was hurt for spills and
fills on Braodwell in the previous commit, but it does not fix the
spills or fills. :(

All Intel platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 14528985 -> 14526116 (-0.02%)
instructions in affected programs: 477300 -> 474431 (-0.60%)
helped: 2332
HURT: 0
helped stats (abs) min: 1 max: 18 x̄: 1.23 x̃: 1
helped stats (rel) min: 0.07% max: 8.89% x̄: 0.88% x̃: 0.64%
95% mean confidence interval for instructions value: -1.27 -1.19
95% mean confidence interval for instructions %-change: -0.92% -0.85%
Instructions are helped.

total cycles in shared programs: 203723684 -> 203692984 (-0.02%)
cycles in affected programs: 4878847 -> 4848147 (-0.63%)
helped: 1764
HURT: 324
helped stats (abs) min: 1 max: 706 x̄: 22.94 x̃: 17
helped stats (rel) min: <.01% max: 17.75% x̄: 1.94% x̃: 1.66%
HURT stats (abs)   min: 1 max: 400 x̄: 30.15 x̃: 10
HURT stats (rel)   min: <.01% max: 17.76% x̄: 1.91% x̃: 0.69%
95% mean confidence interval for cycles value: -16.55 -12.86
95% mean confidence interval for cycles %-change: -1.44% -1.24%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
2020-04-01 00:28:38 +00:00
Ian Romanick
62795475e8 nir/algebraic: Distribute source modifiers into instructions
There are three main classes of cases that are helped by this change:

1. When the negation is applied to a value being type converted (e.g.,
   float(-x)).  This could possibly also be handled with more clever
   code generation.

2. When the negation is applied to a phi node source (e.g., x = -(...);
   at the end of a basic block).  This was the original case that caught
   my attention while looking at shader-db dumps.

3. When the negation is applied to the source of an instruction that
   cannot have source modifiers.  This includes texture instructions and
   math box instructions on pre-Gen7 platforms (see more details below).

In many these cases the negation can be propagated into the instructions
that generate the value (e.g., -(a*b) = (-a)*b).

In addition to the operations implemtned in this patch, I also tried:

 - frcp - Helped 6 or fewer shaders on Gen7+, and hurt just as many on
   pre-Gen7.  On Gen6 and earlier, frcp is a math box instruction, and
   math box instructions cannot have source modifiers.

   I suspect this is why so many more shaders are helped on Gen6 than on
   Gen5 or Gen7.  Gen6 supports OpenGL 3.3, so a lot more shaders
   compile on it.  A lot of these shaders may have things like cos(-x)
   or rcp(-x) that could result in an explicit negation instruction.

 - bcsel - Hurt a few shaders with none helped.  bcsel operates on
   integer sources, so the fabs or fneg cannot be a source modifier in
   the bcsel itself.

 - Integer instructions - No changes on any Intel platform.

Some notes about the shader-db results below.

 - On Tiger Lake, a single Deus Ex fragment shader is hurt for both
   spills and fills.

 - On Haswell, a different Deus Ex fragment shader is hurt for both
   spills and fills.

 - On GM45, the "LOST: 1" and "GAINED: 1" is a single Left4Dead 2
   (very high graphics settings, lol) fragment shader that upgrades
   from SIMD8 to SIMD16.

v2: Add support for fsign.  Add some patterns that remove redundant
negations and redundant absolute value rather than trying to push them
down the tree.

Tiger Lake
total instructions in shared programs: 17611333 -> 17586465 (-0.14%)
instructions in affected programs: 3033734 -> 3008866 (-0.82%)
helped: 10310
HURT: 632
helped stats (abs) min: 1 max: 35 x̄: 2.61 x̃: 1
helped stats (rel) min: 0.04% max: 16.67% x̄: 1.43% x̃: 1.01%
HURT stats (abs)   min: 1 max: 47 x̄: 3.21 x̃: 2
HURT stats (rel)   min: 0.04% max: 5.08% x̄: 0.88% x̃: 0.63%
95% mean confidence interval for instructions value: -2.33 -2.21
95% mean confidence interval for instructions %-change: -1.32% -1.27%
Instructions are helped.

total cycles in shared programs: 338365223 -> 338262252 (-0.03%)
cycles in affected programs: 125291811 -> 125188840 (-0.08%)
helped: 5224
HURT: 2031
helped stats (abs) min: 1 max: 5670 x̄: 46.73 x̃: 12
helped stats (rel) min: <.01% max: 34.78% x̄: 1.91% x̃: 0.97%
HURT stats (abs)   min: 1 max: 2882 x̄: 69.50 x̃: 14
HURT stats (rel)   min: <.01% max: 44.93% x̄: 2.35% x̃: 0.74%
95% mean confidence interval for cycles value: -18.71 -9.68
95% mean confidence interval for cycles %-change: -0.80% -0.63%
Cycles are helped.

total spills in shared programs: 8942 -> 8946 (0.04%)
spills in affected programs: 8 -> 12 (50.00%)
helped: 0
HURT: 1

total fills in shared programs: 9399 -> 9401 (0.02%)
fills in affected programs: 21 -> 23 (9.52%)
helped: 0
HURT: 1

Ice Lake
total instructions in shared programs: 16124348 -> 16102258 (-0.14%)
instructions in affected programs: 2830928 -> 2808838 (-0.78%)
helped: 11294
HURT: 2
helped stats (abs) min: 1 max: 12 x̄: 1.96 x̃: 1
helped stats (rel) min: 0.07% max: 17.65% x̄: 1.32% x̃: 0.93%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 3.45% max: 4.00% x̄: 3.72% x̃: 3.72%
95% mean confidence interval for instructions value: -1.99 -1.93
95% mean confidence interval for instructions %-change: -1.34% -1.29%
Instructions are helped.

total cycles in shared programs: 335393932 -> 335325794 (-0.02%)
cycles in affected programs: 123834609 -> 123766471 (-0.06%)
helped: 5034
HURT: 2128
helped stats (abs) min: 1 max: 3256 x̄: 43.39 x̃: 11
helped stats (rel) min: <.01% max: 35.79% x̄: 1.98% x̃: 1.00%
HURT stats (abs)   min: 1 max: 2634 x̄: 70.63 x̃: 16
HURT stats (rel)   min: <.01% max: 49.49% x̄: 2.73% x̃: 0.62%
95% mean confidence interval for cycles value: -13.66 -5.37
95% mean confidence interval for cycles %-change: -0.69% -0.48%
Cycles are helped.

LOST:   0
GAINED: 2

Skylake
total instructions in shared programs: 14949240 -> 14927930 (-0.14%)
instructions in affected programs: 2594756 -> 2573446 (-0.82%)
helped: 11000
HURT: 2
helped stats (abs) min: 1 max: 12 x̄: 1.94 x̃: 1
helped stats (rel) min: 0.07% max: 18.75% x̄: 1.39% x̃: 0.94%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 4.76% max: 4.76% x̄: 4.76% x̃: 4.76%
95% mean confidence interval for instructions value: -1.97 -1.91
95% mean confidence interval for instructions %-change: -1.42% -1.37%
Instructions are helped.

total cycles in shared programs: 324829346 -> 324821596 (<.01%)
cycles in affected programs: 121566087 -> 121558337 (<.01%)
helped: 4611
HURT: 2147
helped stats (abs) min: 1 max: 3715 x̄: 33.29 x̃: 10
helped stats (rel) min: <.01% max: 36.08% x̄: 1.94% x̃: 1.00%
HURT stats (abs)   min: 1 max: 2551 x̄: 67.88 x̃: 16
HURT stats (rel)   min: <.01% max: 53.79% x̄: 3.69% x̃: 0.89%
95% mean confidence interval for cycles value: -4.25 1.96
95% mean confidence interval for cycles %-change: -0.28% -0.02%
Inconclusive result (value mean confidence interval includes 0).

Broadwell
total instructions in shared programs: 14971203 -> 14949957 (-0.14%)
instructions in affected programs: 2635699 -> 2614453 (-0.81%)
helped: 10982
HURT: 2
helped stats (abs) min: 1 max: 12 x̄: 1.93 x̃: 1
helped stats (rel) min: 0.07% max: 18.75% x̄: 1.39% x̃: 0.94%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 4.76% max: 4.76% x̄: 4.76% x̃: 4.76%
95% mean confidence interval for instructions value: -1.97 -1.90
95% mean confidence interval for instructions %-change: -1.42% -1.37%
Instructions are helped.

total cycles in shared programs: 336215033 -> 336086458 (-0.04%)
cycles in affected programs: 127383198 -> 127254623 (-0.10%)
helped: 4884
HURT: 1963
helped stats (abs) min: 1 max: 25696 x̄: 51.78 x̃: 12
helped stats (rel) min: <.01% max: 58.28% x̄: 2.00% x̃: 1.05%
HURT stats (abs)   min: 1 max: 3401 x̄: 63.33 x̃: 16
HURT stats (rel)   min: <.01% max: 39.95% x̄: 2.20% x̃: 0.70%
95% mean confidence interval for cycles value: -29.99 -7.57
95% mean confidence interval for cycles %-change: -0.89% -0.71%
Cycles are helped.

total fills in shared programs: 24905 -> 24901 (-0.02%)
fills in affected programs: 117 -> 113 (-3.42%)
helped: 4
HURT: 0

LOST:   0
GAINED: 16

Haswell
total instructions in shared programs: 13148927 -> 13131528 (-0.13%)
instructions in affected programs: 2220941 -> 2203542 (-0.78%)
helped: 8017
HURT: 4
helped stats (abs) min: 1 max: 12 x̄: 2.17 x̃: 1
helped stats (rel) min: 0.07% max: 15.25% x̄: 1.40% x̃: 0.93%
HURT stats (abs)   min: 1 max: 7 x̄: 2.50 x̃: 1
HURT stats (rel)   min: 0.33% max: 4.76% x̄: 2.73% x̃: 2.91%
95% mean confidence interval for instructions value: -2.21 -2.13
95% mean confidence interval for instructions %-change: -1.43% -1.37%
Instructions are helped.

total cycles in shared programs: 321221791 -> 321079870 (-0.04%)
cycles in affected programs: 126886055 -> 126744134 (-0.11%)
helped: 4674
HURT: 1729
helped stats (abs) min: 1 max: 23654 x̄: 56.47 x̃: 16
helped stats (rel) min: <.01% max: 53.22% x̄: 2.13% x̃: 1.05%
HURT stats (abs)   min: 1 max: 3694 x̄: 70.58 x̃: 18
HURT stats (rel)   min: <.01% max: 63.06% x̄: 2.48% x̃: 0.90%
95% mean confidence interval for cycles value: -33.31 -11.02
95% mean confidence interval for cycles %-change: -0.99% -0.78%
Cycles are helped.

total spills in shared programs: 19872 -> 19874 (0.01%)
spills in affected programs: 21 -> 23 (9.52%)
helped: 0
HURT: 1

total fills in shared programs: 20941 -> 20941 (0.00%)
fills in affected programs: 62 -> 62 (0.00%)
helped: 1
HURT: 1

LOST:   0
GAINED: 8

Ivy Bridge
total instructions in shared programs: 11875553 -> 11853839 (-0.18%)
instructions in affected programs: 1553112 -> 1531398 (-1.40%)
helped: 7304
HURT: 3
helped stats (abs) min: 1 max: 16 x̄: 2.97 x̃: 2
helped stats (rel) min: 0.07% max: 15.25% x̄: 1.62% x̃: 1.15%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 1.05% max: 3.33% x̄: 2.44% x̃: 2.94%
95% mean confidence interval for instructions value: -3.04 -2.90
95% mean confidence interval for instructions %-change: -1.65% -1.59%
Instructions are helped.

total cycles in shared programs: 178246425 -> 178184484 (-0.03%)
cycles in affected programs: 13702146 -> 13640205 (-0.45%)
helped: 4409
HURT: 1566
helped stats (abs) min: 1 max: 531 x̄: 24.52 x̃: 13
helped stats (rel) min: <.01% max: 38.67% x̄: 2.14% x̃: 1.02%
HURT stats (abs)   min: 1 max: 356 x̄: 29.48 x̃: 10
HURT stats (rel)   min: <.01% max: 64.73% x̄: 1.87% x̃: 0.70%
95% mean confidence interval for cycles value: -11.60 -9.14
95% mean confidence interval for cycles %-change: -1.19% -0.99%
Cycles are helped.

LOST:   0
GAINED: 10

Sandy Bridge
total instructions in shared programs: 10695740 -> 10667483 (-0.26%)
instructions in affected programs: 2337607 -> 2309350 (-1.21%)
helped: 10720
HURT: 1
helped stats (abs) min: 1 max: 49 x̄: 2.64 x̃: 2
helped stats (rel) min: 0.07% max: 20.00% x̄: 1.54% x̃: 1.13%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 1.04% max: 1.04% x̄: 1.04% x̃: 1.04%
95% mean confidence interval for instructions value: -2.69 -2.58
95% mean confidence interval for instructions %-change: -1.57% -1.51%
Instructions are helped.

total cycles in shared programs: 153478839 -> 153416223 (-0.04%)
cycles in affected programs: 22050900 -> 21988284 (-0.28%)
helped: 5342
HURT: 2200
helped stats (abs) min: 1 max: 1020 x̄: 20.34 x̃: 16
helped stats (rel) min: <.01% max: 24.05% x̄: 1.51% x̃: 0.86%
HURT stats (abs)   min: 1 max: 335 x̄: 20.93 x̃: 6
HURT stats (rel)   min: <.01% max: 20.18% x̄: 1.03% x̃: 0.30%
95% mean confidence interval for cycles value: -9.18 -7.42
95% mean confidence interval for cycles %-change: -0.82% -0.71%
Cycles are helped.

Iron Lake
total instructions in shared programs: 8114882 -> 8105574 (-0.11%)
instructions in affected programs: 1232504 -> 1223196 (-0.76%)
helped: 4109
HURT: 2
helped stats (abs) min: 1 max: 6 x̄: 2.27 x̃: 1
helped stats (rel) min: 0.05% max: 8.33% x̄: 0.99% x̃: 0.66%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.94% max: 4.35% x̄: 2.65% x̃: 2.65%
95% mean confidence interval for instructions value: -2.31 -2.21
95% mean confidence interval for instructions %-change: -1.01% -0.96%
Instructions are helped.

total cycles in shared programs: 188504036 -> 188466296 (-0.02%)
cycles in affected programs: 31203798 -> 31166058 (-0.12%)
helped: 3447
HURT: 36
helped stats (abs) min: 2 max: 92 x̄: 11.03 x̃: 8
helped stats (rel) min: <.01% max: 5.41% x̄: 0.21% x̃: 0.13%
HURT stats (abs)   min: 2 max: 30 x̄: 7.33 x̃: 6
HURT stats (rel)   min: 0.01% max: 1.65% x̄: 0.18% x̃: 0.10%
95% mean confidence interval for cycles value: -11.16 -10.51
95% mean confidence interval for cycles %-change: -0.22% -0.20%
Cycles are helped.

LOST:   0
GAINED: 1

GM45
total instructions in shared programs: 4989697 -> 4984531 (-0.10%)
instructions in affected programs: 703952 -> 698786 (-0.73%)
helped: 2493
HURT: 2
helped stats (abs) min: 1 max: 6 x̄: 2.07 x̃: 1
helped stats (rel) min: 0.05% max: 8.33% x̄: 1.03% x̃: 0.66%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.95% max: 4.35% x̄: 2.65% x̃: 2.65%
95% mean confidence interval for instructions value: -2.13 -2.01
95% mean confidence interval for instructions %-change: -1.07% -0.99%
Instructions are helped.

total cycles in shared programs: 128929136 -> 128903886 (-0.02%)
cycles in affected programs: 21583096 -> 21557846 (-0.12%)
helped: 2214
HURT: 17
helped stats (abs) min: 2 max: 92 x̄: 11.44 x̃: 8
helped stats (rel) min: <.01% max: 5.41% x̄: 0.24% x̃: 0.13%
HURT stats (abs)   min: 2 max: 8 x̄: 4.24 x̃: 4
HURT stats (rel)   min: 0.01% max: 1.65% x̄: 0.20% x̃: 0.09%
95% mean confidence interval for cycles value: -11.75 -10.88
95% mean confidence interval for cycles %-change: -0.25% -0.22%
Cycles are helped.

LOST:   1
GAINED: 1

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
2020-04-01 00:28:38 +00:00
Ian Romanick
c0bdf37c91 nir/algebraic: Change the default cursor location when replacing a unary op
If the expression tree that is being replaced has a unary operation at
its root, set the cursor (location where new instructions are inserted)
at the source instruction instead.

This doesn't do much now because there are very few patterns that have a
unary operation as the root.  Almost all of the patterns that do have a
unary operation as the root have inot.  All of the shaders that are
affected by this commit have expression trees with an inot at the root.

This change prevents some significant, spurious caused by the next
commit.  There is further explanation in the large comment added in
the code.

I also considered a couple other options that may still be worth exploring.

1. Add some mark-up to the search pattern to denote where new
   instructions should be added.  I considered using "@" to denote the
   cursor location.  For example,

    (('fneg', ('fadd@', a, b)), ...)

2. To prevent other kinds of unintended code motion, add the ability to
   name expressions in the search pattern so that they can be reused in
   the replacement.  For example,

   (('bcsel', ('ige', ('find_lsb=b', a), 0), ('find_lsb', a), -1), b),

   An alternative would be to add some kind of CSE at the time of
   inserting the replacements.  Create a new instruction, then check to
   see if it already exists.  That option might be better overall.

Over the years I know Matt has heard me complain, "I added a pattern
that just deleted an instruction, but it added a bunch of spills!"  This
was always in large, complex shaders that are very hard to analyze.  I
always blamed these cases on the scheduler being dumb.  I am now very
suspicious that unintended code motion was the real problem.

All Gen4+ Intel platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 17611405 -> 17611333 (<.01%)
instructions in affected programs: 18613 -> 18541 (-0.39%)
helped: 41
HURT: 13
helped stats (abs) min: 1 max: 18 x̄: 4.46 x̃: 4
helped stats (rel) min: 0.27% max: 5.68% x̄: 1.29% x̃: 1.34%
HURT stats (abs)   min: 1 max: 20 x̄: 8.54 x̃: 7
HURT stats (rel)   min: 0.30% max: 4.20% x̄: 2.15% x̃: 2.38%
95% mean confidence interval for instructions value: -3.29 0.63
95% mean confidence interval for instructions %-change: -0.95% 0.02%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 338366118 -> 338365223 (<.01%)
cycles in affected programs: 257889 -> 256994 (-0.35%)
helped: 42
HURT: 15
helped stats (abs) min: 2 max: 120 x̄: 39.38 x̃: 34
helped stats (rel) min: 0.04% max: 2.55% x̄: 0.86% x̃: 0.76%
HURT stats (abs)   min: 6 max: 204 x̄: 50.60 x̃: 34
HURT stats (rel)   min: 0.11% max: 4.75% x̄: 1.12% x̃: 0.56%
95% mean confidence interval for cycles value: -30.39 -1.02
95% mean confidence interval for cycles %-change: -0.66% -0.02%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
2020-04-01 00:28:38 +00:00
Ian Romanick
d2b4f3f137 intel/vec4: Allow late copy propagation on vec4
This change incurs a small amount of hurt now, but it enables a lot of
benefit on vec4 shaders on the next commit.  nir_opt_algebraic_late
converts dph, dot3, etc. to dhp_replicated, dot_replicated3, etc.  In
the process, it introduces extra moves.  If the original NIR contained

        vec1 32 ssa_45 = fdot4 ssa_51, ssa_44
        vec1 32 ssa_46 = fneg ssa_45

nir_opt_algebraic_late will produce

        vec4 32 ssa_18 = fdot_replicated4 ssa_1, ssa_15
        vec1 32 ssa_19 = mov ssa_18.x
        vec1 32 ssa_17 = fneg ssa_19

The algebraic pass added in the next commit can't see through the move
to know that the fneg applies to a fdot_replicated4.

Haswell, Ivy Bridge, and Sandybridge had similar results. (Haswell shown)
total cycles in shared programs: 187077604 -> 187079858 (<.01%)
cycles in affected programs: 350132 -> 352386 (0.64%)
helped: 174
HURT: 194
helped stats (abs) min: 2 max: 124 x̄: 23.60 x̃: 16
helped stats (rel) min: 0.12% max: 15.88% x̄: 4.98% x̃: 3.86%
HURT stats (abs)   min: 2 max: 164 x̄: 32.78 x̃: 16
HURT stats (rel)   min: 0.17% max: 22.82% x̄: 6.46% x̃: 0.86%
95% mean confidence interval for cycles value: 2.04 10.21
95% mean confidence interval for cycles %-change: 0.17% 1.93%
Cycles are HURT.

No shader-db changes on any other Intel platform.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
2020-04-01 00:28:38 +00:00
Timothy Arceri
0f4a81430e nir: fix crash in varying packing on interface mismatch
For example when the outputs are scalars but the inputs are struct
members.

Fixes: 26aa460940 ("nir: rewrite varying component packing")

Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4351>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4351>
2020-03-31 23:43:31 +00:00
Eric Anholt
31011c7a39 freedreno/turnip: Use the NIR info to decide if we need helper invocations.
We had an approximation that was assuming any ddx or tex instruction
needed helper invocations, but that's not true for texelFetch() or
textureSize().  It also meant that we were setting PIXLOD on vertex and
compute shaders doing texturing, which doesn't really make sense.

shader-db (with a hack to log pixlod):
total pixlod in shared programs: 582 -> 573 (-1.55%)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2681
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4308>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4308>
2020-03-31 22:29:22 +00:00
Eric Anholt
974b9c57c1 freedreno: Drop an unnecessary include marked "this should go away"
It came in with the initial import, and doesn't seem to be necessary any
more.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4289>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4289>
2020-03-31 21:20:11 +00:00
Rob Clark
127fa5d00c freedreno/ir3: fix android build
Fixes: e5339fe4a4 ("Move compiler.h and imports.h/c from src/mesa/main into src/util")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4381>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4381>
2020-03-31 18:46:04 +00:00
Rob Clark
ae7da1a017 util: move ALIGN/ROUND_DOWN_TO to u_math.h
These are less mesa specific than the rest of macros.h, and would be
nice to use outside of mesa.  Prep for next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4381>
2020-03-31 18:46:04 +00:00
Jason Ekstrand
7a53e67816 spirv: Implement OpCopyObject and OpCopyLogical as blind copies
Because the types etc. are required to logically match, we can just
copy-propagate the guts of the vtn_value.  This was causing issues with
some new CTS tests that are doing an OpCopyObject of a sampler which is
a special-cased type in spirv_to_nir.  Of course, this is only a partial
solution.  Ideally, we've got a bit of work to do to make all the
composite stuff able to handle all types including images, sampler, and
combined image/samplers but this gets some CTS tests passing.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4375>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4375>
2020-03-31 17:55:30 +00:00
Lionel Landwerlin
88c046a6d3 isl: don't warn in physical extent calculation for yuv formats
Those format have correct descriptions already with the exception of
the planar format. In that case we introduce an assert.

This fine because we don't use the planar format in any of our
drivers. There are restrictions on how the addresses of the 2 planes
are relative to one another which make this annoying. The sampler is
also more limited than what we can do with a shader snippet.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2999>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2999>
2020-03-31 15:59:21 +00:00
Lionel Landwerlin
015f08dd43 isl: set bpb for Y8_UNORM
This isn't a format we use in any of the drivers but for consistency
just give it a correct bpb.

We also set the luminance in the G channel. We can't actually use this
format with the 3D sampler (only media).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2999>
2020-03-31 15:59:21 +00:00
Eric Engestrom
5f4d9b419a scons: prune unused Makefile.sources
Fixes: 2e92d33819 ("scons: Prune out unnecessary targets.")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed by: Jose Fonseca <jfonseca@vmware.com>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4373>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4373>
2020-03-31 09:42:07 +00:00
Connor Abbott
d63acce5f4 tu: Return the correct alignment for images
The alignment field was never initialized, so we were just returning an
alignment of 0. Return the alignment from fdl, and while we're here
cleanup some leftovers in tu_private.h.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4357>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4357>
2020-03-31 08:22:58 +00:00
Connor Abbott
d84c206d85 freedreno/fdl: Add base_align
Tell users what the base address of the image needs to be aligned to.
These values are based on experimentation via passing an offset to
vkBindImageMemory with turnip and seeing if tests still pass. Note that
r8g8 is also special in this regard, however it actually has an
increased alignment (in bytes).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4357>
2020-03-31 08:22:58 +00:00
Jason Ekstrand
896a7c28eb anv/allocator: Use util_dynarray for blocks in anv_state_stream
When we originally wrote a bunch of the allocation data structures, we
re-used the GPU memory for CPU-side data structures.  It's a bit more
memory efficient and usually ok.  However, this has a couple of
problems:

 1. It makes it MUCH more likely that the GPU will accidentlly stomp
    CPU-side data structures and cause nearly impossible to debug
    crashes.

 2. With discrete GPUs, the memory will be mapped somehow and that map
    may be across the BAR so it could have horribly slow CPU access.
    This is bad for our CPU-side data structures.

In the case of anv_state_stream, it also made the data structure
massively more complex than it needed to be.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4336>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4336>
2020-03-31 08:12:07 +00:00
Jason Ekstrand
63bec07e14 anv: Account for the header in anv_state_stream_alloc
If we have an allocation that's exactly the block size, we end up
computing a new block size to allocate that's exactly the block size,
add in the header, and then assert fail.  When computing the block size,
we need to account for the header.

Fixes: 955127db93 "anv/allocator: Add support for large stream..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4336>
2020-03-31 08:12:07 +00:00
Marek Olšák
6e672074dd st/mesa: add environment variable pin_app_thread for faster glthread on AMD Zen
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4369>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4369>
2020-03-30 23:57:52 -04:00
Marek Olšák
4df3c7a207 gallium/u_threaded: call the driver to pin threads to L3 immediately
This is thread-safe and we want it to be done immediately for good L3 cache
usage.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4369>
2020-03-30 23:57:49 -04:00
Qiang Yu
4de35bed42 lima: also check tiled and depth case when import
We missed the tiled and depth case when check buffer alignment.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4362>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4362>
2020-03-31 01:40:29 +00:00
Qiang Yu
e46b2ef724 lima: fix buffer import with offset
With EGL_EXT_image_dma_buf_import, user can import dma_buf
with offset.

This is also used by AOSP GLConsumer::updateTexImage
with HAL_PIXEL_FORMAT_YV12 buffer which store YUV planes in
the same buffer with offset. Render sample from it using
GL_OES_EGL_image_external. This should fix some video
display problem when using MediaCodec soft decoding which
generates HAL_PIXEL_FORMAT_YV12 buffer and render it on
screen.

Test program:
https://github.com/yuq/gfx/tree/master/yuv2rgb/dma-buf

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4362>
2020-03-31 01:40:29 +00:00
Alyssa Rosenzweig
02ad147c5c pan/bi: Fix handling of constants with COMBINE
We should never see COMBINE constants explicitly since they'll become
moves anyway, so we can simplify that. On the other hand, we do need the
type information for the lowering to work properly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
bd19e76340 pan/bi: Handle fp16/abs scheduling restriction
See previous commit for the packing side. Here we update the scheduler
to accomodate this. Note we don't actually hit this path yet, but it's
good to be proactive.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
c88f816169 pan/bi: Handle abs packing for fp16/FMA add/min
It's seriously quirky, and all to save a single bit. Alas. It also
introduces an edge case for the scheduler which is a bit annoying.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
ba8e11f0f1 pan/bi: Handle core faddminmax16 packing
This works without the exception of absolute values, which have some...
odd properties to be handled in the next commit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
12a16f2247 pan/bi: Structify fadd/min/max16
There is some quirky encoding here.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
c12a208d78 pan/bi: Add v2f16 versions of rounding ops
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
f81b67b857 pan/bi: Handle round opcodes in frontend
These correspond to various ops routed through BI_ROUND

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
c7170e9742 pan/bi: Assert out i16 related converts for now
Needs more investigation, and GLSL doesn't use it quite yet sadly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
2fd8b2e6d4 pan/bi: Add one-source f32->f16 op
This really has a second op for vectorization but we don't handle this
quite yet...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
197c6414ea pan/bi: Add bifrost_fma_2src generic
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
57a8e6e8d0 pan/bi: Handle standard FMA conversions
These are plain old 1-sources so they're easy to start with.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
499e97b519 pan/bi: Enumerate conversions
There are lots of Bifrost conversion opcodes that can all be emitted
from BI_CONVERT, let's pattern match.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
902f99a45d pan/bi: Expand out FMA conversion opcodes
There are a *lot* of them, with lots of symmetry we can exploit to
simplify the packing logic (but not entirely). Let's add the
corresponding header structs/defines, although we don't actually poke
the disassembler at this stage.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
73715124ea pan/bi: Pack outmod and roundmode with FMA
The fields got missed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
158f2452f2 pan/bi: Add FMA16 packing
It's like the original FMA packing but with swizzles introduced.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
b5148b6b49 pan/bi: Fix missing type for fmul
We add a zero argument, we want it to align with the size of whatever
the other arguments were for optimization.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
5eb209a05f pan/bi: Finish FMA structures
There were some missing fields for the 32-bit case, and the 16-bit case
has separate packing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
375a7d0f32 pan/bi: Ignore swizzle in unwritten component
Otherwise we can trip the assert for no good reason.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
aa77d8128e pan/bi: Handle f2f* opcodes
Just more converts that got missed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
c2a8ef907b panfrost: Enable PIPE_SHADER_CAP_FP16 on Bifrost
We don't have fp16 implemented on Midgard yet but on Bifrost we can flip
it on now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
77e04eb2e2 pan/bi: Enable precision lowering in standalone compiler
..since there's no CAP to guide here.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
683cd9b6f4 pan/bi: Fix off-by-one in scoreboarding packing
Clauses actually encode the *next* clauses' dependencies.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
f3726a0874 pan/bi: Fix overzealous write barriers
It's possible this triggers an INSTR_INVALID_ENC.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
3d7166fa69 pan/bit: Begin generating a vertex job
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
a0d1be30e1 pan/bit: Submit a WRITE_VALUE job as a sanity check
If this fails, everything else probably will too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
97029c773e panfrost: Stub out G31/G52 quirks
There are none so far, but we'll need quirks accessible for Bifrost
specific details in the future, and in the mean time we need to handle
the cases somehow to avoid the unreachable(..)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
bf1929e479 pan/bit: Open up the device
As a start and a sanity check.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
39378eec57 panfrost: Move device open/close to root panfrost
We need it for standalone testing too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
fd18695a26 pan/bit: Link standalone compiler with en/decoder
We would like to submit jobs from the standalone compiler for testing
purposes, so let's get things wired up.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
0f65f00a0d panfrost: Move pan_bo to root panfrost
Now that its Gallium dependencies have been resolved, we can move this
all out to root. The only nontrivial change here is keeping the
pandecode calls in Gallium-panfrost to avoid creating a circular
dependency between encoder/decoder. This could be solved with a third
drm folder but this seems less intrusive for now and Roman would
probably appreciate if I went longer than 8 hours without breaking the
Android build.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
3283c7f4da panfrost: Inline reference counting routines
We use only a very small subset of the capabilities of
pipe_reference (just wrappers for atomic ints..). Let's inline it and
drop the dependency on Gallium from pan_bo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
02a638cc51 panfrost: Isolate panfrost_bo_access_for_stage to pan_cmdstream.c
We don't use it outside this file (and really shouldn't) and it has a
strict Gallium dependency in pan_bo.h.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
ca8c62592c panfrost: Split panfrost_device from panfrost_screen
We would like to access properties of the device in a
Gallium-independent way (for out-of-Gallium testing in the short-term,
and would help a theoretical Vulkan implementation in the long run).
Let's split up the struct.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Icecream95
50e3b2e390 panfrost: Correctly identify format 0x4c
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
2020-03-31 00:48:58 +00:00
Icecream95
bd87bcb8ac panfrost: Add support for R3G3B2
Tested with texenv from mesa-demos.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
2020-03-31 00:48:58 +00:00
Icecream95
49a81a431e st/mesa: Fall back on R3G3B2 for R3_G3_B2
It's simpler for Panfrost to use R3G3B2 instead of B2G3R3, but
format_map only listed the BGR variation.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
2020-03-31 00:48:58 +00:00
Icecream95
81d059c898 panfrost: Add support for B5G5R5X1
Tested with texenv from mesa-demos.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
2020-03-31 00:48:58 +00:00
Icecream95
bad6fc4871 panfrost: Mark 64-bit formats as unsupported
There is no hardware support for these formats, but some games use
them for vertex data.

This fixes a crash in Aleph One.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
2020-03-31 00:48:58 +00:00
Jason Ekstrand
9468f0729b nir: Handle vec8/16 in nir_shrink_array_vars
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
c26bf848ba nir: Handle vec8/16 in opt_undef_vecN
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
99540edfde nir: Treat vec8/16 as select in opt_peephole_select
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
e3554a293b nir: Handle vec8/16 in opt_split_alu_of_phi
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
2aab7999e4 nir: Handle vec8/16 in lower_regs_to_ssa
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
1033255952 nir: Handle vec8/16 in lower_phis_to_scalar
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
ac7a940eba nir: Handle vec8/16 in gather_ssa_types
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
a18c4ee7b0 nir: Handle vec8/16 in bool_to_bitsize
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
f5bbdf7621 nir: Copy propagate through vec8s and vec16s
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
842338e2f0 nir: Add a nir_op_is_vec helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
84ab61160a nir/algebraic: Add downcast-of-pack opts
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
14a49f31d3 nir/lower_int64: Lower 8 and 16-bit downcasts with nir_lower_mov64
We have the code to do the lowering, we were just missing the
boilerplate bits to make should_lower_int64_alu_instr return true.

Fixes: 62d55f1281 "nir: Wire up int64 lowering functions"
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Rob Clark
1b3aefad46 freedreno/log: avoid duplicate ts's
In cases where `fd_log()`/`fd_log_stream()` are called multiple times
back-to-back, just use the timestamp of the first trace.

This seems to avoid some occasional GPU hangs I was seeing with logging
enabled.  Although not exactly sure the reason for the hangs.  (Looks
like GPU hangs *after* all the cmdstream is processed, according to
crashdec.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:13 +00:00
Rob Clark
2bf7dba80b freedreno/a6xx: add some more tracepoints
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:13 +00:00
Rob Clark
31173a7e7a freedreno: add some initial fd_log tracepoints
Mostly convert over existing DBG traces.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:13 +00:00
Rob Clark
55839fd41c freedreno/a6xx: timestamp logging support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:13 +00:00
Rob Clark
a0ca1462f3 freedreno: add logging infrastructure
Provides a way to log msgs timestamped at the corresponding position in
the GPU cmdstream, mostly for the purposes of profiling.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:12 +00:00
Rob Clark
ffd3226678 util: fix u_fifo_pop()
Seems like no one ever depended on it to actually return false when fifo
is empty.

Fixes: 6e61d06209 ("util: Add super simple fifo")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:12 +00:00
Rob Clark
356b93f102 freedreno: remove some obsolete debug options
'fraghalf' is unused (superceeded by actually lowering output based on
the precision information in nir).  And glsl140 support in ir3 is long
past the experimental stage, so the glsl120 option is no longer needed.
So remove them and free up some bits for new things.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:12 +00:00
Jason Ekstrand
b113170559 nir/opt_loop_unroll: Fix has_nested_loop handling
In 87839680c0, a very subtle mistake was made with the CFG walking
recursion.  Instead of setting the local has_nested_loop variable when
process child loops, has_nested_loop_out was passed directly into the
process_loop_in_block call.  This broke nested loop detection heuristics
and caused loop unrolling to run massively out of control.  In
particular, it makes the following CTS test compile virtually forever:

dEQP-VK.spirv_assembly.instruction.graphics.16bit_storage.struct_mixed_types.uniform_buffer_block_geom

Fixes: 87839680c0 "nir: Fix breakage of foreach_list_typed_safe..."
Closes: #2710
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4380>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4380>
2020-03-30 22:20:47 +00:00
Eric Anholt
92afe94d28 freedreno: Work around UBWC flakiness.
In trying to track down the new failure in #2670, I found that I could get
the flaky test set down to 4 tests, and dropping any remaining test
wouldn't trigger the failure (a bad 8x4 block in the middle of
dEQP-GLES3.functional.fbo.msaa.4_samples.r16f's render target).  Disabling
gmem or bypass didn't help, and adding lots of CCU flushing didn't help.
What did help was disabling blitting, or this memset to initialize the
UBWC area after we (presumably) pull a BO out of the BO cache.  My guess
is that the 2D blitter can't handle some rare set of state in the flags
buffer and emits some garbage.

I've run 8 gles3 and 7 gles31 runs with this branch now so hopefully I've got the4 right set of flakes marked for removal.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2670
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4290>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4290>
2020-03-30 21:48:59 +00:00
Eric Anholt
d0b3ccb060 freedreno: Fix detection of being in a blit for acc queries.
The batch might not have stage == FD_STAGE_BLIT set because
fd_blitter_pipe_begin was sticking the stage on some random batch (or none
at all) rather than the one that would be used in the meta operation.

What we actually wanted to be looking at was set_active_query_state(),
which is already called by util_blitter and whose state we just needed to
track.

Fixes piglit occlusion_query_meta_no_fragments.  I haven't changed
query_hw.c's stage handling to clean the rest up because I don't have a
db410c/db820c at home to iterate over the piglit tests.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
57d54bcf99 freedreno: Rename "is_blit" to "is_discard_blit"
It's about the special case of an overwrite of a level meaning we can
discard old batch contents.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
8cdc6c1e4b freedreno/a6xx: Fix timestamp queries.
We were returning the same kind of result as time_elapsed (an end - start
time in ns), which on a timestamp query is approximately zero since
begin/end are at the same point in time.  What we're supposed to return is
a converted-to-ns timestamp based on the GPU clock.  Remove the _pause()
function for time_elapsed to reduce the command stream overhead, and just
capture start (which is, unfortunately, going to happen on each tile and
thus the final start value we ready will be the last tile of the frame,
not the first).

Fixes piglit spec/arb_timer_query/query gl_timestamp

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
7ef61c1f10 freedreno: Count blits in GL_TIME_ELAPSED and perf counter queries.
Fixes 0 gpu time reported for glBlitFramebuffer in apitrace replay --pgpu.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
4a07839948 freedreno: Associate the acc query bo with the batch.
Otherwise, a result query with wait won't trigger flushing the batch, and
we can end up with zeroed results.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
36612c96bd freedreno: Fix acc query handling in the presence of batch reordering.
When we switch batches and start a new draw, we need to cap the queries in
the previous batch and start queries again in the new one.

FD_STAGE_NULL got renamed to 0 so that it would naturally return
!is_active and end the queries at the end of the batch.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
a99ff93374 freedreno: Remove the "active" member of queries.
The state tracker only gets to begin/query/destroy when !active and end
when active, so we have no need to try to track this ourselves.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
b7fe793869 freedreno: Remove always-true return from per-gen begin_query.
You should do failure-prone allocation in create_query, not begin, anyway.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Rhys Perry
1ef9658906 util/u_queue: fix race in total_jobs_size access
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
CC: <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4335>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4335>
2020-03-30 20:17:43 +00:00
Rhys Perry
d101ca3f5a glsl: fix race in instance getters
Insertions can modify entry->data. Seems to fix random Fossilize crashes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
CC: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4335>
2020-03-30 20:17:43 +00:00
Jason Ekstrand
f5b14d983e nir: Set UBO alignments in lower_uniforms_to_ubo
Fixes: fb64954d9d "nir: Validate that memory load/store ops work on..."
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4378>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4378>
2020-03-30 19:18:17 +00:00
Rhys Perry
4a909068ad aco: look at p_{extract,split}_vector's definitions in pred_by_exec_mask()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4333>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4333>
2020-03-30 17:34:46 +00:00
Daniel Stone
9197fd59da CI: Re-enable Windows VS2019 builds
The failures are fixed, but I didn't notice this had been silently
disabled in !4272.

Re-enable the VS2019 build.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4374>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4374>
2020-03-30 16:22:20 +00:00
Jason Ekstrand
fb64954d9d nir: Validate that memory load/store ops work on whole bytes
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
4e80151c5d anv: Set alignments on descriptor and constant loads
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
c217ee8d35 nir: Insert b2b1s around booleans in nir_lower_to
By inserting a b2b1 around the load_ubo, load_input, etc. intrinsics
generated by nir_lower_io, we can ensure that the intrinsic has the
correct destination bit size.  Not having the right size can mess up
passes which try to optimize access.  In particular, it was causing
brw_nir_analyze_ubo_ranges to ignore load_ubo of booleans which meant
that booleans uniforms weren't getting pushed as push constants.  I
don't think this is an actual functional bug anywhere hence no CC to
stable but it may improve perf somewhere.

Shader-db results on ICL with iris:

    total instructions in shared programs: 16076707 -> 16075246 (<.01%)
    instructions in affected programs: 129034 -> 127573 (-1.13%)
    helped: 487
    HURT: 0
    helped stats (abs) min: 3 max: 3 x̄: 3.00 x̃: 3
    helped stats (rel) min: 0.45% max: 3.00% x̄: 1.33% x̃: 1.36%
    95% mean confidence interval for instructions value: -3.00 -3.00
    95% mean confidence interval for instructions %-change: -1.37% -1.29%
    Instructions are helped.

    total cycles in shared programs: 338015639 -> 337983311 (<.01%)
    cycles in affected programs: 971986 -> 939658 (-3.33%)
    helped: 362
    HURT: 110
    helped stats (abs) min: 1 max: 1664 x̄: 97.37 x̃: 43
    helped stats (rel) min: 0.03% max: 36.22% x̄: 5.58% x̃: 2.60%
    HURT stats (abs)   min: 1 max: 554 x̄: 26.55 x̃: 18
    HURT stats (rel)   min: 0.03% max: 10.99% x̄: 1.04% x̃: 0.96%
    95% mean confidence interval for cycles value: -79.97 -57.01
    95% mean confidence interval for cycles %-change: -4.60% -3.47%
    Cycles are helped.

    total sends in shared programs: 815037 -> 814550 (-0.06%)
    sends in affected programs: 5701 -> 5214 (-8.54%)
    helped: 487
    HURT: 0

    LOST:   2
    GAINED: 0

The two lost programs were SIMD16 shaders in CS:GO.  However, CS:GO was
also one of the most helped programs where it shaves sends off of 134
programs.  This seems to reduce GPU core clocks by about 4% on the first
1000 frames of the PTS benchmark.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
d2dfcee7f7 nir: Use b2b opcodes for shared and constant memory
No shader-db changes on ICL with iris

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
16a80ff18a aco: Implement b2b32 and b2b1
The implementations here just clone i2b32 and i2b1.  This means that
b2b32 doesn't technically generate true NIR 0/-1 booleans but it should
be fine as it's only ever generated for shared variable writes which
will always be consumed by something which will then run it through an
i2b again.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
b2db84153a nir: Add b2b opcodes
These exist to convert between different types of boolean values.  In
particular, we want to use these for uniform and shared memory
operations where we need to convert to a reasonably sized boolean but we
don't care what its format is so we don't want to make the back-end
insert an actual i2b/b2i.  In the case of uniforms, Mesa can tweak the
format of the uniform boolean to whatever the driver wants.  In the case
of shared, every value in a shared variable comes from the shader so
it's already in the right boolean format.

The new boolean conversion opcodes get replaced with mov in
lower_bool_to_int/float32 so the back-end will hopefully never see them.
However, while we're in the middle of optimizing our NIR, they let us
have sensible load_uniform/ubo intrinsics and also have the bit size
conversion.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
2cb9cc56d5 intel/nir: Run copy-prop and DCE after lower_bool_to_int32
No shader-db impact on ICL with iris.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Christian Gmeiner
5278e9dea7 etnaviv: compiled_framebuffer_state: get rid of SE_SCISSOR_*
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Christian Gmeiner
22ee3eabca etnaviv: s/scissor_s/scissor
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Christian Gmeiner
43b4eb394c etnaviv: get rid of struct compiled_scissor_state
We can reuse pipe_scissor_state.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Christian Gmeiner
9491c1b04d etnaviv: do the left shift by 16 at emit time
Also round up the max bounds.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Christian Gmeiner
5ba2d398d8 etnaviv: rework clippling calculation to be a derived state
This moves the whole clipping calculation out of the emit function.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Christian Gmeiner
95763e20ce etnaviv: get rid of SE_CLIP_*
The only difference between e.g. SE_SCISSOR_RIGHT and SE_CLIP_RIGHT
is the used margin value. With that information we can remove
SE_CLIP_* and apply the different margins during emit time.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Jose Fonseca
27d58a1c20 gitlab-ci: Prune all SCons jobs except scons-win64, and allows failures.
Based on the discussion in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4352

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4363>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4363>
2020-03-30 14:52:34 +00:00
Samuel Pitoiset
3935a729d9 nir/algebraic: add fexp2(fmul(flog2(a), 0.5) -> fsqrt(a) optimization
Helps some Wolfenstein II and Wolfenstein Youngblood shaders.

pipeline-db (VEGA10/ACO):
Totals from affected shaders:
SGPRS: 17904 -> 17904 (0.00 %)
VGPRS: 14492 -> 14492 (0.00 %)
Spilled SGPRs: 20 -> 20 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 1753152 -> 1749708 (-0.20 %) bytes
Max Waves: 2581 -> 2581 (0.00 %)

pipeline-db (VEGA10/LLVM):
Totals from affected shaders:
SGPRS: 26656 -> 26656 (0.00 %)
VGPRS: 23780 -> 23780 (0.00 %)
Spilled SGPRs: 2112 -> 2112 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 2552712 -> 2549236 (-0.14 %) bytes
Max Waves: 3359 -> 3359 (0.00 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4353>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4353>
2020-03-30 14:07:43 +00:00
Jose Fonseca
2e92d33819 scons: Prune out unnecessary targets.
This prunes out all targets except libgl-gdi, libgl-xlib, and svga, as
suggested by Marek Olšák.

libgl-xlib will be remove once I have had time to confirm no automated
tests we have rely upon it.

There are also a bunch of Makefile.sources which become orphaned as
result, that are not taken care of in this change.

v2: Prune remainders of swr support.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4348>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4348>
2020-03-30 13:38:01 +00:00
Timur Kristóf
0f847b18bc aco: Don't store LS VS outputs to LDS when TCS doesn't need them.
Totals:
Code Size: 254764624 -> 254745104 (-0.01 %) bytes

Totals from affected shaders:
VGPRS: 12132 -> 12112 (-0.16 %)
Code Size: 573364 -> 553844 (-3.40 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
798dd98d6e aco: When LS and HS invocations are the same, pass LS outputs in temps.
We know that in this case, the LS and HS invocations are working
on the exact same vertex, so it's safe to skip the LDS.

Totals:
VGPRS: 3960744 -> 3961844 (0.03 %)
Code Size: 254824300 -> 254764624 (-0.02 %) bytes
Max Waves: 1053748 -> 1053574 (-0.02 %)

Totals from affected shaders:
VGPRS: 26152 -> 27252 (4.21 %)
Code Size: 1496600 -> 1436924 (-3.99 %) bytes
Max Waves: 4860 -> 4686 (-3.58 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
0a91c086b8 aco: Extract store_output_to_temps into a separate function.
Will be used by LS output stores.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
0f35b3795d aco: Fix workgroup size calculation.
Clear the workgroup size for all supported shader stages.
Also, unify the workgroup size calculation accross various places.

As a result, insert_waitcnt can use the proper workgroup size
which means that some waits can be dropped from tessellation
shaders. Also, in cases where the previous calculation was wrong,
we now insert s_barrier instructions.

Totals from affected shaders (GFX10):
Code Size: 340116 -> 338484 (-0.48 %) bytes

Fixes: a8d15ab6da
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
99ad62ff27 aco: Extract setup_tcs_info to a separate function.
Will be required by the workgroup size calculation.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
0ad65f2c55 aco: Zero-fill undefined elements in create_vec_from_array.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
50634ad4a0 aco: Change isel inputs/outputs to a flat array.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
e4a1b246a4 aco: Treat outputs of the previous stage as inputs of the next stage.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
f1dd81ae10 nir: Collect if shader uses cross-invocation or indirect I/O.
The following new fields are added to tess shader info:

* `tcs_cross_invocation_inputs_read`
* `tcs_cross_invocation_outputs_read`

These are I/O masks that are a subset of inputs_read and outputs_read
and they contain which per-vertex inputs and outputs are read
cross-invocation.

Additionall, the following new fields are added to shader_info:

* `inputs_read_indirectly`
* `outputs_accessed_indirectly`
* `patch_inputs_read_indirectly`
* `patch_outputs_accessed_indirectly`

These new fields can be used for optimizing TCS in a back-end compiler.
If you can be sure that the TCS doesn't use cross-invocation inputs
or outputs, you can choose a different strategy for storing VS and TCS
outputs. However, such optimizations might need to be disabled when
the inputs/outputs are accessed indirectly due to backend limitations,
so this information is also collected.

Example: RADV currently has to store all VS and TCS outputs in LDS, but
for shaders when only inputs and/or outputs belonging to the current
invocation ID are used, it could skip storing these in LDS entirely.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
e7d733fdab aco: Use more optimal sequence at the beginning of merged shaders.
It can be further optimized in the future, but
the new sequence already has a few advantages:

* Uses fewer instructions
* Uses even fewer instructions in wave32 mode
* Doesn't use the VALU at all

Totals from affected shaders (GFX10):
VGPRS: 43504 -> 43496 (-0.02 %)
Code Size: 2436000 -> 2423688 (-0.51 %) bytes
Max Waves: 8704 -> 8705 (0.01 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
17c779ab9e aco: Skip 2nd read of merged wave info when TCS in/out vertices are equal.
When TCS has an equal number of input and output, it means that the
number of VS and TCS invocations (LS and HS) are the same; and that
the HS invocations operate on the same vertices as the LS.

When this is the case, this commit removes the else-if between
the merged VS and TCS halves, making it possible to schedule
and optimize the code accross the two halves.

Totals:
SGPRS: 5577367 -> 5581735 (0.08 %)
VGPRS: 3958592 -> 3960752 (0.05 %)
Code Size: 254867144 -> 254838244 (-0.01 %) bytes
Max Waves: 1053887 -> 1053747 (-0.01 %)

Totals from affected shaders:
SGPRS: 29032 -> 33400 (15.05 %)
VGPRS: 35664 -> 37824 (6.06 %)
Code Size: 1979028 -> 1950128 (-1.46 %) bytes
Max Waves: 7310 -> 7170 (-1.92 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
4ec48440a0 aco: Allow combining LDS loads when loading tess factors.
Previously the tess factors were loaded individually, but now they can
be loaded using a single LDS load instruction.

Note that the inner and outer tess factors are not yet combined.

Totals (GFX10):
Code Size: 254896008 -> 254879212 (-0.01 %) bytes

Totals from affected shaders (GFX10):
Code Size: 2028352 -> 2011556 (-0.83 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
ace3833293 aco: Allow combining TCS output VMEM stores.
Some copypasta may have stuck in the code.
This was left on false by mistake.

Totals (GFX10):
Code Size: 254939248 -> 254896008 (-0.02 %) bytes

Totals from affected shaders (GFX10):
VGPRS: 16196 -> 16212 (0.10 %)
Code Size: 1126332 -> 1083092 (-3.84 %) bytes
Max Waves: 2336 -> 2334 (-0.09 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
e2b1d749b1 aco: Fix handling of tess factors.
There is no need to check whether they are written using indirect
indices, because all tess factors should be written to VMEM only
at the end of the shader.

No pipeline db changes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
d3f6adcaed aco: Extract tcs_driver_location_matches_api_mask to separate function.
Also clear up should_write_tcs_output_to_lds a little bit.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
e0dff5fd86 aco: Create null exports in instruction selection instead of assembler.
This allows the passes after isel to assume that the exports are
always correct, and also allows to schedule these null exports later.
Additionally, it ensures that the correct exec mask is used for
these exports.

Totals from affected shaders (GFX10):
SGPRS: 84224 -> 84344 (0.14 %)
VGPRS: 23088 -> 23076 (-0.05 %)
Code Size: 882892 -> 894368 (1.30 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Danylo Piliaiev
87839680c0 nir: Fix breakage of foreach_list_typed_safe assumptions in loop unrolling
foreach_list_typed_safe works with assumption that even if current node
becomes invalid, the next will be still valid.

However process_loops broke this assumption, because during iteration
when immediate child is unrolled - not only current node could be removed
but also the one after it.

This doesn't cause issues now but it will cause issues when undefined
behaviour in foreach* macros is fixed.

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4189>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4189>
2020-03-30 14:41:30 +03:00
Pierre-Eric Pelloux-Prayer
716a065ac0 radeon: switch to 3-spaces style
For clang-format config see the previous commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
2020-03-30 11:05:52 +00:00
Pierre-Eric Pelloux-Prayer
d7008fe46a radeonsi: switch to 3-spaces style
Generated automatically using clang-format and the following config:

AlignAfterOpenBracket: true
AlignConsecutiveMacros: true
AllowAllArgumentsOnNextLine: false
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: false
AlwaysBreakAfterReturnType: None
BasedOnStyle: LLVM
BraceWrapping:
  AfterControlStatement: false
  AfterEnum: true
  AfterFunction: true
  AfterStruct: false
  BeforeElse: false
  SplitEmptyFunction: true
BinPackArguments: true
BinPackParameters: true
BreakBeforeBraces: Custom
ColumnLimit: 100
ContinuationIndentWidth: 3
Cpp11BracedListStyle: false
Cpp11BracedListStyle: true
ForEachMacros:
  - LIST_FOR_EACH_ENTRY
  - LIST_FOR_EACH_ENTRY_SAFE
  - util_dynarray_foreach
  - nir_foreach_variable
  - nir_foreach_variable_safe
  - nir_foreach_register
  - nir_foreach_register_safe
  - nir_foreach_use
  - nir_foreach_use_safe
  - nir_foreach_if_use
  - nir_foreach_if_use_safe
  - nir_foreach_def
  - nir_foreach_def_safe
  - nir_foreach_phi_src
  - nir_foreach_phi_src_safe
  - nir_foreach_parallel_copy_entry
  - nir_foreach_instr
  - nir_foreach_instr_reverse
  - nir_foreach_instr_safe
  - nir_foreach_instr_reverse_safe
  - nir_foreach_function
  - nir_foreach_block
  - nir_foreach_block_safe
  - nir_foreach_block_reverse
  - nir_foreach_block_reverse_safe
  - nir_foreach_block_in_cf_node
IncludeBlocks: Regroup
IncludeCategories:
  - Regex:           '<[[:alnum:].]+>'
    Priority:        2
  - Regex:           '.*'
    Priority:        1
IndentWidth: 3
PenaltyBreakBeforeFirstCallParameter: 1
PenaltyExcessCharacter: 100
SpaceAfterCStyleCast: false
SpaceBeforeCpp11BracedList: false
SpaceBeforeCtorInitializerColon: false
SpacesInContainerLiterals: false

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
2020-03-30 11:05:52 +00:00
Pierre-Eric Pelloux-Prayer
53e5e802f8 radeon: fix includes
And add required forward declarations.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
2020-03-30 11:05:52 +00:00
Pierre-Eric Pelloux-Prayer
7f52bbb7c0 ddebug: add missing forward declaration
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
2020-03-30 11:05:52 +00:00
Daniel Stone
04885d61dd meson: Add VS 4624 warning exclusion to remove piles of LLVM warnings
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4343>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4343>
2020-03-30 10:13:40 +00:00
Erik Faye-Lund
5127160fb6 meson: disable some more warnings on msvc
These warnings triggers for me, and they are harmless as-is. Let's
disable them to avoid hiding actually scary warnings.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4343>
2020-03-30 10:13:40 +00:00
Daniel Stone
2db1d73e53 CI: Avoid htz4 runner for VS2019
The htz4 runner needs to be updated in order for our support binaries
like Chocolatey to work. Temporarily restrict jobs to the EC2 runner
until this has happened.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4371>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4371>
2020-03-30 10:19:35 +01:00
Eric Engestrom
8970b7839a intel: drop unused include directories
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
2020-03-28 21:36:54 +01:00
Eric Engestrom
231273d588 vulkan: drop unused include directories
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
2020-03-28 21:36:54 +01:00
Eric Engestrom
79af30768d meson: inline inc_common
Let's make it clear what includes are being added everywhere, so that
they can be cleaned up.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
2020-03-28 21:36:54 +01:00
Eric Engestrom
5a32dda8e6 meson: use existing variables in inc_common
Stepping stone to make review of the next commits easier.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
2020-03-28 21:36:54 +01:00
Vinson Lee
7df7520305 mesa: Change _mesa_exec_malloc argument type.
Fix build error.

In file included from ../src/mesa/x86/rtasm/x86sse.c:7:0:
../src/mesa/main/execmem.h:31:19: error: unknown type name ‘GLuint’; did you mean ‘uint’?
 _mesa_exec_malloc(GLuint size);
                   ^~~~~~
                   uint

Suggested-by: Marek Olšák <marek.olsak@amd.com>
Fixes: e5339fe4a4 ("Move compiler.h and imports.h/c from src/mesa/main into src/util")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4361>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4361>
2020-03-28 13:14:42 -07:00
Michel Dänzer
fcd3377cfe gitlab-ci: Update to current templates
The .fdo.container-ifnot-exists template has been replaced by
.fdo.container-build.

We need to include "debian/" in FDO_REPO_SUFFIX for now, we can drop it
for individual images when their tags are bumped if we want.

Miscellaneous other goodies this gets us:
* The templates now add some labels to images which may be useful for
  garbage collecting unused tags in the future.
* The templates now copy the current tag from the main project
  registry to the forked project's if it already exists in the latter
  but points to a different image hash. This will avoid false failures
  (or passes) due to using the wrong image.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4286>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4286>
2020-03-28 16:12:38 +00:00
Tomeu Vizoso
447890ad64 Revert "gitlab-ci: Disable jobs for Collabora's LAVA lab"
Lab is online again.

This reverts commit 1351ee0335.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4347>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4347>
2020-03-28 09:45:03 +00:00
Marek Olšák
e609737526 radeonsi/gfx10: fix descriptors and compute registers for compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
4ef1c8d60b radeonsi/gfx10: fix the wave size for compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
b4a0087a1c radeonsi/gfx10: user correct ACQUIRE_MEM packet for compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
acc5bdf887 radeonsi/gfx10: fix ds.ordered.add intrinsic for compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
ee4d797d8b radeonsi/gfx10: don't use NGG culling if compute-based culling is used
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
65e9239977 radeonsi: add num_vbos_in_user_sgprs into the shader cache key
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
be9455bdf7 radeonsi: always create wait_mem_scratch for compute-based culling
used by the primitive restart emulation

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
42ce52b904 radeonsi: set amdgpu-gds-size for mode == 2 of compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
3381f2fa06 radeonsi: fix incorrect ordered_wave_id initilization for compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
d89b19cfe1 radeonsi: remove obsolete TODO comment related to compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Vasily Khoruzhick
5d45ffbfb6 lima: Implement lima_texture_subdata
We can avoid intermediate copy if we implement it ourselves.
Improves x11perf -shmput500 from 199.0/s to 283.0/s

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4281>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4281>
2020-03-28 00:17:40 +00:00
Rob Clark
6a10397a01 gitlab-ci: disable vs2019 build
Seems to be broken atm and blocking merging anything.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 16:34:27 -07:00
Rob Clark
f7d53275fb freedreno/ir3/ra: re-work a6xx merged register file conflicts
In particular setup the full/half conflicts first.  This avoids spurious
conflicts that where causing RA to place vecN half-regs poorly.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
faf276b4c8 freedreno/ir3/ra: split building regs/classes and conflicts
Split out the construction of registers and classes (which is the same
on all gens) from setting up conflicts.  Prep to re-work how we setup
conflicts on a6xx+ which merged half/full register file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
90f7d12236 freedreno/ir3/ra: pick higher numbered scalars in first pass
Since we are re-assigning the scalars anyways in the second pass, assign
them to the highest free reg in the first pass (rather than lowest) to
allow packing vecN regs as low as possible.

Note this required some changes specifically for tex instructions with a
single component writemask that is not necessarily .x, as previously
these would get assigned in the first RA pass, and since they are still
scalar, we'd end up w/ some r47.* and other similarly way-to-high
assignments after the 2nd pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
1da90ca9bf freedreno/ir3/ra: compute register target from liveranges
Using the output of the first pass isn't ideal, as it can bake in the
losses from fragmentation which the scalar pass is intended to fill in.
This gets worse when we start using "vectorish" instructions, due to
higher use of vecN values.

Instead, we can just use the outputs of the liveness analysis to get a
more accurate # of maximum live values at any point.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
d2cc92c747 freedreno/ir3/ra: fix array liveranges
Fixes: 1b658533e1 ("freedreno/ir3: extend liverange of arrays")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
6347c2ea89 freedreno/ir3/ra: add def/use iterators
Decouple the messy logic of figuring out vreg names defined/used by an
instruction from the logic of what to do about it by introducing
iterators.  There is still *some* array vs ssa special casing in
ra_block_compute_live_ranges(), but less than before.  And this will
avoid introducing a second copy of the def/use logic in a following
patch which uses the liveranges to calculate the maximum # of live
values (which is the optimal target for max physical register window
to round-robin within).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
bf0aa7ed90 freedreno/ir3/ra: drop extending output live-ranges
This is no longer needed as we create meta:collect instructions in the
end block, which achieves the same result.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
0e7d24b532 freedreno/ir3/ra: add helper to map name to array
For vreg names that refer to arrays rather than SSA values, this is the
counterpart to name_to_instr().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
d99d358389 freedreno/ir3/ra: fix target register calculation
Account for the # of regs an instruction writes, and fix an off-by-one.

(We are about to replace this with calculating the register target using
the live-ranges, but in debugging that it was useful to assert() if it
chose a higher target.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
d20a06e401 freedreno/ir3/ra: add helper to map name to instruction
Extract out a helper from the select_reg callback.  And include all the
instructions in the hashtable, not just SFU.  This will be useful in the
following commits.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
29992a039e freedreno/ir3/ra: split-up
Split out regset and shared header, since the RA pass is already getting
large-ish.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
6da53911c1 freedreno/ir3/ra: add debug option for RA debug msgs
Similar to the debug switch for sched debug msgs

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
142f2d4551 freedreno/ir3: convert debug bitfield to BITFIELD_BIT()
(Little more verbose than the kernel's BIT())

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
3d0905582a freedreno/ir3: reformat disasm output
In particular, make sure we see all the shader-db stats.  The format
(order) is the sameish, except split across multiple lines to make it
easier to read.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
afdb8e3907 freedreno/ir3: fix bogus register footprint with tess/gs
When we have a tess or gs stage, VS outputs aren't normal varyings, so
regid is r63.x.. we shouldn't extend our registerfootprint to 64!

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
1b4b455739 freedreno/ir3: remove unused helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
c6a8792753 freedreno/ir3: add bary_ij as src for meta:tex_prefetch
This way RA doesn't have to special case it in use/def accounting..

This gets rid of an extra level of split/collect, which shouldn't be
needed.  And interferes with scheduler trying to put tex-prefetches
after inputs but before other instructions.  (Otherwise it would have
to figure out which split/collects need to go before the tex-prefetch)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
a0de0db0e4 freedreno/ir3: small cleanup and comments
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
7d9a794f35 freedreno/a6xx: register update
No functional change, and this register isn't used in userspace.  Just
syncing from envytools tree to eliminate the delta.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Daniel Stone
46a32f0b6b CI: Disable Panfrost Mali-T820 jobs
The BayLibre T820 runners appear to be unhealthy.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4359>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4359>
2020-03-27 21:32:01 +00:00
Marek Olšák
871bd2819d util: remove duplicated MALLOC_STRUCT and CALLOC_STRUCT
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:10 +00:00
Marek Olšák
7164674500 util: don't include p_defines.h and u_pointer.h from gallium
It's a mess, but this is what I arrived at.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:10 +00:00
Marek Olšák
013b65635f radv: stop including files from mesa/main
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:10 +00:00
Marek Olšák
76f79db3f5 util: stop including files from mesa/main
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:09 +00:00
Marek Olšák
c42fa40a51 mesa: don't use <> for including internal headers
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:09 +00:00
Marek Olšák
e5339fe4a4 Move compiler.h and imports.h/c from src/mesa/main into src/util
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:09 +00:00
Jesse Natalie
6cfe074b86 wgl: use gldrv.h instead of stw_icd.h
Now that we have the official header, let's use that instead of
stw_icd.h.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4305>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4305>
2020-03-27 19:50:24 +00:00
Jesse Natalie
ec20169264 wgl: add official gldrv.h header-file
This is the official, Microsoft-provided gldrv.h that describes the
driver-interface for OpenGL drivers on Windows.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4305>
2020-03-27 19:50:24 +00:00
Karol Herbst
c9091f1f24 nv50, nvc0: fix must_check warning of util_dynarray_resize_bytes
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4330>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4330>
2020-03-27 18:20:20 +00:00
Erik Faye-Lund
f4a4d4607e nv50: remove unused variable
This isn't used anymore, so let's get rid of it to silence a warning.

Fixes: c574cda3c6 ("util: Make helper functions for pack/unpacking pixel rows.")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4330>
2020-03-27 18:20:20 +00:00
Lionel Landwerlin
aad0e6f810 intel/perf: store the probed i915-perf version
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
8e7202d45f intel/perf: document meaning of query field
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
dde96d31b7 intel/perf: move mdapi query definitions to their own file
Where they belong.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
33b9c7a7f6 intel/perf: break GL query stuff away
This stuff is somewhat specific to the GL extension & drivers. On
Vulkan we won't use this, it also made a rather large file.

v2: Fix Android build (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
f5c5574f42 intel/perf: move register definition to special file
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
2020-03-27 14:14:49 +00:00
Andres Gomez
b9d2b5dcec gitlab-ci/traces: Add D3D11 sample entry for POLARIS10
v2:
  - Updated traces-db commit.
  - Changed the reference DXVK trace.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez
07e5b3ad50 gitlab-ci: add Wine and DXVK env variables to Vulkan's tracie runner
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez
6bae042b3d gitlab-ci: replay apitrace traces in headless mode
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez
9f4acd465e gitlab-ci: add apitrace's DXGI traces support
v2:
  - Pass the whole retrace command for apitrace traces (Alexandros).

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez
fb8fa83a30 gitlab-ci: add Wine, win64's apitrace and DXVK to the Vulkan testing container
In preparation for having automated testing with DXGI traces.

v2:
  - Updated DXVK version.
  - Merged the new Wine container into the existing Vulkan
    one (Michel).

v3:
  - Updated commit log.
  - Use a particular known-good apitrace version (Alexandros).

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez
05a3b49308 gitlab-ci: Don't use buster-backports packages by default for x86_test-vk
The backports repository can be temporarily inconsistent between
architectures, which can break the docker image build.

Suggested-by: Michel Dänzer <mdaenzer@redhat.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Daniel Stone
4a8876b025 CI: Windows: Fix Docker tag argument inversion
docker tag takes its arguments as source and dest, not dest and source.
Went unnoticed as the host already had a tag for my image when I was
testing.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4346>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4346>
2020-03-27 13:23:33 +00:00
Daniel Stone
07885cbcdb CI: Add native Windows VS2019 build
Adds a native build of Mesa using Meson with the Visual Studio 2019
toolchain on a Windows host.

Though Docker is supported on Windows, Docker-in-Docker is not possible,
nor are podman and skopeo available. We handle this by creating the
container from a shell-executor Windows machine, which gives us a native
PowerShell that we can execute Docker from. This attempts to do the same
copy-from-upstream-or-create-if-not-exists optimisation as the
ci-templates do for our Linux builds, albeit open-coded in PowerShell.

The Mesa build itself is executed inside a container, using Meson and
Ninja.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Acked-by: Brian Paul <brianp@vmware.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
2020-03-27 10:32:47 +00:00
Daniel Stone
bc98de4d14 util/test: Use MAX_PATH on Windows
Windows provides MAX_PATH rather than PATH_MAX for the maximum allowable
path length. This is not a limit on the length of filename which can
exist on the filesystem, but a length on the length of path which can be
passed to Win32 API calls.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
2020-03-27 10:32:47 +00:00
Pierre-Eric Pelloux-Prayer
8f573bdaaa util: fix process_test path
Make sure we only use winepath when needed.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2690
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
2020-03-27 10:32:31 +00:00
Tomeu Vizoso
1351ee0335 gitlab-ci: Disable jobs for Collabora's LAVA lab
The lab is going down for a few hours to upgrade the LAVA installation
to the latest stable release.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4342>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4342>
2020-03-27 09:25:20 +01:00
Timothy Arceri
b5e00f5c2b nir: fix packing of TCS varyings not read by the TES
Unlike other stages TCS outputs not read by the TES cannot always
be demoted to globals e.g. when they are read by other TCS
invocations.

We were not taking these outputs into account when packing which
could result in other outputs being assigned to the same location.

Here we make sure to gather information on these outputs and group
them together when packing.

This fixes rendering issues in QUBE 2 via Proton.

Closes: #2653
Fixes: 26aa460940 ("nir: rewrite varying component packing")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>
2020-03-27 07:26:39 +00:00
Timothy Arceri
8b9ebbcb54 glsl: fix varying packing for 64bit integers
Without this we can incorrectly end up marking things as making
use of ARB_enhanced_layouts style packing.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>
2020-03-27 07:26:39 +00:00
Samuel Pitoiset
ba2ec1f369 ac/nir: use llvm.amdgcn.rcp in ac_build_fdiv()
Instead of emitting 1.0 / x which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

No pipeline-db changes with VEGA10/LLVM 9.

pipeline-db (VEGA10/LLVM 10):
Totals from affected shaders:
SGPRS: 6672 -> 6672 (0.00 %)
VGPRS: 6652 -> 6652 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 561780 -> 561692 (-0.02 %) bytes
Max Waves: 1043 -> 1043 (0.00 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 84608 -> 83768 (-0.99 %)
VGPRS: 106768 -> 106636 (-0.12 %)
Spilled SGPRs: 1625 -> 1713 (5.42 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 10850936 -> 10726712 (-1.14 %) bytes
Max Waves: 3152 -> 3180 (0.89 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
2020-03-27 08:05:43 +01:00
Samuel Pitoiset
d548384fc6 ac/nir: use llvm.amdgcn.rsq for nir_op_frsq
Instead of emitting 1.0 / sqrt(x) which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

pipeline-db (VEGA10/LLVM 9):
Totals from affected shaders:
SGPRS: 16872 -> 16864 (-0.05 %)
VGPRS: 15320 -> 15464 (0.94 %)
Spilled SGPRs: 2021 -> 2133 (5.54 %)
Code Size: 1915464 -> 1917476 (0.11 %) bytes
Max Waves: 641 -> 639 (-0.31 %)

pipeline-db (VEGA10/LLVM 10):
Totals from affected shaders:
SGPRS: 43936 -> 44120 (0.42 %)
VGPRS: 41776 -> 41972 (0.47 %)
Spilled SGPRs: 875 -> 875 (0.00 %)
Code Size: 4468164 -> 4468120 (-0.00 %) bytes
Max Waves: 2412 -> 2414 (0.08 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 60096 -> 60096 (0.00 %)
VGPRS: 63552 -> 63648 (0.15 %)
Spilled SGPRs: 6135 -> 6117 (-0.29 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 6252996 -> 6249772 (-0.05 %) bytes
Max Waves: 2324 -> 2337 (0.56 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
2020-03-27 07:45:47 +01:00
Samuel Pitoiset
66426ce119 ac/nir: use llvm.amdgcn.rcp for nir_op_frcp
Instead of emitting 1.0 / x which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

pipeline-db (VEG10/LLVM 9):
Totals from affected shaders:
SGPRS: 50384 -> 50312 (-0.14 %)
VGPRS: 42572 -> 42696 (0.29 %)
Spilled SGPRs: 1372 -> 1372 (0.00 %)
Code Size: 5692040 -> 5691428 (-0.01 %) bytes
Max Waves: 3954 -> 3951 (-0.08 %)

pipeline-db (VEG10/LLVM 10):
Totals from affected shaders:
SGPRS: 78512 -> 78464 (-0.06 %)
VGPRS: 62408 -> 62484 (0.12 %)
Spilled SGPRs: 1502 -> 1502 (0.00 %)
Code Size: 8106188 -> 8103372 (-0.03 %) bytes
Max Waves: 7759 -> 7753 (-0.08 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 112760 -> 113232 (0.42 %)
VGPRS: 111132 -> 110568 (-0.51 %)
Spilled SGPRs: 5870 -> 5940 (1.19 %)
Spilled VGPRs: 650 -> 652 (0.31 %)
Code Size: 11887232 -> 11561744 (-2.74 %) bytes
Max Waves: 8964 -> 9015 (0.57 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
2020-03-27 07:45:43 +01:00
H.J. Lu
e352e7e792 x86: Add ENDBR at function entries
Intel Control-flow Enforcement Technology (CET):

https://software.intel.com/en-us/articles/intel-sdm

contains shadow stack (SHSTK) and indirect branch tracking (IBT).
When IBT is enabled, all indirect branch targets must start with
ENDBR instruction which is a NOP on non-CET processors.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2538

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ben Widawsky <ben.widawsky@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3865>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3865>
2020-03-26 16:38:46 -07:00
Marek Olšák
9899a8e26c mesa: try to fix the android build
Fixes: 8a3e2cd9b2
Closes: #2685

Acked-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4325>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4325>
2020-03-26 18:43:42 -04:00
Francisco Jerez
36c155a017 intel/fs/gen12: Fix interaction of SWSB dependency combination with EU fusion workaround.
This has been reported to fix a hang in Shadow of Mordor on Gen12.
One of its compute shaders seems to cause an in-order exec_all
dependency to be merged into an out-of-order SET dependency slot,
which would prevent us from baking the SET dependency into the parent
instruction, leading to an assert failure in emit_inst_dependencies()
(Thanks to Rafael for noticing that).  Prevent that by avoiding
combination of in-order dependencies whenever that would cause a SET
dependency to be demoted to a SYNC.NOP instruction.

Fixes: e14529ff32 "intel/fs/gen12: Workaround data coherency issues due to broken NoMask control flow."
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2020-03-26 19:09:42 +00:00
H.J. Lu
007e623025 x86_init_func_common: Add ENDBR at function entry
Intel Control-flow Enforcement Technology (CET):

https://software.intel.com/en-us/articles/intel-sdm

when IBT is enabled, all indirect branch targets must start with ENDBR
instruction which is a NOP on non-CET processors.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2575

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ben Widawsky <ben.widawsky@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3985>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3985>
2020-03-26 18:36:20 +00:00
Danylo Piliaiev
2d0599b1b4 intel/aub_viewer: Fix format specifier for uint64_t
Use PRIx64 instead of lx for uint64_t

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2692
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4331>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4331>
2020-03-26 18:00:15 +00:00
Icecream95
7b9f1b6ef7 panfrost: Extend the tiled store fast-path to loads
The access functions are forced to be inline, so performance shouldn't
be impacted for stores.

WebGL performance in Firefox is more than doubled, and track loading
in STK is noticeably faster.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4317>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4317>
2020-03-26 14:34:55 +00:00
Icecream95
dac1573a35 mesa/format_utils: Add a fast-path for RGBA to BGRA
This is similar to an existing fast-path, but this is for an array
source while the existing one is for an array destination.

Firefox can hit this case for WebGL when GL compositing is not used.
For a WebGL sample on the Panfrost driver, the frame-rate increased
from 19.4 fps to 20.6 fps, which is a 6% gain.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4315>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4315>
2020-03-26 13:36:47 +00:00
Tapani Pälli
0847fe6e7f glsl: set error_emitted true if type not ok for assignment
Patch changes also existing assert to not trigger when we have
error types in assignment.

v2: simplify, cleanup (Ian)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2629
Fixes: d1fa69ed61 ("glsl: do not attempt assignment if operand type not parsed correctly")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4178>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4178>
2020-03-26 12:41:12 +00:00
Alexandros Frantzis
05069e1f07 gitlab-ci: Fix traces caching in tracie
We are currently comparing a hex string representation of the git lfs
OID with a byte array representation of the locally calculated OID,
causing detection of valid cached traces to fail. Ensure we are
comparing compatible representations (in this case hex strings).

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4300>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4300>
2020-03-26 13:55:26 +02:00
Boris Brezillon
efdce97e4b vtn/opencl: add rint-support
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
6d69ed88f8 vtn/opencl: add native exp2/log2-support
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
7b2bfb6bc4 vtn/opencl: add native exp10/log10-support
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
25cb87bcdd vtn/opencl: add native exp/log-support
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
c98e745e78 compiler/nir: move build_log helper into builtin-builder
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
f59ae68838 compiler/nir: move build_exp helper into builtin-builder
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
4821ec6d8f vtn/opencl: fully enable OpenCLstd_Clz
Fixes: 7325f6ac98 ("vtn/opencl: add clz support")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Neil Armstrong
51831537a2 gitlab-ci: re-enable mali400/450 and t820 jobs
The FILES_HOST_NAME and FILES_HOST_URL are in the baylibre's runner
environment to make it more flexible.

Also use the new aarch64 mesa-ci-aarch64-lava-baylibre runner with
embedded nginx server to serve the LAVA artifacts.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Neil Armstrong
842f13d8f8 gitlab-ci: add FILES_HOST_URL and move FILES_HOST_NAME into jobs
The FILES_HOST_URL & FILES_HOST_NAME will be in the Baylibre's runner
environment, move them into the t860/t720/t760 jobs using Collabora's
runner.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Tomeu Vizoso
b123849880 gitlab-ci: Serve files for LAVA via separate service
Currently, we store the kernel and ramdisk for each LAVA job in the
artifacts of the job that built them. Because artifacts are stored in
GCE and LAVA labs aren't, this causes a lot of egress with is expensive.

To avoid this, have runners download most of the data via the (cached)
container images once, and for each job upload the kernel and ramdisk to
a server outside GCE.

Right now we only have Collabora's runner with a local web server, so
jobs that go to Baylibre's lab have been disabled.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Tomeu Vizoso
92f3c51560 gitlab-ci: Place files from the Mesa repo into the build tarball
There's some files from the .gitlab-ci directory that are needed in the
test stage and that, because the Mesa repository isn't checked out in
that stage, need to be made available through other means.

Because those files are going to be needed in LAVA devices, place them
ino the tarball containing the built files so it's available to both
gitlab-ci runners and LAVA devices.

Before those files were passed in the artifacts of the Gitlab CI job,
but this commit places them into the built tarball so scripts later in
the pipeline don't need to account for this discrepancy.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Marek Olšák
b94c277fd1 radeonsi: enable full out-of-order drawing when allow_draw_out_of_order is set
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Marek Olšák
8c053e5fad mesa: allow out-of-order drawing to optimize immediate mode if it's safe
This increases performance by 11-13% in Viewperf11/Catia - first scene.

Set allow_draw_out_of_order=true to enable this.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Marek Olšák
0c6a667d93 glsl_to_tgsi: set shader_info::writes_memory
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Marek Olšák
85a723975b nir: add and gather shader_info::writes_memory
for out-of-order drawing.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Kristian H. Kristensen
d269fb33b0 radeonsi: Stop exposing PIPE_SHADER_CAP_FP16
Not fully supported.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321>
2020-03-25 22:43:41 +00:00
Vinson Lee
603f38f171 util/u_process: Add util_get_process_exec_path for macOS.
Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2682
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4313>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4313>
2020-03-25 14:38:03 -07:00
Christian Gmeiner
8cdace95ac freedreno: ssbo: mark resource read or written depending on usage
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Christian Gmeiner
061b262a0c freedreno: ssbo: keep track if a buffer gets written
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Christian Gmeiner
0ed053f03d freedreno: simplify fd_set_shader_buffers(..)
Clear the modified bits for enabled_mask and then iterate over the
whole range and set the specific bit where there is a buffer.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Christian Gmeiner
3340cbd398 freedreno: calculate modified bit mask only once
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Roland Scheidegger
3cbcb1b73e gallium/util: Add back (and rename) util_float_to_half implementation
This implementation was removed by 8b8af6d3 ("gallium/util: Switch
util_float_to_half to _mesa_float_to_half()'s impl.")
It was not actually broken, but _mesa_float_to_half() implements
round-to-nearest-even, whereas util_float_to_half() implemented
round-to-zero. So rename it appropriately.
GL actually never cares about rounding (except a broken piglit test),
however d3d10 very much does and requires RTZ for float to half
conversion. Moreover, apparently at least radeon gpus actually always
do RTZ when doing RT writes (and I'd suspect for shader image writes
as well). Hence it seems appropriate to hook up this rtz function to
the format instead. This will cause llvmpipe and softpipe to use rtz
rounding for clears with half float formats, and softpipe would use rtz
behavior for rt writes as well (llvmpipe has that hardcoded), not sure
if "real" hw drivers hit this function for much.
(For shader opcodes would still need to figure out what rounding to use
appropriately, but this is a question for another day.)
Note should probably unify with _mesa_float_to_float16_rtz. Unclear at
this point which one is better, so just restore previous function here.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4312>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4312>
2020-03-25 19:16:13 +00:00
Marek Vasut
9e78f17b74 etnaviv: Emit PE.ALPHA_COLOR_EXT* on GPUs with half-float support
At least GC880 (iMX6S), GC2000 (iMX6Q) blobs do not emit the
PE.ALPHA_COLOR_EXT0 and PE.ALPHA_COLOR_EXT1 into the command
stream. The GCnano (STM32MP1) is not affected by this change
either. This is because neither of these GPUs support the
half-float feature.

Emit PE.ALPHA_COLOR_EXT* in etnaviv only if half-float support
is present in the GPU. This fixes all of the currently failing
dEQPs in this group:
  dEQP-GLES2.functional.fragment_ops.blend.*

Fixes: 76adf041f2 ("etnaviv: fix blend color on newer GPUs")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4277>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4277>
2020-03-25 19:21:05 +01:00
Roland Scheidegger
4897e70ccd gallivm: disable rgtc/latc SNORM accellerated fetches
Unfortunately this appears to be bugged (it seems the piglit tests aren't
quite exhaustive enough). I'm almost certain it's the lerp
(lp_build_lerpdxta()) which doesn't handle signed numbers correctly, let's
disable for now.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4311>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4311>
2020-03-25 17:56:11 +00:00
Erik Faye-Lund
8c30b9d987 rbug: do not return void-value
Returning a void-value is nonsensical, and in this case it seems like a
mistake.

This eliminates a warning when building on MSVC.

Fixes: fb04e5da97 ("gallium: add pipe_screen::finalize_nir")
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>
2020-03-25 14:19:37 +00:00
Erik Faye-Lund
411d7429c9 rbug: clean up cast-warnings
Similarly to the previous cast; on 64-bit Windows, unsigned long is
32-bit, and casting a pointer to a non-matchin bit-width integer produce
warnings. So let's use uintpre_t for this purpose instead.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>
2020-03-25 14:19:37 +00:00
Erik Faye-Lund
079cb4949d pipebuffer: clean up cast-warnings
This code produces warnings, so let's fix that. The problem is that
casting a pointer to an integer of non-pointer-size triggers warnings on
MSVC, and on 64-bit Windows unsigned long is 32-bit large.

So let's instead use uintptr_t, which is exactly for these kinds of
things.

While we're at it, let's make the resulting index a plain "unsigned",
which is the type this originated from before we started with this
cast-dance.

Fixes: 1a66ead1c7 ("pipebuffer, winsys/svga: Add functionality to update pb_validate_entry flags")
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>
2020-03-25 14:19:37 +00:00
Lionel Landwerlin
1271193932 vulkan/overlay: Add a workaround semaphore for application presenting without one
When an application calls vkQueuePresent() on a different queue than
the one we run our drawing on and it doesn't give a semaphore to wait
on, let's insert our own semaphore so that we don't race the
application's drawing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2540
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3893>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3893>
2020-03-25 13:42:01 +02:00
Pierre-Eric Pelloux-Prayer
5533c41541 ac: fix ac_build_is_helper_invocation when postponed_kill is null
If there was no demote() in the shader, ac_build_is_helper_invocation
behaves exactly the same as ac_build_load_helper_invocation, i.e.
the helper lanes are the same as they were at the beginning of the shader.

Fixes: de57ea2a3d ("amd/llvm: implement nir_intrinsic_demote(_if) and nir_intrinsic_is_helper_invocation")
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4301>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4301>
2020-03-25 08:19:38 +01:00
Pierre-Eric Pelloux-Prayer
84da4ded4b nir: update uses_demote flag in discard_to_demote pass
Otherwise the ctx.ac.postponed_kill will not be allocated.

Fixes: ce87da71e9 ("nir: add pass to lower discard() to demote()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2662
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4301>
2020-03-25 08:19:33 +01:00
Neil Roberts
fc8432e6d6 glsl/lower_precision: Lower builtins depending on arguments
When an ir_call is encountered that invokes a builtin, it will now try
to generate a lowered version of the builtin. This only happens if all
of the arguments to the function are lowerable. Previously the builtin
would be inlined before the lowering pass is invoked and then the
implementation would be lowered as a consequence of the pass. However
this causes problems if the builtin has multiple arguments and the
implementation has operations on only a few of the arguments before
combining it with the others. In that case the entire builtin should
only be lowered if all of the arguments are lower precision. The
previous approach would end up lowering only parts of the
implementation.

The lowered implementations are cached in a hash table in case they can
be reused.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
e7434c0a06 glsl: Inline builtins in a separate pass
Previously, the ir_call functions for builtin functions were replaced
with the inline implementation immediately after being added to the
instruction list. This patch replaces that with a separate pass that
lowers them after the conversion from AST to IR is complete. This will
be useful to be able to insert some handling for the precision lowering
pass before the inlining. This needs to happen because the precision
of the operations in the inlined implementation depends on the highest
precision of all of the arguments to the call.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Hyunjun Ko
1ee2ad584c freedreno/ir3: enable nir_opt_loop_unroll on a6xx
If precision lowering happens at GLSL IR, loop_analysis at IR doesn't
work as expected since it can't handle things like:

"(expression bool < (expression float16_t f2fmp (var_ref ndx) ) (constant float16_t (1.000000)) )"

So we'd rather do this optimization at the NIR stage.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
61f7a1dfc5 freedreno/ir3: Lower bools to bitsize
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Iago Toral Quiroga
467c9a0faa nir: add a bool bitsize lowering pass
The pass lowers 1-bit booleans produced by NIR to the native bitsize
of the operations that produce them.

v2: change on lower_load_const_instr after upstream changes. Added
    TODO2 to explain it, as it was not properly tested yet (see
    already existing TODO) (Neil)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Hyunjun Ko
75674ed4d4 freedreno: Enable mediump lowering
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
cc09745714 glsl: Add unit tests for the lower_precision pass
Adds a unit tests script that invokes the standalone compiler with
--lower-precision and verifies that lowered operations are being used.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
32cd3bd850 glsl/standalone: Add an option to lower the precision
Adds a --lower-precision option that just sets the LowerPrecision
compiler option. That way it can be used in unit tests to test the
precision lowering pass.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
b83f4b9fa2 glsl: Add an IR lowering pass to convert mediump operations to 16-bit
This works by finding the first rvalue that it can lower using an
ir_rvalue_visitor. In that case it adds a conversion to float16
after each rvalue and a conversion back to float before storing
the assignment.

Also it uses a set to keep track of rvalues that have been
lowred already. The handle_rvalue method of the rvalue visitor doesn’t
provide any way to stop iteration. If we handle a value in
find_precision_visitor we want to be able to stop it from descending into
the lowered rvalue again.

Additionally this pass disallows converting nodes containing non-float.
The can_lower_rvalue function explicitly excludes any branches
that have non-float types except bools. This avoids the need to have
special handling for functions that convert to int or double.

Co-authored-by: Hyunjun Ko <zzoon@igalia.com>

v2. Adds lowering for texture samples

v3. Instead of checking whether each node can be lowered while walking the
tree, a separate tree walk is now done to check all of the nodes in a
single pass. The lowerable nodes are added to a set which is checked
during find_precision_visitor instead of calling can_lower_rvalue.

v4. Move the special case for temporaries to find_lowerable_rvalues. This
needs to be handled while checking for lowerable rvalues so that any
later dereferences of the variable will see the right precision.

v5. Add an override to visit ir_call instructions and apply the same
technique to override the precision of the temporary variable in the
same way as done for builtin temporaries and ir_assignment calls.

v6. Changes the pass so that it doesn’t need to lower an entire subtree in
order do perform a lowering. Instead, certain instructions can be
marked as being indepedent of their child instructions. For example,
this is the case with array dereferences. The precision of the array
index doesn’t have any bearing on whether things using the result of
the array deref can be lowered.

Now, only toplevel lowerable nodes are added to the lowerable_rvalues
instead instead of additionally adding all of the subnodes.

It now also only needs one hash table instead of two.

v7. Don’t try to lower sampler types. Instead, the sample instruction is
now treated as an independent point where the result of the sample can
be used in a lowered section. The precision of the sampler type
determines the precision of the sample instruction. This also means
the coordinates to the sampler can be lowered.

v8. Use f2fmp instead of f2f16.

v9.  Disable lowering derivatives calcualtions, which might not work
properly on some hw backends.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
c525785edc glsl/hierarchical_visitor: Call leave_callback on leaf nodes
Previously for leaf ir_instructions only the enter callback was
called. This makes it a bit difficult to make a pass that wants to
visit every instruction using a stack. Making it call the leave
callback as well makes it behave less surprisingly.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
0e1680a1e2 glsl: Add a method to get precision from a deref instruction
Adds ir_dereference::precision(). For a normal variable dereference,
the precision comes from the variable. For a record member it comes
from the field within the record. For an array it can come from
either, depending on where the underlying array is stored. The method
recursively walks the derefs until it finds one of the first two.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Lionel Landwerlin
ba56684a14 i965/iris: fix crash when calling GetPerfQueryDataINTEL
On a query that was never begun.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4302>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4302>
2020-03-24 22:54:12 +00:00
Marek Olšák
8a3e2cd9b2 glthread: compile marshal_generated.c faster by breaking it up into 8 files
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>
2020-03-24 16:28:30 -04:00
Marek Olšák
cadddbd269 glthread: declare marshal and unmarshal functions as non-static
Declare them in the header file. Then we can split marshal_generated.c
into multiple files.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>
2020-03-24 16:28:30 -04:00
Marek Olšák
03da51eb07 glthread: inline SET_func and add -O1 to build _mesa_create_marshal_table faster
The compile time of marshal_generated.c improved from 30.1s to 12.4s.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>
2020-03-24 16:28:30 -04:00
Samuel Pitoiset
238e2ed210 radv: enable VK_KHR_8bit_storage on GFX6-GFX7
Enabling a Vulkan extension doesn't mean that all features need
to be implemented. DOOM Eternal crashes at launch if that ext
is not supported but it doesn't matter if the features are enabled
or not.

Let's enable it like we did for VK_KHR_16bit_storage.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4299>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4299>
2020-03-24 16:34:21 +00:00
Pierre-Eric Pelloux-Prayer
bd22a0f710 util/u_process: fix Windows build
Reported by Brian Paul.

Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4303>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4303>
2020-03-24 15:58:34 +00:00
Alyssa Rosenzweig
6a4fadce12 pan/bi: Rewrite aligned vectors as well
This still isn't optimal, but it handles another common case where we
have a vector "prefix" and can rewrite directly. The last case is one
where writemasks and such would start coming into play and - for the
moment - is not worth the hike in complexity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>
2020-03-24 15:29:35 +00:00
Alyssa Rosenzweig
5a3493c536 pan/bi: Lower combines to rewrites for scalars
This avoids unneeded moves for scalars. It still generates suboptimal
code for vectors, however.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>
2020-03-24 15:29:35 +00:00
Alyssa Rosenzweig
e0a51d5308 pan/bi: Ingest vecN directly (again)
Last time, I swear. We still generate writemasks but SSA-like ones and
do the lowering ourselves.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>
2020-03-24 15:29:35 +00:00
Jonathan Marek
04509dae7f turnip: implement depth clamp
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>
2020-03-24 13:01:44 +00:00
Jonathan Marek
afe27d5345 turnip: fix znear clipping
Vulkan clips znear at 0 instead of -1.

Fixes dEQP-VK.draw.inverted_depth_ranges.nodepthclamp_*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>
2020-03-24 13:01:44 +00:00
Jonathan Marek
07a8100aed freedreno/registers: more GRAS_CL_CNTL bits, Z_CLAMP
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>
2020-03-24 13:01:44 +00:00
Rhys Perry
43918c9a7f aco: implement 64-bit VGPR constant copies in handle_operands()
64-bit VGPR constant copies can happen because of 64-bit constant copy
propagation. Since this optimization is beneficial and more annoying to
deal with in the optimizer, I've implemented 64-bit VGPR constant copies
in handle_operands().

This also sets copy_operation::size correctly for 64-bit constant copies.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>
2020-03-24 11:28:55 +00:00
Rhys Perry
21ba2bc595 aco: remove dead code in handle_operands()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>
2020-03-24 11:28:55 +00:00
Rhys Perry
9f4ba2d2b4 nir/gather_info: fix per-vertex handling in try_mask_partial_io
pipeline-db (Navi, ACO):
Totals from affected shaders:
SGPRS: 6432 -> 6432 (0.00 %)
VGPRS: 11924 -> 11924 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 1596 -> 1596 (0.00 %) dwords per thread
Code Size: 575524 -> 518620 (-9.89 %) bytes
LDS: 12187 -> 12187 (0.00 %) blocks
Max Waves: 2695 -> 2695 (0.00 %)

Helps a few hundred Dark Souls 3 shaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4190>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4190>
2020-03-24 11:09:15 +00:00
Pierre-Eric Pelloux-Prayer
f1cc13727c radeonsi: enable workarounds for YoYo engine based games
Without the radeonsi_sync_compile option the games crashes at
startup.
The engine seems to be using a custom global new operator and
it doesn't plays well with multithreading it seems.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1310
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1271
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1272
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1288
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2611
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
2020-03-24 08:33:29 +01:00
Pierre-Eric Pelloux-Prayer
8f48e7b1e9 util/xmlconfig: add new sha1 application attribute
This is useful to enable workarounds for applications with a generic name.

For instance all games made with the YoYo game engine have the same executable
name "runner".

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
2020-03-24 08:33:29 +01:00
Pierre-Eric Pelloux-Prayer
f8f1413070 util/u_process: add util_get_process_exec_path
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
2020-03-24 08:30:34 +01:00
Pierre-Eric Pelloux-Prayer
2cb965e5b6 util/os_file: extend os_read_file to return the file size
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
2020-03-24 08:30:34 +01:00
Pierre-Eric Pelloux-Prayer
bd6234f24b radeonsi: clarify the conditions when FLUSH_AND_INV_DB is needed
FLUSH_AND_INV_DB should be done when we're changing surface state
registers of a bound depth target.

When depth_clear_value changes, si_state will modify
S_028038_ZRANGE_PRECISION so we need to flush the DB caches.

Verified with the captures from bugs cited below.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1283
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1330
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>
2020-03-24 08:05:12 +01:00
Jason Ekstrand
67a10ea215 intel/dump_gpu: Handle a bunch of getparam in the no-HW case
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>
2020-03-24 06:28:29 +00:00
Jason Ekstrand
7fd4184378 intel/dump_gpu: Add an ensure_device_info helper
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>
2020-03-24 06:28:29 +00:00
Jason Ekstrand
be451f71ab anv: Stop fetching the timestamp frequency ourselves
gen_get_device_info_from_fd fetches the timestamp frequency from the
kernel.  ANV also carrying code for it is redundant.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>
2020-03-24 06:28:28 +00:00
Chia-I Wu
d63d000686 egl/android: enable/disable KHR_partial_update correctly
Commit f3728816af (egl/android: require ANDROID_native_fence_sync
for buffer age) re-added some stale code removed in commit
b4345da876 (egl/android: Delete set_damage_region from egl dri
vtbl).  Remove it now.

Commit b4345da876 assumes KHR_partial_update is only
driver-dependent.  That is mostly true except that the extension
also introduces buffer age query, which depends on
ANDROID_native_fence_sync on Android.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4235>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4235>
2020-03-23 16:22:24 -07:00
Eric Anholt
41412cc4b7 ci: Ban the recent popular freedreno a630 intermittent failure.
This popped up last thursday.  The only relevant code commit was my pixel
center half integer change, but the more likely thing to me seems to be
having shuffled the test order by introducing more skips the day before.

Link: https://gitlab.freedesktop.org/mesa/mesa/issues/2670
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4287>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4287>
2020-03-23 20:22:53 +00:00
Marek Olšák
719063d4d0 st/mesa: fix use of uninitialized memory due to st_nir_lower_builtin
reported by valgrind

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4274>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4274>
2020-03-23 20:01:31 +00:00
Rhys Perry
17c7f4e30e aco: fix boolean undef regclass
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4285>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4285>
2020-03-23 19:43:09 +00:00
Roman Stratiienko
4ed12efb58 lima: Add missing source file to Android.mk
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Roman Stratiienko <roman.stratiienko@nure.ua>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4283>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4283>
2020-03-23 19:26:29 +00:00
D Scott Phillips
1182a3934a intel/tools/aubinator_error_decode: Decode ring buffers from HEAD to TAIL
Capture the HEAD and TAIL register values from the dump and
properly index the ring buffer using those. Previously we would
decode the ring buffer from the beginning, printing out whatever
happened to be there.

Also, properly pass the `from_ring` parameter to gen_print_batch()
so that decoding doesn't stop once MI_BATCH_BUFFER_END is
encoutered.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4261>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4261>
2020-03-23 19:10:50 +00:00
Elie Tournier
84e707e6f2 docs/features: Update virgl OpenGL 4.5 features
GL_ARB_clip_control and GL_KHR_robustness are now expose in the guest.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4160>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4160>
2020-03-23 18:49:13 +00:00
D Scott Phillips
49f9a0bb57 intel/tools/aubinator_error_decode: read HW Context before other batches
The hardware context buffer has state that was set before the
batch started. By decoding it first, references to things like
Dynamic State Base Address are decodable in the command batches.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4246>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4246>
2020-03-23 18:13:37 +00:00
Sagar Ghuge
c40acdef52 iris: Set patch count threshold in 3DSTATE_HS
Lets specifiy maximum number of patches that will be accumulated before
a thread is dispatched.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
2020-03-23 17:57:57 +00:00
Sagar Ghuge
60c789543e anv: Set patch count threshold in 3DSTATE_HS
Lets specifiy maximum number of patches that will be accumulated before
a thread is dispatched.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
2020-03-23 17:57:57 +00:00
Sagar Ghuge
1a5ac646ce intel/compiler: Track patch count threshold
Return the number of patches to accumulate before an 8_PATCH mode thread
is launched.

v2: (Kenneth Graunke)
- Track patch count threshold instead of input control points.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
2020-03-23 17:57:57 +00:00
Sagar Ghuge
b3dd54fe13 intel/genxml: Add patch count threshold field on gen12
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
2020-03-23 17:57:57 +00:00
Andres Gomez
39ac87bf50 gitlab-ci/traces: Add Vulkan sample entries for POLARIS10
v2:
  - Updated commit log.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4103>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4103>
2020-03-23 17:36:32 +00:00
Denys
6bca192e12 gitlab: add bug report template
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4089>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4089>
2020-03-23 17:15:42 +00:00
Rhys Perry
9d56ed199b aco: emit IR in IF's merge block instead if the other side ends in a jump
Fixes NIR such as:
if (divergent) {
   a = sgpr()
} else {
   break;
}
use(a)

Previously we would have emitted:
if (divergent) {
   a = sgpr()
}
if (!divergent) {
   break;
}
use(a)

But "a" isn't available at it's use. Now we emit:
if (divergent) {
}
if (!divergent) {
   break;
}
a = sgpr()
use(a)

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 1936 -> 1936 (0.00 %)
VGPRS: 1264 -> 1264 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 159408 -> 159152 (-0.16 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 81 -> 81 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2557
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Rhys Perry
8d8c864beb aco: improve check for unreachable loop continue blocks
The old code would have previously caught:
loop {
   ...
   break
}
when it was meant to just catch:
loop {
   if (...)
      break
   else
      break
}

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Rhys Perry
46e94fd854 aco: skip NIR in unreachable merge blocks
NIR removes most of this but undef instructions for loop header phis can
remain. These were harmless because ACO would DCE them itself.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Rhys Perry
638cbc21a1 aco: handle when ACO adds new continue edges
Usually a loop ends with a uniform continue. If it doesn't and we end up
adding our own continue edges (because of continue_or_break or divergent
breaks at the end), we have to add extra operands to the loop header phis.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Rhys Perry
f2c4878de9 aco: handle missing second predecessors at merge block phis
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Rhys Perry
f1a2e1df78 aco: set has_divergent_branch for discards in loops
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Andres Gomez
8bc3d6574c gitlab-ci: add python3-requests to the test-vk container
After 90a39af5f6 ("ci: Drop the git dependency in tracie"), we have
this error in the radv-polaris10-traces job:

"
...

+ /builds/tanty/mesa/artifacts/tracie/tests/test.sh
tracie_succeeds_if_all_images_match: Fail
Traceback (most recent call last):
  File "/tmp/tracie.test.glY0O23HJo/tracie.py", line 6, in <module>
    import requests
ModuleNotFoundError: No module named 'requests'

...
"

v2:
  - Updated commit log to be more descriptive (Michel).

Fixes: 90a39af5f6 ("ci: Drop the git dependency in tracie")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4237>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4237>
2020-03-23 17:17:56 +02:00
Samuel Pitoiset
7ac8bb33cd radv/llvm: fix subgroup shuffle for chips without bpermute
bpermute only exists on GFX8+ and only with Wave32 on GFX10. Instead
we have to use readlane with a waterfall loop to defeat the LLVM
backend.

This fixes DOOM Eternal which requires subgroup shuffle.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4284>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4284>
2020-03-23 14:19:03 +00:00
Roman Stratiienko
2a70a1d69d panfrost: Align Android makefiles with recent changes
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Roman Stratiienko <roman.stratiienko@nure.ua>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4280>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4280>
2020-03-23 14:03:22 +00:00
Samuel Pitoiset
6c8ccbe41b gitlab-ci: add a bunch of new fossils from the Sascha Vulkan demos
The whole fossils-db is only 448KB of data which is pretty small.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>
2020-03-23 12:16:02 +00:00
Samuel Pitoiset
48e920315c gitlab-ci: add a new stage for RADV CI
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>
2020-03-23 12:16:02 +00:00
Samuel Pitoiset
e22d562c17 gitlab-ci: compile fossils with more ASICs
I think we want to cover these 3 generations at the barely minimum.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>
2020-03-23 12:16:02 +00:00
Samuel Pitoiset
1517e58c1b gitlab-ci: compile fossils with both RADV compiler backends (LLVM/ACO)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>
2020-03-23 12:16:02 +00:00
Jan Zielinski
8b3b07afc0 gallium/gallivm: Remove workaround disabling AVX code for newer CPUs
The change enables using full 256-bit AVX and AVX2 instructions
on newer platforms.

Reviewed-by: Alok Hota <alok.hota@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4225>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4225>
2020-03-23 09:20:51 +00:00
Samuel Pitoiset
de550805c5 radv/winsys: spoof some values for num_render_backends in the null winsys
To avoid crashes when RADV_FORCE_FAMILY is set to GFX9+ because
num_render_backends is used to compute binning state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4282>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4282>
2020-03-23 09:50:53 +01:00
Samuel Pitoiset
b911af06cd radv/winsys: fix wrong PCI ID for Vega10 in the null winsys
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4282>
2020-03-23 09:50:51 +01:00
Eric Anholt
050ec8ff53 glsl: Restore the IsES flag on the shader when reading from cache.
I found that when trying to MESA_SHADER_CAPTURE_PATH a trace, I was
getting "GLSL >= 3.00" for the ES shaders I was trying to capture.
Keeping this metadata in the cached shader program lets us capture
correctly.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4219>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4219>
2020-03-22 20:49:37 -07:00
Dave Airlie
9e3efa4294 gallivm: add support for rgtc/latc fetches.
Annoyingly heaven uses rgtc2 snorm but this at least avoids
the function call overheads to the util fetch functions.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3924>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3924>
2020-03-23 11:02:03 +10:00
Dave Airlie
b3894e52c2 gallivm/s3tc: split out dxt5 alpha code
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3924>
2020-03-23 11:02:00 +10:00
Jordan Justen
f02ae69867 intel: Add TGL PCI ID
Ref: Bspec 44455
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-03-21 23:49:38 -07:00
Jordan Justen
1c6ef0165f intel: Update TGL PCI strings
Ref: Bspec 44455
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-03-21 23:49:34 -07:00
Alyssa Rosenzweig
d9d549ff88 pan/bi: Pack csel4 opcodes
These are pretty straightforward but there's a lot of details to keep
straight. In the IR, we keep a general logical comparator and types
separately; in the hardware, the type gets fused with a (much more)
limited number of comparators. So there's a fair bit of code here to
account for these differences, fusing in the type information, and
changing up argument order as necessary to make it actually correct.
Anything to save a bit!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
5cdc31abd6 pan/bi: Default csel to "!= 0" mode
This way we always have regular csel conditions instead of a weird
.always special case for 3-src CSEL mode.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
46f526eb1e pan/bi: Use bi_lookup_immediate when packing
This gets us part of the way there to packing lo/hi separately. A little
more work is needed to do this "properly", but hey.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
11bccb0564 pan/bi: Respect shift when printing immediates
We allow packing multiple immediates in, but we were missing this in the
print.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
3f786ed10b pan/bi: Implement csel fusing
When generating csel instructions, we can peak to see what condition is
being used. If we're using a "nice" condition, we can fuse it in with
the csel itself, ideally letting the condition itself be DCE'd away.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
5a02c871f2 pan/bi: Add soft NIR->BIR condition translation
We would like to use this routine opportunistically when fusing
conditions into csels and branches, so let's add a mode where we don't
abort.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
cd7fec782e pan/bi: Remove hacks for 1-bit booleans in IR
Now that we lower them away, a bunch of special cases disappear.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
12299dead7 pan/bi: Lower bool to ints
Currently we lower to int32, but once mediump lands we'll be ready for
that too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
1097c69087 pan/bi: Pack LD_ATTR
Also requires the usual R61/62 games.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
0be1116b81 pan/bi: Pack st_vary
This should let varying writes go through finally.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
9213b2520c pan/bi: Add store_channels property
It can't be inferred from the usual writemask since stores don't write
to a register destination.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
c57ac9d136 pan/bi: Generalize data register setting
So we can use it for stores too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
9458b017a9 pan/bi: Flesh out st_vary IR
We need to make the semantics of BI_VECTOR a bit more precise -
vectorize only the first argument, not all of them. This is enough for
current and future users, as far as I know.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
409e4f8a49 pan/bi: Pack ld_var_addr
Choo choo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
7321a17c6a pan/bi: Pack ld_ubo ops
Routes some infrastructure to do so at least slightly generically but
we'll see.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
908341ea3f pan/bi: Add bi_load32_components helper
Pattern seems to crop up a lot.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
8bb16138b6 pan/bi: Include UBO index for sysval reads
Trivially zero.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
fc0b49bb2c pan/bi: Index out constants in instructions
We rewrite BIR_INDEX_CONSTANT (and _ZERO) to preassigned constant ports
when assign uniform_const for the bundle. There are a lot of issues
raised here, unfortunately, and the implementation here is woefully
incomplete with a nasty hack for loads... nevertheless, it's somewhere
to start.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
d2d0de962e pan/bi: Document constant related errata(?)
We're not totally sure what's up with this but Connor says if you
violate it Bad Things happen in your shader. I think this might be an
issue affecting early Bifrost (G71, ..?); when we know more we can look
into patching in a fix.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
eb590a98d2 pan/bi: Pack a constant quadword
The piping isn't there to make use of it yet, but this stubs out
constant support at the clause level.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
50d3f4df45 pan/bi: Add move lowering pass
We need ALU mostly scalarized, but we get vector moves created from
lower_vec_to_mov so let's scalarize that ourselves rather than bother
NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
58a51c49bb pan/bi: Add bi_emit_before helper
For BIR lowering passes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:34 +00:00
Alyssa Rosenzweig
6b7077efda pan/bi: Implement FMA/MOV without modifiers
We split off MOV from FMOV since the canonical move on Bifrost doesn't
accept modifiers. (We can still do fmov, but with something like add-0.)
This will also make copyprop a little nicer, I think. Anyway, the
non-modifier version we can implement as-is for FMA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:34 +00:00
Jonathan Marek
f8bbf44ca4 etnaviv: nir: add compile_check_limits
To match TGSI compiler behaviour in glmark terrain scene for example.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4199>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4199>
2020-03-22 00:29:36 +00:00
Marek Olšák
303842b2db ac: fix fast division
This stopped working with LLVM 11 and might occasionally have been broken
on older LLVM, because the metadata was set on the mul, not on the rcp.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4268>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4268>
2020-03-21 22:34:17 +00:00
Eduardo Lima Mitev
55b0a676fd turnip: Instance can be NULL resolving 'GetInstanceProcAddr' entry point
Using turnip driver without a vulkan loader is currently broken because
the entry point resolver is expecting a valid instance when resolving
'vkGetInstanceProcAddr' through vk_icdGetInstanceProcAddr().

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4257>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4257>
2020-03-21 18:56:07 +01:00
Marek Olšák
5cc3ab0ba0 vbo,gallium: make glBegin/End buffer size configurable by drivers
The default is 512 KB, but radeonsi wants 4 MB.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4154>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4154>
2020-03-21 03:39:51 +00:00
Marek Olšák
11d3aa5e7b glthread: remove the marshal_fail XML attribute
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
c02a1347e5 glthread: ignore vertex arrays with user pointers if they're disabled
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
0b1dd18591 glthread: track which vertex array attribs are enabled
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
c571dda1e0 glthread: rename non_vbo helper functions
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
bde4505f61 glthread: handle buffer unbinding via glDeleteBuffers
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
15b0719ae2 mesa: put gl_thread_state inside gl_context to remove pointer indirection
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
8a4114b929 glthread: rename marshal.h/c to glthread_marshal.h and glthread_shaderobj.c
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
df74163995 glthread: move buffer functions into glthread_bufferobj.c
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
37725e6c38 glthread: autogenerate prototypes for custom-marshalled functions
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
4ded23a4ad glthread: simplify printing safe_mul in gl_marshal.py
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
01a50e2493 glthread: remove _mesa_post_marshal_hook, because it's not very useful
and also remove the useless forward declaration of enum marshal_dispatch_cmd_id.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Jason Ekstrand
aee004a7c8 util/sparse_array: Stash the node level in the node pointer
This reworks the data structure a bit and, in my view, simplifies it.
Instead of each node having a header which has the node level in it, we
use the bottom 6 bits of the pointer for that.  This requires us to
allocate with the os_malloc/free_aligned helpers (which call into
posix_memalign on Linux) but cache-line aligning our allocations is
actually probably a good thing given that we're doing atomics on them.

The primary advantages to doing this is that it changes the number of
memory accesses per tree level from 2 to 1 when walking the tree because
we no longer have to look at node->level.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>
2020-03-20 15:31:10 -05:00
Jason Ekstrand
6be65b0777 meson,ci: Disable sparse_array tests on windows
As soon as I switch to using the allocation helpers in os_memory.h,
these tests start blowing up on the Windows build in GitLab CI.  As far
as I can tell, the issue is something with the combination of the debug
allocator in u_debug_memory.c and the mutex implementation in the
version of Wine running in CI.  The tests don't fail on real windows nor
do they fail with newer versions of Wine.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>
2020-03-20 15:26:07 -05:00
Jason Ekstrand
9fcd8bdbfc util/sparse_array: Add a node_size_log2 temporary
We use this value several times.  It's probably best to encourage the
compiler to only read it once.  I have no proof that this actually makes
any performance improvement whatsoever.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>
2020-03-20 15:26:07 -05:00
Jason Ekstrand
7893872a6c util/sparse_array: Finish the sparse_array in the tests
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>
2020-03-20 15:26:07 -05:00
Eric Anholt
8edaa843ab ci: Move db820c and db410c's gles3 tests to manual, like radv did.
This should make these tests available for clicking on the web ui in
personal branches, while hiding them from marge and the post-merge CI
pipelines.  We had already disabled db410c's gles3, but it wasn't
available in the ui and you had to hack .gitalb-ci.yml.  db820c is now
being disabled by default, due to instaboots mentioned in
https://gitlab.freedesktop.org/mesa/mesa/issues/2649

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4247>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4247>
2020-03-20 18:27:37 +00:00
Mark Menzynski
866a8da2a4 tgsi/util: Change boolean for bool
I was getting errors with "boolean" when compiling. This patch changes
boolean to bool from <stdbool.h>.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3903>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3903>
2020-03-20 17:25:25 +00:00
Mark Menzynski
24e82e4533 util/blob: Add overwrite function for uint8
Overwrite function for this type  was missing and I needed it for my project.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3903>
2020-03-20 17:25:25 +00:00
Vasily Khoruzhick
1b49534df2 lima: add support for R and RG formats
Unfortunately these are not supported natively for sampling
so we have to lower them.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4241>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4241>
2020-03-20 17:00:10 +00:00
Vasily Khoruzhick
e763c6778c lima: split pixel and texel format tables
This is preparation for the next commit where we may need different
swap_r_b flags for pixel and texel formats.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4241>
2020-03-20 17:00:10 +00:00
Erik Faye-Lund
d4b0e28f62 zink/spirv: do not use bitwise operations on booleans
According to the SPIR-V specification, these operations require
integer-types. When bit_size is 1, we use booleans, which makes us emit
illegal code.

So let's fix the emitting to check if the first source is one bit wide.

For inot we can take a short-cut, and check the destination instead.
This doesn't work for ieq and ine, so let's not bother to do this
BINOP_LOG.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4036>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4036>
2020-03-20 16:37:30 +00:00
Michel Dänzer
130c0ba1cc gitlab-ci: Restrict s390x/ppc64el jobs to packet runners
They are hitting timeouts on the gstreamer runners now... *sigh*

Reviewed-by: Adam Jackson <ajax@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4233>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4233>
2020-03-20 16:39:17 +01:00
Rhys Perry
500842399a radv/winsys: set has_syncobj_wait_for_submit in the null winsys
Needed for Vulkan 1.1+

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4249>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4249>
2020-03-20 09:51:06 +00:00
Lionel Landwerlin
58deebe547 intel: add new TGL pci ids
Update following kernel : https://patchwork.freedesktop.org/patch/357921/

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bspec: 44455
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4248>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4248>
2020-03-20 10:55:57 +02:00
Samuel Pitoiset
2d3223ca90 radv: fix optional pSizes parameter when binding streamout buffers
The Vulkan spec 1.2.135 says:

   "pSizes is an optional array of buffer sizes, specifying the maximum
   number of bytes to capture to the corresponding transform feedback
   buffer. If pSizes is NULL, or the value of the pSizes array element
   is VK_WHOLE_SIZE, then the maximum bytes captured will be the size
   of the corresponding buffer minus the buffer offset."

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2650
Fixes: b4eb029062 ("radv: implement VK_EXT_transform_feedback")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4232>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4232>
2020-03-20 09:25:14 +01:00
Caio Marcelo de Oliveira Filho
fdc6032928 mesa/main: Fix overflow in validation of DispatchComputeGroupSizeARB
An uint64_t can store the result of multiplying two GLuint (uint32_t),
so use that property to check for overflow when calculating the total.

Change the error message so we don't need to care about the actual
total -- which means we don't need a larger than 64-bit value to hold
it.

Fixes: 45ab63c0cb ("mesa/main: add support for ARB_compute_variable_groups_size")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4240>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4240>
2020-03-20 03:07:45 +00:00
Marek Olšák
4ac1d3cc45 driconf: enable glthread for "From The Depths"
25% perf improvement

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4254>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4254>
2020-03-19 21:27:01 -04:00
Marek Olšák
7a59d6eaa2 winsys/radeon: change to 3-space indentation
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4192>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4192>
2020-03-19 20:33:01 -04:00
Marek Olšák
b13d5265cc glthread: don't declare unmarshal functions as inline
They are never inlined.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
efaeac9e84 glthread: clean up debug_print_sync code
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
b00d219ec0 glthread: remove debug_print_marshal function
We don't need to print every function we execute.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
951c6acb07 glthread: don't execute any custom VAO and BindBuffer code in the Core profile
It's not needed, because user pointers can never occur there.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
87f6be4456 glthread: track VAOs created by CreateVertexArrays
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
720f34d5eb glthread: enable display lists
They seem to work fine.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
4dcdf974f8 glthread: align the batch buffer to 8 bytes for pointers and doubles again
This was changed when I switched to types from size_t to int.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
ff0881c686 mesa: remove redundant api_loopback functions
vbo_attrib_tmp.h implements them, so this loopback code isn't needed
and shouldn't be used.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4123>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4123>
2020-03-19 23:24:08 +00:00
Marek Olšák
98d1197233 mesa: use vbo_attrib_tmp.h to generate display list vertex attrib functions
This removes about 1150 lines of code.

The diff is messy, but the new code really starts with save_Attr32bit and
below. Ignore false Eval/Material/Begin changes etc. Git can't figure out
what was really changed. I didn't change them.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4123>
2020-03-19 23:24:08 +00:00
Jason Ekstrand
3252041a78 anv: Only add END_OF_PIPE_SYNC if we actually have AUX_INVAL
Fixes: 43dc842cb9 "anv: Wait for the GPU to be idle before..."
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: D Scott Phillips <d.scott.phillips@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4234>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4234>
2020-03-19 21:58:49 +00:00
Eric Anholt
5b57aa79e2 freedreno: Switch to exposing only half-integer pixel centers.
This is what the HW provides us.  If we need integer pixel centers, we
want the state tracker to do the lowering pass so that it gets to optimize
on the subtract.  This is also the shader instructions that the blob is
doing on GLES, and is what Vulkan wants too, as was noted in MR !4172.

shader-db on a630:
total instructions in shared programs: 186689 -> 186168 (-0.28%)
total nops in shared programs: 66253 -> 66139 (-0.17%)
total non-nops in shared programs: 120436 -> 120029 (-0.34%)
total dwords in shared programs: 292192 -> 291168 (-0.35%)
total last-baryf in shared programs: 4810 -> 4734 (-1.58%)
total full in shared programs: 10176 -> 10195 (0.19%)
total constlen in shared programs: 54589 -> 54575 (-0.03%)
total sstall in shared programs: 24582 -> 24802 (0.89%)
total (ss) in shared programs: 3921 -> 3925 (0.10%)
total (sy) in shared programs: 1934 -> 1923 (-0.57%)

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4223>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4223>
2020-03-19 21:35:49 +00:00
John Stultz
5c8ba96a54 r600: Fix build error in sfn_nir_lower_fs_out_to_vector.cpp
In trying a full build under AOSP, I ran into the following error:

In file included from external/mesa3d/src/gallium/drivers/r600/sfn/sfn_nir_lower_fs_out_to_vector.cpp:33:
external/libcxx/include/set:942:26: error: the specified comparator type does not provide a const call operator [-Werror,-Wuser-defined-warnings]
    static_assert(sizeof(__diagnose_non_const_comparator<_Key, _Compare>()), "");
                         ^
external/mesa3d/src/gallium/drivers/r600/sfn/sfn_nir_lower_fs_out_to_vector.cpp:78:34: note: in instantiation of template class 'std::__1::multiset<nir_intrinsic_ins
tr *, r600::nir_intrinsic_instr_less, std::__1::allocator<nir_intrinsic_instr *> >' requested here
   using InstrSubSet = std::pair<InstrSet::iterator, InstrSet::iterator>;
                                 ^
external/libcxx/include/__tree:967:5: note: from 'diagnose_if' attribute on '__diagnose_non_const_comparator<nir_intrinsic_instr *, r600::nir_intrinsic_instr_less>':
    _LIBCPP_DIAGNOSE_WARNING(!std::__invokable<_Compare const&, _Tp const&, _Tp const&>::value,
    ^                        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
external/libcxx/include/__config:1244:21: note: expanded from macro '_LIBCPP_DIAGNOSE_WARNING'
     __attribute__((diagnose_if(__VA_ARGS__, "warning")))
                    ^           ~~~~~~~~~~~
1 error generated.

Which is pretty opaque to me, but searching the web suggested
adding a cost, which seems to resovle it.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175>
2020-03-19 21:20:08 +00:00
John Stultz
0df48e5d1f vc4_bufmgr: Remove duplicative VC definition
This is already defined in
  src/broadcom/cle/v3d_packet_helpers.h:42:9

And was causing build issues in AOSP when building with mmma

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175>
2020-03-19 21:20:08 +00:00
John Stultz
e3bbe1fa65 etnaviv: Avoid shift overflow
Building with AOSP I'm seeing:

external/mesa3d/src/gallium/drivers/etnaviv/etnaviv_screen.c:245:31: error: signed shift result (0x100000000) requires 34 bits to represent, but 'int' only has 32 bits [-Werror,-Wshift-overflow]
         system_memory = 4096 << 20;

system_memory is a uint_64t, so this patch addresses the issue
by casting 4096 to a unint_64t before the shift is done.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175>
2020-03-19 21:20:08 +00:00
John Stultz
511c6408f4 Android.mk: Tweak MESA_ENABLE_LLVM checks
Change the MESA_ENABLE_LLVM checks in Android.mk
files in order to get mesa3d to build w/ AOSP
using mmma.

This tries to re-create a change that was introduced
in the following merge in the AOSP branch:
  69f2c0128d2b Merge branch 'aosp/upstream-18.0'

Acked-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175>
2020-03-19 21:20:08 +00:00
Jason Ekstrand
9dbff6f6ce intel/iris: Always initialize CCS to 0
Previously, we were initializing the CCS to 0xFF for MCS+CCS due to a
misunderstanding of the following lines in the bspec:

    The following are the general SW requirements for MCS buffer clear
    functionality:
        ...
         - If Software wants to enable Color Compression without Fast
           clear, Software needs to initialize MCS with zeros.
         - Lossless compression and CCS initialized to all F (using HW
           Fast Clear or SW direct Clear) on the same surface is not
           supported.

The first line does not refer to the CCS as the comment author supposed
but refers to the MCS as the comment says.  It means that if you want to
use MCS compression without a fast-clear, you should initialize the MCS
to 0x00.  This is because the value 0x00 in the MCS means "all data is
in plane 0" which is a perfectly valid non-fast-clear initialization.
It's also the value the MCS should be in if you do a RECTLIST slow-clear
where the primitive fully covers each pixel such that the same value is
written to all samples.

The second line in the above quote seems to imply that CCS fast-clear is
incompatible with MCS fast-clear.  In particular, MCS+CCS fast-clear
uses a 0xff value in the MCS (like on Gen7-11) and leaves the CCS in
either the compressed or the pass-through state.  Therefore, we should
initialize the CCS to 0x00 even for MCS+CCS surfaces.

Reviewed-by: Sagar Ghuge<sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4074>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4074>
2020-03-19 20:54:19 +00:00
Lionel Landwerlin
507abc3959 isl: drop min row pitch alignment when set by the driver
When the caller of the isl_surf_init() specifies a row pitch, do not
consider the minimum CCS requirement if it's incompatible with the
caller's value.

isl_surf_get_ccs_surf() will check that the main surface alignment
matches CCS expectations.

v2: Simplify checks (Nanley)

v3: Add Comment about isl_surf_get_ccs_surf() (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Fixes: a3f6db2c4e ("isl: drop CCS row pitch requirement for linear surfaces")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
2020-03-19 19:17:10 +00:00
Lionel Landwerlin
def3470e9b isl: only apply main surface ccs pitch constraint with CCS
We could be creating a Y-tiled surface that isn't going to use CCS
(this could be the case when clearly indicated through modifiers).
Don't apply the main surface pitch alignment constraint in that case.

v2: Use logical NOT (Sagar)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a3f6db2c4e ("isl: drop CCS row pitch requirement for linear surfaces")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
2020-03-19 19:17:10 +00:00
Lionel Landwerlin
dab0aadea9 isl: properly filter supported display modifiers on Gen9+
Y tiling is supported for display on Gen9+ so don't filter it from the
possible flags.

v2: Drop Yf from display supported tilings on Gen12+ (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
2020-03-19 19:17:10 +00:00
Lionel Landwerlin
157a3cf3ec isl: implement linear tiling row pitch requirement for display
We're missing a requirement for alignment of row pitch for the display
HW. In linear tiling, the row pitch must be a 64bytes aligned.

v2: Use correct formula to align to 64bytes (Chad)

v3: Matching {} (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
2020-03-19 19:17:10 +00:00
Eric Anholt
f778c48869 ci: Only run the freedreno baremetal tests when freedreno/core changes.
Same as we do for a630 (docker) tests.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4229>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4229>
2020-03-19 17:21:24 +00:00
Dylan Baker
7524717ba2 docs/release-calendar: Add calendar for 20.1 Release candidates
It's time to start getting the calendar going for 20.1 so that everyone
is clear on when the close date for new features is. Eric Engstrom has
agreed to help out with the 20.1 series, and will be the primary point,
he's also helping out with a few of the 20.0.x point releases.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4077>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4077>
2020-03-19 09:26:11 -07:00
Rhys Perry
cf62c2b2ac radv: call nir_shader_gather_info again
pipeline-db (Navi, ACO):
Totals from affected shaders:
SGPRS: 11840 -> 11840 (0.00 %)
VGPRS: 19012 -> 19124 (0.59 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 3696 -> 3696 (0.00 %) dwords per thread
Code Size: 998680 -> 921388 (-7.74 %) bytes
LDS: 19646 -> 19646 (0.00 %) blocks
Max Waves: 3398 -> 3401 (0.09 %)

pipeline-db (Navi, LLVM):
Totals from affected shaders:
SGPRS: 17016 -> 17128 (0.66 %)
VGPRS: 19564 -> 14876 (-23.96 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 3872 -> 3872 (0.00 %) dwords per thread
Code Size: 820416 -> 743576 (-9.37 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 3367 -> 3534 (4.96 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4193>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4193>
2020-03-19 15:37:07 +00:00
Rhys Perry
5193688e1a nir/gather_info: handle emit_vertex_with_counter
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4193>
2020-03-19 15:37:07 +00:00
Tomasz Pyra
36ec3cbcf8 gallium/swr: spin-lock performance improvement
Currently, the worker threads are very aggresively
polling for new tasks. If the work is not constantly
fed into the pipeline (which is a case for most of
interactive applications), this creates unnecessary
memory pressure and is using CPU cycles that
could otherwise be used by the applications.
The change implements simple back off mechanism
to help with this problem

Change by Tomasz Pyra (tomasz.pyra@intel.com)

Reviewed-by: Alok Hota <alok.hota@intel.com>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4226>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4226>
2020-03-19 11:11:26 +00:00
Pierre-Eric Pelloux-Prayer
db5cc6a7dd radeonsi: enable glsl_zero_init for Curse of the Dead Gods
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2598
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4214>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4214>
2020-03-19 08:47:09 +01:00
Marek Olšák
3c03718fd7 nir: fix clip/cull_distance_array_size in nir_lower_clip_cull_distance_arrays
This fixes a GPU hang on radeonsi.

It only works if optimizations have already been run.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4194>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4194>
2020-03-19 01:47:28 -04:00
Alyssa Rosenzweig
73812999d9 pan/bi: Pack BI_BLEND
MRT not yet supported to keep things easy.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
a4fb88723e pan/bi: Flesh out BI_BLEND
It ingests the output of ATEST, whatever that actually is.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
e06426ea85 pan/bi: Add ATEST packing
Only fp32 for now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
b18d0ef708 pan/bi: Flesh out ATEST in IR
ATEST actually takes two sources and has a destination. Although the
details are a little funny, we should still model this correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
61260819ba pan/bi: Track clause types during scheduling
There's an easy mapping for this, so let's do it. Note we do this at
schedule-time instead of emit since we'll need to lookahead clause
types. The alternative is a prepass running after schedule but before
codegen, but there's no reason not to just stick it here when we're
preparing bi_clause in the first place.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
e323df05a9 pan/bi: Don't hide SCHED_ADD inside HI_LATENCY
It makes bitwise property checking annoying.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
d797822d31 pan/bi: Pretty-print clause types in disassembler
Also note that type=1 is for load_vary.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
42af9f47c8 pan/bi: Route through clause header
We already track almost all the information we need, let's dump it onto
the wire now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
d4fbf751cf pan/bi: Skip over data registers in port assignment
They bypass the usual mechanism entirely, let's add some props to
describe this and respect them.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
32e5a7e6e9 pan/bi: Emit load_vary ops
Annoyingly long code to do so, but this should theoretically work for
both direct and indirect load_vary. Still need to handle destination.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
37f14c9e50 pan/bi: Pass second src for load_vary ops
For direct, this is just 0, but for indirct, this is a sample mask
preloaded in R61. Handle this at code emit time instead of trying to do
crazy monkeypatching later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
265169f48a pan/bi: Generalize bi_get_src a bit
Allow it to work with ADD ops and stub out some immediate fetching
infrastructure (currently only works with 0).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
1c0e786084 pan/bi: List ADD classes in bi_pack_add
Handling will be... somewhat tricky.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
6069904bbd pan/bi: Pack fadd32
Choo choo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
f2afcc6101 pan/bi: Pack BI_FMA ops
This is our first instruction we've emitted, requiring us to pipe
through registes/ports and various details from the IR. It's quite a bit
of code, but overall I'm happy with this structure. With some tedium we
should be able to emit the rest of the ALU ops this way, too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
8a3bf3f1a1 pan/bi: Add struct bifrost_fma_fma
So we can pack regular FMA ops.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
cd40e189b6 pan/bi: Model 3-bit Bifrost srcs in IR
We'll want to set these manually for schedule-time passthrough, as well
as use the enum for packing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
fe379776c7 pan/bi: Route through first_instruction field
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
90ca6a9a6b pan/bi: Assign registers to ports
Now that we can pack registers given the assigned ports, and we can
assign registers from the indices, the missing link is assigning ports
from the registers, and now finally we get some real data showing up in
a disassembly exercising lots of different code paths.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
ff39f57a48 pan/bi: Add missing __attribute__((packed))
That this code worked before makes me rather nervous...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
9080ea8b57 pan/bi: Pack register fields
Now that we have ctrl, the rest is natural... sorta.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
03a271bf15 pan/bi: Add packing for register control field
Filling in some gaps based on intuition from the bit patterns but this
should be vaguely right. More investigation needed down the line.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
50bce53cd0 pan/bi: Sketch out instruction word packing
Instructions are 78-bits with some seriously suspicious packing
requirements but hey, gotta save 'em bits.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
9269c85578 pan/bi: Setup initial clause packing
At the moment, we just iterate the clauses in the post-RA, post-sched IR
and generate a dummy clause corresponding, passing the results to the
disassembler to verify.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Dylan Baker
0c5aab626b docs: update calendar, add news item, and link releases notes for 20.0.2
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4236>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4236>
2020-03-18 22:47:06 +00:00
Dylan Baker
3c572fa571 docs/relnotes: Add sha256 sums for 20.0.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4236>
2020-03-18 22:47:06 +00:00
Dylan Baker
552078aec6 Docs: Add release notes for 20.0.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4236>
2020-03-18 22:47:06 +00:00
Eric Anholt
3210214b67 ci: Disable tests that showed intermittent fails on a530 in day 1.
Link: https://gitlab.freedesktop.org/mesa/mesa/issues/2649
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4231>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4231>
2020-03-18 22:17:53 +00:00
Eric Anholt
116a3ac481 ci: Ban the recent popular freedreno a630 flakes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4231>
2020-03-18 22:17:53 +00:00
Samuel Pitoiset
56de6f698e radv: remove wrong assert that checks compute subgroup size
Ooops. For some reasons, I have been confused with Wave32 on GFX10,
but it's still possible to require a specific subgroup size if
only Wave64 is supported.

Fixes: 672d106199 ("radv/gfx10: fix required subgroup size with VK_EXT_subgroup_size_control")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4227>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4227>
2020-03-18 21:31:47 +00:00
Jason Ekstrand
46187bb54f anv: Swizzle fast-clear values
Starting with Gen12, we can fast-clear a lot more surface formats and we
are suddenly in the position of having to fast-clear surfaces with
formats with an implicit swizzle such as VK_FORMAT_R4G4B4A4_UNORM_PACK16
which is represented as ISL_FORMAT_A4B4G4R4 with a BGRA swizzle.  In
order for blorp to do the fast-clear color conversion for us, it needs
a properly swizzled color.

This fixes the following Vulkan CTS groups on TGL:

 - dEQP-VK.pipeline.blend.format.b4g4r4a4_unorm_pack16.*
 - dEQP-VK.api.image_clearing.core.clear_color_image.*.b4g4r4a4*

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4218>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4218>
2020-03-18 21:05:07 +00:00
Jason Ekstrand
3fb8f19481 intel/blorp: Add support for swizzling fast-clear colors
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4218>
2020-03-18 21:05:07 +00:00
Ian Romanick
bf2eb3e0ee soft-fp64: Split a block that was missing a cast on a comparison
This function has code like:

   if (0x7FD <= zExp) {
      if ((0x7FD < zExp) ||
         ((zExp == 0x7FD) &&
            (0x001FFFFFu == zFrac0 && 0xFFFFFFFFu == zFrac1) &&
               increment)) {
         ...
	 return ...;
      }
      if (zExp < 0) {

I saw that, and I thought, "Uh... what?  Dead code?"  I thought it was a
bit fishy, so I grabbed the Berkeley SoftFloat Library 3e code, and
there is similar code in softfloat_roundPackToF64
(source/s_roundPackToF64.c), but it has an extra (uint16_t) cast in the
first comparison.  This is basicially a shortcut for

   if (zExp < 0 || zExp >= 0x7FD) {

So, having the nesting kind of makes sense. On a CPU, nesting the flow
control can be an optimization.  On a GPU, it's just fail.  Split the
block so that we don't need the uint16_t cast magic.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 683638 -> 658127 (-3.73%)
instructions in affected programs: 666839 -> 641328 (-3.83%)
helped: 92
HURT: 0
helped stats (abs) min: 26 max: 2456 x̄: 277.29 x̃: 144
helped stats (rel) min: 3.21% max: 4.22% x̄: 3.79% x̃: 3.90%
95% mean confidence interval for instructions value: -345.84 -208.75
95% mean confidence interval for instructions %-change: -3.86% -3.73%
Instructions are helped.

total cycles in shared programs: 5458858 -> 5344600 (-2.09%)
cycles in affected programs: 5360114 -> 5245856 (-2.13%)
helped: 92
HURT: 0
helped stats (abs) min: 126 max: 10300 x̄: 1241.93 x̃: 655
helped stats (rel) min: 1.71% max: 2.37% x̄: 2.12% x̃: 2.17%
95% mean confidence interval for cycles value: -1539.93 -943.94
95% mean confidence interval for cycles %-change: -2.16% -2.08%
Cycles are helped.

Fixes: f111d72596 ("glsl: Add "built-in" functions to do add(fp64, fp64)")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
a8882132f9 soft-fp64/fadd: Common code optimization for differing sign case
This is basically the same ideas from the previous 4 commits applied
to the aSign != bSign part... and all smashed into one commit.

The shader hurt for spill and / or fills is from
KHR-GL46.gpu_shader_fp64.builtin.inverse_dmat4.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake
total instructions in shared programs: 787258 -> 683638 (-13.16%)
instructions in affected programs: 725435 -> 621815 (-14.28%)
helped: 74
HURT: 0
helped stats (abs) min: 152 max: 10261 x̄: 1400.27 x̃: 975
helped stats (rel) min: 11.61% max: 20.92% x̄: 15.40% x̃: 14.86%
95% mean confidence interval for instructions value: -1740.11 -1060.43
95% mean confidence interval for instructions %-change: -16.01% -14.79%
Instructions are helped.

total cycles in shared programs: 6483227 -> 5458858 (-15.80%)
cycles in affected programs: 6051245 -> 5026876 (-16.93%)
helped: 74
HURT: 0
helped stats (abs) min: 1566 max: 95474 x̄: 13842.82 x̃: 9757
helped stats (rel) min: 13.94% max: 23.26% x̄: 17.98% x̃: 17.57%
95% mean confidence interval for cycles value: -17104.25 -10581.40
95% mean confidence interval for cycles %-change: -18.61% -17.35%
Cycles are helped.

total spills in shared programs: 553 -> 445 (-19.53%)
spills in affected programs: 553 -> 445 (-19.53%)
helped: 1
HURT: 0

total fills in shared programs: 1307 -> 1323 (1.22%)
fills in affected programs: 1307 -> 1323 (1.22%)
helped: 0
HURT: 1

Ice Lake
total instructions in shared programs: 781216 -> 678470 (-13.15%)
instructions in affected programs: 720088 -> 617342 (-14.27%)
helped: 74
HURT: 0
helped stats (abs) min: 153 max: 8863 x̄: 1388.46 x̃: 975
helped stats (rel) min: 11.24% max: 21.03% x̄: 15.47% x̃: 15.01%
95% mean confidence interval for instructions value: -1703.57 -1073.35
95% mean confidence interval for instructions %-change: -16.09% -14.85%
Instructions are helped.

total cycles in shared programs: 6464085 -> 5453997 (-15.63%)
cycles in affected programs: 6031771 -> 5021683 (-16.75%)
helped: 74
HURT: 0
helped stats (abs) min: 1552 max: 90317 x̄: 13649.84 x̃: 9650
helped stats (rel) min: 13.84% max: 23.11% x̄: 17.83% x̃: 17.41%
95% mean confidence interval for cycles value: -16802.89 -10496.79
95% mean confidence interval for cycles %-change: -18.46% -17.21%
Cycles are helped.

total spills in shared programs: 279 -> 368 (31.90%)
spills in affected programs: 279 -> 368 (31.90%)
helped: 0
HURT: 1

total fills in shared programs: 973 -> 1155 (18.71%)
fills in affected programs: 973 -> 1155 (18.71%)
helped: 0
HURT: 1

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
2d1216a039 soft-fp64/fadd: Move common code out of both branches of an if-statement
The previous two commits were just setting the scene for this change.

The mix(..., __propagateFloat64NaN(a, b), propagate) statements are not
identical in the two halves, but they are equivalent.  The first clause
of the mix in the else-branch is trivally ±Inf.  The first clause in the
then-branch __packFloat64(aSign, aExp, aFracHi, aFracLo).  The
preceeding conditions prove that aExp=0x7ff, aFracHi=0, and aFracLo=0.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 819560 -> 787258 (-3.94%)
instructions in affected programs: 757737 -> 725435 (-4.26%)
helped: 74
HURT: 0
helped stats (abs) min: 43 max: 3545 x̄: 436.51 x̃: 296
helped stats (rel) min: 3.54% max: 6.16% x̄: 4.52% x̃: 4.36%
95% mean confidence interval for instructions value: -548.42 -324.61
95% mean confidence interval for instructions %-change: -4.68% -4.37%
Instructions are helped.

total cycles in shared programs: 6817254 -> 6483227 (-4.90%)
cycles in affected programs: 6385272 -> 6051245 (-5.23%)
helped: 74
HURT: 0
helped stats (abs) min: 430 max: 33271 x̄: 4513.88 x̃: 3047
helped stats (rel) min: 4.28% max: 7.45% x̄: 5.48% x̃: 5.31%
95% mean confidence interval for cycles value: -5610.46 -3417.30
95% mean confidence interval for cycles %-change: -5.65% -5.32%
Cycles are helped.

total spills in shared programs: 591 -> 553 (-6.43%)
spills in affected programs: 591 -> 553 (-6.43%)
helped: 1
HURT: 0

total fills in shared programs: 1353 -> 1307 (-3.40%)
fills in affected programs: 1353 -> 1307 (-3.40%)
helped: 1
HURT: 0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
16dfd06472 soft-fp64/fadd: Use absolute value of expDiff
In one branch we know that expDiff is already positive.

In the other branch we know the expDiff is negative.  Previously in that
branch the code was -(expDiff + 1).  This is equvialent to (-expDiff) -
1, and since expDiff is negative, abs(expDiff) - 1.

The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 818246 -> 819560 (0.16%)
instructions in affected programs: 756423 -> 757737 (0.17%)
helped: 1
HURT: 73
helped stats (abs) min: 1205 max: 1205 x̄: 1205.00 x̃: 1205
helped stats (rel) min: 1.36% max: 1.36% x̄: 1.36% x̃: 1.36%
HURT stats (abs)   min: 2 max: 149 x̄: 34.51 x̃: 27
HURT stats (rel)   min: 0.14% max: 1.09% x̄: 0.41% x̃: 0.30%
95% mean confidence interval for instructions value: -16.56 52.07
95% mean confidence interval for instructions %-change: 0.30% 0.47%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 6816686 -> 6817254 (<.01%)
cycles in affected programs: 6384704 -> 6385272 (<.01%)
helped: 37
HURT: 37
helped stats (abs) min: 30 max: 5790 x̄: 289.05 x̃: 102
helped stats (rel) min: 0.04% max: 0.86% x̄: 0.29% x̃: 0.31%
HURT stats (abs)   min: 2 max: 1020 x̄: 304.41 x̃: 232
HURT stats (rel)   min: <.01% max: 1.58% x̄: 0.55% x̃: 0.43%
95% mean confidence interval for cycles value: -165.37 180.72
95% mean confidence interval for cycles %-change: <.01% 0.27%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 705 -> 591 (-16.17%)
spills in affected programs: 705 -> 591 (-16.17%)
helped: 1
HURT: 0

total fills in shared programs: 1501 -> 1353 (-9.86%)
fills in affected programs: 1501 -> 1353 (-9.86%)
helped: 1
HURT: 0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
da3fa01891 soft-fp64/fadd: Rename aFrac and bFrac variables
Exchanging aFracHi / bFracHi and aFracLo / bFracLo should not affect the
result of the later call to __add64.

The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

v2: Fix a typo in a comment.  Noticed by Matt.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 812094 -> 818246 (0.76%)
instructions in affected programs: 750271 -> 756423 (0.82%)
helped: 0
HURT: 74
HURT stats (abs)   min: 7 max: 520 x̄: 83.14 x̃: 59
HURT stats (rel)   min: 0.52% max: 1.48% x̄: 0.89% x̃: 0.84%
95% mean confidence interval for instructions value: 63.96 102.31
95% mean confidence interval for instructions %-change: 0.83% 0.95%
Instructions are HURT.

total cycles in shared programs: 6797157 -> 6816686 (0.29%)
cycles in affected programs: 6365175 -> 6384704 (0.31%)
helped: 0
HURT: 74
HURT stats (abs)   min: 16 max: 1690 x̄: 263.91 x̃: 181
HURT stats (rel)   min: 0.14% max: 0.68% x̄: 0.32% x̃: 0.27%
95% mean confidence interval for cycles value: 199.74 328.07
95% mean confidence interval for cycles %-change: 0.29% 0.36%
Cycles are HURT.

total spills in shared programs: 703 -> 705 (0.28%)
spills in affected programs: 703 -> 705 (0.28%)
helped: 0
HURT: 1

total fills in shared programs: 1499 -> 1501 (0.13%)
fills in affected programs: 1499 -> 1501 (0.13%)
helped: 0
HURT: 1

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
3c9ff97215 soft-fp64/fadd: Combine an if-statement into the preceeding else-clause
The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 812590 -> 812094 (-0.06%)
instructions in affected programs: 672135 -> 671639 (-0.07%)
helped: 57
HURT: 0
helped stats (abs) min: 1 max: 32 x̄: 8.70 x̃: 7
helped stats (rel) min: <.01% max: 0.49% x̄: 0.12% x̃: 0.09%
95% mean confidence interval for instructions value: -10.46 -6.94
95% mean confidence interval for instructions %-change: -0.15% -0.09%
Instructions are helped.

total cycles in shared programs: 6798039 -> 6797157 (-0.01%)
cycles in affected programs: 5810059 -> 5809177 (-0.02%)
helped: 54
HURT: 2
helped stats (abs) min: 2 max: 68 x̄: 16.44 x̃: 12
helped stats (rel) min: <.01% max: 0.12% x̄: 0.03% x̃: 0.02%
HURT stats (abs)   min: 2 max: 4 x̄: 3.00 x̃: 3
HURT stats (rel)   min: <.01% max: <.01% x̄: <.01% x̃: <.01%
95% mean confidence interval for cycles value: -19.50 -12.00
95% mean confidence interval for cycles %-change: -0.03% -0.02%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
480565812c soft-fp64/fadd: Reformat after previous commit
Convert

   } else if (...) {
      ...
   } else {
      ...
   }

to

   } else {
      if (...) {
         ...
      } else {
         ...
      }
   }

Not doing this reformatting in the previous commit makes the previous
commit easier to review, and doing it before the next commit makes the
next commit easier to review.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
9496a67eec soft-fp64/fadd: Delete a redundant condition check
Previous condition checks already guaranteen that expDiff != 0 and
!(expDiff > 0), so expDiff < 0 is the only option left.

The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 815491 -> 812590 (-0.36%)
instructions in affected programs: 753668 -> 750767 (-0.38%)
helped: 74
HURT: 0
helped stats (abs) min: 3 max: 281 x̄: 39.20 x̃: 25
helped stats (rel) min: 0.29% max: 0.73% x̄: 0.42% x̃: 0.40%
95% mean confidence interval for instructions value: -48.50 -29.91
95% mean confidence interval for instructions %-change: -0.45% -0.40%
Instructions are helped.

total cycles in shared programs: 6813681 -> 6798039 (-0.23%)
cycles in affected programs: 6381699 -> 6366057 (-0.25%)
helped: 74
HURT: 0
helped stats (abs) min: 24 max: 1488 x̄: 211.38 x̃: 149
helped stats (rel) min: 0.20% max: 0.44% x̄: 0.26% x̃: 0.25%
95% mean confidence interval for cycles value: -261.68 -161.08
95% mean confidence interval for cycles %-change: -0.28% -0.25%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
7078105592 soft-fp64/fadd: Just let the subtraction happen when the result will be zero
The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 815717 -> 815491 (-0.03%)
instructions in affected programs: 735489 -> 735263 (-0.03%)
helped: 39
HURT: 34
helped stats (abs) min: 2 max: 192 x̄: 20.79 x̃: 12
helped stats (rel) min: 0.01% max: 0.46% x̄: 0.26% x̃: 0.28%
HURT stats (abs)   min: 1 max: 65 x̄: 17.21 x̃: 11
HURT stats (rel)   min: <.01% max: 1.11% x̄: 0.35% x̃: 0.19%
95% mean confidence interval for instructions value: -10.40 4.21
95% mean confidence interval for instructions %-change: -0.07% 0.13%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 6820707 -> 6813681 (-0.10%)
cycles in affected programs: 6388725 -> 6381699 (-0.11%)
helped: 51
HURT: 23
helped stats (abs) min: 3 max: 1837 x̄: 184.76 x̃: 120
helped stats (rel) min: <.01% max: 0.48% x̄: 0.25% x̃: 0.25%
HURT stats (abs)   min: 18 max: 216 x̄: 104.22 x̃: 98
HURT stats (rel)   min: 0.06% max: 0.73% x̄: 0.31% x̃: 0.11%
95% mean confidence interval for cycles value: -154.67 -35.22
95% mean confidence interval for cycles %-change: -0.15% <.01%
Inconclusive result (%-change mean confidence interval includes 0).

total spills in shared programs: 702 -> 703 (0.14%)
spills in affected programs: 702 -> 703 (0.14%)
helped: 0
HURT: 1

total fills in shared programs: 1497 -> 1499 (0.13%)
fills in affected programs: 1497 -> 1499 (0.13%)
helped: 0
HURT: 1

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
cae36fa217 soft-fp64/fadd: Pick zero or non-zero result based on subtraction result
The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 817327 -> 815717 (-0.20%)
instructions in affected programs: 755504 -> 753894 (-0.21%)
helped: 73
HURT: 1
helped stats (abs) min: 1 max: 159 x̄: 22.12 x̃: 14
helped stats (rel) min: 0.05% max: 0.40% x̄: 0.22% x̃: 0.23%
HURT stats (abs)   min: 5 max: 5 x̄: 5.00 x̃: 5
HURT stats (rel)   min: 0.07% max: 0.07% x̄: 0.07% x̃: 0.07%
95% mean confidence interval for instructions value: -27.27 -16.24
95% mean confidence interval for instructions %-change: -0.24% -0.20%
Instructions are helped.

total cycles in shared programs: 6822826 -> 6820707 (-0.03%)
cycles in affected programs: 6390844 -> 6388725 (-0.03%)
helped: 71
HURT: 3
helped stats (abs) min: 2 max: 537 x̄: 30.72 x̃: 18
helped stats (rel) min: <.01% max: 0.08% x̄: 0.03% x̃: 0.03%
HURT stats (abs)   min: 10 max: 32 x̄: 20.67 x̃: 20
HURT stats (rel)   min: 0.01% max: 0.02% x̄: 0.02% x̃: 0.02%
95% mean confidence interval for cycles value: -43.41 -13.86
95% mean confidence interval for cycles %-change: -0.04% -0.03%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
70be98f17a soft-fp64/fadd: Massively split the live range of zFrac0 and zFrac1
The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 822766 -> 817327 (-0.66%)
instructions in affected programs: 760943 -> 755504 (-0.71%)
helped: 74
HURT: 0
helped stats (abs) min: 8 max: 515 x̄: 73.50 x̃: 51
helped stats (rel) min: 0.58% max: 1.10% x̄: 0.77% x̃: 0.73%
95% mean confidence interval for instructions value: -91.17 -55.83
95% mean confidence interval for instructions %-change: -0.81% -0.74%
Instructions are helped.

total cycles in shared programs: 6816791 -> 6822826 (0.09%)
cycles in affected programs: 6384809 -> 6390844 (0.09%)
helped: 0
HURT: 74
HURT stats (abs)   min: 6 max: 1179 x̄: 81.55 x̃: 50
HURT stats (rel)   min: 0.02% max: 0.17% x̄: 0.09% x̃: 0.09%
95% mean confidence interval for cycles value: 48.99 114.12
95% mean confidence interval for cycles %-change: 0.09% 0.10%
Cycles are HURT.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
73fa3a1ca4 soft-fp64/fadd: Instead of tracking "b < a", track sign of the difference
Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 824403 -> 822766 (-0.20%)
instructions in affected programs: 756260 -> 754623 (-0.22%)
helped: 68
HURT: 1
helped stats (abs) min: 1 max: 118 x̄: 26.26 x̃: 18
helped stats (rel) min: 0.02% max: 0.97% x̄: 0.31% x̃: 0.23%
HURT stats (abs)   min: 149 max: 149 x̄: 149.00 x̃: 149
HURT stats (rel)   min: 0.17% max: 0.17% x̄: 0.17% x̃: 0.17%
95% mean confidence interval for instructions value: -31.94 -15.51
95% mean confidence interval for instructions %-change: -0.37% -0.23%
Instructions are helped.

total cycles in shared programs: 6828935 -> 6816791 (-0.18%)
cycles in affected programs: 6385191 -> 6373047 (-0.19%)
helped: 73
HURT: 0
helped stats (abs) min: 2 max: 852 x̄: 166.36 x̃: 120
helped stats (rel) min: <.01% max: 0.80% x̄: 0.22% x̃: 0.17%
95% mean confidence interval for cycles value: -210.80 -121.91
95% mean confidence interval for cycles %-change: -0.27% -0.17%
Cycles are helped.

total fills in shared programs: 1442 -> 1497 (3.81%)
fills in affected programs: 1442 -> 1497 (3.81%)
helped: 0
HURT: 1

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
5b07f542e5 soft-fp64: Optimize __fmin64 and __fmax64 by using different evaluation order [v2]
v2: Go to extra effort to avoid flow control inserted to implement
short-circuit evaluation rules.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 797779 -> 796849 (-0.12%)
instructions in affected programs: 3499 -> 2569 (-26.58%)
helped: 21
HURT: 0
helped stats (abs) min: 8 max: 112 x̄: 44.29 x̃: 44
helped stats (rel) min: 16.09% max: 33.15% x̄: 25.72% x̃: 24.62%
95% mean confidence interval for instructions value: -55.94 -32.63
95% mean confidence interval for instructions %-change: -28.14% -23.30%
Instructions are helped.

total cycles in shared programs: 6601355 -> 6588351 (-0.20%)
cycles in affected programs: 25376 -> 12372 (-51.25%)
helped: 21
HURT: 0
helped stats (abs) min: 156 max: 1410 x̄: 619.24 x̃: 526
helped stats (rel) min: 42.39% max: 53.98% x̄: 50.12% x̃: 50.75%
95% mean confidence interval for cycles value: -776.58 -461.89
95% mean confidence interval for cycles %-change: -51.57% -48.67%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v1]
Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
617a69107e soft-fp64/ffloor: Simplify the >= 0 comparison
Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 797951 -> 797779 (-0.02%)
instructions in affected programs: 126482 -> 126310 (-0.14%)
helped: 15
HURT: 0
helped stats (abs) min: 1 max: 20 x̄: 11.47 x̃: 10
helped stats (rel) min: <.01% max: 0.60% x̄: 0.28% x̃: 0.29%
95% mean confidence interval for instructions value: -14.79 -8.14
95% mean confidence interval for instructions %-change: -0.40% -0.16%
Instructions are helped.

total cycles in shared programs: 6601437 -> 6601355 (<.01%)
cycles in affected programs: 1089336 -> 1089254 (<.01%)
helped: 15
HURT: 0
helped stats (abs) min: 2 max: 12 x̄: 5.47 x̃: 6
helped stats (rel) min: <.01% max: 0.04% x̄: 0.01% x̃: 0.01%
95% mean confidence interval for cycles value: -7.06 -3.87
95% mean confidence interval for cycles %-change: -0.02% <.01%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
abf28d6a70 soft-fp64: Relax the way NaN is propagated
Also reassociate a couple expressions to encourage some CSE.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 813599 -> 797951 (-1.92%)
instructions in affected programs: 796110 -> 780462 (-1.97%)
helped: 92
HURT: 0
helped stats (abs) min: 3 max: 5198 x̄: 170.09 x̃: 83
helped stats (rel) min: 0.36% max: 5.50% x̄: 1.57% x̃: 1.40%
95% mean confidence interval for instructions value: -282.42 -57.75
95% mean confidence interval for instructions %-change: -1.71% -1.42%
Instructions are helped.

total cycles in shared programs: 6687128 -> 6601437 (-1.28%)
cycles in affected programs: 6582246 -> 6496555 (-1.30%)
helped: 92
HURT: 0
helped stats (abs) min: 36 max: 14442 x̄: 931.42 x̃: 592
helped stats (rel) min: 0.45% max: 3.16% x̄: 1.44% x̃: 1.23%
95% mean confidence interval for cycles value: -1257.58 -605.27
95% mean confidence interval for cycles %-change: -1.58% -1.30%
Cycles are helped.

total spills in shared programs: 759 -> 702 (-7.51%)
spills in affected programs: 759 -> 702 (-7.51%)
helped: 3
HURT: 0

total fills in shared programs: 2412 -> 1442 (-40.22%)
fills in affected programs: 2412 -> 1442 (-40.22%)
helped: 3
HURT: 0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
8178fa8876 soft-fp64/fsat: Micro-optimize x >= 1 test
Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 841590 -> 841332 (-0.03%)
instructions in affected programs: 121957 -> 121699 (-0.21%)
helped: 7
HURT: 0
helped stats (abs) min: 15 max: 54 x̄: 36.86 x̃: 41
helped stats (rel) min: 0.16% max: 0.33% x̄: 0.23% x̃: 0.18%
95% mean confidence interval for instructions value: -49.73 -23.98
95% mean confidence interval for instructions %-change: -0.29% -0.16%
Instructions are helped.

total cycles in shared programs: 6926828 -> 6923967 (-0.04%)
cycles in affected programs: 1038569 -> 1035708 (-0.28%)
helped: 7
HURT: 0
helped stats (abs) min: 128 max: 616 x̄: 408.71 x̃: 446
helped stats (rel) min: 0.18% max: 0.44% x̄: 0.29% x̃: 0.22%
95% mean confidence interval for cycles value: -571.72 -245.70
95% mean confidence interval for cycles %-change: -0.38% -0.19%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
b6f58b4709 soft-fp64/fsat: Micro-optimize x < 0 test
Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 841647 -> 841590 (<.01%)
instructions in affected programs: 122014 -> 121957 (-0.05%)
helped: 7
HURT: 0
helped stats (abs) min: 3 max: 12 x̄: 8.14 x̃: 9
helped stats (rel) min: 0.04% max: 0.07% x̄: 0.05% x̃: 0.04%
95% mean confidence interval for instructions value: -11.23 -5.06
95% mean confidence interval for instructions %-change: -0.06% -0.03%
Instructions are helped.

total cycles in shared programs: 6926904 -> 6926828 (<.01%)
cycles in affected programs: 1038645 -> 1038569 (<.01%)
helped: 7
HURT: 0
helped stats (abs) min: 4 max: 16 x̄: 10.86 x̃: 12
helped stats (rel) min: <.01% max: 0.01% x̄: <.01% x̃: <.01%
95% mean confidence interval for cycles value: -14.97 -6.74
95% mean confidence interval for cycles %-change: -0.01% <.01%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
7673dcbd21 soft-fp64/fsat: Correctly handle NaN
fsat is defined as min(max(a, 0.0), 1.0), and IEEE defines both min and
max to return the non-NaN value when one value is NaN.  Based on this,
fsat should definitely return 0.0 for NaN.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 841666 -> 841647 (<.01%)
instructions in affected programs: 122033 -> 122014 (-0.02%)
helped: 7
HURT: 0
helped stats (abs) min: 1 max: 4 x̄: 2.71 x̃: 3
helped stats (rel) min: 0.01% max: 0.02% x̄: 0.02% x̃: 0.01%
95% mean confidence interval for instructions value: -3.74 -1.69
95% mean confidence interval for instructions %-change: -0.02% -0.01%
Instructions are helped.

total cycles in shared programs: 6927246 -> 6926904 (<.01%)
cycles in affected programs: 1038987 -> 1038645 (-0.03%)
helped: 7
HURT: 0
helped stats (abs) min: 18 max: 72 x̄: 48.86 x̃: 54
helped stats (rel) min: 0.03% max: 0.05% x̄: 0.03% x̃: 0.03%
95% mean confidence interval for cycles value: -67.38 -30.33
95% mean confidence interval for cycles %-change: -0.05% -0.02%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Fixes: a42163cbbc ("compiler: Add lowering support for 64-bit saturate operations to software")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2585
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
b421c0466d soft-fp64/flt: Perform checks in a different order
The change to nir_opt_algebraic cleans up a pattern that was never
produced before the rest of this commit was added.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 843005 -> 841666 (-0.16%)
instructions in affected programs: 460655 -> 459316 (-0.29%)
helped: 64
HURT: 17
helped stats (abs) min: 1 max: 72 x̄: 21.72 x̃: 20
helped stats (rel) min: 0.01% max: 28.07% x̄: 12.67% x̃: 16.07%
HURT stats (abs)   min: 1 max: 7 x̄: 3.00 x̃: 2
HURT stats (rel)   min: 0.01% max: 0.04% x̄: 0.02% x̃: 0.02%
95% mean confidence interval for instructions value: -20.87 -12.19
95% mean confidence interval for instructions %-change: -12.35% -7.66%
Instructions are helped.

total cycles in shared programs: 6944998 -> 6927246 (-0.26%)
cycles in affected programs: 3891872 -> 3874120 (-0.46%)
helped: 71
HURT: 10
helped stats (abs) min: 2 max: 772 x̄: 254.21 x̃: 156
helped stats (rel) min: <.01% max: 66.44% x̄: 21.72% x̃: 18.40%
HURT stats (abs)   min: 18 max: 69 x̄: 29.70 x̃: 20
HURT stats (rel)   min: 0.02% max: 0.04% x̄: 0.03% x̃: 0.03%
95% mean confidence interval for cycles value: -270.82 -167.50
95% mean confidence interval for cycles %-change: -24.41% -13.65%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
f6992bf624 soft-fp64/fneg: Don't treat NaN specially
__fabs64 doesn't do anything special, and the value is still NaN
regardless of the value of the MSB.  In a strict sense, it's possible
that both functions should set the "signal" bit.

lts on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 844558 -> 843005 (-0.18%)
instructions in affected programs: 725975 -> 724422 (-0.21%)
helped: 53
HURT: 4
helped stats (abs) min: 1 max: 313 x̄: 29.87 x̃: 21
helped stats (rel) min: 0.01% max: 0.94% x̄: 0.30% x̃: 0.22%
HURT stats (abs)   min: 4 max: 11 x̄: 7.50 x̃: 7
HURT stats (rel)   min: 0.03% max: 0.09% x̄: 0.05% x̃: 0.04%
95% mean confidence interval for instructions value: -39.02 -15.47
95% mean confidence interval for instructions %-change: -0.34% -0.21%
Instructions are helped.

total cycles in shared programs: 6962024 -> 6944998 (-0.24%)
cycles in affected programs: 6185470 -> 6168444 (-0.28%)
helped: 59
HURT: 0
helped stats (abs) min: 64 max: 2863 x̄: 288.58 x̃: 208
helped stats (rel) min: 0.11% max: 0.87% x̄: 0.33% x̃: 0.27%
95% mean confidence interval for cycles value: -387.15 -190.00
95% mean confidence interval for cycles %-change: -0.38% -0.28%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
de4acd8816 soft-fp64: Store sign value as 0 or 0x80000000
...instead of 0 or 1.  Many places the sign bit is extracted, then later
put back in the same position.  This saves some left-shift operations.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 848106 -> 844558 (-0.42%)
instructions in affected programs: 833480 -> 829932 (-0.43%)
helped: 106
HURT: 1
helped stats (abs) min: 1 max: 995 x̄: 33.48 x̃: 12
helped stats (rel) min: 0.15% max: 2.20% x̄: 0.60% x̃: 0.35%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: <.01% max: <.01% x̄: <.01% x̃: <.01%
95% mean confidence interval for instructions value: -51.88 -14.43
95% mean confidence interval for instructions %-change: -0.71% -0.47%
Instructions are helped.

total cycles in shared programs: 6969125 -> 6962024 (-0.10%)
cycles in affected programs: 6717689 -> 6710588 (-0.11%)
helped: 78
HURT: 7
helped stats (abs) min: 2 max: 2083 x̄: 110.27 x̃: 56
helped stats (rel) min: <.01% max: 0.30% x̄: 0.11% x̃: 0.11%
HURT stats (abs)   min: 2 max: 1340 x̄: 214.29 x̃: 4
HURT stats (rel)   min: 0.01% max: 0.71% x̄: 0.13% x̃: 0.02%
95% mean confidence interval for cycles value: -144.02 -23.06
95% mean confidence interval for cycles %-change: -0.12% -0.07%
Cycles are helped.

total spills in shared programs: 814 -> 759 (-6.76%)
spills in affected programs: 814 -> 759 (-6.76%)
helped: 2
HURT: 1

total fills in shared programs: 2488 -> 2412 (-3.05%)
fills in affected programs: 2488 -> 2412 (-3.05%)
helped: 2
HURT: 1

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
598e2fc6a1 soft-fp64: Pick a single idiom for treating sign value as a Boolean
Replace all of the bool(qSign) with qSign != 0u.  Remove unnecessary
parenthesis from around most of the existing qSign != 0u.

This dramatically simplifies the next commit.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 848109 -> 848106 (<.01%)
instructions in affected programs: 53 -> 50 (-5.66%)
helped: 1
HURT: 0

total cycles in shared programs: 6969145 -> 6969125 (<.01%)
cycles in affected programs: 396 -> 376 (-5.05%)
helped: 1
HURT: 0

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
325a21f5eb soft-fp64: Simplify __countLeadingZeros32 function
findMSB returns -1 for an input of zero, so 31 - findMSB(a) is
sufficient on its own.

There's only one user of findMSB in shader-db, and it does not match
this pattern.

TODO: Add a pattern in the backend code generator that emits 31 -
nir_op_ufind_msb(a) as if it were nir_op_uclz.  That should save a couple
instructions.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 859509 -> 848109 (-1.33%)
instructions in affected programs: 841058 -> 829658 (-1.36%)
helped: 97
HURT: 0
helped stats (abs) min: 3 max: 1161 x̄: 117.53 x̃: 72
helped stats (rel) min: 0.98% max: 6.74% x̄: 1.70% x̃: 1.35%
95% mean confidence interval for instructions value: -147.21 -87.84
95% mean confidence interval for instructions %-change: -1.94% -1.46%
Instructions are helped.

total cycles in shared programs: 7072275 -> 6969145 (-1.46%)
cycles in affected programs: 6955767 -> 6852637 (-1.48%)
helped: 97
HURT: 0
helped stats (abs) min: 32 max: 10900 x̄: 1063.20 x̃: 560
helped stats (rel) min: 1.18% max: 7.58% x̄: 1.84% x̃: 1.45%
95% mean confidence interval for cycles value: -1339.43 -786.96
95% mean confidence interval for cycles %-change: -2.11% -1.57%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
812230fd94 soft-fp64: Don't open-code umulExtended
Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 928859 -> 859509 (-7.47%)
instructions in affected programs: 866293 -> 796943 (-8.01%)
helped: 76
HURT: 0
helped stats (abs) min: 75 max: 8042 x̄: 912.50 x̃: 688
helped stats (rel) min: 5.35% max: 21.02% x̄: 10.35% x̃: 7.58%
95% mean confidence interval for instructions value: -1138.37 -686.63
95% mean confidence interval for instructions %-change: -11.69% -9.00%
Instructions are helped.

total cycles in shared programs: 7272912 -> 7072275 (-2.76%)
cycles in affected programs: 6763486 -> 6562849 (-2.97%)
helped: 76
HURT: 0
helped stats (abs) min: 214 max: 30136 x̄: 2639.96 x̃: 1923
helped stats (rel) min: 1.75% max: 9.20% x̄: 4.04% x̃: 2.41%
95% mean confidence interval for cycles value: -3455.29 -1824.63
95% mean confidence interval for cycles %-change: -4.69% -3.39%
Cycles are helped.

total spills in shared programs: 817 -> 814 (-0.37%)
spills in affected programs: 791 -> 788 (-0.38%)
helped: 2
HURT: 0

total fills in shared programs: 2438 -> 2488 (2.05%)
fills in affected programs: 2392 -> 2442 (2.09%)
helped: 0
HURT: 2

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
d1e0227ef1 soft-fp64/b2f: Reimplement using bitwise logic ops
This doesn't help a lot of shaders, but it helps those few a LOT.

This could also be implemented using bcsel.  That version is very
slightly worse because the generated SEL instruction wants to have two
immediate sources, so one of them usually needs an extra MOV instruction
to load.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 929619 -> 928859 (-0.08%)
instructions in affected programs: 1651 -> 891 (-46.03%)
helped: 8
HURT: 0
helped stats (abs) min: 38 max: 152 x̄: 95.00 x̃: 95
helped stats (rel) min: 42.70% max: 86.36% x̄: 49.88% x̃: 44.66%
95% mean confidence interval for instructions value: -132.97 -57.03
95% mean confidence interval for instructions %-change: -62.28% -37.49%
Instructions are helped.

total cycles in shared programs: 7280180 -> 7272912 (-0.10%)
cycles in affected programs: 12960 -> 5692 (-56.08%)
helped: 8
HURT: 0
helped stats (abs) min: 352 max: 1456 x̄: 908.50 x̃: 910
helped stats (rel) min: 52.45% max: 91.19% x̄: 59.24% x̃: 55.15%
95% mean confidence interval for cycles value: -1274.03 -542.97
95% mean confidence interval for cycles %-change: -70.06% -48.41%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
4e3d69ad07 nir/algebraic: Simplify a contradiction that can occur in __flt64_nonnan
The pattern is added to opt_algebraic because, for example, comparisons
with constant 0.0 will produce (a1 < 0).

Even with a pass that optimized Boolean expressions, I think this would
be very difficult to automatically recognize and optimize.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 933054 -> 929619 (-0.37%)
instructions in affected programs: 784041 -> 780606 (-0.44%)
helped: 59
HURT: 0
helped stats (abs) min: 2 max: 213 x̄: 58.22 x̃: 44
helped stats (rel) min: 0.02% max: 2.51% x̄: 0.72% x̃: 0.46%
95% mean confidence interval for instructions value: -70.80 -45.64
95% mean confidence interval for instructions %-change: -0.92% -0.53%
Instructions are helped.

total cycles in shared programs: 7304712 -> 7280180 (-0.34%)
cycles in affected programs: 7176260 -> 7151728 (-0.34%)
helped: 92
HURT: 0
helped stats (abs) min: 8 max: 1414 x̄: 266.65 x̃: 166
helped stats (rel) min: 0.04% max: 2.34% x̄: 0.43% x̃: 0.22%
95% mean confidence interval for cycles value: -333.05 -200.26
95% mean confidence interval for cycles %-change: -0.54% -0.31%
Cycles are helped.

Regular shader-db changes:

No changes on any Intel platform.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
e0cefc5a23 nir/algebraic: Constant reassociation for bitwise operations too
Like 5886cd79a0, but for iand, ior, and ixor.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake
total instructions in shared programs: 903108 -> 902830 (-0.03%)
instructions in affected programs: 654910 -> 654632 (-0.04%)
helped: 31
HURT: 5
helped stats (abs) min: 2 max: 31 x̄: 9.58 x̃: 7
helped stats (rel) min: 0.01% max: 0.23% x̄: 0.06% x̃: 0.04%
HURT stats (abs)   min: 1 max: 10 x̄: 3.80 x̃: 3
HURT stats (rel)   min: 0.01% max: 0.10% x̄: 0.03% x̃: 0.02%
95% mean confidence interval for instructions value: -10.55 -4.89
95% mean confidence interval for instructions %-change: -0.07% -0.03%
Instructions are helped.

total cycles in shared programs: 7059681 -> 7058006 (-0.02%)
cycles in affected programs: 5081309 -> 5079634 (-0.03%)
helped: 33
HURT: 12
helped stats (abs) min: 1 max: 444 x̄: 60.91 x̃: 18
helped stats (rel) min: <.01% max: 2.17% x̄: 0.25% x̃: 0.05%
HURT stats (abs)   min: 1 max: 288 x̄: 27.92 x̃: 2
HURT stats (rel)   min: <.01% max: 1.00% x̄: 0.23% x̃: 0.02%
95% mean confidence interval for cycles value: -68.32 -6.12
95% mean confidence interval for cycles %-change: -0.28% 0.03%
Inconclusive result (%-change mean confidence interval includes 0).

Ice Lake
total instructions in shared programs: 895384 -> 895159 (-0.03%)
instructions in affected programs: 658678 -> 658453 (-0.03%)
helped: 37
HURT: 0
helped stats (abs) min: 3 max: 16 x̄: 6.08 x̃: 4
helped stats (rel) min: <.01% max: 0.07% x̄: 0.04% x̃: 0.04%
95% mean confidence interval for instructions value: -7.46 -4.70
95% mean confidence interval for instructions %-change: -0.04% -0.03%
Instructions are helped.

total cycles in shared programs: 7092224 -> 7091195 (-0.01%)
cycles in affected programs: 5221666 -> 5220637 (-0.02%)
helped: 35
HURT: 11
helped stats (abs) min: 1 max: 247 x̄: 43.46 x̃: 12
helped stats (rel) min: <.01% max: 2.17% x̄: 0.23% x̃: 0.05%
HURT stats (abs)   min: 2 max: 432 x̄: 44.73 x̃: 5
HURT stats (rel)   min: <.01% max: 1.00% x̄: 0.25% x̃: 0.02%
95% mean confidence interval for cycles value: -49.00 4.26
95% mean confidence interval for cycles %-change: -0.27% 0.03%
Inconclusive result (value mean confidence interval includes 0).

Regular shader-db results:

All Haswell+ platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 17611408 -> 17611398 (<.01%)
instructions in affected programs: 1648 -> 1638 (-0.61%)
helped: 2
HURT: 0

total cycles in shared programs: 338366148 -> 338366124 (<.01%)
cycles in affected programs: 124048 -> 124024 (-0.02%)
helped: 2
HURT: 0

No changes on any earlier Intel platforms.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
1d36af9338 nir/algebraic: Generalize some and-of-shift-right patterns [v2]
Generalizes some of the patterns from 76289fbfa8 and 905ff86198.  In
particular, some of the soft-fp64 code generates (a & 0x7fffffff) << 1
when constant 0.0 is compared (flt or feq).

v2: Reduce the set of added patterns to those that actually help
something.  This reduces the size of the state transition tables by
about 29k.  Suggested by Jason.  Remove the existing patterns that this
commit subsumes.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake
total instructions in shared programs: 903171 -> 903108 (<.01%)
instructions in affected programs: 635903 -> 635840 (<.01%)
helped: 25
HURT: 11
helped stats (abs) min: 1 max: 16 x̄: 5.04 x̃: 3
helped stats (rel) min: <.01% max: 0.15% x̄: 0.04% x̃: 0.03%
HURT stats (abs)   min: 2 max: 14 x̄: 5.73 x̃: 5
HURT stats (rel)   min: <.01% max: 0.11% x̄: 0.04% x̃: 0.02%
95% mean confidence interval for instructions value: -3.91 0.41
95% mean confidence interval for instructions %-change: -0.03% <.01%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 7059527 -> 7059681 (<.01%)
cycles in affected programs: 5249401 -> 5249555 (<.01%)
helped: 41
HURT: 9
helped stats (abs) min: 2 max: 76 x̄: 11.90 x̃: 10
helped stats (rel) min: <.01% max: 11.86% x̄: 0.99% x̃: 0.01%
HURT stats (abs)   min: 2 max: 380 x̄: 71.33 x̃: 12
HURT stats (rel)   min: <.01% max: 0.22% x̄: 0.04% x̃: 0.01%
95% mean confidence interval for cycles value: -14.93 21.09
95% mean confidence interval for cycles %-change: -1.40% -0.20%
Inconclusive result (value mean confidence interval includes 0).

Ice Lake
total instructions in shared programs: 895506 -> 895384 (-0.01%)
instructions in affected programs: 658800 -> 658678 (-0.02%)
helped: 37
HURT: 0
helped stats (abs) min: 2 max: 8 x̄: 3.30 x̃: 2
helped stats (rel) min: <.01% max: 0.03% x̄: 0.02% x̃: 0.02%
95% mean confidence interval for instructions value: -4.00 -2.59
95% mean confidence interval for instructions %-change: -0.02% -0.02%
Instructions are helped.

total cycles in shared programs: 7092748 -> 7092224 (<.01%)
cycles in affected programs: 5272008 -> 5271484 (<.01%)
helped: 36
HURT: 14
helped stats (abs) min: 2 max: 440 x̄: 21.67 x̃: 8
helped stats (rel) min: <.01% max: 11.86% x̄: 1.12% x̃: 0.02%
HURT stats (abs)   min: 2 max: 122 x̄: 18.29 x̃: 6
HURT stats (rel)   min: <.01% max: 0.07% x̄: 0.01% x̃: <.01%
95% mean confidence interval for cycles value: -29.24 8.28
95% mean confidence interval for cycles %-change: -1.40% -0.21%
Inconclusive result (value mean confidence interval includes 0).

Regular shader-db results:

All Haswell+ platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 17611489 -> 17611408 (<.01%)
instructions in affected programs: 21188 -> 21107 (-0.38%)
helped: 23
HURT: 1
helped stats (abs) min: 1 max: 16 x̄: 3.78 x̃: 3
helped stats (rel) min: 0.03% max: 5.82% x̄: 1.13% x̃: 0.85%
HURT stats (abs)   min: 6 max: 6 x̄: 6.00 x̃: 6
HURT stats (rel)   min: 0.60% max: 0.60% x̄: 0.60% x̃: 0.60%
95% mean confidence interval for instructions value: -5.27 -1.48
95% mean confidence interval for instructions %-change: -1.70% -0.42%
Instructions are helped.

total cycles in shared programs: 338418502 -> 338366148 (-0.02%)
cycles in affected programs: 2289052 -> 2236698 (-2.29%)
helped: 18
HURT: 3
helped stats (abs) min: 4 max: 18000 x̄: 2909.67 x̃: 38
helped stats (rel) min: 0.09% max: 4.07% x̄: 0.96% x̃: 0.43%
HURT stats (abs)   min: 2 max: 14 x̄: 6.67 x̃: 4
HURT stats (rel)   min: 0.22% max: 1.13% x̄: 0.66% x̃: 0.64%
95% mean confidence interval for cycles value: -5204.00 217.91
95% mean confidence interval for cycles %-change: -1.31% -0.14%
Inconclusive result (value mean confidence interval includes 0).

Ivy Bridge
total instructions in shared programs: 11875617 -> 11875615 (<.01%)
instructions in affected programs: 1339 -> 1337 (-0.15%)
helped: 2
HURT: 0

No changes on any earlier Intel platforms.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
d6d63aec18 nir/algebraic: optimize ior(ine(a, 0), ine(b, 0)) to ine(ior(a, b), 0)
Like 70f9e2589e.  Also scrub the unnecessary size qualifier in both
replacement patterns.

This occurs in a handful of places in the soft-fp64 code, and that is
the primary reason for the change.

Perhaps the patterns that generate umin should be conditioned on
something, but I'm not sure what.  lower_bitops might cover the cases
that matter, but it seems ugly.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 936505 -> 933388 (-0.33%)
instructions in affected programs: 925719 -> 922602 (-0.34%)
helped: 154
HURT: 1
helped stats (abs) min: 1 max: 211 x̄: 35.45 x̃: 16
helped stats (rel) min: 0.34% max: 9.30% x̄: 2.28% x̃: 0.96%
HURT stats (abs)   min: 2342 max: 2342 x̄: 2342.00 x̃: 2342
HURT stats (rel)   min: 2.28% max: 2.28% x̄: 2.28% x̃: 2.28%
95% mean confidence interval for instructions value: -51.21 10.99
95% mean confidence interval for instructions %-change: -2.61% -1.89%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 7323502 -> 7306184 (-0.24%)
cycles in affected programs: 7220376 -> 7203058 (-0.24%)
helped: 126
HURT: 1
helped stats (abs) min: 2 max: 946 x̄: 159.10 x̃: 95
helped stats (rel) min: 0.01% max: 9.62% x̄: 0.80% x̃: 0.37%
HURT stats (abs)   min: 2728 max: 2728 x̄: 2728.00 x̃: 2728
HURT stats (rel)   min: 0.37% max: 0.37% x̄: 0.37% x̃: 0.37%
95% mean confidence interval for cycles value: -192.07 -80.66
95% mean confidence interval for cycles %-change: -1.07% -0.51%
Cycles are helped.

total spills in shared programs: 635 -> 817 (28.66%)
spills in affected programs: 635 -> 817 (28.66%)
helped: 0
HURT: 3

total fills in shared programs: 2065 -> 2438 (18.06%)
fills in affected programs: 2019 -> 2392 (18.47%)
helped: 0
HURT: 2

Regular shader-db results:

All Haswell+ platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 17611506 -> 17611489 (<.01%)
instructions in affected programs: 33442 -> 33425 (-0.05%)
helped: 32
HURT: 6
helped stats (abs) min: 1 max: 6 x̄: 1.69 x̃: 1
helped stats (rel) min: 0.08% max: 1.90% x̄: 0.27% x̃: 0.11%
HURT stats (abs)   min: 1 max: 15 x̄: 6.17 x̃: 5
HURT stats (rel)   min: 0.09% max: 1.50% x̄: 0.65% x̃: 0.55%
95% mean confidence interval for instructions value: -1.70 0.80
95% mean confidence interval for instructions %-change: -0.30% 0.05%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 338419218 -> 338418502 (<.01%)
cycles in affected programs: 385795 -> 385079 (-0.19%)
helped: 42
HURT: 3
helped stats (abs) min: 2 max: 192 x̄: 24.57 x̃: 16
helped stats (rel) min: 0.04% max: 2.09% x̄: 0.33% x̃: 0.22%
HURT stats (abs)   min: 64 max: 164 x̄: 105.33 x̃: 88
HURT stats (rel)   min: 0.77% max: 1.58% x̄: 1.09% x̃: 0.93%
95% mean confidence interval for cycles value: -29.76 -2.06
95% mean confidence interval for cycles %-change: -0.40% -0.07%
Cycles are helped.

Ivy Bridge and Sandy Bridge had similar results. (Ivy Bridge shown)
total instructions in shared programs: 11875620 -> 11875617 (<.01%)
instructions in affected programs: 421 -> 418 (-0.71%)
helped: 2
HURT: 0

total cycles in shared programs: 178245336 -> 178245326 (<.01%)
cycles in affected programs: 3425 -> 3415 (-0.29%)
helped: 2
HURT: 0

No changes on Gen4 or Gen5.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
88eb8f190b nir/algebraic: Simplify logic to detect sign of an integer
This occurs in a handful of places in the soft-fp64 code, and that is
the primary reason for the change.

v2: Fix a typo in a comment.  Noticed by Matt.  Copy the correct fp64
shader-db results to the commit message.  I realized that I used
accidentally used the results from the next commit.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 906235 -> 906149 (<.01%)
instructions in affected programs: 353966 -> 353880 (-0.02%)
helped: 31
HURT: 2
helped stats (abs) min: 1 max: 8 x̄: 3.03 x̃: 3
helped stats (rel) min: 0.01% max: 1.59% x̄: 0.10% x̃: 0.04%
HURT stats (abs)   min: 3 max: 5 x̄: 4.00 x̃: 4
HURT stats (rel)   min: 0.02% max: 0.02% x̄: 0.02% x̃: 0.02%
95% mean confidence interval for instructions value: -3.51 -1.70
95% mean confidence interval for instructions %-change: -0.19% <.01%
Inconclusive result (%-change mean confidence interval includes 0).

total cycles in shared programs: 7076552 -> 7076173 (<.01%)
cycles in affected programs: 2878361 -> 2877982 (-0.01%)
helped: 37
HURT: 2
helped stats (abs) min: 2 max: 48 x̄: 10.81 x̃: 6
helped stats (rel) min: <.01% max: 2.17% x̄: 0.47% x̃: 0.01%
HURT stats (abs)   min: 1 max: 20 x̄: 10.50 x̃: 10
HURT stats (rel)   min: <.01% max: 0.01% x̄: <.01% x̃: <.01%
95% mean confidence interval for cycles value: -13.96 -5.48
95% mean confidence interval for cycles %-change: -0.72% -0.16%
Cycles are helped.

total fills in shared programs: 2064 -> 2065 (0.05%)
fills in affected programs: 45 -> 46 (2.22%)
helped: 0
HURT: 1

Regular shader-db results:

All Gen7+ platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 17611530 -> 17611506 (<.01%)
instructions in affected programs: 5934 -> 5910 (-0.40%)
helped: 10
HURT: 0
helped stats (abs) min: 1 max: 5 x̄: 2.40 x̃: 2
helped stats (rel) min: 0.14% max: 1.24% x̄: 0.47% x̃: 0.34%
95% mean confidence interval for instructions value: -3.53 -1.27
95% mean confidence interval for instructions %-change: -0.78% -0.17%
Instructions are helped.

total cycles in shared programs: 338419178 -> 338419218 (<.01%)
cycles in affected programs: 19244 -> 19284 (0.21%)
helped: 4
HURT: 2
helped stats (abs) min: 2 max: 4 x̄: 3.00 x̃: 3
helped stats (rel) min: 0.05% max: 0.11% x̄: 0.08% x̃: 0.08%
HURT stats (abs)   min: 26 max: 26 x̄: 26.00 x̃: 26
HURT stats (rel)   min: 1.20% max: 1.20% x̄: 1.20% x̃: 1.20%
95% mean confidence interval for cycles value: -9.08 22.41
95% mean confidence interval for cycles %-change: -0.35% 1.04%
Inconclusive result (value mean confidence interval includes 0).

No changes on any earlier Intel platform.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Pierre-Eric Pelloux-Prayer
e7f3a8d695 st/mesa: disallow deferred flush if there are multiple contexts
u_threaded can hang in these situation, with one context waiting on a
deferred fence from the other context.
But the other context isn't flushing its pending work (because it's waiting
for more work to pushed) so everything is stuck.

Fixes: d17b35e671 ("gallium: add PIPE_FLUSH_DEFERRED")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1430
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4213>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4213>
2020-03-18 20:01:57 +00:00
Chad Versace
6ee971c882 anv: Use isl_drm_modifier_get_default_aux_state()
Use it in anv_layout_to_aux_state().

Refactor only. No change in behavior.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3881>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3881>
2020-03-18 11:39:33 -07:00
Jason Ekstrand
0905d5a14a intel/isl: Don't align linear images to 64K on Gen12+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4048>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4048>
2020-03-18 17:33:28 +00:00
Samuel Pitoiset
94e37859a9 radv: fix random depth range unrestricted failures due to a cache issue
The shader module name is used to compute the pipeline key. The
driver used to load the wrong pipelines because the shader names
were similar.

This should fix random failures of
dEQP-VK.pipeline.depth_range_unrestricted.*

Fixes: f11ea22666 ("radv: fix a performance regression with graphics depth/stencil clears")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4216>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4216>
2020-03-18 11:36:24 +00:00
Hyunjun Ko
a6625b15a4 turnip: Do gathering xfb info after nir_remove_dead_variables
So we could align stream outputs correctly even if unused in/outs are
removed.

Fixes:
  dEQP-VK.transform_feedback.fuzz.random_vertex.scalar_types.*
  dEQP-VK.transform_feedback.fuzz.random_vertex.vector_types.*

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4207>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4207>
2020-03-18 09:47:04 +00:00
Hyunjun Ko
c11a2bc202 turnip: Fix wrong assignment of xfb output's offset.
Should be divided by 4 so we could calculate the offset correctly in
tu6_setup_streamout.

Fixes: 2a1d6b81ed
Related: 374406a7c4

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4207>
2020-03-18 09:47:04 +00:00
Lionel Landwerlin
25a54554b3 intel/decoder: don't consider header fields past dword0
v2: use ULL

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4134>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4134>
2020-03-18 09:19:53 +00:00
Vasily Khoruzhick
0c41937440 lima: decode depth/stencil write bits in RSW
Now that we know the bits that are responsible for enabling depth/stencil
writes in shader we can decode them properly.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4197>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4197>
2020-03-18 08:36:17 +00:00
Icenowy Zheng
9205762cae lima: implement zsbuf reload
Fragment shader can write depth and stencil if we set necessary flags
in RSW. In addition to that we need to use special format for Z24S8.
Original format is apparently Z24X8 since we can't sample stencil in GLES2.
This new format also seems to use several components for storing depth
since we saw r != g != b when sampling with this format.

[vasily: - initialize clear->depth to 0xffffff if we reload depth, just
           like blob does. Reloading doesn't work otherwise
         - use single bitmap for reload type]

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4197>
2020-03-18 08:36:17 +00:00
Vasily Khoruzhick
dbceabed72 lima: disable Z16 format
Unfortunately we don't know how to reload Z16 buffers yet and blob
is using Z24 for dEQP tests that need depth reload.

Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4197>
2020-03-18 08:36:17 +00:00
Eric Anholt
8b8af6d398 gallium/util: Switch util_float_to_half to _mesa_float_to_half()'s impl.
The util_float_to_half() implementation was much smaller, but when trying
to switch _mesa_float_to_half to it, many testcases
(dEQP-VK.spirv_assembly.instruction.graphics.opquantize.*,
piglit.spec.arb_shading_language_packing.*packhalf2x16) start failing on
Intel.  Replace the broken impl so that people don't have to debug it
later.

Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3699>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3699>
2020-03-17 22:28:12 +00:00
Bas Nieuwenhuizen
8e4e2cedcf amd/llvm: Fix divergent descriptor regressions with radeonsi.
piglit/bin/arb_bindless_texture-limit -auto -fbo:
  Needed to deal with non-NULL dynamic_index without deref in tex instructions.

piglit/bin/shader_runner tests/spec/arb_bindless_texture/execution/images/multiple-resident-images-reading.shader_test -auto:
  Need to deal with non-deref images in enter_waterfall_imae.

Fixes: b83c9aca4a "amd/llvm: Fix divergent descriptor indexing. (v3)"
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4191>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4191>
2020-03-17 22:53:16 +01:00
Dave Airlie
040ce9a1b3 gallium: fix build with latest meson and gcc10
In Fedora 32 build was failing with meson-0.53.2-1.git88e40c7.fc32
and gcc-10.0.1-0.9.fc32.x86_64.

Worked with meson-0.53.1-1 and same gcc.

/usr/bin/ld: src/gallium/state_trackers/dri/libdri.a(dri2.c.o): in function `dri2_interop_export_object':
/home/airlied/devel/mesa/mesa/build/../src/gallium/state_trackers/dri/dri2.c:1813: undefined reference to `st_finalize_texture'
/usr/bin/ld: src/gallium/state_trackers/dri/libdri.a(dri_screen.c.o): in function `dri_init_screen_helper':
/home/airlied/devel/mesa/mesa/build/../src/gallium/state_trackers/dri/dri_screen.c:580: undefined reference to `st_gl_api_create'

Moving this around seems to fix it.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4220>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4220>
2020-03-17 21:14:38 +00:00
Marek Olšák
8dc5e174c7 ac: don't set old denormals flags with LLVM >= 11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4196>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4196>
2020-03-17 20:47:48 +00:00
Marek Olšák
63a5051ea6 ac: set new LLVM denormal flags
See: https://reviews.llvm.org/D71358

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4196>
2020-03-17 20:47:48 +00:00
Marek Olšák
56cc10bd27 ac: unify denorm setting enforcement
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4196>
2020-03-17 20:47:48 +00:00
Marek Olšák
e4959add2f gallium/u_vbuf: simplify the first if statement in u_vbuf_upload_buffers
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4153>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4153>
2020-03-17 19:13:57 +00:00
Marek Olšák
99a29a20d2 gallium/u_threaded: don't sync the thread for all unsychronized mappings
This was missing for the READ case. This improves glBegin/End performance.
(vbo maps with WRITE | READ | UNSYCHRONIZED)

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4153>
2020-03-17 19:13:57 +00:00
Eric Anholt
5960dadd1f freedreno/a5xx: Fix min-vs-mag filtering decisions on non-mipmap tex.
This a port of 3338d6e5f8 ("freedreno/a3xx: Mostly fix min-vs-mag
filtering decisions on non-mipmap tex.")

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4177>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4177>
2020-03-17 11:11:51 -07:00
Eric Anholt
4bc15e78fa ci: Enable testing GLES2-3 on a530 (Dragonboard 820c).
Following on from the db410c conversion to baremetal testing, reuse the
same scripts in the same rack to run 7 db820c boards (#4/8 is failing in
the bootloader for unknown reasons).

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4177>
2020-03-17 11:11:51 -07:00
Eric Anholt
8997757c6a ci: Enable ccaching of CMake builds as well.
They ignore $PATH for unknown reasons, so you have to force the ccache
wrapping yourself.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4099>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4099>
2020-03-17 10:44:39 -07:00
Eric Anholt
ba39cc5e85 ci: Enable ccache in the container builds.
This should reduce our container rebuild times, particularly on the
40-minute ARM build (which is split across only 2 runners and thus likely
to have a hot cache) when working on updating containers.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4099>
2020-03-17 10:44:39 -07:00
Eric Anholt
af7dca3560 ci: Update the ci-templates commit.
There has been a big rename of variables in the upstream repo to make it
clear what's being handed to ci-templates.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4099>
2020-03-17 10:44:37 -07:00
Jason Ekstrand
d60375cbc2 anv: Do an end-of-pipe sync before updating AUX table entries
We've found in GL that an actual end-of-pipe sync is required before
invalidating the aux tables and that a simple CS stall is insufficient.
If we're about to modify the actual AUX table entries from the GPU, we
should definitely make sure it's stopped dead before we do so.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4206>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4206>
2020-03-17 16:38:50 +00:00
Caio Marcelo de Oliveira Filho
3dd0d12aa5 intel/blorp: Plumb the stage through blorp upload_shader
Vulkan uses that for its own upload function -- even though for BLORP
it doesn't really currently care.  Neither Iris and i965 makes use of
it at the moment.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4170>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4170>
2020-03-17 08:24:46 -07:00
Duncan Hopkins
4c35bc7e61 zink: zero out zink_render_pass_state
Since zink_render_pass_state is used as a hash-key, the entire struct gets
compared. This means we don't want any uninitialized padding in there, or
else we risk getting false negatives. This has led to issues on macOS builds.

So let's zero out the struct before we start filling it out.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4212>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4212>
2020-03-17 13:04:30 +00:00
Samuel Pitoiset
c923de68dd radv/gfx10: fix required ballot size with VK_EXT_subgroup_size_control
If compute shaders require a specific subgroup size (ie. Wave32),
we have to use the correct ballot size.

Fixes dEQP-VK.subgroups.ballot_other.compute.*_requiredsubgroupSize.

Fixes: fb07fd4e6c ("radv: implement VK_EXT_subgroup_size_control")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4215>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4215>
2020-03-17 12:45:01 +00:00
Samuel Pitoiset
672d106199 radv/gfx10: fix required subgroup size with VK_EXT_subgroup_size_control
If compute shaders require a specific subgroup size (ie. Wave32),
we have to return the correct one.

Fixes dEQP-VK.subgroups.size_control.compute.required_subgroup_size_*.

Fixes: fb07fd4e6c ("radv: implement VK_EXT_subgroup_size_control")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4215>
2020-03-17 12:45:01 +00:00
Samuel Pitoiset
46e8ba1344 radv: only inject implicit subpass dependencies if necessary
The Vulkan 1.2.134 spec update clarified when implicit subpass
dependencies should be injected by the driver. They only make
sense if automatic layout transitions are performed.

This should fix a performance regression with RPCS3 (although
they added a workaround for RADV since the regression has been found).

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2502
Fixes: e60de08547 ("radv: handle missing implicit subpass dependencies")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4210>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4210>
2020-03-17 13:24:36 +01:00
Michel Dänzer
a0591863db gitlab-ci: Enable more Gallium drivers in meson-i386 job
These are the ones which can be enabled with the current x86_build
docker image and which build without warnings.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>
2020-03-17 11:21:45 +01:00
Michel Dänzer
106bf59ca9 llvmpipe: Use uintptr_t for pointer values
Instead of uint64_t. Fixes potentially writing beyond the end of the
handles pointer array on 32-bit architectures (and copying all 0s
instead of the computed pointer values to the array on big endian
ones).

Corresponding compiler warning:

../src/gallium/drivers/llvmpipe/lp_state_cs.c: In function ‘llvmpipe_set_global_binding’:
../src/gallium/drivers/llvmpipe/lp_state_cs.c:1312:12: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
 1312 |       va = (uint64_t)((char *)lp_res->data + offset);
      |            ^

Fixes: 264663d55d "gallivm/llvmpipe: add support for global
                     operations."

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>
2020-03-17 11:20:49 +01:00
Michel Dänzer
c56f09124b gitlab-ci: Move classic driver testing to a new meson-classic job
The motivation is to allow llvmpipe to be enabled instead in the
meson-i386 job.

v2: (Eric Engestrom)
* Rename meson-main job to meson-gallium
* Remove stale comment above meson-i386 job

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>
2020-03-17 11:20:23 +01:00
Michel Dänzer
c3727ae431 gitlab-ci: Fold scons-swr job into scons job
Should be fast enough.

Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>
2020-03-17 11:17:10 +01:00
Connor Abbott
3ff437abb3 tu: Fix border color with compute shaders
I wasn't able to find any CTS tests that used compute shaders with
samplers and set a border color, so I hacked one of the tests included
with amber:

https://gist.github.com/cwabbott0/e72f0ed8259b84ed6bf3920c68fefee6

The register was found via looking at dumps of the Vulkan blob, and
setting it fixes this test.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4204>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4204>
2020-03-17 09:40:26 +00:00
Michel Dänzer
32eecf5879 gitlab-ci: Don't use buster-backports packages by default for x86_build
The backports repository can be temporarily inconsistent between
architectures, which can break the docker image build.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4209>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4209>
2020-03-17 09:49:09 +01:00
Rohan Garg
90a39af5f6 ci: Drop the git dependency in tracie
Instead of using git, use python and the Gitlab API
to fetch traces. This helps us slim down our ramdisks
in preparation for integrating trace replay on LAVA
devices.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>
2020-03-17 07:23:27 +01:00
Tomeu Vizoso
43873afda4 gitlab-ci: Use surfaceless platform also for apitrace
In preparation for using apitrace to replay traces in LAVA jobs, build a
newer waffle so apitrace can use the surfaceless EGL platform.

As things were before this commit, Xvfb would have been needed in the
LAVA images.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>
2020-03-17 07:12:36 +01:00
Tomeu Vizoso
2ca662fb61 gitlab-ci: Update renderdoc
Get closer to upstream to avoid accumulating changes.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>
2020-03-17 07:12:36 +01:00
Vasily Khoruzhick
ac1dbd5ef8 lima/gpir: fix crash in schedule_insert_ready_list()
Fix crash if node is already at position we want. Otherwise we remove
it from list (and list->prev becomes NULL) and then we dereference list->prev
in list_addtail()

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4126>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4126>
2020-03-16 16:28:33 -07:00
Vasily Khoruzhick
2756b62917 lima/gpir: add better lowering for ftrunc
GP doesn't support ftrunc natively and unfortunately one in generic
opt_algebraic is not GP-friendly either. Introduce our own lowering
that utilizes fsign() that GP supports:
ftrunc(a) = fmul(fsign(a), ffloor(fmax(a, -a)))

Tested-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4126>
2020-03-16 16:28:33 -07:00
Vasily Khoruzhick
b7d89476f1 lima/gpir: kill dead writes to regs in DCE
Writes to regs that are never read will confuse regalloc since they
are never live and don't conflict with any regs. Kill them to prevent
overwriting another live reg.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>
2020-03-16 23:08:06 +00:00
Connor Abbott
8c1bcc8555 lima/gpir: Optimize nots created from branch lowering
We also add a DCE pass to cleanup the result of this pass, which turns
out to also be necessary to cleanup the result of nir->gpir in some
cases that we didn't hit until the next commit.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>
2020-03-16 23:08:06 +00:00
Connor Abbott
47dacf3867 lima/gpir: Optimize conditional break/continue
Optimize the result of a conditional break/continue. In NIR something
like:

loop {
   ...
   if (cond)
      continue;

would get lowered to:

block_0:
...
block_1:
branch_cond !cond block_3
block_2:
branch_uncond block_0
block_3:
...

We recognize the conditional branch skipping over the unconditional
branch, and turn it into:

block_0:
...
block_1:
branch_cond cond block_0
block_2:
block_3:

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>
2020-03-16 23:08:06 +00:00
Connor Abbott
9fb0fda8e7 lima/gpir: Make lima_gpir_node_insert_child() useful
We weren't using this function before. The name is confusing, but it
changes the child while also fixing up the dependence link, if you don't
have access to it already. Or at least, I think that's what the
intention is, and what we'll need to change the branch condition in the
next commit. Adding a dependency between the new and old source doesn't
make any sense for this, and we also need to change the actual source.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>
2020-03-16 23:08:06 +00:00
Vinson Lee
5c3f20a25b panfrost: Fix gnu-empty-initializer error.
../src/gallium/drivers/panfrost/pan_cmdstream.c:1553:54: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
        union mali_attr varyings[PIPE_MAX_ATTRIBS] = { };
                                                     ^

Fixes: 836686daf3 ("panfrost: Move panfrost_emit_varying_descriptor() to pan_cmdstream.c")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4198>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4198>
2020-03-16 15:06:57 -07:00
Rhys Perry
2d14a8f237 aco: fix operand order for LS VGPR init bug workaround
Fixes: a952bf3946 ('aco: Fix LS VGPR init bug on affected hardware.')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4201>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4201>
2020-03-16 19:34:32 +00:00
Rhys Perry
ded7a8bb46 aco: fix instruction encoding for LS VGPR init bug workaround
Fixes: a952bf3946 ('aco: Fix LS VGPR init bug on affected hardware.')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4201>
2020-03-16 19:34:32 +00:00
Rhys Perry
ee9e0d1eca aco: set late kill for v_interp_p1_f32 for some APUs
Apparently needed for Stoney Ridge, Kabini and Mullins APUs.

gfx702 also has 16-bank LDS and https://llvm.org/docs/AMDGPUUsage.html
lists some dGPUs under there. Those GPUs seem to be Hawaii actually
(gfx701) and we don't seem to have gotten any interpolation related bugs
reported with them so far.

The late kill flag was tested by running pipeline-db with
ACO_DEBUG=validatera while setting late kill for SMEM buffer loads,
emit_vop2_instruction() and texture instructions. I also tested with
just setting the flag for v_interp_p1_f32.

As far as I know, the only other thing we have to consider for 16-bank LDS
is something to do with 16-bit interpolation. We don't do that yet.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>
2020-03-16 16:09:02 +00:00
Rhys Perry
1872759f55 aco: add a late kill flag
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>
2020-03-16 16:09:02 +00:00
Rhys Perry
c51348bd9b aco: move some register demand helpers into aco_live_var_analysis.cpp
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>
2020-03-16 16:09:02 +00:00
Samuel Pitoiset
e1b08b55ff radv/sqtt: handle thread trace capture in sqtt_QueuePresentKHR()
To avoid wasting CPU cycles when thread trace is not enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4180>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4180>
2020-03-16 15:42:04 +00:00
Jason Ekstrand
4061ac859d anv: Push UBO ranges relative to the start of the binding
There was a disconnect between anv_nir_compute_push_layout and the code
which sets up the push_ubo_sizes array.  The NIR code we emit checks
relative to the start of the bound UBO range so that, if we end up with
a vector which straddles the start of the push range, we can perform the
bounds check without risking overflow issues.  The code which sets up
the push_ubo_sizes, on the other hand, assumed it was relative to the
start of the push range.  Somehow, this didn't get get caught by any of
the available tests.

Fixes: e03f965280 "anv: Bounds-check pushed UBOs when ..."
Closes: #2623
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4195>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4195>
2020-03-16 15:14:14 +00:00
Jason Ekstrand
ae15b4fd73 anv: Fix the comparison in an assert
Fixes: e03f965280 "anv: Bounds-check pushed UBOs when ..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4195>
2020-03-16 15:14:14 +00:00
Samuel Pitoiset
299fad5585 gitlab-ci: bump Vulkan CTS to 1.2.1.0
Vulkan CTS 1.1.6.0 is quite old.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>
2020-03-16 14:36:41 +00:00
Samuel Pitoiset
af6d8dea00 gitlab-ci: do not set the number of deqp-parallel jobs for RADV CTS
Let's the runner uses the maximum number of jobs to speedup CTS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>
2020-03-16 14:36:41 +00:00
Samuel Pitoiset
4668a08e9d gitlab-ci: allow deqp-runner to use the maximum number of jobs
if $DEQP_PARALLEL is not set, it will use the maximum number of
jobs instead of 1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>
2020-03-16 14:36:41 +00:00
Samuel Pitoiset
888b41f0ee gitlab-ci: remove useless 'patch' package in the VK test image
It was copied from the GL test image but it's actually unused.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>
2020-03-16 14:36:41 +00:00
Connor Abbott
3349fe9a26 tu: Rewrite border color handling
Emit a single table of all possible Vulkan border colors up front, and
then index into it using the Vulkan enum directly. In fact this seems to
be the entire point of separating out border colors in the first place.

In addition to being simpler and having less CPU overhead, and fixing
cases where more than one sampler uses border color, this paves the way
for bindless samplers because the existing approach isn't great for
bindless.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4200>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4200>
2020-03-16 13:17:54 +00:00
Jose Fonseca
f6dad10d04 meson: Avoid duplicate symbols.
All the stubs in src/compiler/glsl/glcpp/pp_standalone_scaffolding.c
are duplicate symbols.  They should only be used as replacement for
Mesa functions when building glcpp and glsl standalone compilers, but
in fact they are getting linked with Mesa.

This change fixes this by moving the standalone stubs to a
libglcpp_standalone target, that's only linked with the glcpp/glsl
tools.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4186>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4186>
2020-03-16 11:52:26 +00:00
Neil Armstrong
4b61ad372d Revert "ci: Remove T820 from CI temporarily"
This reverts commit 089c8f0b8d.

Our office changes are finished and power is now stable in our lab
for T820 CI to run again.

Cc: Daniel Stone <daniels@collabora.com>
Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4057>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4057>
2020-03-16 11:16:27 +00:00
Neil Armstrong
bbdb4b1a6d gitlab-ci/lava: fix handling of lava tags
The lava tags was a python array not it's a gitlab CI string,
slit the string with periods in the jinja2 template to avoid having
the following tags :

tags:
 - p
 - a
 - n
 - f
 - r
 - o
 - s
 - t

instead of :
tags:
 - panfrost

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4057>
2020-03-16 11:16:27 +00:00
Tapani Pälli
fd1436440b iris: allow compression conditionally for images on gen12
With this change, amount of resolves happening with deqp-gles31
(--deqp-case=*load_store*) drops ~50%.

v2: use iris_image_view_get_format to get the format,
    get devinfo from context instead of passing it (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
d836f3fadf isl: allow compression for storage images on gen12+
This is done to be able to use ISL_AUX_USAGE_CCS_E with images.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
cd132a8eed iris: determine aux usage during predraw and state setup
Patch changes surface state setup to alloc/fill states for all possible
usages for image resource on gen12. Also predraw and binding table
population is changed to determine correct aux usage with the new
iris_image_view_aux_usage.

v2: alloc always all states independent on current image
    aux state on gen >= 12 , code cleanups (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
d4c879e69e iris: move existing image format fallback as a helper function
Patch adds a helper function for determining image format and changes
iris_set_shader_images to use it.

v2: pass iris_context instead of pipe one, rename function,
    code cleanup (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
fe2baf72e7 iris: provide dummy iris_image_view_aux_usage
Similar to iris_resource_texture_aux_usage this function will
determine proper aux_usage for image, now it will default to
ISL_AUX_USAGE_NONE.

v2: drop gen_device_info parameter, rename function (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
e8f0483ec4 intel/compiler: detect if atomic load store operations are used
Patch adds a new arg and modifies existing calls from i965, anv
pass NULL but iris stores this information for later use.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
6dd654ba41 iris: use the images_used mask in resolve pass
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
5910c938a2 nir/glsl: gather bitmask of images used by program
In a similar fashion as commit f5c7df4dc9 does for textures.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Danylo Piliaiev
51b1b102bd st/mesa: Fix signed integer overflow when using util_throttle_memory_usage
../src/mesa/state_tracker/st_cb_texture.c:1719:57: runtime error: signed integer overflow: 203489280 * 16 cannot be represented in type 'int'

Fixes: 21ca322e63
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4185>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4185>
2020-03-16 10:10:13 +00:00
Matt Turner
b93a195225 isl: Avoid EXPECT_DEATH in unit tests
EXPECT_DEATH works by forking the process and letting the forked process
fail with an assertion. This process is evidently incredibly expensive,
taking ~30 seconds to run the whole isl_aux_info_test on a 2.8GHz
Skylake. Annoyingly all of the (expected) assertion failures also leaves
lots of messages in dmesg and potentially generates lots of coredumps.

Instead, avoid the expense of fork/exec by redefining assert() and
unreachable() in the code we're testing to return a unit-test-only
value. With this patch, the test takes ~1ms.

Also, while modifying the EXPECT_EQ() calls, reverse the arguments so
that the expected value comes first, as is intended. Otherwise gtest
failure messages don't make much sense.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/issues/2567
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4174>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4174>
2020-03-13 17:48:03 -07:00
Jan Zielinski
5e523c9265 gallium/swr: use ElementCount type arguments for getSplat()
Reviewed-by: Alok Hota <alok.hota@intel.com>

In LLVM11, ConstantVector::getSplat() function definition
has changed and the first function argument has now ElementCount type.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4188>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4188>
2020-03-13 17:56:13 +00:00
Christian Gmeiner
a19d8c836f etnaviv: enable shareable shaders
We are not using any pctx reference in the shader so it seems fine
to enable this cap.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4095>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4095>
2020-03-13 16:50:19 +00:00
Christian Gmeiner
fe204de632 etnaviv: get rid of etna_spec in etna_context
There is no need to have a complete copy of etna_spec - just
reference the one and only from etna_screen.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4095>
2020-03-13 16:50:19 +00:00
Jason Ekstrand
4432dd6ea4 anv: Dump push ranges via VK_KHR_pipeline_executable_properties
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4173>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4173>
2020-03-13 16:31:44 +00:00
Rhys Perry
625d8705f0 aco: don't stop scheduling at exports
This allows us to move v_cvt_pkrtz_f16_f32 instructions upwards, improving
schedules and (somewhat unintentionally) moving the exports slightly
closer together.

Totals from affected shaders:
SGPRS: 1030224 -> 1030248 (0.00 %)
VGPRS: 794080 -> 794392 (0.04 %)
Spilled SGPRs: 127117 -> 127117 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 89028152 -> 89032312 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 65252 -> 65219 (-0.05 %)
SMEM score: 843808.00 -> 843918.00 (0.01 %)
VMEM score: 5331687.00 -> 5397802.00 (1.24 %)
SMEM clauses: 567659 -> 567655 (-0.00 %)
VMEM clauses: 290715 -> 290716 (0.00 %)
Instructions: 17143219 -> 17144259 (0.01 %)
Cycles: 1098442808 -> 1098446968 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>
2020-03-13 14:04:50 +00:00
Rhys Perry
6b4c31f814 aco: allow barriers to be skipped during scheduling
Much better scheduling apparently in 160 shaders

Totals from affected shaders:
SGPRS: 6272 -> 6344 (1.15 %)
VGPRS: 4832 -> 4844 (0.25 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 467192 -> 467428 (0.05 %) bytes
LDS: 459 -> 459 (0.00 %) blocks
Max Waves: 1407 -> 1409 (0.14 %)
SMEM score: 9309.00 -> 11216.00 (20.49 %)
VMEM score: 26679.00 -> 33652.00 (26.14 %)
SMEM clauses: 1817 -> 1776 (-2.26 %)
VMEM clauses: 2286 -> 2288 (0.09 %)
Instructions: 86537 -> 86596 (0.07 %)
Cycles: 676260 -> 676568 (0.05 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>
2020-03-13 14:04:50 +00:00
Rhys Perry
928ac97875 aco: add helpers for ensuring correct ordering while scheduling
Pipeline-db changes in 721 shaders.

Totals from affected shaders:
SGPRS: 42336 -> 42656 (0.76 %)
VGPRS: 38368 -> 38636 (0.70 %)
Spilled SGPRs: 11967 -> 11967 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 5268088 -> 5269840 (0.03 %) bytes
LDS: 1069 -> 1069 (0.00 %) blocks
Max Waves: 4473 -> 4447 (-0.58 %)
SMEM score: 41155.00 -> 41826.00 (1.63 %)
VMEM score: 146339.00 -> 147471.00 (0.77 %)
SMEM clauses: 24434 -> 24535 (0.41 %)
VMEM clauses: 16637 -> 16592 (-0.27 %)
Instructions: 996037 -> 996388 (0.04 %)
Cycles: 76476112 -> 75281416 (-1.56 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>
2020-03-13 14:04:50 +00:00
Rhys Perry
2cd760847a aco: add helpers for moving instructions for scheduling
No pipeline-db changes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>
2020-03-13 14:04:50 +00:00
Samuel Pitoiset
2d295ab3f3 radv: add llvm_compiler_shader() helper
To match aco_compile_shader().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>
2020-03-13 10:22:13 +00:00
Samuel Pitoiset
4d991c2de4 radv: remove unnecessary LLVM includes
They are already included from src/amd/llvm.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>
2020-03-13 10:22:13 +00:00
Samuel Pitoiset
5ea32a6201 radv: remove radv_shader_variant::aco_used
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>
2020-03-13 10:22:13 +00:00
Samuel Pitoiset
3fea948177 radv: cleanup occurences of use_aco everywhere
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>
2020-03-13 10:22:13 +00:00
Danylo Piliaiev
1305b93274 glsl: do not crash if string literal is used outside of #include/#line
Fixes: 67b32190f3
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2619
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4146>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4146>
2020-03-13 11:49:06 +02:00
Caio Marcelo de Oliveira Filho
f8051f77ea anv: Remove duplicate code in anv_cmd_buffer_bind_descriptor_set
Also use a single condition statement instead of two.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
0a5053b687 anv: Reduce compute pipeline batch_data size
The batch associated with the compute pipeline only needs room for a
MEDIA_VFE_STATE. So this patch moves the batch_data to each pipeline
struct and cap the one in compute pipeline.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
925df46b7e anv: Split graphics and compute bits from anv_pipeline
Add two new structs that use the anv_pipeline as base.  Changed all
functions that work on a specific pipeline to use the corresponding
struct.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
af33f0d767 anv: Use a separate field in the pipeline for compute shader
This is a preparation for splitting the compute and graphics pipelines
into separate structs.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
bff45b6a7f anv: Decouple flush_descriptor_sets() from pipeline struct
Explicitly pass the active stages and the array (and size) of shaders
to be processed.  This will make easy to store only the shaders needed
for each pipeline.

The active stages can be identified by a non-NULL shader in the
shaders array, so stop using it and keep track of the flushed stages
as iteration happens.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
6df0ac2653 anv: Decouple flush_descriptor_sets() helpers from pipeline struct
Pass the `anv_shader_bin *` instead of expecting the helpers to peek
into the pipeline struct.  Also reach for the device from the
cmd_buffer instead of the pipeline.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
d1c13f01aa anv: Remove redundant check in flush_descriptor_sets() helpers
These helpers are only called for stages that are active, so the code
for a non-active stage is never executed.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
eec04c0aae anv: Pass the right pipe_state to flush_descriptor_sets()
The caller has this information, so pass directly instead of making
each helper function call figure that one out.  Also, since we can
reach the pipeline from pipe_state, drop that parameter from the
function.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
88df3bf79a anv: Keep the shader stage in anv_shader_bin
This will be used to decouple the logic flush_descriptor_sets() from
the position in the shader array, allowing us to store just the
shaders needed for each pipeline.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
9bf044d254 anv: Use a dynamic array for storing executables in pipeline
Avoids waste for pipelines that don't use all the shaders, and is
flexible enough to cover cases where there are multiple variants per
shader (e.g. SIMD8/16/32 for fragment shader).

Even though we could pre-calculate the exact size of the array, this
is not a critical path so it is worth preventing the bug that will
likely happen when new variants are added but not accounted for.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
9b0682df82 anv: Use pipeline type to decide whether or not lower multiview
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
613c9b78e3 anv: Add a new enum to identify the pipeline type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Eric Anholt
d0a52432b1 glsl/tests: Fix waiting for disk_cache_put() to finish.
We were wasting 4s on waiting for expected-not-to-appear files to show
up on every test.  Using timeouts in test code is error-prone anyway,
as our shared runners may be busy on other jobs.

Fixes: 50989f87e6 ("util/disk_cache: use a thread queue to write to shader cache")
Link: https://gitlab.freedesktop.org/mesa/mesa/issues/2505
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4140>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4140>
2020-03-12 19:47:23 +00:00
Eric Anholt
e178bca5cc glsl/tests: Catch mkdir errors to help explain when they happen.
A recent pipeline
(https://gitlab.freedesktop.org/Venemo/mesa/-/jobs/1893357) failed
with what looks like an intermittent error related to making files for
the cache test inside of the core of the cache.  Given some of the
errors, it looks like maybe a mkdir failed, so log those errors
earlier so we can debug what's going on next time.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4140>
2020-03-12 19:47:23 +00:00
Caio Marcelo de Oliveira Filho
7d54b84d49 intel/fs: Combine adjacent memory barriers
This will avoid generating multiple identical fences in a row.

For Gen11+ we have multiple types of fences (affecting different
variable modes), but is still better to combine them in a single
scoped barrier so that the translation to backend IR have the option
of dispatching both fences in parallel.

This will clean up redundant barriers from various
dEQP-VK.memory_model.* tests.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>
2020-03-12 19:21:36 +00:00
Caio Marcelo de Oliveira Filho
bf432cd831 nir: Add pass to combine adjacent scoped memory barriers
SPIR-V generates very granular barriers, however HW and backends might
not necessarily take advantage of those.  This pass provides a general
mechanism to combine such barriers.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>
2020-03-12 19:21:36 +00:00
Caio Marcelo de Oliveira Filho
d31a8ed8fd nir: Reorder nir_scopes so wider scope has larger numeric value
Makes code comparing and combining scopes slightly more readable.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>
2020-03-12 19:21:36 +00:00
Caio Marcelo de Oliveira Filho
67fc88fbb9 nir: Don't skip a bit in nir_memory_semantics
There was another enum entry in the draft versions of
nir_memory_semantics, but when it got dropped the entries were not
updated.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>
2020-03-12 19:21:36 +00:00
Samuel Pitoiset
a46e9f4d9a radv: use ac_gpu_info::use_late_alloc
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
2020-03-12 18:17:47 +00:00
Samuel Pitoiset
741dd9e32b radv: rewrite late alloc computation
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
2020-03-12 18:17:47 +00:00
Samuel Pitoiset
74e7b442f2 radv: tune primitive binning for small chips
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
2020-03-12 18:17:47 +00:00
Samuel Pitoiset
22d3e047e5 radv: use better tessellation tunables on GFX9+
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
2020-03-12 18:17:47 +00:00
Samuel Pitoiset
6d27022ce1 radv/gfx10: cache metadata in L2 on small chips
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
2020-03-12 18:17:47 +00:00
Jason Ekstrand
6310c666a4 intel/isl: Set DepthStencilResource based on aux usage
In ISL, usage flags only carry intent and not semantic meaning.  We
don't have a bulletproof way in ISL to specify that an image is of
depth/stencil type.  The usage flags are great but blorp, for instance,
loves to disrespect them.  One proposed solution to this problem is to
add explicit depth/stencil formats which are distinct from the
corresponding color formats.

Fortunately, however, empirical evidence suggests that this bit only
affects the sampler's interpretation of the CCS data.  Therefore, we can
set the bit based off of the aux_usage which is now very specific and
does carry semantic meaning.  In particular, aux_usage now makes a
distinction between color CCS and depth/stencil CCS which appears to be
exactly what the DepthStencilResource bit is for.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
f047e504a5 intel: Require ISL_AUX_USAGE_STC_CCS for stencil CCS
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
56e15bf31c iris: Use ISL_AUX_USAGE_STC_CCS for stencil CCS
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
69a0150e4e intel/blorp: Allow STC_CCS in blit sources
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
6fa92cd015 intel/isl: Add a separate ISL_AUX_USAGE_STC_CCS
Stencil CCS is slightly different from color CCS.  Using a color CCS
resolve with stencil CCS doesn't do the right thing and you can't sample
from a stencil CCS image without the DepthStencilResource bit set or you
will get the wrong data.  Stencil CCS also has it's own rules such as it
doesn't support fast-clear and has no partial resolve.  This seems to
indicate that it should probably be its own isl_aux_usage.  Now that
adding new isl_aux_usage values is pretty cheap, let's split stencil CCS
out on its own.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
05a8e981ad intel/isl: Require ISL_AUX_USAGE_HIZ_CCS_WT for HZ+CCS WT mode
We also delete the badly named isl_surf_supports_hiz_ccs_wt.  The name
is misleading because it doesn't return whether or not the surface
supports HiZ+CCS in write-through mode (any single-sampled HiZ+CCS
capable surface does) but rather a heuristic decision about whether or
not we want to enable write-through mode based on the usage flags in the
isl_surf.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
ff1f0a720d iris: Use ISL_AUX_USAGE_HIZ_CCS_WT to indicate write-through HiZ
Previously, we always set the aux_usage to ISL_AUX_USAGE_HIZ_CCS and let
ISL choose write-through based on isl_surf_supports_hiz_ccs_wt.  This
commit makes us choose explicitly at surface creation time whether to
use HIZ_CCS or HIZ_CCS_WT based on the same set of conditions.  This is
more explicit and should be more robust as it lets us choose WT mode in
one place rather than trusting isl_surf_supports_hiz_ccs_wt to return
the same thing every time.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
e13ed0e9e5 intel/blorp: Allow HIZ_CCS_WT in copy sources
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
98dc7f56b7 intel/isl: Add a separate ISL_AUX_USAGE_HIZ_CCS_WT
This is distinct from ISL_AUX_USAGE_HIZ_CCS in that the HiZ surface
operates in write-through mode which means that the HiZ surface is only
used for depth-testing acceleration and the CCS-compressed main surface
is always valid so we can texture from it.

Separating full HiZ from write-through mode at the isl_aux_usage level
has a couple of advantages:

 1. It's more explicit.  Instead of write-through mode depending on the
    heuristic decision in isl_surf_supports_hiz_ccs_wt, it's now
    something that's explicitly requested by the driver.  This should be
    more robust than hoping isl_surf_supports_hiz_ccs_wt always returns
    the same thing every time.  If someone (say BLORP) ever drops a
    usage flag on the isl_surf, there's a chance it could return a
    different value without us noticing leading to corruptions.

 2. Because ISL_AUX_USAGE_HIZ_CCS_WT is it's own isl_aux_usage flag, we
    can say inside the driver that HIZ_CCS does not support sampling but
    HIZ_CCS_WT does.  We can also pass HIZ_CCS_WT to isl_surf_fill_state
    and it can do some validation for us beyond what we would be able to
    do if we conflate HIZ_CCS_WT and CCS_E.

 3. In the future, we can add new heuristics to the driver which do
    things such as start all depth surfaces (regardless of usage flags)
    off in HIZ_CCS and then do a full resolve and drop to HIZ_CCS_WT the
    first time it gets used by the sampler.  This would potentially let
    us enable the faster HIZ_CCS mode even in cases where it technically
    comes in through the API as a texture.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
feaedc1fbe intel/isl: Clean up some aux surface logic
The first check is redundant because the first thing we do in the "emit
the aux surface" section is assert that we actually have an aux_surf.
The second check involves an exclusion list of things which don't have
aux surfaces on Gen12 but an inclusion list is much simpler because it's
just "does it have MCS?".

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Marek Olšák
84f97a21a6 ac: disable late alloc on small gfx10 chips
same as PAL.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
2020-03-12 17:27:23 +00:00
Marek Olšák
7ba5e94c50 ac: add radeon_info::use_late_alloc to control LATE_ALLOC globally
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
2020-03-12 17:27:23 +00:00
Marek Olšák
09295e95eb radeonsi: tune primitive binning for small chips
same as PAL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
2020-03-12 17:27:23 +00:00
Marek Olšák
629b6ddd71 radeonsi: set better tessellation tunables on gfx9 and gfx10
same as PAL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
2020-03-12 17:27:23 +00:00
Marek Olšák
bf5b65d0fd radeonsi/gfx10: cache metadata in L2 on small chips
same as PAL.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
2020-03-12 17:27:23 +00:00
Samuel Pitoiset
e6e97ea92e radv/sqtt: describe layout transitions with user markers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4138>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4138>
2020-03-12 17:04:55 +00:00
Samuel Pitoiset
b229302b96 radv/sqtt: describe begin/end subpass barriers with user markers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4138>
2020-03-12 17:04:55 +00:00
Juan A. Suarez Romero
90550b2a3e nir/algebraic: coalesce fmod lowering
As fmod for 16/32/64 bits lowering does the same, let's merge all of
them in a single case.

Fixes dEQP-VK.glsl.builtin.precision_double.mod.compute.* on ACO.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4118>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4118>
2020-03-12 16:42:52 +00:00
Juan A. Suarez Romero
acd0dd3b4b nir/lower_double_ops: relax lower mod()
Currently when lowering mod() we add an extra instruction so if
mod(a,b) == b then 0 is returned instead of b, as mathematically
mod(a,b) is in the interval [0, b).

But Vulkan spec has relaxed this restriction, and allows the result to
be in the interval [0, b].

For the OpenGL case, while the spec does not allow this behaviour, due
the allowed precision errors we can end up having the same result, so
from a practical point of view, this behaviour is allowed (see
https://github.com/KhronosGroup/VK-GL-CTS/issues/51).

This commit takes this in account to remove the extra instruction
required to return 0 instead.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4118>
2020-03-12 16:42:52 +00:00
Bas Nieuwenhuizen
b83c9aca4a amd/llvm: Fix divergent descriptor indexing. (v3)
There are multiple LLVM passes that very much move the
intrinsic using the descriptor outside of the loop, defeating
the entire point of creating the loop.

Defeat the optimizer by  splitting the break into a separate
if-statement and putting an optimization barrier on the bool
in between.

v2: Move from a callback based system to begin/end loop.
    This does not make it significantly less intrusive but
    is a bit nicer with all the extra struct and callback
    stubs.
v3: Deal with non-divergent values in divergent path.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2160
Fixes: 028ce52739 "radv: Add non-uniform indexing lowering."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4109>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4109>
2020-03-12 16:12:02 +00:00
Ian Romanick
ba88e95187 intel/fs: Fix NULL destinations on 3-source instructions again after late DCE
We considered moving this down near the call to
insert_gen4_send_dependency_workarounds.  By that point it's too late
for a couple reasons.  One, we're potentially increasing resiter
pressure that may lead to anoter spill.  Two, fixup_3src_null_dest tries
to allocate a VGRF, but the post-register allocation shader uses
physical registers.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2621
Fixes: ba2fa1ceaf ("intel/fs: Do cmod prop again after scheduling")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4155>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4155>
2020-03-12 08:22:43 -07:00
Timur Kristóf
cfa299eadb radv: Enable subgroup shuffle on GFX10 when ACO is used.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4159>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4159>
2020-03-12 13:34:41 +00:00
Timur Kristóf
967eb23261 radv: Enable lowering dynamic quad broadcasts.
This will lower dynamic quad broadcasts into something that both
LLVM and ACO can understand. On hardware which supports shuffles,
they are lowered to shuffle, on older hardware (GFX6-7) they will
get lowered to constant quad broadcasts.

Fixes dEQP-VK.subgroups.quad.*.subgroupquadbroadcast_nonconst_*

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4147>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4147>
2020-03-12 13:16:07 +00:00
Timur Kristóf
ec16535b49 nir: Add ability to lower non-const quad broadcasts to const ones.
Some hardware doesn't support subgroup shuffle, and on such hardware
it makes no sense to lower quad broadcasts to shuffle. Instead, let's
lower them to four const quad broadcasts, paired with bcsel instructions.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4147>
2020-03-12 13:16:07 +00:00
Eric Engestrom
3aa83d809f gen_release_notes: resolve ambiguity by renaming version to previous_version and next_version to this_version
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4113>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4113>
2020-03-12 12:57:11 +00:00
Eric Engestrom
64af6b3bcf gen_release_notes: fix version in "you should wait" message
Fixes: 86079447da ("scripts: Add a gen_release_notes.py script")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4113>
2020-03-12 12:57:11 +00:00
Alyssa Rosenzweig
dcc50f4302 pan/bi: Interpret register allocation results
Once LCRA has run, we have a map from IR indices to byte offsets into
the register file, so we need to "install" these results, rewriting the
IR to use native registers and fixing up writemasks/swizzles to
substitute vectorization for adjacent registers (for LCRA, we're
modeling in terms of real vectors).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
e8139ef645 pan/bi: Add register allocator
We model the machine as vector (with restrictions) to natively handle
mixed types and I/O and other goodies. We use LCRA for the heavylifting.
This commit adds only the modeling to feed into LCRA and spit LCRA
solutions back; next commit will integrate it with the IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
116c541c07 pan/bi: Fix missing src_types
We want types to be consistent throughout the IR so we don't have to
make exceptions to parse things out. These cases just got missed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
e1d9533925 pan/bi: Fix vector handling of readmasks
The issue was messing with liveness analysis... with Midgard we look at
the writemask to decide how the instruction behaves. Here, since our ALU
is scalar (except for subdivision which doesn't have proper writemasks
anyway) we just look at the component count directly -- either 4 for
vector instructions (essentially - for smaller loads we can replicate
manually without much burden), or 1 for scalar.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
c63105f988 pan/bi: Minor fixes in iteration macros
Found during RA bringup.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
545dedba13 pan/midgard: Remove incorrect comment in RA
Ironically, this comment was mistakenly added by the commit that fixed
the purported issue in the comment (1bce7fdecd - found by `git blame`)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
f06db4d54c panfrost: Move lcra to panfrost/util
We'll want to use it for the Bifrost RA as well.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Rhys Perry
4d0203aa83 glsl/list: use uintptr_t for exec_node_data()'s subtraction
This fixes UBSan warnings when foreach_list_typed_safe() passes NULL:
pointer index expression with base 0x000000000000 overflowed to 0xffffffffffffffa8

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4157>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4157>
2020-03-12 12:09:07 +00:00
Rhys Perry
85d05b3fd7 aco: fix uninitialized data error in waitcnt pass
Shouldn't create any incorrect waitcnts but may create suboptimial
waitcnts in rare cases.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4133>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4133>
2020-03-12 11:46:56 +00:00
Samuel Pitoiset
cc320ef9af ac/llvm: add missing optimization barrier for 64-bit readlanes
Otherwise, LLVM optimizes it but it's actually incorrect.

Fixes: 0f45d4dc2b ("ac: add ac_build_readlane without optimization barrier")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3585>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3585>
2020-03-12 08:46:42 +01:00
Tapani Pälli
9c53a3bb22 iris: toggle on PIPE_CAP_MIXED_COLOR_DEPTH_BITS
This enables additional EGL configs where we have depth/stencil buffer
with different number of bits per pixel than color buffer has. This
enables some Android games to work that require such config.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4127>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4127>
2020-03-12 05:08:48 +00:00
Hyunjun Ko
1896b44aee turnip: Add tu6_control struct.
Follow the way that freedreno is doing so that we could see the whole
layout of the scratch buffer.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:17 +00:00
Hyunjun Ko
e4f1697b54 turnip: Enable VK_EXT_transform_feedback
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
Hyunjun Ko
4a45c84672 turnip: Implement an empty function vkCmdDrawIndirectByteCountEXT
TODO. We should implement this since indirect draw is enabled.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
Hyunjun Ko
9ff1959ca5 turnip: Implement stream-out emit and vkApis for transform feedback
1. Implement vkCmdBindTransformFeedbackBuffersEXT,
vkCmdBeginTransformFeedbackEXT and vkCmdEndTransformFeedbackEXT.
 - Not handling counter buffers yet.
2. Implement streamout emit function, mostly taken from fd6_emit.c

v2. Replace emit_pkt4 funcs with emit_regs.

v3. Don't copy the state of stream-output from tu_pipeline.

v4. Set zero to VPC_SO_CNTL/VPC_SO_BUF_CNTL in tu6_init_hw.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
Hyunjun Ko
374406a7c4 turnip: Setup stream-output when linking program
Mostly taken from fd6_program.c.

v2. Note that it forces to use full VS instead of binning pass VS if
there's stream output as the binning pass VS will have outputs on
other than position/psize stripped out, which is the same as freedreno.

v3. fix indentation.

v4. Use register index instead of location when setup streamout.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
Hyunjun Ko
82fdb13c25 turnip: Define structs for transform feedback
Define new structures for streamout buffers and state.
Most members of the state struct are taken from freedreno driver.

v2. Use IR3_MAX_SO_* and avoid using magic values.

v3. Remove the state of stream-output in tu_cmd_state and use one in
tu_pipeline and split out reset and enabled fields.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
Hyunjun Ko
2a1d6b81ed turnip: Gather information for transform feedback
- Add one member to the existed ir3_stream_output so that we could
assign location information from nir_xfb_info, rather than defining
new struct.

- Redefine maximum of so buffers, streams and outputs, which will be
used for turnip.

- Also enable caps for transform feedback for spirv_to_nir.

v2. Remove redefined maximums and use IR3_MAX_SO_* and add
IR3_MAX_SO_STREAMS.

v3. Remove the newly added location field so that we could keep aligned
with 32 bytes. Instead we create an array mapping between the location
and consecutive index, which is GL driver is doing.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
David Stevens
31c420565c egl/android: set window usage flags
When creating an egl surface from an ANativeWindow, the window's usage
flags need to be set so that buffers are allocated properly.

Signed-off-by: David Stevens <stevensd@chromium.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lepton Wu <lepton@chromium.org>
2020-03-12 11:03:32 +09:00
Eric Anholt
cf5ba9d409 ci: Make a simple little bare-metal fastboot mode for db410c.
This supports powering up the device (using an external tool you
provide based on your particular lab), talking over serial to wait for
the fastboot prompt, and then booting a fastboot image on a target
device.

I was previously relying on LAVA for this, but that ran afoul of
corporate policies related to the AGPL.  However, LAVA wasn't doing
too much for us, given that gitlab already has a job scheduler and
tagging and runners.  We were spending a lot of engineering on making
the two systems match up, when we can just have gitlab do it directly.

Lightly-reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4076>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4076>
2020-03-11 21:36:47 +00:00
Eric Anholt
d51da8610f ci: Fix installation of firmware for db410c's nic.
The debian firmware package doesn't actually contain it, costing us a
minute of boot time waiting for it to show up.

Lightly-reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4076>
2020-03-11 21:36:47 +00:00
Eric Anholt
ff1183648a ci: Print the renderer/version that our dEQP invocation is using.
This is useful for sanity checking how the driver loads.

Lightly-reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4076>
2020-03-11 21:36:47 +00:00
Yevhenii Kolesnikov
32b7ba66b0 intel/compiler: fix cmod propagation optimisations
Knowing following:
 - CMP writes to flag register the result of
   applying cmod to the `src0 - src1`.
   After that it stores the same value to dst.
   Other instructions first store their result to
   dst, and then store cmod(dst) to the flag
   register.
 - inst is either CMP or MOV
 - inst->dst is null
 - inst->src[0] overlaps with scan_inst->dst
 - inst->src[1] is zero
 - scan_inst wrote to a flag register

There can be three possible paths:

 - scan_inst is CMP:

   Considering that src0 is either 0x0 (false),
   or 0xffffffff (true), and src1 is 0x0:

   - If inst's cmod is NZ, we can always remove
     scan_inst: NZ is invariant for false and true. This
     holds even if src0 is NaN: .nz is the only cmod,
     that returns true for NaN.

   - .g is invariant if src0 has a UD type

   - .l is invariant if src0 has a D type

 - scan_inst and inst have the same cmod:

   If scan_inst is anything than CMP, it already
   wrote the appropriate value to the flag register.

 - else:

   We can change cmod of scan_inst to that of inst,
   and remove inst. It is valid as long as we make
   sure that no instruction uses the flag register
   between scan_inst and inst.

Nine new cmod_propagation unit tests:
 - cmp_cmpnz
 - cmp_cmpg
 - plnnz_cmpnz
 - plnnz_cmpz (*)
 - plnnz_sel_cmpz
 - cmp_cmpg_D
 - cmp_cmpg_UD (*)
 - cmp_cmpl_D (*)
 - cmp_cmpl_UD

(*) this would fail without changes to brw_fs_cmod_propagation.

This fixes optimisation that used to be illegal (see issue #2154)

= Before =
 0: linterp.z.f0.0(8) vgrf0:F, g2:F, attr0<0>:F
 1: cmp.nz.f0.0(8) null:F, vgrf0:F, 0f
= After =
 0: linterp.z.f0.0(8) vgrf0:F, g2:F, attr0<0>:F

Now it is optimised as such (note change of cmod in line 0):

= Before =
 0: linterp.z.f0.0(8) vgrf0:F, g2:F, attr0<0>:F
 1: cmp.nz.f0.0(8) null:F, vgrf0:F, 0f
= After =
 0: linterp.nz.f0.0(8) vgrf0:F, g2:F, attr0<0>:F

No shaderdb changes

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2154

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3348>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3348>
2020-03-11 21:21:25 +00:00
Alyssa Rosenzweig
3b76b3bc09 pan/bi: Fix swizzle for second argument to ST_VARY
Off-by-one.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
f6d96aa962 pan/bi: Implement nir_op_ffma
We have native FMA which works for graphics usage (unlike Midgard where
it's really reserved for compute for various reasons), let's use it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
58f9171894 pan/bi: Add dead code elimination pass
Now that we have liveness analysis, we can cleanup the IR considerably.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
56e1c606f8 pan/bi: Add liveness analysis pass
Now that all the guts are shared with Midgard, it's just a matter of
wiring it in.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
0bff6e5e07 pan/bi: Add bi_max_temp helper
Instead of trying to reindex all the times, just be okay with consistent
but sparse indices, then figuring out the max index is easy enough.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
6e0479a6a8 pan/bi: Add bi_next/prev_op helpers
From Midgard. These are surprisingly helpful.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
e623007eb7 pan/bi: Add bi_bytemask_of_read_components helpers
Same purpose as the Midgard version, but the implementation is
*dramatically* simpler thanks to our more regular IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
e94754a7c4 pan/bi: Paste over bi_has_arg
While we're at it, cleanup the Midgard one.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
9b75f410c4 panfrost: Sync Midgard/Bifrost control flow
We can move e v e n more code to be shared and let bi_block inherit from
pan_block, which will allow us to use the shared data flow analysis.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
933e44dd43 panfrost: Move liveness analysis to root panfrost/
This way we can share the code with Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
5aaaf7b12c pan/midgard: Subclass midgard_block from pan_block
Promote as much as we feasibly can while keeping it Midgard/Bifrost
agnostic.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
c5dd1d542d pan/midgard: Sync midgard_block field names with Bifrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
4998925d6a pan/midgard: Decontextualize liveness analysis core
We mostly just need the temp_count from it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
3bbec3bc64 pan/midgard: Localize visited tracking
Instead of a property on the block, just track it within the function to
minimize IR dependencies.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
218785c4a9 pan/bi: Implement sysvals
Now that it's all abstracted nicely with an implementation shared with
Midgard, this is pretty easy to get.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
e6f5ae88a7 pan/bi: Switch to panfrost_program
...now that it's shared.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
e610267510 panfrost: Move Midgard sysval code to common Panfrost
We'll use this all as-is in Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
b756a66607 pan/midgard: Remove dest_override sysval argument
Unused, noticed while working on porting over to Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
c2ff3bb0fe pan/midgard: Decontextualize midgard_nir_assign_sysval_body
Now all sysval code should be fairly generic.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
674b24dcfd pan/midgard: Remove indexing dependency of sysvals
Ideally we would sync the compilers to use the same indexing scheme but
that's a lot more Midgard refactoring than I have time for right now.
This is good enough honestly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
7c2647f411 pan/midgard: Adjust sysval-related prototypes
We'd like to share this big chunk of code with Bifrost but that requires
removing the compiler_context parameter... which is totally unused in
fact!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
c3f438e023 pan/midgard: Remove unused iterators
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
3a4524e2fe panfrost: Promote midgard_program to panfrost/util
We'll want Bifrost to reuse the same linking mechanisms for the most
part.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Samuel Pitoiset
529c0ba219 gitlab-ci: build RADV in meson-i386 to avoid 32-bit build failures
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4044>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4044>
2020-03-11 19:30:13 +00:00
Samuel Pitoiset
f0178f516f radv: fix 32-bits build (again)
Fixes: dcfc08f5b8 ("radv/sqtt: describe begin/end command buffers with user markers")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4044>
2020-03-11 19:30:13 +00:00
Marek Olšák
fb477cc421 mesa: don't unroll glMultiDrawElements with user indices for gallium
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
2020-03-11 18:45:28 +00:00
Marek Olšák
70298ec4c0 gallium: add PIPE_CAP_DRAW_INFO_START_WITH_USER_INDICES
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
2020-03-11 18:45:28 +00:00
Marek Olšák
510bd474e6 vbo: fix vbo_copy_vertices for GL_PATCHES and adjacency primitive types
Fixes: 4c6323c49f - vbo: handle GS and tess primitive types when splitting Begin/End

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
2020-03-11 18:45:28 +00:00
Marek Olšák
218dfd8c1a vbo: fix transitions from glVertexN to glVertexM where M < N
Fixes: 1f6e53e2 "vbo: don't store glVertex values temporarily into exec"

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
2020-03-11 18:45:28 +00:00
Marek Olšák
ec7d48afc4 vbo: use vbo_exec_wrap_upgrade_vertex for glVertex in ATTR_UNION
We can't decrease the size for glVertex before a flush,
so use vbo_exec_wrap_upgrade_vertex directly.

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
2020-03-11 18:45:28 +00:00
Marek Olšák
a398a9d7e7 st/mesa: keep serialized NIR instead of nir_shader in st_program
This decreases memory usage, because serialized NIR is more compact.

The first variant is created from nir_shader for uncached shaders.
All other variants are created from serialized NIR.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2909>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2909>
2020-03-11 18:17:46 +00:00
Michel Dänzer
86d270cde4 gitlab-ci: Don't restrict ppc64el/s390x build jobs to gstreamer runners
The packet runners have beefier CPUs now and don't seem to run into
test timeouts anymore.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4128>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4128>
2020-03-11 17:20:40 +00:00
Andres Gomez
bbdf215fbd gitlab-ci: Sort packages to install alphabetically
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2020-03-11 16:17:20 +02:00
Andres Gomez
f5235a5b73 gitlab-ci: Remove unneeded python3-pilkit dependency
It was added with tracie, but it doesn't depend on it.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2020-03-11 16:17:05 +02:00
Andres Gomez
52c53c4a49 gitlab-ci: Fix indentation and dangerous "\" in the last multiline line
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2020-03-11 16:16:56 +02:00
Chris Lord
b760ccfedb vc4: Fix query_dmabuf_modifiers mis-reporting external_only property
vc4_screen_query_dmabuf_modifiers doesn't consider that the given format
may only be supported by lowering, which only happens for external
textures.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4063>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4063>
2020-03-11 09:10:13 +00:00
Timur Kristóf
61f2e8d9bb aco: Don't store TCS outputs to LDS when we're sure that none are read.
This allows us not to write an output to LDS, even if it has
an indirect offset.

No pipeline DB changes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
9b36d8c23a aco: Only write TCS outputs to LDS when they are read by the TCS.
Note that tess factors are always read at the end of the shader,
so those are still always saved to LDS.

Totals from affected shaders:
VGPRS: 25244 -> 25164 (-0.32 %)
Code Size: 1768268 -> 1690804 (-4.38 %) bytes
Max Waves: 4947 -> 4953 (0.12 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
4dcca26945 aco: Store tess factors in VMEM only at the end of the shader.
This optimizes out several superfluous stores of the tess factors,
especially if the shader wrote those outputs multiple times.

Pipeline DB changes on GFX10:
Totals from affected shaders:
SGPRS: 30384 -> 29536 (-2.79 %)
Code Size: 2260720 -> 2214484 (-2.05 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
8c3ab49c6b aco: Don't generate an if when the first part of a merged HS or GS is empty.
In some cases (eg. in a few tessellation CTS tests) the VS part of
a merged HS is completely empty. Let's not generate a divergent if
in these cases. (LLVM also doesn't do it.)

No pipeline DB changes, only affects the CTS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
b969501398 radv: Enable ACO on all stages.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
cec6a856e5 aco: Enable running TES as ES, including merged TES+GS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
4fe5eadfae radv: Enable ACO for TES when there is no GS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
926bdfae7d aco: Implement loading TES inputs.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
ec56a7093c aco: Enable streamout when TES runs on the HW VS stage.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
6047e51430 aco: Store TES outputs when TES runs on the HW VS stage.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
1d9d1cbce9 aco: Use TES output info when TES runs on the VS stage.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
0e8f4baede aco: Setup tessellation evaluation shader variables.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
80d281c6dc radv: Enable ACO for tessellation control shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
a952bf3946 aco: Fix LS VGPR init bug on affected hardware.
Vega 10 and Raven have a HW bug: when the HS thread count is zero,
the LS input arguments are loaded in the wrong registers. This commit
works around this by using the registers where the data actually is,
for the affected arguments.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
57a7d58c5d aco: Store VS outputs correctly when tessellation is used.
When tessellation is used, the VS runs on the HW LS stage (merged
into HS on GFX9-10). This commit enables such VS to store its
outputs properly in LDS so that the TCS can load them as its
per-vertex inputs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
7b7f196fbc aco: Implement tessellation control shader input/output.
Tessellation control shaders can have per-vertex inputs,
and both per-vertex and per-patch outputs. TCS can not only store,
but also load their outputs.

The TCS outputs are stored in RING_HS_TESS_OFFCHIP in VMEM, which
is where the TES reads them from. Additionally, the are also stored
in LDS to make sure they can be loaded fast when read by the TCS.

Tessellation factors are always just stored in LDS.
At the end of the shader, the first shader invocation reads these
from LDS and writes them to RING_HS_TESS_FACTOR in VMEM, and
additionally to RING_HS_TESS_OFFCHIP when they are read by
the Tessellation Evaluation Shader.

This implementation matches the memory layouts used by radv_nir_to_llvm.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
655c050119 aco: Fix combining DS additions in the optimizer.
Previously, it was calculated incorrectly for 64-bit writes and reads.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
c70b0d0267 aco: Slight fix to lds_store and lds_load.
This commit fixes lds_store and lds_load so that they can
properly support 32 and 64-bit loads and stores; and makes
them a little more reusable so they can be used by
tessellation control shaders.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
db93af5f1b aco: Refactor VS output stores in preparation for tessellation.
This commit takes the new helpers into use by the VS output
store function. This function is also where the VS outputs will
be handled when the VS runs on the HW LS stage.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
0062bb04ac aco: Refactor load_per_vertex_input in preparation for tessellation.
This commit carves out the GS per-vertex input load, and takes the
new helper functions into use.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
4e692d65e1 aco: Introduce new helpers for calculating address offsets.
These helpers are going to make it unnecessary to reimplement the
(almost) same address offset calculation in mulitple places.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
19d5dc9cee aco: Introduce new VMEM load/store helpers.
These are going to be used for loading and storing inputs
and outputs in various stages, such as GS, TCS and TES.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
4fc1da208e aco: Remove esgs_itemsize from LDS alignment calculation.
It was problematic to have it, because some shader stages might
not even know about the esgs_itemsize, for example TCS and
the merged VS+TCS stages.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
ca342701c5 aco: Extract LDS alignment calculation to a separate function.
This function is going to be reused in multiple functions when
storing or loading something in the LDS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
fe80f22470 aco: Remove vertex_geometry_gs assertion from merged shaders.
We are going to support more kinds of merged shaders, such
as vertex_tess_control_hs and tess_eval_geometry_gs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
f53d31fb9b aco: Use mesa shader stage when loading inputs.
This makes it more clear which stages should load these inputs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
9016711273 aco: Setup correct HW stages when tessellation is used.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
89ff5b1e51 aco: Implement load_view_index for TCS and TES.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
aa5eed673c aco: Implement memory_barrier_tcs_patch.
TCS outputs are going to be written to LDS, so it
has to use memory_barrier_shared in order to ensure
that it waits for LDS writes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
a8d15ab6da aco: Implement control_barrier for tessellation control shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
2489e4dfd1 aco: Implement load_invocation_id for tessellation control shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
5107b0312a aco: Implement load_patch_vertices_in.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
6edf6ad130 aco: Implement load_primitive_id for tessellation shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
754837f3b5 aco: Implement load_tess_coord.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
9ca2b254ca aco: Setup tessellation control shader variables.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
7b3316f3c9 aco: Extract setup_gs_variables into a separate function.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
346bd0c623 radv: Move some helper functions to the radv_shader.h header file.
Move calculate_tess_lds_size and get_tcs_num_patches to radv_shader.h
ACO will need to call these functions too.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Pierre-Eric Pelloux-Prayer
78d42d41d4 vdpau: remove bogus assert
The assert introduced by 24f2b0a856 triggers when an application
requests a chroma_type that's different to the one from the
PIPE_VIDEO_CAP_PREFERED_FORMAT (before this change the chroma_type
was set but ignored).

So restore this behavior and ignore the chroma_type.

Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Fixes: 24f2b0a856 ("gallium/video: remove pipe_video_buffer.chroma_format")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4104>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4104>
2020-03-11 08:17:07 +00:00
Samuel Pitoiset
b6cebf6439 radv: do not recursively begin/end render pass for meta operations
To avoid breaking SQTT user markers that are emitted to report
barriers and layout transitions to RGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4136>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4136>
2020-03-11 07:54:43 +00:00
Vasily Khoruzhick
c78e88e8a6 lima/gpir: print acc ops even if we have only one source
floor and sign have only one source, so we need to print acc ops
even if src1 is unused.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4110>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4110>
2020-03-11 07:36:45 +00:00
Vasily Khoruzhick
492ef353fb lima/gpir: improve disassembler output
Print each op at new line and add unit name suffix for each op.
It improves readability a bit and gives us a hint what unit
was used for particular op.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4110>
2020-03-11 07:36:44 +00:00
Vasily Khoruzhick
bcbc2b61b5 lima: print gp uniforms if gp debug is enabled
Since we keep other constants there as well it's useful for reading disassembly.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4110>
2020-03-11 07:36:44 +00:00
Samuel Pitoiset
8f5543990e gitlab-ci: add rules:changes for RADV
Including mesa_core_file_list is probably not the best but it's
better than nothing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4117>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4117>
2020-03-11 08:04:05 +01:00
John Stultz
be22995ecf gallium: hud_context: Fix scalar initializer warning.
When trying to build mesa/master under AOSP, I've run into the
following error:

external/mesa3d/src/gallium/auxiliary/hud/hud_context.c:1821:31: error: braces around scalar initializer [-Werror,-Wbraced-scalar-init]
   struct sigaction action = {{0}};
                              ^~~
1 error generated.

This patch addresses this by switching to using memset instead of
using an initializer.

Signed-off-by: John Stultz <john.stultz@linaro.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4141>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4141>
2020-03-11 02:52:58 +00:00
John Stultz
09fbde830f panfrost: Move pan_afbc.c file to the the right Makefile.source file
It seems pan_afbc.c was added to the wrong Makefile.sources file.

So fix this, so we don't run into build issues with mesa/master
trying to build under AOSP.

Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4141>
2020-03-11 02:52:58 +00:00
John Stultz
67aae8f98f freedreno: Add ir3_cf.c and ir3_delay.c to Makefile.sources
This patch adds missing ir3_cf.c and ir3_delay.c files to
the Makefile.sources file to address build issues seen
when trying to build mesa/master on AOSP

Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4141>
2020-03-11 02:52:58 +00:00
Marek Olšák
2dc300421d gallium/cso_context: remove cso_delete_xxx_shader helpers to fix the live cache
With the live shader cache, equivalent shaders can be backed by the same
CSO. This breaks the logic that identifies whether the shader being deleted
is bound.

For example, having shaders A and B, you can bind shader A and delete
shader B. Deleting shader B will unbind shader A if they are equivalent.

Pierre-Eric figured out the root cause for this issue.

Fixes: 0db74f479b - radeonsi: use the live shader cache
Closes: #2596

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4078>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4078>
2020-03-10 22:19:47 -04:00
Eric Engestrom
1fa259b035 vulkan/wsi: fix cleanup when dup() fails
Fixes: f5433e4d6c ("vulkan/wsi: Add modifiers support to wsi_create_native_image")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4137>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4137>
2020-03-10 22:43:25 +00:00
Karol Herbst
6e035c01fb Revert "gallium: make handles of set_global_binding 64 bit"
This reverts commit e1ffb72a05
2020-03-10 22:41:26 +00:00
Karol Herbst
e1ffb72a05 gallium: make handles of set_global_binding 64 bit
needed by CL

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4072>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4072>
2020-03-10 22:06:19 +00:00
Alyssa Rosenzweig
0541350e3a pan/bi: Implement comparison opcodes via BI_CMP
Pretty straightforward for the moment. Ideally these would be fused into
csel/branches but that will come a bit later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:26:00 +00:00
Alyssa Rosenzweig
6409896ca7 pan/bi: Print source types unconditionally
We track them all now, let's use them.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:26:00 +00:00
Alyssa Rosenzweig
20c7d57ede pan/bi: Specify comparison op for BI_CMP
...and adjust printing so we can use it as an op name.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:26:00 +00:00
Alyssa Rosenzweig
08ab7cecd9 pan/bi: Lower b2f to bcsel
Since we can get a zero for free and a one inlined into the constant,
the obvious turns out to be efficient (while allowing flexibility for
boolean size).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
d3823551b4 pan/bi: Implement nir_op_bcsel
No condition fusing yet.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
3a1baafede pan/bi: Import algebraic pass from midgard
We'll need some of these at least.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
55f0d811e4 pan/bi: Add isub op
Can't be a regular ADD since there's no negate modifier for integers
(it's a different opcode entirely).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
acab788578 pan/bi: Disable lower_sub
For float, fixing up the modifier ourselves is easy. For int, we have a
dedicated isub instruction anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
1216a63ff2 pan/bi: Implement fabs, fneg as fmov with mods
Fusing will come later with the appropriate NIR support.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
8ed79c9ed7 pan/bi: Handle special ops in NIR->BIR
Only on supported GPUs at the moment; for older Bifrost that don't
support these, I'm not sure yet where the right place to do the lowering
is. NIR algebraic rules would be "nice" but probably impractical -- but
it wouldn't be hard to do it directly in BIR (as a lowering pass or
alternative implementation).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
b674e39d72 pan/bi: Add BI_SPECIAL_* enum
To disambiguate the different special ops from each other.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
c862234ab3 pan/bi: Add a bunch of ALU ops
These are all regular ALU ops found in GLES2 which makes them
particularly nice targets at the moment. Just translate straight to our
IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
5a5896cd76 pan/bi: Implement fsat as mov.sat
Soon we'll have a NIR support to handle this the Right Way along with
pos and sat_signed support, but we'll always need the fallback anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
48e50efd5d pan/bi: Allow inlining constants
This will allow us to optimize out the constant moves (although that
will require a DCE pass which has yet to be written).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
929baf3f88 pan/bi: Add initial handling of ALU ops
We do the bare minimum translation, just enough for fmov/fadd/fmul right
now with no modifiers / inlined constants / etc. The rest is to come!
But hopefully I got bitsize handling right this time around.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
330e9a6696 pan/bi: Lower vec* to writemasks in NIR
I was hoping not to tread down this path but it seems inevitable now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
69c66ffd84 pan/bi: Remove bi_load
This is now made redundant with writemasks, so let's regularize the IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
e9d480ca1b pan/bi: Introduce writemasks
I feel so dirty. But this will let the IR be a lot more flexible seeing
as we really are vector in a certain sense (I/O, small types)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
795646d8f8 pan/bi: Generalize swizzles to avoid extracts
We'd really rather not emit extracts. We are approaching on a vector IR
anyway which is annoying but really necessary to handle I/O and fp16
correctly. So let's just go all the way and deal with swizzles and masks
within reason; it'll still be somewhat saner in the long-term.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
9b8cb9f5ae panfrost: Move mir_to_bytemask to common code
...also so we can start sharing code properly between the panfrost
compilers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Rob Clark
ba03e308b6 freedreno/fdperf: set locale
Set local to get numbers printed w/ commas.. much easier to read that
way.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4119>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4119>
2020-03-10 16:52:02 +00:00
Rob Clark
30dd059925 freedreno/computerator: add performance counter support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4119>
2020-03-10 16:52:02 +00:00
Jason Ekstrand
af68b0d346 vulkan/wsi: Return an error if dup() fails
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4135>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4135>
2020-03-10 16:39:27 +00:00
Jason Ekstrand
34d2637fa7 vulkan/wsi: Don't leak the FD when GetImageDrmFormatModifierProperties fails
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4135>
2020-03-10 16:39:27 +00:00
Rob Clark
3c96e25de7 freedreno/ir3: try to avoid syncs
Update postsched to be better aware of where costly (ss) syncs would
result.  Sometimes it is better to allow a nop or two, to avoid a
sync quickly after an SFU.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
cc82521de4 freedreno/ir3: round-robin RA
In the second (scalar pass) use the information about # of registers
used in the first pass as the target max, and round-robin within that
range.  This generally gives the post-RA sched pass more opportunities
to re-order instructions to remove nop's.

Also, we can be a bit clever when assigning dest registers for SFU
instructions, by picking the register used for it's src (if available
and already assigned).  This avoids some (ss) syncs caused by write
after read hazards.  (Ie. the SFU instruction will read it's own src
before writing dest.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
b2b349096f freedreno/ir3: track register usage in first RA pass
We'll use the feedback from the first pass to select a target register
usage in the second pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
9ae93be8fb freedreno/ir3: fix has_latency_to_hide
Also count tex-prefetch instructions.  And only let the no-latency rule
kick in for frag shaders.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
b6eb11295a freedreno/ir3: split out has_latency_to_hide()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
dd2e050a84 util/ra: move NO_REG to header
In the select_reg callback, I want to be able to determine if a given
node is already assigned, and if so what physical register has been
assigned.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
36aed70b59 util/ra: spiff out select_reg_callback
Add a parameter so the callback can know which node it is selecting a
register for.  And remove the graph parameter, as it is unused by
existing users, and somewhat unnecessary (ie. the callback data could
be used instead).

And add a comment so $future_me remembers how this works.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
b3efa2a4da freedreno: fix FD_MESA_DEBUG=inorder
Fixes: 2c07e03b79 ("freedreno: allow ctx->batch to be NULL")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
752b9985be freedreno/ir3: add simplified stall estimation
Doesn't take into account stalls that result from a register written in
a different block, etc.  But this should be more useful than just using
number of (ss)'s by trying to estimate how costly a given sync is.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
64ae2ef8bb freedreno/ir3: remove extra nops inserted in scheduler
They were inserting a nop between back to back SFU instrucions.  But
that doesn't actually appear to be required.  And they get stripped out
later anyways before legalize.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
ad2ff7a278 freedreno/computerator: add hrsq/hlog2/hexp2
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
4a8e4c18d2 freedreno/ir3: also lower lowp frag outputs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
3535797e8c nir/print: show variable precision
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Danylo Piliaiev
10eee6d8c6 intel/tools: Fix compilation with UBSan
Compilation failed with several similar errors:

../src/intel/tools/aub_read.c:322:4: error: case label does not reduce to an integer constant
  322 |    case MAKE_HEADER(TYPE_AUB, OPCODE_AUB, SUBOPCODE_HEADER):

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4132>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4132>
2020-03-10 15:20:26 +00:00
Mathias Fröhlich
74be835a84 i965: Use gl_vertex_format in brw_vertex_element.
State upload needs to cope with the vertex format
rather than with the full attribute data.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
e62b82a693 i965: Make use of the vertex format functions in i965.
v2: Style fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
cf929823bf mesa: Provide gl_vertex_format accessors.
Provide the same set of VAO and current value gl_vertex_format
accessor functions like we have for the gl_array_attributes.
For most purpose the vertex format is what we need.

v2: Style fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
1641c872ed mesa: Remove now unused _mesa_draw_attrib.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
305724dd7b mesa: Remove now unused _mesa_draw_attrib_and_binding.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
4ccda7bfd9 i965: Remove glbinding from brw_vertex_element.
v2: Rebase.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
38db4f1720 i965: Reorder workaround flags computation.
Vertex processing workaround flags can be split into
array and current vertex attributes. By that we
can use specific access functions for these different
vertex attribute kinds. This finally obsoletes
some access functions that I introduced last winter
for a smooth transition.

v2: Style fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
e53fd073be i965: Split merge_inputs and clear_buffers.
The merge_inputs function handles that part that changes when the
inputs change. The clear_buffers function triggers when we may need
a new upload. Thus the merge_inputs can be limited to be once
per brw_draw_prims.

v2: Move declaration of attribute index into the for scope.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
de579ffba2 i965: Test original vertex array pointer to skip array upload.
Rather than do a NULL pointer check on a pointer that may be offset by the
min-max index range of an GL draw operation, execute the NULL test on the
original vertex array pointer.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
b684030c3a i965: Use the VAOs binding information in array setup.
The change basically reimplements array setup by walking
the gl_contex::Array._DrawVAO on a per binding sequence.
In this way we can make direct use of the application
provided minimum set of buffer objects and emit fewer relocs.

v2: Rebase onto:
    compiler: Move double_inputs to gl_program::DualSlotInputs
v3: Rebase onto introduction of gl_vertex_format
v4: Reorder and extend patch series.
v5: Split out two hunks into seperate patches.
v6: Avoid using GL* types.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
e1f2c84282 i965: Use 32 bit u_bit_scan for vertex attribute setup.
The vertex array object contains 32 vertex arrays. By that we cannot
reference more then these in the vertex shader inputs. So, we can use
the 32 bits u_bit_scan function to iterate the vertex shader inputs
and place an assert that only these are present. Also place an other
assert that the vertex array setup in i965 does not overrun the
enabled array in brw_context:🆚:enabled.

v2: Style fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
0ea3ca3eca iris: Move down iris_emit_sbe_swiz in profiles.
Harvest the information gathered in the previous patch
inside of iris.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:36 +00:00
Mathias Fröhlich
630154e77b i965: Move down genX_upload_sbe in profiles.
Avoid looping over all VARYING_SLOT_MAX urb_setup array
entries from genX_upload_sbe. Prepare an array indirection
to the active entries of urb_setup already in the compile
step. On upload only walk the active arrays.

v2: Use uint8_t to store the attribute numbers.
v3: Change loop to build up the array indirection.
v4: Rebase.
v5: Style fix.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:36 +00:00
Boris Brezillon
b1a6a15aaf panfrost: Get rid of ctx->payloads[]
Now that vertex/tiler payloads are re-initialized at draw/launch_grid
time we can get of of the ctx->payloads[] field and allocate those
payload templates on the stack.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
093da77ce6 panfrost: Use ctx->active_prim in panfrost_writes_point_size()
Check ctx->active_prim instead of prefix.draw_mode so we can eventually
get rid of ctx->payloads.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
d66ef690d1 panfrost: Re-init the VT payloads at draw/launch_grid() time
Doing that should help us avoiding state leaks between draw/launch_grid
calls.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
836686daf3 panfrost: Move panfrost_emit_varying_descriptor() to pan_cmdstream.c
Move panfrost_emit_varying_descriptor() to pan_cmdstream.c where other
emit functions live and adjust the prototype to be consistent with other
emit helpers.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
b95530bef2 panfrost: Move panfrost_emit_vertex_data() to pan_cmdstream.c
Move panfrost_emit_vertex_data() to pan_cmdstream.c where other emit
functions live, and adjust the prototype for consistency.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
251e685e72 panfrost: Inline panfrost_queue_draw() and panfrost_emit_for_draw()
Now that panfrost_queue_draw() and panfrost_emit_for_draw() are
small enough, we can move the code to panfrost_draw_vbo() and have all
vt and emit calls grouped in one place.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
5d9995e82c panfrost: Move vertex/tiler payload initialization out of panfrost_draw_vbo()
Add a panfrost_vt_set_draw_info() function taking care of the draw
related initialization of the vertex and tiler payloads.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
13881a4dad panfrost: Move streamout offset update out of panfrost_draw_vbo()
That's part of out attempt to shrink panfrost_draw_vbo().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
046c154585 panfrost: Rename panfrost_stage_attributes()
panfrost_stage_attributes() is emitting mali_attr_meta descriptors, so
let's rename it accordingly and move it to pan_cmdstream.c.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
dcc0b1ff01 panfrost: Move the mali_attr.src_offset adjustment to a sub-function
Create a panfrost_vertex_state_upd_attr_offs() helper to adjust
the attr_meta src_offsets.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
575f62ea02 panfrost: Emit attribute descriptors after patching the templates
Patching attribute desc when they are in cacheable memory should be
more efficient.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
4a2ee61a22 panfrost: Prepare attribute for builtins at state creation time
The attribute meta slots reserved for gl_VertexID and gl_InstanceID
can be pre-filled at state creation time. Only the index needs to be
adjusted when attributes are generated.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
b692ab076a panfrost: Ignore BO start addr when adjusting src_offset
BOs are guaranteed to be aligned on 4K which inherently guarantees the
64 byte alignment.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
128820b886 panfrost: Drop initial mali_attr_meta.src_offset assignment
The mali_attr_meta.src_offset is initialized to
pipe_vertex_element.src_offset at vertex element creation time, but
this field is then adjusted when the descrptors are emitted. Let's
use the pipe_vertex_element data we saved earlier and drop this initial
assignment.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
528384cb6d panfrost: Add an helper to emit a pair of vertex/tiler jobs
Add the panfrost_emit_vertex_tiler_jobs() helper and use it in
panfrost_queue_draw().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
8e0a08bc8e panfrost: Move sampler/tex descs emission helpers to pan_cmdstream.c
Move panfrost_upload_texture_descriptors() and
panfrost_upload_sampler_descriptors() to pan_cmdstream.c where other
cmdstream related helpers live. While at it, change their prototype
and name to make it consistent with the other helpers and prepare
things for ctx->payloads[] removal.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
2b946a1d2b panfrost: Add a panfrost_sampler_desc_init() helper
It just makes sense to group all HW descriptor initilization logic in
pan_cmdstream.c, so let's move this code out of
panfrost_create_sampler_state().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
b02f97c875 panfrost: Prepare shader_meta descriptors at emission time
This way we avoid potential state leaks and keep the shader_meta
initialization in once place. The time spent preparing the shader
descriptors should be negligible compared to the time spent pushing
those descriptors to the transient buffer (remember we are writing to
non-cacheable memory here).

Note that we might get back to some sort of shader_meta descriptor
caching at some point if that proves necessary, but now we have those
panfrost_frag_meta_xxx_update() helpers now where xxx maps directly to
a CSO bind, which should ease desc template updates.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
55e014336f panfrost: Prepare things to get rid of panfrost_shader_state.tripipe
panfrost_shader_state.tripipe is used as a template for shader_meta
desc emission, but shader_meta desc preparation time should be negligible
compared to desc emission time (remember we are writing to non-cacheable
memory here). Let's prepare for generating the the shader_meta desc
entirely at draw time by adding the necessary fields to
panfrost_shader_state.

Note that we might brink back some sort of shader_meta desc caching at
some point, but let's simplify things a bit for now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
e94076f8f5 panfrost: Add an helper to update the rasterizer part of a tiler job desc
That's part of our attempt to make panfrost_emit_for_draw() a bit more
dry and eventually get rid of it by inlining the code in
panfrost_draw_vbo(). This is just one step in this direction.

Note that we get rid of the panfrost_rasterizer.tiler_gl_enables field
along the way, as setting/clearing those bits at draw time instead of
doing when the state is created should make a huge difference. We might
get back to pre-computed VT descs at some point, but let's keep things
simple for now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
56aeb921e9 panfrost: Add an helper to update the occclusion query part of a tiler job desc
That's part of our attempt to make panfrost_emit_for_draw() a bit more
dry and eventually get rid of it by inlining the code in
panfrost_draw_vbo(). This is just one step in this direction.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
5f043cc776 panfrost: Simplify panfrost_emit_for_draw() and make it private
Now that panfrost_launch_grid() no longer calls panfrost_emit_for_draw(),
we can keep it private to pan_context.c and drop all compute-related
stuff.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
8ac17139b1 panfrost: Stop using panfrost_emit_for_draw() for compute jobs
We actually need a small subset of what's done in
panfrost_emit_for_draw() when emitting compute jobs, so let's copy
what we need directly in panfrost_launch_grid() instead of re-using
this function whose initial purpose was to generate vertex/tiler jobs
for draw operations.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
0d75eb002e panfrost: Move panfrost_attach_vt_framebuffer() to pan_cmdstream.c
Move panfrost_attach_vt_framebuffer() to pan_cmdstream.c and change its
name to panfrost_vt_attach_framebuffer() so we can use a consistent
prefix (panfrost_vt_) for all helpers initializing/updating
midgard_payload_vertex_tiler fields.

Note that the function only initializes one VT object now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
5d33d42b4d panfrost: Dissociate shader meta patching from the desc emission
Right now we emit two shader descriptors for the fragment shader, one
when panfrost_patch_shader_state() is called, and the final one
including both the shader_meta and the blend RT descriptors.
The first generated fragment shader descriptor is never used, since the
second one overrides the postfix.shader pointer.

Let's dissociate the state patching logic from the descriptor emission
so we don't upload descriptors that are never used.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
36725be4d9 panfrost: Move shared mem desc emission out of panfrost_launch_grid()
Let's move the shared memory descriptor emission to a dedicated function
living with its pairs in pan_cmdstream.c.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
0b735a2d80 panfrost: Move the const buf emission logic out of panfrost_emit_for_draw()
Let's move the constant buffer emission logic in a dedicated helper
to make panfrost_emit_for_draw() a bit more dry.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
a72bab1c3e panfrost: Move viewport desc emission out of panfrost_emit_for_draw()
Let's move the viewport descriptor emission logic to a dedicated helper
in order to shrink a bit the panfrost_emit_for_draw().

Note that this helper is placed in a new pan_cmdstream.c file where we
will group all cmdstream related helpers (everything that's related to
HW descriptor initialization emission).

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
79f8850527 panfrost: Move the batch stack size adjustment out of panfrost_queue_draw()
That's part of our attempt to sanitize panfrost_queue_draw(),
panfrost_draw_vbo() and panfrost_emit_for_draw(). The new
panfrost_batch_adjust_stack_size() helper is placed in pan_job.c, where
all batch related functions live.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
b28f4bb67c panfrost: Add an helper to retrieve the currently active shader state
Doing that improves readability and helps avoiding code duplication.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
a0402f7960 panfrost: Assign primitive_size.pointer only if writes_point_size() returns true
Checking vs->writes_point_size is not enough, as we might have a vertex
shader writing point size, but a primitive that's not MALI_POINT. That
currently works because emit_varying_descriptor() is called before the
primitive_size.constant field is update, but let's make the logic more
robust, just in case things are re-ordered at some point.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Samuel Pitoiset
24db276d11 radv/sqtt: describe pipeline and wait events barriers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 10:05:40 +01:00
Samuel Pitoiset
c04e9befc0 radv/rgp: bump the instrumentation spec version to 1
RGP expects the version to be 1, otherwise it doesn't display the
barriers (including layout transitions) correctly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 10:05:40 +01:00
Samuel Pitoiset
ac0d5b6b11 radv/sqtt: describe render pass color/depthstencil clears
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 10:05:40 +01:00
Samuel Pitoiset
b829fbb7f0 radv/sqtt: describe draw/dispatch and emit event markers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 10:05:40 +01:00
Samuel Pitoiset
dcfc08f5b8 radv/sqtt: describe begin/end command buffers with user markers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 09:58:02 +01:00
Samuel Pitoiset
31ecf0b17d radv: initial implementation of the driver internal layer SQTT
This layer is used to emit SQTT user markers to command buffers. It
currently only emits API markers but it will consolidated soon with
barrier markers and more.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 09:57:59 +01:00
Samuel Pitoiset
be700775dc radv/sqtt: add a helper that emits thread trace userdata markers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 09:57:56 +01:00
Samuel Pitoiset
f4fbcfe818 radv: use device entrypoints from the SQTT layer if enabled
This allows to override RADV device entrypoints if the prefix
is 'sqtt' instead of 'radv'.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 09:57:53 +01:00
Samuel Pitoiset
9c88e4a272 radv/entrypoints: declare a driver internal layer for SQTT
Some Vulkan commands will be overriden to emit user SQTT markers.
These markers are then used by the Radeon GPU Profiler to display
timings, barrier operations (cache flushes, pipeline stalls, layout
transitions) and more.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 09:57:49 +01:00
Boris Brezillon
a64599a303 panfrost: Pass the sampler view format when creating a tex descriptor
A sampler can use a different format than the native texture format.
Let's pass the sampler format instead of the native texture format when
creating a texture descriptor.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4101>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4101>
2020-03-10 08:43:08 +01:00
Boris Brezillon
ce845f44e9 Revert "panfrost: Z24 variants should be sampled as R32UI"
Commit 0406ea4856 ("panfrost: Z24 variants should be sampled as
R32UI") causes a regression when depth textures are sampled.

It's still not clear how MALI_Z32 can work for for Z32 and Z24{S,X}8,
but let's leave that question for later.

Reported-by: Icecream95 <ixn@keemail.me>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4101>
2020-03-10 08:42:05 +01:00
Tomeu Vizoso
8d0ec5b8a6 gallium: Add forgotten docs for new CAPs related to transform feedback
These three caps were missing docs.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4115>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4115>
2020-03-10 07:26:13 +01:00
Vasily Khoruzhick
251c6991a3 lima: enable minmax cache for index buffers
Re-use minmax cache for index buffers from panfrost.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4051>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4051>
2020-03-10 02:41:27 +00:00
Vasily Khoruzhick
53d6bb9fc6 panfrost: split index cache into shared part
Split it into shared part since we're going to re-use it in lima.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4051>
2020-03-10 02:41:27 +00:00
Marek Olšák
040a7117c3 st/mesa: fix a possible crash with selection and feedback modes
The index bounds are always valid without an index buffer, but they won't be.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3986>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3986>
2020-03-09 21:26:55 -04:00
Marek Olšák
7b0e043d48 st/mesa: flush the bitmap cache before st/dri and vbo flushes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3986>
2020-03-09 21:26:55 -04:00
Francisco Jerez
45d4665dc7 intel/fs: Fix workaround for VxH indirect addressing bug under control flow.
The current workaround for this hardware bug involved marking the ADD
instruction used to initialize the address register as NoMask on
Gen12, which was based on the assumption that the problem was caused
by a hardware bug affecting the application of the execution mask to
the address register write.

However that doesn't seem to be the case: The address register write
was working correctly, the real problem leading to hangs on TGL is
that the indirect addressing logic is unable to deal with garbage
values in the address register (e.g. misaligned offsets), even for
channels which are currently inactive due to non-uniform control flow.
The current workaround isn't able to avoid that situation in general,
since the result of the NoMask ADD instruction for a dead channel is
calculated based on the corresponding (dead) component of the
indirect_byte_offset source, which would still be undefined in the
likely case that the source was initialized under control flow itself.

This would lead to hangs whenever MOV_INDIRECT was used under
non-uniform control flow in some scenarios like a tessellation shader
from GFXBench5/gl_4 (AKA Car Chase) on TGL.  In addition I've managed
to reproduce the same issue on earlier platforms by initializing the
whole address register with garbage before the ADD instruction, so
this seems to be a long-standing issue we have avoided mostly by luck.

This patch fixes the problem and applies the workaround to all
platforms, since even when the hardware is able to deal with garbage
address values without hanging there might be a significant
performance cost from reading random GRF registers due to the useless
extra EU cycles spent fetching registers for dead channels and due to
the potential for unintended serialization with respect to other
random instructions that could be executed in parallel, which may have
had a cost of the order of hundreds of cycles in the worst case
scenario.

Fixes: f93dfb509c "intel/fs: Write the address register with NoMask for MOV_INDIRECT"
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2020-03-10 00:42:50 +00:00
Ian Romanick
c144875f62 intel/fs: Allow NOT instructions in conditional discard optimization
I don't know why I explicitly disallowed NOT in the first place. :(

All Intel platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 14549846 -> 14549770 (<.01%)
instructions in affected programs: 12934 -> 12858 (-0.59%)
helped: 76
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.13% max: 5.56% x̄: 1.04% x̃: 0.90%
95% mean confidence interval for instructions value: -1.00 -1.00
95% mean confidence interval for instructions %-change: -1.25% -0.84%
Instructions are helped.

total cycles in shared programs: 203793967 -> 203792696 (<.01%)
cycles in affected programs: 77920 -> 76649 (-1.63%)
helped: 67
HURT: 1
helped stats (abs) min: 2 max: 36 x̄: 19.00 x̃: 16
helped stats (rel) min: 0.04% max: 4.68% x̄: 2.35% x̃: 2.28%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.03% max: 0.03% x̄: 0.03% x̃: 0.03%
95% mean confidence interval for cycles value: -20.75 -16.63
95% mean confidence interval for cycles %-change: -2.57% -2.05%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3965>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3965>
2020-03-09 16:46:28 -07:00
Ian Romanick
ba2fa1ceaf intel/fs: Do cmod prop again after scheduling
Pre-RA scheduling can create more opportunities for CMOD propagation.
This takes advantage of that.

It may be worth doing this again in post-RA scheduling, but there are
additional problems there.

I'm a little torn about the use of the OPT() macro.  On the one hand, it
would be confusing to see dumps from INTEL_DEBUG=optimizer that don't
match the final output.  On the other hand, since register allocation
can fail, the same pass can be run multiple times.  Each time one or
both passes might or might not make progress.  This would also lead to
incongruous, confusing output.

Ice Lake
total instructions in shared programs: 14549808 -> 14548529 (<.01%)
instructions in affected programs: 231985 -> 230706 (-0.55%)
helped: 632
HURT: 0
helped stats (abs) min: 1 max: 32 x̄: 2.02 x̃: 1
helped stats (rel) min: 0.05% max: 2.56% x̄: 0.57% x̃: 0.41%
95% mean confidence interval for instructions value: -2.25 -1.79
95% mean confidence interval for instructions %-change: -0.61% -0.54%
Instructions are helped.

total cycles in shared programs: 203770850 -> 203776599 (<.01%)
cycles in affected programs: 2495653 -> 2501402 (0.23%)
helped: 282
HURT: 197
helped stats (abs) min: 1 max: 242 x̄: 20.37 x̃: 16
helped stats (rel) min: <.01% max: 11.65% x̄: 0.91% x̃: 0.64%
HURT stats (abs)   min: 2 max: 609 x̄: 58.35 x̃: 20
HURT stats (rel)   min: <.01% max: 10.97% x̄: 1.35% x̃: 0.66%
95% mean confidence interval for cycles value: 5.27 18.73
95% mean confidence interval for cycles %-change: -0.16% 0.21%
Inconclusive result (%-change mean confidence interval includes 0).

LOST:   0
GAINED: 2

Skylake
total instructions in shared programs: 13447708 -> 13446594 (<.01%)
instructions in affected programs: 216813 -> 215699 (-0.51%)
helped: 623
HURT: 0
helped stats (abs) min: 1 max: 32 x̄: 1.79 x̃: 1
helped stats (rel) min: 0.06% max: 2.86% x̄: 0.59% x̃: 0.42%
95% mean confidence interval for instructions value: -1.99 -1.59
95% mean confidence interval for instructions %-change: -0.63% -0.55%
Instructions are helped.

total cycles in shared programs: 193759224 -> 193762726 (<.01%)
cycles in affected programs: 2540035 -> 2543537 (0.14%)
helped: 249
HURT: 190
helped stats (abs) min: 2 max: 196 x̄: 16.67 x̃: 14
helped stats (rel) min: <.01% max: 4.71% x̄: 0.66% x̃: 0.62%
HURT stats (abs)   min: 2 max: 614 x̄: 40.27 x̃: 14
HURT stats (rel)   min: 0.02% max: 5.78% x̄: 0.86% x̃: 0.37%
95% mean confidence interval for cycles value: 2.57 13.39
95% mean confidence interval for cycles %-change: -0.11% 0.11%
Inconclusive result (%-change mean confidence interval includes 0).

LOST:   0
GAINED: 1

Broadwell
total instructions in shared programs: 13418631 -> 13417393 (<.01%)
instructions in affected programs: 243192 -> 241954 (-0.51%)
helped: 694
HURT: 0
helped stats (abs) min: 1 max: 31 x̄: 1.78 x̃: 1
helped stats (rel) min: 0.06% max: 2.86% x̄: 0.59% x̃: 0.44%
95% mean confidence interval for instructions value: -1.95 -1.62
95% mean confidence interval for instructions %-change: -0.62% -0.55%
Instructions are helped.

total cycles in shared programs: 200822940 -> 200829128 (<.01%)
cycles in affected programs: 2128651 -> 2134839 (0.29%)
helped: 251
HURT: 226
helped stats (abs) min: 1 max: 200 x̄: 14.32 x̃: 12
helped stats (rel) min: <.01% max: 3.56% x̄: 0.60% x̃: 0.50%
HURT stats (abs)   min: 2 max: 611 x̄: 43.28 x̃: 18
HURT stats (rel)   min: 0.02% max: 7.03% x̄: 0.93% x̃: 0.54%
95% mean confidence interval for cycles value: 7.44 18.50
95% mean confidence interval for cycles %-change: 0.02% 0.23%
Cycles are HURT.

Haswell and Ivy Bridge had similar results. (Haswell shown)
total instructions in shared programs: 11569710 -> 11568829 (<.01%)
instructions in affected programs: 147862 -> 146981 (-0.60%)
helped: 487
HURT: 0
helped stats (abs) min: 1 max: 34 x̄: 1.81 x̃: 1
helped stats (rel) min: 0.12% max: 4.75% x̄: 0.57% x̃: 0.45%
95% mean confidence interval for instructions value: -2.03 -1.59
95% mean confidence interval for instructions %-change: -0.61% -0.54%
Instructions are helped.

total cycles in shared programs: 187079425 -> 187079437 (<.01%)
cycles in affected programs: 1088494 -> 1088506 (<.01%)
helped: 234
HURT: 124
helped stats (abs) min: 2 max: 282 x̄: 22.66 x̃: 16
helped stats (rel) min: 0.03% max: 7.88% x̄: 0.93% x̃: 0.75%
HURT stats (abs)   min: 1 max: 276 x̄: 42.86 x̃: 20
HURT stats (rel)   min: 0.03% max: 6.70% x̄: 0.99% x̃: 0.53%
95% mean confidence interval for cycles value: -5.54 5.61
95% mean confidence interval for cycles %-change: -0.41% -0.11%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 7746 -> 7740 (-0.08%)
spills in affected programs: 6 -> 0
helped: 1
HURT: 0

total fills in shared programs: 6264 -> 6258 (-0.10%)
fills in affected programs: 6 -> 0
helped: 1
HURT: 0

Sandy Bridge
total instructions in shared programs: 10688576 -> 10688177 (<.01%)
instructions in affected programs: 137875 -> 137476 (-0.29%)
helped: 358
HURT: 0
helped stats (abs) min: 1 max: 9 x̄: 1.11 x̃: 1
helped stats (rel) min: 0.15% max: 1.43% x̄: 0.35% x̃: 0.28%
95% mean confidence interval for instructions value: -1.18 -1.05
95% mean confidence interval for instructions %-change: -0.37% -0.32%
Instructions are helped.

total cycles in shared programs: 153397144 -> 153393046 (<.01%)
cycles in affected programs: 1220713 -> 1216615 (-0.34%)
helped: 255
HURT: 31
helped stats (abs) min: 1 max: 304 x̄: 16.71 x̃: 16
helped stats (rel) min: <.01% max: 6.70% x̄: 0.41% x̃: 0.31%
HURT stats (abs)   min: 1 max: 41 x̄: 5.29 x̃: 3
HURT stats (rel)   min: 0.02% max: 0.65% x̄: 0.16% x̃: 0.11%
95% mean confidence interval for cycles value: -17.44 -11.22
95% mean confidence interval for cycles %-change: -0.40% -0.29%
Cycles are helped.

Iron Lake
total instructions in shared programs: 8106894 -> 8105529 (-0.02%)
instructions in affected programs: 287197 -> 285832 (-0.48%)
helped: 1099
HURT: 0
helped stats (abs) min: 1 max: 10 x̄: 1.24 x̃: 1
helped stats (rel) min: 0.16% max: 4.55% x̄: 0.67% x̃: 0.61%
95% mean confidence interval for instructions value: -1.29 -1.19
95% mean confidence interval for instructions %-change: -0.70% -0.64%
Instructions are helped.

total cycles in shared programs: 188347022 -> 188344266 (<.01%)
cycles in affected programs: 3740632 -> 3737876 (-0.07%)
helped: 758
HURT: 10
helped stats (abs) min: 2 max: 38 x̄: 3.68 x̃: 2
helped stats (rel) min: <.01% max: 1.00% x̄: 0.12% x̃: 0.08%
HURT stats (abs)   min: 2 max: 4 x̄: 3.20 x̃: 4
HURT stats (rel)   min: 0.03% max: 0.07% x̄: 0.06% x̃: 0.07%
95% mean confidence interval for cycles value: -3.82 -3.35
95% mean confidence interval for cycles %-change: -0.13% -0.11%
Cycles are helped.

GM45
total instructions in shared programs: 4985449 -> 4984768 (-0.01%)
instructions in affected programs: 145154 -> 144473 (-0.47%)
helped: 547
HURT: 0
helped stats (abs) min: 1 max: 10 x̄: 1.24 x̃: 1
helped stats (rel) min: 0.16% max: 2.86% x̄: 0.66% x̃: 0.61%
95% mean confidence interval for instructions value: -1.31 -1.18
95% mean confidence interval for instructions %-change: -0.69% -0.62%
Instructions are helped.

total cycles in shared programs: 128835062 -> 128833144 (<.01%)
cycles in affected programs: 2720650 -> 2718732 (-0.07%)
helped: 517
HURT: 1
helped stats (abs) min: 2 max: 38 x̄: 3.71 x̃: 2
helped stats (rel) min: <.01% max: 0.89% x̄: 0.11% x̃: 0.07%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.04% max: 0.04% x̄: 0.04% x̃: 0.04%
95% mean confidence interval for cycles value: -4.02 -3.39
95% mean confidence interval for cycles %-change: -0.12% -0.10%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3965>
2020-03-09 16:46:19 -07:00
Eric Engestrom
461ee85248 docs: update calendar, add news item, and link releases notes for 19.3.5
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4121>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4121>
2020-03-09 23:04:36 +00:00
Eric Engestrom
b06471b77d docs: add release notes for 19.3.5
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4121>
2020-03-09 23:04:36 +00:00
Vinson Lee
5ffa6eab88 st/nine: Fix incompatible-pointer-types-discards-qualifiers errors.
../src/gallium/state_trackers/nine/nine_ff.c:129:28: error: initializing 'struct nine_ff_vs_key *' with an expression of type 'const void *' discards qualifiers [-Werror,-Wincompatible-pointer-types-discards-qualifiers]
    struct nine_ff_vs_key *vs = key;
                           ^    ~~~
../src/gallium/state_trackers/nine/nine_ff.c:145:28: error: initializing 'struct nine_ff_ps_key *' with an expression of type 'const void *' discards qualifiers [-Werror,-Wincompatible-pointer-types-discards-qualifiers]
    struct nine_ff_ps_key *ps = key;
                           ^    ~~~

Fixes: fdd96578ef ("nine: Add state tracker nine for Direct3D9 (v3)")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Andre Heider <a.heider@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4015>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4015>
2020-03-09 15:37:54 -07:00
Marek Olšák
c1b8e84961 radeonsi: determine uses_bindless_samplers correctly
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
2020-03-09 16:08:14 -04:00
Marek Olšák
fc65df5651 ac: add a bug workaround for the 100% NGG culling case
Fixes: 8db00a51f8 - radeonsi/gfx10: implement NGG culling for 4x wave32 subgroups
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
2020-03-09 16:08:11 -04:00
Marek Olšák
7481c4be58 radeonsi: add a bug workaround for NGG - LATE_ALLOC_GS
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
2020-03-09 16:08:10 -04:00
Sonny Jiang
5ea2034f58 radeonsi: enable EXT_texture_shadow_lod
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
2020-03-09 16:08:07 -04:00
Chia-I Wu
f3728816af egl/android: require ANDROID_native_fence_sync for buffer age
Querying buffer age requires a buffer to be dequeued.  But dequeuing
without ANDROID_native_fence_sync might imply eglClientWaitSync,
which results in a deadlock as the display lock is already held by
eglQuerySurface.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/221>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/221>
2020-03-09 18:27:11 +00:00
Edmondo Tommasina
c7976ed43a radv/sqtt: fix RADV_THREAD_TRACE_BUFFER_SIZE spelling
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4116>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4116>
2020-03-09 17:26:33 +00:00
Eric Engestrom
7bbd10da23 docs/releasing: add missing </li> tags
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4094>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4094>
2020-03-09 17:23:45 +00:00
Eric Engestrom
68d8606c4c docs: trivial fix for html structure
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4094>
2020-03-09 17:23:45 +00:00
Neil Roberts
83e20139db glsl/opt_minmax: Add support for float16
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
e3cc81e86c glsl/lower_instructions: Handle fp16 for FDIV_TO_MUL_RCP
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Hyunjun Ko
4fcac46cbd glsl/lower_instructions: Handle fp16 for MOD_TO_FLOOR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
6c1c2b779a glsl/lower_instructions: Use float16 constants when appropriate
When lowering instructions that involve floating-point constants, pick
the appropriate type for the constant so that it will also work with
float16 parameters.

v2: Use float16_t constructor instead of helper function.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
2b39bb4fc0 glsl/validate: Allow float16 in the expression tree
v2. [Hyunjun Ko (zzoon@igalia.com)] squashed 3 commits
into one commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
198d4a535b glsl: Add type queries for fp16+float and fp16+float+double
Following the is_integer_32_64() convention, add is_float_16_32() and
float_16_32_64() for these commonly tested combinations.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Hyunjun Ko
ad27eb28d9 glsl: Handle fp16 unary operations when lowering matrix operations
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
1b8edffaa5 glsl: Add ir_unop_f2fmp
This is the same as ir_unop_f2f16 except that it comes with a promise
that it is safe to optimise it out if the result is immediately
converted back to float32 again. Normally this would be a lossy
operation but it is safe to do if the conversion was generated as part
of the precision lowering pass.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
5d6b007da8 glsl: Add b2f16 and f162b conversion operations
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
6b9f6caf06 glsl: Add IR conversion ops for 16-bit float types
Adds ir_unop_f162f and ir_unop_f2f16.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
878a35db9d glsl: Expand fp16 to float before constant expression evaluation
This way the generated constant folding code doesn't need to
understand fp16.  All operations have to be expanded to full float for
evaulation on the CPU, so we might as well do it up front.  As far as
GLSL is concerned, fp16 isn't a separate type from float, so
everything we're supposed to support for float we need to do for fp16.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
505428f20b glsl: Implement constant propagation for fp16
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
83afebf359 glsl: Add fp16 case for ir_triop_lrp optimization
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
668ab9f19d glsl: Add support for float16 types in the IR tree
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
4068d6baff glsl: Add ir_constant constructor for fp16
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
b75a166e68 freedreno/ir3: Don't fold conversions into sign
Not supported.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:07 +00:00
Pierre-Eric Pelloux-Prayer
2a9d6fdd8c gitlab-ci: rules:changes to test on tested drivers changes
For now tests only use these drivers:
  * llvmpipe
  * softpipe
  * freedreno
  * lima
  * etnaviv
  * panfrost

So using rules:changes gitlab feature to run the tests when the changes
made are potentially affecting these drivers.

A few notes:
  * the following code:
      .piglit-test:
        extends:
          - .test-gl
          - .llvmpipe-rules
    makes gitlab replace .test-gl "rules:changes" values by the one from
    ".llvmpipe-rules".
  * rules:changes always matches for non-MR new branches so jobs will always be
    created (and they'll be run if their dependencies are run). For pushes to
    existing branches the files changed by the push are used to match the
    rules:changes path.
  * the same gitlab feature could be used for some build jobs

Acked-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2569>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2569>
2020-03-09 16:31:55 +01:00
Daniel Schürmann
61fb17e8d7 amd: join emit_kill() from radv and radeonsi in ac_nir_to_llvm
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Daniel Schürmann
bdd7587414 radv: use nir_lower_discard_to_demote to work around game bugs
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Daniel Schürmann
9d64ad2fe7 radeonsi: lower discard to demote when FS_CORRECT_DERIVS_AFTER_KILL is enabled
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Daniel Schürmann
de57ea2a3d amd/llvm: implement nir_intrinsic_demote(_if) and nir_intrinsic_is_helper_invocation
The current implementation uses a temporary helper variable
to ensure correct behavior until LLVM provides an intrinsic.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Daniel Schürmann
ce87da71e9 nir: add pass to lower discard() to demote()
This pass is intended to work around game bugs, only!
It also lowers nir_intrinsic_load_helper_invocation to
nir_intrinsic_is_helper_invocation for consistency.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Daniel Schürmann
5adcfa68a9 nir: gather info whether a shader uses demote_to_helper
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Eli Schwartz
66bb314cb4 docs: fix typo in v20 release notes
It makes no sense to wait for it to stabilize on a version released
months previously in the previous major release cycle.

This was probably intended to be recommending the first bugfix release
of the current major.minor release cycle.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4106>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4106>
2020-03-09 12:09:09 +00:00
Eric Engestrom
4390c232ad Revert "docs/relnotes/19.3: fix vulkan version reported"
This reverts commit 5ff443b8aa

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4112>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4112>
2020-03-09 11:41:59 +00:00
Tapani Pälli
24408acca4 nir: fix compilation warning on glsl_get_internal_ifc_packing
Removes following warning:
   warning: 'const' type qualifier on return type has no effect

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4111>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4111>
2020-03-09 09:43:49 +00:00
Krzysztof Raszkowski
ad66b25415 gallium/swr: Fix vcvtph2ps llvm intrinsic compile error
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4090>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4090>
2020-03-09 09:21:00 +00:00
Pierre-Eric Pelloux-Prayer
33b255e107 meson: enable -fno-common by default
This flag is enabled by default starting with gcc 10.
All the compilation issues have been fixed, so use it by default
to make sure we're not introducing regressions.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4058>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4058>
2020-03-09 09:11:07 +01:00
Pierre-Eric Pelloux-Prayer
283e815339 omx: fix build with gcc 10
bellagio/omx header files reference a global variable without the
extern keyworkd.
Now that gcc-10 enables the '-fno-common' by default the build fails.
Since these are external headers we can't easily fix them, so for
now build the omx module with the '-fcommon' flag to keep the
previous behavior.

See https://gitlab.freedesktop.org/mesa/mesa/issues/2385

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4058>
2020-03-09 09:11:00 +01:00
Matt Turner
e924181ea8 intel/compiler: Discount NOPs from instruction counts
Scheduler changes can cause changes in the number of instructions due to
this workaround, so just don't include NOPs in the instruction counts to
prevent shader-db noise.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:12 +00:00
Matt Turner
bb3e7b0fe3 intel/compiler: Pass shader_stats for each SIMD mode
Passing shader_stats to the fs_generator constructor means that the
SIMD8 shader stats from the visitor (such as the scheduler mode) will be
reported out for the SIMD16/SIMD32 versions as well.

As you can see, we are now passing 'shader_stats' and 'stats' to
generate_code(), which is obviously odd looking. Ian rebased and
committed an old patch of mine which added the shader_stats struct on
July 30 in commit dabb5d4bee (i965/fs: Add a shader_stats struct.) and
shortly after on August 12 Jason added the brw_compile_stats struct in
commit 134607760a (intel/compiler: Fill a compiler statistics struct).

I'd like to combine the two, but I'm not sure how. shader_stats is an
input to generate_code() while brw_compile_stats is an output and is
only used by the Vulkan driver. Leave it as is for now...

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:12 +00:00
Matt Turner
e7d0460d58 intel/compiler: Pass backend_shader * to cfg_t()
As you can see, not having a pointer to the backend_shader from within
the class makes for some weird looking code.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:12 +00:00
Matt Turner
edae75037f intel/compiler: Mark visitor parameters to scheduler const
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:12 +00:00
Matt Turner
75a33e268e intel/compiler: Mark some methods and parameters const
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:11 +00:00
Matt Turner
03ac90aae5 intel/compiler: Make instructions_to_schedule a local variable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:11 +00:00
Matt Turner
43019c6f2c intel/compiler: Remove unnecessary local variables
These are already provided in the fs_reg_alloc class.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:11 +00:00
Matt Turner
3d0821a216 intel/vec4: Make implied_mrf_writes() a vec4_instruction method
Same as commit c20dc9b836 (intel/fs: Make implied_mrf_writes() an
fs_inst method.)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:11 +00:00
Christian Gmeiner
d8f3d0a3a8 etnaviv: implement emit_string_marker
Writes string to cmdstream in payload of a nop command.
Could be useful for internal driver debugging too.

Here is how it looks decoded:

    0x18000000, /* NOP (3) OP=NOP */
    0x65736572, /*   rese */
    0x18000000, /* NOP (3) OP=NOP */
    0x00000074, /*   t */
    0x00000000, /*   GL.API_MODE := OPENGL */

or

    0x00000705, /*   GL.STALL_TOKEN := FROM=RA,TO=PE,FLIP0=0,FLIP1=0 */
    0x00000001, /*   TS.FLUSH_CACHE := FLUSH=1 */
    0x18000000, /* NOP (3) OP=NOP */
    0x616e7465, /*   etna */
    0x18000000, /* NOP (3) OP=NOP */
    0x6275735f, /*   _sub */
    0x18000000, /* NOP (3) OP=NOP */
    0x5f74696d, /*   mit_ */
    0x18000000, /* NOP (3) OP=NOP */
    0x735f7372, /*   rs_s */
    0x18000000, /* NOP (3) OP=NOP */
    0x65746174, /*   tate */
    0x00004606, /*   RS.CONFIG := SOURCE_FORMAT=A8R8G8B8

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3744>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3744>
2020-03-08 13:29:56 +00:00
Christian Gmeiner
4460628330 etnaviv: increase number of supported varyings to 16
No deqp regressions.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
2020-03-08 11:08:59 +00:00
Christian Gmeiner
53c6cb1bad etnaviv: update headers from rnndb
Update to etna_viv commit fd2e2cfd.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
2020-03-08 11:08:59 +00:00
Christian Gmeiner
84816c22e4 etnaviv: ask kernel for max number of supported varyings
The inital etnaviv kernel driver in 4.5 has support for this param.
See kernel commit 602eb48966d7b7f7e64dca8d9ea2842d83bfae73

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
2020-03-08 11:08:59 +00:00
Michel Dänzer
0103f02acb gitlab-ci: Always name artifacts archive after the job producing it
This will help determine which artifacts generate how much traffic.

v2:
* Add "mesa_" prefix to make it obvious which project the artifacts are
  from.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4085>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4085>
2020-03-07 11:09:50 +01:00
Lionel Landwerlin
20c09c9c06 anv: stop storing prog param data into shader blobs
We have no use for this data in Anv.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason EKstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3517>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3517>
2020-03-07 05:51:45 +00:00
Jason Ekstrand
e03f965280 anv: Bounds-check pushed UBOs when robustBufferAccess = true
We also have to add nir_intrinsic_load_push_constant to the list of
intrinsics which use push constants in brw_nir_analyze_ubo_ranges
because we're moving the loop where we rewrite the intrinsics to after
we've analyzed UBO loads.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:29 +00:00
Jason Ekstrand
faea84e254 anv: Add an align_down_u32 helper
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:29 +00:00
Jason Ekstrand
61ac8cf083 anv: Align UBO sizes to 32B
This makes all of our bounds checking consistent with the block loads we
do for constant offset UBO accesses.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Jason Ekstrand
4610d69e37 anv: Delete some pointless break statements
They immediately follow returns.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Jason Ekstrand
28c243e9ec anv: Pass buffer addresses into emit_push_constant*
While we're here, we add an assert that bind_map::push_ranges is tightly
packed.  If it isn't, it breaks assumptions in the emit_push_constant*
functions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Jason Ekstrand
ff5de35127 anv: Mark max_push_range UNUSED and simplify the code
The compiler should be smart enough to figure out that it's unused on
Gen11 and earlier and delete the code which calculates.  Us adding an
`if (GEN_GEN >= 12)` check is unnecessary and just dirties the code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Jason Ekstrand
35ca2ad22e anv: Parse VkPhysicalDeviceFeatures2 in CreateDevice
The client may enable robustBufferAccess2 via either
pCreateInfo->pEnabledFeatures or via a chained-in
VkPhysicalDeviceFeatures2 struct.  We need to parse both.

Fixes: 022e5c7e5a "anv: Implement VK_KHR_get_physical_device_properties2"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Eric Engestrom
0e4c001951 docs/relnotes/20.0: fix vulkan version reported
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
2020-03-07 00:57:15 +00:00
Eric Engestrom
5ff443b8aa docs/relnotes/19.3: fix vulkan version reported
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
2020-03-07 00:57:15 +00:00
Eric Engestrom
2557d614d3 gen_release_notes: fix vulkan version reported
Fixes: 4ef3f7e3d3 ("anv: Enable Vulkan 1.2 support")
Fixes: 7f5462e349 ("radv: enable Vulkan 1.2")
Fixes: 75755e0eba ("turnip: Pretend to support Vulkan 1.2")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
2020-03-07 00:57:15 +00:00
Alyssa Rosenzweig
de30a7ae6e pan/bi: Fix Android.mk
Files listed in Makefile.sources did not exist, this affects the android
build for other drivers as well.

[Patch by Tapani manually cherrypicked into this branch]

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
0b0be49005 pan/bi: Rename next-wait to simply 'wait'
next-wait is from a quirk of packing that the dependency indices are
"off by one"; we don't emulate this quirk in the IR since it's easy
enough to patch over in the disassembler. Let's not confuse anybody with
it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
b329f8c750 pan/bi: Add dummy scheduler
Do the absolute simplest possible thing -- create a clause for every
instruction, and just pick whichever slot we can, nopping the other,
copying whatever constant we have whether it's used or not.

To be clear - this is not to be used in a production compiler. But this
lets actual bundles and clauses show up in the BIR, which unblocks work
on final code generation and packing (which can happen more or less in
parallel to NIR->BIR, optimization, register allocation, and writing an
actual scheduling).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
51e537c9fa pan/bi: Implement load_const
In the laziest possible way...  We can just emit worst case moves which
DCE will eat for breakfast anyway, and inline constants on instructions
where that is supported directly. This approach eliminates a lot of
nasty corner cases that Midgard's crazy cache scheme has hit, at the
expense of slightly more work for DCE (but it's only a single iteration
of an O(N) pass that has to run anyway..)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
1ead0d3488 pan/bi: Add preliminary LOAD_UNIFORM implementation
Lots of things are missing (indirect access, UBOs) but we have this
stubbed out for now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
48910e8388 pan/bi: Implement store_vary for vertex shaders
As far as I/O goes, these four should hold us over for a while.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
d86659ca57 pan/bi: Add helpers for creating temporaries
Also from Midgard, adapted to our addressing scheme.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
59b476e11a pan/bi: Implement load_input for vertex shaders
Corresponds to a single LD_ATTR instruction, easy enough.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
dabb6c6b9f pan/bi: Implement store_output for fragment shaders
Corresponds to a BLEND instruction, possibly preceded by an ATEST
instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
79c1af0623 pan/bi: Add bi_schedule_barrier helper
Copypaste from Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
92a4f26e7f pan/bi: Add blend_location to IR for BI_BLEND
To specify which render target is being written.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
0767182665 pan/bi: Implement nir_intrsinic_load_interpolated_input
Enough for basic varying reads.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
806533ba7f pan/bi: Fix destination printing
It should get the same treatment as sources to handle SSA/reg/etc.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
65c8dcca3b pan/bi: Handle jumps (breaks, continues)
Loops should behave reasonably now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
987aea1400 pan/bi: Handle loops when ingesting CFG
Not very useful without also handling breaks and continues, of course.
We use the strategy from v3d (vir_to_nir) instead of Midgard's, since
the latter is mildly insane. I mean, it passes deqp but...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
9a00cf3d1e pan/bi: Add support for if-else blocks
Branch lowering code lifted from Midgard as usual.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
977a38c87f pan/bi: Call nir_lower_io_to_temporaries in cmdline
Normally mesa/st would do this for us, but we're using the standalone
compiler (in advance of having the hardware) and need this pass
particularly for fragment writeout.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
55dab92073 pan/bi: Add instruction emit/remove helpers
As we start descending into code generation these will be of interest.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
7fd22c3bbd pan/bi: Print branch target
...if it's present, anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
2e9b5f8ef4 pan/bi: Don't print types for unconditional branches
There's nothing to type!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
5c7ee8a974 pan/bi: Improve block printing
Skip predecessor printing if there are none and match a missing brace,
also fixup the spacing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
83c4562503 pan/bi: Walk through the NIR control flow graph
Copypaste from Midgard with some cleanups. That seems to be a trend
these days. Hopefully boilerplate will come to a close soon.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
0d29184f69 pan/bi: Lower and optimize NIR
Pretty much a copypaste from Midgard except where architectural
decisions diverge around vectorization. On that note, we will need our
own ALU scalarization pass at some point (or rather we'll need to extend
nir_lower_alu_scalar) to allow partial lowering for 8/16-bit ops. I.e.
we'll approximately need to lower

   vec4 16 ssa_2 = fadd ssa_0, ssa_1

to

   vec2 16 ssa_2 = fadd ssa_0.xy, ssa_1.xy
   vec2 16 ssa_3 = fadd ssa_0.zw, ssa_1.zw
   vec4 16 ssa_4 = vec4 ssa_2.x, ssa_2.y, ssa_3.x, ssa_4

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Chad Versace
c652ff8caa anv: Flatten the logic add_aux_surface_if_supported (v3)
Reduces the function's max indentation level from 5 to 3 inside the big
'if' tree. And enables more comments to be attached to the condition
they describe.

v2:
  - Add missing DEBUG_NO_RBC check.
v3:
  - Return early on DISABLE_AUX_BIT.
  - Restore original order of gen7 hiz check.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
2020-03-06 23:40:41 +00:00
Chad Versace
615c65ba1b anv: Refactor creation of aux surfaces (v2)
make_surface() contained a giant if-tree for creation of aux surfaces.
Move the if-tree into its own function, add_aux_surface_if_supported().
This will simplify future changes for VK_EXT_image_drm_format_modifier.

This patch merely moves the code verbatim, then extracts duplicate
assertions to the top.

v2: Rename func to add_aux_surface_if_supported [for jekstrand].

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
2020-03-06 23:40:41 +00:00
Chad Versace
d1b7d80bc3 anv: Add anv_image_plane_needs_shadow_surface() (v2)
The function returns true if hardware limitations require the image
plane to use a shadow surface. It replaces equivalent code in
make_surface().

Refactor only. No intended change in behavior.

Why extract this code out of vkCreateImage? If an image requires
a shadow surface, then that may impact its support for DRM format
modifiers, which must be evaluated during
vkGetPhysicalDeviceImageFormatProperties2.

v2:
  - Use early return. [for jekstrand]
  - Unexport function.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
2020-03-06 23:40:41 +00:00
Timothy Arceri
1da6b7f8a3 glsl: add subroutine support to nir linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
b1bc24f826 glsl: dont try to assign uniform storage for uniform blocks
Fixes a crash in some shaders.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
576b5ace9e glsl: add support for builtins to the nir uniform linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
79127f8d5b glsl: set ShaderStorageBlocksWriteAccess in the nir linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
17f240b874 glsl: nir linker fix setting of ssbo top level array
This helps correcly set it for each top level member and correctly
handle unsized arrays.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
8ffd09f311 glsl: find the base offset for block members from unnamed blocks
These block member have been split into individual vars so we need
to set the correct offsets for each member in the new glsl nir
linker. We also take this opportunity to set the correct location
for the variable.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
76ce775240 glsl: correctly set explicit offsets for struct members
This correctly sets offsets set in glsl when using the nir linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
590a59437f glsl: add std140 and std430 layouts to nir uniform linker
The current ARB_gl_spirv linking only supports explicit layouts so
we need to update it to support std140 and std430 layouts before
we can use the linker for glsl.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
858a49a10d nir: add glsl_get_std430_size() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
a005f1a6e7 nir: add glsl_get_std430_base_alignment() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
1ccfe821b2 nir: add glsl_get_std140_size() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
120a26c6f2 nir: add glsl_get_std140_base_alignment() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
262b611a5b nir: add glsl_get_internal_ifc_packing() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
a02d8e040f glsl: correctly find block index when linking glsl with nir linker
The existing code for spirv expects all vars to have explicit
bindings set which is not true for glsl.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
10b816d27e glsl: add name support to nir uniform linker
Name support is optional for spirv support but is required for glsl
support.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
aa9b457062 glsl: move get_next_index() earlier in nir link uniforms
We will use get_next_index() in more of the helper functions in
the following patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
219cefe24f glsl: move add_parameter() earlier in nir link uniforms
We will use add_parameter() in more of the helper functions in
the following patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
51898c8ee5 glsl: move nir link uniforms struct defs earlier
We will need to use the state in more of the helper functions in
the following patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Vasily Khoruzhick
4d5a0ae22c lima: gpir: enforce instruction limit earlier
Enforce instruction limit of 512 instructions earlier. This is a
workaround for infinite loops in gpir compiler and allows us to
pin point the tests that are affected.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4055>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4055>
2020-03-06 21:06:54 +00:00
Francisco Jerez
70349a2252 intel/compiler: Calculate num_instructions in O(1) during register pressure calculation
And mark the variable declaration as const.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:13 -08:00
Francisco Jerez
e5e4d016b9 intel/compiler: Move register pressure calculation into IR analysis object
This defines a new BRW_ANALYSIS object which wraps the register
pressure computation code along with its result.  For the rationale
see the previous commits converting the liveness and dominance
analysis passes to the IR analysis framework.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:10 -08:00
Francisco Jerez
f6cdf66cd6 entel/compiler: Simplify new_idom reduction in dominance tree calculation
Trivial, just use a few less tokens to do the same thing.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:07 -08:00
Francisco Jerez
c9a608c090 intel/compiler: Move dominance tree data structure into idom_tree object
It makes sense to keep the result of analysis passes independent from
the IR itself.  Instead of representing the idom tree as a pointer in
each basic block pointing to its immediate dominator, the whole
dominator tree is represented separately from the IR as an array of
pointers inside the idom_tree object.  This has the advantage that
it's no longer possible to use stale dominance results by accident
without having called require() beforehand, which makes sure that the
idom tree is recalculated if necessary.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:05 -08:00
Francisco Jerez
c2a7eababf intel/compiler: Move idom tree calculation and related logic into analysis object
This only does half of the work.  The actual representation of the
idom tree is left untouched, but the computation algorithm is moved
into a separate analysis result class wrapped in a BRW_ANALYSIS
object, along with the intersect() and dump_domtree() auxiliary
functions in order to keep things tidy.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:03 -08:00
Francisco Jerez
2878817197 intel/compiler: Drop invalidate_live_intervals()
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:01 -08:00
Francisco Jerez
acf24df201 intel/compiler/vec4: Switch liveness analysis to IR analysis framework
This involves wrapping vec4_live_variables in a BRW_ANALYSIS object
and hooking it up to invalidate_analysis() so it's properly
invalidated.  Seems like a lot of churn but it's fairly
straightforward.  The vec4_visitor invalidate_ and
calculate_live_intervals() methods are no longer necessary after this
change.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:59 -08:00
Francisco Jerez
ea44de6d8c intel/compiler/fs: Switch liveness analysis to IR analysis framework
This involves wrapping fs_live_variables in a BRW_ANALYSIS object and
hooking it up to invalidate_analysis() so it's properly invalidated.
Seems like a lot of churn but it's fairly straightforward.  The
fs_visitor invalidate_ and calculate_live_intervals() methods are no
longer necessary after this change.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:57 -08:00
Francisco Jerez
bb8cfa6837 intel/compiler/vec4: Add live interval validation pass
This could be improved somewhat with additional validation of the
calculated live in/out sets and by checking that the calculated live
intervals are minimal (which isn't strictly necessary to guarantee the
correctness of the program).  This should be good enough though to
catch accidental use of stale liveness results due to missing or
incorrect analysis invalidation.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:55 -08:00
Francisco Jerez
24535604aa intel/compiler/fs: Add live interval validation pass
This could be improved somewhat with additional validation of the
calculated live in/out sets and by checking that the calculated live
intervals are minimal (which isn't strictly necessary to guarantee the
correctness of the program).  This should be good enough though to
catch accidental use of stale liveness results due to missing or
incorrect analysis invalidation.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:53 -08:00
Francisco Jerez
a9cdc14f60 intel/compiler: Pass single backend_shader argument to the vec4_live_variables constructor
The IR analysis framework requires the analysis result to be
constructible with a single argument.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:51 -08:00
Francisco Jerez
d0433971f9 intel/compiler: Pass single backend_shader argument to the fs_live_variables constructor
This removes the dependency of fs_live_variables on fs_visitor.  The
IR analysis framework requires the analysis result to be constructible
with a single argument -- The second argument was redundant anyway.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:49 -08:00
Francisco Jerez
d7e84cbb0f intel/compiler: Restructure live intervals computation code
This makes the structure of the vec4 live intervals calculation more
similar to the FS back-end liveness analysis code.  The non-CF-aware
start/end computation is moved into the same pass that calculates the
block-local def/use sets, which saves quite a bit of code, while the
CF-aware start/end computation is moved into a separate
compute_start_end() function as is done in the FS back-end.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:46 -08:00
Francisco Jerez
48dfb30f92 intel/compiler: Move all live interval analysis results into vec4_live_variables
This moves the following methods that are currently defined in
vec4_visitor (even though they are side products of the liveness
analysis computation) and are already implemented in
brw_vec4_live_variables.cpp:

> int var_range_start(unsigned v, unsigned n) const;
> int var_range_end(unsigned v, unsigned n) const;
> bool virtual_grf_interferes(int a, int b) const;
> int *virtual_grf_start;
> int *virtual_grf_end;

It makes sense for them to be part of the vec4_live_variables object,
because they have the same lifetime as other liveness analysis results
and because this will allow some extra validation to happen wherever
they are accessed in order to make sure that we only ever use
up-to-date liveness analysis results.

The naming of the virtual_grf_start/end arrays was rather misleading,
they were indexed by variable rather than by vgrf, this renames them
start/end to match the FS liveness analysis pass.  The churn in the
definition of var_range_start/end is just in order to avoid a
collision between the start/end arrays and local variables declared
with the same name.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:44 -08:00
Francisco Jerez
ba73e606f6 intel/compiler: Move all live interval analysis results into fs_live_variables
This moves the following methods that are currently defined in
fs_visitor (even though they are side products of the liveness
analysis computation) and are already implemented in
brw_fs_live_variables.cpp:

> bool virtual_grf_interferes(int a, int b) const;
> int *virtual_grf_start;
> int *virtual_grf_end;

It makes sense for them to be part of the fs_live_variables object,
because they have the same lifetime as other liveness analysis results
and because this will allow some extra validation to happen wherever
they are accessed in order to make sure that we only ever use
up-to-date liveness analysis results.

This shortens the virtual_grf prefix in order to compensate for the
slightly increased lexical overhead from the live_intervals pointer
dereference.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:43 -08:00
Francisco Jerez
3ceb496cdf intel/compiler: Mark virtual_grf_interferes and vars_interfere as const
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:41 -08:00
Francisco Jerez
ab6d792986 intel/compiler: Pass detailed dependency classes to invalidate_analysis()
Have fun reading through the whole back-end optimizer to verify
whether I've missed any dependency flags -- Or alternatively, just
trust that any mistake here will trigger an assertion failure during
analysis pass validation if it ever poses a problem for the
consistency of any of the analysis passes managed by the framework.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:39 -08:00
Francisco Jerez
65080dc8df intel/compiler: Define more detailed analysis dependency classes
I've deliberately separated this from the general analysis pass
infrastructure in order to discuss it independently.  The dependency
classes defined here refer to state changes of several objects of the
program IR, and are fully orthogonal and expected to change less often
than the set of analysis passes present in the compiler back-end.

The objective is to avoid unnecessary coupling between optimization
and analysis passes in the back-end.  By doing things in this way the
set of flags to be passed to invalidate_analysis() can be determined
from knowledge of a single optimization pass and a small set of well
specified dependency classes alone -- IOW there is no need to audit
all analysis passes to find out which ones might be affected by
certain kind of program transformation performed by an optimization
pass, as well as the converse, there is no need to audit all
optimization passes when writing a new analysis pass to find out which
ones can potentially invalidate the result of the analysis.

The set of dependency classes defined here is rather conservative and
mainly based on the requirements of the few analysis passes already
part of the back-end.  I've also used them without difficulty with a
few additional analysis passes I've written but haven't yet sent for
review.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:37 -08:00
Francisco Jerez
d966a6b4c4 intel/compiler: Introduce backend_shader method to propagate IR changes to analysis passes
The invalidate_analysis() method knows what analysis passes there are
in the back-end and calls their invalidate() method to report changes
in the IR.  For the moment it just calls invalidate_live_intervals()
(which will eventually be fully replaced by this function) if anything
changed.

This makes all optimization passes invalidate DEPENDENCY_EVERYTHING,
which is clearly far from ideal -- The dependency classes passed to
invalidate_analysis() will be refined in a future commit.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:32 -08:00
Francisco Jerez
03eb46f4a7 intel/compiler: Introduce simple IR analysis pass framework
Motivated in detail in the source code.  The only piece missing here
from the analysis pass infrastructure is some sort of mechanism to
broadcast changes in the IR to all existing analysis passes, which
will be addressed by a future commit.  The analysis_dependency_class
enum might seem a bit silly at this point, more interesting dependency
categories will be defined later on.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:30 -08:00
Francisco Jerez
27ae3c1f68 intel/compiler: Reverse inclusion dependency between brw_vec4_live_variables.h and brw_vec4.h
brw_vec4.h (in particular vec4_visitor) is logically a user of the
live variables analysis pass, not the other way around.
brw_vec4_live_variables.h requires the definition of some VEC4 IR data
structures to compile, but those can be obtained directly from
brw_ir_vec4.h without including brw_vec4.h.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:28 -08:00
Francisco Jerez
a6fc88e91b intel/compiler: Reverse inclusion dependency between brw_fs_live_variables.h and brw_fs.h
brw_fs.h (in particular fs_visitor) is logically a user of the live
variables analysis pass, not the other way around.
brw_fs_live_variables.h requires the definition of some FS IR data
structures to compile, but those can be obtained directly from
brw_ir_fs.h without including brw_fs.h.  The dependency of
fs_live_variables on fs_visitor is rather accidental and will be
removed in a future commit, a forward declaration is enough for the
moment.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:26 -08:00
Francisco Jerez
06c5c49646 intel/compiler: Nest definition of live variables block_data structures
When this commit was originally written, these two structures had the
exact same name. Subsequently in commit 12a8f2616a (intel/compiler:
Fix C++ one definition rule violations) they were renamed.

Original commit message:

> These two structures have exactly the same name which prevents the two
> files from being included at the same time and could cause serious
> trouble in the future if it ever leads to a (silent) violation of the
> C++ one definition rule.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:23 -08:00
Francisco Jerez
310aef6b59 intel/compiler: Reverse inclusion dependency between brw_cfg.h and brw_shader.h
This reflects the natural dependency relationship between brw_cfg.h
and brw_shader.h.  brw_cfg.h only requires the base IR definitions
which are now part of a separate header.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:19 -08:00
Francisco Jerez
d46fb2126d intel/compiler: Move base IR definitions into a separate header file
This pulls out the i965 IR definitions into a separate file and leaves
the top-level backend_shader structure and back-end compiler entry
points in brw_shader.h.  The purpose is to keep things tidy and
prevent a nasty circular dependency between brw_cfg.h and
brw_shader.h.  The logical dependency between these data structures
looks like:

 backend_shader (brw_shader.h) -> cfg_t (brw_cfg.h)
    -> bblock_t (brw_cfg.h) -> backend_instruction (brw_shader.h)

This circular header dependency is currently resolved by using forward
declarations of cfg_t/bblock_t in brw_shader.h and having brw_cfg.h
include brw_shader.h, which seems backwards and won't work at all when
the forward declarations of cfg_t/bblock_t are no longer sufficient in
a future commit.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:11 -08:00
Christian Gmeiner
74e4cda64b etnaviv: add etna_constbuf_state object
With this new state object we keep track of enabled pipe_constant_buffer
and only mark them as read when needed.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4088>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4088>
2020-03-06 17:48:17 +01:00
Thong Thai
9f5802ad3e st/va: add check for P010 and P016 encode/decode support
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4033>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4033>
2020-03-06 16:10:40 +00:00
Thong Thai
d375803576 radeon: add support for 10-bit HEVC encoding to VCN 2.0
Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4033>
2020-03-06 16:10:40 +00:00
Thong Thai
8ab31808fd radeonsi: add 10-bit HEVC encode support for VCN2.0 devices
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4033>
2020-03-06 16:10:40 +00:00
Alejandro Piñeiro
2ba272135a nir/linker: remove reference to just SPIR-V linking
Several files had a initial comment about the purpose of such files,
including a reference that the NIR linker was implemented with just
ARB_gl_spirv in mind.

Since the nice job Timothy is doing to use the NIR linker on GLSL,
that is not true anymore, so let's remove that reference and also
tweak some other comments.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4081>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4081>
2020-03-06 12:28:08 +00:00
Eric Engestrom
d7a70fbb23 bin/gen_release_notes.py: fix commit list command
Fixes: 86079447da ("scripts: Add a gen_release_notes.py script")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4069>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4069>
2020-03-06 11:46:45 +00:00
Eric Engestrom
894e286391 docs: fix typos in the release docs
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4067>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4067>
2020-03-06 11:44:03 +00:00
Pierre-Eric Pelloux-Prayer
771f16cf61 radeonsi: remove AMD_DEBUG=sisched option
sisched is not maintained anymore in LLVM.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4059>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4059>
2020-03-06 11:35:12 +01:00
Samuel Pitoiset
913d2dcd23 nir/lower_input_attachments: remove bogus assert in try_lower_input_texop()
It can be a sampler too.

Fixes: 84b08971fb ("nir/lower_input_attachments: lower nir_texop_fragment_{mask}_fetch")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2558
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4043>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4043>
2020-03-06 09:13:40 +00:00
Samuel Pitoiset
6dc38cea52 radv/rgp: report correct system ram size
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4023>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4023>
2020-03-06 08:22:02 +00:00
Samuel Pitoiset
eeb09a01e7 radv/rgp: report correct cu_mask info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4023>
2020-03-06 08:22:02 +00:00
Samuel Pitoiset
b3ece36257 ac: add ac_gpu_info::cu_mask to store bitmask of compute units
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4023>
2020-03-06 08:22:02 +00:00
Samuel Pitoiset
c6c661de31 radv/sqtt: abort if SQTT is used on GFX6-GFX7
RGP only supports GFX8+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
14283ddc79 radv/sqtt: add support for GFX8
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
d747015935 ac/registers: adjust some definitions for thread trace on GFX8
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
0d55732a61 radv/sqtt: add radv_copy_thread_trace_info_regs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
9baad41469 radv/sqtt: tidy up radv_emit_thread_trace_{start,stop}
Check for GFX10 first.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
6c91aa7955 radv/sqtt: fix wrong check in radv_is_thread_trace_complete()
Oops, should be equal actually.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
ba29c050a3 radv/winsys: fix missing initializations of shader info in the null device
To avoid divide by zero when computing shader stats.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3999>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3999>
2020-03-06 07:43:31 +00:00
Jason Ekstrand
9d07d59842 iris: Don't skip fast depth clears if the color changed
We depend on BLORP to convert the clear color and write it into the
clear color buffer for us.  However, we weren't bothering to call blorp
in the case where the state is ISL_AUX_STATE_CLEAR.  This leads to the
clear color not getting properly updated if we have back-to-back clears
with different clear colors.  Technically, we could go out of our way to
set the clear color directly from iris in this case but this is a case
we're unlikely to see in the wild so let's not bother.  This matches
what we already do for color surfaces.

Cc: mesa-stable@lists.freedesktop.org
Reported-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4073>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4073>
2020-03-06 01:40:02 +00:00
Vinson Lee
382b902a6d swr: Fix non-pod-varargs error.
../src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp:391:24: error: cannot pass object of non-trivial type 'std::string' (aka 'basic_string<char>') through variadic function; call will abort at runtime [-Wnon-pod-varargs]
                       pFunc->getName().str());
                       ^

Fixes: ff8265b64f ("gallium/swr: Fix llvm11 compilation issues")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4008>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4008>
2020-03-06 01:19:50 +00:00
Marek Olšák
ed0bea4495 glthread: fall back if a param size is non-zero and a pointer param is NULL
So that we don't crash. This is a GL error anyway.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
57a9c1ee47 glthread: fix a crash with incorrect glShaderSource parameters
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
c5825b7b6e glthread: add custom marshalling for glNamedBuffer(Sub)DataEXT
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
b8aa5edfc5 glthread: merge glBufferSubData and glNamedBufferSubData into 1 set of functions
This is a big cleanup.
GL_EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD also doesn't sync anymore.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
8eb0332749 glthread: merge glBufferData and glNamedBufferData into 1 set of functions
This is a big cleanup.
GL_EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD also doesn't sync anymore.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
93b2ee18a1 glthread: replace custom glBindBuffer marshalling with generated one
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
85276e2c1b glthread: sync instead of disabling glthread for non-VBO pointers
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
28a2ad7ddf glthread: track for each VAO whether the user has set a user pointer
This commit mainly adds basic infrastructure for tracking vertex array
state.

If glthread gets a non-VBO pointer, this commit delays disabling
glthread until glDraw is called. The next will change that to "sync"
instead of "disable".

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
d510e652d4 glthread: add marshal_call_after and remove custom glFlush and glEnable code
Instead of implementing marshalling manually, this XML property allows us
to insert additional code into code-generated functions.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
4970199d11 glthread: don't insert an empty line after (void) cmd;
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
b9eef27920 glthread: add support for glMemoryObjectParameteriv, glSemaphoreParameterui64v
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
b5c58bbf6c glthread: add support for glCallLists, glPatchParameterfv
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
1668a93903 glthread: add support for glClearNamedFramebuffer, glMaterial, glPointParameter
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
b0a20e7531 glthread: add support for glFog, glLight, glLightModel, glTexEnv, glTexGen
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
59e96bc513 glthread: add support for TexParameteri and SamplerParameteri functions
It's straightfoward except that I had to hack the python scripts to add
"marshal_count", which behaves just like "count" except that "variable_param"
is ignored. ("variable_param" changes the behavior of "count", which I don't
want)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
108fdb54c6 glthread: replace custom ClearBuffer marshalling with generated one
If the count attribute contains "enum", the count is evaluated only once.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
88b5fb18b3 glthread: check the size of all variable params and clean up the code
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
358d923c8b glthread: handle complex pointer parameters and support GL functions with strings
The python changes add a local variable that computes the parameter size
only once.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
d00f36ac25 glthread: add/update count and marshal fields for many GL functions
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
fb95a4693f glthread: add GL_DRAW_INDIRECT_BUFFER tracking and generator support
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
30b6e82364 glthread: don't increment variable_data if it's the last variable-size param
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
19dc528bbf glthread: don't insert _mesa_post_marshal_hook into every function
Let the developer decide that in the python script.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
c920572f60 glthread: simplify repeated function sequences in marshal_generated.c
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
9dbf5ec9f7 glthread: use int instead of size_t where it's OK
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
313e98fb81 glthread: reduce pointer dereferences in glthread_unmarshal_batch
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
19151e2605 glthread: inline _mesa_unmarshal_dispatch_cmd and convert the switch to a table
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
245f9593b7 glthread: don't prefix variable_data with const
Not all variable data that is constant is declared with const, such as
glDeletePerfMonitorsAMD.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
d93f4faefb glthread: don't generate the sync fallback if the call size is not variable
marshal_generated.c is 12% smaller.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:13 +00:00
Dylan Baker
a19c9290f4 docs: update news, calendar, and link release notes for 20.0.1
Also fix a couple of dates that are wrong.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075>
2020-03-06 00:24:35 +00:00
Dylan Baker
6b1f94e9f2 docs: Add sha256sums for 20.0.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075>
2020-03-06 00:24:35 +00:00
Dylan Baker
7c8766402e docs: add relnotes for 20.0.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075>
2020-03-06 00:24:35 +00:00
Dylan Baker
f1890b7ad8 docs: update releasing to cover updated post_version.py
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
2020-03-05 15:15:01 -08:00
Dylan Baker
5cdaa06221 bin/post_version.py: Make the git commit as well.
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
2020-03-05 15:14:56 -08:00
Dylan Baker
e3d3abb1bc bin/post_version.py: Pretty print the html
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
2020-03-05 15:14:56 -08:00
Dylan Baker
d7ada7d7e0 bin/post_version.py: Update the release calendar as well
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
2020-03-05 15:14:56 -08:00
Dylan Baker
d4cb9ef826 docs: Update release notes with current process
There's a lot of stuff here that's out of date, update it to something
more modern.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4066>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4066>
2020-03-05 22:47:28 +00:00
Dylan Baker
7451eb9a27 docs/submittingpatches: Fix confusing typo + missing pronoun
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4066>
2020-03-05 22:47:28 +00:00
Samuel Pitoiset
42a3d821cb gitlab-ci: add a job that runs Fossilize on RADV/Polaris10
RADV_FORCE_FAMILY forces creating a null device that allows RADV
to be instanced without AMDGPU.

The Fossilize database only contains pipelines from the Sascha
Vulkan triangle demos at the moment. I will add more once this
is merged.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
2020-03-05 20:33:56 +00:00
Samuel Pitoiset
af1cd45858 gitlab-ci: enable building the test image for VK unconditionally
It was diabled because RADV is the only driver that tests Vulkan
and running CTS on my personal machine and without recovery is
not safe enough for CI (too long and too unstable).

Now that we are going to test Fossilize with RADV, it's needed to
build the test image for VK unconditionally. As RADV now supports
creating NULL devices, the fossilize jobs can run everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
2020-03-05 20:33:56 +00:00
Samuel Pitoiset
1cdb6edbe6 gitlab-ci: add Fossilize support to detect compiler regressions
Fossilize is equivalent to vkpipeline-db but it's definitely more
robust. This is based on the CI traces system.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
2020-03-05 20:33:56 +00:00
Samuel Pitoiset
93fcc9ad57 gitlab-ci: build Fossilize in the test image for VK
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
2020-03-05 20:33:56 +00:00
Rhys Perry
b088a4b113 aco: only reserve sgprs for vcc if it's used
pipeline-db (Vega):

Totals:
SGPRS: 5186302 -> 5075616 (-2.13 %)
VGPRS: 3704580 -> 3704580 (0.00 %)
Spilled SGPRs: 144859 -> 144859 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 4124 -> 4124 (0.00 %) dwords per thread
Code Size: 247315944 -> 247315944 (0.00 %) bytes
LDS: 1311 -> 1311 (0.00 %) blocks
Max Waves: 674560 -> 674562 (0.00 %)

Totals from affected shaders:
SGPRS: 536992 -> 426306 (-20.61 %)
VGPRS: 356404 -> 356404 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 8498748 -> 8498748 (0.00 %) bytes
LDS: 8 -> 8 (0.00 %) blocks
Max Waves: 113832 -> 113834 (0.00 %)

There are some small code size changes in a few RotTR shaders and a small
increase in max_waves in two Detroit: Become Human shaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3906>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3906>
2020-03-05 20:18:34 +00:00
Rhys Perry
c6e0c062da aco: improve control flow handling in GFX6-9 NOP pass
Fixes Detroit: Become Human hang. Also affects World of Warships.

pipeline-db (Tahiti):
Totals from affected shaders:
SGPRS: 0 -> 0 (0.00 %)
VGPRS: 0 -> 0 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 0 -> 0 (0.00 %)

pipeline-db (Polaris):
Totals from affected shaders:
SGPRS: 17168 -> 17168 (0.00 %)
VGPRS: 11296 -> 11296 (0.00 %)
Spilled SGPRs: 1870 -> 1870 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 1472628 -> 1473292 (0.05 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 628 -> 628 (0.00 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 17168 -> 17168 (0.00 %)
VGPRS: 11296 -> 11296 (0.00 %)
Spilled SGPRs: 1870 -> 1870 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 1409716 -> 1410380 (0.05 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 0 -> 0 (0.00 %)

Max Waves is lower than it should be because of a null winsys bug.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
2020-03-05 19:37:24 +00:00
Rhys Perry
47b7f104a0 aco: consider non-hazard writes in handle_raw_hazard_internal
I think this helps GFX6 in particular because code like this is common:
s_add_i32       s4, 0x60, s3
s_mov_b32       s5, 0
s_load_dwordx4  s[4:7], s[4:5], 0x0
s_buffer_load_dword s4, s[4:7], 0xcc

pipeline-db (Tahiti):
Totals from affected shaders:
SGPRS: 1923878 -> 1923878 (0.00 %)
VGPRS: 1528964 -> 1528964 (0.00 %)
Spilled SGPRs: 476 -> 476 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 88723604 -> 88528880 (-0.22 %) bytes
LDS: 241 -> 241 (0.00 %) blocks
Max Waves: 145402 -> 145402 (0.00 %)

pipeline-db (Polaris):
Totals from affected shaders:
SGPRS: 428128 -> 428128 (0.00 %)
VGPRS: 353092 -> 353092 (0.00 %)
Spilled SGPRs: 119251 -> 119251 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 57580468 -> 57563964 (-0.03 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 11631 -> 11631 (0.00 %)

piepline-db (Vega):
Totals from affected shaders:
SGPRS: 425016 -> 425016 (0.00 %)
VGPRS: 349588 -> 349588 (0.00 %)
Spilled SGPRs: 117835 -> 117835 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 54890792 -> 54874432 (-0.03 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 54 -> 54 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
2020-03-05 19:37:24 +00:00
Rhys Perry
38743577f8 aco: improve get_wait_states()
pipeline-db (Tahiti):
Totals from affected shaders:
SGPRS: 21208 -> 21208 (0.00 %)
VGPRS: 22388 -> 22388 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 3278596 -> 3277004 (-0.05 %) bytes
LDS: 19 -> 19 (0.00 %) blocks
Max Waves: 238 -> 238 (0.00 %)

pipeline-db (Polaris):
Totals from affected shaders:
SGPRS: 64 -> 64 (0.00 %)
VGPRS: 96 -> 96 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 5200 -> 5192 (-0.15 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 10 -> 10 (0.00 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 0 -> 0 (0.00 %)
VGPRS: 0 -> 0 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 0 -> 0 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
2020-03-05 19:37:24 +00:00
Rhys Perry
7f1b537304 aco: add new NOP insertion pass for GFX6-9
This new pass is more similar to the GFX10 pass and should be able to
handle control flow better.

No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
2020-03-05 19:37:24 +00:00
Jason Ekstrand
ce19681257 iris: Enable HiZ and stencil CCS for blorp blit destinations
Now that blorp blits write to depth and stencil as depth and stencil, we
can leave HiZ and stencil CCS enabled for blorp blit destinations.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Jason Ekstrand
a0d5c7da18 iris: Enable CCS for copies from HiZ+CCS depth buffers
Ever since b274469daa, BLORP is able to sample from whatever the
sampler supports.  In c0c899cf78, we added HiZ support for copies from
HiZ compressed depth buffers but forgot HiZ+CCS.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Jason Ekstrand
83b641a038 anv: Enable HiZ for VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Jason Ekstrand
6cec618e82 blorp: Write to depth/stencil images as depth/stencil when possible
On Gen4 and G45 and earlier, we have to handle weird offsetting to write
to depth and stencil due to a lack of proper depth mipmapping support in
hardware.  On Gen6, we have to deal with strange HiZ and stencil
layouts.  Prior to Gen9, we also had to do crazy things for stencil
writes because we didn't support GL_ARB_shader_stencil_export and
friends in hardware.  However, starting with Gen7 for depth and Gen9 for
stencil, we can easily write out with the "right" hardware.  This allows
us to leave HiZ and other compression enabled for blorp_blit() and
blorp_copy() operations.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Jason Ekstrand
4531f0ffce iris: Allow HiZ on blit sources
Ever since 95cc5438eb, BLORP has been able to read from HiZ-compressed
depth buffers as long as the sampler supports HiZ.  This just makes iris
stop doing the unneeded resolve.

Closes: #2583
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Jason Ekstrand
9f5f4269a6 isl: Set 3DSTATE_DEPTH_BUFFER::Depth correctly for 3D surfaces
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Dylan Baker
07f1ef5656 docs: Update stable process around using fixes: and gitlab
Currently the docs still recommend using
mesa-stable@lists.freedesktop.org, which is pretty awful. We really
don't want a second mailing list and it's mostly full of junk because of
CC: tags anyway.

This changes the preferred actions to be:
1) use a fixes: tag ahead of time
2) use a Cc tag ahead of time if fixes isn't appropriate
3) Use a gitlab MR against the staging/ branch for post-merge/backport
   nominations

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3056>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3056>
2020-03-05 18:24:14 +00:00
Jonathan Marek
55dac91adc turnip: fix tile->slot calculation
Fixes HW binning cases when the horizontal number of tiles isn't divisible
by the horizontal number of pipes (only happens with more than 32 tiles).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142>
2020-03-05 12:53:29 -05:00
Jonathan Marek
036230341f turnip: improve binning pipe layout config
The old code looks the same as GL driver, but we get things like
pipe_count = {32, 1}, which seems bad.

This uses similar logic as for tiles which produces a balanced pipe_count
width/height.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142>
2020-03-05 12:48:12 -05:00
Kristian H. Kristensen
9f9432d56c Revert "spirv: Use a simpler and more correct implementaiton of tanh()"
This reverts commit da1c49171d.

The reduced formula has precision problems on fp16 around 0.  Bring
back the old formula, but make sure to keep the clamping.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054>
2020-03-05 15:23:31 +00:00
Kristian H. Kristensen
986e92f0ea Revert "glsl: Use a simpler formula for tanh"
This reverts commit 9807f502eb.

The simplified formula doesn't pass the tanh dEQP tests when we lower
to fp16 math.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054>
2020-03-05 15:23:31 +00:00
Alyssa Rosenzweig
bc5724faf4 pan/bi: Add bi_print_shader
Woot! That's the last of it! IR printing is now complete*

*until the IR gets updated when new shiny things are added.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
c152d4c835 pan/bi: Add bi_print_block
Almost there...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
c316d1553b pan/bi: Add bi_print_clause
Again for post-sched purposes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
919cdf15b3 pan/bi: Add bi_print_bundle for printing bi_bundle
Post-schedule, nops are significnat here.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
bde54cb6d3 pan/bi: Add bi_instruction printing
So we can debug the IR in memory before code emit has happened. We'd
like to have a complete dump of the IR -- neglecting this with Midgard
was one of those mistakes I've regretted so let's get this right for the
first time around.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
aef0f00cbc pan/bi: Move bi_interp_mode_name to bi_print
Instead of open-coding it in the middle of the disassembler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
5d16a8109c pan/bi: Add BIR manipulation routines to bir.c
New file.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
5f7a3ba872 pan/bi: Move some print routines out of the disasm
These are generally useful for debug of the compiler IR even prior to
code emit; let's share these.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
8ec671801a pan/bi: Add IR iteration macros
Copypaste from Midgard, for the most part.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
0b26cb194c pan/bi: Add quirks system
Modeled after the Midgard system. Already we know of two
compiler-visible differences between G52 and G71, so let's keep track so
we can eventually port the compiler to other Bifrost systems.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
07228a6895 pan/bi: Add high-latency property for classes
This is required to know how to schedule legally, and also influences
some issues relating to RA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
546c301ff6 pan/bi: Add CSEL condition
Along with src_types, this is enough to represent CSEL.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
47451bb9f1 pan/bi: Add bi_branch data
For BI_BRANCH, of course. Meshes well with the cfg.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
73c91f14c9 pan/bi: Extract bifrost_branch structure
It's in the disassembler as bitfields, let's extract to a proper
structure so we can see what's there.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
2afddc4433 pan/bi: Add pred/successors to build CFG
We'll want this for analysis passes or something, probably.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
d3370bd5a5 pan/bi: Add constants to bi_clause
Scheduling will have to pay attention to this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
cb3cd8aa56 pan/bi: Add EXTRACT, MAKE_VEC synthetic ops
These allow translating between the vector I/O and scalar ALUs,
facilitated by an RA dance to ensured contiguous registers are used.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
8929fe0c84 pan/bi: Add source type for conversions
We should now be able to unambiguously represent conversions.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
5896db9578 pan/bi: Add swizzles
Requires a new field on bifrost_instruction, as well as a new class
property and a new class for the dedicated swizzle ops.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
c70a198f24 pan/bi: Clarify special op scheduling
They're encoded on ADD but eat the full cycle.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
fba1d12742 pan/bi: Add clause header fields to bi_clause
These will be filled out during scheduling (and possibly RA), to be used
when emitting code.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
44ebc275fe pan/bi: Add class-specific ops
For disambiguating things like min and max within the MINMAX class.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
b5bdd89444 pan/bi: Add constant field to bi_instruction
Now that we can index it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
a2c1265dd3 pan/bi: Add special indices
For fixed registers, uniforms, and constants, which bypass the usual SSA
mechanism to map well to the ISA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
c42002d26f pan/bi: Add dest_type field to bifrost_instruction
A number of opcodes within a class are disambiguated by type/size, and
whether modifiers make sense or not depends on whether the instruction
acts like a float.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
a35854c5ee pan/bi: Add bi_clause, bi_bundle abstractions
These will be used during and after scheduling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
99f3c1f34c pan/bi: Add PAN_SCHED_* flags
Class (mostly) determines scheduling options.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
9643b9dd5b pan/bi: Add bi_load_vary structure
For ld_vary in the IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
6a7987aba1 pan/bi: Pull out bifrost_load_var
We're not using this structure yet but we want everything in the ISA
ready for us.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
aa2f12de56 pan/bi: Add bi_load structure
Fills out the class for LD_ATTR, LD_VAR_ADDR

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
b93aec6df1 pan/bi: Add bifrost_minmax_mode field
We'll open up a union for class specific data, since this is interesting
only to BI_MINMAX. (And even then...)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
d69bf8db62 pan/bi: Add a bifrost_roundmode field
And a class property signaling it's okay to use.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
bbf41ffb00 pan/bi: Factor out enum bifrost_minmax_mode
We'll want it from the compiler-side.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
34165c7ec0 pan/bi: Add BI_GENERIC property
I don't want to have 20 class-specific structures floating around. So
let's derive them all from a common generic ALU type.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
29acd7bd8e pan/bi: Add modifiers to bi_instruction
Now that we can check if we support them via the class.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
7ac62121e0 pan/bi: Add class properties
We need to keep track of what specific classes support. For now just
track floating point modifiers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
230be61f20 pan/bi: Add src/dest fields to bifrost_instruction
...along with some helpers to generate indices. The indexing scheme is
mostly a copypaste from Midgard, except we specifically reserve 0 as the
sentinel (midgard uses ~0 for this which has always been a pain point).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:37 +00:00
Alyssa Rosenzweig
e7dc2a7b9b pan/bi: Add the control flow graph
We're starting to build up the IR data structures in preparation to get
everything piped through.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:37 +00:00
Alyssa Rosenzweig
eceaea43e3 pan/bi: Stub out new compiler
Just enough to pipe in the NIR shader.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:37 +00:00
Alyssa Rosenzweig
5d3a4e3113 pan/bi: Gut old compiler
We're making some pretty dramatic design pivots so this early on it'll
be easier to start from scratch, I think.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:37 +00:00
Alyssa Rosenzweig
eb15525ab7 panfrost: Add note about preloaded varyings
There's a magic bit in preload_regs which controls this. It doesn't
appear to be supported on G71 but it is on G52. I'd guess G72 supports
it too but I don't have a way to check this.

Needless to say, we'll need a quirks database for this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:37 +00:00
Samuel Pitoiset
7618fe1b48 aco: fix image load/store with lod and 1D images
Make sure to add the lod value if non-null as the 2nd operand.

Fixes dEQP-VK.image.load_store_lod.with_format.1d.* on all gens
except GFX9.

Fixes: 4d49a7ac73 ("aco: handle nir_intrinsic_image_deref_{load,store} with lod")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4060>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4060>
2020-03-05 14:29:27 +01:00
Michel Dänzer
cc9493f78e gitlab-ci: Distribute jobs across more stages
The stages and mapping of jobs to them are somewhat arbitrary; the goal
is to avoid having to scroll through large numbers of jobs.

v2: (Pierre-Eric Pelloux-Prayer)
* Use even more stages for test jobs
* Give somewhat meaningful names to stages

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>
2020-03-05 12:46:51 +01:00
Michel Dänzer
71436f9640 gitlab-ci: Drop "test-" prefix from llvmpipe/softpipe job names
Redundant.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>
2020-03-05 12:45:51 +01:00
Marek Olšák
53a22c4b89 vbo: merge draws even when begin==0 or end==0
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:57:22 -05:00
Marek Olšák
ab7209fb83 vbo: merge more primitive types for glBegin/End (v2)
v2: clean it up more

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
d740e3d6ee mesa: deduplicate draw indirect functions
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
7700ac3d80 mesa: optimize get_index_size
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
450152f8d8 mesa: remove _mesa_index_buffer::index_size in favor of index_size_shift
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
df3891e74a Revert "mesa: check for z=0 in _mesa_Vertex3dv()"
This reverts commit f04d7439a0.

It no longer helps performance and the current vbo implementation is
faster anyway.

The app that hit this was a CAD program called Spazio3D. It made pretty
terrible use of the OpenGL API and we sent them some tips for improvements.
I'm assuming they've fixed this by now.

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
9c9c314e41 vbo: fold code from vbo_exec_fixup_vertex to vbo_exec_wrap_upgrade_vertex
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
8205042be6 vbo: clean up conditional blocks in ATTR_UNION
Move the A != 0 code to the first block.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
4c6323c49f vbo: handle GS and tess primitive types when splitting Begin/End
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Marek Olšák
f97341a9d6 vbo: clean up vbo_copy_vertices
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Marek Olšák
1be1ea0b8e vbo: deduplicate copy_vertices functions
There are some differences in exec, but those look like bug fixes not ported
to vbo_save.

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Marek Olšák
fd8eb634fd vbo: don't look at the second draw's count when merging 2 glBegin/End draws
Only the first count needs to be aligned.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Marek Olšák
e92a4f817d mesa: replace some index_size multiplications and divisions with shifts
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Marek Olšák
87085c673d mesa: add index_size_shift = log2(index_size) into _mesa_index_buffer
for faster division

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanic@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Mauro Rossi
f38ffa4659 android: r600/sfn: Add GDS instructions
Fixes the following building errors:

external/mesa/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp:59: error: undefined reference to 'r600::GDSInstr::GDSInstr(r600::ESDOp, r600::GPRVector const&, std::__1::shared_ptr<r600::Value> const&, std::__1::shared_ptr<r600::Value> const&, std::__1::shared_ptr<r600::Value> const&, int)'
...
external/mesa/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp:256: error: undefined reference to 'r600::RatInstruction::RatInstruction(r600::ECFOpCode, r600::RatInstruction::ERatOp, r600::GPRVector const&, r600::GPRVector const&, int, std::__1::shared_ptr<r600::Value> const&, int, int, int, bool)'

Fixes: 32d3435a ("r600/sfn: Add GDS instructions")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
2020-03-04 22:25:36 +01:00
Mauro Rossi
88c68c0ac7 android: r600/sfn: fix includes and libmesa_nir dependency
Fixes the following building errors:

In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.cpp:28:
In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.h:34:
In file included from external/mesa/src/compiler/nir/nir.h:41:
In file included from external/mesa/src/compiler/nir_types.h:36:
external/mesa/src/compiler/glsl_types.h:38:10: fatal error: 'main/config.h' file not found
#include "main/config.h"
         ^~~~~~~~~~~~~~~
1 error generated.

In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.cpp:28:
In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.h:34:
external/mesa/src/compiler/nir/nir.h:50:10: fatal error: 'nir_opcodes.h' file not found
#include "nir_opcodes.h"
         ^~~~~~~~~~~~~~~
1 error generated.

Fixes: f718ac62 ("r600/sfn: Add a basic nir shader backend")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
2020-03-04 22:25:36 +01:00
Mauro Rossi
01778d1e3c android: aco: fix PIPE_FORMAT related building errors
Fixes the following building errors:

In file included from external/mesa/src/amd/compiler/aco_dead_code_analysis.cpp:25:
In file included from external/mesa/src/amd/compiler/aco_ir.h:33:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
         ^~~~~~~~~~~~~~~~~
...
In file included from external/mesa/src/amd/compiler/aco_dominance.cpp:31:
In file included from external/mesa/src/amd/compiler/aco_ir.h:33:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
         ^~~~~~~~~~~~~~~~~
...
In file included from external/mesa/src/amd/compiler/aco_instruction_selection.cpp:31:
In file included from external/mesa/src/amd/common/ac_shader_util.h:32:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
         ^~~~~~~~~~~~~~~~~
3 errors generated.

Fixes: 8d07d661 ("glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
2020-03-04 22:25:36 +01:00
Jason Ekstrand
b20693be41 nir: Flush to zero with OOB low exponents in ldexp
Reviewed-by: Arcady Goldmints-Orlov <agoldmints@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2020-03-04 11:39:50 -06:00
Duncan Hopkins
ec9da89900 zink. Added storage CISto descriptor pool.
Added storage in descriptor pool for combined image samplers as well as uniform buffers.
Stops some shaders from running through a pools storage faster than zinks internal tracking.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4045>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4045>
2020-03-04 15:59:16 +00:00
Andres Gomez
0ac731b1ff gitlab-ci: Add jobs to be able to test Vulkan
Also, adds an example job for radv.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:24:03 +02:00
Andres Gomez
5c65f8b377 gitlab-ci: Add gfxreconstruct traces support
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:24:03 +02:00
Andres Gomez
1d75595da4 gitlab-ci: Change devices format to <api-vendor-deviceId>
In preparation to having "vk" (Vulkan) along "gl" (OpenGL/ES).

This is so it is clearer which traces belong to which API and also for
the build jobs.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:22:04 +02:00
Andres Gomez
f1b7b8c0ee gitlab-ci: build VulkanTools into the Vulkan testing container
In preparation for having automated testing with Vulkan traces.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:21:58 +02:00
Andres Gomez
028ab482bf gitlab-ci: build gfxreconstruct into the Vulkan testing container
In preparation for having automated testing with Vulkan traces.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:21:47 +02:00
Andres Gomez
fc2338dc44 gitlab-ci: add missing popd to the build-deqp-vk.sh script
Since we are at it, replace "cd" with pushd / popd and homogenize how
VK-GL-CTS is built in comparison with other build scripts.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:21:39 +02:00
Andres Gomez
8c5e2ef19f tracie: correct typo
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:20:22 +02:00
Christian Gmeiner
83f54e3c54 etnaviv: fix alpha test on GC3000
Store ref_value in PE_STENCIL_CONFIG_EXT as done by blob.

Fixes following piglits:
 spec@ext_framebuffer_object@fbo-alphatest-formats
 spec@ext_packed_float@fbo-alphatest-formats
 spec@ext_texture_srgb@fbo-alphatest-formats

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
2020-03-04 11:59:47 +00:00
Christian Gmeiner
f95fa3d1ac etnaviv: update headers from rnndb
Update to etna_viv commit 3bc187a.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
2020-03-04 11:59:47 +00:00
Daniel Stone
e5b01183a6 egl/wayland: Don't invalidate buffers on no-op resize
The Wayland platform's resize_callback is invoked from libwayland-egl
when wl_egl_window_resize() is called. The resize call is the only place
for the application to insert dx/dy arguments to wl_surface_attach().

When modifying the cursor hotspot (as in wayland/wayland#148), we want
to set dx/dy, but leave the surface size the same. If we get
wl_egl_window_resize() with the same width and height argument as we
already have, we do not need to invalidate our existing drawable.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4030>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4030>
2020-03-04 11:38:11 +00:00
Andrii Simiklit
311c82e192 Revert "glx: convert glx_config_create_list to one big calloc"
This reverts commit 35fc7bdf0e.

Unfortunately mentioned commit introduced a memory leak because
`driwindowsMapConfigs` and `createDriMode` functions allocate
small memory portions for each element:
 21,576 (232 direct, 21,344 indirect) bytes in 1 blocks are definitely lost in loss record 1,411 of 1,414
    at 0x483A7F3: malloc (in /usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
    by 0x5D4AA09: createDriMode (dri_common.c:291)
    by 0x5D4ABF5: driConvertConfigs (dri_common.c:310)
    by 0x5D58414: dri3_create_screen (dri3_glx.c:945)
    by 0x5D39829: AllocAndFetchScreenConfigs (glxext.c:815)
    by 0x5D39C57: __glXInitialize (glxext.c:941)
    by 0x5D3290A: GetGLXPrivScreenConfig (glxcmds.c:174)
    by 0x5D34F38: glXQueryExtensionsString (glxcmds.c:1307)
    by 0x4F83038: glXQueryExtensionsString (in /usr/local/lib/libGL.so.1.7.0)
    by 0x4F2EA6B: ??? (in /usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
    by 0x4F2A0D7: waffle_display_connect (in /usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
    by 0x498F42A: wfl_checked_display_connect (piglit-util-waffle.h:74)

There is one more thing which disallow us to easily fix it are different element sizes
for instance: `glx_config_create_list` allocates memory just for `glx_config`,
`driwindowsMapConfigs` for `driwindows_config` and
`createDriMode` for `__GLXDRIconfigPrivate`.
Yes it is possible but size of such fix
will be more big and complex than original one.
So it make sense only if the malloc overhead
really is a big problem there.

Acked-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3406>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3406>
2020-03-04 10:19:48 +00:00
Vilya Harvey
6ceda48560 zink. Don't set incorrect sType in VkImportMemoryFdInfoKHR struct
imfi.sType was being set to an invalid value, triggering a warning in Clang. The only valid value for imfi.sType is VK_STRUCTURE_TYPE_IMPORT_MEMORY_FD_INFO_KHR which is the value it is being given at initialisation time, a few lines earlier. The incorrect value, VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT, is supposed to be used in imfi.handleType instead - and indeed, handleType *is* being set to this value a few lines later.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4034>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4034>
2020-03-04 08:37:29 +00:00
Hyunjun Ko
3199b8b9e7 turnip: support indirect draw
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3976>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3976>
2020-03-04 01:20:32 +00:00
Mauro Rossi
a933934efb android: gallium/auxiliary: fix "Unused source files" in tesselator
Avoids the following Android Build System error:

FAILED:
build/make/core/binary.mk:1245: error: external/mesa/src/gallium/auxiliary/Android.mk: libmesa_gallium: Unused source files: tessellator/tessellator.hpp
10:24:30 ckati failed with: exit status 1

Fixes: bd0188f ("gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
2020-03-03 21:32:26 +00:00
Eric Anholt
aea8c9c7b1 ci: Flip db410c back to docker mode.
Turns out there's corporate policy to not deploy AGPL software, so I
have to take down the LAVA lab until we sort out how to do it without
a local server.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4038>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4038>
2020-03-03 12:49:09 -08:00
Rafael Antognolli
5f13996262 intel/gen12+: Disable mid thread preemption.
Fixes a GPU hang in Car Chase.

Cc: mesa-stable@lists.freedesktop.org

v2: Add comment explaining why (Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>
2020-03-03 19:52:06 +00:00
Krzysztof Raszkowski
42ee6ff706 Revert "gallium/swr: Fix min/max range index draw"
This reverts commit 5e9a2c603f

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4032>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4032>
2020-03-03 19:33:36 +00:00
Chris Lord
291f40a499 vc4: fix vc4_yuv_blit overwriting fragment constant buffer slot 0
vc4_yuv_blit calls util_blitter_restore_constant_buffer_state without
first calling util_blitter_save_fragment_constant_buffer_slot. This causes
subsequent crashes in vc4_write_uniforms when using fragment shaders that
reference YUV textures.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2581
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3997>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3997>
2020-03-03 19:06:03 +00:00
Rhys Perry
2d1ba86382 aco: handle v_add_co_u32_e64 in parse_base_offset()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>
2020-03-03 18:31:06 +00:00
Rhys Perry
215df21dea aco: fix carry-out size for wave32 v_add_co_u32_e64
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Fixes: e0bcefc3a0 ('aco/wave32: Use lane mask regclass for exec/vcc.')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>
2020-03-03 18:31:06 +00:00
Jan Zielinski
18675363a3 gallium/swr: fix corruptions in Unigine Heaven
Few changes to fix the last corruptions in Heaven:
- fix indirect TCS input when vertex/attribute
  index is not the same for each patch
- use the correct functions to build loops in shader
- fix using vmask for writting TCS output

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3980>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3980>
2020-03-03 17:50:25 +00:00
Satyajit Sahu
0ab5c88a0a st/va: GetConfigAttributes: check profile and entrypoint combination
Added check if profile is supported or not for the entrypoint in
GetConfigAttributes.

Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3889>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3889>
2020-03-03 17:06:07 +00:00
Rafael Antognolli
cd40110420 intel/isl: Implement D16_UNORM workarounds.
GEN:BUG:14010455700 (lineage 1808121037):

   "To avoid sporadic corruptions “Set 0x7010[9] when Depth Buffer
   Surface Format is D16_UNORM , surface type is not NULL & 1X_MSAA"

Required for fixing ttps://gitlab.freedesktop.org/mesa/mesa/issues/2501.

GEN:BUG:1806527549:

   "Set HIZ_CHICKEN (7018h) bit 13 = 1 when depth buffer is D16_UNORM."

This one could fix a GPU hang in some workloads.

v2: Implement WA in isl and add another similar WA (Jason).
v3: Add flushes before changing chicken registers (Jason)
v4: Depth flush and stall + end of pipe sync when changing registers
(Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3801>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3801>
2020-03-03 16:25:54 +00:00
Rhys Perry
9fea90ad51 aco: keep track of which events are used in a barrier
And properly handle unordered events so that they always wait for 0.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 93c8ebfa78 ('aco: Initial commit of independent AMD compiler')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3774>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3774>
2020-03-03 15:38:13 +00:00
Thong Thai
3f31c54842 st/va/postproc: reallocate interlaced destination buffer
When the source buffer is progressive source, re-allocate the
destination buffer as progressive if it isn't already - otherwise
transcoding will fail.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1418
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4001>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4001>
2020-03-03 15:17:26 +00:00
Louis-Francis Ratté-Boulianne
2d32248f49 panfrost: fix transform feedback
Fix different use cases for transform feedback by setting:

 - PIPE_CAP_PACKED_STREAM_OUTPUT=0
 - PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED=1
 - PIPE_CAP_PSIZ_CLAMPED=1

This is enough for all dEQP xfb-related test cases to run
successfully.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> (Update dEQP expectations)
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
585a21ceca gallium: add PIPE_CAP_PSIZ_CLAMPED
This new capability indicates that the point size has been clamped.
This also means that the gl_PointSize has been modified and that
its value should be lowered for transform feedback, if needed.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
babf7357d2 gallium: add PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED
This new capability indicates that the nir_lower_viewport_transform
pass is enabled. This also means that the gl_Position value is
modified and should be lowered for transform feedback, if needed.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
4ce339e741 gallium: add PIPE_CAP_PACKED_STREAM_OUTPUT
Setting this cap to 0 (default is 1) should disable packing
optimization for stream output (e.g. GL transform feedback captured
variables).

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
82dc149254 glsl/linker: add xfb workaround for modified built-in variables
Some lowering passes modify the value of built-in variables in
order for drivers to work properly. However, modifying such values
will also break transform feedback as the captured value won't
match what's expected.

For example, on some hardware, the vertex shaders are expected to
output gl_Position in screen space. However, the transform
feedback captured value is still supposed to be the world-space
coordinates (see nir_lower_viewport_transform).

To fix that, we create a new variable that contains the
pre-transformation value and use it for transform feedback instead
of the built-in one.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
4a329bea44 glsl/linker: handle array/struct members for DisableXfbPacking
When varying packing is disabled for transform feedback and a xfb
declaration points to an array element or structure member, the
element/member should be aligned to the start of a slot as well.
If that's not the case, a new varying is created and the
element/member value is copied.

There might a way to further optimize the number of slots allocated
or the number of copies necessary if the performance cost is
problematic. For example, in cases where simply padding the top
level variable might correctly align all the captured values.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
00746fa2da glsl/linker: add DisableTransformFeedbackPacking workaround
Some drivers (e.g. Panfrost) don't support packing of varyings when
used for transform feedback. This new constant ensures that any
varying used for xfb is aligned at the start of a slot and won't be
packed with other varyings.

Scenarios where transform feedback declarations are related to an
array element or a struct member will be handled in a subsequent
patch.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> (Fix order of arguments to varying_matches())
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Rhys Perry
8b361df9cf spirv: fix memory_barrier_tcs_patch emission
Shouldn't affect any driver, since all currently implement
memory_barrier_tcs_patch as a no-op. It also looks like optimizations are
fine

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4003>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4003>
2020-03-03 11:49:40 +00:00
Rhys Perry
6d839addf9 spirv: improve creation of memory_barrier
It shouldn't check for atomic counters or return in case we also need to
create a TCS output barrier.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4003>
2020-03-03 11:49:40 +00:00
Vasily Khoruzhick
5d713fb66e lima: don't disable tiling if there's linear modifier in list
Instead we should disable it if tiling modifier is not here and we
already do that.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4029>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4029>
2020-03-03 09:43:18 +00:00
Samuel Pitoiset
46a8cab58b ac: rename min_vgpr_alloc to min_wave64_vgpr_alloc
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
2020-03-03 08:17:00 +01:00
Samuel Pitoiset
33faef6a34 ac: rename vgpr_alloc_granularity to wave64_vgpr_alloc_granularity
And update the value.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
2020-03-03 08:17:00 +01:00
Samuel Pitoiset
9432eb3e9c ac: rename lds_size_per_cu to lds_size_per_workgroup
It's more accurate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
2020-03-03 08:16:56 +01:00
Brian Ho
69628ababb turnip: Execute main cs for secondary command buffers
Previously, we only added the secondary command buffer's draw and
draw epilogue command streams to the primary command buffer on
vkCmdExecuteCommands. However, we also need to merge the primary cs
for non-draw operations like vkCmdCopyBuffer and vkCmdBeginQuery.

Fixes dEQP-VK.memory.pipeline_barrier.host_write_transfer_src.*
and various other tests in dEQP-VK.api.command_buffers.*.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3988>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3988>
2020-03-03 02:25:25 +00:00
Brian Ho
5715a61fa9 turnip: Promote tu_cs_get_size/is_empty to header
These will be used in tu_cmd_buffer.c.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3988>
2020-03-03 02:25:25 +00:00
Ilia Mirkin
bdf20d324b nvc0: enable EXT_texture_shadow_lod
This passes all the CTS tests for this extension.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
2020-03-02 20:01:13 -05:00
Ilia Mirkin
11a06dfd4b st/mesa: allow TXB2/TXL2 to work with cube array shadow textures
It's a bit asymmetric, but it's such a contrived use-case, and not a lot
of drivers will support it.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
2020-03-02 20:00:52 -05:00
Ilia Mirkin
1d3b0b9088 nv50,nvc0: add newly added PIPE_CAP's to list
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
2020-03-02 19:55:06 -05:00
Paulo Zanoni
62f7197fb5 anv: multiply the scratch space by 4 on gen9-10 like iris and i965
My understanding is that there's no reason for the scratch space
allocation to be different between iris, i965 and anv. Let's make all
the functions behave the same.

I don't know if this fixes any specific gen9 bugs, it it might since
it increases the scratch space.

v2: Rebase.
v3: Rebase.
v4: Remove redundant gen 11 check (Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
2020-03-03 00:36:10 +00:00
Paulo Zanoni
aa78801f0a intel/device: bdw_gt1 actually has 6 eus per subslice
Found by inspection, I'm not aware of any bugs caused by this typo.

According to Lionel, it seems we only use this to generate masks
of available EUs for perfromance queries, and it's only used when we
can't query the fused parts of the GPU through DRM_IOCTL_I915_QUERY.
So this patch should help for the corner case where the Kernel is too
old to support the query ioctl.

v2: improve commit message, cc stable (Lionel).

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
2020-03-03 00:36:10 +00:00
Paulo Zanoni
9e5ce30da7 intel: fix the gen 12 compute shader scratch IDs
This is the same idea as "intel: fix the gen 11 compute shader scratch
IDs".

The number of EUs on TGL is not the same as ICL, but the
MEDIA_VFE_STATE restrictions stay the same, so adapt the code to it.
Also, consider the base configuration instead of what we read from the
Kernel.

According to Mark, this fixes the following piglit tests on TGL:

    piglit.spec.arb_compute_shader.execution.shared-atomicmax-uint.tglm64
    piglit.spec.arb_compute_shader.execution.shared-atomicmax-int.tglm64
    piglit.spec.intel_shader_atomic_float_minmax.execution.shared-atomicmax-float.tglm64

v2: s/ICL+/Gen11+/ (Jason).

Cc: mesa-stable@lists.freedesktop.org
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
2020-03-03 00:36:10 +00:00
Paulo Zanoni
1efe139cad intel: fix the gen 11 compute shader scratch IDs
Scratch space allocation is based on the number of threads in the base
configuration, and we only have one base configuration for ICL, with 8
subslices.

This fixes an issue with Aztec on Vulkan in a machine with a
configuration that's not the base. The issue looks like a regression
from b9e93db208, but it seems things are broken since forever, just
not easily reproducible.

v2: Reimplement it using the subslices variable. Don't touch TGL.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
2020-03-03 00:36:10 +00:00
Alyssa Rosenzweig
d0c66869c1 pan/bi: Move some definitions from disasm to bifrost.h
These are generally useful outside the disassmbler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
346262ceb6 pan/bi: Structify FMA_FADD
Just to make it easier to work with.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
4fe5b59a96 pan/bi: Squash LD_ATTR ops together
*whistles*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
ee957bc0f3 pan/bi: Combine LOAD_VARYING_ADDRESS instructions by type
It's all a single opcode in fact.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
36fe378f1c pan/bi: Decode ADD_SHIFT properly
Just like FMA_SHIFT, but with some bits shuffled around.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
8c79c710d4 pan/bi: Identify extended FMA opcodes
When the top 3 bits of the opcode are 111, it leads to a special
extended opcode mode instead.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
b51468ed9c pan/bi: Add v4i8 mode to FMA_SHIFT
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
2db454bbab pan/bi: Decode FMA_SHIFT properly
The shift-bitwise ops are fairly configurable, let's decode this the
right way. Choo choo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
67bbaddf7d pan/bi: Move notes on ADD ops to notes file
Again, we'd like to see just the opcode table more clearly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
7c96bd2dc5 pan/bi: Introduce CSEL4 class
All of these "ops" are just variants on the same.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
19a449e425 pan/bi: Move notes on FMA opcodes from disassembler
We're going to be shuffling around the opcode table, so let's get this
moved out first.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
dff83476c4 pan/bi: Add ICMP.GL.NEQ op
A fused not useful to feed into `discard`.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
178d9d4269 pan/bi: Add discard ops
These run on the ADD unit and evidently need to be their own clause
(probably treated as a high-latency instruction). Like csel, they can
either do a float comparison directly or ingest a 0/1 value.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
3044a37a84 pan/decode: Skip analysis for Bifrost tiler structures
We don't understand the Bifrost at all yet, so let's just print and move
on.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
acd140c2e2 pan/decode: Fix tiler weights printing
Theoretical - still always zero.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
3f5cd446b2 pan/decode: Restore bifrost sample_locations
Code by Connor Abbott, reverting a part of
254f40fd53 where it was removed during a
Midgard refactor.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
5815f33c6b pan/decode: Calm an assert to a pandecode error
We'd like to see what the problem actually was...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Rafael Antognolli
b4ddc6139b iris: Wait for the GPU to be idle before invalidating the aux table.
An end of pipe sync seems to satisfy this restriction. It takes care of
GPU hangs seen in dEQP-GLES31.functional.copy_image.* tests.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Rafael Antognolli
a7de6f1321 iris: Split aux map initialization from invalidation.
We can write the aux map address only once during the batch
initialization, and then only invalidate it once we modify it.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Rafael Antognolli
43dc842cb9 anv: Wait for the GPU to be idle before invalidating the aux table.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Jason Ekstrand
3ca3050de5 anv: Do end-of-pipe sync around MCS/CCS ops instead of CS stall
v2: Do end-of-pipe sync after clear depth stencil too (Jason).
v3: Also do end-of-pipe sync before clear depth stencil too (Jason).

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Jason Ekstrand
2db471953a anv: Use a proper end-of-pipe sync instead of just CS stall
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Jason Ekstrand
ac8d412ba3 anv: Use the PIPE_CONTROL instead of bits for the CS stall W/A
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Dave Airlie
bb2287ccdf gallivm/tessellator: use private functions for min/max to avoid namespace issues
Different builds are failing because of namespace collisions here.

Just fix the MS code to avoid it.

Fixes: bd0188f9ea ("gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.")

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2586
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4016>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4016>
2020-03-03 07:30:07 +10:00
Ivan Molodetskikh
c376865f5e egl: allow INVALID format for linux_dmabuf
As per
fb9b2a8731,
the compositor may advertise DRM_FORMAT_MOD_INVALID as a supported
modifier. This patch makes mesa recognize this fact and allow
linux_dmabuf usage with the INVALID modifier in this case.

In case the driver doesn't support modifiers, we can still use
linux-dmabuf protocol instead of the legacy wl_drm interface to create
wl_buffers. This will help compositors to handle these buffers better.

In this commit, the INVALID modifier is allowed to be added to the list
of supported modifiers, and create_wl_buffer will be able to use
linux_dmabuf with an INVALID modifier if the compositor advertised it as
supported.

Signed-off-by: Ivan Molodetskikh <yalterz@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2147>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2147>
2020-03-02 21:09:26 +00:00
Vasily Khoruzhick
646fbb1c4f lima: add RGBA5551 and RGBA4444 formats
We also need to set channel_layout in pp_frame reg (previously known as
foureight) depending on cbuf format.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3972>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3972>
2020-03-02 12:48:44 -08:00
Eric Anholt
ede93a3278 ci: Add a disabled-by-default job for GLES3 testing on db410c.
Now that we have 7 (soon 8) boards available, there's capacity to be
testing GLES 3.0.  However, due to (it looks like) buffer overflows in the
driver, we end up with flaky test results: 1/60 jobs spuriously failed,
and another 6/60 jobs reported flakes.  At 6 jobs per pipeline, that's way
too high of a failure rate to enable for non-freedreno developers.  Leave
the job present but disabled so that we can do manual test runs for
regressions.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3661>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3661>
2020-03-02 11:38:46 -08:00
Eric Anholt
5865944635 ci: Switch testing on db410c over to LAVA.
This should get us better stability of the db410c boards by having a
smaller per-board software stack, with no disks involved (just initramfs).
Additionally, the new cluster is 7 (soon 8) db410cs, while currently the
docker cluster only has 1/4 of its db410cs still running.

Unfortunately, we have to prepare the fastboot boot image during the ARM
drivers build stage, because LAVA relies on publicly available URLs for
the images to load into the bootloaders of the boards, and the only thing
we have for that is gitlab's artifacts.

Note that this testing relies on the boards being freshly flashed with the
linaro v136 firmware to pick up the initramfs size fixes and to stop the
boot at fastboot.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3661>
2020-03-02 11:38:46 -08:00
Gert Wollny
adcb365c1d r600/sfn: Don't try to catch exceptions, the driver doesn't throw any
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
2020-03-02 20:00:26 +01:00
Gert Wollny
b66170b537 r600/sfn: Use static_cast when type is already known
In all these cases the type was tested before based, so don't use
dynamic_casts.

Closes #2566

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
2020-03-02 20:00:23 +01:00
Gert Wollny
7780b50b7e r600/sfn: Avoid using dynamic_cast to identify type
v2: Fix typo (maurossi)

Related: #2566

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
2020-03-02 20:00:14 +01:00
Alejandro Piñeiro
3503cb4c28 docs/features: add v3d driver
Now that we bumped the GLES version to 3.1, it makes even more sense
to include the driver here.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2507

Reviewed-by: Jose Maria Casanova <jmcasanova@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3810>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3810>
2020-03-02 15:54:40 +01:00
Albert Astals Cid
760fe44e8c aco: pass vars by const &
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3935>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3935>
2020-03-02 13:18:49 +00:00
Daniel Stone
5469221e77 Revert "gitlab-ci: disable panfrost runners"
The infrastructure issues, caused by building electrical works gone
wrong, have been fixed, and the Panfrost LAVA runners are available
again.

This reverts commit a86662c44d.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4019>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4019>
2020-03-02 12:40:31 +00:00
Albert Astals Cid
2521c81c9e aco: Minor optimization in spill_ctx constructor
'register_demand' is passed by value and only copied once; consider moving it to avoid unnecessary copies

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3968>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3968>
2020-03-02 12:21:03 +00:00
Samuel Pitoiset
d555794f30 radv: update entrypoints generation from ANV
It's a massive rework loosely based on ANV. This introduces separate
dispatch tables for the instance, physical device and device objects.

This will help for implementing internal driver layers for SQTT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3930>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3930>
2020-03-02 11:51:43 +00:00
Samuel Pitoiset
79d4d2807f radv/sqtt: add support for GFX10
All SQTT registers were moved to privileged space on GFX10, to emit
them we need a workaround with COPY_DATA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
2020-03-02 12:23:43 +01:00
Samuel Pitoiset
eea3912451 ac/registers: add definitions for thread trace on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
2020-03-02 12:23:39 +01:00
Samuel Pitoiset
fedbc4c929 radv/sqtt: update SPI_CONFIG_CNTL.EXP_PRIORITY_ORDER value
It should be 3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
2020-03-02 12:23:37 +01:00
Samuel Pitoiset
36768eee9a radv/sqtt: do not assume that the number of shader engines is 4
It's not always 4, for example on RAVEN there is only one.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
2020-03-02 12:23:35 +01:00
Samuel Pitoiset
1b565e56e9 radv/rgp: adjust trace memory/shader clocks to fix frame duration
To report microseconds instead of clocks.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
2020-03-02 12:23:33 +01:00
Tapani Pälli
fbd61b3fb6 mesa/st: fix formats required for EXT_texture_norm16
Earlier commit did not take in to account that lists required for
rendering and texturing are parsed separately. This commit simply
removes formats added to the other list.

Fixes: de4eb9a3bb ("mesa/st: toggle EXT_texture_norm16 based on format support")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3961>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3961>
2020-03-02 10:53:44 +00:00
Andreas Baierl
e58bb417b5 lima: Add etc1 support
Layer stride has to be divided by 4. We also have to take care of
the array_size when returning the bo_size.

Drop the affected tests from the fails list.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3946>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3946>
2020-03-02 10:33:06 +00:00
Uros Bizjak
37a670d76c doc: Update features.txt for r600 with misc supported features
Update features.txt with misc supported features for r600,
as reported by glxinfo for Cypress XT [Radeon HD 5870].

Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4010>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4010>
2020-03-02 08:45:18 +00:00
Lionel Landwerlin
85457e350d intel/tools/dump_gpu: fix getparam values
Don't return the pci_id for all params

Fixes: 76bf38eaf0 ("intel/tools/aub_dump: move aub file initialization to maybe_init()")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3994>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3994>
2020-03-02 08:24:40 +00:00
Vinson Lee
1e43910aa2 meson: Enable -Wno-deprecated only for bison > 2.3.
Older versions of bison do not support the -W option.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2571
Fixes: 11a1cb2fa8 ("meson: Disable bison's -Wdeprecated since we still support old bison.")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3993>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3993>
2020-03-01 18:13:52 -08:00
Ilia Mirkin
5306b662dd mesa: fix _mesa_draw_nonzero_divisor_bits to return nonzero divisors
The bitmask is _EffEnabledNonZeroDivisor, so no need to invert it before
returning.

Fixes: fd6636ebc0 (st/mesa: simplify determination whether a draw needs min/max index)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4009>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4009>
2020-03-01 23:16:36 +00:00
Ilia Mirkin
a86662c44d gitlab-ci: disable panfrost runners
They seem to be timing out.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4011>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4011>
2020-03-01 15:30:56 -05:00
Samuel Pitoiset
02f3af2ad1 radv: fix size of sqtt_file_chunk_asic_info on 32-bit system
The struct is actually 716 bytes, but on 64-bit systems the compiler
aligns it to 720. Add padding to make sure it's always 720.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2580
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2578
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>
2020-02-29 05:54:54 +00:00
Samuel Pitoiset
33f604a331 radv: fix 32-bit build failure in radv_queue_internal_submit()
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2580
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2578
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>
2020-02-29 05:54:54 +00:00
Timothy Arceri
ad094433b4 glsl: add some error checks to the nir uniform linker
These are optional for spirv but it shouldnt hurt to enable them.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
61dc9354c0 glsl: fix sampler index calculation in nir linker
Here we reset the counter to 0 for each shader stage not each program.
We also make add a flag to stop iterating over indices that have
already been processed.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
ef47069cc3 glsl: reset next_image_index count for each shader stage
This fixes the image index calculation in the nir linker. We need
to reset the counter to 0 for each shader stage not each program.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
e0aa0a839f glsl: fix resizing of the uniform remap table
In the NIR linker we were not resizing the remap table correctly
for explicit locations when it was needed.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
190a1ed170 glsl: set the correct number of images in a shader
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
b232a54df1 glsl: set the correct number of samplers in a shader
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
7dafc3050d glsl: fix possible memory leak in nir uniform linker
Use UniformDataSlots for the context of UniformDataDefaults rather
than UniformStorage as in some cause UniformStorage may be NULL.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Jordan Justen
cf12faef61 intel/compiler: Restrict cs_threads to 64
Our current GPGPU_WALKER code only supports up to 64 threads.

On HSW we could use up to 70 and TGL up to 112, but only if the walker
is adjusted so the width does not exceed 64. Work to support this is
in progress.

Previous to this change, we might try to downgrade to SIMD8 if the
SIMD16 shader spilled. Since HSW and TGL have the max number of
threads above 64, we would then try to emit an invalid GPGPU walker
command.

Fixes: 932045061b ("i965/cs: Emit compute shader code and upload programs")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2020-02-28 14:45:43 -08:00
Thong Thai
0932363489 st/va: remove unneeded code
No need to explicitly set the 10-bit buffer format as the correct
buffer format will be allocated later

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3998>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3998>
2020-02-28 20:16:38 +00:00
Rob Clark
8cb9f79413 freedreno/ir3: add assert
Catch problems earlier when inputs are not setup correctly.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
ac705edd82 freedreno/ir3: fix assert with getinfo
Fixes:
dEQP-VK.glsl.texture_functions.query.texturesamples.sampler2dms_fixed_vertex

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
c1f4367461 freedreno/ir3: don't precolor unassigned inputs
Fixes crash seen in:
dEQP-VK.glsl.conversions.matrix_to_matrix.mat4_to_mat3x4_vertex

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
4b8e198fd2 freedreno/ir3: fix crash with samgq workaround
Need to list_delinit() before we clone the instruction to split it into
individual samgpN instructions, otherwise we get list corruption.

Tested-by: Eduardo Lima Mitev <elima@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
56565b7bba freedreno/ir3: update SFU delay
1) emperically, 10 seems like a more accurate # than 4
2) push "soft" delay handling into ir3_delayslots(), as
   we should also be using it to calculate the costs
   that the schedulers use

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
2cf4b5f29e freedreno/ir3: track half-precision live values
In schedule live value tracking, differentiate between half vs full
precision.  Half-precision live values are less costly than full
precision.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
4353b3c1c5 freedreno/ir3: don't hide latency when there is none to hide
Current scheduler thresholds try to ensure there are warps available to
switch to when hiding texture fetch latency.  But if there is none to
hide, we should allow scheduler to use more registers to reduce nops.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
9d2aaa589c freedreno/ir3: rewrite regmask to better support a6xx+
To avoid spurious sync flags, we want to, for a6xx+, operate in terms of
half-regs, with a full precision register testing the corresponding two
half-regs that it conflicts with.

And while we are at it, stop open-coding BITSET

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
c02cd8afbd freedreno/ir3: remove regmask_set_if_not()
No longer used.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
2fa64729db freedreno: honor FD_MESA_DEBUG=nogrow
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
bab9db6c02 freedreno/a6xx: enable SKIP_IB2_ENABLE properly
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Rob Clark
9724a7c105 freedreno/a6xx: don't emit YIELD packet
We don't implement the rest of this.. and it would probably cause bad
things when kernel gains support for preemption.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Rob Clark
45771786e4 freedreno/a6xx: whitespace fix
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Rob Clark
ae3e237db0 freedreno/a6xx: emit LRZ clear in sysmem too
Fixes rendering issues in manhattan with FD_MESA_DEBUG=nogmem

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Rob Clark
6b605804ea freedreno/a6xx: remove unused param
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Rob Clark
141d0d1c25 freedreno/ir3: remove from_tgsi
No longer used, other than in ir3 cmdline compiler, where it can be
replaced with a local variable.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Jonathan Marek
c7ac1bcea0 turnip: increase array sizes in tu_descriptor_map
Pending the descriptor rework, this allows running the follow test:
dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_127

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
d195eef05d turnip: fall back to sysmem when attachments don't fit into gmem
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
de3230e0a5 turnip: remove unnecessary fb size check
Framebuffer with 0 width or height is not valid.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
cf302c9a22 turnip: don't hardcode gmem base for input attachment
Newer a6xx no longer has programmable GMEM base, so we can't rely on the
kernel driver setting it to 0x100000 (GMEM base is 0 on such GPUs).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
6420406f19 turnip: fix srgb MRT
Register packing macros makes this only set the first bit. Set to whole
dword to fix srgb for color attachments >0.

Fixes: 59f29fc8 ("turnip: Convert the rest of tu_cmd_buffer.c over to the new pack macros.")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
8f9e1c6047 turnip: fix hw binning + render_area offset interaction
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
de33c23370 turnip: minify image_view extent
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
b18d6575fe turnip: remove unecessary MRT_CONTROL fill
Hardware won't use MRT_CONTROL after mrt_count

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
33b2db5fb9 turnip: move some constant state to tu6_init_hw
Also remove duplicates.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
7d27a9ffb3 turnip: check the right alignment requirement on shader iova
I had some trouble because I assumed this was right, tested that the
alignment requirement is actually 16.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
0f0662a551 turnip: add r5g5b5a1_unorm/b5g5r5a1_unorm formats
r5g5b5a1/b5g5r5a1 tiled/ubwc is the same as a1r5g5b5 (in memory), but
linear is read as 1_5_5_5 and written with 5_5_5_1 with swap.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
2020-02-28 12:48:11 +00:00
Jonathan Marek
80ceebcdd1 turnip: rework format table to support r5g5b5a1_unorm/b5g5r5a1_unorm
These formats are an exception that can't be modeled in the current format
table. Switch to a table with only a single a6xx_format per vk format,
and deal with the exceptions separately (currently the only exception is
10_10_10_2_UNORM which has a different color format).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
2020-02-28 12:48:11 +00:00
Jonathan Marek
89c6ef4233 util/format: add missing BC4/BC5 vulkan formats
Enables these formats for turnip.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
2020-02-28 12:48:11 +00:00
Icecream95
339f127f2b panfrost: LogicOp fixes and non 8-bit format support
With the previous LogicOp commit almost half of the blend modes were
broken because the surplus bits were not cleared after an inot.

v2:
 - Remove u8 "fast path" as 8-bit is not well optimised yet
 - Don't mask for 32-bit formats as that triggers an assert

Fixes: 068806c9f6 ("panfrost: LogicOp support")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>
2020-02-28 11:52:40 +00:00
Icecream95
574b03eebf nir: Allow nir_format conversions to work on 32-bit values
The constant has to changed to unsigned long long, as shifting a
32-bit value by 32 is undefined behaviour.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>
2020-02-28 11:52:40 +00:00
Greg V
cf69b9635a r600: add missing <array> include
Fixes error with clang/libc++:

../src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.h:69:88: error: implicit instantiation of undefined template 'std::__1::array<unsigned char, 3>'
   bool emit_alu_op3(const nir_alu_instr& instr, EAluOp opcode, std::array<uint8_t, 3> reorder={0,1,2});

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3967>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3967>
2020-02-28 11:30:39 +00:00
Dave Airlie
eb5227173f llvmpipe: add support for tessellation shaders
This adds the hooks between llvmpipe and draw to enable tessellation shaders.

It also updates the CI results and docs.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
a3257ae7be gallium/nir/tgsi: only scan fragment shader inputs for usage_mask
The scanner doesn't work with tess shaders, but we don't need it for those,
in fact only frag shaders need it.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
dacf8f5f5c draw: hook up final bits of tessellation
This hooks tessellation into various parts of draw, so the
tessellation shaders are used in the correct places as the
last shader of the pipeline.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
0d02a7b8ca draw: add main tessellation code
This is the bulk of the llvm shader builders and tessellation
execution code.

TCS uses a coroutine launcher like compute shaders to handle
barriers. It executes 4-wide with one input vertex per lane.

Tessellation happens before the TES is run.

TES is just a 4-wide launcher, one per primitive is executed,
with one lane per tessellation coordinate input.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
76daf893ea draw: add JIT context/functions for tess stages.
This adds the initial draw_tess.h with a define needed
for the interfaces. TCS input array doesn't need to handle
patch inputs so can be smaller.

The TCS context has some dummy values to align the textures/images
properly.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
3ecd496117 gallivm/nir: add tessellation i/o support.
This add support for the tessellation i/o callbacks.

Tessellation requires another level of indirect indexing,
and allows fetches from shader outputs.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
70a7603b63 gallivm/tgsi/swr: add mask vec to the tcs store
For the nir paths we want to access the mask vector to only
store when the mask allows it.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
87359d68a9 gallivm/nir: align store_var param order with load_var
This was ugly so align load/store to have mostly the same
parameter ordering

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
7898e37fb4 gallivm/nir: add support for tess system values
hooks up the tessellation specific system values in the NIR paths

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
c632d806cb gallivm/nir: split out 64-bit splitting code
This just lets it be reused for tess later.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
bd0188f9ea gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.
This adds the same tessellator code that swr uses, swr should
move to using this copy, unfortunately that wasn't trivial on my first
look.

The p_tessellator wrapper wraps it in a form that is a useful interface
for draw.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Samuel Pitoiset
bf16ff3172 radv: allow to capture SQTT traces with RADV_THREAD_TRACE=<start_frame>
This is pretty basic (and a bit crappy at the moment). I think we
might want some sort of overlay in the future and also be able to
trigger captures with F12 or whatever.

To record a capture, set RADV_THREAD_TRACE to something greater than
zero (eg. RADV_THREAD_TRACE=100 will capture frame #100). If the
driver didn't crash (or the GPU didn't hang), the capture file
should be stored in /tmp.

To open that capture, use Radeon GPU Profiler and enjoy your
profiling times with RADV! \o/

Note that thread trace support is quite experimental, only GFX9 is
supported at the moment, and a bunch of useful stuff are still missing
(shader ISA, pipelines info, etc). More is comming soon.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:11:11 +01:00
Samuel Pitoiset
ed0c852243 radv: add initial SQTT files generation support
SQTT is also a file format (.rgp extension) that can be consumed
by Radeon GPU Profiler for profiling purposes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:11:07 +01:00
Samuel Pitoiset
b3ef07db96 radv: emit thread trace markers after every draw/dispatch call
Thread trace markers (also called events in Radeon GPU Profiler)
should be emitted after every draw/dispatch calls to collect data.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:11:02 +01:00
Samuel Pitoiset
768d4f0551 radv: add initial SQ Thread Trace support for GFX9
SQTT is a hardware block that collects thread trace data (like
wave occupancy, timings, etc) for every draw/dispatch calls.

It's only supported on GFX9 at the moment but I will add other
generations support soon.

This is the first step towards profiling with RADV!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:10:55 +01:00
Samuel Pitoiset
94099ee642 radv: add a small helper that allows to submit internal CS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:10:53 +01:00
Samuel Pitoiset
dbbf49c8f3 ac/registers: add definitions for thread trace
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:10:51 +01:00
Samuel Pitoiset
3de4f6c9f0 ac: add more fields to ac_gpu_info
For RGP traces.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:10:37 +01:00
Eric Anholt
3c7c021ffc ci: Enable -Werror on meson-vulkan and meson-testing.
I want to make sure that I don't introduce warnings in turnip where we
have active work going on, and I also want to make sure that the drivers
we care about testing are warnings-clean.

As with the previous -Werror change, this is for CI only and doesn't
affect end-user builds.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3607>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3607>
2020-02-27 21:59:34 -08:00
Eric Anholt
b9773631d3 aco: Fix signed-vs-unsigned warning.
The previous instance of this comparision was 1u to avoid the warning, fix
this one too.

Fixes: dba71de5c6 ("aco: only create parallelcopy to restore exec at loop exit if needed")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3607>
2020-02-27 21:59:31 -08:00
Marek Olšák
2976ae2717 gallium/u_vbuf: silence a warning by using unreachable
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
2020-02-27 22:53:12 -05:00
Marek Olšák
ad192385e3 mesa: fix 11 warnings
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
2020-02-27 22:53:12 -05:00
Marek Olšák
6d7b076166 nir: fix 5 warnings
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
2020-02-27 22:53:12 -05:00
Marek Olšák
0e25746dde gallivm: fix 5 warnings
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
2020-02-27 22:53:12 -05:00
Marek Olšák
d18d07c9d7 nir: replace GCC unroll with an option that works on GCC < 8.0
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
2020-02-27 22:53:12 -05:00
Marek Olšák
1a61a5b1d4 mesa: fix incorrect prim.begin/end for glMultiDrawElements
This has no effect on Gallium, but it affects tnl.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
a1f4023443 mesa: optimize glMultiDrawArrays, call Draw only once (v2)
v2: use the macros

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
e636a062f1 mesa: don't unroll glMultiDrawElements if one count is 0
let the driver skip or submit an empty draw call.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
4c5cd113b8 mesa: clean up glMultiDrawElements code, use alloca for small draw count (v2)
v2: use calloc, add reusable macros

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de> (v1)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
b78ab9c741 mesa: move num_instances and base_instance out of _mesa_prim
They are never used by multi draws and internal draws.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
aaa758d3dd mesa: remove redundant _mesa_prim::is_indexed
Instead, check (ib != NULL) like all other drivers.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
0c9850e55d mesa/i965: remove _mesa_prim::indirect_offset
Only i965 was using it.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
f55ae2cdbe gallium/u_threaded: convert dividing by index_size to a bit shift
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
28d75fc286 gallium/u_threaded: fix uploading user indices with start != 0
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
c9e4dc8d5e gallium: pass cso_velems_state into cso_context instead of pipe_vertex_element
This removes one memcpy from the CSO hashing code.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
6c90e39a5b gallium/cso_hash: inline struct cso_hash_data
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
505cd5f12b gallium/cso_hash: pack cso_node better
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
950ee0a370 mesa: remove unused "indirect" parameter from Driver.Draw
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
9556805ac4 i965: stop using "indirect" parameter from Driver.Draw (non-indirect)
The parameter will be removed.

v2: added UNUSED, removed "!!"

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Caio Marcelo de Oliveira Filho
dab7a4d82c anv: Remove unused field urb.total_size
This was used before the URB calculation functions were shared by GL
and Vulkan.  Also drop the substruct for the remaining, `l3_config` is
a good name on its own.

Also-written-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3981>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3981>
2020-02-27 14:45:10 -08:00
Alyssa Rosenzweig
0bb25e4713 pan/midgard: Use address analysis for globals, etc
..instead of opencoding for constants and doing the rest as ALU.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
f5401cb886 pan/midgard: Add address analysis framework
Midgard has the ability to calculate addresses as part of the load/store
pipeline. We'd like to make use of this to avoid doing this work on the
ALU pipes. To do so, when emitting globals/SSBOs/shareds, we walk the
tree looking for address arithmetic to try to parse out something the
hardware can work with, letting the original instructions be DCE'd
ideally. This analysis is done at the NIR level to properly account for
some messy details of vectorization which we'd rather not poke at the
backend level. (Originally I wrote this as a MIR pass but I'm fairly
sure it was wrong.)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
658541a745 pan/midgard: Force address alignment
I thought we already had this but... maybe not..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
93ca47e046 pan/midgard: Round up bytemasks when promoting uniforms
Fixes crashes with uniform promotion in certain mixed type
circumstances.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
fd888d351f pan/midgard: Fix load/store argument sizing
The swizzles are as-if they were 32-bit regardless of the bitness of the
operation, but the source sizes can and do change depending on the
flags. Account for this in the analysis.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
ee47ce6ac3 pan/midgard: Add LDST_ADDRESS property
Many load/store ops (used for globals, SSBOs, shared memory, etc) have
the ability to compute addresses directly. Mark off which ones behave
like this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
1a2bb78840 pan/midgard: Extract nir_ssa_index helper
In case we don't have a nir_src.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
4e60dc8f48 pan/midgard: Partially fix 64-bit swizzle alignment
When mixing 32/64-bit, we need to align the 32-bit registers to get the
required alignment. This isn't quite enough yet, though, since user
swizzles could bypass and will need to be lowered to 32-bit moves
(outstanding todo).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
9c59f9f379 pan/midgard: Allow fusing inverted sources for inverted ops
It doesn't make a difference to the actual algorithm, so let's get rid
of them.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
21c578027f pan/midgard: Allow inverted inverted ops
We'd like to transform `inand.not` back to `iand` and so forth.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
995e437105 panfrost: Increase SSBO/image limit from 4->8
Fixes an error compiling some shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Jonathan Marek
1046d73af1 etnaviv: disable INT_FILTER for ASTC
Tested on GC3000: INT_FILTER bit is incompatible with ASTC formats.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927>
2020-02-27 20:31:45 +00:00
Caio Marcelo de Oliveira Filho
811990dc1c anv: Remove unused field xfb_used from anv_pipeline
Since we only use xfb_info for GEN >= 8, make the ifdef cover that
local variable.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973>
2020-02-27 10:44:11 -08:00
Eric Anholt
33f38605e9 ci: Include db410c support in the ARM container.
I'm working on moving the db410c CI from docker to LAVA, which means we
get to boot a custom kernel.  To do that, we need to enable ARCH_QCOM in
the kernel, save the dtb around, and include abootimg in our container so
that we can generate combined kernel/dtb/ramdisk images for fastboot.

LAVA's fastboot support is unable to pack the overlay into an abootimg
image, just a cpio rootfs.  We could flash the cpio rootfs after overlay
addition, but that takes 2 minutes to do, and causes wear on the devices.
Instead, we'll bring up the network at boot and use wget to fetch the
overlay.  We'll want network support anyway, so that we can transfer the
failure xmls back to the gitlab job's artifacts at some point.

Since the msm GPU and realtek network firmware increase our payload by
3MB, add in firmware compression so that it doesn't waste as much RAM on
devices not using it.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
2020-02-27 09:36:26 -08:00
Eric Anholt
20659f1894 ci: Shrink the arm64 kernel build a bit.
No sense building some of these subsystems for just testing the GPU.
Saves some container rebuild time and kernel contents to move around.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
2020-02-27 09:36:24 -08:00
Eric Anholt
9ed6c1be6b ci: Stop disabling ACPI in the LAVA arm64 kernel build.
I can't figure out why, but it's necessary to get QCOM_CLK_APCS_MSM8916
for db410c.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
2020-02-27 09:36:22 -08:00
Eric Anholt
257415863b ci: Remove LLVM from ARM test drivers.
The LLVM libraries were a significant fraction of the entire payload
(55M/250M uncompressed) into the initramfs of the test boards, but
LLVM is only used for the draw module used in select/feedback (which
isn't even tested in CI on ARM yet).

Assume that llvmpipe draw is safe enough for ARM given the coverage on
x86, and disable LLVM for these jobs.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
2020-02-27 09:36:19 -08:00
Rohan Garg
9c0bbba856 ci: Split out radv build-testing on arm64
radv needs libllvm which increases our ramdisk size
significantly. Since this driver is only build tested,
we can split it out into a separate job.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
2020-02-27 09:36:16 -08:00
Tomeu Vizoso
ebfa899089 gitlab-ci: Skip dEQP-GLES3.functional.shaders.derivate.*
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:57 +01:00
Tomeu Vizoso
17d775ca5d gitlab-ci: Remove GLES3 test from Panfrost fails list
Seems to have been fixed recently.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:52 +01:00
Tomeu Vizoso
1fa987ae5e gitlab-ci: Use PAN_MESA_DEBUG=gles3 for Panfrost
We can drop now the GLES version overrides now that we have a DEBUG flag
that enables all what is expected from a GLES 3.0 implementation.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:33 +01:00
Alyssa Rosenzweig
5491a13be9 panfrost: Add PAN_MESA_DEBUG=gles3 option
This enables experimental GLES3.0 support without ES3.1/2 hacks.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:28 +01:00
Alyssa Rosenzweig
f5b6dfcb18 panfrost: Expose PIPE_CAP_PRIMITIVE_RESTART
It works just fine, we just forgot to expose the CAP.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:23 +01:00
Alyssa Rosenzweig
2fea44c636 panfrost: Simplify stack shift calculation
I'm not sure why I never saw smaller values, but here you go.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:17 +01:00
Alyssa Rosenzweig
40fd1f9da4 panfrost: Reserve an extra page for spilling
I'm not sure what this is for, but the blob does it and I'd rather not
poke farther than needed into hardware-internal details.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:11 +01:00
Alyssa Rosenzweig
f37cec3275 panfrost: Default to 256 threads for TLS
I'm not sure where I got the impression 1024 was the right number. From
kbase:

   #define THREAD_MT_DEFAULT 256

(where MT = "max threads" and the threads to allocate for TLS is <= max
threads). Let's cut out memory footprint for spilling by 75% :)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:05 +01:00
Alyssa Rosenzweig
f6ca7ea551 panfrost: Fix param getting
....Oops....

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:00 +01:00
Alyssa Rosenzweig
4a10cfab76 panfrost: Don't set shared->unk0
This field controls the size of per-thread temporaries (somehow this is
separate from the regular stack for register spilling..), though I'm not
certain on the details. Regardless this value of 0x1e despite being used
in places by the blob seems wrong and is interfering with correct sizing
of the stack.

We don't use non-spilling scratchpad yet, so this is just here to fix
some details of spilling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:54 +01:00
Alyssa Rosenzweig
febabb0502 panfrost: Update spilling comment framebuffer->shared
All of this should apply equally with compute shaders, as far as I know.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:48 +01:00
Alyssa Rosenzweig
03822a27e6 panfrost: Fix padded_vertex_count generation
These two cases were flipped from the notes, leading to underestimates
of the padded vertex count, manifesting as visual corruption (random
geometry messed up). This issue was raised when noticing the corruption
went away when dramaticlaly oversizing max_index on an instanced indexed
draw, and then checking that padded_count >= vertex_count -- which
turned out *not* to be the case on certain inputs, a clear issue. Hence
looking into this routine...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:42 +01:00
Alyssa Rosenzweig
23c8597172 panfrost: Fix gl_VertexID/InstanceID
Fixes a bunch of tests in dEQP-GLES3.functional.instanced.*.

Fixes: 027944c7c8 ("panfrost: Avoid reading GPU memory when packing
vertices")

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:37 +01:00
Alyssa Rosenzweig
a0b90b45a9 pan/midgard: Don't spill near a branch
Fixes
dEQP-GLES2.functional.shaders.indexing.varying_array.vec2_dynamic_loop_write_
static_read with register pressure forced down.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:32 +01:00
Alyssa Rosenzweig
ed52855680 pan/decode: Dump scratchpad size if present
This will help us narrow the size required for thread local storage.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:06 +01:00
Alyssa Rosenzweig
d385c5840f panfrost: Implement index buffer cache
For index bufer resources (not user index buffers), we're able to cache
results. In practice, the cache works pretty dang well. It's still
important that the min/max computation is efficient (since when the
cache misses it'll run at draw-time and we don't want jank), but this
can eliminate a lot of computations entirely.

We use a custom data structure for caching. Search is O(N) to the size
but sizes are capped so it's effectively O(1). Insertion is O(1) with
automatic oldest eviction, on the assumption that the oldest results are
the least likely to still be useful. We might also experiment with other
heuristics based on actual usage later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
2020-02-27 10:30:48 +00:00
Alyssa Rosenzweig
12db69aa3f panfrost: Combine get_index_buffer with bound computation
These operations are intertwined since there are optimizations that will
want to "double dip". In particular for user index buffers we'd want to
upload simultaneous with index computation. For resources we'd like to
keep resource related code together.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
2020-02-27 10:30:48 +00:00
Leo Liu
e272b110bb radeon/jpeg: fix the jpeg dt_pitch with YUYV format
The dt_pitch should be same as NV12 format from decoder views,
and it finally got corrected with gfx9 surface's fixes from MR
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3738

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:35 +01:00
Pierre-Eric Pelloux-Prayer
5bc71e1bac st/va: add support YUY2
YUY2 is a duplicate of YUYV and is used by gstreamer for 4:2:2.

Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:35 +01:00
Pierre-Eric Pelloux-Prayer
d2e715e57a st/va: enable 4:2:2 chroma format
Everything is in place to support them.

Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:35 +01:00
Pierre-Eric Pelloux-Prayer
69aadc4933 radeonsi: fix surf_pitch for subsampled surface
gfx9.surf_pitch is supposed to be in blocks (or elements) but addrlib
returns a pitch in pixels.
This cause a mismatch between surface->bpe and surface.u.gfx9.surf_pitch.

For subsampled formats like uyvy (bpe is 2) this breaks in various places:
 - sdma copy
 - video rendering (see issue https://gitlab.freedesktop.org/mesa/mesa/issues/2363)
   when the vl_compositor_gfx_render method is used

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:31 +01:00
Pierre-Eric Pelloux-Prayer
c4197fbcdd gallium/vl: add 4:2:2 support
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2363
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:31 +01:00
Pierre-Eric Pelloux-Prayer
24f2b0a856 gallium/video: remove pipe_video_buffer.chroma_format
chroma_format depends on buffer_format so use the format_to_chroma_format
helper instead of storing it next to buffer_format.
This avoids bugs where one value is changed without updating the other.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:31 +01:00
Pierre-Eric Pelloux-Prayer
87807298a3 format: add format_to_chroma_format
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:31 +01:00
Pierre-Eric Pelloux-Prayer
fb29f0847f radeonsi: test subsampled format in testdma
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:31 +01:00
Samuel Pitoiset
9e5d2a73c5 ac/llvm: flush denorms for nir_op_fmed3 on GFX8 and older gens
The hardware doesn't flush denorms, exactly like fmin/fmax, so
we have to do it manually. This doesn't fix anything known.

Fixes: d6a07732c9 ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
2020-02-27 08:04:33 +01:00
Samuel Pitoiset
30ac733680 ac/llvm: fix 16-bit fmed3 on GFX8 and older gens
16-bit med3 is only supported on GFX9+.

Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f16.*.

Fixes: d6a07732c9 ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
2020-02-27 08:04:30 +01:00
Samuel Pitoiset
50b8c25274 ac/llvm: fix 64-bit fmed3
Lower 64-bit fmed3 because LLVM doesn't expose an intrinsic.

Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f64.*.

Fixes: d6a07732c9 ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
2020-02-27 08:04:28 +01:00
Mathias Fröhlich
636656bcd7 mesa: Flush vertices before changing the OpenGL state.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
2020-02-27 06:58:56 +01:00
Mathias Fröhlich
4a54f8cd2c mesa: Check for OpenGL state change before flushing vertices.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
2020-02-27 06:58:49 +01:00
Dave Airlie
2b155b1086 gallivm/nir: handle mod 0 better.
I haven't seen this crash but TGSI does it so best align with
it to avoid future issues.

Fixes: 44a6b0107b3J (gallivm: add nir->llvm translation (v2))
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
2020-02-26 23:20:01 +00:00
Dave Airlie
5370c685da gallivm/nir: fix integer divide SIGFPE
Blender was crashing with a SIGFPE even though the divide by 0
logic was kicking in. I'm not sure why TGSI doesn't get into this state.

The problem was is the numerator was INT_MIN we'd replace the div by
0 with a divide by -1, which is an exception for INT_MIN as INT_MIN/-1
== INT_MAX + 1 (too large for 32-bits). Instead for integer divides
just replace the mask values with 0x7fffffff. Also fix up the
result handling so it aligns with TGSI usage. (gives 0)

Fixes: c717ac1247 ("gallivm/nir: wrap idiv to avoid divide by 0 (v2)")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
2020-02-26 23:20:01 +00:00
Dave Airlie
954cf8e86b gallivm/tgsi: fix stream id regression
This broke TGSI GS shaders with llvmpipe, it wasn't looking at the
right immediates and it should be cast to an integer type.

Fixes: 163d5fde06 (gallium/swr: Enable GL_ARB_gpu_shader5: multiple streams)

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Acked-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>
2020-02-26 22:33:18 +00:00
Marek Olšák
4449611ffb mesa: call FLUSH_VERTICES before updating CoordReplace
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
2020-02-26 22:10:35 +00:00
Marek Olšák
aae09ffb6e mesa: remove leftovers from ARB_shadow_ambient
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
2020-02-26 22:10:35 +00:00
Albert Astals Cid
d988061172 cube_face_index: Use fabsf instead of fabs since we know it's floats
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>
2020-02-26 21:47:01 +00:00
Albert Astals Cid
6db7467b59 cube_face_coord: Use fabsf instead of fabs since we know it's floats
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>
2020-02-26 21:47:01 +00:00
Rafael Antognolli
a70a605ad6 iris: Apply the flushes when switching pipelines.
Even though the workaround description says:

   "all the listed commands are non-pipelined and hence flush caused due
   to pipeline mode change must not cause performance issues..."

My understanding is that we still need to have the flushes. Also, the
flushes are required not only to stall the pipeline, but also to clear
caches, so I don't think they can simply be discarded.

Additionally, while doing some testing that increased the number of
surface STATE_BASE_ADDRESS emitted, I got a lot more GPU hangs. Adding
these flushes fixes those hangs.

Fixes: b8fbb39a (iris: Implement Gen12 workaround for non pipelined
                 state)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
2020-02-26 21:16:24 +00:00
Marek Olšák
f6d1dd34d7 gallium/hash_table: remove some function wrappers
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
2020-02-26 20:35:50 +00:00
Marek Olšák
502840855a gallium/hash_table: turn it into a wrapper around util/hash_table
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
2020-02-26 20:35:50 +00:00
Marek Olšák
10d235a843 gallium/hash_table: use the same callback signatures as util/hash_table
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
2020-02-26 20:35:50 +00:00
Marek Olšák
76dff2fabe gallium/hash_table: consolidate hash tables with FD keys
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
2020-02-26 20:35:50 +00:00
Marek Olšák
a01a875081 gallium/hash_table: consolidate hash tables with pointer keys
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
2020-02-26 20:35:50 +00:00
Greg V
56f31328f2 amd/addrlib: fix build on non-x86 platforms
regparm(0) attribute does not work on aarch64 (and presumably powerpc64 and others).
Default to not specifying any calling convention on non-amd64/i386 platforms.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3567>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3567>
2020-02-26 20:10:52 +00:00
Marek Olšák
c798aae739 tgsi_to_nir: set num_images and num_samplers with holes correctly
This fixes the copy_uv shader from st/omx, because it uses image 0 and 2
and image 1 isn't declared.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>
2020-02-26 19:49:25 +00:00
Jason Ekstrand
349898a967 nir: Drop nir_tex_instr::texture_array_size
It's set by lots of things and we spend a lot of time maintaining it but
no one actually uses the value for anything useful.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3940>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3940>
2020-02-26 18:29:49 +00:00
Eric Anholt
ec2f905ca8 freedreno/computerator: Fix defined-but-not-used warnings from lex/yacc.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3954>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3954>
2020-02-26 17:20:24 +00:00
Eric Anholt
bd53f4f56b turnip: Fix compiler warning about casting a nondispatchable handle.
Fixes: 1c5d84fcae ("turnip: hook up cmdbuffer event set/wait")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>
2020-02-26 16:58:50 +00:00
Tomeu Vizoso
ebd071d8cf gitlab-ci: Move to 5.5 kernel plus fixes for Panfrost
There's two fixes that help with stability when running dEQP on Kevin
Chromebooks.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
2020-02-26 14:03:04 +01:00
Tomeu Vizoso
ae5e6406df panfrost: Remove some more prints to stdout
They can confuse test runners.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
2020-02-26 14:02:59 +01:00
Tomeu Vizoso
fcd8308b28 gitlab-ci: Run GLES3 tests in dEQP on Panfrost
We are able to run only 1/5th of the tests in around the same time that
dEQP-GLES2 takes, so do that for now while more DUTs are installed.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
2020-02-26 14:02:25 +01:00
Tapani Pälli
de4eb9a3bb mesa/st: toggle EXT_texture_norm16 based on format support
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2556
Fixes: 7f467d4f73 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
2020-02-26 11:12:59 +00:00
Tapani Pälli
200a83a983 i965: toggle on EXT_texture_norm16
Fixes: 7f467d4f73 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
2020-02-26 11:12:59 +00:00
Tapani Pälli
dc531869a9 mesa: introduce boolean toggle for EXT_texture_norm16
Fixes: 7f467d4f73 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
2020-02-26 11:12:59 +00:00
Juan A. Suarez Romero
784c454607 nir/lower_double_ops: add note for lowering mod
Add a note to clarify that while Vulkan allows mod(x,y) to be in [0, y]
range, OpenGL does not allow it, so the lowering ensures the result is
always in [0, y) range, as this lowering is shared by the Vulkan and
OpenGL implementation.

Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3315>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3315>
2020-02-26 10:46:06 +00:00
Samuel Pitoiset
d2e4435c20 radv: fix creating null devices if KHR_display is enabled
Found this while replaying pipelines with Fossilize, it worked
fine with vkpipeline-db.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3959>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3959>
2020-02-26 10:28:46 +00:00
Andreas Baierl
ef0abe5404 gitlab-ci: Add add a set of lima flakes
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3957>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3957>
2020-02-26 10:12:45 +00:00
Samuel Pitoiset
4c03d20396 radv: make use of ac_gpu_info::max_wave64_per_simd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
9204ad70f2 radv/gfx10: adjust the number of VGPRs used to compute waves
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
568f150409 radv/gfx10: adjust the LDS size used to compute waves
It's 128KB per CU in WGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
ea91b15a31 radv/gfx10: adjust SGPRs/VGPRs related info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
a6df3ef6ec radv/gfx10: adjust the number of simd per compute unit
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
09d8726187 ac: add more ac_gpu_info related shader fields
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
974c87e449 ac,radeonsi: add ac_gpu_info::lds_size_per_cu
Both RadeonSI and RADV use the WGP mode, so we can assume 128KB on
GFX10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
cd6ec2b1ab radv: implement a dummy winsys for creating devices without AMDGPU
To allow developers to test the compiler backends without having
any AMD GPUs. To create a null device, set eg.
RADV_FORCE_FAMILY=polaris10 in your environment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3872>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3872>
2020-02-26 08:09:46 +01:00
Mathias Fröhlich
f280c00ba6 egl: Factor out dri2_add_pbuffer_configs_for_visuals {device,surfaceless}.
v2: dri2_add_configs_for_visuals -> dri2_add_pbuffer_configs_for_visuals

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
2020-02-26 06:53:50 +01:00
Mathias Fröhlich
d32c458de7 egl: Fix A2RGB10 platform_{device,surfaceless} PBuffer configs.
The __DRI_IMAGE_FORMAT_* part wants to be handled for the *101010
type formats as well. Factor out a common function for that task.
That again makes the piglit egl_ext_device_base test work again
for hardware drivers.

v2: Factor out a common function for that task.
v3: dri2_pbuffer_visuals -> dri2_pbuffer_visuals

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Fixes: 9acb94b623 "egl: Enable 10bpc EGLConfigs for platform_{device,surfaceless}"
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
2020-02-26 06:53:46 +01:00
Jonathan Marek
87924646db turnip: enable fullDrawIndexUint32/independentBlend/dualSrcBlend/logicOp
These are already implemented but missing from VkPhysicalDeviceFeatures.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>
2020-02-26 00:21:45 +00:00
Jonathan Marek
708c3a5ffd turnip: enable sampleRateShading feature
There's still a TODO related to key->sample_shading, but it doesn't look
like it changes anything in ir3, so it works without that.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>
2020-02-26 00:21:45 +00:00
Matt Turner
cb166aea24 intel/tools: Do not print type/qualifiers/name for c_literal
External tools may wish to choose their own type, qualifiers, and name,
so do not emit our own.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
5feea40889 intel/tools: Allow i965_disasm to disassemble c_literal input type
Added extra argument named 'type' which can be 'bin' (default if
ommited) or 'c_literal' for input type.

Change 'binary-path' argument name to 'input-path'.

v2:
- Use util_dynarray for assembly (Matt Turner)
- Read data in 8 bytes chunk (Matt Turner)
- Fix help option (Akeem Abodunrin)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
2f83daedb1 intel/tools: Print c_literals 4 byte wide
We already print hex value a byte wide, instead of printing c_literal
byte wide, we can print it 4 byte wide, which gives us 2 different
combinations.

v2: Fix the aliasing issue (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
0b0e958f4f intel/tools: Add test for state register as source
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
31c29f4f55 intel/tools: Add test for address register as source
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
9526e5c359 intel/tools: Set correct address register file and number in i965_asm
We need to use already created brw_reg and set correct file type,
register number and sub register number.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
87d9e78f26 intel/tools: Handle STATE_REG in typed source operand
Also stop using brw_sr0_reg function as it return new brw_reg, we
already created register, all we have to is just set file, register
number and subnr.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
2a75e60365 intel/tools: Handle illegal instruction
Allow assembler to handle illegal instruction even though mesa doesn't
use it but might be required at some point in future.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Eric Anholt
11a1cb2fa8 meson: Disable bison's -Wdeprecated since we still support old bison.
We can't stop using deprecated keywords because we maintain support for
ancient bison.  Silence the warning so that builds are less noisy.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3868>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3868>
2020-02-25 21:45:06 +00:00
Jason Ekstrand
5dfd83d7a1 anv: Always enable the data cache
Because we set the needs_data_cache bit from the NIR during compilation,
any time a shader was pulled out of the pipeline cache, we wouldn't set
the bit and the data cache was disabled.  Fortunately, on Gen8+, this
bit is ignored because we always use the ALL section in the L3$ config
instead of separate DC and RO sections.  On Gen7, however, this meant
that we were basically never running with the data cache enabled and our
compute performance was suffering massively because of it.  This commit
improves Geekbench 5 scores on my Haswell GT3 by roughly 330% (no,
that's not a typo).

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912>
2020-02-25 20:12:10 +00:00
Lionel Landwerlin
d4e7a11bc3 intel/aub_dump: stub the waits when overriding the device
We don't actually want to wait on anything, just complete submitting
the commands as fast as possible.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
2020-02-25 20:56:49 +02:00
Lionel Landwerlin
31461e2379 intel/tools/aub_dump: fix crash when using the default legacy context
When execbuffer->rsvd1 == 0, the legacy context is used. Ensure we
have context created for this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
2020-02-25 20:56:45 +02:00
Lionel Landwerlin
76bf38eaf0 intel/tools/aub_dump: move aub file initialization to maybe_init()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
2020-02-25 20:56:40 +02:00
Icenowy Zheng
3569215d49 lima: expose fragment shader derivatives capability
Support for fragment shader derivatives has landed in the Lima PP
compiler for a long time, but its capability is not exposed yet.

Expose the support now.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3944>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3944>
2020-02-26 01:47:58 +08:00
Jose Maria Casanova Crespo
01496e3d1e v3d: Sync on last CS when non-compute stage uses resource written by CS
When a resource is written by a compute shader and then used by a
non-compute stage we sync on last compute job to guarantee that the
resource has been completely written when the next stage reads resources.

In the other cases how flushes are done guarantee the serialization of
the writes and reads.

To reproduce the failure the following tests should be executed in batch
as last test don't fail when run isolated:

KHR-GLES31.core.shader_image_load_store.basic-allFormats-load-fs
KHR-GLES31.core.shader_image_load_store.basic-allFormats-loadStoreComputeStage
KHR-GLES31.core.shader_image_load_store.basic-allTargets-load-cs
KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray

v2: Use fence dep instead of bo_wait (Eric Anholt)
v3: Rename struct names (Iago Toral)
    Document why is not needed on graphics->compute case. (Iago Toral)
    Follow same code pattern of the other update of in_sync_bcl.
v4: Fixed comments style. (Iago Toral)

Fixes KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
CC: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2700>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2700>
2020-02-25 11:41:44 +00:00
Andreas Baierl
5de8bc7c75 gitlab-ci: Enable the lima job again
Flaky tests should be fixed to the best of our knowledge.
Fails and skips lists should be up-to-date again.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>
2020-02-25 07:45:53 +00:00
Andreas Baierl
31a8075678 gitlab-ci: lima: Add flaky tests to the skips list
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>
2020-02-25 07:45:53 +00:00
Marek Olšák
5ab94df0f6 nir: fix gl_nir_lower_images for bindless images
Fixes: 7342b859af

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3938>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3938>
2020-02-25 02:30:08 +00:00
Rob Clark
26d42645f9 freedreno/computerator: fix build dependency
Ensure the generated register headers are built before computerator uses
them.

Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3939>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3939>
2020-02-25 02:02:06 +00:00
Dave Airlie
84395190ec glx/drisw: fix shm put image fallback
The fallback to the non-shm put path used the wrong width here
as the pixmap is still allocated in a shared segment, so the
width needs to reflect that.

Fixes: 02c3dad0f3 ("Call shmget() with permission 0600 instead of 0777")

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
2020-02-25 01:23:01 +00:00
Dave Airlie
246e4aeaef glx/drisw: return false if shmid == -1
If an attempt to create an shm pixmap in XCreateDrawable fails
then it ends up with the shmid == -1. This means the get image
path needs to fallback so return false in this case to use the
non-shm get image path.

Fixes: 02c3dad0f3 ("Call shmget() with permission 0600 instead of 0777")

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
2020-02-25 01:23:01 +00:00
Dave Airlie
8d0bab8a93 glx/drisw: add getImageShm2 path
This adds return values to the get image path, so the caller can fallback.

Fixes: 02c3dad0f3 ("Call shmget() with permission 0600 instead of 0777")

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
2020-02-25 01:23:01 +00:00
Dave Airlie
466a0b2e49 dri: add another get shm variant.
When Brian in 02c3dad0f3 restricted
the shm permissions it means we hit the fallback paths in some
scenarios we hadn't before.

When you use Xephyr to xdmcp from one user to another the new perms
stop the X server (running as user a) attaching to the SHM segments
from gnome-shell (running as user b).

In this case however only the GLX side of the code had insight into this,
and the dri could was meant of fall back, and it worked for put image
fine but the get image path was broken, since there was no indication
in the broken case of the need to fallback.

This adds a return type to a new interface member that lets the
caller know it has to fallback.

Fixes: 02c3dad0f3 ("Call shmget() with permission 0600 instead of 0777")

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
2020-02-25 01:23:01 +00:00
Eric Anholt
a91067d3f5 ci: Blacklist another freedreno flaky test.
This is the recurring flake from the last week, including spuriously
failing a pipeline once.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3937>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3937>
2020-02-25 01:07:14 +00:00
Jason Ekstrand
6fbe3f40a9 intel/isl: Add isl_aux_info.c to Makefile.sources
This should fix the Android build.

Fixes: 58d4749e56 "isl: Add a module which manages aux resolves"
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3934>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3934>
2020-02-25 00:41:15 +00:00
Rafael Antognolli
9ab0e92cff intel/blorp: Implement GEN:BUG:1605967699.
v2:
 - Update comments and refactor code (Lionel).
 - Only apply workaround to stencil resolves.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3909>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3909>
2020-02-25 00:04:36 +00:00
Erik Faye-Lund
36515e295c gallium/util: remove unused debug_print_foo helpers
These are unused, so let's just get rid of them.

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>
2020-02-24 23:07:57 +00:00
Erik Faye-Lund
dfea933a2a gallium/util: do not use debug_print_format
These are the only two places we use this macro, and it's no longer very
gallium-specific. So let's get rid of this, and just use debug_printf
and util_format_name directly instead.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>
2020-02-24 23:07:57 +00:00
Erik Faye-Lund
5f0b984cb8 util: move debug_memory_{begin,end} to os_memory_debug.h
This is where the other debug_memory_* functions are declared, so let's
move it here for symmetry.

This allows us to drop an include of u_debug_gallium.h, which makes us
depend on gallium-headers in non-gallium code.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>
2020-02-24 23:07:57 +00:00
Jonathan Marek
31a7815785 hud: add GALLIUM_HUD_SCALE
Scale hud by an integer factor, for high DPI displays.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3931>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3931>
2020-02-24 22:53:09 +00:00
Jonathan Marek
0ee76b90d5 turnip: move tile_load_ib/sysmem_clear_ib into draw_cs
Avoids having to calculate reserved sizes for substream cs, also matches
what the blob does.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:46 +00:00
Jonathan Marek
a410e64b68 turnip: make cond_exec helper easier to use
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:46 +00:00
Jonathan Marek
6ede9749d2 turnip: remove marker seqno
Use robclark's new crashdec/devcoredump thing instead.

Note: not sure this ever really worked because it didn't WFI.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:45 +00:00
Jonathan Marek
cf94124e1c turnip: automatically reserve cmdstream space in emit_pkt4/emit_pkt7
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:45 +00:00
Jonathan Marek
4b2a7dcd93 turnip: add tu_device pointer to tu_cs
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:45 +00:00
Jonathan Marek
a9a990a60b turnip: fix COND_EXEC reserved size in tu_query
Conditionally executed dwords must be in the same bo.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:45 +00:00
Rob Clark
2275343ba3 freedreno/computerator: add computerator
A standalone tool to compile and run compute shaders from ir3 assembly.
Mostly to have an easy way to experiment with instructions.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
2020-02-24 21:31:53 +00:00
Rob Clark
568e948d1f freedreno/ir3: allow block->predecessors to be null
This way we can also use ir3_print from computerator, which mostly
bypasses the ir3_block construct (since it doesn't need to do
scheduling, etc)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
2020-02-24 21:31:53 +00:00
Rob Clark
f87d412f08 freedreno/computerator: rename prefix asm->ir3
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
2020-02-24 21:31:53 +00:00
Rob Clark
6ee68d796e freedreno/computerator: polish out some of the rust
Updates for differences between fdre-a3xx's early version of ir3, and
what we have now in mesa.  And updates for instruction name and syntax
changes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
2020-02-24 21:31:53 +00:00
Rob Clark
3bb340cf4f freedreno/computerator: import parser/lexer from fdre-a3xx
Import the rusty old parser from freedreno.git

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
2020-02-24 21:31:53 +00:00
Icenowy Zheng
6499738d3d lima: remove its hash table entry when invalidating a resource
When a resouce is already invalidated, its hash table entry becomes
useless. In addition, the lima_job_free() function won't remove the hash
table entry for invalidated resource. So the hash entry should be
removed when invalidating the resource, otherwise bogus hash entry might
be left in the table, and when the resource is reused in another job,
the code will find the freed job when invalidating and thus result in crash.

Fixes: c64994433c ("lima: track write submits of context (v3)")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3917>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3917>
2020-02-24 20:53:31 +00:00
Caio Marcelo de Oliveira Filho
956e4b2d37 nir, intel: Move use_scoped_memory_barrier to nir_options
This option will be used later by GLSL, so move to a common struct.

Because nir_options is filled in the compiler instead of the Vulkan
driver, fix that up.  GLSL will ignore that for now.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>
2020-02-24 19:12:11 +00:00
Caio Marcelo de Oliveira Filho
6be766336a nir/tests: Use nir_scoped_memory_barrier() helper
Most of the vars tests already had a local helper, so just drop it in
favor of the one in nir_builder.  Remaining two tests changed to use
the helper.

The load_store_vectorizer tests were using the specific memory
barriers, but since scoped barriers are also handled, prefer that.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>
2020-02-24 19:12:11 +00:00
Caio Marcelo de Oliveira Filho
6ff898a653 nir: Add the alias NIR_MEMORY_ACQ_REL
This will help upcoming C++ code that will have to combine those two
semantics.  In C++ it is not possible to do this without a cast or
adding an operator| to the enum.  Since having the short form will
also be convient to C, we picked the former solution.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>
2020-02-24 19:12:11 +00:00
Caio Marcelo de Oliveira Filho
424737da3e nir/builder: Add nir_scoped_memory_barrier()
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>
2020-02-24 19:12:11 +00:00
Eric Anholt
e4baff9081 freedreno: Switch to using lowered image intrinsics.
This cuts out a bunch of deref chain walking that the compiler can do for
us.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
3e16434acd nir: Move intel's intrinsic_image_coordinate_components() to core nir.
This is a query that both Intel and freedreno need to do.  We can simplify
it a lot with the new glsl_get_sampler_dim_coordinate_components()

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
a703840320 freedreno/ir3: Fix the arg to ir3_get_num_components_for_image_format()
GLuint worked fine for storing our enum, but it should be an enum
pipe_format since the image-formats merge.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
8aa54e6ed0 prog_to_nir: Reuse glsl_get_sampler_dim_coordinate_components().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
b8644349d1 tgsi_to_nir: Reuse glsl_get_sampler_dim_coordinate_components().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
1b7de2d6b8 freedreno/ir3: Reuse glsl_get_sampler_dim_coordinate_components() in tex_info.
Now that we have access to the interior switch statement not going through
the txs special case for coord_components, we can just use it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
d37c6ebd3c spirv_to_nir: Reuse glsl_sampler_dim_coordinate_components().
We just needed to move the SUBPASS_MS case in, and the rest of the cases
match up.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
5072719e66 glsl: Factor out the sampler dim coordinate components switch statement.
I want to reuse this in NIR image intrinsics in backends, which just have
dim/is_array.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
12cf484d02 v3d: Ask the state tracker to lower image accesses off of derefs.
This saves a bunch of hassle in handling derefs in the backend, and would
be needed for reasonable handling of dynamic indexing of image arrays.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
9c90ecf37f gallium: Add a cap for enabling lowering of image load/store intrinsics.
The deref stuff is hard to handle in a backend supporting dynamic
indexing, while the lowering can easily turn that into the same kind of
dynamic indexing we do for textures, UBOs, and SSBOs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
7342b859af nir: Make image lowering optionally handle the !bindless case as well.
iris was doing this internally, but let's rename the function and move the
iris code there.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
cad2d6583c nir: Rename gl_nir_lower_bindless_images.c in preparation for extending it.
The bulk of it can be reused to implement iris's internal non-bindless
image lowering, which I would like to reuse in freedreno, v3d, and
nir-to-tgsi.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Nanley Chery
b62379ac6f i965: Use isl_aux_state_transition_write()
v2. Dirty shadow miptrees independent of aux. (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Nanley Chery
b9856fbf3b i965: Use ISL's access preparation functions
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Nanley Chery
b00e7a6485 iris: Use isl_aux_state_transition_write()
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Nanley Chery
af04779410 iris: Use ISL's access preparation functions
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Nanley Chery
fec957900d iris: Use isl_aux_usage_has_fast_clear()
Make sure fast-clears aren't attempted or allowed for ISL_AUX_USAGE_MC.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Nanley Chery
58d4749e56 isl: Add a module which manages aux resolves
Provide a generic interface which manages aux resolves in ISL. The
feature differences between this and what's in iris is:
* Support for media compression. ISL_AUX_USAGE_MC behaves differently
  from many other usages of CCS, so it was useful to implement this
  support upfront, while designing the interfaces.
* Optimizations for full-surface writes. For example, after a
  full-surface write occurs with ISL_AUX_USAGE_CCS_E in the PARTIAL_CLEAR
  state, isl_aux_state_transition_write() returns COMPRESSED_NO_CLEAR
  instead of COMPRESSED_CLEAR.

A performance suggestion for main-surface-invalidating/replacing writes
is given as a comment instead of adding a boolean to
isl_aux_prepare_access(). This avoids extra validation and should be
simple enough for the caller to handle.

v2. Add assertions. (Jason)
v3. Use switches in 2 more functions. (Jason)
    Store aux metadata in a static table. (Jason)
    Change prepare and finish function signatures. (Jason)
    Keep isl_aux_state_transition_* functions separate.
v4. (Jason)
    Assert against resolving in AUX_INVALID.
    Rename aux_info struct to aux_usage_info.
    Drop the justification for each aux_usage_info field.
    Split out the NONE case in write function.
    Restructure tests to more easily confirm coverage.
    Rename access_compressed field to compressed.
    Make write behavior less ambiguous.
v5. (Jason)
    Add more detail above WRITES_RESOLVE_AMBIGUATE.
    Add ISL_AUX_USAGE_MC to WritesResolveAmbiguate.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Kristian H. Kristensen
daa4020948 freedreno/ir3: Lower output precision
This lowers mediump FS outputs to fp16 in the ir3 backend. For now
this is a modest improvement, which mostly helps us whittle down the
full mediump work.  Once the GLSL level support lands, then right hand
side of the store output intrinsics will be fp16 expressions and we'll
cancel out the fp16 -> fp32 -> fp 16 round trip here.

We've had different attempts at implementing this: rewriting stores in
the GLSL IR, lowering GLSL IR outputs to temporaries and inserting
conversions when writing the temporaries to the outputs.  In the end,
GLSL ends up getting in the way a lot and doing it at the nir level is
easier and still possible since we have the output var precisions.

This part of the fp16 work is more of a step on the way towards full
fp16 support and will add a few extra conversion instructions:

total instructions in shared programs: 8151 -> 8163 (0.15%)
instructions in affected programs: 1187 -> 1199 (1.01%)
helped: 4
HURT: 10

total nops in shared programs: 3146 -> 3152 (0.19%)
nops in affected programs: 563 -> 569 (1.07%)
helped: 5
HURT: 10

total non-nops in shared programs: 5005 -> 5011 (0.12%)
non-nops in affected programs: 92 -> 98 (6.52%)
helped: 0
HURT: 3

total dwords in shared programs: 12832 -> 12800 (-0.25%)
dwords in affected programs: 96 -> 64 (-33.33%)
helped: 1
HURT: 0

total last-baryf in shared programs: 118 -> 115 (-2.54%)
last-baryf in affected programs: 21 -> 18 (-14.29%)
helped: 1
HURT: 0

total full in shared programs: 424 -> 417 (-1.65%)
full in affected programs: 15 -> 8 (-46.67%)
helped: 7

HURT: 0
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Kristian H. Kristensen
6c750d9c4d nir/types: Add glsl_float16_type() helper
This returns the float16 version of a float type.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Hyunjun Ko
c822460f85 freedreno/ir3: handle half registers for arrays during register allocation.
So far we only handle full regs of arrays during pre-allocation.
This patch is to handle half regs of arrays and also consider the size
of half regs when finding out conflicts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Hyunjun Ko
9e8466a866 nir: Add optimization for doing removing f16/f32 conversions
This eliminates conversions between f16 and f32 where possible. We can
always remove an upcast followed by a down cast, that is:

  f2f16 ( f2f32 (a) )  ->  a
  f2fmp ( f2f32 (a) )  ->  a

In the other direction, f2f16 loses precision and can't be undone by a
f2f32.  However, by definition it's always safe to elminate f2fmp:

  f2f32 ( f2fmp (a) )  ->  a

v2. [Neil Roberts (nroberts@igalia.com)]

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Hyunjun Ko
6ee375f68d freedreno/ir3: Add new ir3 pass to fold out fp16 conversions
This pass tries to fold f2f16 conversion into alu instructions.
This will be useful to help reduce the number of instructions once
mesa starts supporting precision lowering.  For example:

  add.f r0.w, r0.w, c0.x
  cov.f32f16 hr2.x, r0.w

to

  add.f hr2.x, r0.w, c0.x

Additionally this pass also tries to fold f2f16 conversion into load_input
instruction:

  bary.f r0.x, 3, r0.w
  cov.f32f16 hr0.x, r0.x

to

  bary.f hr1.x, 3, r0.x

v2: Edit to not fold OPC_MAX_F and OPC_MIN_F, since that's not valid.

v3: Add OPC_ABSNEG_F to the blacklist as well.

v4: Don't remove dead cov instructions, DCE will do that later; don't
iterate through sources when a cov only has one; remove special
handling of IR3_REG_ARRAY and IR3_REG_RELATIV.

v5: Handle folding into u32.u32 movs of floats correctly, don't bail
out on IR3_REG_RELATIV or IR3_REG_ARRAY movs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Neil Roberts
125f867d3d nir/opcodes: Add nir_op_f2fmp
This opcode is the same as the f2f16 opcode except that it comes with
a promise that it is safe to optimise it out if the result is
immediately converted back to a 32-bit float again. Normally this
would be a lossy conversion and so it would be visible to the
application, but if the conversion is generated as part of the mediump
lowering process then this removal doesn’t matter. The opcode is
eventually replaced with a regular f2f16 in the late optimisations so
the backends don’t need to handle it.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Indrajit Kumar Das
18124d7278 glapi/copyimage: Implement CopyImageSubDataNV
Implement CopyImageSubDataNV from NV_copy_image spec.
This is derived out of the existing implementation of CopyImageSubData.
It differs from CopyImageSubData in accordance with the differences
laid down in the ARB_copy_image spec.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3649>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3649>
2020-02-24 16:31:06 +00:00
Chris Wilson
ae7bda27a0 iris: Fix import sync-file into syncobj
When importing a sync-file, the kernel expects to be told which syncobj
to replace with the new fence -- it does not automatically create a new
handle for us. Abide by this rule and create a new syncobj for the
imported sync-file.

Fixes: f459c56be6 ("iris: Add fence support using drm_syncobj")
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3919>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3919>
2020-02-24 15:43:19 +00:00
Alyssa Rosenzweig
3a310fbd0b pan/midgard: Implement load/store_shared
Shared memory is implemented almost identically to global memory from an
ISA perspective, so let's handle the new intrinsics. We include a code
path for constant offsets, which doesn't come up for globals.

Fixes dEQP-GLES31.functional.compute.basic.shared_var_single_invocation

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>
2020-02-24 13:56:59 +00:00
Alyssa Rosenzweig
fcbb3d422e pan/midgard: Implement nir_intrinsic_get_buffer_size
We route it as a sysval. Fixes dEQP-GLES31.functional.compute.basic.ssbo_unsized_arr_single_invocation

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>
2020-02-24 13:56:59 +00:00
Alyssa Rosenzweig
3148937ef7 pan/midgard: Lower SSBOs in NIR
We need to lower SSBOs to globals regardless. Rather than do this in our
backend like we do now, use the common NIR pass, which will support
bounds checking.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>
2020-02-24 13:56:59 +00:00
Eduardo Lima Mitev
99f2b6144b turnip/pipeline: Don't assume tu_shader is a valid object
Fixes a crash in tu6_emit_fs_config() when 'shader' argument is
assumed to be non-null, which is possible.

Fixes dEQP test:

dEQP-VK.api.descriptor_set.descriptor_set_layout_lifetime.graphics

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3756>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3756>
2020-02-24 12:20:20 +00:00
Samuel Pitoiset
12a22da683 radv: add the trace BO to the BO list at submit time
Instead of adding it in every command buffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3891>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3891>
2020-02-24 12:43:53 +01:00
Krzysztof Raszkowski
5e9a2c603f gallium/swr: Fix min/max range index draw
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3905>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3905>
2020-02-24 10:27:23 +00:00
Kenneth Graunke
4d57a27504 iris: Set MOCS for constant packets on Gen12+
It seems to be back, and we shouldn't use 0, as that's now considered
an error.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
2020-02-21 16:44:55 -08:00
Kenneth Graunke
4bac2fa3c6 iris: Fix BLORP vertex buffers to respect ISL MOCS settings
Fixes: a4da6008b6 ("iris: Use mocs from isl_dev.")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
2020-02-21 16:44:53 -08:00
Kenneth Graunke
1cdf5abdfa iris: Make mocs an inline helper in iris_resource.h
Now that it uses ISL rather than genxml code, there's no need for it to
live as a vtable function inside the state module.  We can just make it
a static inline helper in iris_resource.h so it's available throughout
the codebase.

Fixes: a4da6008b6 ("iris: Use mocs from isl_dev.")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
2020-02-21 16:44:38 -08:00
Eric Anholt
f8ab00776c ci: Remove a useless filtering of the lava logs.
We don't print every case any more, so no need to filter them out.  This
makes it so the output form "lavacli jobs logs" gets line-buffered into
"tee" and you can actually see what happened when the job is stuck but
before it times out.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Eric Anholt
7f3f9b2b19 ci: Don't bother generating deqp junit results since we don't present it.
We disabled presentation a while back because it's so expensive for gitlab
to parse it on the other side.  We may have a use for it some day if
gitlab gets better, but for now let's not spend the time processing it.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Eric Anholt
4c372d384a ci: Document how LAVA runners work.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Eric Anholt
994e258122 ci: Make LAVA job fails emit the full list of unexpected test results.
When bringing up a new board or starting a new GLES version, we have a lot
of unexpected fails to document, so we need the full list in the log (not
just deqp-runner.sh's head -n 50) so we can populate the xfail list.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Eric Anholt
54dbb55ea8 ci: Make sure that we have a proper shell prompt for LAVA.
LAVA finds a '#' early in boot and races to emit its shell commands.
Apparently for the current boards those serial commands end up getting
buffered such that things work out, but for db410c and db820c, the buffer
is lost and LAVA gets stuck waiting for the prompt.  By setting a prompt,
we can delay our commands until we're actually supposed to emit them (and
suppress a complaint from the lava dispatcher that we're using a risky
prompt!)

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Eric Anholt
985343e71a ci: prepare-artifacts: Make the indent here match previously in the file
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Caio Marcelo de Oliveira Filho
89a3856714 anv: Add pipe_state_for_stage() helper
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>
2020-02-21 13:09:44 -08:00
Caio Marcelo de Oliveira Filho
7df5d36078 anv: Use intel_debug_flag_for_shader_stage()
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>
2020-02-21 13:09:44 -08:00
Caio Marcelo de Oliveira Filho
f58b384fbe spirv: Be consistent when checking for Shader/Kernel
Use == and != instead of the ordered comparisons.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>
2020-02-21 13:09:44 -08:00
Arcady Goldmints-Orlov
5f3cbbd958 spirv: Remove outdated SPIR-V decoration warnings
spirv_to_nir warns if it encounters XFB decorations and errors if
it encounters a Stream decoration with value other than 0, despite
the fact that these decorations are in fact handled correctly.

Fixes dEQP-VK.transform_feedback.simple.query_1_*
Fixes: cd4a14be06 "spirv: Handle XFB variable decorations"

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3910>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3910>
2020-02-21 20:34:03 +00:00
Jason Ekstrand
1598370aca nir/builder: Return an integer from nir_get_texture_size
It's convenient in a bunch of cases for nir_get_texture_size to return a
float but it's very unexpected.  This fixes a bug in the R600 NIR code.

Fixes: f718ac6268 "r600/sfn: Add a basic nir shader backend"
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3897>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3897>
2020-02-21 18:48:03 +00:00
Jason Ekstrand
265e234e23 nir: Fix the nir_builder include path for nir_builtin_builder
Because it's in double-quotes, it will search the current folder before
any search paths.  Since nir_builder.h and nir_builtin_builder.h are in
the same folder, this guarantees a correct include.  However,
nir/nir_builder.h does not unless the includer's path is set up just
right.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3897>
2020-02-21 18:48:03 +00:00
Michel Dänzer
f5a8958910 util: Change os_same_file_description return type from bool to int
This allows communicating that it wasn't possible to determine whether
the two file descriptors reference the same file description. When
that's the case, log a warning in the amdgpu winsys.

In turn, remove the corresponding debugging output from the fallback
os_same_file_description implementation. It depends on the caller if
false negatives are problematic or not.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3879>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3879>
2020-02-21 17:10:48 +01:00
Michel Dänzer
228cbdfe67 winsys/amdgpu: Make local variable r signed
This is consistent with the return type of the functions whose return
values we assign to it.

No functional change intended.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3879>
2020-02-21 17:09:05 +01:00
Karol Herbst
87365e263e nir/lower_ssbo: handle atomics
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2753>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2753>
2020-02-21 13:06:22 +00:00
Alyssa Rosenzweig
7ab4e4dd96 nir: Add SSBO->global lowering pass
To facilitate lowering SSBOs to globals, we need a load_ssbo_address
intrinsic. This intrinsic takes an SSBO index and loads the address in
global memory of the SSBO (likely implemented via a uniform in the
driver). In the future, we'll support bounds checking, but at the moment
this is not supported (this pass should only be used for trusted
contexts at the moment, i.e. contexts without robustness extensions).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2753>
2020-02-21 13:06:22 +00:00
Alyssa Rosenzweig
b929565ea8 panfrost: Rewrite texture descriptor creation logic
Rather than creating partially within the Gallium create function and
monkeypatching on draw time with code split across N different files
with tight Gallium dependencies, let's streamline everything into a
series of maintainable routines in mesa/src/panfrost with no Gallium
dependencies, doing the entire texture creation in one-shot and thus
adding absolutely zero draw-time overhead (since we can allocate a BO
for the descriptor and upload ahead-of-time, so switching textures is as
cheap as switching pointers).

Was this worth it? You know, I'm not sure :|

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>
2020-02-21 07:27:05 -05:00
Alyssa Rosenzweig
ad44f587a8 panfrost: Move format translation to root
Since PIPE formats are now shared across Mesa we can do this, and the
routines themselves are good enough code that I'm happy to move them
here. We'll use them momentarily.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>
2020-02-21 07:27:03 -05:00
Alyssa Rosenzweig
58f14018b4 panfrost: Move pan_afbc.c to root
Now that PIPE formats are shared across Mesa, this well-documented piece
of code is a good fit for root panfrost, let's move it and get a little
closer to taming the mess of resources.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>
2020-02-21 07:27:01 -05:00
Alyssa Rosenzweig
5ddf7ad9d2 panfrost: Move checksum routines to root panfrost
These are Gallium-independent and clean code; as is tradition, let's
hoist them up out of the Gallium driver as a bit of yak shaving as we
prepare to untangle the monster that is pan_resource.c

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>
2020-02-21 07:26:52 -05:00
Erik Faye-Lund
2e3318b151 util: promote u_debug_memory.c to src/util
When os_memory_debug.h was promoted to src/util, this source-file on
which it depends on when the debug-flag is set on windows was left
out. So let's move this also.

It doesn't seem there's any way of triggering this issue right now, but
it seems better to correct this to avoid this from biting us in the ass
in the future.

Fixes: 88c4680b5a ("util: promote u_memory to src/util")
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3844>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3844>
2020-02-21 10:32:19 +01:00
Vasily Khoruzhick
8021daeb1f lima: implement PLB PP stream cache
Generating PLB PP stream is expensive. PLB PP stream content depends on
damage, and if damage consists of several rects it's impossible to come
up with a simple key.

Simplify damage to a single bounding box so we have a simple key
and cache PLB PP stream. Cache size is limited to 0.1% of system RAM and
once limit is reached least recently used entries are dropped.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3834>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3834>
2020-02-21 07:20:20 +00:00
Dylan Baker
7edde3d26b docs: Update index, relnotes, and release-calendar for 20.0
This includes the release schedule for 20.0.x. Currently there are four
planned releases, but I assume we'll need more before 20.1.0 is ready.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3896>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3896>
2020-02-20 14:15:37 -08:00
Dylan Baker
0ada39f37a Docs: Add 20.0.0 release notes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3896>
2020-02-20 14:04:20 -08:00
Samuel Pitoiset
740cb3d193 radv: use RADEON_FLAG_ZERO_VRAM when creating the trace BO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3888>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3888>
2020-02-20 18:47:34 +01:00
Samuel Pitoiset
37650bf938 radv/winsys: add a new flag that requests zerovram allocations
This introduces RADON_FLAG_ZERO_VRAM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3888>
2020-02-20 18:47:29 +01:00
Roland Scheidegger
7a73446c51 gallivm: fix crash in emit_get_buffer_size
Seems a bit odd we extract a value from a vector in the first place
(as we always extract the first element), but llvm asserts if using
a zero-vector instead of zero as the index element.
Fixes piglit crashes for example in arb_shader_storage_buffer_object-layout-std140-write-shader.

Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3886>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3886>
2020-02-20 17:32:54 +00:00
Roland Scheidegger
1b610aab58 gallivm: fix crash with bptc border color sampling
bptc uses fallback for decoding, but still need to handle border color
properly.

v2: adjust piglit gitlab-ci expectations

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3886>
2020-02-20 17:32:54 +00:00
Rhys Perry
8291d728dc aco: improve GFX9 1D ddx/ddy assertion
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2547
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3890>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3890>
2020-02-20 15:41:26 +00:00
Alyssa Rosenzweig
cc3d29c6e7 pan/midgard: Identify clamp(x, -1.0, 1.0) flag
So *that's* what's .unk2 was about :)

We still need to add an opt pass for it, but we can do that further down
the line.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3892>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3892>
2020-02-20 13:34:18 +00:00
Alyssa Rosenzweig
0263d2793c panfrost: Remove flush_frontbuffer
A relic from software rasterizers. Hardware drivers generally don't need
to implement this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3878>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3878>
2020-02-20 13:04:52 +00:00
Icecream95
068806c9f6 panfrost: LogicOp support
The generated shaders are definitely not optimal, but for a feature
hardly anyone uses, it's probably good enough.

The XScreensaver demos quasicrystal, blitspin, bouboule, crystal and
munch now seem to work, with no obvious problems.

Currently this only works for 8-bit textures.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3887>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3887>
2020-02-20 07:41:54 -05:00
Danylo Piliaiev
5bfd363be4 i965: Do not generate D16 B5G6R5_UNORM configs on gen < 8
We don't support MESA_FORMAT_Z_UNORM16 before Gen8, see
intel_screen_init_surface_formats.

As a consequence disables B5G6R5_UNORM configs with depth
on gen < 6.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2275
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3206>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3206>
2020-02-20 11:14:44 +00:00
Alexandros Frantzis
803ab5d6be gitlab-ci: Automated testing with OpenGL traces
Introduce automated testing of Mesa by replaying traces with Renderdoc
or Apitrace.

For now only LLVMPipe is tested, but other drivers can be tested if
there's runners with the necessary hardware.

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2935>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2935>
2020-02-20 08:06:13 +01:00
Tomeu Vizoso
50f1950ac0 gitlab-ci: Disable the lima job for now
Some dEQP tests have started passing and it's taking a while to update
the expectations and skips list.

Disable for now so CI doesn't fail and stuff can be merged.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2935>
2020-02-20 08:06:08 +01:00
Marek Olšák
f7bfb10c69 util: remove the dependency on kcmp.h
Fixes: f76cbc7901 "util: Add os_same_file_description helper"

Acked-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3860>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3860>
2020-02-20 00:15:23 +00:00
Ian Romanick
273b8cd1ca intel/fs: Correctly handle multiply of fsign with a source modifier
The other source of the multiply will be interpreted as a uint32_t in an
XOR instruction.  Any source modifiers with either not be interpreted at
all or will be misinterpreted due to the differing types.

If the other operand of the multiplication has a source modifier, just
emit an extra move to resolve the source modifiers.

The negation source modifier problem is difficult to reproduce due to an
algebraic optimization that changes (-a*b) to -(a*b).  However, changes
in MR !1359 push the negations back down.

On Gen7+ it might be possible to do slightly better for an abs() source
modifier by using BFI2 as a glorified copysign().

On Gen8+ it might be possible to do slightly better for a neg() source
modifier by emitting (~a ^ b).

There were no shader-db changes on any Intel platform, so I think we can
deal with that problem when it arises.

See also piglit!224.

Fixes: 06d2c11641 ("intel/fs: Add a scale factor to emit_fsign")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3780>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3780>
2020-02-19 23:51:42 +00:00
Thong Thai
c81aa15d64 gallium/auxiliary/vl: fix bob compute shaders for deint yuv
Scales the Y-axis by 2 when using the Bob deinterlace filter.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2523
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3857>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3857>
2020-02-19 23:23:07 +00:00
Bas Nieuwenhuizen
68d1757420 radeonsi: Fix compute copies for subsampled formats.
We cannot do image stores (or render) to subsampled formats.

Reinterpret as R32_UINT instead.

si_set_shader_image_desc already uses the blockwidth from
the view formats, so the image width adjustments are
already implemented.

This is still icky with mipmapping on GFX9+ though, but
since it is mostly a video format I don't think that will
be much of an issue and broken mipmapping is still better
than broken everything.

Fixes: e5167a9276 "radeonsi: disable SDMA on gfx8 to fix corruption on RX 580"
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2535
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853>
2020-02-19 22:51:12 +00:00
Jonathan Marek
d795eb207f turnip: add option to force use of hw binning
For running deqp tests which have small render sizes and don't otherwise
get coverage of hw binning / multiple tiles.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3851>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3851>
2020-02-19 22:24:44 +00:00
Dylan Baker
97a590af21 docs: Mark 20.0.0-rc3 as done
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>
2020-02-19 20:05:38 +00:00
Dylan Baker
772d60385c docs: Mark 19.3.4 as done
The calendar had an error, 19.3.4 and 19.3.5 had the same release date.
I've fixed the date for 19.3.5 and removed 19.3.6 which I don't believe
will be needed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>
2020-02-19 20:05:38 +00:00
Dylan Baker
288e9fd295 docs: Add SHA256 sum for 19.3.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>
2020-02-19 20:05:38 +00:00
Dylan Baker
3238f4c3ab docs: Add release notes for 19.3.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>
2020-02-19 20:05:38 +00:00
Chad Versace
d8fe9e045f anv: Drop anv_image.c:get_surface()
It was called exactly once, and even there it returned the wrong surface
in a corner case.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3882>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3882>
2020-02-19 19:41:05 +00:00
Ian Romanick
58bdc1c748 nir/search: Use larger type to hold linearized index
"index" is an offset into a linearized 3-dimensional array.  Starting
with fbd5359a0a, the 3-dimensional array can have 43 elements in each
dimension.  43**3 = 79507, and that will overflow the uint16_t.

See also the discussion in MR !3765.

Fixes: fbd5359a0a ("nir/algebraic: Rearrange bcsel sequences generated by nir_opt_peephole_select")
Suggested-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3871>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3871>
2020-02-19 19:07:34 +00:00
Marek Olšák
912ee82521 gallium/util: remove unused u_surfaces.c/h
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>
2020-02-19 18:34:33 +00:00
Kristian H. Kristensen
360ffdf4e2 main/get: Converted type conversion macros to inline functions
Quiet warnings when called with a GLubyte:

  src/mesa/main/get.c:3215:19: warning: result of comparison of constant 32767 with expression of type 'GLubyte' (aka 'unsigned char') is always false [-Wtautological-constant-out-of-range-compare]
      params[0] = INT_TO_FIXED(((GLubyte *) p)[0]);
                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  src/mesa/main/get.c:78:38: note: expanded from macro 'INT_TO_FIXED'
                                 ~~~ ^ ~~~~~~~~

Delete ENUM_TO_INT64, ENUM_TO_FIXED and BOOLEAN_TO_INT64 which aren't
used.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>
2020-02-19 18:34:33 +00:00
Kristian H. Kristensen
f1dc4c9554 Mark a few static inline helpers with ASSERTED
Quiet warnings in release builds where these look unused.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>
2020-02-19 18:34:33 +00:00
Ian Romanick
d46a5cfe78 mesa/draw: Make sure all the unused fields are initialized to zero
Not initializing prim.indexed caused a few thousand failures on Intel
drivers.

I also compared the generated assembly with this change and before
a6d3158909.  The code is still somewhat improved, which I am assuming
was the original goal. _mesa_DrawArrays, for example, appears to drop an
instruction or two... though the body of the function is only one byte
shorter.

MR !3591 will eventually delete the uninitialized fields.  However, I
believe that explicitly initializing the whole thing is more future
proof.  This ensures that if someone adds fields in the future, they
will also be initialized.  Once the extra fields are removed, the two
implementations should generate idential code.

Fixes: a6d3158909 ("mesa: don't use memset in glDrawArrays")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3870>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3870>
2020-02-19 10:07:47 -08:00
Mathias Fröhlich
6edbb3c6d0 mesa: Fix FLUSH_VERTICES in SubpixelPrecisionBiasNV.
The FLUSH_VERTICES macro is supposed to be called before the current
context state is changed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2020-02-19 15:51:25 +01:00
Alyssa Rosenzweig
d3160a6177 panfrost: Remove old hack
I don't know why I thought this was needed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>
2020-02-19 08:02:03 -05:00
Alyssa Rosenzweig
7f6f419be9 panfrost: Remove old comment
We already handle primitive restart earlier in the function.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>
2020-02-19 08:01:59 -05:00
Alyssa Rosenzweig
aed052f703 panfrost: Remove dirty tracking
We never really respected it and it doesn't quite make sense for Mali
the way it was previously setup. The correct solution is to do push as
much code into CSO creation as possible.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>
2020-02-19 08:01:46 -05:00
Rhys Perry
fe5c5507bd aco: add some helpers for filling/testing register ranges
We do this a lot

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3768>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3768>
2020-02-19 12:23:50 +00:00
Rhys Perry
43497e30e2 aco: add RegisterFile
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3768>
2020-02-19 12:23:50 +00:00
Michel Dänzer
7e6010106f st/vdpau: Only call is_video_format_supported hook if needed
Namely only if *is_supported is true, otherwise the hook result can't
affect it.

Avoids

../src/gallium/state_trackers/vdpau/vdpau_private.h:138: FormatYCBCRToPipe: Assertion `0' failed.

with assertions enabled.

Fixes: 5d5b414a7b "st/vdpau: fix chroma_format handling in
                     VideoSurfaceQueryGetPutBitsYCbCrCapabilities"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3848>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3848>
2020-02-19 12:41:08 +01:00
Danylo Piliaiev
72154237fb iris: Do not dereference nullptr with pipe_reference
../src/gallium/drivers/iris/iris_fence.h:54:8: runtime error: member access within null pointer of type 'struct iris_syncpt'

../src/gallium/drivers/iris/iris_fence.c:136:8: runtime error: member access within null pointer of type 'struct pipe_fence_handle'

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Danylo Piliaiev
d800bcd9b9 glsl/blob: Do not call memcpy if there is nothing to copy
../src/util/blob.c:166:7: runtime error: null pointer passed as argument 2, which is declared to never be null
    #0 0x7fe51bc315df in blob_write_bytes ../src/util/blob.c:166
    #1 0x7fe51c7a7b9a in iris_disk_cache_store ../src/gallium/drivers/iris/iris_disk_cache.c:115
    #2 0x7fe51c7f444d in iris_compile_fs ../src/gallium/drivers/iris/iris_program.c:1693
    #3 0x7fe51c7fdcd9 in iris_create_fs_state ../src/gallium/drivers/iris/iris_program.c:2331
    #4 0x7fe519e871a3 in st_create_fp_variant ../src/mesa/state_tracker/st_program.c:1275
    #5 0x7fe519e89dd0 in st_get_fp_variant ../src/mesa/state_tracker/st_program.c:1435
    #6 0x7fe519ed51e1 in st_update_fp ../src/mesa/state_tracker/st_atom_shader.c:163
    #7 0x7fe519eb5d73 in st_validate_state ../src/mesa/state_tracker/st_atom.c:261
    #8 0x7fe519e4e0bf in prepare_draw ../src/mesa/state_tracker/st_draw.c:132
    #9 0x7fe519e4e76e in st_draw_vbo ../src/mesa/state_tracker/st_draw.c:184
    #10 0x7fe51aca5245 in vbo_save_playback_vertex_list ../src/mesa/vbo/vbo_save_draw.c:215
    #11 0x7fe51a25b1cc in ext_opcode_execute ../src/mesa/main/dlist.c:1126
    #12 0x7fe51a2f8d58 in execute_list ../src/mesa/main/dlist.c:11830
    #13 0x7fe51a34b2d0 in _mesa_CallList ../src/mesa/main/dlist.c:14267

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Danylo Piliaiev
7685f48ece intel/bufmgr: Cast bitshift to unsigned
../src/mesa/drivers/dri/i965/intel_buffer_objects.c:405:4: runtime error: left shift of 255 by 24 places cannot be represented in type 'int'
    #0 0x7f9404ac4ae1 in brw_map_buffer_range ../src/mesa/drivers/dri/i965/intel_buffer_objects.c:405
    #1 0x7f9405a9cb13 in vbo_save_map_vertex_store ../src/mesa/vbo/vbo_save_api.c:261
    #2 0x7f9405b6a89d in vbo_save_NewList ../src/mesa/vbo/vbo_save_api.c:1774
    #3 0x7f94051aba3d in _mesa_NewList ../src/mesa/main/dlist.c:14172

../src/gallium/drivers/iris/iris_resource.c:1725:61: runtime error: left shift of 255 by 24 places cannot be represented in type 'int'
    #0 0x7fe51c820c8e in iris_map_direct ../src/gallium/drivers/iris/iris_resource.c:1725
    #1 0x7fe51c82322c in iris_transfer_map ../src/gallium/drivers/iris/iris_resource.c:1895
    #2 0x7fe5202628be in u_transfer_helper_transfer_map ../src/gallium/auxiliary/util/u_transfer_helper.c:243
    #3 0x7fe51997c508 in pipe_buffer_map_range ../src/gallium/auxiliary/util/u_inlines.h:344
    #4 0x7fe51997ec8d in u_upload_alloc_buffer ../src/gallium/auxiliary/util/u_upload_mgr.c:221
    #5 0x7fe51997f24f in u_upload_alloc ../src/gallium/auxiliary/util/u_upload_mgr.c:254
    #6 0x7fe51ccf43af in upload_state ../src/gallium/drivers/iris/iris_state.c:323
    #7 0x7fe51d06963a in gen9_init_state ../src/gallium/drivers/iris/iris_state.c:7516
    #8 0x7fe51c7c2ea0 in iris_create_context ../src/gallium/drivers/iris/iris_context.c:294
    #9 0x7fe519dc729b in st_api_create_context ../src/mesa/state_tracker/st_manager.c:921
    #10 0x7fe5198c47ea in dri_create_context ../src/gallium/state_trackers/dri/dri_context.c:161
    #11 0x7fe519898aac in driCreateContextAttribs ../src/mesa/drivers/dri/common/dri_util.c:475

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Danylo Piliaiev
d5931f285b intel/compiler: Do not qsort zero sized array
../src/intel/compiler/brw_nir_analyze_ubo_ranges.c:316:4: runtime error: null pointer passed as argument 1, which is declared to never be null
    #0 0x7f78f5916611 in brw_nir_analyze_ubo_ranges ../src/intel/compiler/brw_nir_analyze_ubo_ranges.c:316
    #1 0x7f78f255c189 in brw_codegen_wm_prog ../src/mesa/drivers/dri/i965/brw_wm.c:97
    #2 0x7f78f2565571 in brw_fs_precompile ../src/mesa/drivers/dri/i965/brw_wm.c:608
    #3 0x7f78f24edd2c in brw_shader_precompile ../src/mesa/drivers/dri/i965/brw_link.cpp:56
    #4 0x7f78f24f3af8 in brw_link_shader ../src/mesa/drivers/dri/i965/brw_link.cpp:381
    #5 0x7f78f39a302a in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3119
    #6 0x7f78f3a43826 in create_new_program ../src/mesa/main/ff_fragment_shader.cpp:1133
    #7 0x7f78f3a43d00 in _mesa_get_fixed_func_fragment_program ../src/mesa/main/ff_fragment_shader.cpp:1163
    #8 0x7f78f325ddcd in update_program ../src/mesa/main/state.c:134
    #9 0x7f78f325fe64 in _mesa_update_state_locked ../src/mesa/main/state.c:360
    #10 0x7f78f32600f1 in _mesa_update_state ../src/mesa/main/state.c:394
    #11 0x7f78f2b3e587 in clear ../src/mesa/main/clear.c:169
    #12 0x7f78f2b3e587 in _mesa_Clear ../src/mesa/main/clear.c:242

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Danylo Piliaiev
d596795d4d brw_fs: Avoid zero size vla
../src/intel/compiler/brw_fs.cpp:2247:46: runtime error: variable length array bound evaluates to non-positive value 0
    #0 0x7f78f5697678 in fs_visitor::assign_constant_locations() ../src/intel/compiler/brw_fs.cpp:2247
    #1 0x7f78f571d29e in fs_visitor::optimize() ../src/intel/compiler/brw_fs.cpp:7361
    #2 0x7f78f574eb84 in fs_visitor::run_fs(bool, bool) ../src/intel/compiler/brw_fs.cpp:8022
    #3 0x7f78f575641b in brw_compile_fs ../src/intel/compiler/brw_fs.cpp:8408
    #4 0x7f78f255c8e4 in brw_codegen_wm_prog ../src/mesa/drivers/dri/i965/brw_wm.c:123
    #5 0x7f78f2565571 in brw_fs_precompile ../src/mesa/drivers/dri/i965/brw_wm.c:608
    #6 0x7f78f24edd2c in brw_shader_precompile ../src/mesa/drivers/dri/i965/brw_link.cpp:56
    #7 0x7f78f24f3af8 in brw_link_shader ../src/mesa/drivers/dri/i965/brw_link.cpp:381
    #8 0x7f78f39a302a in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3119
    #9 0x7f78f3a43826 in create_new_program ../src/mesa/main/ff_fragment_shader.cpp:1133
    #10 0x7f78f3a43d00 in _mesa_get_fixed_func_fragment_program ../src/mesa/main/ff_fragment_shader.cpp:1163
    #11 0x7f78f325ddcd in update_program ../src/mesa/main/state.c:134
    #12 0x7f78f325fe64 in _mesa_update_state_locked ../src/mesa/main/state.c:360
    #13 0x7f78f32600f1 in _mesa_update_state ../src/mesa/main/state.c:394
    #14 0x7f78f2b3e587 in clear ../src/mesa/main/clear.c:169
    #15 0x7f78f2b3e587 in _mesa_Clear ../src/mesa/main/clear.c:242

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Danylo Piliaiev
d4e395a27d brw_nir: Cast bitshift to unsigned
../src/intel/compiler/brw_nir.c:979:40: runtime error: left shift of 1 by 31 places cannot be represented in type 'int'
    #0 0x7f78f590d10b in brw_nir_apply_sampler_key ../src/intel/compiler/brw_nir.c:979
    #1 0x7f78f590e07b in brw_nir_apply_key ../src/intel/compiler/brw_nir.c:1057
    #2 0x7f78f5754b45 in brw_compile_fs ../src/intel/compiler/brw_fs.cpp:8347
    #3 0x7f78f255c8e4 in brw_codegen_wm_prog ../src/mesa/drivers/dri/i965/brw_wm.c:123
    #4 0x7f78f2565571 in brw_fs_precompile ../src/mesa/drivers/dri/i965/brw_wm.c:608
    #5 0x7f78f24edd2c in brw_shader_precompile ../src/mesa/drivers/dri/i965/brw_link.cpp:56
    #6 0x7f78f24f3af8 in brw_link_shader ../src/mesa/drivers/dri/i965/brw_link.cpp:381
    #7 0x7f78f39a302a in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3119
    #8 0x7f78f3a43826 in create_new_program ../src/mesa/main/ff_fragment_shader.cpp:1133
    #9 0x7f78f3a43d00 in _mesa_get_fixed_func_fragment_program ../src/mesa/main/ff_fragment_shader.cpp:1163
    #10 0x7f78f325ddcd in update_program ../src/mesa/main/state.c:134
    #11 0x7f78f325fe64 in _mesa_update_state_locked ../src/mesa/main/state.c:360
    #12 0x7f78f32600f1 in _mesa_update_state ../src/mesa/main/state.c:394
    #13 0x7f78f2b3e587 in clear ../src/mesa/main/clear.c:169
    #14 0x7f78f2b3e587 in _mesa_Clear ../src/mesa/main/clear.c:242

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Samuel Pitoiset
82913bac14 docs/envvars: document RADV_TEX_ANISO
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2524
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3873>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3873>
2020-02-19 08:46:03 +01:00
Eric Anholt
72f7d3d5b0 gallium: Only define PIPE_ALIGNSTACK on x86.
At least arm and arm64 don't respect this attribute, producing compiler
warnings in lp_test_format.c.  The gcc and LLVM docs for the attribute
only talk about them being needed on x86.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
427870abfd llvmpipe: Fix another uninitialized value warning, on init_val.
It's only used in the vote_ieq paths, but gcc doesn't see that.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
81225e1f03 llvmpipe: Silence uninitialized variable warning about "scissor"
nr_planes is only > 3 when scissor is enabled, but gcc doesn't see it.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
dc8c5af99b llvmpipe: Silence uninitialized variable warning about "vals"
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
d8d34238a6 llvmpipe: Fix warning about uninitialized "op" in the NIR path.
Similar to TGSI, move the switch statement and use more unreachable().

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
b32bd704c0 llvmpipe: Silence uninitialized variable warning about "chan"
Both arms of an if define it, but gcc doesn't notice.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
ce611935df llvmpipe: Silence "possibly uninitialized value" warning for ssbo_limit.
The condition for the use matches the def, but you can't trust a compiler
to notice.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
45b2ccc6b3 llvmpipe: Fix real uninitialized use of "atype" for SEMANTIC_FACE
Fixes: 502548a09c ("gallivm/llvmpipe: add support for front facing in sysval.")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
13a276ed3b radv: Squelch possibly-undefined warning
The same condition is used in the def as in the use, but gcc wasn't
figuring it out.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:35:32 -08:00
Eric Anholt
1427f666dc ci: Extend the a630 flake list to reduce spurious failures.
These are the tests I've seen flake twice while logged in to the IRC
channel this year.  Also include fragment_out.random.5 which fully
spuriously failed recently.

Closes: #2516
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3862>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3862>
2020-02-18 22:40:33 +00:00
Marek Olšák
2e05a280b6 mesa: fix immediate mode with tessellation and varying patch vertices
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:47:30 -05:00
Marek Olšák
a6d3158909 mesa: don't use memset in glDrawArrays
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:46:55 -05:00
Marek Olšák
ee549c6766 mesa: document _mesa_prim::begin/end
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:45:50 -05:00
Marek Olšák
c9246282b7 vbo: remove redundant code in vbo_exec_fixup_vertex
Callers of this function also set FLUSH_STORED_VERTICES for attr == 0.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:45:34 -05:00
Marek Olšák
3eeeb86cb0 vbo: remove dead code in vbo_can_merge_prims
This is only used by immediate mode and the values are immutable.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:45:34 -05:00
Marek Olšák
2491a2ddeb st/mesa: try to fix MSVC build failure due to ALWAYS_INLINE
Fixes: 11db8e0e00 ("st/mesa: optimize st_update_array with ALWAYSINLINE")
Tested-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:45:34 -05:00
Rob Clark
06dc280a57 freedreno/registers: cleanup CP_SET_MARKER
1) Name RM6_COMPUTE, and rename RM6_ENDVIS (from RM6_BLIT) to better
   reflect what it actually does
2) Cleanup open-coded mode enum values
3) Removed unused 0x10

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3833>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3833>
2020-02-18 20:52:42 +00:00
Rob Clark
7b4d6bb1ec freedreno: quiet INFO_MSG
Probably not useful unless LIBGL_DEBUG is set to something.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3833>
2020-02-18 20:52:42 +00:00
Rob Clark
838ed2885d freedreno/a6xx: few register updates
Nothing used by mesa, but crashdec tool uses a few of these.  And since
the practice is these days to sync mesa->envytools, adding these on the
mesa side first.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3833>
2020-02-18 20:52:42 +00:00
Rob Clark
4fc31e7d33 freedreno/registers: teach gen_header.py about a3xx_regid
This is a builtin type (treated as uint, but with special type-aware
decoding) in envytools/cffdump.  Lets teach gen_header.py about it and
drop the enum hack in the xml so I don't have to keep deleting the enum
when I sync the xml back to the freedreno envytools tree.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3833>
2020-02-18 20:52:42 +00:00
Eric Engestrom
ecca5ef6c3 meson: explicitly disallow unsupported build directory layout
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2512
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3832>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3832>
2020-02-18 20:05:03 +00:00
Caio Marcelo de Oliveira Filho
79788b8f7f intel/gen12: Take into account opcode when decoding SWSB
The interpretation of the fields is different depending whether the
instruction is a SEND/MATH or not.

This fixes the disassembly output for non-SEND/MATH instructions that
have both in-order and out-of-order dependencies.  Their dependencies
were wrongly represented as `@A $B` when the correct would be `@A
$B.dst`.

Fixes: 6154cdf924 ("intel/eu/gen12: Add auxiliary type to represent SWSB information during codegen.")
Fixes: 83612c0127 ("intel/disasm/gen12: Disassemble software scoreboard information.")
Acked-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3660>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3660>
2020-02-18 09:17:51 -08:00
Alyssa Rosenzweig
bee5c9b0dc panfrost: Remove enum panfrost_memory_layout
It duplicates mali_texture_layout. Let's use the native hardware enum
and spare a pointless translation.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3854>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3854>
2020-02-18 16:20:56 +00:00
Caio Marcelo de Oliveira Filho
28e94e0a94 radv: Advertise VK_KHR_shader_non_semantic_info
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3856>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3856>
2020-02-18 09:57:17 -06:00
Caio Marcelo de Oliveira Filho
8004cb256a anv: Advertise VK_KHR_shader_non_semantic_info
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3856>
2020-02-18 09:57:15 -06:00
Jason Ekstrand
2dae89ac36 vulkan: Update the XML and headers to 1.2.133
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3856>
2020-02-18 09:57:14 -06:00
Alyssa Rosenzweig
7d3c48f131 panfrost: Debitfieldize mali_uniform_buffer_meta
It fits snugly in a u64, just give a macro for direct computation rather
than fudging around with bitfields. Not sure if this actually matters
with well-optimized compilers but it makes the code subjectively cleaner
so it's worth it for that if nothing else.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3838>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3838>
2020-02-18 14:44:08 +00:00
Alyssa Rosenzweig
027944c7c8 panfrost: Avoid reading GPU memory when packing vertices
These occurred unintentionally as a byproduct of bitfields, etc. Whoops.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3838>
2020-02-18 14:44:08 +00:00
Alyssa Rosenzweig
4c52e16c9c panfrost: Cleanup transfer_map
A lot of these checks are obsolete since we've started tracking BO
accesses correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3849>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3849>
2020-02-18 14:13:18 +00:00
Alyssa Rosenzweig
308f9cf104 panfrost: Update scoreboarding notes
Our understanding of the set/write value jobs has evolved, so let's
update the rules.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:45:25 -05:00
Alyssa Rosenzweig
88323d1ba0 panfrost: Rewrite scoreboarding routines
Rather than manipulating job descriptor headers as fat pointers (slow)
and using fancy manipulation functions for programatically building the
tree in arbitrary orders (slow and complicated) and then having to do a
topological sort at runtime every frame (slow) which requires traversing
said headers in GPU memory (slow!)... we finally know enough about
the hardware to just get things right the first time, or second for
next_job linking. So rip out all that code and replace it with a much
better routine to create, upload, and queue a job all in one (since now
it's the same operation essentially - which is much better for memory
access patterns, by the way) and most everything falls into place
gracefully according to the rules we've set out. Even wallpapering isn't
*so* terrible if you just... move that one little... giant... hack out
of sight... ahem....

panfrost_scoreboard_link_batch is no longer a bottleneck, mostly because
it no longer exists :-)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:45:21 -05:00
Alyssa Rosenzweig
070bc883d3 panfrost: Print synced traces to stderr
To match the existing behaviour.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:45:18 -05:00
Alyssa Rosenzweig
c46a090942 panfrost: Implement PAN_DBG_SYNC with pandecode/minimal
This way we avoid duplicating job traversal logic.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:45:14 -05:00
Alyssa Rosenzweig
5998646125 pan/decode: Cleanup pandecode_jc
Some of this code is, to put it mildly, impossibly ancient horsedropping
crazy cruft.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:45:09 -05:00
Alyssa Rosenzweig
4122f747ac pan/decode: Add minimal mode
We would like a mode to skip decoding job payloads so we can just
inspect for faults.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:44:59 -05:00
Danylo Piliaiev
b684ba6ce7 st/nir: Unify inputs_read/outputs_written before serializing NIR
Otherwise input/output interfaces won't be unified when reading
NIR from a cache.

Fixes piglit test on iris:
  clip-distance-vs-gs-out.shader_test

Fixes: 19ed12af

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3787>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3787>
2020-02-18 09:18:37 +00:00
Erik Faye-Lund
9903f10636 zink: do not convert bools to/from uint
Since bools are the only 1-bit type, we always know if an SSA-def is a
bool or not. So we don't need to marshal it to uint.

So let's simplify the code a bit here.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
Erik Faye-Lund
4d016de250 zink/spirv: uint -> raw
Similarly to the previous commit, the important bit here is the rawness
of these variables, not the uintness. So let's rename these to reflect
this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
Erik Faye-Lund
7c1a2cbcad zink/spirv: unit_value -> raw_value
The point here isn't that the value is uint, but that is't untreated. So
raw seems more fitting as a description.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
Erik Faye-Lund
16339646f0 zink/spirv: rename functions a bit
The code is about to change so the whole uint-story isn't as true as it
used to be. So let's soften up the semantics a bit here; we only care
about if we're doing a typed ot untyped store here, really.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
Erik Faye-Lund
a6211a4247 zink/spirv: prefer store_dest over store_dest_uint
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
Erik Faye-Lund
7e8f7df800 zink/spirv: do not reinvent store_dest
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
luc
692093fbdc zink: confused compilation macro usage for zink in target helpers.
Fixes: 8d46e35d16 ("zink: introduce opengl over vulkan")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3831>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3831>
2020-02-17 12:21:01 +00:00
Erik Faye-Lund
b7e966dc7f zink: do not report texture-samplers for unsupported stages
This caused the max combined samplers to be reported as artificially
high.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3826>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3826>
2020-02-17 10:00:18 +00:00
Erik Faye-Lund
4a20db70de zink: fix binding-usage
Rewriting the variable bindings is nasty and error-prone, and this code
triggered an assert when trying to resolve API bindings into Vulkan
bindings.

This code still needs some tweaks, but this makes things much better,
and fixes a few bugs where we incorrectly accounted for the
array-indexes.

Fixes: 1c3f4c0704 ("zink: fixup sampler-usage")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3826>
2020-02-17 10:00:18 +00:00
Samuel Pitoiset
c095b7d5bd radv: add a comment about VK_AMD_mixed_attachment_samples on GFX6-GFX7
There is some CTS failures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
2020-02-17 08:33:44 +01:00
Samuel Pitoiset
4159b24be7 radv: enable VK_NV_compute_shader_derivatives on GFX6-GFX7
All Crucible tests pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
2020-02-17 08:33:42 +01:00
Samuel Pitoiset
83dd0cace6 radv: enable VK_EXT_sampler_filter_minmax on GFX6
Works fine.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
2020-02-17 08:33:40 +01:00
Samuel Pitoiset
170c3a8b7b radv: enable shaderStorageImageMultisample on GFX6-GFX7
It was disabled because untested, but CTS is happy with it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
2020-02-17 08:32:26 +01:00
Mathias Fröhlich
c7617d8908 egl: Implement getImage/putImage on pbuffer swrast.
This change adds getImage/putImage callbacks to the swrast pbuffer
loader extension.
This fixes a recent crash with Weston as well as a crashing
test with classic swrast without an official gitlab issue.

v2: Determine bytes per pixel differently and fix non X11 builds.
v3: Plug memory leak and fix crash on out of bounds access.
    (Daniel Stone)
v4: Follow the code structure of the wayland get/put image
    implementation - hopefully being more obvious.
    Handle 64 bits formats.
    Use BufferSize directly.
    (Emil Velikov)
v5: Change pixel size computation.
    (Eric Engestrom)

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2219
Fixes: d6edccee8d "egl: add EGL_platform_device support"
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3711>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3711>
2020-02-17 04:01:37 +00:00
Qiang Yu
6fc0890cd9 lima: rename lima_submit to lima_job
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
57d9a51d45 lima: move dump check to macro for lima_dump_command_stream_print
This can prevent the execution of some function like lima_ctx_buff_va
which is passed in as parameter when no dump case.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
5502bc83b0 lima: enable multi submit optimization
Also provide a debug option to disable it.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
131c505690 lima: optinal flush submit in lima_clear
flush current submit only when there is any draw pending instead of
flush all submits.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
d6ad8e590f lima: use per submit dump file
After multi lima_submit, commands for one lima_submit may not be
flushed when change framebuffer. But we want to track command
stream for one submit, so save dump file for each submit.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
d0dde3de25 lima: move framebuffer info to lima_submit
draw code path does not use framebuffer info, only flush
code path use it now.

Use zsbuf/cbuf in submit instead of context.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
ed117ee630 lima: move clear into submit (v2)
clear info is needed when submit flush and may be changed after
framebuffer switch, so we need to move it into submit.

This also fixes 5 dEQP tests as a side effect: clear info is per
submit so clear value when one submit won't affect next submit.

v2:
remove fixed dEQP test from CI list.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
4b93792274 lima: move damage_rect into lima_submit
damage_rect is preserved across draws.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
a4b048c046 lima: move pp_max_stack_size to lima_submit
pp_max_stack_size is preserved across draws.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
6a5b1c62db lima: move resolve into lima_submit
resolve is preserved across draws.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
7e5abc11f4 lima: move plbu/vs_cmd_array into lima_submit
This information is preserved across draws and needed
when task submission.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
c64994433c lima: track write submits of context (v3)
We need to flush submit which write to the FBO before read it as
texture.

v2:
rename lima_flush_previous_write_submit to
lima_flush_previous_submit_writing_resouce.

v3:
delay add submit to hash_table to lima_update_submit_wb when really
know the render target will be written.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
48fc5f841a lima: make lima_submit one time use drop data (v3)
lima_submit is created by lima_submit_get() in draw/clear functions
and freed after submit to kernel.

There is a hash map to find the same lima_submit for color/depth
buffer combination if user switch framebuffer w/o flush the command
then switch back again.

v2:
rename lima_flush_submit to lima_flush_submit_accessing_bo.

v3:
delay flush access submit to lima_update_submit_wb when really know
if this submit will write to the target buffer.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
545988c617 lima: add lima_submit_get
Replace all usage of "ctx->submit" in draw code path with
lima_submit_get(). This function will create new submit
in the following changes.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
0caefb6d9d lima: use lima_submit_create_stream_bo for plbu/vs_cmd and pp_stack
lima_ctx_buff is used cross function calls in draws. But plbu/vs_cmd
and pp_stack are used immediately after create. And we need to get
rid of "ctx->submit" in the flush code path which exists in
lima_ctx_buff.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
ed8837f946 lima: adjust pp_stream to use lima_submit_create_stream_bo
No need to save the bo, just map and va for use in this submit
is enough.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
e90d8b6e4d lima: add lima_submit_create_stream_bo
For creating stream buffer which is used in single submit
and freed after the submit is passed to kernel driver.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
5c78ba6014 lima: pass submit parameter for functions in lima_submic.c (v2)
"ctx->submit" won't be used directly, so remove the usage in
lima_submit.c by directly passing the submit parameter. And
more data in lima_context will be moved to lima_submit, so
"ctx" will be replaced by "submit" in those functions.

v2:
rename lima_submit_flush to lima_do_submit.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
21a2ce71b1 lima: move flush code to lima_submit.c
Just code move, no content change.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
29c7235507 lima: put hardware related info to lima_gpu.h
For sharing with multi .c files.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
09127641f4 lima: merge gp/pp submit
Use single lima_submit for the submit operation. This is also
for moving more information in lima_context to lima_submit.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
79c65fa56f lima: move syncobj from lima_submit to lima_context
As there will be multi lima_submit per context, move
syncobj out of it.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
b9003111bb lima: add missing resolve check for damage and reload
If color buffer is not touched, we do not need to reload or get
damage region from it.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
47200f5c8d lima: add render target to submit by dirty buffer flags
No need to add un-touched buffer to submit.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
32f1733972 lima: delay plbu head command generation to flush stage (v2)
Prepare for multi submit in which case only know the plb_index when
final flush. Another need for this is proper reload detection: only
when flush stage can we know if need to do reload, because user may
first clear depth, then color individually, so we don't know if need
to pack repload plbu cmd when first clear depth.

v2:
move lima_update_submit_wb before ctx->resolve change for lima_ctx_dirty
to work in lima_submit_wb.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
ccfe5f9d28 lima: delay add plb buffer to submit when flush
Prepare for multi submit in which case plb buffer is known
only when flush.

Keep the write back buffer update which is needed for FB
dirty track.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
92387ca236 lima: pass array as parameter to PLBU and VS command macros
Don't assume the ctx parameter, prepare for moving PLBU and
VS arrary from lima_context to lima_submit and adding new
plbu_cmd_head array.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
c3bbe4f7f8 lima: remove lima_ctx_buff_va submit flags (v2)
We don't have any shared lima_ctx_buff for both GP and PP,
so no need to have these flags.

v2:
still add submit in lima_ctx_buff_va because some bo need
to exist cross flush, so not every submit will call
lima_ctx_buff_alloc.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
9f924c795b lima: always add texture bo to submit
No matter texture desc change, we need to add texture to submit.
Otherwise texture may be freed before submit finish.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
3c4ff27250 lima: use util_copy_framebuffer_state
Use this helper to replace self written code.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
c8b53d8020 lima: remove definition of lima_is_scanout
There is no implementation of this function.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Alyssa Rosenzweig
0c4a70b64d pan/decode: Remove extraneous newline
pandecode_log already does this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:50 -05:00
Alyssa Rosenzweig
8ab0bf1f93 pan/midgard: Use fprintf instead of printf for constants
I was wondering where those constants disappeared to :-)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 968f36d1fc ("pan/midgard: Support disassembling to a file")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:50 -05:00
Alyssa Rosenzweig
6af14d3685 pan/midgard: Don't crash with constants on unknown ops
Just use a dummy name instead.. we can't know a priori what type an
unknown op will consume, but we don't want to dereference a null
pointer.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 24360966ab ("panfrost/midgard: Prettify embedded constant
prints")

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:50 -05:00
Alyssa Rosenzweig
5c06ecd2c6 pan/midgard: Identify stack barrier flag
In case thread local storage is used.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:49 -05:00
Alyssa Rosenzweig
d3747fb1eb pan/midgard: Set xyzx swizzle for load_compute_arg
Probably harmless but the w component doesn't appear valid so let's
match the blob... one less bit to be nervous about.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:48 -05:00
Alyssa Rosenzweig
f0ee55ad2a pan/midgard: Infer tags entirely
We're so close, again marking off a few edge cases is enough to allow us
to omit this data entirely. Woot!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:48 -05:00
Alyssa Rosenzweig
57a84278fd pan/midgard: Imply next tags
As long as we can disambiguate a few edge cases, we can imply next tags
entirely which cleans up the disassembly a fair bit (though not as much
as implying tags entirely would -- we'll get there!)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
453c64663c pan/midgard: Overhaul tag handling
We unify disparate metadata about tags into a single structure to ensure
information is not left out.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
9168e7a65d pan/midgard: Improve barrier disassembly
Just move some state from unknowns to actual keywords.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
d208212f80 pan/midgard: Use dummy tag for empty shaders
Fixes INSTR_INVALID_ENC in dEQP-GLES31.functional.compute.basic.empty

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
b2cab6b6db pan/midgard: Fix 32/64 mixed swizzle packing
Occurs in SSBO address computation.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
a55a2e02a5 pan/midgard: Allow jumping out of a shader
This comes up as a `return;` instruction in a compute shader. We need to
use the special tag 1 to signify "break". Fixes numerous
INSTR_INVALID_ENC faults in dEQP-GLES31.functional.compute.basic.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
3f59098d1a pan/midgard: Implement barriers
Barriers execute on the texture pipeline on Midgard, so let's
tentatively handle barrier() as conservatively as possible (forcing
memory barriers of both buffers and shared memory). Implementation isn't
quite there yet -- it doesn't look at interactions of adjacent barriers
like it's supposed to -- but the core is there.

Fixes dEQP-GLES31.functional.compute.basic.ssbo_local_barrier_single_invocation

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
4f0b928921 pan/midgard: Fix swizzles harder
Just for disassembly for now~

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
fbe1fd3de0 pan/midgard: Fix missing prefixes
I was wondering where those were going... :)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: c1952779d6 ("pan/decode: Dump to a file")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
521406a069 pan/midgard: Track pressure when scheduling ld/st
Fixes RA failure in
dEQP-GLES31.functional.shaders.builtin_functions.common.modf.* (which
uses multiple indirect SSBO writes)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
9603126b74 panfrost: Allocate RAM backing of shared memory
Unlike other GPUs, Mali does not have dedicated shared memory for
compute workloads. Instead, we allocate shared memory (backed to RAM),
and the general memory access functions have modes to access shared
memory (essentially, think of these modes as adding this allocates base
+ workgroupid * stride  in harder). So let's allocate enough memory
based on the shared_size parameter and supply it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
50138abb5a panfrost: Rename unknown2_8 to padding
It's zero everywhere.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
6d9ee3e65a panfrost: Rename bifrost_framebuffer->mali_framebuffer
(And bifrost_fb_extra to mali_framebuffer_extra, bifrost_render_target
to mali_render_target)

These structures are the norm on midgard t760+, drop the bifrost names,
it's silly... unrelated to the rest of the series but while I'm messing
with pandecode and cleaning up bifrost abstractions, might as well.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
6dc105555b panfrost: Unify bifrost_scratchpad with mali_shared_memory
It looks like these are the same structure, so this allows us to reuse
mali_shared_memory across architectures, and dispels with the
Bifrost-specific mystery of the scratchpads... nothing so mysterious
after all, just stack.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
254f40fd53 panfrost: Identify mali_shared_memory structure
This small structure is used to configure shared memory and stack for
compute shaders, and is also present at the beginning of framebuffer
descriptors. Let's factor it out.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
418ca5dc1a panfrost: Ensure compute shader_meta is zeroed
In theory the hardware doesn't care but it'll make for easier traces.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
058faf5a4b panfrost: Update comment about magic number relating to barriers
It's a complicated story. But from what I can tell, in GL compute
without barriers, the blob is able to redistribute the workgroups in
various ways (that are not yet understood), whereas with barriers it
cannot redistribute anything, which accounts for erratic workgroup
packing without barriers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Dave Airlie
8f5a252d35 ci: bump debian image and change llvm deps to 8
v3: remove version in a few places (Michel)

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3805>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3805>
2020-02-15 04:15:00 +00:00
Dave Airlie
e7375e1795 gallivm/s390: fix pass init order on s390 with llvm 8 (v2)
llvm 8 has some missing pass dependencies, fix the s390 case
as well.

v2: add ARM also (Michel)

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3805>
2020-02-15 04:15:00 +00:00
Kenneth Graunke
a603822b2f iris: Trim "../../src/gallium/drivers/iris/" out of debug dump filenames
Easier to read.

v2: Also trim "/iris/" (Jordan Justen)

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3830>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3830>
2020-02-15 00:55:55 +00:00
Kenneth Graunke
96f247d1b3 iris: Dump frame markers with INTEL_DEBUG=submit
Now you can see which batches go with which frames.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3830>
2020-02-15 00:55:55 +00:00
Marek Olšák
e395ce03e9 gallium/cso_hash: remove another layer of pointer indirection
Convert this:

    struct cso_hash {
       union {
          struct cso_hash_data *d;
          struct cso_node      *e;
       } data;
    };

to this:

    struct cso_hash {
       struct cso_hash_data data;
       struct cso_node      *end;
    };

1) data is not a pointer anymore.
2) "end" points to "data" and acts as the end of the linked list.
3) This code is still crazy.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:28 -05:00
Marek Olšák
e0bb7b87e2 gallium/cso_hash: cosmetic changes, no behavior changes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:28 -05:00
Marek Olšák
789ed29d59 gallium/cso_hash: remove always constant variable nodeSize
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:28 -05:00
Marek Olšák
a8bbf10540 gallium/cso_hash: make cso_hash declared within structures instead of alloc'd
This removes one level of indirection.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:28 -05:00
Marek Olšák
f8594a06e4 gallium/cso_hash: inline a bunch of functions
I'm probably not getting anything out of this, but it's harmless.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
cf86f522b2 gallium/u_vbuf: adjust the heuristic for unrolling indices
This improves performance in the first subtest of Viewperf11/Catia by 10%.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
55d8baa285 gallium/u_upload_mgr: don't do align twice in the u_upload_alloc fast path
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
19c18d532e gallium/u_upload_mgr: reduce dereferences by adding buffer_size
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
909a2d0ed3 st/mesa: simplify releasing the current attrib buffer
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
6954efce23 st/mesa: make st_setup_current static
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
e3617fd00b st/mesa: change some loops from while to do..while in st_atom_array.c
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
fd6636ebc0 st/mesa: simplify determination whether a draw needs min/max index
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
1d93372802 st/mesa: simplify determination whether a draw has user vertex buffers
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
61e4c582e0 st/mesa: always inline the code setting non-64bit vertex elements
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
3c98dccd40 mesa: remove unused _mesa_draw_indirect
All drivers that expose ARB_draw_indirect also set the driver callback.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
e6448f993b mesa: translate into gallium vertex formats in mesa/main
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Francisco Jerez
8d3b86e34a intel/fs/gen7+: Implement discard/demote for SIMD32 programs.
At this point this simply involves fixing the initialization of the
sample mask flag register to take the right dispatch mask from the
thread payload, and fixing sample_mask_reg() to return f1.1 for the
second half of a SIMD32 thread.  This improves Manhattan 3.1
performance by 2.4%±0.31% (N>40) on my ICL with SIMD32 enabled
relative to falling back to SIMD16 for the shaders that use discard.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:49 -08:00
Francisco Jerez
04c7d3d4b1 intel/fs: Return consistent UW types from sample_mask_reg() in fragment shaders.
In SIMD32 programs that don't use discard, the upper 16 bits of the UD
result of sample_mask_reg() don't contain the sample mask of the upper
16 channels as one would expect.  Stop pretending we are returning a
valid 32-bit mask.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:49 -08:00
Francisco Jerez
1c6853a9be intel/fs: Refactor predication on sample mask into helper function.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
a792e11f5c intel/fs/gen7+: Swap sample mask flag register and FIND_LIVE_CHANNEL temporary.
FIND_LIVE_CHANNEL was using f1.0-f1.1 as temporary flag register on
Gen7, instead use f0.0-f0.1.  In order to avoid collision with the
discard sample mask, move the latter to f1.0-f1.1.  This makes room
for keeping track of the sample mask of the second half of SIMD32
programs that use discard.

Note that some MOVs of the sample mask into f1.0 become redundant now
in lower_surface_logical_send() and lower_a64_logical_send().

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>x
2020-02-14 14:31:48 -08:00
Francisco Jerez
083fd96a97 intel/fs: Use helper for discard sample mask flag subregister number.
Use it instead of hard-coding f0.1 for the sample mask of programs
that use discard.  This will make the task easier when we replace f0.1
with another flag register location in order to support discard with
SIMD32 shaders.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
a6bc11a789 intel/fs: Make sample_mask_reg() local to brw_fs.cpp and use it in more places.
It's only really useful there.  This will avoid confusion with another
helper with a similar purpose I'm about to introduce that will be
useful in multiple files from the FS back-end.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
b84fa0b31e intel/fs/gen11: Work around dual-source blending hangs in combination with SIMD32.
The SIMD8 dual-source blending framebuffer write messages seem to have
trouble releasing the pixel scoreboard dependency in SIMD32 dispatch
mode, which leads to hangs.  I have a better workaround for this which
doesn't involve disabling SIMD32 when dual-source blending is enabled,
but I'm still investigating some issues with it.  Limit the dispatch
width to SIMD16 in such cases for the moment in order to make the CI
happy on ICL with SIMD32 fragment shaders enabled.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
57dee58c82 intel/fs: Set src0 alpha present bit in header when provided in message payload.
Currently the "Source0 Alpha Present to RenderTarget" bit of the RT
write message header is derived from brw_wm_prog_data::replicate_alpha.
However the src0_alpha payload is provided anytime it's specified to
the logical message.  This could theoretically lead to an
inconsistency if somebody provided a src0_alpha value while
brw_wm_prog_data::replicate_alpha was false, as I'm planning to do in
a future commit in order to implement a hardware workaround.

Instead calculate the header bit based on whether a src0_alpha value
was provided to the logical message, which guarantees the same
behavior on pre-ICL and ICL+ (the latter used an extended descriptor
bit for this which didn't suffer from the same issue).  Remove the
brw_wm_prog_data::replicate_alpha flag.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
e14529ff32 intel/fs/gen12: Workaround data coherency issues due to broken NoMask control flow.
Together with the fixup_nomask_control_flow() pass introduced in a
previous patch, this implements a less invasive alternative to the
workaround documented in the hardware spec for GEN:BUG:1407528679,
which doesn't involve disabling structured control flow.

Under some conditions Gen12 hardware can end up executing a BB with
all channels disabled, which will lead to the execution of any NoMask
instructions in it, even though any execution-masked instructions will
be correctly shot down.  This could break assumptions of the SWSB pass
if the data computed by a NoMask instruction is synchronized against
by using an SWSB annotation baked into a regular execution-masked
instruction, since the first (NoMask) instruction may be executed
redundantly by the hardware, even though the second will correctly be
shot down, potentially leading to a RaW or WaW hazard if a third
instruction subsequently accesses the destination register of the
first instruction.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
4e4e8d793f intel/fs/gen12: Fixup/simplify SWSB annotations of SIMD32 scratch writes.
Found by inspection.  Existing code was trying to avoid assuming that
an SBID had been assigned to the virtual instruction, but
synchronizing the header setup with respect to the previous SIMD16
SEND by using SYNC.ALLRD doesn't really seem possible unless the SEND
instruction had been assigned an SBID.  Assert-fail instead if no SBID
has been allocated.

Fixes: 15e3a0d9d2 "intel/eu/gen12: Set SWSB annotations in hand-crafted assembly."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
a8ac0bd759 intel/fs/gen12: Workaround unwanted SEND execution due to broken NoMask control flow.
This is a less invasive alternative to the workaround documented in
the hardware spec for GEN:BUG:1407528679, which doesn't involve
disabling structured control flow (it's unlikely that switching to
GOTO/JOIN would have actually fixed the problem anyway).

Under some conditions Gen12 hardware can end up executing a BB with
all channels disabled, which will lead to the execution of any NoMask
instructions in it, even though any execution-masked instructions will
be correctly shot down.  This may break assumptions of some NoMask
SEND messages whose descriptor depends on data generated by live
invocations of the shader.

This avoids the problem by predicating certain instructions on an ANY
horizontal predicate that makes sure that their execution is omitted
when all channels of the program are disabled.  The shader-db impact
of this patch seems to be minimal:

total instructions in shared programs: 17169833 -> 17169913 (0.00%)
instructions in affected programs: 30663 -> 30743 (0.26%)
helped: 0
HURT: 42

total cycles in shared programs: 336966176 -> 336968568 (0.00%)
cycles in affected programs: 2367290 -> 2369682 (0.10%)
helped: 0
HURT: 13

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
008f95a043 intel/fs: Add virtual instruction to load mask of live channels into flag register.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
b8b509fb92 intel/fs/gen7: Fix fs_inst::flags_written() for SHADER_OPCODE_FIND_LIVE_CHANNEL.
We need to pass a width of 32 since the opcode bashes the whole f1.0
register on IVB.  This is unlikely to have caused problems since f1.0
is largely unused currently.  That's likely to change soon though,
even on platforms other than Gen7.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
c9e33e5cbf intel/fs/cse: Make HALT instruction act as CSE barrier.
Found by inspection.  This seems particularly likely to cause problems
with instructions dependent on the current execution mask like
SHADER_OPCODE_FIND_LIVE_CHANNEL or the FS_OPCODE_LOAD_LIVE_CHANNELS
instruction I'm about to introduce, but one could imagine it leading
to data corruption if CSE ever managed to combine two instructions
before and after the FS_OPCODE_PLACEHOLDER_HALT, since the one before
may not be executed for some channels.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Andreas Baierl
fe1b0b7c50 lima/parser: Extend rsw parsing showing strings instead of numbers
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3807>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3807>
2020-02-14 21:48:25 +00:00
Marek Olšák
7e2b4bf256 radeonsi: don't wait for shader compilation to finish when destroying a context
This was a hack for glsl_types deinitialization and it predates the proper
fix, which was the addition of glsl_type_singleton_decref.

This fixes a crash when the context is destroyed via the atexit handler.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3800>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3800>
2020-02-14 16:19:38 -05:00
Eric Engestrom
7bee388fb5 egl: directly access static members instead of using _egl{Get,Set}ConfigKey()
This function is meant for when the attribute is unknown at compile-time
(eg. user-specified), but in all these cases it is much simpler to just
read/write the member directly.

Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3816>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3816>
2020-02-14 18:03:07 +00:00
Jonathan Marek
946eacbafb freedreno/a6xx: document some unknown bits
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3814>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3814>
2020-02-14 08:22:33 -05:00
Jonathan Marek
75fbe089a6 freedreno: name sysmem color/depth flush events
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3814>
2020-02-14 08:22:33 -05:00
Alyssa Rosenzweig
c57456aab6 panfrost: Simplify swizzle translation
It lines up anyway, and Gallium shouldn't change this. (And if it does,
we'll deal with that then since CI would start failing.)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3824>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3824>
2020-02-14 12:53:36 +00:00
Icecream95
f3490a141c panfrost: Inline panfrost_get_default_swizzle
This commit replaces panfrost_get_default_swizzle with an inlined
implementation where the returned values can be determined at compile
time.

According to perf, this previously used about 2% CPU for Openarena.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3824>
2020-02-14 12:53:36 +00:00
Elie Tournier
efda2cfcf9 spirv2nir: Add kernel spirv support
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3678>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3678>
2020-02-14 11:14:58 +00:00
Elie Tournier
eeb6d61128 spirv2nir: print nir shader if translation succed
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3678>
2020-02-14 11:14:58 +00:00
Erik Faye-Lund
7e80b03dd1 zink: do not use SpvDimRect
Vulkan doesn't support SpvDimRect. But we don't need to pass this at
all, as we already mark the sampler as un-normalized.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3764>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3764>
2020-02-14 10:51:46 +00:00
Vasily Khoruzhick
f43a3fc28f lima: handle early-z and pixel kill better
[1] calls bit 12 of aux0 'pixel kill' which is likely forward pixel
kill described in [2]. Blob sets this bit if early-z is enabled and
blending is disabled and colormask is RGBA.

Bit 8 seems to be always enabled with bit 9 (early-z).

Let's mimic blob behavior.

[1] https://web.archive.org/web/20171026123213/http://limadriver.org/Render_State/
[2] https://community.arm.com/developer/tools-software/graphics/b/blog/posts/killing-pixels---a-new-optimization-for-shading-on-arm-mali-gpus

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3754>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3754>
2020-02-14 10:03:01 +00:00
Michel Dänzer
582d0c5f14 gitlab-ci: Add three more dEQP-GLES31 tests to softpipe skips
These have randomly flipped lately, see e.g.
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/1620056
https://gitlab.freedesktop.org/daenzer/mesa/-/jobs/1621374
https://gitlab.freedesktop.org/daenzer/mesa/-/jobs/1622156

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3811>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3811>
2020-02-14 09:55:48 +01:00
Michel Dänzer
3d16bfc42d gitlab-ci: Sort random failure softpipe skips
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3811>
2020-02-14 09:55:10 +01:00
Samuel Pitoiset
f86bf2e90a docs/new_features: empty the feature list for the 20.1 cycle
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3793>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3793>
2020-02-14 07:31:20 +00:00
Samuel Pitoiset
886acbe1c5 radv: remove unnecessary RADV_DEBUG=nobatchchain option
It was used in the past but nowadays chained submissions work fine.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3791>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3791>
2020-02-14 07:48:14 +01:00
Timothy Arceri
676869e1d4 glsl: fix gl_nir_set_uniform_initializers() for image arrays
The if was incorrectly checking for an image type on what could
be an array of images. Here we change it to use the type stored
in uniform storage which has already been stripped of arrays,
this is what the above code for samplers does also.

Fixes: 2bf91733fc ("nir/linker: Set the uniform initial values")

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3757>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3757>
2020-02-14 01:37:03 +00:00
Rafael Antognolli
6baeca3689 intel/tools: Update aubinator_error_decode.
"ringbuffer" is now called only "ring" in the error state.

v2: Keep compatible with old error state (Lionel).
v3: Also update "gtt_offset" -> "batch".

Closes: https://gitlab.freedesktop.org/drm/intel/issues/1206
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-02-13 16:53:18 -08:00
Rob Clark
334788d4cc freedreno: allow INVALID modifier
Re-allow INVALID modifier in import path.  The legacy import path
(createImageFromFds()), which is used by android, uses the INVALID
modifier.  Previously we would ignore this and just setup the imported
buffer as linear.  Restore this behavior to unbreak the legacy import
path.

Fixes: 9891062642 freedreno/a6xx: Implement layout for DRM_FORMAT_MOD_QCOM_COMPRESSED
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3817>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3817>
2020-02-13 19:16:17 +00:00
Sagar Ghuge
3547e19bbd intel/isl: Switch to R8_UNORM format for compatiblity
Gen12 added CCS_E support for A8_UNORM. Intercept A8_UNORM format and
switch to R8_UNORM, as both share the same aux map format encoding so
they are compatible.

Fixes Piglit's ext_framebuffer_multisample-formats all_samples, which
was hitting an assert about A8_UNORM and R8_UINT not being CCS_E
compatible formats.

v2: Add gen check (Kenneth Graunke)

v3: Intercept A8_UNORM and set format to R8_UNORM (Jason Ekstrand)

v4:
- Remove gen check and move block little bit down (Jason Ekstrand)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
2020-02-13 18:44:50 +00:00
Sagar Ghuge
207a93bbff intel/isl: Move get_format_encoding function to isl
Move get_format_encoding function to isl and rename to
isl_get_aux_map_format_encoding.

v2:
- Rename isl_get_aux_map_format_encoding to
  isl_format_get_aux_map_encoding (Jason Ekstrand)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
2020-02-13 18:44:50 +00:00
Fritz Koenig
2a98cf3b2e Revert "gitlab-ci: disable a630 tests as mesa-cheza is down (again)"
This reverts commit 18657c0c0a

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
2020-02-13 18:13:55 +00:00
Jonathan Marek
5a82273f09 freedreno/a6xx: fix Z24_UNORM_S8_UINT_AS_R8G8B8A8
CI didn't run so missed this.

Note previously had :
   texfmt = TFMT6_Z24_UNORM_S8_UINT
   rbfmt = RB6_Z24_UNORM_S8_UINT_AS_R8G8B8A8

which are both now FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8

Fixes: 18786cc7d5 ("freedreno/a6xx: use single format enum")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
2020-02-13 18:13:55 +00:00
Lionel Landwerlin
4151d84323 iris: add support INTEL_blackhole_render
v2: Use a software mechanism to manage blackhole state

v3: s/iris_batchbuffer/iris_batch/ (Ken)

v4: Fixup state transition mistake (Ken/Lionel)

v5: Cleanup iris_batch_flush (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Lionel Landwerlin
6d35610bd5 st: add support for INTEL_blackhole_render
Adding a new CSO proved to be fairly difficult especially because this
extension affect draw/dispatch/blit alike.

Instead this change passes the state of the noop into the entry points
emitting the operations affected.

v2: Fix assert in default pipe caps

v3: Drop whitespace changes (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Lionel Landwerlin
5d7e9edba1 i965: enable INTEL_blackhole_render
v2: condition the extension on context isolation support from the
    kernel (Chris)

v3: (Lionel)

    The initial version of this change used a feature of the Gen7+
    command parser to turn the primitive instructions into no-ops.
    Unfortunately this doesn't play well with how we're using the
    hardware outside of the user submitted commands. For example
    resolves are implicit operations which should not be turned into
    no-ops as part of the previously submitted commands (before
    blackhole_render is enabled) might not be disabled. For example
    this sequence :

       glClear();
       glEnable(GL_BLACKHOLE_RENDER_INTEL);
       glDrawArrays(...);
       glReadPixels(...);
       glDisable(GL_BLACKHOLE_RENDER_INTEL);

    While clear has been emitted outside the blackhole render, it
    should still be resolved properly in the read pixels. Hence we
    need to be more selective and only disable user submitted
    commands.

    This v3 manually turns primitives into MI_NOOP if blackhole render
    is enabled. This lets us enable this feature on any platform.

v4: Limit support to gen7.5+ (Lionel)

v5: Enable Gen7.5 support again, requires a kernel update of the
    command parser (Lionel)

v6: Disable Gen7.5 again... Kernel devs want these patches landed
    before they accept the kernel patches to whitelist INSTPM (Lionel)

v7: Simplify change by never holding noop (there was a shortcoming in the test not considering fast clears)
    Only program register using MI_LRI (Lionel)

v8: Switch to software managed blackhole (BDW hangs on compute batches...)

v9: Simplify the noop state tracking (Lionel)

v10: Don't modify flush function (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v8)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Lionel Landwerlin
74ec39f66d mesa: add INTEL_blackhole_render
v2: Implement missing Enable/Disable (Emil)

v3: Drop unused NewIntelBlackholeRender (Ken)

v4: Bring back NewIntelBlackholeRender as i965 implementation uses it
    again (Lionel)

v5: Drop atom (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Thong Thai
08cff938b7 Revert "st/va: Convert interlaced NV12 to progressive"
This reverts commit 2add63060b.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2454
Fixes: 2add63060b "st/va: Convert interlaced NV12 to progressive"
Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3815>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3815>
2020-02-13 16:43:02 +00:00
Jason Ekstrand
3a2977e7b5 anv: Reject modifiers on depth/stencil formats
6790397346 added code which attempts to reject modifiers on
depth/stencil formats but it was placed after the early return for depth
and stencil aspects.  This commit moves it up so it actually works.

Of course, this doesn't actually matter because the only user of any of
the modifiers stuff is the WSI code and it will never do anything with
depth/stencil.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794>
2020-02-13 15:40:18 +00:00
Krzysztof Raszkowski
5a593bec16 gallium/swr: fix rdtsc debug statistics mechanism
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3812>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3812>
2020-02-13 15:33:27 +01:00
Rhys Perry
dd16ad107d gitlab-ci: remove load_store_vectorizer from expected s390x test failures
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
2020-02-13 10:53:37 +00:00
Rhys Perry
aca2458d1b nir: fix nir_const_value_as_uint bit size in load/store vectorizer tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
2020-02-13 10:53:37 +00:00
Erik Faye-Lund
0c1ba69a27 Revert "nir: Add a couple trivial abs optimizations"
These were already added in 9fdaeb7776 ("nir: add min/max optimisation"),
and there's no point in doing them twice.

This reverts commit e4d346c86d.

Fixes: e4d346c86d ("nir: Add a couple trivial abs optimizations")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3786>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3786>
2020-02-13 09:18:27 +00:00
Tapani Pälli
fdd20be324 iris: fix aux buf map failure in 32bits app on Android
Cc: mesa-stable@lists.freedesktop.org
Reported-by: Zhifang Long <zhifang.long@intel.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3784>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3784>
2020-02-13 10:54:53 +02:00
Samuel Pitoiset
b9e0947a9e radv: remove unused RADV_HASH_SHADER_IS_GEOM_COPY_SHADER
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
2020-02-13 08:09:13 +00:00
Samuel Pitoiset
b2531370c9 radv: remove RADV_DEBUG=nosisched and RADV_PERFTEST=sisched
They are no longer useful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
2020-02-13 08:09:13 +00:00
Samuel Pitoiset
fa48e7edc2 radv: remove LLVM sicheduler enable for The Talos Principle
sisched is completely unmaintained, it used to give few more FPS
in the past but with ACO, it's now obsolete. It seems even faster
without sisched now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
2020-02-13 08:09:13 +00:00
Tapani Pälli
f7d1bf075a glsl: fix a memory leak with resource_set
==7265== 248 (120 direct, 128 indirect) bytes in 1 blocks are definitely lost in loss record 1,438 of 1,465
   ==7265==    at 0x483980B: malloc (vg_replace_malloc.c:309)
   ==7265==    by 0x598A2AB: ralloc_size (ralloc.c:119)
   ==7265==    by 0x598F861: _mesa_set_create (set.c:127)
   ==7265==    by 0x599079D: _mesa_pointer_set_create (set.c:570)
   ==7265==    by 0x58BD7D1: build_program_resource_list(gl_context*, gl_shader_program*, bool) (linker.cpp:4026)
   ==7265==    by 0x548231B: st_link_shader (st_glsl_to_ir.cpp:170)
   ==7265==    by 0x54DA269: _mesa_glsl_link_shader (ir_to_mesa.cpp:3119)

Fixes: a6aedc66 ("st/glsl_to_nir: use nir based program resource list builder")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574>
2020-02-13 07:47:33 +00:00
Samuel Pitoiset
556c940149 radv: implement VK_EXT_line_rasterization
Only Bresenham lines are supported. GFX9 is currently disabled
because there is some CTS failures for some weird reasons.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
2020-02-13 08:14:01 +01:00
Samuel Pitoiset
fbcf05382b radv: fix line width range and granularity
The hardware supports wide lines and the granularity is way larger.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
2020-02-13 08:14:01 +01:00
Connor Abbott
da64c35ff9 tu: Force sysmem with mipmapped non-aligned linear stores
Fixes hangs with
dEQP-VK.api.image_clearing.core.clear_color_image.1d.linear.single_layer.r8g8b8a8_unorm
and many others on a640, and presumably silent corruption with a630.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:37:05 -05:00
Connor Abbott
f026982265 tu: Support input attachments with sysmem
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:37:05 -05:00
Connor Abbott
c1b3f9e832 tu: Support resolve ops with sysmem rendering
Similar to vkCmdClearAttachments(), we use CP_COND_REG_EXEC to
conditionally execute both the gmem and sysmem paths, except for after
the last subpass where it's known whether we're using sysmem rendering
or not.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:37:01 -05:00
Connor Abbott
8647a24a8d tu: Handle vkCmdClearAttachments() with sysmem
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:36:41 -05:00
Connor Abbott
07e07daeae tu: Add helper for CP_COND_REG_EXEC
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:36:41 -05:00
Connor Abbott
6a0c4008bf tu: Sysmem rendering
This has only lightly been tested. It passes dEQP-VK.api.smoke.triangle,
so at least we're able to show a triangle. For now, it's just enabled
under a debug flag. In the future we'll probably want some heuristics
like what freedreno has and another debug flag to disable it except when
it's forced.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:36:36 -05:00
Connor Abbott
041783d49d tu: Disable linear depth attachments
Also, disable importing depth/stencil textures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:31:57 -05:00
Connor Abbott
ab3db20cb5 tu: Support multisample image clears
We may need shader workarounds for some formats, but for now this seems
to work at least as well as the gmem path for clearing multisample
attachments. And soon we'll start calling this even on the gmem path,
since we leave the final decision of whether to use sysmem or not up
till the end, so we can't have it assert or otherwise working tests
would assert.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:31:57 -05:00
Connor Abbott
a5fb515301 tu/blit: Support blits in secondary cmdstreams
For sysmem rendering we'll have to emit a delayed clear IB to implement
LOAD_OP_*, similar to the existing tile_load_ib.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:31:44 -05:00
Connor Abbott
a94be3da84 tu: Properly set UBWC flags in RB_RENDER_CNTL
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:23:50 -05:00
Connor Abbott
49817cb3ea tu: Don't emit initial render target state in tile_load_ib
Emitting it directly in CmdBeginRenderPass should be around the same,
except that now we can easily share it with the sysmem path.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:23:50 -05:00
Peng Huang
0660cbf426 radeonsi: make si_fence_server_signal flush pipe without work
glSignalSemaphoreEXT sometime doesn't signal the semaphore, it is
because radeonsi doesn't flush if gl context doesn't have pending
work. Fix the porblem by always submit ib.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779>
2020-02-12 23:51:50 +00:00
Chad Versace
787b56ac0e turnip: Add a618 support
I merely ported a freedreno patch to turnip which
updates some magic regsiter values.

    commit ff6e148a3d
    Author:     Rob Clark <robdclark@chromium.org>
    CommitDate: Tue Oct 29 09:19:34 2019 -0700
    Subject:    freedreno/a6xx: add a618 support

That's all that Rob did for gallium for a618, so I assume that's we need
for turnip also.

Tested manually with:

    dEQP-VK.api.image_clearing.core.clear_color_image.2d.linear.single_layer.*
        pass 300/555
        fail   0/555
        skip 255/555

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
2020-02-12 23:27:43 +00:00
Chad Versace
ef5da26089 turnip: Add magic register values to tu_physical_device
The value of some magic regsiters differ across chipsets. fd6_context
manages the differences by initializing them at runtime. Let's do the
same.

Add to tu_physical_device a subset of those found in fd6_context:

    RB_UNKNOWN_8E04_blit
    RB_CCU_CNTL_gmem
    PC_UNKNOWN_9805
    SP_UNKNOWN_A0F8

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
2020-02-12 23:27:43 +00:00
Jonathan Marek
18786cc7d5 freedreno/a6xx: use single format enum
Loses some information about which formats can be used in which cases, but
we encode that information in the format table anyway.

Important notes:
* RB6_R10G10B10A2_UNORM becomes FMT6_R10G10B10A2_UNORM_DEST
* TFMT6_8_8_8_UNORM becomes FMT6_8_8_8_X8_UNORM (not FMT6_8_8_8_UNORM)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3798>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3798>
2020-02-12 21:59:59 +00:00
Chad Versace
c13202af7a anv: Respect ISL_SURF_USAGE_DISABLE_AUX_BIT in make_surface()
If set, then don't make the aux surface.

Only anv_android.c used the flag, but anv_image.c fully ignored it.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3797>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3797>
2020-02-12 21:34:02 +00:00
Chad Versace
a76fd8b08c anv: Clarify behavior of anv_image_aspect_to_plane()
It returns the aspect's _format_ plane, not its _memory_ plane (using the
vocabulary of VK_EXT_image_drm_format_modifier).

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3796>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3796>
2020-02-12 21:01:45 +00:00
Chad Versace
da2b0c6c19 anv: Delete anv_image::ccs_e_compatible
It was set exactly once, and read exactly once, both times during
anv_image_create().

I found its permanency as a member of anv_image to be distracting while
implementing VK_EXT_image_drm_format_modifier.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3795>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3795>
2020-02-12 20:31:39 +00:00
Rhys Perry
483d4ec57c aco: improve SCC handling in some SALU combines
Add some checks and remove some unnecessary checks.

Found by observation. No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599>
2020-02-12 19:18:45 +00:00
Rhys Perry
d45e9451cf aco: disable some instruction combining if it could change an exec operand
Found by observation. No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599>
2020-02-12 19:18:40 +00:00
Arcady Goldmints-Orlov
e9f83185a2 Rename nir_lower_constant_initializers to nir_lower_variable_initalizers
This is naming is more clear as nir_variables can be initializes not
just with a nir_constant but with a pointer to another nir_variable.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
2020-02-12 15:41:49 +00:00
Arcady Goldmints-Orlov
e459c7f0a1 compiler/spirv: Add support for non-constant initializers
This adds support for OpVariable having an initializer that points to
another variable, rather than a constant. In this case, the variable is
initialized to a pointer to the other variable.

Fixes Vulkan CTS tests:
dEQP-VK.spirv_assembly.instruction.compute.variable_init.private.*

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
2020-02-12 15:41:49 +00:00
Arcady Goldmints-Orlov
7acc81056f compiler/nir: Add support for variable initialization from a pointer
Add a pointer_initializer field to nir_variable analogous to
constant_initializer, which can be used to initialize the nir_variable
to a pointer to another nir_variable. Just like the
constant_initializer, the pointer_initializer gets eliminated in the
nir_lower_constant_initializers pass.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
2020-02-12 15:41:49 +00:00
Veerabadhran
461c40e0fd radeon/vce: Move global function pointer si_get_pic_param to local encoder structure
Multi gpu use case broken when the function was global

Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3731>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3731>
2020-02-12 13:43:35 +00:00
Chad Versace
286141197d anv: Rename param make_surface::dev to device
Everywhere in anvil, each variable of type anv_device is named 'device',
except this single instance. Rename it for consistency.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773>
2020-02-11 13:26:38 -06:00
Chad Versace
84b791a4bb anv: Drop unused anv_image_get_surface_for_aspect_mask()
Replaced by anv_image.c:get_surface() in:

  commit a62a979335
  Author:     Lionel Landwerlin <lionel.g.landwerlin@intel.com>
  CommitDate: Fri Oct 6 16:32:20 2017 +0100
  Subject:    anv: enable multiple planes per image/imageView

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773>
2020-02-11 13:26:06 -06:00
Michel Dänzer
2303762735 gitlab-ci: Only use gstreamer runners for the s390x job for now
The fdo-packet-* runners keep hitting the (already quite long) timeouts
for some of the tests, taking many times as long for them as the
gstreamer runners.

The fdo-gitlab-gce-runner3 runner would work as well, but it doesn't
have any tags we could use.

Acked-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3760>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3760>
2020-02-11 09:59:08 +01:00
Samuel Pitoiset
8e77280774 nir: do not use De Morgan's Law rules for flt and fge
In presence of NaNs, "!(flt(a, b) && flt(c, d))" is NOT EQUAL
to "fge(a, b) || fge(c, d)". These optimizations are unsafe for
apps that rely on NaN behaviour.

pipeline-db (GFX9/LLVM):
Totals from affected shaders:
SGPRS: 3176 -> 3136 (-1.26 %)
VGPRS: 2188 -> 2144 (-2.01 %)
Spilled SGPRs: 227 -> 169 (-25.55 %)
Code Size: 150572 -> 151800 (0.82 %) bytes
Max Waves: 307 -> 310 (0.98 %)

pipeline-db (GFX9/ACO):
Totals from affected shaders:
SGPRS: 18744 -> 18744 (0.00 %)
VGPRS: 15576 -> 15580 (0.03 %)
Spilled SGPRs: 164 -> 164 (0.00 %)
Code Size: 1573012 -> 1576492 (0.22 %) bytes
Max Waves: 1534 -> 1532 (-0.13 %)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2127
Fixes: d1ed4ffe0b ("nir: Use De Morgan's Law on logic compounded comparisons")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3696>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3696>
2020-02-11 08:36:00 +01:00
Samuel Pitoiset
ddd767387f aco: fix creating v_madak if v_mad_f32 has two sgpr literals
Do not ignore that src1 can be a sgpr.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2435
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3759>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3759>
2020-02-11 07:17:31 +00:00
Samuel Pitoiset
cd08d9abd7 radv: set the chip name to GCN-NOOP when RADV_FORCE_FAMILY is set
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3654>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3654>
2020-02-11 07:56:59 +01:00
Samuel Pitoiset
a8024aaaab radv: make sure to not submit any IBs when RADV_FORCE_FAMILY is set
To prevent GPU hangs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3654>
2020-02-11 07:56:55 +01:00
Bas Nieuwenhuizen
5b335e1599 radv: Do not redundantly set the RB+ regs on pipeline switch.
No significant perf changes seen on Bayonetta. (Changes are in the
noise on my Raven Laptop)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3735>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3735>
2020-02-11 04:39:42 +00:00
Vinson Lee
63345a3596 panfrost: Remove unused anonymous enum variables.
This patch fix these build errors with GCC 10.

/usr/bin/ld: src/gallium/drivers/panfrost/libpanfrost.a(pan_resource.c.o):src/panfrost/midgard/midgard_compile.h:52: multiple definition of `pan_sysval'; src/gallium/drivers/panfrost/libpanfrost.a(pan_screen.c.o):src/panfrost/midgard/midgard_compile.h:52: first defined here
/usr/bin/ld: src/gallium/drivers/panfrost/libpanfrost.a(pan_resource.c.o):src/panfrost/midgard/midgard_compile.h:68: multiple definition of `pan_special_attributes'; src/gallium/drivers/panfrost/libpanfrost.a(pan_screen.c.o):src/panfrost/midgard/midgard_compile.h:68: first defined here

Fixes: 7e8de5a707 ("panfrost: Implement system values")
Fixes: 306800d747 ("pan/midgard: Lower gl_VertexID/gl_InstanceID to attributes")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3752>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3752>
2020-02-11 03:26:04 +00:00
Bas Nieuwenhuizen
7792d774e0 radv: Optimize emitting index buffer changes.
Since the direct indexed draw packet has the address/count info
inline, there is no sense in emitting the base and size.

No real significant changes found during benchmarks.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3466>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3466>
2020-02-11 03:07:11 +00:00
Ian Romanick
1d97d186fb nir: Mark fmin and fmax as commutative and associative
Per the resolution of Khronos GLSL issue 80
(https://github.com/KhronosGroup/GLSL/issues/80).  Spec updates have not
landed yet, but I'll get to it soon. :)

The extra hurt shaders on Gen8+ are a handful of shaders that see things like

    bcsel(fmin(b - a, a - c) >= 0, x, y)

converted to

   bcsel(a >= b && c >= a, x, y)

The former can be generated as a CSEL instruction.  If either b - a or a
- c is used elsewhere in the shader, this saves an instruction.

All Haswell+ platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 14550188 -> 14550048 (<.01%)
instructions in affected programs: 12168 -> 12028 (-1.15%)
helped: 30
HURT: 3
helped stats (abs) min: 1 max: 17 x̄: 4.77 x̃: 2
helped stats (rel) min: 0.05% max: 3.85% x̄: 1.77% x̃: 1.80%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.50% max: 0.50% x̄: 0.50% x̃: 0.50%
95% mean confidence interval for instructions value: -6.15 -2.33
95% mean confidence interval for instructions %-change: -2.00% -1.12%
Instructions are helped.

total cycles in shared programs: 203770286 -> 203771464 (<.01%)
cycles in affected programs: 688466 -> 689644 (0.17%)
helped: 172
HURT: 220
helped stats (abs) min: 1 max: 286 x̄: 12.15 x̃: 6
helped stats (rel) min: 0.03% max: 5.97% x̄: 0.70% x̃: 0.35%
HURT stats (abs)   min: 1 max: 578 x̄: 14.85 x̃: 6
HURT stats (rel)   min: 0.03% max: 32.36% x̄: 1.21% x̃: 0.52%
95% mean confidence interval for cycles value: -0.74 6.75
95% mean confidence interval for cycles %-change: 0.15% 0.59%
Inconclusive result (value mean confidence interval includes 0).

total fills in shared programs: 4525 -> 4523 (-0.04%)
fills in affected programs: 48 -> 46 (-4.17%)
helped: 1
HURT: 0

Ivy Bridge
total instructions in shared programs: 11858995 -> 11858898 (<.01%)
instructions in affected programs: 10822 -> 10725 (-0.90%)
helped: 25
HURT: 13
helped stats (abs) min: 1 max: 17 x̄: 5.32 x̃: 2
helped stats (rel) min: 0.40% max: 5.00% x̄: 2.16% x̃: 1.85%
HURT stats (abs)   min: 1 max: 15 x̄: 2.77 x̃: 2
HURT stats (rel)   min: 0.47% max: 2.90% x̄: 1.83% x̃: 2.15%
95% mean confidence interval for instructions value: -4.66 -0.45
95% mean confidence interval for instructions %-change: -1.54% -0.05%
Instructions are helped.

total cycles in shared programs: 177947023 -> 177946880 (<.01%)
cycles in affected programs: 822075 -> 821932 (-0.02%)
helped: 157
HURT: 175
helped stats (abs) min: 1 max: 164 x̄: 13.17 x̃: 4
helped stats (rel) min: 0.03% max: 6.72% x̄: 0.64% x̃: 0.17%
HURT stats (abs)   min: 1 max: 308 x̄: 11.00 x̃: 4
HURT stats (rel)   min: 0.03% max: 9.76% x̄: 0.70% x̃: 0.18%
95% mean confidence interval for cycles value: -3.86 3.00
95% mean confidence interval for cycles %-change: -0.09% 0.22%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 4185 -> 4188 (0.07%)
spills in affected programs: 146 -> 149 (2.05%)
helped: 0
HURT: 1

total fills in shared programs: 5248 -> 5249 (0.02%)
fills in affected programs: 347 -> 348 (0.29%)
helped: 0
HURT: 1

Sandy Bridge
total instructions in shared programs: 10680224 -> 10680144 (<.01%)
instructions in affected programs: 4702 -> 4622 (-1.70%)
helped: 15
HURT: 3
helped stats (abs) min: 1 max: 17 x̄: 5.53 x̃: 5
helped stats (rel) min: 0.39% max: 4.76% x̄: 2.17% x̃: 1.67%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.52% max: 0.52% x̄: 0.52% x̃: 0.52%
95% mean confidence interval for instructions value: -7.24 -1.65
95% mean confidence interval for instructions %-change: -2.55% -0.89%
Instructions are helped.

total cycles in shared programs: 152988780 -> 152985691 (<.01%)
cycles in affected programs: 1072850 -> 1069761 (-0.29%)
helped: 168
HURT: 145
helped stats (abs) min: 1 max: 592 x̄: 33.90 x̃: 12
helped stats (rel) min: 0.02% max: 10.73% x̄: 0.90% x̃: 0.31%
HURT stats (abs)   min: 1 max: 259 x̄: 17.98 x̃: 6
HURT stats (rel)   min: 0.02% max: 8.17% x̄: 0.77% x̃: 0.19%
95% mean confidence interval for cycles value: -17.95 -1.79
95% mean confidence interval for cycles %-change: -0.34% 0.08%
Inconclusive result (%-change mean confidence interval includes 0).

Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs: 8107033 -> 8107025 (<.01%)
instructions in affected programs: 696 -> 688 (-1.15%)
helped: 5
HURT: 0
helped stats (abs) min: 1 max: 2 x̄: 1.60 x̃: 2
helped stats (rel) min: 0.34% max: 7.14% x̄: 3.47% x̃: 4.65%
95% mean confidence interval for instructions value: -2.28 -0.92
95% mean confidence interval for instructions %-change: -7.22% 0.28%
Inconclusive result (%-change mean confidence interval includes 0).

total cycles in shared programs: 188348526 -> 188348404 (<.01%)
cycles in affected programs: 33618 -> 33496 (-0.36%)
helped: 23
HURT: 0
helped stats (abs) min: 2 max: 12 x̄: 5.30 x̃: 6
helped stats (rel) min: 0.05% max: 1.83% x̄: 0.47% x̃: 0.51%
95% mean confidence interval for cycles value: -6.70 -3.91
95% mean confidence interval for cycles %-change: -0.64% -0.30%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1359>
2020-02-10 18:37:36 -08:00
Eric Anholt
1886dbfe73 Revert "gallium: Fix big-endian addressing of non-bitmask array formats."
This reverts the functional part of commit
d17ff2f7f1, leaving the unit test for
mesa/pipe agreement on what's an array.

The issue is that the util_channel_desc.shift values on array formats are
not used for bit addressing in memory, they're bit addressing within a
word treating a pixel of the format as a native type, as seen by
llvmpipe's use of the values to do shifts (see
lp_build_unpack_arith_rgba_aos() for example).  This means the values are
nonsensical for 3-byte RGB, but then llvmpipe doesn't expose those formats
so it works out.

I still want to clean up our big-endian format handling at some point, but
let's fix the s390x regression first, sort out our format unit tests in
CI, then be able to refactor with confidence.

Fixes: d17ff2f7f1 ("gallium: Fix big-endian addressing of non-bitmask array formats.")
Closes: #2472
Acked-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3721>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3721>
2020-02-11 00:53:04 +00:00
Marek Olšák
11db8e0e00 st/mesa: optimize st_update_array with ALWAYSINLINE
The time spent in st_update_array is reduced by 5-10%.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
36cc6b105b mesa: don't use bitfields in _mesa_prim
This is better.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
47d7e21619 mesa: remove unused _mesa_prim::is_indirect
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
734654a89c í965: don't use _mesa_prim::is_indirect
the vbo change only affects i965

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
a7d03103f3 vbo: merge use_buffer_objects into vbo_CreateContext to skip the big malloc
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
7575a0a251 vbo: clean up resetting vertex attribs
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
ee5bd8638b vbo: also map the immediate mode buffer for read
because we read from it sometimes and we want cached reads.

We can only do it with the persistent mapping, because the non-persistent
mapping uses incompatible flags.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
27bd241103 vbo: delay flagging FLUSH_STORED_VERTICES until glEnd
Only state changes see this, which can't occur before glEnd.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
ca99fe8a60 vbo: add/update unlikely statements in ATTR_UNION
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
a5f72c91e5 vbo: increase the size of the immediate mode buffer to decrease draw count
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
2fe771f4e9 vbo: use FlushVertices flags properly and clear NeedFlush correctly
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
63a241fa32 vbo: fix resizing 64-bit vertex attributes
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
077a843c27 vbo: optimize resizing vertex attributes during immediate mode
Just move data manually instead of copying all attributes back and forth.

This increases performance by 5% for Viewperf11/Catia - first scene.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
1f6e53e243 vbo: don't store glVertex values temporarily into exec
This improves performance by 4.3% in Viewperf11/Catia, first scene.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
cd7241c4f8 vbo: pass only either uint32_t or uint64_t into ATTR_UNION
This makes the next commit possible.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
afa7f1984a vbo: don't set FLUSH_UPDATE_CURRENT for glVertex
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
f8b98d48bf vbo: keep the immediate mode buffer always mapped for simplicity
It only unmaps when it draws with a non-persistent buffer.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
8c76ef5b59 vbo: don't check ctx->NewState twice in glBegin
_mesa_valid_to_render does it too.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
f2c6de1eec vbo: remove a funky recursive call in glBegin
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
653bd14730 vbo: interleave attrsz, attrtype, and active_sz in memory
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
2b22e33c10 vbo: remove immediate mode code that doesn't do anything and simplify stuff
no change in behavior

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
3e0d612f5e vbo: don't unmap persistent buffer mappings for glBegin/End
This significantly improves performance by lowering CPU overhead.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
03ded3d6ce vbo: skip FlushMappedBufferRange for glBegin/End by using a persistent mapping
This is a preparation for the next commit and just isolates the removal
of GL_MAP_FLUSH_EXPLICIT_BIT and other map flags that don't make sense with
UNSYNCHRONIZED.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
10cf7a5113 vbo: create the immediate mode buffer only in vbo_exec_vtx_map
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
f89ee44ab0 mesa: import PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET handling
This should decrease overhead in st_update_array.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
27dada7ce9 mesa: remove FLUSH_CURRENT calls that have no effect
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
c7c8fe1cc1 mesa: fix incorrect uses of FLUSH_CURRENT
FLUSH_CURRENT is used to copy attributes from the vbo module to
Current.Attrib. It flushes vertices too, but that's a side effect,
not the intent.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
01443dc738 glx: print FPS with 2 decimal places
useful if FPS is low.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3590>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3590>
2020-02-10 19:02:33 -05:00
Marek Olšák
1082e6fcb8 radeonsi: don't update states for the DCC MSAA bug on GFX6-7
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
2020-02-10 17:24:09 -05:00
Marek Olšák
fbb27eebc8 radeonsi: fix the DCC MSAA bug workaround
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
2020-02-10 17:24:02 -05:00
Gert Wollny
897a4a0041 r600/sfn: Add some documentation
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
7413aab3c8 r600/sfn: Add .editorconfig file
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
110ee7ff93 r600/sfn: Add support for SSBO load and store
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
148f0ad4f9 r600/sfn: Add support for atomic instructions
v2: fix compilation with gcc-6

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
90a7d2e08f r600: Make sure LLVM is not used for DRAW
For some reasone that is not yet clear the piglit
gl-1.0-rendermode-feedback makes use of the LLVM pipe draw module and
fails there with an assertion. Explicietly disabling LLVM fixes this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
37125b7cc2 r600/sfn: Add lowering UBO access to r600 specific codes
r600 reads vec4 from the UBO, but the offsets in nir are evaluated to the component.
If the offsets are not literal then all non-vec4 reads must resolve the component
after reading a vec4 component (TODO: figure out whether there is a consistent way
to deduct the component that is actually read).

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
32d3435a78 r600/sfn: Add GDS instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
5aadd809d0 r600/sfn: Add compute shader skeleton
This adds some very basic compute shader support.

v2: fix compilation with gcc-6

v3: rebase: correct barrier intrinstic

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
7fb5c835f7 r600/sfn: Add VS for TCS shader skeleton
This adds the VS shader type that handles the output to tesselation shaders

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
e17ac0d774 r600/sfn: Add support for geometry shader
v2: fix compilation with gcc-6

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
5c7124e134 r600/sfn: add emitVertex instructions
More preparation for GS support

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
f7ec616bed r600/sfn: Add MemRingOut instructions
Preparing support for Geometry shaders.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
1b17316bf3 r600/sfn: Add a load GDS result instruction
This is required to read results for atomic SSBO  instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
31a4dd6451 r600/sfn: Add lowering arrays to scratch and according instructions
Make use of the scratch space for arrays that are larger then 100 elements.
Since for IO r600 is vector based, there is a bit of a scratch space waste
here for arrays that use types smaller then vec4.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
5c19013904 r600/sfn: add register remapping
Make use of the live range evaluation to merge registers. Since the
live ranges are evaluated for register indices, the algorithm is not
optimal, but for most piglits up to glsl-3.3 it does the job.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
393655d5cb r600/sfn: add live range evaluation for the GPR
The algoritm is basically a copy of the TGSI implementation without the
array bits.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
24f683fe81 r600/sfn: Add the WaitAck instruction
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
e09cdb3f86 r600/sfn: Add the VS in and FS out vectorization
Since the nir default implementation doesn't support vectorizing the VS
inputs and FS outputs, additional lowering passes are added here to do
just that. The work is based on the Timothy Arceri's related work.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
c5d9456d84 r600: enable NIR backend DEBUG flag for supported architectures
When NIR is enabled, a few features that are not yet supported will be
explicitely disabled.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
f718ac6268 r600/sfn: Add a basic nir shader backend
This commit adds support for vertex and fragment shaders from NIR, and
support for most TEX and ALU instructions.

Thanks Dave Airlied for adding support for a number of ALU instructions.

v2: fix compilation with gcc-6
v3: rebase: use mesa/core glsl_type_size function

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
295be0e8df r600: Update state code to accept NIR shaders
v2: Correct commit message (Konstantin Kharlamov)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
51285bf32e r600: Add NIR compiler options
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
27cacd28ac r600: Increase space for IO values to agree with PIPE_MAX_SHADER_IN/OUTPUTS
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
4422ce1b04 r600: force new CF with TEX only if any texture value is written
This works aound splitting the CF when the gradient is set.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:07 +00:00
Neha Bhende
144561dc5e svga: Use pipe_shader_state_from_tgsi to set shader state
Use pipe_shader_state_from_tgsi() to set shader state for transformed
shader so that we get all correct data for respective shader state.

This fixes several regressed glretrace, piglit crashes found during merging
upsteam mesa

Fixes: bf12bc2dd7 (draw: add nir info gathering and building support)

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2020-02-10 09:27:11 -08:00
Neha Bhende
470e73e7f8 svga: fix size of format_conversion_table[]
Since we are now using sparse matrix for format_conversion_table,
we have to make sure we have last entry in table which gives the
sense of required size of format_conversion_table

Fixes: 84db6ba7 ("svga: Drop unsupported formats from the format table")

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2020-02-10 09:26:49 -08:00
Krzysztof Raszkowski
689817c9df gallium/swr: simplify environmental variabled expansion code
There were 2 versions of code doing the same thing.
Since std::regexp are locale-sensitive better is to leave old
good way to do this.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3761>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3761>
2020-02-10 17:10:47 +01:00
Samuel Pitoiset
34fd894e42 aco: fix waiting for scalar stores before "writing back" data on GFX8-GFX9
Seems required also on GFX8-GFX9 to achieve correct behaviour. This
is an undocumented behaviour but it makes real sense to me.

pipeline-db on GFX9:
Totals from affected shaders:
SGPRS: 1018 -> 1018 (0.00 %)
VGPRS: 516 -> 516 (0.00 %)
Code Size: 40516 -> 40636 (0.30 %) bytes
Max Waves: 280 -> 280 (0.00 %)

This fixes some sort of sun flickering with Assassins Creed Origins.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2488
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3750>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3750>
2020-02-10 12:07:25 +00:00
Georg Lehmann
7283c33b98 Vulkan overlay: use the corresponding image index for each swapchain
pImageIndices should be a pointer to the current image index
otherwise every swapchain but the first one could have a wrong image index

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3741>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3741>
2020-02-10 11:32:08 +00:00
Erik Faye-Lund
eb0195358c zink: only inspect dual-src limit if feature enabled
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3689>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3689>
2020-02-10 11:01:47 +00:00
Erik Faye-Lund
e365f83740 zink: emit blend-target index
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3689>
2020-02-10 11:01:47 +00:00
Erik Faye-Lund
8736ffae2e zink: replace unset buffer with a dummy-buffer
This fixes a crash in spec@!opengl 1.1@ppgtt_memory_alignment

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3673>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3673>
2020-02-10 10:40:19 +00:00
Samuel Pitoiset
18657c0c0a gitlab-ci: disable a630 tests as mesa-cheza is down (again)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3758>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3758>
2020-02-10 10:34:41 +01:00
Marek Olšák
35961b10da radeonsi: don't report that multi-plane formats are supported
Fixes: a554b45d - st/mesa: don't lower YUV when driver supports it natively
Closes: #2376

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3632>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3632>
2020-02-07 20:42:42 -05:00
Erik Faye-Lund
1c3f4c0704 zink: fixup sampler-usage
It seems I got this stuff all wrong, and looked at driver_location
rather than the binding. But since we mess with the binding, we need to
adjust things a bit to get things right.

This still isn't great as-is, but it seems to work. In the future, we
should move to having samplers always at bindings 0 and up, and just
update the bindings that are used by either of the stages. But this
band-aid should be OK for now.

This fixes 0AD for me.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3668>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3668>
2020-02-07 22:03:00 +00:00
Erik Faye-Lund
fa915a724f zink: lower away fdph
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3668>
2020-02-07 22:03:00 +00:00
Christian Gmeiner
0c36b1c0db etnaviv: enable texture upload memory throttling
Fixes oom-killer during piglit's streaming-texture-upload on a
SolidRun CuBox-i with 2GB of RAM.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3745>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3745>
2020-02-07 18:21:54 +00:00
Hyunjun Ko
7bddaa6136 freedreno/ir3: Fold const only when the type is float
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:53:48 -08:00
Hyunjun Ko
260bd32b58 freedreno/ir3: put the conversion back for half const to the right place.
The previous commit leads to match immed values unexpectedly.

This makes constlen for each shader including bvert wrong.
Also fixes atan2 for mediump deqp tests.

Fixes: cbd1f47433 ("freedreno/ir3: convert back to 32-bit values for half constant registers.")

v2: Move conversion up above fabs/fneg modifier handling as well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:53:42 -08:00
Hyunjun Ko
d70192e697 freedreno/ir3: Add cat4 mediump opcodes
v2: Reworked to assign half-opcodes in ir3_ra.c (krh).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:51:25 -08:00
Rob Clark
3eca6d9ce1 freedreno/ir3: fold const conversion into consumer
A sequence like:

  (nop3)cov.f32f16 hr0.x, c0.x
  mul.f hr4.y, hr1.z, hr0.x

can be turned into:

  mul.f hr4.y, hr1.z, hc0.x

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:51:25 -08:00
Hyunjun Ko
5e2012d5c7 freedreno/ir3: fix printing half constant registers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:51:25 -08:00
Kristian H. Kristensen
d55dfef782 freedreno/ir3: Set IR3_REG_HALF flag on src as well in immediate MOV
This lets is_same_type_reg() recognize that the dst and src of the
immediate MOV are the same and unblocks fp16 constant propagation.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:51:25 -08:00
Dylan Baker
fbfc8c3531 docs: Mark 20.0-rc2 as done
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3751>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3751>
2020-02-07 09:02:02 -08:00
Martin Fuzzey
d8bae10bfe freedreno: android: fix build of perfcounters.
Some dependencies were missing on android causing a build failure.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>
2020-02-07 16:34:49 +00:00
Martin Fuzzey
fad9924315 freedreno: android: add a6xx-pack.xml.h generation to android build
The generation of a6xx-pack.xml.h was missing in the android build scripts
leading to a build failure.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>
2020-02-07 16:34:49 +00:00
Martin Fuzzey
cad400a59e freedreno: android: fix build failure on android due to python version
The freedreno gen_header.py script now only works under python3.
It contains a "print()" call which prints a blank line under python3
but prints "()" under python2.7.

However the Android build currently uses python2.

This leads to incorrect code generation and a later build error.

.../STATIC_LIBRARIES/libfreedreno_registers_intermediates/registers/adreno_common.xml.h:163:2: error: expected identifier or '('
()

Fix this by adding MESA_PYTHON3 and using it for the freedreno scripts.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>
2020-02-07 16:34:49 +00:00
Krzysztof Raszkowski
ff8265b64f gallium/swr: Fix llvm11 compilation issues
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3747>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3747>
2020-02-07 15:03:55 +00:00
Georg Lehmann
f239bb8020 Vulkan Overlay: Don't try to change the image layout to present twice
The render pass already does the transition.
The pipeline barrier is still needed to transfer the queue family ownership.

Fixes: 320b0f66c2 ("vulkan/overlay: bounce image back to present layout")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3740>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3740>
2020-02-07 14:23:23 +00:00
Samuel Pitoiset
4b978cd950 aco: do not use ds_{read,write}2 on GFX6
According to LLVM, these instructions have a bounds checking bug.
LLVM only uses them on GFX7+.

This fixes broken geometry in Assassins Creed Origins.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2489
Fixes: 4a553212fa ("radv: enable ACO support for GFX6")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3746>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3746>
2020-02-07 14:17:06 +01:00
Tapani Pälli
da76dfb515 intel/vec4: fix valgrind errors with vf_values array
Fixes valgrind errors introduced since commit a8ec4082.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2346
Fixes: a8ec4082 ("nir+vtn: vec8+vec16 support")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3691>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3691>
2020-02-07 09:06:18 +00:00
Andreas Baierl
1572e8f3e1 lima/parser: Change value name in RSW parser
Second value of SHADER_ADDRESS is the length of the first instruction
in the shader, so give it a better name.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>
2020-02-07 09:26:32 +01:00
Andreas Baierl
5802259e54 lima/parser: Extend AUX0 findings
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>
2020-02-07 09:26:32 +01:00
Andreas Baierl
cebfb3169c lima/parser: Fix RSW depth test parsing
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>
2020-02-07 09:26:32 +01:00
Leandro Ribeiro
eaa0784fd3 i965: remove duplicated comment
Signed-off-by: Leandro Ribeiro <leandrohr@riseup.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2416>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2416>
2020-02-07 07:14:20 +02:00
Kristian H. Kristensen
26ab38f144 ci: Drop turnip opt-in option
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3742>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3742>
2020-02-07 01:36:58 +00:00
Dave Airlie
fbc117cba3 llvmpipe: advertise 4 vertex streams
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
7e6690b1a6 draw: don't emit vertex to streams with no outputs
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
72154c9075 draw: emit multiple streams to streamout.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
00c066e5a0 draw/gs: track emitted prims + verts per stream.
This adds tracking of the emitted prims/verts per-stream.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
0c77007c9d draw: change geom shader output to an array of outputs.
Instead of a single output ptr, pass in one per output stream.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
8583fcd8f1 gallivm/nir: add support for multiple vertex streams
This adds support to the nir shader build for multiple vertex streams
we store separate stats for each stream, then write them out in the epilogue.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
b668841313 gallivm/swr: add stream_id to geom epilogue emit
We want to pass a stream in here so we can write out separate
prim/vertex counts for each stream at the end.

This also adds an ignore any stream option so we can stage more code

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
9d70002744 llvmpipe/query: add support for indexed queries
This adds support for the queries needed for gpu_shader5 vertex streams

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Eric Anholt
658eb691fc ci: Bump the GLES CTS version to 3.2.6.1.
This brings in the surfaceless fixes so we don't need to check out the
whole repo to cherry pick any more (which was bothering me as I debugged
things late in the painfully slow ARM container build process).

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3662>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3662>
2020-02-06 15:18:24 -08:00
Eric Anholt
b37922dd1e ci: Disable a bunch of tests on freedreno a630.
On a daily basis I've been having to restart people's a630 jobs in the
front couple of pages of /merge_requests due to spurious failures from our
flaky tests, and fielding reports of spurious fails from other developers,
and babysitting my own marge merges that are failing due to our flakes.

Nobody should have to deal with that, especially not non-freedreno
developers, so just scrape the list of flakes reported to #freedreno-ci
for the last month and ban those tests that have failed more than once
until we have a credible fix.

Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3662>
2020-02-06 15:18:15 -08:00
Kristian H. Kristensen
b3063cbd18 turnip: Drop explicit configure opt-in for turnip
We don't need this silly thing anymore. Everthing here is WIP.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3739>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3739>
2020-02-06 13:23:40 -08:00
Eric Anholt
4ca77f347d u_tile: Skip the packed temporary and just store tiles directly.
We were generating a packed copy and then memcpying it, but we can just
pack directly to the destination.  Change on glmark2 -b build:use-vbo=true
is modest: 1.06328% +/- 0.994771% (n=84) but does remove the function that
was .6% of CPU time.

I'm not doing the equivalent "get" path at this time because softpipe's
texture cache has some clipping issues that get revealed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3698>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3698>
2020-02-06 20:48:03 +00:00
Jose Maria Casanova Crespo
68bb26af63 broadcom: Fix implicit declaration of ffs for Android build
Include util/bitscan.h to ensure ffs is available when there is no
glibc like in Android.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1983
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2554>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2554>
2020-02-06 18:31:13 +01:00
Rhys Perry
ce23911b77 aco: gfx10_wave64_bpermute reduce op to print_ir
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3683>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3683>
2020-02-06 16:43:03 +00:00
Rhys Perry
20eb1acb6f aco: fix gfx10_wave64_bpermute
Since 9254fb4fc7, the pass replaced the SCC clobber with the scalar
identity temporary. Just skip most of the temporary setup, since we don't
need it for gfx10_wave64_bpermute.

Although shuffles are disabled on GFX10, Detroit: Become Human seems to
use them anyway.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 9254fb4fc7 ('aco: don't use a scalar
       temporary for reductions on GFX10')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3683>
2020-02-06 16:43:03 +00:00
Georg Lehmann
1c79afd946 Correctly wait in the fragment stage until all semaphores are signaled
This fixes two issues:
- a crash if the application uses more than one semaphore for presenting because the driver expects one stage per semaphore
- the swapchain image could be not ready yet if the semaphores aren't signaled, #946 is possible related

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3718>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3718>
2020-02-06 15:16:47 +00:00
Thomas Hellstrom
451cf228d5 svga: Fix banded DMA upload
A previous commit ("winsys/svga: Limit the maximum DMA hardware buffer
size") made banded DMA transfer kick in when transfering gnome-shell
window contents under gnome-shell / wayland. This uncovered a bug where
we assumed that banded DMA transfers always occur to the top (y=0) of the
surface.
Fix this by taking the destination y offset into account.

Cc: 19.2 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Fixes: 287c94ea49 ("Squashed commit of the following:")
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3733>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3733>
2020-02-06 11:26:04 +00:00
Jason Ekstrand
5aec9e84a8 anv: No-op submit and wait calls when no_hw is set
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3734>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3734>
2020-02-06 10:48:33 +00:00
Lionel Landwerlin
f9febfae41 anv: set MOCS on push constants
v2: Also set MOCS on 3DSTATE_CONSTANT_ALL (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 67d2cb3e93 ("anv: Add get_push_range_address() helper.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3732>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3732>
2020-02-06 10:10:11 +00:00
Michel Dänzer
a140ea1ced llvmpipe: Bump test timeout to 180 seconds
120 still wasn't always enough for the s390x cross-build job, see e.g.
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/1551685

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3715>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3715>
2020-02-06 09:41:28 +00:00
Rafael Antognolli
4aa7af9e9a intel: Load the driver even if I915_PARAM_REVISION is not found.
This param is only available starting on kernel 4.1. Use a default
value of 0 if it is not found instead.

v2: Update commit message (Lionel)

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Mark Janes <mark.a.janes@intel.com>
Fixes: 96e1c945f2 ("i965: Move device info initialization to common
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3727>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3727>
2020-02-06 09:46:51 +02:00
Kenneth Graunke
20bcbcd958 isl: Fix the android build.
Fixes: 5bea0cf779 ("intel/isl: Move iris's pipe-to-isl format function to isl.")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3729>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3729>
2020-02-05 21:31:40 -08:00
Kenneth Graunke
a92be2fb26 intel/genxml: Drop "reserved" enum
This was adding "#define reserved 2" to genxml includes, which is a
fairly mean lowercase word to redefine.  It ends up breaking the build
on Android, which has __u32 reserved fields in headers.

Defining it also has no purpose.  Just drop it.

Fixes: 5bea0cf779 ("intel/isl: Move iris's pipe-to-isl format function to isl.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3729>
2020-02-05 21:31:27 -08:00
Vinson Lee
deb2bbf57e swr: Fix GCC 4.9 checks.
Fixes: f0a22956be ("swr/rast: _mm*_undefined_* implementations for gcc<4.9")
Fixes: e21fc2c625 ("swr/rast: non-regex knob fallback code for gcc < 4.9")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
2020-02-05 19:39:13 -08:00
James Xiong
205ce0bea5 gallium: let the pipe drivers decide the supported modifiers
fixes: ac0219cc5b ("gallium: dmabuf support for yuv formats that are not natively supported")

Signed-off-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3527>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3527>
2020-02-06 00:43:58 +00:00
James Xiong
d8569baaed iris: handle the failure of converting unsupported yuv formats to isl
Signed-off-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3527>
2020-02-06 00:43:58 +00:00
Eric Engestrom
76f300f2e4 Revert "egl: put full path to libEGL_mesa.so in GLVND json"
This reverts commit 0021f7dc30.

That commit had 2 issues:
- I missed the `.0` from the filename, causing issues on Debian & Ubuntu
  platforms.
- I didn't think about multilib/multi-arch systems, where we'd now need
  a separate json for each arch as they point to different libs.

Reverting this commit for now, I'll try again later.

Requested-by: Michel Dänzer <michel@daenzer.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2466
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2471
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2480
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3726>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3726>
2020-02-06 00:19:13 +00:00
Eric Engestrom
9595b23a45 meson: don't bother trying python2
Meson requires `python3`, so we know it's there, no need to fall back to
python2.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3701>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3701>
2020-02-05 23:17:26 +00:00
Timur Kristóf
4d34abd15c aco/optimizer: Don't combine uniform bool s_and to s_andn2.
Fixes: 8a32f57fff

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3714>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3714>
2020-02-05 22:53:45 +00:00
Eric Anholt
a77c3d5eed nouveau: Reuse tgsi_get_gl_varying_semantic().
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>
2020-02-05 22:26:00 +00:00
Eric Anholt
f4f769c851 nouveau: reuse tgsi_get_gl_frag_result_semantic().
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>
2020-02-05 22:25:59 +00:00
Eric Anholt
f9358f6f76 nouveau: Reuse tgsi_get_sysval_semantic().
It's now in a place accessible from the nouveau driver.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>
2020-02-05 22:25:59 +00:00
Eric Anholt
e25967d6b8 mesa/st: Move the SYSTEM_VALUE -> TGSI_SEMANTIC map to tgsi_from_mesa.
This will let us reuse the table from nir-to-tgsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>
2020-02-05 22:25:59 +00:00
Kristian H. Kristensen
9891062642 freedreno/a6xx: Implement layout for DRM_FORMAT_MOD_QCOM_COMPRESSED
This brings back fd6_fill_ubwc_buffer_sizes() to implement
layout_resource_for_modifier for DRM_FORMAT_MOD_QCOM_COMPRESSED.

Fixes: ecd62ff766 "freedreno: Allow UBWC on textures with multiple mipmap levels."
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>
2020-02-05 20:53:32 +00:00
Kristian H. Kristensen
d233c8c914 freedreno: Add layout_resource_for_modifier screen vfunc
This function is responsible for completing the layout for an imported
resource with the given modifier.  Returns 0 on success or -1 If the
modifier is unsupported, invalid or the input parameters are not
compatible with the modifier.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>
2020-02-05 20:53:32 +00:00
Kristian H. Kristensen
af6fb4f0a9 freedreno: Set up supported modifiers in fd*_resource_screen_init()
Keep the modifier logic together.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>
2020-02-05 20:53:32 +00:00
Kristian H. Kristensen
d0a7c8f4a8 freedreno/a6xx: Add fd6_resource_screen_init()
We'll move a few things here in the next commits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>
2020-02-05 20:53:32 +00:00
Eric Anholt
8d07d66180 glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.
This means you can directly use format utils on it without having to have
your own GL enum to number-of-components switch statement (or whatever) in
your vulkan backend.

Thanks to imirkin for fixing up the nouveau driver (and a couple of core
details).

This fixes the computed qualifiers for EXT_shader_image_load_store's
non-integer sizeNxM qualifiers, which we don't have tests for.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v3d)
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
2020-02-05 10:31:14 -08:00
Eric Anholt
5bea0cf779 intel/isl: Move iris's pipe-to-isl format function to isl.
This will get reused in the shader compiler once we switch it over to pipe
formats instead of GL enums.  We can't easily deduplicate i965's
mesa-to-isl mapping because of cases like A32_FLOAT that are mapped
differently.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
2020-02-05 10:31:09 -08:00
Eric Anholt
bb615e5fe3 mesa: Clean up some endianness adapters for shader image formats.
We already had a uint version in formats.h, move the snorm/unorm ones
there, too.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
2020-02-05 10:31:09 -08:00
Jan Zielinski
23c137612b gallium/swr: Fix various asserts and security issues
To improve the robustness of the code, we want to better
detect issues in testing (using asserts) and use more
secure techniques.

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3710>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3710>
2020-02-05 16:08:44 +00:00
Alyssa Rosenzweig
7eaf21cb6f pan/midgard: Fix scheduling issue with csel + render target reference
Fixes dEQP-GLES3.functional.shaders.fragdepth.write.dynamic_conditional_write

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Boris Brezillon
38c20696a5 panfrost: Set the MALI_WRITES_{Z,S} flags when needed
In order to make Z/S writes from fragment shaders effective, we need
to set the MALI_WRITES_{Z,S} flags when the shader has a
FRAG_RESULT_{DEPTH,STENCIL} output variable.

Now that shaders can change the S value, we can expose the
STENCIL_EXPORT cap.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Boris Brezillon
8ed94d38b4 panfrost: Add the MALI_WRITES_{Z,S} flags
We discovered 2 new shader flags used when a fragment shader updates
the depth/stencil value through a ZS writeout. If those flags are not
set, the depth/stencil value stored in the depth/stencil tilebuffer
remain unchanged.

While at it, rename unknown2 into flags_hi and rename flags into
flags_lo.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Boris Brezillon
0406ea4856 panfrost: Z24 variants should be sampled as R32UI
Midgard has no dedicated samplers for Z24S8 and Z24X8 formats, and the
GPU expects the depth to be encoded in an IEEE 32-bit float. Turn all
Z24_UNORM variants into R32UI and let the shader do the conversion
using bfe+fmul instructions.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Boris Brezillon
e1ba0cd452 pan/midgard: Add nir_intrinsic_store_zs_output_pan support
ZS fragment stores are done like color fragment stores, except it's
using a different RT id (0xFF), the depth and stencil values are stored
in r1.x and r1.y.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
[Fix the scheduling part]

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Boris Brezillon
f5619f5073 pan/midgard: Turn Z/S stores into zs_output_pan intrinsics
Midgard can't write depth and stencil separately. It has to happen in
a single store operation containing both. Let's add a panfrost specific
intrinsic and turn all depth/stencil stores into a packed depth+stencil
one.

Note that this intrinsic is not yet handled in emit_intrinsic(), but
we'll address that later.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Ian Romanick
59488cbbac intel/fs: Don't count integer instructions as being possibly coissue
Integer instructions don't coissue.  Before e64be391dd
("intel/compiler: generalize the combine constants pass"), this pass
only looked at float sources.  There's no shader-db data in that commit,
so I collected some.  The results are not good:

    Haswell
    total instructions in shared programs: 11898805 -> 11908127 (0.08%)
    instructions in affected programs: 1218680 -> 1228002 (0.76%)
    helped: 2
    HURT: 5171
    helped stats (abs) min: 12 max: 111 x̄: 61.50 x̃: 61
    helped stats (rel) min: 1.59% max: 9.20% x̄: 5.40% x̃: 5.40%
    HURT stats (abs)   min: 1 max: 311 x̄: 1.83 x̃: 1
    HURT stats (rel)   min: 0.02% max: 9.91% x̄: 1.05% x̃: 0.70%
    95% mean confidence interval for instructions value: 1.55 2.05
    95% mean confidence interval for instructions %-change: 1.02% 1.08%
    Instructions are HURT.

    total cycles in shared programs: 221664974 -> 221404750 (-0.12%)
    cycles in affected programs: 120012620 -> 119752396 (-0.22%)
    helped: 3464
    HURT: 3159
    helped stats (abs) min: 1 max: 428160 x̄: 314.55 x̃: 16
    helped stats (rel) min: <.01% max: 57.33% x̄: 3.40% x̃: 1.28%
    HURT stats (abs)   min: 1 max: 87846 x̄: 262.54 x̃: 14
    HURT stats (rel)   min: <.01% max: 85.57% x̄: 3.01% x̃: 0.77%
    95% mean confidence interval for cycles value: -224.23 145.65
    95% mean confidence interval for cycles %-change: -0.50% -0.19%
    Inconclusive result (value mean confidence interval includes 0).

    total spills in shared programs: 9804 -> 10047 (2.48%)
    spills in affected programs: 6869 -> 7112 (3.54%)
    helped: 2
    HURT: 41

    total fills in shared programs: 19863 -> 20319 (2.30%)
    fills in affected programs: 17428 -> 17884 (2.62%)
    helped: 2
    HURT: 41

    LOST:   20
    GAINED: 13

This also prevents regressions in "intel/fs: Promote integer constants
after lowering integer multiplication" (note: that patch will probably
not be committed).  When the passes are reorderd, code like

    mul(8)      acc0<1>D    g9<8,8,1>D  -2078209981D    { align1 1Q };

gets turned into

    mov(1)      g23<1>D     2078209981D                 { align1 WE_all 1N };
    ...
    mul(8)      acc0<1>D    g13<8,8,1>D  -g23<0,1,0>D   { align1 1Q compacted };

It's not 100% clear why, but these produce different results.  Note that
-2078209981 & 0x0ffff = 0x0843, and -(2078209981 & 0x0ffff) =
0xffff0843.  It seems like the upper 16-bits of the negation should be
ignored.

Fixes: e64be391dd ("intel/compiler: generalize the combine constants pass")
Cc: Iago Toral Quiroga <itoral@igalia.com>
Suggested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

The shaders with spills or fills hurt are the usual suspects.  A couple
compute shaders in Dirt Showdown and a compute shader in Bioshock
Infinite.  On Haswell, a compute shader (that appears twice in
shader-db) from Aztec Ruins was also hurt for spill and fills.

Haswell
total instructions in shared programs: 11573934 -> 11568335 (-0.05%)
instructions in affected programs: 828623 -> 823024 (-0.68%)
helped: 2825
HURT: 6
helped stats (abs) min: 1 max: 134 x̄: 2.16 x̃: 1
helped stats (rel) min: 0.02% max: 9.05% x̄: 0.84% x̃: 0.61%
HURT stats (abs)   min: 1 max: 216 x̄: 81.83 x̃: 56
HURT stats (rel)   min: 0.16% max: 8.65% x̄: 4.21% x̃: 4.68%
95% mean confidence interval for instructions value: -2.31 -1.64
95% mean confidence interval for instructions %-change: -0.85% -0.80%
Instructions are helped.

total cycles in shared programs: 187573593 -> 187004633 (-0.30%)
cycles in affected programs: 82816107 -> 82247147 (-0.69%)
helped: 2186
HURT: 1741
helped stats (abs) min: 1 max: 35230 x̄: 326.96 x̃: 16
helped stats (rel) min: <.01% max: 46.11% x̄: 3.11% x̃: 0.90%
HURT stats (abs)   min: 1 max: 6138 x̄: 83.73 x̃: 16
HURT stats (rel)   min: <.01% max: 104.11% x̄: 2.73% x̃: 0.75%
95% mean confidence interval for cycles value: -197.13 -92.64
95% mean confidence interval for cycles %-change: -0.72% -0.33%
Cycles are helped.

total spills in shared programs: 7870 -> 7743 (-1.61%)
spills in affected programs: 2260 -> 2133 (-5.62%)
helped: 31
HURT: 5

total fills in shared programs: 6320 -> 6263 (-0.90%)
fills in affected programs: 3547 -> 3490 (-1.61%)
helped: 31
HURT: 6

LOST:   9
GAINED: 9

Ivybridge
total instructions in shared programs: 11863372 -> 11859793 (-0.03%)
instructions in affected programs: 757183 -> 753604 (-0.47%)
helped: 2236
HURT: 3
helped stats (abs) min: 1 max: 81 x̄: 1.86 x̃: 1
helped stats (rel) min: 0.03% max: 5.26% x̄: 0.74% x̃: 0.48%
HURT stats (abs)   min: 11 max: 301 x̄: 192.33 x̃: 265
HURT stats (rel)   min: 1.55% max: 10.51% x̄: 6.89% x̃: 8.62%
95% mean confidence interval for instructions value: -2.01 -1.18
95% mean confidence interval for instructions %-change: -0.77% -0.70%
Instructions are helped.

total cycles in shared programs: 178377378 -> 177946087 (-0.24%)
cycles in affected programs: 76261390 -> 75830099 (-0.57%)
helped: 1635
HURT: 1395
helped stats (abs) min: 1 max: 34796 x̄: 333.53 x̃: 16
helped stats (rel) min: <.01% max: 47.15% x̄: 2.82% x̃: 0.64%
HURT stats (abs)   min: 1 max: 4315 x̄: 81.74 x̃: 18
HURT stats (rel)   min: <.01% max: 49.98% x̄: 1.99% x̃: 0.53%
95% mean confidence interval for cycles value: -197.06 -87.62
95% mean confidence interval for cycles %-change: -0.78% -0.43%
Cycles are helped.

total spills in shared programs: 4188 -> 4182 (-0.14%)
spills in affected programs: 1557 -> 1551 (-0.39%)
helped: 30
HURT: 3

total fills in shared programs: 5056 -> 5245 (3.74%)
fills in affected programs: 2708 -> 2897 (6.98%)
helped: 30
HURT: 3

LOST:   5
GAINED: 1

No shader-db changes on any other Intel platform.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3544>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3544>
2020-02-05 15:13:17 +00:00
Connor Abbott
8455648cca tu: Move vsc_data and vsc_data2 allocation into the device
In addition to preparing us for dynamically resizing them, which has to
be controlled by the device, this greatly reduces the memory usage when
allocating large numbers of command buffers, making
dEQP-VK.api.object_management.max_concurrent.command_buffer_primary go
from crash -> pass.

Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3621>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3621>
2020-02-05 15:27:28 +01:00
Connor Abbott
84bd4da468 freedreno: Fix CP_COND_EXEC
Noticed while looking at a trace of the Vulkan blob.

Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>
2020-02-05 13:14:22 +00:00
Connor Abbott
ed5d1c1c47 freedreno: Add CP_REG_WRITE documentation
Document the first DWORD, which at least for the Vulkan blob on a640
isn't always 2.

Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>
2020-02-05 13:14:22 +00:00
Connor Abbott
65197a3ac1 freedreno: Fix CP_COND_REG_EXEC bit positions
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>
2020-02-05 13:14:22 +00:00
Michel Dänzer
8be81f8a2a gitlab-ci: Build radeonsi & RADV in the ppc64el job
This requires cross-building libdrm for ppc64el.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
2020-02-05 10:52:31 +00:00
Michel Dänzer
65610ec774 gitlab-ci: Add ppc64el and s390x cross-build jobs
Using LLVM 8 for ppc64el and 7 for s390x (which hits some coroutine
related issues with LLVM 8).

There are some test failures we need to ignore for now. Also, the
timeout needs to be bumped from the default 30s for some tests, because
they can take longer under emulation.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
2020-02-05 10:52:31 +00:00
Michel Dänzer
a443f81f26 gitlab-ci: Merge ccache and libxml2-utils into main apt-get install
The motivation for this is that we want to make use of the meson cross
files in this script, which have the ccache compiler paths.

We need to remove the ccache directory at the end, it would just waste
space in the image for no benefit.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
2020-02-05 10:52:31 +00:00
Michel Dänzer
a06fc0296d gitlab-ci: Pass -j4 to make
Might speed up x86_build docker image build a little.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
2020-02-05 10:52:31 +00:00
Michel Dänzer
84fefa206c gitlab-ci: Update to latest ci-templates HEAD
Among other things, this increases robustness when copying a docker
image from the main Mesa project to a forked project, avoiding spurious
image rebuilds from scratch.

Also drop the comment about .gitlab-ci/lava-gitlab-ci.yml, it doesn't
include the templates anymore.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
2020-02-05 10:52:31 +00:00
Pierre-Eric Pelloux-Prayer
3da91b3327 radeonsi/ngg: add VGT_FLUSH when enabling fast launch
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2418
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2426
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2434
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3675>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3675>
2020-02-05 10:27:54 +00:00
Eric Engestrom
2799676218 util/disk_cache: check for write() failure in the zstd path
CoverityID: 1458074
Fixes: a8d941091f ("util: Use ZSTD for shader cache if possible")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3672>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3672>
2020-02-05 01:09:04 +00:00
Eric Engestrom
6321e3fb9f dri: delete gen-symbol-redefs.py
Introduced in ba10d79cca but it looks like it was never wired
into anything.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3669>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3669>
2020-02-05 00:46:46 +00:00
Lionel Landwerlin
bcb611361b anv: implement gen12 post sync pipe control workaround
Same as Skylake.

v2: Restrict to A0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
2020-02-05 00:25:48 +00:00
Lionel Landwerlin
8949d27bb8 anv: implement gen9 post sync pipe control workaround
We've been missing this workaround for a while and since it's required
for Gen12, let's implement it for Gen9 first.

v2: Update comment for Gen9.

v3: Fix clearing of bits... (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
2020-02-05 00:25:48 +00:00
Lionel Landwerlin
19e7bcee17 iris: implement gen12 post sync pipe control workaround
Like Skylake, Gen12 requires a workaround for PIPE_CONTROLs using a
post-sync operation.

v2: Restrict to A0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
2020-02-05 00:25:48 +00:00
Rob Clark
2c07e03b79 freedreno: allow ctx->batch to be NULL
This was mostly true already, now that we use `fd_context_batch()` for
first access to batch in draw/clear/grid paths.  So we can drop the old
code in `batch_flush()` that tried to prevent `ctx->batch` from being
NULL.

Fixes a crash with a large number of tabs in chromium.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3700>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3700>
2020-02-04 23:59:33 +00:00
Eric Anholt
22d2cbe685 freedreno: Allow UBWC on textures with multiple mipmap levels.
This is a backport of Jonathan Marek's UBWC work on turnip to GL.

Performance highlights from our trace set (320 frames sampled)
traces/glmark2/texture-texture-filter=mipmap.rdc:    +9.1% +/-   2.2%
traces/android/trex.rdc:                             +8.7% +/-   0.4%
traces/glmark2/desktop-effect=shadow:windows=4.rdc:  +4.2% +/-   2.5%

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
ecd62ff766 freedreno: Disable UBWC on Z24S8 if not TEXTURE_2D.
Fixes two of our three remaining GLES CTS failures, and avoids more
regressions once we enable UBWC mipmaps.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
ddb0b35b76 freedreno: Blit all array levels when uncompressing UBWC.
Fixes regressions in GLES CTS's format_reintepret once we enable UBWC
with mipmaps.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
6b586d5a48 freedreno: Swap the whole resource layout in shadowing.
Let's not have to worry about whether this unusual code path gets
updated whenever we adjust what is in the layout struct.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
f9f5d3eb55 freedreno/a6xx: Disable the core layer-size setup.
This was getting in the way of UBWC mipmap handling.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
17312b4a10 freedreno: Rename the UBWC layer size field and store it as bytes.
This makes the field description match its usage in the code, matches tu's
usage of the field, and avoids storing values in surprising units.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
b6b4118bb0 freedreno: Include the layer size in layout debug.
It's been many of my bugs so far.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
20357dfde8 freedreno: Move the layout debug under FD_MESA_DEBUG=layout.
I keep wanting to turn this on while debugging layout stuff, and I
suspect krh and robclark could use it too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Bas Nieuwenhuizen
65a6dc5139 radv: Do not set SX DISABLE bits for RB+ with unused surfaces.
The extra bits in CB_SHADER_MASK break dual source blending in
SkQP on a Stoney device. However:

- As far as I can tell, some other dual source blend tests are passing
  before and after the change.
- A hacked around skqp passes on my Vega desktop and Raven laptop
- Getting Skqp to give any useful info or to run it outside of Android
  on ChromeOS is proving difficult.

I have confirmed 3 strategies that seem to work:
- The old radv behavior of setting CB_SHADER_MASK to 0xF
- AMDVLK: CB_SHADER_MASK = 0xFF, and the 3 RB+ regs
  are 0.
- radeonsi: CB_SHADER_MASK = 0xFF, but does not set DISABLE
  bits in SX_BLEND_OPT_CONTROL for CB 1-7.

Let us use the radeonsi solution as that solution also seems like the correct
thing to do for holes. I have tested on my Raven laptop that setting the high
surfaces to not disabled and downconvert to 32_R does not imply a performance
penalty.

Fixes: e9316fdfd4 "radv: fix setting CB_SHADER_MASK for dual source blending"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3670>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3670>
2020-02-04 21:22:30 +00:00
Marek Olšák
17303c9851 mesa: implement missing display list functions while switching to the template
The vbo_init_tmp.h template tells us which functions are unimplemented.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
2020-02-04 15:12:05 -05:00
Marek Olšák
56de59b931 vbo: move reusable code from vbo_attrib_tmp.h into vbo_util.h
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
2020-02-04 15:12:03 -05:00
Marek Olšák
052e8f758e vbo: use the template for save GLvertexformat initialization
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
2020-02-04 15:12:01 -05:00
Marek Olšák
9ec5e96ec8 vbo: use the template for noop GLvertexformat initialization
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
2020-02-04 15:12:00 -05:00
Marek Olšák
d447a4888f vbo: move GLvertexformat initialization into a template header file for reuse
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
2020-02-04 15:11:58 -05:00
Eric Engestrom
cae6093266 freedreno/perfcntrs: fix fd leak
CoverityID: 1110568, 1458071
Fixes: 5a13507164 ("freedreno/perfcntrs: add fdperf")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3671>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3671>
2020-02-04 19:26:40 +00:00
Eric Anholt
8a2c507a8a util: Drop unpacking from int signed to unsigned and vice versa.
After all the previous cleanups, it's clear that the callers only ever
ask for SINT->SINT or UINT->UINT.  Cuts 20k of compiled text from
gallium drivers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
1d367c3aa5 gallium: Refactor some single-pixel util_format_read/writes.
We can use the new row helpers to cut down on the noise.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
ab081970e0 gallium: Add and use a helper for packing uc from a color_union.
The same pattern kept coming up, and we don't need to hit
util_format_write_4* to do it when we have util_format_pack_rgba().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
b2a2cf492d softpipe: Refactor pipe_get/put_tile_rgba_* paths.
We always want the same behavior of choosing which unpack to do to
generate our 4x32-bit RGBA values, so just sink that choice down below
the pipe_get/put_tile API.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
8bc56551da softpipe: Drop the raw_to* part of the tile cache interface.
Nothing else uses it, so make it static.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
6cdf523f00 gallium/util: Remove pipe_get_tile_z/put_tile_z.
The previous caller wasn't using it as tiled, just row-at-a-time, and
didn't want the clipping (since copytexsubimage comes in clipped).  If
someone wanted these functions again in the future, they should be
rewritten on u_format_pack/unpack.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
e986f2b7af mesa/st: Use direct util_format_pack/unpack instead of u_tile.
We're doing a row at a time, and don't need u_tile's clipping.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
c574cda3c6 util: Make helper functions for pack/unpacking pixel rows.
Almost all users of the unpack functions don't have strides to plug in
(and many are only doing one pixel!), and this will help simplify
them.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Karol Herbst
333c9d5bb0 clover: add trivial clCreateCommandQueueWithProperties implementation
It's not adding 2.0 features, but it's enough to run the 2.0 CTS on top of
clover and probably most CL applications using it.

We just fail if we hit unknown properties and that's probably good enough
until we implement the other bits properly.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2370>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2370>
2020-02-04 18:09:23 +00:00
Eric Anholt
b064697af1 gallium/osmesa: Try to fix the test for big-endian.
Our packed expected values will be byte-swapped for the (mostly) array
formats we're testing.

Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:08 +00:00
Eric Anholt
dd899fd43e gallium/osmesa: Fill out other format tests.
Move expected values/bpp into the test params, add more formats now that
we've fixed context setup so that they work.

Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:08 +00:00
Eric Anholt
0a53918f02 gallium/osmesa: Fix MakeCurrent of non-8888 contexts.
OSMesa is weird and you only get the type (byte/ubyte/565/etc.) at
MakeCurrent time, having only a channel order at CreateContext time.  The
code was setting up a visual at CreateContext time, and then at
MakeCurrent it would fail to validate against the visual.

Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:08 +00:00
Eric Anholt
655394c6ed gallium/osmesa: Fix a typo in the unit test's test names.
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:08 +00:00
Danylo Piliaiev
75c50d0342 osmesa/tests: Cover OSMESA_RGB GL_UNSIGNED_BYTE case
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:08 +00:00
Danylo Piliaiev
d83abf1d37 st/mesa: Handle the rest renderbuffer formats from OSMesa
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2189
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/989
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2036
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:07 +00:00
Eric Engestrom
d1165ad18b util/os_socket: fix header unavailable on windows
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2464
Fixes: e62c3cf350 ("util/os_socket: Include unistd.h to fix build error")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
2020-02-04 17:33:49 +00:00
Danylo Piliaiev
36126b6211 i965: Do not set front_buffer_dirty if there is no front buffer
Otherwise there will be a warning:
 "libEGL warning: FIXME: egl/x11 doesn't support front buffer rendering."

Happens with EGL_KHR_surfaceless_context:

 eglMakeCurrent(egl_display, EGL_NO_SURFACE, EGL_NO_SURFACE, egl_context)
 eglMakeCurrent(egl_display, egl_surface, egl_surface, egl_context)
 glFlush() // Here will be a warning

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1525
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3628>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3628>
2020-02-04 15:41:05 +00:00
Tomeu Vizoso
9afdcd64f2 gitlab-ci: Switch kernel for LAVA jobs to 5.5
All fixes we were carrying in our branch have been merged already.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3692>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3692>
2020-02-04 15:46:34 +01:00
Alyssa Rosenzweig
162927e43c panfrost: Use size0 when calculating the offset to a depth level
Previously, we were using cubemap_stride and sometimes overwriting other
BOs such as shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3692>
2020-02-04 15:46:30 +01:00
Tomeu Vizoso
64541dd698 panfrost: Only clamp the LOD to disable mipmapping when needed
Otherwise, we may be incrementing max_lod over the limit, causing a
DATA_INVALID_FAULT.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3692>
2020-02-04 15:46:26 +01:00
Tomeu Vizoso
255227ecec panfrost: Fix decoding of tiled 3D textures
From decoding cmd streams generated by the blob, the pointers in the
payload don't seem to include those that refer to different depth levels
when the texture is in tiled format.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3692>
2020-02-04 15:46:06 +01:00
Erik Faye-Lund
fd27fb5113 st/mesa: use uint-result for sampling stencil buffers
Otherwise, we end up mismatching the result-type and the sampler-type.

Fixes: 642125edd9 ("st/mesa: use uint-samplers for sampling stencil buffers")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3680>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3680>
2020-02-04 07:43:36 +00:00
Alyssa Rosenzweig
9cdd89a34b pan/midgard: Remove unused variable
../src/panfrost/midgard/mir.c: In function ‘mir_bytemask_of_read_components_index’:
../src/panfrost/midgard/mir.c:471:18: warning: unused variable ‘mask’ [-Wunused-variable]
  471 |         uint16_t mask = 0;

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3684>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3684>
2020-02-04 08:24:37 +01:00
Alyssa Rosenzweig
0f3eb7989b pan/midgard: Check for null consts
Valid shaders shouldn't hit this, but Coverity doesn't know that.

CID 1458029:    (FORWARD_NULL)
Passing null pointer "consts" to "print_scalar_field", which dereferences it.

Tomeu: Fix name of variable

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3684>
2020-02-04 08:24:33 +01:00
Alyssa Rosenzweig
8ec4028d40 panfrost: Avoid overlapping copy
CID 1457486:  Memory - corruptions  (OVERLAPPING_COPY)

Assigning "(*attr).extra_flags = (*attr).size = 0U" to "(*attr).stride",
which have overlapping memory +locations.

Coverity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3684>
2020-02-04 08:24:18 +01:00
Marek Vasut
c32bd325e7 etnaviv: Destroy rsc->pending_ctx set in etna_resource_destroy()
Destroy rsc->pending_ctx set in etna_resource_destroy(), otherwise
the memory is allocated, never free'd, and becomes unreachable. This
fixes a memory leak.

Fixes: 9e672e4d20 ("etnaviv: keep references to pending resources")
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3633>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3633>
2020-02-04 06:27:19 +00:00
Kristian H. Kristensen
df6a2a7197 turnip: Be explicit about converting vk compare func to a6xx
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
6dd57f0e38 nir: Remove always-true assert
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
e3dfa8f4d6 glsl: Use 'using' to be explicit about visitor overloads
Clang has a warning about overloading virtuals that triggers when a
derived class defines a virtual function that's an overload of
function in the base class.  This kind of thing:

  struct chart; // let's pretend this exists
  struct Base
  {
      virtual void* get(char* e);
  };

  struct Derived: public Base {
      virtual void* get(chart* e); // typo, we wanted to override the same function
  };

The solution is to use

  using Base::get;

to be explicit about the intention to reuse the base class virtual.
We hit this a lot with out glsl ir_hierarchical_visitor visitor
pattern, so let's adds some 'using' to calm down the compiler.

See-also: https://stackoverflow.com/questions/18515183/c-overloaded-virtual-function-warning-by-clang)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
0bc516fceb spirv/opencl: Cast opcode up front to avoid warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
67dd51606c freedreno/fdperf: Cast away some ignored return values
This is developer tool, it can crash and burn if it fails to allocate.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
2be81a3bfa nir: Make unroll pragma work on clang
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
de856c6170 nir: Delete unused is_var_constant() helper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Fritz Koenig
42f7e124ca Revert "gitlab-ci: disable a630 tests as mesa-cheza is down"
This reverts commit f38851d84c

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3687>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3687>
2020-02-03 21:45:16 +00:00
Jan Vesely
0ccda2ebff clover: Use explicit conversion from llvm::StringRef to std::string
Fixes build after llvm 777180a32b61070a10dd330b4f038bf24e916af1
("[ADT] Make StringRef's std::string conversion operator explicit")

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2020-02-03 21:25:59 +00:00
Erik Faye-Lund
5d83314945 zink: disallow depth-stencil blits with format-change
The Vulkan spec says this about vkCmdBlitImage:

   "No format conversion is supported between depth/stencil images. The
    formats must match."

So yeah, let's stop trying to do this.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3681>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3681>
2020-02-03 21:42:52 +01:00
Erik Faye-Lund
85d4b41f68 zink: be more careful about the mask-check
We currently disallow blits that we can support. Let's be more accurate
when checking the mask.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3681>
2020-02-03 21:42:49 +01:00
Boris Brezillon
b550b7ef3b panfrost: Fix the damage box clamping logic
When the rendering are is not covering the whole FBO, and the biggest
damage rect is empty, we can have damage.max{x,y} > damage.min{x,y},
which leads to invalid reload boxes.

Fixes: 65ae86b854 ("panfrost: Add support for KHR_partial_update()")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Boris Brezillon
2b089e26bf pan/midgard: Stop leaking instruction objects in mir_schedule_alu()
Allocate those instructions with ralloc() instead of using mem_dup.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Boris Brezillon
c7e68d8625 pan/midgard: Don't check 'branch && branch->writeout' twice in mir_schedule_alu()
There's a writeout bool storing the result of this test. Use it instead
of duplicating the test.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Boris Brezillon
ef89a52fe5 pan/midgard: Lower bitfield extract to shifts
Let's lower bitfield extract to shifts until we figure out if it can be
natively supported.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Boris Brezillon
c68cd39eb3 pan/midgard: Make sure we pass the right RT id to emit_fragment_store()
nir_intrinsic_base() is assigned nir_variable.data.driver_location,
which is assigned a unique ID based on the variable position in the
shader variable list. There's no guarantee that this position will
match the RT id we want to pass to emit_fragment_store().

Add a search_var() helper to retrieve a nir_variable based on its driver
location, so we can pass the right RT value to emit_fragment_store().

We also make sure the shader output is color, since emit_fragment_store()
is not ready for depth/stencil stores yet.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Boris Brezillon
25946be4c4 pan/midgard: Add an enum to describe the render targets
We are about to add a special ZS render target, let's add a enum so we
can easily know which render target we're dealing with.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Bernd Kuhls
e62c3cf350 util/os_socket: Include unistd.h to fix build error
Fixes

In file included from ../src/util/os_socket.c:8:
../src/util/os_socket.h:26:1: error: unknown type name ‘ssize_t’; did you mean ‘size_t’?
 ssize_t os_socket_recv(int socket, void *buffer, size_t length, int flags);

seen with gcc version 8.3.0 (Buildroot 2019.11) and uClibc 1.0.32.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: ef5266ebd5 ("util/os_socket: Add socket related functions.")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3659>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3659>
2020-02-03 10:55:44 +00:00
Eric Engestrom
f38851d84c gitlab-ci: disable a630 tests as mesa-cheza is down
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3677>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3677>
2020-02-03 10:08:25 +00:00
Ilia Mirkin
a4e6270541 nv50: report max lod bias of 15.0
The blob returns 15, the state creation code clamps it to 15, but since
the dawn of time we've returned 4.0. Setting this to 15 also fixes

GTF-GL33.gtf21.GL3Tests.texture_lod_bias.texture_lod_bias_clamp_m_le_M

which is sensitive to these limits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2020-02-02 22:01:18 -05:00
Eric Engestrom
0021f7dc30 egl: put full path to libEGL_mesa.so in GLVND json
This is useful when installing to a non-standard path.

glvnd_icd.py copied & adapted from src/intel/vulkan/anv_icd.py

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3038>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3038>
2020-02-02 17:46:17 +00:00
Bas Nieuwenhuizen
d5fd8cd46e radv: Allow non-dedicated linear images and buffer.
Requested for virtualized Vulkan as they need to export memory to
map it.

Since radeonsi and the kernel assume an image without metadata is
linear, this should work just fine.

Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3583>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3583>
2020-02-02 17:47:14 +01:00
Alyssa Rosenzweig
38f963226b pan/midgard: Implement mixed-type constant packing
Lot of churn but mostly just specializes types per source instead of per
instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653>
2020-02-02 15:51:06 +00:00
Alyssa Rosenzweig
a12fe52cbc pan/midgard: Break out one-src read_components
For constant packing, this is interesting to break down further.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653>
2020-02-02 15:51:06 +00:00
Icecream95
b74212e701 panfrost: Fix non-debug builds
For non-debug builds, where assertions are compiled out, GCC complains
about the end of the non-void function panfrost_translate_channel_width
being reached.

Fixes: 226c1efe9a ("panfrost: Add more info to some assertions")
Reported-by: Piotr Oniszczuk
Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3665>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3665>
2020-02-02 15:33:17 +00:00
Jason Ekstrand
d7fe9af620 anv/blorp: Use the correct size for vkCmdCopyBufferToImage
Now that we're using an uncompressed format for the buffer, we have to
scale down the dimensions we pass into BLORP when doing buffer->image
copies.

Fixes: dd92179a72 "anv: Canonicalize buffer formats for image/buffer..."
Closes: #2452
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3664>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3664>
2020-02-02 11:41:09 +00:00
Eric Engestrom
8ff613dc58 VERSION: bump after 20.0 branch point
Closes: #2457
2020-02-02 06:54:14 +00:00
Vinson Lee
02658df152 lima: Fix build with GCC 10.
This patch fixes this build error with GCC 10.

/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_context.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_resource.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_draw.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_bo.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_submit.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_util.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_texture.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here

Fixes: d71cd245d7 ("lima: Rotate dump files after each finished pp frame")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2020-01-31 19:18:58 -08:00
Rob Clark
982d61e2cd freedreno/ir3: fix a dirty lie
Lies, damn lies, and leftover hacks!

We no longer hard-code these two, so fix the disasm to print the correct
values.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
752aeb7b3f freedreno/ir3: simplify split from collect
In some cases we need to split components out from what was already a
collect.  That was making it hard to DCE unused components of the
collect.  (Ie. unused components of fragcoord, etc)

So just detect this case and skip the chained collect+split.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
8d0e7d9a4c freedreno/ir3: create fragcoord instructions in input block
This was somehow working to create the instructions in a random block,
and use the value in other blocks, by dumb luck.  But two-pass-RA's
better choice of register assignment causes a couple dEQPs to start
failing without this fix:

dEQP-GLES3.functional.shaders.metamorphic.bubblesort_flag.variant_1
dEQP-GLES3.functional.shaders.metamorphic.bubblesort_flag.variant_2

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
fb09020ef2 freedreno/ir3: remove unused tex arg harder
Just killing the SSA link isn't enough.  It confuses RA, legalize,
and postsched to see a bogus unused reg.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
2ffe44ec0a freedreno/ir3: add RA sanity check
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
2f4f46b708 freedreno/a6xx: fix lrz overflow
Running the complete deqp_gles2 seems to trigger an overflow in lrz
cmdstream.  We skip the blit clear fast-path if there have been any
draws (so mid-batch clears of any attached buffer hit the 3d pipe).
Which means it is safe to simply discard any lrz clear rendering.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
3e79c4f0ed freedreno/ir3: two pass register allocation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
b0293af7a5 freedreno/ir3: don't precolor unused inputs
This apparently can happen with gs/tess.  And will cause problems with
two-pass-ra, so lets just skip them.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
ad2587d3c8 freedreno/ir3: add is_tex_or_prefetch()
Some of the aspects of tex prefetch are in common with normal tex
instructions, such as having a wrmask to control which components
are written.  Add a helper for this.

This should result in actually using the prefetch wrmask to avoid
fetching unneeded components.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
4a7a6c9ef0 freedreno/ir3: number instructions from one
ra_block_compute_live_ranges() treats zero as "not yet defined", so
probably best to not let this be a valid instruction #

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
0f78c32492 freedreno/ir3: post-RA sched pass
After RA, we can schedule to increase parallelism (reduce nop's) without
worrying about increasing register pressure.  This pass lets us cut down
the instruction count ~10%, and prioritize bary.f, kill, etc, which
would tend to increase register pressure if we tried to do that before
RA.

It should be more useful if RA round-robin'd register choices.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
3369406e44 freedreno/ir3: fix kill scheduling
kill (and other cat0/flow instructions) do not have a dst register.
Which was mostly harmless before, other than RA thinking it would need
a free register to write.  (But nothing consumed it, so the value would
be immediately dead.)  But this would cause more problems with postsched
which would see a bogus dependency.

Also, post-RA sched *does* need to see the dependency on the predicate
register.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
9a9f78f1f9 freedreno/ir3/ra: make use()/def() functions instead of macros
Originally these were nested functions, which worked nicely, giving us
the function of a local macro that was actual 'c' syntax (ie. not token
pasted macro).  But these were converted to macros because clang doesn't
let us have nice gcc extensions.

Extract these back out into functions, before adding more things and
making the macros even more cumbersome.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
a5f24f966a freedreno/ir3: a bit more optmsgs debug
Also dump where arrays are allocated.  This was useful for debugging.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
300d1181c7 freedreno/ir3: move atomic fixup after RA
A post-RA sched pass will move the extra mov's to the wrong place, so
rework the fixup so it can run after RA (and therefore after postsched)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
304b50c9f8 freedreno/ir3: move block-scheduling into legalize
We want to do this only once.  If we have post-RA sched pass, then we
don't want to do it pre-RA.  Since legalize is where we resolve the
branch/jumps, we might as well move this into legalize.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
093c94456b freedreno/ir3: move nop padding to legalize
This way we can deal with it in one place, *after* all the blocks have
been scheduled.  Which will simplify life for a post-RA sched pass.

This has the benefit of already taking into account nop's that legalize
has to insert for non-delay related reasons.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
c803c662f9 freedreno/ir3: split out delay helpers
We're going to want these also for a post-RA sched pass.  And also to
split nop stuffing out into it's own pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
54c795f829 freedreno/ir3: fix crash when no non-input instructions
This scenario can come up with block-sched and nop-sched moved to after
RA.  So lets fix it first to keep things bisectable.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
c1194e10b2 freedreno/ir3: cleanup after lower_locals_to_regs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
f0b792ea06 freedreno/ir3: shuffle a few ir3_register fields
It makes life easier for postsched to always be able to rely on wrmask.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Anuj Phogat
95831e2f66 intel/gen12+: Set way_size_per_bank to 4
This patch fixes the way_size_per_bank for Gen12+

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge<sagar.ghuge@intel.com>
2020-01-31 18:14:54 -08:00
Anuj Phogat
00a84c170a intel/gen12+: Reserve 4KB of URB space per bank for Compute Engine
This patch is required to fix 11K+ vulkan CTS failures we were
getting with way_size_per_bank of 4 (see next patch).

Thanks to Sagar Ghuge and Jordan Justen for all the hard work of
debugging and testing.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge<sagar.ghuge@intel.com>
2020-01-31 18:14:54 -08:00
Szymon Andrzejuk
c0d8b373ad virgl: Use align_free for align_malloc allocated buffer
Signed-off-by: Szymon Andrzejuk <s.andrzejuk@samsung.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2020-02-01 00:41:38 +00:00
Rob Clark
d326d30efe freedreno/drm: readonly cmdstream
Noticed that we weren't consistently making cmdstream buffers
gpu-readonly.  Fix that and drop the need to pass flags to
fd_bo_new_ring().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3663>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3663>
2020-01-31 13:01:52 -08:00
Jason Ekstrand
f93dfb509c intel/fs: Write the address register with NoMask for MOV_INDIRECT
This fixes a hang in the following Vulkan CTS test on TGL-LP:

    dEQP-VK.descriptor_indexing.storage_buffer_dynamic_in_loop

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
2020-01-31 17:23:39 +00:00
Jason Ekstrand
9a95abd0f7 intel/tools: Handle strides better when dumping buffers
The old code would only break at stride boundaries if the stride was
less than 32B; otherwise it would just break every 32B.  This commit
makes it break at stride boundaries and 32B boundaries (starting from
the last stride).  This makes reading large vertex buffers in aubinator
much nicer.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
2020-01-31 17:23:39 +00:00
Jason Ekstrand
51d7c42165 intel/disasm: SEND has two sources on Gen12+
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
2020-01-31 17:23:39 +00:00
Jason Ekstrand
fa3ef6a837 intel/eu/validate: Don't validate regions of sends
Otherwise, the validator tries to read the type of src1 of a SEND/SENDS
which doesn't actually have a type field.  This prevents validation
issues in the next commit.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
2020-01-31 17:23:39 +00:00
Daniel Schürmann
3b323d6601 aco: fix image_atomic_cmp_swap
Fixes: 71440ba0f5 ('aco: reorder VMEM operands in ACO IR')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3652>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3652>
2020-01-31 16:51:46 +00:00
Samuel Pitoiset
0d14f41625 aco: fix MUBUF VS input loads when expanding vec3 to vec4 on GFX6
When some unused channels are skipped and that we expand vec3 loads
to vec4 loads, we have to adjust the fourth component.

While we are at it, add an assertion to make sure we don't use
MUBUF for vec3 loads on GFX6.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2450
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2442
Fixes: 6aecc316 ("aco: fix VS input loads with MUBUF on GFX6")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3641>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3641>
2020-01-31 13:48:56 +01:00
Krzysztof Raszkowski
d8410fec4e gallium/swr: Fix gcc 4.8.5 compile error
Stop using C++14 feature so it can be compile on default centos7
gcc compiler.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3640>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3640>
2020-01-31 10:40:54 +00:00
Vinson Lee
8dacf5f9d1 swr: Fix build with GCC 10.
GCC 10 added _mm256_storeu2_m128i.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91341

This patch fixes this build error with GCC 10.

In file included from src/gallium/drivers/swr/rasterizer/codegen/gen_knobs.cpp:39:
../src/gallium/drivers/swr/rasterizer/common/os.h:178:20: error: ‘void _mm256_storeu2_m128i(__m128i*, __m128i*, __m256i)’ redeclared inline without ‘gnu_inline’ attribute
  178 | static INLINE void _mm256_storeu2_m128i(__m128i* hi, __m128i* lo, __m256i a)
      |                    ^~~~~~~~~~~~~~~~~~~~
In file included from /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:51,
                 from /usr/lib/gcc/x86_64-redhat-linux/10/include/x86intrin.h:32,
                 from ../src/gallium/drivers/swr/rasterizer/common/os.h:107,
                 from src/gallium/drivers/swr/rasterizer/codegen/gen_knobs.cpp:39:
/usr/lib/gcc/x86_64-redhat-linux/10/include/avxintrin.h:1580:1: note: ‘void _mm256_storeu2_m128i(__m128i_u*, __m128i_u*, __m256i)’ previously defined here
 1580 | _mm256_storeu2_m128i (__m128i_u *__PH, __m128i_u *__PL, __m256i __A)
      | ^~~~~~~~~~~~~~~~~~~~

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3650>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3650>
2020-01-31 10:18:53 +00:00
Krzysztof Raszkowski
790516db0b gallium/swr: fix gcc warnings
Few changes to make gcc happy.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3629>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3629>
2020-01-31 09:52:27 +00:00
Erik Faye-Lund
8405e1bef0 zink: implement support for derivative-control
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3645>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3645>
2020-01-31 08:56:55 +00:00
Erik Faye-Lund
f12b844e7c zink: implement load_instance_id
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3644>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3644>
2020-01-31 08:40:24 +00:00
Erik Faye-Lund
c0ced1e79b zink: enable texture-buffer objects
This seems to work as-is, and just need enabling. There's a few piglit
failures, but those seems to be problems with the tests, where they
don't handle lacking GL3-support.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3647>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3647>
2020-01-31 08:23:07 +00:00
Zhang, Boyuan
00edb82fde radeonsi: Add support for midstream bitrate change in encoder
BACKPORT: Remove |picture| argument from enc->begin in radeon_vcn_enc.c

Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3426>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3426>
2020-01-31 07:47:36 +00:00
Tomeu Vizoso
d902e23d80 panfrost: Use DBG macro to avoid noise in the console
It pollutes the output of programs that use Panfrost and can confuse its
callers, such as test runners.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
2020-01-31 06:02:31 +00:00
Tomeu Vizoso
2504206221 pan/midgard: Handle nir_intrinsic_load_barycentric_centroid
To avoid hitting the assert in the default case, add a nop for this
intrinsic.

dEQP-GLES3.functional.transform_feedback.random.interleaved.lines.3

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
2020-01-31 06:02:31 +00:00
Tomeu Vizoso
226c1efe9a panfrost: Add more info to some assertions
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
2020-01-31 06:02:31 +00:00
Tomeu Vizoso
2d5c433aee panfrost: Print intended field when decoding
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
2020-01-31 06:02:31 +00:00
Jason Ekstrand
8c5fd2942b anv: Always fill out the AUX table even if CCS is disabled
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:31 -06:00
Jason Ekstrand
2ccdf881ab iris: Plumb deref block size through to 3DSTATE_SF
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:30 -06:00
Jason Ekstrand
e6b39850f0 anv: Plumb deref block size through to 3DSTATE_SF
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:28 -06:00
Jason Ekstrand
ce9c45a60e intel/blorp: Plumb deref block size through to 3DSTATE_SF
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:27 -06:00
Jason Ekstrand
fdc0c19328 intel/common: Return the block size from get_urb_config
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:26 -06:00
Jason Ekstrand
e340a79b9c anv: Emit URB setup earlier
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:24 -06:00
Jason Ekstrand
e928676b69 iris: Consolodate URB emit
Now that we don't have to carry a URB state emit function for BLORP we
can roll some stuff together and drop a genX helper.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:22 -06:00
Jason Ekstrand
09e4c33085 intel/blorp: Always emit URB config on Gen7+
Previously, i965/iris tried to reuse the currently programmed URB config
if it was good enough for BLORP, rather than reprogramming it each time.
However, this will make some things harder on Gen12+ and we've not seen
any performance impact from emitting URB more frequently in ANV.

This makes the blorp <-> driver interface a bit simpler on Gen7+ because
now all the driver has to do is to provide the L3$ config rather than
trying to hand off URB re-config to blorp.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:20 -06:00
Jason Ekstrand
73a684964b intel: Take a gen_l3_config in gen_get_urb_config
Instead of making each driver pass in the same push constant size and do
it's own L3$ config URB size calculation, just make them pass in their
L3$ configuration.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:18 -06:00
Jason Ekstrand
9d05822cb8 i965: Re-emit l3 state before BLORP executes
If BLORP is the first thing to execute, we may not have set the L3$
config yet.  That's not normally a problem but we're about to add code
to BLORP which will look at brw_context::l3::config and we'd like that
to be initialized.  It's also just good practice.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:16 -06:00
Jason Ekstrand
bff7b3c7bd iris: Use the URB size from the L3$ config
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:14 -06:00
Jason Ekstrand
99f3178a24 iris: Store the L3$ configs in the screen
We only calculate them based on device info and never change them so
this seems like a reasonable place to put them.  We could also put them
in the context, but that's not accessible from iris_init_*_context.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:13 -06:00
Jason Ekstrand
6471bac99e iris: Set SLMEnable based on the L3$ config
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:10 -06:00
Jason Ekstrand
73434b665b intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11
SML is no longer in the L3$ on Gen11+.  It's not incredibly clear from
the docs but no Gen11 platforms are in the list of platforms on which
this bit exists.  Also, we've been always setting it false on Gen11 in
ANV and i965 thanks to GEN_L3P_SLM being zero with no ill effects.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:45:53 -06:00
Jason Ekstrand
e1bdb127b6 anv,iris: Set 3DSTATE_SF::DerefBlockSize to per-poly on Gen12+
According to the BSpec, this should prevent hangs when using shaders
with large URB entries.  A more precise fix can be done but it requires
re-arranging URB setup.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:45:52 -06:00
Jason Ekstrand
9da9abf8a7 genxml: Add a new 3DSTATE_SF field on gen12
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:45:49 -06:00
Dylan Baker
21dd0a1514 docs/release-calendar: 20.0.0-rc1 has been released 2020-01-30 14:43:17 -08:00
4201 changed files with 507809 additions and 262111 deletions

View File

@@ -2,20 +2,20 @@ goto %1
:install
rem Check pip
python --version
python -m pip install --upgrade pip
python -m pip --version
if "%buildsystem%" == "scons" (
python --version
python -m pip --version
rem Install Mako
python -m pip install Mako==1.0.7
python -m pip install Mako==1.1.3
rem Install pywin32 extensions, needed by SCons
python -m pip install pypiwin32
rem Install python wheels, necessary to install SCons via pip
python -m pip install wheel
rem Install SCons
python -m pip install scons==3.0.1
python -m pip install scons==3.1.2
call scons --version
) else (
python --version
python -m pip install Mako meson
meson --version
@@ -44,7 +44,7 @@ goto :eof
:build_script
if "%buildsystem%" == "scons" (
call scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.1 llvm=1
call scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.2 machine=x86 llvm=1
) else (
call "C:\Program Files (x86)\Microsoft Visual Studio\2017\Community\Common7\Tools\VsDevCmd.bat" -arch=x86
rem We use default-library as static to affect any wraps (such as expat and zlib)
@@ -59,7 +59,7 @@ goto :eof
:test_script
if "%buildsystem%" == "scons" (
call scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.1 llvm=1 check
call scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.2 machine=x86 llvm=1 check
) else (
call meson test -C builddir
)

File diff suppressed because it is too large Load Diff

View File

@@ -1,122 +0,0 @@
## Mesa testing using gitlab-runner
The goal of the "test" stage of the .gitlab-ci.yml is to do pre-merge
testing of Mesa drivers on various platforms, so that we can ensure no
regressions are merged, as long as developers are merging code using
the "Merge when pipeline completes" button.
This document only covers the CI from .gitlab-ci.yml and this
directory. For other CI systems, see Intel's [Mesa
CI](https://gitlab.freedesktop.org/Mesa_CI) or panfrost's LAVA-based
CI (`src/gallium/drivers/panfrost/ci/`)
### Software architecture
For freedreno and llvmpipe CI, we're using gitlab-runner on the test
devices (DUTs), cached docker containers with VK-GL-CTS, and the
normal shared x86_64 runners to build the Mesa drivers to be run
inside of those containers on the DUTs.
The docker containers are rebuilt from the debian-install.sh script
when DEBIAN\_TAG is changed in .gitlab-ci.yml, and
debian-test-install.sh when DEBIAN\_ARM64\_TAG is changed in
.gitlab-ci.yml. The resulting images are around 500MB, and are
expected to change approximately weekly (though an individual
developer working on them may produce many more images while trying to
come up with a working MR!).
gitlab-runner is a client that polls gitlab.freedesktop.org for
available jobs, with no inbound networking requirements. Jobs can
have tags, so we can have DUT-specific jobs that only run on runners
with that tag marked in the gitlab UI.
Since dEQP takes a long time to run, we mark the job as "parallel" at
some level, which spawns multiple jobs from one definition, and then
deqp-runner.sh takes the corresponding fraction of the test list for
that job.
To reduce dEQP runtime (or avoid tests with unreliable results), a
deqp-runner.sh invocation can provide a list of tests to skip. If
your driver is not yet conformant, you can pass a list of expected
failures, and the job will only fail on tests that aren't listed (look
at the job's log for which specific tests failed).
### DUT requirements
#### DUTs must have a stable kernel and GPU reset.
If the system goes down during a test run, that job will eventually
time out and fail (default 1 hour). However, if the kernel can't
reliably reset the GPU on failure, bugs in one MR may leak into
spurious failures in another MR. This would be an unacceptable impact
on Mesa developers working on other drivers.
#### DUTs must be able to run docker
The Mesa gitlab-runner based test architecture is built around docker,
so that we can cache the debian package installation and CTS build
step across multiple test runs. Since the images are large and change
approximately weekly, the DUTs also need to be running some script to
prune stale docker images periodically in order to not run out of disk
space as we rev those containers (perhaps [this
script](https://gitlab.com/gitlab-org/gitlab-runner/issues/2980#note_169233611)).
Note that docker doesn't allow containers to be stored on NFS, and
doesn't allow multiple docker daemons to interact with the same
network block device, so you will probably need some sort of physical
storage on your DUTs.
#### DUTs must be public
By including your device in .gitlab-ci.yml, you're effectively letting
anyone on the internet run code on your device. docker containers may
provide some limited protection, but how much you trust that and what
you do to mitigate hostile access is up to you.
#### DUTs must expose the dri device nodes to the containers.
Obviously, to get access to the HW, we need to pass the render node
through. This is done by adding `devices = ["/dev/dri"]` to the
`runners.docker` section of /etc/gitlab-runner/config.toml.
### HW CI farm expectations
To make sure that testing of one vendor's drivers doesn't block
unrelated work by other vendors, we require that a given driver's test
farm produces a spurious failure no more than once a week. If every
driver had CI and failed once a week, we would be seeing someone's
code getting blocked on a spurious failure daily, which is an
unacceptable cost to the project.
Additionally, the test farm needs to be able to provide a short enough
turnaround time that people can regularly use the "Merge when pipeline
succeeds" button successfully (until we get
[marge-bot](https://github.com/smarkets/marge-bot) in place on
freedesktop.org). As a result, we require that the test farm be able
to handle a whole pipeline's worth of jobs in less than 5 minutes (to
compare, the build stage is about 10 minutes, if you could get all
your jobs scheduled on the shared runners in time.).
If a test farm is short the HW to provide these guarantees, consider
dropping tests to reduce runtime.
`VK-GL-CTS/scripts/log/bottleneck_report.py` can help you find what
tests were slow in a `results.qpa` file. Or, you can have a job with
no `parallel` field set and:
```
variables:
CI_NODE_INDEX: 1
CI_NODE_TOTAL: 10
```
to just run 1/10th of the test list.
If a HW CI farm goes offline (network dies and all CI pipelines end up
stalled) or its runners are consistenly spuriously failing (disk
full?), and the maintainer is not immediately available to fix the
issue, please push through an MR disabling that farm's jobs by adding
'.' to the front of the jobs names until the maintainer can bring
things back up. If this happens, the farm maintainer should provide a
report to mesa-dev@lists.freedesktop.org after the fact explaining
what happened and what the mitigation plan is for that failure next
time.

View File

@@ -44,3 +44,11 @@ CONFIG_DEBUG_LOCKDEP=n
CONFIG_SOFTLOCKUP_DETECTOR=n
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=n
CONFIG_FW_LOADER_COMPRESS=y
CONFIG_USB_USBNET=y
CONFIG_NETDEVICES=y
CONFIG_USB_NET_DRIVERS=y
CONFIG_USB_RTL8152=y
CONFIG_USB_NET_AX8817X=y
CONFIG_USB_NET_SMSC95XX=y

View File

@@ -12,6 +12,9 @@ CONFIG_DRM_ROCKCHIP=y
CONFIG_DRM_PANFROST=y
CONFIG_DRM_LIMA=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_MSM=y
CONFIG_DRM_I2C_ADV7511=y
CONFIG_DRM_I2C_ADV7533=y
CONFIG_PWM_CROS_EC=y
CONFIG_BACKLIGHT_PWM=y
@@ -26,6 +29,30 @@ CONFIG_TYPEC_FUSB302=y
CONFIG_TYPEC=y
CONFIG_TYPEC_TCPM=y
# Cheza platform bits
CONFIG_QCOM_RPMHPD=y
CONFIG_SDM_GPUCC_845=y
CONFIG_SDM_VIDEOCC_845=y
CONFIG_SDM_DISPCC_845=y
CONFIG_SDM_LPASSCC_845=y
CONFIG_SDM_CAMCC_845=y
CONFIG_RESET_QCOM_PDC=y
CONFIG_DRM_TI_SN65DSI86=y
CONFIG_I2C_QCOM_GENI=y
CONFIG_SPI_QCOM_GENI=y
CONFIG_PHY_QCOM_QUSB2=y
CONFIG_PHY_QCOM_QMP=y
CONFIG_QCOM_LLCC=y
CONFIG_QCOM_SPMI_TEMP_ALARM=y
CONFIG_POWER_RESET_QCOM_PON=y
CONFIG_RTC_DRV_PM8XXX=y
CONFIG_INTERCONNECT=y
CONFIG_INTERCONNECT_QCOM_SDM845=y
CONFIG_QCOM_WDT=y
# db410c ethernet
CONFIG_USB_RTL8152=y
CONFIG_ARCH_ALPINE=n
CONFIG_ARCH_BCM2835=n
CONFIG_ARCH_BCM_IPROC=n
@@ -38,7 +65,6 @@ CONFIG_ARCH_LG1K=n
CONFIG_ARCH_HISI=n
CONFIG_ARCH_MEDIATEK=n
CONFIG_ARCH_MVEBU=n
CONFIG_ARCH_QCOM=n
CONFIG_ARCH_SEATTLE=n
CONFIG_ARCH_SYNQUACER=n
CONFIG_ARCH_RENESAS=n
@@ -62,7 +88,12 @@ CONFIG_ARCH_XGENE=n
CONFIG_ARCH_ZX=n
CONFIG_ARCH_ZYNQMP=n
CONFIG_ACPI=n
# Strip out some stuff we don't need for graphics testing, to reduce
# the build.
CONFIG_CAN=n
CONFIG_WIRELESS=n
CONFIG_RFKILL=n
CONFIG_WLAN=n
CONFIG_REGULATOR_FAN53555=y
CONFIG_REGULATOR=y
@@ -81,3 +112,13 @@ CONFIG_SOFTLOCKUP_DETECTOR=y
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_FW_LOADER_COMPRESS=y
CONFIG_FW_LOADER_USER_HELPER=n
CONFIG_USB_USBNET=y
CONFIG_NETDEVICES=y
CONFIG_USB_NET_DRIVERS=y
CONFIG_USB_RTL8152=y
CONFIG_USB_NET_AX8817X=y
CONFIG_USB_NET_SMSC95XX=y

View File

@@ -0,0 +1,2 @@
[*.sh]
indent_size = 2

View File

@@ -0,0 +1,14 @@
#!/bin/sh
while true; do
devcds=`find /sys/devices/virtual/devcoredump/ -name data`
for i in $devcds; do
echo "Found a devcoredump at $i."
if cp $i /results/first.devcore; then
echo 1 > $i
echo "Saved to the job artifacts at /first.devcore"
exit 0
fi
done
sleep 10
done

View File

@@ -0,0 +1,105 @@
#!/bin/bash
# Boot script for Chrome OS devices attached to a servo debug connector, using
# NFS and TFTP to boot.
# We're run from the root of the repo, make a helper var for our paths
BM=$CI_PROJECT_DIR/install/bare-metal
# Runner config checks
if [ -z "$BM_SERIAL" ]; then
echo "Must set BM_SERIAL in your gitlab-runner config.toml [[runners]] environment"
echo "This is the CPU serial device."
exit 1
fi
if [ -z "$BM_SERIAL_EC" ]; then
echo "Must set BM_SERIAL in your gitlab-runner config.toml [[runners]] environment"
echo "This is the EC serial device for controlling board power"
exit 1
fi
if [ ! -d /nfs ]; then
echo "NFS rootfs directory needs to be mounted at /nfs by the gitlab runner"
exit 1
fi
if [ ! -d /tftp ]; then
echo "TFTP directory for this board needs to be mounted at /tftp by the gitlab runner"
exit 1
fi
# job config checks
if [ -z "$BM_KERNEL" ]; then
echo "Must set BM_KERNEL to your board's kernel FIT image"
exit 1
fi
if [ -z "$BM_ROOTFS" ]; then
echo "Must set BM_ROOTFS to your board's rootfs directory in the job's variables"
exit 1
fi
if [ -z "$BM_CMDLINE" ]; then
echo "Must set BM_CMDLINE to your board's kernel command line arguments"
exit 1
fi
set -ex
# Clear out any previous run's artifacts.
rm -rf results/
mkdir -p results
find artifacts/ -name serial\*.txt | xargs rm -f
# Create the rootfs in the NFS directory. rm to make sure it's in a pristine
# state, since it's volume-mounted on the host.
rsync -a --delete $BM_ROOTFS/ /nfs/
mkdir -p /nfs/results
. $BM/rootfs-setup.sh /nfs
# Set up the TFTP kernel/cmdline. When we support more than one board with
# this method, we'll need to do some check on the runner name or something.
rm -rf /tftp/*
cp $BM_KERNEL /tftp/vmlinuz
echo "$BM_CMDLINE" > /tftp/cmdline
# Start watching serials, and power up the device.
$BM/serial-buffer.py $BM_SERIAL_EC | tee serial-ec-output.txt | sed -u 's|^|SERIAL-EC> |g' &
$BM/serial-buffer.py $BM_SERIAL | tee serial-output.txt | sed -u 's|^|SERIAL-CPU> |g' &
while [ ! -e serial-output.txt ]; do
sleep 1
done
# Flush any partial commands in the EC's prompt, then ask for a reboot.
$BM/write-serial.py $BM_SERIAL_EC ""
$BM/write-serial.py $BM_SERIAL_EC reboot
# This is emitted right when the bootloader pauses to check for input. Emit a
# ^N character to request network boot, because we don't have a
# direct-to-netboot firmware on cheza.
$BM/expect-output.sh serial-output.txt -f "load_archive: loading locale_en.bin"
$BM/write-serial.py $BM_SERIAL `printf '\016'`
# Wait for the device to complete the deqp run
$BM/expect-output.sh serial-output.txt \
-f "bare-metal result" \
-e "---. end Kernel panic" \
-e "POWER_GOOD not seen in time"
# power down the CPU on the device
$BM/write-serial.py $BM_SERIAL_EC 'power off'
set -ex
# Bring artifacts back from the NFS dir to the build dir where gitlab-runner
# will look for them. Note that results/ may already exist, so be careful
# with cp.
mkdir -p results
cp -Rp /nfs/results/. results/
set +e
if grep -q "bare-metal result: pass" serial-output.txt; then
exit 0
else
exit 1
fi

View File

@@ -0,0 +1,30 @@
#!/bin/bash
set -e
STRINGS=$(mktemp)
ERRORS=$(mktemp)
trap "rm $STRINGS; rm $ERRORS;" EXIT
FILE=$1
shift 1
while getopts "f:e:" opt; do
case $opt in
f) echo "$OPTARG" >> $STRINGS;;
e) echo "$OPTARG" >> $STRINGS ; echo "$OPTARG" >> $ERRORS;;
esac
done
shift $((OPTIND -1))
echo "Waiting for $FILE to say one of following strings"
cat $STRINGS
while ! egrep -wf $STRINGS $FILE; do
sleep 2
done
if egrep -wf $ERRORS $FILE; then
exit 1
fi

127
.gitlab-ci/bare-metal/fastboot.sh Executable file
View File

@@ -0,0 +1,127 @@
#!/bin/bash
BM=$CI_PROJECT_DIR/install/bare-metal
if [ -z "$BM_SERIAL" -a -z "$BM_SERIAL_SCRIPT" ]; then
echo "Must set BM_SERIAL OR BM_SERIAL_SCRIPT in your gitlab-runner config.toml [[runners]] environment"
echo "BM_SERIAL:"
echo " This is the serial device to talk to for waiting for fastboot to be ready and logging from the kernel."
echo "BM_SERIAL_SCRIPT:"
echo " This is a shell script to talk to for waiting for fastboot to be ready and logging from the kernel."
exit 1
fi
if [ -z "$BM_POWERUP" ]; then
echo "Must set BM_POWERUP in your gitlab-runner config.toml [[runners]] environment"
echo "This is a shell script that should reset the device and begin its boot sequence"
echo "such that it pauses at fastboot."
exit 1
fi
if [ -z "$BM_POWERDOWN" ]; then
echo "Must set BM_POWERDOWN in your gitlab-runner config.toml [[runners]] environment"
echo "This is a shell script that should power off the device."
exit 1
fi
if [ -z "$BM_FASTBOOT_SERIAL" ]; then
echo "Must set BM_FASTBOOT_SERIAL in your gitlab-runner config.toml [[runners]] environment"
echo "This must be the a stable-across-resets fastboot serial number."
exit 1
fi
if [ -z "$BM_KERNEL" ]; then
echo "Must set BM_KERNEL to your board's kernel vmlinuz or Image.gz in the job's variables:"
exit 1
fi
if [ -z "$BM_DTB" ]; then
echo "Must set BM_DTB to your board's DTB file in the job's variables:"
exit 1
fi
if [ -z "$BM_ROOTFS" ]; then
echo "Must set BM_ROOTFS to your board's rootfs directory in the job's variables:"
exit 1
fi
if [ -z "$BM_WEBDAV_IP" -o -z "$BM_WEBDAV_PORT" ]; then
echo "BM_WEBDAV_IP and/or BM_WEBDAV_PORT is not set - no results will be uploaded from DUT!"
WEBDAV_CMDLINE=""
else
WEBDAV_CMDLINE="webdav=http://$BM_WEBDAV_IP:$BM_WEBDAV_PORT"
fi
set -ex
# Clear out any previous run's artifacts.
rm -rf results/
mkdir -p results
find artifacts/ -name serial\*.txt | xargs rm -f
# Create the rootfs in a temp dir
rsync -a --delete $BM_ROOTFS/ rootfs/
. $BM/rootfs-setup.sh rootfs
# Finally, pack it up into a cpio rootfs. Skip the vulkan CTS since none of
# these devices use it and it would take up space in the initrd.
pushd rootfs
find -H | \
egrep -v "external/(openglcts|vulkancts|amber|glslang|spirv-tools)" |
egrep -v "traces-db|apitrace|renderdoc|python" | \
cpio -H newc -o | \
xz --check=crc32 -T4 - > $CI_PROJECT_DIR/rootfs.cpio.gz
popd
cat $BM_KERNEL $BM_DTB > Image.gz-dtb
abootimg \
--create artifacts/fastboot.img \
-k Image.gz-dtb \
-r rootfs.cpio.gz \
-c cmdline="$BM_CMDLINE $WEBDAV_CMDLINE"
rm Image.gz-dtb
# Start nginx to get results from DUT
if [ -n "$WEBDAV_CMDLINE" ]; then
ln -s `pwd`/results /results
sed -i s/80/$BM_WEBDAV_PORT/g /etc/nginx/sites-enabled/default
sed -i s/www-data/root/g /etc/nginx/nginx.conf
nginx
fi
# Start watching serial, and power up the device.
if [ -n "$BM_SERIAL" ]; then
$BM/serial-buffer.py $BM_SERIAL | tee artifacts/serial-output.txt &
else
PATH=$BM:$PATH $BM_SERIAL_SCRIPT | tee artifacts/serial-output.txt &
fi
while [ ! -e artifacts/serial-output.txt ]; do
sleep 1
done
PATH=$BM:$PATH $BM_POWERUP
# Once fastboot is ready, boot our image.
$BM/expect-output.sh artifacts/serial-output.txt \
-f "fastboot: processing commands" \
-f "Listening for fastboot command on" \
-e "data abort"
fastboot boot -s $BM_FASTBOOT_SERIAL artifacts/fastboot.img
# Wait for the device to complete the deqp run
$BM/expect-output.sh artifacts/serial-output.txt \
-f "bare-metal result" \
-e "---. end Kernel panic"
# power down the device
PATH=$BM:$PATH $BM_POWERDOWN
set +e
if grep -q "bare-metal result: pass" artifacts/serial-output.txt; then
exit 0
else
exit 1
fi

View File

@@ -0,0 +1,10 @@
#!/bin/bash
relay=$1
if [ -z "$relay" ]; then
echo "Must supply a relay arg"
exit 1
fi
$CI_PROJECT_DIR/install/bare-metal/google-power-relay.py off $relay

View File

@@ -0,0 +1,19 @@
#!/usr/bin/python3
import sys
import serial
mode = sys.argv[1]
relay = sys.argv[2]
# our relays are "off" means "board is powered".
mode_swap = {
"on" : "off",
"off" : "on",
}
mode = mode_swap[mode]
ser = serial.Serial('/dev/ttyACM0', 115200, timeout=2)
command = "relay {} {}\n\r".format(mode, relay)
ser.write(command.encode())
ser.close()

View File

@@ -0,0 +1,12 @@
#!/bin/bash
relay=$1
if [ -z "$relay" ]; then
echo "Must supply a relay arg"
exit 1
fi
$CI_PROJECT_DIR/install/bare-metal/google-power-relay.py off $relay
sleep 5
$CI_PROJECT_DIR/install/bare-metal/google-power-relay.py on $relay

49
.gitlab-ci/bare-metal/init.sh Executable file
View File

@@ -0,0 +1,49 @@
#!/bin/sh
set -ex
mount -t proc none /proc
mount -t sysfs none /sys
mount -t devtmpfs none /dev || echo possibly already mounted
mkdir -p /dev/pts
mount -t devpts devpts /dev/pts
mount -t tmpfs tmpfs /tmp
. /set-job-env-vars.sh
# Store Mesa's disk cache under /tmp, rather than sending it out over NFS.
export XDG_CACHE_HOME=/tmp
echo "nameserver 8.8.8.8" > /etc/resolv.conf
# Not all DUTs have network
sntp -sS pool.ntp.org || true
# Overwrite traces.yml file with the baremetal version
cp /install/traces-baremetal.yml /install/traces.yml
# Start a little daemon to capture the first devcoredump we encounter. (They
# expire after 5 minutes, so we poll for them).
./capture-devcoredump.sh &
if sh $BARE_METAL_TEST_SCRIPT; then
OK=1
else
OK=0
fi
# upload artifacts via webdav
WEBDAV=$(cat /proc/cmdline | tr " " "\n" | grep webdav | cut -d '=' -f 2 || true)
if [ -n "$WEBDAV" ]; then
find /results -type f -exec curl -T {} $WEBDAV/{} \;
fi
if [ $OK -eq 1 ]; then
echo "bare-metal result: pass"
else
echo "bare-metal result: fail"
fi
# Wait until the job would have timed out anyway, so we don't spew a "init
# exited" panic.
sleep 6000

View File

@@ -0,0 +1,20 @@
server {
listen 80 default_server;
listen [::]:80 default_server;
server_name _;
location / {
dav_methods PUT;
dav_ext_methods PROPFIND OPTIONS;
dav_access user:rw group:rw all:r;
client_body_temp_path /tmp;
client_max_body_size 0;
create_full_put_path on;
root /results;
autoindex on;
}
}

View File

@@ -0,0 +1,63 @@
#!/bin/bash
rootfs_dst=$1
mkdir -p $rootfs_dst/results
# Set up the init script that brings up the system.
cp $BM/init.sh $rootfs_dst/init
cp $BM/capture-devcoredump.sh $rootfs_dst/
set +x
# Pass through relevant env vars from the gitlab job to the baremetal init script
touch $rootfs_dst/set-job-env-vars.sh
chmod +x $rootfs_dst/set-job-env-vars.sh
for var in \
BARE_METAL_TEST_SCRIPT \
CI_COMMIT_BRANCH \
CI_COMMIT_TITLE \
CI_JOB_JWT \
CI_JOB_ID \
CI_JOB_URL \
CI_MERGE_REQUEST_SOURCE_BRANCH_NAME \
CI_MERGE_REQUEST_TITLE \
CI_NODE_INDEX \
CI_NODE_TOTAL \
CI_PIPELINE_ID \
CI_PROJECT_PATH \
CI_RUNNER_DESCRIPTION \
DEQP_CASELIST_FILTER \
DEQP_EXPECTED_FAILS \
DEQP_EXPECTED_RENDERER \
DEQP_NO_SAVE_RESULTS \
DEQP_PARALLEL \
DEQP_RUN_SUFFIX \
DEQP_SKIPS \
DEQP_VER \
DEVICE_NAME \
FD_MESA_DEBUG \
FLAKES_CHANNEL \
IR3_SHADER_DEBUG \
MESA_GL_VERSION_OVERRIDE \
MESA_GLSL_VERSION_OVERRIDE \
MESA_GLES_VERSION_OVERRIDE \
NIR_VALIDATE \
TRACIE_NO_UNIT_TESTS \
TRACIE_UPLOAD_TO_MINIO \
TU_DEBUG \
VK_DRIVER \
; do
val=`echo ${!var} | sed 's|"||g'`
if [ -n "$val" ]; then
echo "export $var=\"${val}\"" >> $rootfs_dst/set-job-env-vars.sh
fi
done
echo "Variables passed through:"
cat $rootfs_dst/set-job-env-vars.sh
set -x
# Add the Mesa drivers we built, and make a consistent symlink to them.
mkdir -p $rootfs_dst/$CI_PROJECT_DIR
tar -C $rootfs_dst/$CI_PROJECT_DIR/ -xf $CI_PROJECT_DIR/artifacts/install.tar
ln -sf $CI_PROJECT_DIR/install $rootfs_dst/install

View File

@@ -0,0 +1,46 @@
#!/usr/bin/python3
# Copyright © 2020 Google LLC
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
# IN THE SOFTWARE.
# Tiny script to read bytes from serial, and write the output to stdout, with a
# buffer in between so we don't lose serial output from its buffer.
#
# We don't use 'cu' because it requires stdin to be hooked up and I never
# managed to make that work without getting blocked somewhere. We don't use
# 'conserver' because it's non-free.
import sys
import serial
import select
import os
import posix
dev=sys.argv[1]
ser = serial.Serial(dev, 115200, timeout=10)
while True:
bytes = ser.read()
sys.stdout.buffer.write(bytes)
sys.stdout.flush()
ser.close()

View File

@@ -0,0 +1,11 @@
#!/usr/bin/python3
import sys
import serial
dev = sys.argv[1]
command = sys.argv[2] + '\n'
ser = serial.Serial(dev, 115200, timeout=5)
ser.write(command.encode())
ser.close()

View File

@@ -0,0 +1,33 @@
#!/bin/bash
set -ex
# Need an unreleased version of Waffle for surfaceless support in apitrace
# Replace this build with the Debian package once that's possible
WAFFLE_VERSION="e3c995d9a2693b687501715b6550619922346089"
git clone https://gitlab.freedesktop.org/mesa/waffle.git --single-branch --no-checkout /waffle
pushd /waffle
git checkout "$WAFFLE_VERSION"
cmake -B_build -DCMAKE_INSTALL_LIBDIR=lib -DCMAKE_BUILD_TYPE=Release $EXTRA_CMAKE_ARGS .
make -C _build install
mkdir -p build/lib build/bin
cp _build/lib/libwaffle-1.so build/lib/libwaffle-1.so.0
cp _build/bin/wflinfo build/bin/wflinfo
${STRIP_CMD:-strip} build/lib/* build/bin/*
find . -not -path './build' -not -path './build/*' -delete
popd
APITRACE_VERSION="9.0"
git clone https://github.com/apitrace/apitrace.git --single-branch --no-checkout /apitrace
pushd /apitrace
git checkout "$APITRACE_VERSION"
cmake -G Ninja -B_build -H. -DCMAKE_BUILD_TYPE=Release -DENABLE_GUI=False -DENABLE_WAFFLE=on -DWaffle_DIR=/usr/local/lib/cmake/Waffle/ $EXTRA_CMAKE_ARGS
ninja -C _build
mkdir build
cp _build/apitrace build
cp _build/eglretrace build
${STRIP_CMD:-strip} build/*
find . -not -path './build' -not -path './build/*' -delete
popd

View File

@@ -2,9 +2,9 @@
set -ex
git clone https://gitlab.freedesktop.org/mesa/parallel-deqp-runner.git --depth 1 -b mesa-ci-2019-12-17
cd parallel-deqp-runner
git clone https://gitlab.freedesktop.org/mesa/parallel-deqp-runner.git --depth 1 -b mesa-ci-2020-06-15 /parallel-deqp-runner
pushd /parallel-deqp-runner
meson build/ $EXTRA_MESON_ARGS
ninja -C build -j4 install
cd ..
rm -rf parallel-deqp-runner
ninja -C build install
popd
rm -rf /parallel-deqp-runner

View File

@@ -1,14 +1,13 @@
#!/bin/bash
git config --global user.email "mesa@example.com"
git config --global user.name "Mesa CI"
# XXX: Use --depth 1 once we can drop the cherry-picks.
git clone \
--depth 1 \
https://github.com/KhronosGroup/VK-GL-CTS.git \
-b opengl-es-cts-3.2.5.1 \
-b opengl-es-cts-3.2.6.1 \
/VK-GL-CTS
pushd /VK-GL-CTS
# Fix surfaceless build
git cherry-pick -x 22f41e5e321c6dcd8569c4dad91bce89f06b3670
git cherry-pick -x 1daa8dff73161ea60ead965bd6c9f2a0a2165648
# surfaceless links against libkms and such despite not using it.
sed -i '/gbm/d' targets/surfaceless/surfaceless.cmake
@@ -38,9 +37,14 @@ ninja
mkdir /deqp/mustpass
for gles in gles2 gles3 gles31; do
cp \
/deqp/external/openglcts/modules/gl_cts/data/mustpass/gles/aosp_mustpass/3.2.5.x/$gles-master.txt \
/deqp/external/openglcts/modules/gl_cts/data/mustpass/gles/aosp_mustpass/3.2.6.x/$gles-master.txt \
/deqp/mustpass/$gles-master.txt
done
cp \
/deqp/external/openglcts/modules/gl_cts/data/mustpass/gl/khronos_mustpass/4.6.1.x/*-master.txt \
/deqp/mustpass/.
# Save *some* executor utils, but otherwise strip things down
# to reduct deqp build size:
@@ -49,13 +53,16 @@ cp /deqp/executor/testlog-to-* /deqp/executor.save
rm -rf /deqp/executor
mv /deqp/executor.save /deqp/executor
rm -rf /deqp/external
ls /deqp/external | grep -v openglcts | xargs rm -rf
rm -rf /deqp/modules/internal
rm -rf /deqp/execserver
rm -rf /deqp/modules/egl
rm -rf /deqp/framework
rm -rf /deqp/external/openglcts/modules/gl_cts/data/mustpass
rm -rf /deqp/external/openglcts/modules/cts-runner
rm -rf /deqp/external/vulkancts/modules/vulkan/vk-build-programs
find -iname '*cmake*' -o -name '*ninja*' -o -name '*.o' -o -name '*.a' | xargs rm -rf
${STRIP_CMD:-strip} modules/*/deqp-*
${STRIP_CMD:-strip} modules/*/deqp-* external/openglcts/modules/glcts
du -sh *
rm -rf /VK-GL-CTS
popd

View File

@@ -1,8 +1,15 @@
git clone --depth 1 \
#!/bin/bash
set -ex
git config --global user.email "mesa@example.com"
git config --global user.name "Mesa CI"
git clone \
https://github.com/KhronosGroup/VK-GL-CTS.git \
-b vulkan-cts-1.1.6.0 \
-b vulkan-cts-1.2.3.0 \
--depth 1 \
/VK-GL-CTS
cd /VK-GL-CTS
pushd /VK-GL-CTS
# --insecure is due to SSL cert failures hitting sourceforge for zlib and
# libpng (sigh). The archives get their checksums checked anyway, and git
@@ -10,24 +17,44 @@ cd /VK-GL-CTS
python3 external/fetch_sources.py --insecure
mkdir -p /deqp
cd /deqp
cmake -G Ninja \
-DDEQP_TARGET=x11_glx \
-DCMAKE_BUILD_TYPE=Release \
/VK-GL-CTS
ninja -j4
# Copy out the mustpass list we want.
# Save the testlog stylesheets:
cp doc/testlog-stylesheet/testlog.{css,xsl} /deqp
popd
pushd /deqp
cmake -G Ninja \
-DDEQP_TARGET=${DEQP_TARGET:-x11_glx} \
-DCMAKE_BUILD_TYPE=Release \
$EXTRA_CMAKE_ARGS \
/VK-GL-CTS
ninja
# Copy out the mustpass lists we want.
mkdir /deqp/mustpass
cp /VK-GL-CTS/external/vulkancts/mustpass/master/vk-default.txt \
/deqp/mustpass/vk-master.txt
rm -rf /deqp/modules/internal
for gles in gles2 gles3 gles31; do
cp \
/deqp/external/openglcts/modules/gl_cts/data/mustpass/gles/aosp_mustpass/3.2.6.x/$gles-master.txt \
/deqp/mustpass/$gles-master.txt
done
# Save *some* executor utils, but otherwise strip things down
# to reduct deqp build size:
mkdir /deqp/executor.save
cp /deqp/executor/testlog-to-* /deqp/executor.save
rm -rf /deqp/executor
mv /deqp/executor.save /deqp/executor
rm -rf /deqp/modules/internal
rm -rf /deqp/execserver
rm -rf /deqp/modules/egl
rm -rf /deqp/framework
find -iname '*cmake*' -o -name '*ninja*' -o -name '*.o' -o -name '*.a' | xargs rm -rf
strip external/vulkancts/modules/vulkan/deqp-vk
${STRIP_CMD:-strip} external/vulkancts/modules/vulkan/deqp-vk
${STRIP_CMD:-strip} modules/*/deqp-*
du -sh *
rm -rf /VK-GL-CTS
popd

View File

@@ -0,0 +1,14 @@
#!/bin/bash
set -ex
git clone https://github.com/ValveSoftware/Fossilize.git
cd Fossilize
git checkout 6b5b570008c9ab5269e341f04c811fe49a1bb72c
git submodule update --init
mkdir build
cd build
cmake .. -DCMAKE_BUILD_TYPE=Release -G Ninja
ninja -C . install
cd ../..
rm -rf Fossilize

View File

@@ -0,0 +1,21 @@
#!/bin/bash
set -ex
GFXRECONSTRUCT_VERSION=57c588c04af631d1d6d381a48e2b9283f9d9d528
# Using the "dev" branch by now because it solves a crash and will allow us to
# use the gfxreconstruct-info tool
git clone https://github.com/LunarG/gfxreconstruct.git --single-branch -b dev --no-checkout /gfxreconstruct
pushd /gfxreconstruct
git checkout "$GFXRECONSTRUCT_VERSION"
git submodule update --init
git submodule update
cmake -G Ninja -B_build -H. -DCMAKE_BUILD_TYPE=Release
ninja -C _build gfxrecon-replay gfxrecon-info
mkdir -p build/bin
install _build/tools/replay/gfxrecon-replay build/bin
install _build/tools/info/gfxrecon-info build/bin
strip build/bin/*
find . -not -path './build' -not -path './build/*' -delete
popd

View File

@@ -0,0 +1,14 @@
#!/bin/bash
set -ex
export LIBDRM_VERSION=libdrm-2.4.102
wget https://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.xz
tar -xvf $LIBDRM_VERSION.tar.xz && rm $LIBDRM_VERSION.tar.xz
cd $LIBDRM_VERSION
meson build -D vc4=true -D freedreno=true -D etnaviv=true $EXTRA_MESON_ARGS
ninja -C build install
cd ..
rm -rf $LIBDRM_VERSION

View File

@@ -4,10 +4,10 @@ set -ex
git clone https://gitlab.freedesktop.org/mesa/piglit.git --single-branch --no-checkout /piglit
pushd /piglit
git checkout 8771c3860505db2bcf4877216221d774bf90af6b
git checkout 404862743cf8a7b37a4e3a93b4ba1858d59cd4ab
patch -p1 <$OLDPWD/.gitlab-ci/piglit/disable-vs_in.diff
cmake -G Ninja -DCMAKE_BUILD_TYPE=Release
ninja -j4
ninja
find -name .git -o -name '*ninja*' -o -iname '*cmake*' -o -name '*.[chao]' | xargs rm -rf
rm -rf target_api
popd

View File

@@ -0,0 +1,17 @@
#!/bin/bash
set -ex
RENDERDOC_VERSION=da02e88201dc3b64316fc33ce6ff69cc729689aa
git clone https://github.com/baldurk/renderdoc.git --single-branch --no-checkout /renderdoc
pushd /renderdoc
git checkout "$RENDERDOC_VERSION"
cmake -G Ninja -B_build -H. -DENABLE_QRENDERDOC=false -DCMAKE_BUILD_TYPE=Release $EXTRA_CMAKE_ARGS
ninja -C _build
mkdir -p build/lib
${STRIP_CMD:-strip} _build/lib/*.so
cp _build/lib/renderdoc.so build/lib
cp _build/lib/librenderdoc.so build/lib
find . -not -path './build' -not -path './build/*' -delete
popd

View File

@@ -0,0 +1,20 @@
#!/bin/bash
set -ex
mkdir -p /epoxy
pushd /epoxy
wget -qO- https://github.com/anholt/libepoxy/releases/download/1.5.4/libepoxy-1.5.4.tar.xz | tar -xJ --strip-components=1
meson build/ $EXTRA_MESON_ARGS
ninja -C build install
popd
rm -rf /epoxy
VIRGLRENDERER_VERSION=43148d1115a12219a0560a538c9872d07c28c558
git clone https://gitlab.freedesktop.org/virgl/virglrenderer.git --single-branch --no-checkout /virglrenderer
pushd /virglrenderer
git checkout "$VIRGLRENDERER_VERSION"
meson build/ $EXTRA_MESON_ARGS
ninja -C build install
popd
rm -rf /virglrenderer

View File

@@ -0,0 +1,29 @@
#!/bin/bash
set -ex
VULKANTOOLS_VERSION=1862c6a47b64cd09156205d7f7e6b3bfcea76390
git clone https://github.com/LunarG/VulkanTools.git --single-branch --no-checkout /VulkanTools
pushd /VulkanTools
git checkout "$VULKANTOOLS_VERSION"
./update_external_sources.sh
mkdir _build
./scripts/update_deps.py --dir=_build --config=release --generator=Ninja
cmake -G Ninja -B_build -H. \
-DCMAKE_BUILD_TYPE=Release \
-DCMAKE_INSTALL_PREFIX=/VulkanTools/build \
-DBUILD_TESTS=OFF \
-DBUILD_VLF=OFF \
-DBUILD_VKTRACE=OFF \
-DBUILD_VIA=OFF \
-DBUILD_VKTRACE_REPLAY=OFF \
-C_build/helper.cmake
ninja -C _build VkLayer_screenshot VkLayer_screenshot-staging-json
mkdir -p build/etc/vulkan/explicit_layer.d
mkdir build/lib
install _build/layersvt/staging-json/VkLayer_screenshot.json build/etc/vulkan/explicit_layer.d
install _build/layersvt/libVkLayer_screenshot.so build/lib
strip build/lib/*
find . -not -path './build' -not -path './build/*' -delete
popd

View File

@@ -0,0 +1,5 @@
#!/bin/bash
arch=arm64
. .gitlab-ci/container/baremetal_build.sh

View File

@@ -3,72 +3,53 @@
set -e
set -o xtrace
############### Install packages for building
apt-get -y install ca-certificates
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources.list.d/backports.list
dpkg --add-architecture armhf
apt-get update
apt-get -y install \
abootimg \
android-sdk-ext4-utils \
autoconf \
automake \
bc \
bison \
ccache \
cmake \
cpio \
crossbuild-essential-armhf \
debootstrap \
fastboot \
flex \
g++ \
gettext \
git \
lavacli \
libdrm-dev:armhf \
libegl1-mesa-dev \
libegl1-mesa-dev:armhf \
libdrm-dev \
libelf-dev \
libelf-dev:armhf \
libexpat1-dev \
libexpat1-dev:armhf \
libgles2-mesa-dev \
libgles2-mesa-dev:armhf \
libpng-dev \
libpng-dev:armhf \
libssl-dev \
libvulkan-dev \
libvulkan-dev:armhf \
llvm-7-dev:armhf \
llvm-8-dev \
meson \
pkg-config \
python \
python3-mako \
python3-pil \
python3-requests \
python3-pip \
python3-setuptools \
unzip \
wget \
xz-utils \
zlib1g-dev
pip3 install git+http://gitlab.freedesktop.org/freedesktop/ci-templates@6f5af7e5574509726c79109e3c147cee95e81366
apt install -y --no-remove -t buster-backports \
meson
arch=armhf
. .gitlab-ci/container/cross_build.sh
. .gitlab-ci/container/container_pre_build.sh
# dependencies where we want a specific version
export LIBDRM_VERSION=libdrm-2.4.100
EXTRA_MESON_ARGS=
. .gitlab-ci/build-libdrm.sh
wget https://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.bz2
tar -xvf $LIBDRM_VERSION.tar.bz2 && rm $LIBDRM_VERSION.tar.bz2
cd $LIBDRM_VERSION; meson build -D vc4=true -D freedreno=true -D etnaviv=true; ninja -j4 -C build install; cd ..
rm -rf $LIBDRM_VERSION
############### Generate cross build file for Meson
cross_file="/cross_file-armhf.txt"
/usr/share/meson/debcrossgen --arch armhf -o "$cross_file"
# Explicitly set ccache path for cross compilers
sed -i "s|/usr/bin/\([^-]*\)-linux-gnu\([^-]*\)-g|/usr/lib/ccache/\\1-linux-gnu\\2-g|g" "$cross_file"
# Don't need wrapper for armhf executables
sed -i -e '/\[properties\]/a\' -e "needs_exe_wrapper = False" "$cross_file"
############### Generate kernel, ramdisk, test suites, etc for LAVA jobs
DEBIAN_ARCH=arm64 . .gitlab-ci/container/lava_arm.sh
DEBIAN_ARCH=armhf . .gitlab-ci/container/lava_arm.sh
apt-get purge -y \
wget
apt-get autoremove -y --purge
. .gitlab-ci/container/container_post_build.sh

View File

@@ -0,0 +1,45 @@
#!/bin/bash
set -e
set -o xtrace
############### Install packages for building
apt-get install -y ca-certificates
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources.list.d/backports.list
apt-get update
apt-get install -y --no-remove \
abootimg \
android-sdk-ext4-utils \
bc \
bison \
bzip2 \
ccache \
cmake \
cpio \
g++ \
debootstrap \
fastboot \
flex \
git \
netcat \
nginx-full \
python3-distutils \
python3-minimal \
python3-serial \
python3.7 \
pkg-config \
procps \
rsync \
u-boot-tools \
unzip
apt install -t buster-backports -y --no-remove \
meson
# setup nginx
sed -i '/gzip_/ s/#\ //g' /etc/nginx/nginx.conf
cp .gitlab-ci/bare-metal/nginx-default-site /etc/nginx/sites-enabled/default
. .gitlab-ci/container/container_post_build.sh

View File

@@ -1,64 +0,0 @@
#!/bin/bash
set -e
set -o xtrace
############### Install packages for building
apt-get -y install ca-certificates
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources.list.d/backports.list
apt-get update
apt-get -y install \
bzip2 \
cmake \
g++ \
gcc \
git \
libc6-dev \
libdrm-nouveau2 \
libexpat1 \
libgbm-dev \
libgbm-dev \
libgles2-mesa-dev \
libllvm8 \
libpng16-16 \
libpng-dev \
libvulkan-dev \
libvulkan1 \
meson \
netcat \
pkg-config \
procps \
python \
waffle-utils \
wget \
zlib1g
############### Build dEQP runner
. .gitlab-ci/build-cts-runner.sh
############### Build dEQP GL
. .gitlab-ci/build-deqp-gl.sh
############### Uninstall the build software
apt-get purge -y \
bzip2 \
cmake \
g++ \
gcc \
git \
libc6-dev \
libgbm-dev \
libgles2-mesa-dev \
libpng-dev \
libvulkan-dev \
meson \
pkg-config \
python \
wget
apt-get autoremove -y --purge

View File

@@ -0,0 +1,60 @@
#!/bin/bash
set -e
set -o xtrace
ROOTFS=/lava-files/rootfs-${arch}
dpkg --add-architecture $arch
apt-get update
# Cross-build test deps
BAREMETAL_EPHEMERAL=" \
autoconf \
automake \
crossbuild-essential-$arch \
git-lfs \
libdrm-dev:$arch \
libboost-dev:$arch \
libegl1-mesa-dev:$arch \
libelf-dev:$arch \
libexpat1-dev:$arch \
libffi-dev:$arch \
libgbm-dev:$arch \
libgles2-mesa-dev:$arch \
libpciaccess-dev:$arch \
libpcre3-dev:$arch \
libpng-dev:$arch \
libpython3-dev:$arch \
libstdc++6:$arch \
libtinfo-dev:$arch \
libegl1-mesa-dev:$arch \
libvulkan-dev:$arch \
libxcb-keysyms1-dev:$arch \
libpython3-dev:$arch \
python3-dev \
qt5-default \
qt5-qmake \
qtbase5-dev:$arch \
"
apt-get install -y --no-remove $BAREMETAL_EPHEMERAL
mkdir /var/cache/apt/archives/$arch
############### Create cross-files
. .gitlab-ci/create-cross-file.sh $arch
. .gitlab-ci/container/container_pre_build.sh
############### Create rootfs
KERNEL_URL=https://gitlab.freedesktop.org/drm/msm/-/archive/drm-msm-fixes-2020-06-25/msm-drm-msm-fixes-2020-06-25.tar.gz
DEBIAN_ARCH=$arch INCLUDE_VK_CTS=1 . .gitlab-ci/container/lava_build.sh
ccache --show-stats
. .gitlab-ci/container/container_post_build.sh
apt-get purge -y $BAREMETAL_EPHEMERAL

View File

@@ -0,0 +1,5 @@
#!/bin/sh
apt-get autoremove -y --purge
ccache --show-stats

View File

@@ -0,0 +1,24 @@
#!/bin/sh
# Common setup among container builds before we get to building code.
export CCACHE_COMPILERCHECK=content
export CCACHE_COMPRESS=true
export CCACHE_DIR=/cache/mesa/ccache
export PATH=/usr/lib/ccache:$PATH
# CMake ignores $PATH, so we have to force CC/GCC to the ccache versions.
# Watch out, you can't have spaces in here because the renderdoc build fails.
export CC="/usr/lib/ccache/gcc"
export CXX="/usr/lib/ccache/g++"
ccache --show-stats
# Make a wrapper script for ninja to always include the -j flags
echo '#!/bin/sh -x' > /usr/local/bin/ninja
echo '/usr/bin/ninja -j${FDO_CI_CONCURRENT:-4} "$@"' >> /usr/local/bin/ninja
chmod +x /usr/local/bin/ninja
# Set MAKEFLAGS so that all make invocations in container builds include the
# flags (doesn't apply to non-container builds, but we don't run make there)
export MAKEFLAGS="-j${FDO_CI_CONCURRENT:-4}"

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@@ -0,0 +1,48 @@
#!/bin/bash
set -e
set -o xtrace
export DEBIAN_FRONTEND=noninteractive
# Ephemeral packages (installed for this script and removed again at the end)
STABLE_EPHEMERAL=" \
libpciaccess-dev:$arch
"
dpkg --add-architecture $arch
apt-get update
apt-get install -y --no-remove \
$STABLE_EPHEMERAL \
crossbuild-essential-$arch \
libelf-dev:$arch \
libexpat1-dev:$arch \
libffi-dev:$arch \
libstdc++6:$arch \
libtinfo-dev:$arch \
wget
if [[ $arch == "armhf" ]]; then
LLVM=llvm-7-dev
else
LLVM=llvm-8-dev
fi
apt-get install -y --no-remove -t buster-backports \
$LLVM:$arch
. .gitlab-ci/create-cross-file.sh $arch
. .gitlab-ci/container/container_pre_build.sh
# dependencies where we want a specific version
EXTRA_MESON_ARGS="--cross-file=/cross_file-${arch}.txt -D libdir=lib/$(dpkg-architecture -A $arch -qDEB_TARGET_MULTIARCH)"
. .gitlab-ci/build-libdrm.sh
apt-get purge -y \
$STABLE_EPHEMERAL
. .gitlab-ci/container/container_post_build.sh

View File

@@ -0,0 +1,5 @@
#!/bin/bash
arch=i386
. .gitlab-ci/container/cross_build.sh

View File

@@ -1,63 +0,0 @@
#!/bin/bash
set -e
set -o xtrace
if [[ "$DEBIAN_ARCH" = "arm64" ]]; then
GCC_ARCH="aarch64-linux-gnu"
KERNEL_ARCH="arm64"
DEFCONFIG="arch/arm64/configs/defconfig"
DEVICE_TREES="arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dtb arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dtb arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dtb arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dtb"
KERNEL_IMAGE_NAME="Image"
else
GCC_ARCH="arm-linux-gnueabihf"
KERNEL_ARCH="arm"
DEFCONFIG="arch/arm/configs/multi_v7_defconfig"
DEVICE_TREES="arch/arm/boot/dts/rk3288-veyron-jaq.dtb arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dtb"
KERNEL_IMAGE_NAME="zImage"
fi
############### Build dEQP runner
if [[ "$DEBIAN_ARCH" = "armhf" ]]; then
EXTRA_MESON_ARGS="--cross-file /cross_file-armhf.txt"
fi
. .gitlab-ci/build-cts-runner.sh
mkdir -p /lava-files/rootfs-${DEBIAN_ARCH}/usr/bin
mv /usr/local/bin/deqp-runner /lava-files/rootfs-${DEBIAN_ARCH}/usr/bin/.
############### Build dEQP
EXTRA_CMAKE_ARGS="-DCMAKE_C_COMPILER=${GCC_ARCH}-gcc -DCMAKE_CXX_COMPILER=${GCC_ARCH}-g++"
STRIP_CMD="${GCC_ARCH}-strip"
. .gitlab-ci/build-deqp-gl.sh
mv /deqp /lava-files/rootfs-${DEBIAN_ARCH}/.
############### Cross-build kernel
KERNEL_URL="https://gitlab.freedesktop.org/tomeu/linux/-/archive/v5.5-rc5-panfrost-fixes/linux-v5.5-rc5-panfrost-fixes.tar.gz"
if [[ "$DEBIAN_ARCH" = "armhf" ]]; then
export ARCH=${KERNEL_ARCH}
export CROSS_COMPILE="${GCC_ARCH}-"
fi
mkdir -p kernel
wget -qO- ${KERNEL_URL} | tar -xz --strip-components=1 -C kernel
pushd kernel
./scripts/kconfig/merge_config.sh ${DEFCONFIG} ../.gitlab-ci/${KERNEL_ARCH}.config
make -j12 ${KERNEL_IMAGE_NAME} dtbs
cp arch/${KERNEL_ARCH}/boot/${KERNEL_IMAGE_NAME} /lava-files/.
cp ${DEVICE_TREES} /lava-files/.
popd
rm -rf kernel
############### Create rootfs
set +e
debootstrap --variant=minbase --arch=${DEBIAN_ARCH} testing /lava-files/rootfs-${DEBIAN_ARCH}/ http://deb.debian.org/debian
cat /lava-files/rootfs-${DEBIAN_ARCH}/debootstrap/debootstrap.log
set -e
cp .gitlab-ci/create-rootfs.sh /lava-files/rootfs-${DEBIAN_ARCH}/.
chroot /lava-files/rootfs-${DEBIAN_ARCH} sh /create-rootfs.sh
rm /lava-files/rootfs-${DEBIAN_ARCH}/create-rootfs.sh

View File

@@ -0,0 +1,239 @@
#!/bin/bash
set -e
set -o xtrace
check_minio()
{
MINIO_PATH="minio-packet.freedesktop.org/mesa-lava/$1/${DISTRIBUTION_TAG}/${DEBIAN_ARCH}"
if wget -q --method=HEAD "https://${MINIO_PATH}/done"; then
exit
fi
}
# If remote files are up-to-date, skip rebuilding them
check_minio "mesa/mesa"
check_minio "${CI_PROJECT_PATH}"
. .gitlab-ci/container/container_pre_build.sh
if [[ "$DEBIAN_ARCH" = "arm64" ]]; then
GCC_ARCH="aarch64-linux-gnu"
KERNEL_ARCH="arm64"
DEFCONFIG="arch/arm64/configs/defconfig"
DEVICE_TREES="arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dtb arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dtb arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dtb arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dtb arch/arm64/boot/dts/qcom/apq8016-sbc.dtb"
KERNEL_IMAGE_NAME="Image"
elif [[ "$DEBIAN_ARCH" = "armhf" ]]; then
GCC_ARCH="arm-linux-gnueabihf"
KERNEL_ARCH="arm"
DEFCONFIG="arch/arm/configs/multi_v7_defconfig"
DEVICE_TREES="arch/arm/boot/dts/rk3288-veyron-jaq.dtb arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dtb"
KERNEL_IMAGE_NAME="zImage"
. .gitlab-ci/create-cross-file.sh armhf
else
GCC_ARCH="x86_64-linux-gnu"
KERNEL_ARCH="x86_64"
DEFCONFIG="arch/x86/configs/x86_64_defconfig"
DEVICE_TREES=""
KERNEL_IMAGE_NAME="bzImage"
fi
# Determine if we're in a cross build.
if [[ -e /cross_file-$DEBIAN_ARCH.txt ]]; then
EXTRA_MESON_ARGS="--cross-file /cross_file-$DEBIAN_ARCH.txt"
EXTRA_CMAKE_ARGS="-DCMAKE_TOOLCHAIN_FILE=/toolchain-$DEBIAN_ARCH.cmake"
export ARCH=${KERNEL_ARCH}
export CROSS_COMPILE="${GCC_ARCH}-"
fi
apt-get update
apt-get install -y automake \
git \
bc \
cmake \
wget \
debootstrap \
libboost-dev \
libegl1-mesa-dev \
libgbm-dev \
libgles2-mesa-dev \
libpcre3-dev \
libpng-dev \
libpython3-dev \
libssl-dev \
libvulkan-dev \
libxcb-keysyms1-dev \
python3-dev \
python3-distutils \
python3-serial \
qt5-default \
qt5-qmake \
qtbase5-dev
if [[ "$DEBIAN_ARCH" = "armhf" ]]; then
apt-get install -y libboost-dev:armhf \
libegl1-mesa-dev:armhf \
libelf-dev:armhf \
libgbm-dev:armhf \
libgles2-mesa-dev:armhf \
libpcre3-dev:armhf \
libpng-dev:armhf \
libpython3-dev:armhf \
libvulkan-dev:armhf \
libxcb-keysyms1-dev:armhf \
qtbase5-dev:armhf
fi
############### Build dEQP runner
. .gitlab-ci/build-cts-runner.sh
mkdir -p /lava-files/rootfs-${DEBIAN_ARCH}/usr/bin
mv /usr/local/bin/deqp-runner /lava-files/rootfs-${DEBIAN_ARCH}/usr/bin/.
############### Build dEQP
STRIP_CMD="${GCC_ARCH}-strip"
if [ -n "$INCLUDE_VK_CTS" ]; then
DEQP_TARGET=surfaceless . .gitlab-ci/build-deqp-vk.sh
else
. .gitlab-ci/build-deqp-gl.sh
fi
mv /deqp /lava-files/rootfs-${DEBIAN_ARCH}/.
############### Build apitrace
. .gitlab-ci/build-apitrace.sh
mkdir -p /lava-files/rootfs-${DEBIAN_ARCH}/apitrace
mv /apitrace/build /lava-files/rootfs-${DEBIAN_ARCH}/apitrace
rm -rf /apitrace
mkdir -p /lava-files/rootfs-${DEBIAN_ARCH}/waffle
mv /waffle/build /lava-files/rootfs-${DEBIAN_ARCH}/waffle
rm -rf /waffle
############### Build renderdoc
EXTRA_CMAKE_ARGS+=" -DENABLE_XCB=false"
. .gitlab-ci/build-renderdoc.sh
mkdir -p /lava-files/rootfs-${DEBIAN_ARCH}/renderdoc
mv /renderdoc/build /lava-files/rootfs-${DEBIAN_ARCH}/renderdoc
rm -rf /renderdoc
############### Build libdrm
EXTRA_MESON_ARGS+=" -D prefix=/libdrm"
. .gitlab-ci/build-libdrm.sh
mkdir -p /lava-files/rootfs-${DEBIAN_ARCH}/usr/lib/$GCC_ARCH
find /libdrm/ -name lib\*\.so\* | xargs cp -t /lava-files/rootfs-${DEBIAN_ARCH}/usr/lib/$GCC_ARCH/.
rm -rf /libdrm
############### Cross-build kernel
mkdir -p kernel
wget -qO- ${KERNEL_URL} | tar -xz --strip-components=1 -C kernel
pushd kernel
./scripts/kconfig/merge_config.sh ${DEFCONFIG} ../.gitlab-ci/${KERNEL_ARCH}.config
make ${KERNEL_IMAGE_NAME}
for image in ${KERNEL_IMAGE_NAME}; do
cp arch/${KERNEL_ARCH}/boot/${image} /lava-files/.
done
if [[ -n ${DEVICE_TREES} ]]; then
make dtbs
cp ${DEVICE_TREES} /lava-files/.
fi
if [[ ${DEBIAN_ARCH} = "arm64" ]] && which mkimage > /dev/null; then
make Image.lzma
mkimage \
-f auto \
-A arm \
-O linux \
-d arch/arm64/boot/Image.lzma \
-C lzma\
-b arch/arm64/boot/dts/qcom/sdm845-cheza-r3.dtb \
/lava-files/cheza-kernel
fi
popd
rm -rf kernel
############### Create rootfs
set +e
debootstrap \
--variant=minbase \
--arch=${DEBIAN_ARCH} \
--components main,contrib,non-free \
buster \
/lava-files/rootfs-${DEBIAN_ARCH}/ \
http://deb.debian.org/debian
cat /lava-files/rootfs-${DEBIAN_ARCH}/debootstrap/debootstrap.log
set -e
cp .gitlab-ci/create-rootfs.sh /lava-files/rootfs-${DEBIAN_ARCH}/.
cp .gitlab-ci/container/llvm-snapshot.gpg.key /lava-files/rootfs-${DEBIAN_ARCH}/.
chroot /lava-files/rootfs-${DEBIAN_ARCH} sh /create-rootfs.sh
rm /lava-files/rootfs-${DEBIAN_ARCH}/create-rootfs.sh
rm /lava-files/rootfs-${DEBIAN_ARCH}/llvm-snapshot.gpg.key
du -ah /lava-files/rootfs-${DEBIAN_ARCH} | sort -h | tail -100
pushd /lava-files/rootfs-${DEBIAN_ARCH}
tar cvzf /lava-files/lava-rootfs.tgz .
popd
if [ ${DEBIAN_ARCH} = arm64 ]; then
# Pull down a specific build of qcomlt/release/qcomlt-5.4 8c79b3d12355
# ("Merge tag 'v5.4.23' into release/qcomlt-5.4"), where I used the
# .config from
# http://snapshots.linaro.org/96boards/dragonboard820c/linaro/debian/457/config-5.4.0-qcomlt-arm64
# with the following merged in:
#
# CONFIG_DRM=y
# CONFIG_DRM_MSM=y
# CONFIG_ATL1C=y
#
# Reason: 5.5 has a big stack of oopses and warns on db820c. 4.14-5.4
# linaro kernel binaries (see above .config link) have these as modules
# and distributed the modules only in the debian system, not the initrd,
# so they're very hard to extract (involving simg2img and loopback
# mounting). 4.11 is missing d72fea538fe6 ("drm/msm: Fix the check for
# the command size") so it can't actually run fredreno. qcomlt-4.14 is
# unstable at boot (~10% instaboot rate). The 5.4 qcomlt kernel with msm
# built in seems like the easiest way to go.
wget https://people.freedesktop.org/~anholt/qcomlt-5.4-msm-build/Image.gz -O Image.gz \
-O /lava-files/db820c-kernel
wget https://people.freedesktop.org/~anholt/qcomlt-5.4-msm-build/apq8096-db820c.dtb \
-O /lava-files/db820c.dtb
# Make a gzipped copy of the Image for db410c.
gzip -k /lava-files/Image
# Add missing a630 firmware, added to debian packge in apr 2020
wget https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/plain/qcom/a630_gmu.bin \
-O /lava-files/rootfs-arm64/lib/firmware/qcom/a630_gmu.bin
wget https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/plain/qcom/a630_sqe.fw \
-O /lava-files/rootfs-arm64/lib/firmware/qcom/a630_sqe.fw
fi
. .gitlab-ci/container/container_post_build.sh
############### Upload the files!
if [ -n "$UPLOAD_FOR_LAVA" ]; then
ci-fairy minio login $CI_JOB_JWT
FILES_TO_UPLOAD="lava-rootfs.tgz \
$KERNEL_IMAGE_NAME"
if [[ -n $DEVICE_TREES ]]; then
FILES_TO_UPLOAD="$FILES_TO_UPLOAD $(basename -a $DEVICE_TREES)"
fi
for f in $FILES_TO_UPLOAD; do
ci-fairy minio cp /lava-files/$f \
minio://${MINIO_PATH}/$f
done
touch /lava-files/done
ci-fairy minio cp /lava-files/done minio://${MINIO_PATH}/done
fi

View File

@@ -0,0 +1,8 @@
#!/bin/bash
arch=ppc64el
. .gitlab-ci/container/cross_build.sh
apt-get install -y --no-remove \
libvulkan-dev:$arch

View File

@@ -0,0 +1,5 @@
#!/bin/bash
arch=s390x
. .gitlab-ci/container/cross_build.sh

View File

@@ -0,0 +1,97 @@
#!/bin/bash
set -e
set -o xtrace
export DEBIAN_FRONTEND=noninteractive
apt-get install -y \
ca-certificates \
gnupg \
python3-pip \
python3-setuptools \
unzip \
wget
# Upstream LLVM package repository
apt-key add .gitlab-ci/container/llvm-snapshot.gpg.key
echo "deb https://apt.llvm.org/buster/ llvm-toolchain-buster-9 main" >/etc/apt/sources.list.d/llvm9.list
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources.list.d/backports.list
apt-get update
apt-get install -y --no-remove \
$STABLE_EPHEMERAL \
bison \
ccache \
clang-9 \
dpkg-cross \
flex \
g++ \
g++-mingw-w64-x86-64 \
gcc \
git \
libclang-9-dev \
libclc-dev \
libelf-dev \
libepoxy-dev \
libexpat1-dev \
libgtk-3-dev \
libomxil-bellagio-dev \
libpciaccess-dev \
libunwind-dev \
libva-dev \
libvdpau-dev \
libvulkan-dev \
libx11-dev \
libx11-xcb-dev \
libxdamage-dev \
libxext-dev \
libxml2-utils \
libxrandr-dev \
libxrender-dev \
libxshmfence-dev \
libxvmc-dev \
libxxf86vm-dev \
libz-mingw-w64-dev \
llvm-9-dev \
pkg-config \
python-mako \
python3-mako \
python3-pil \
python3-pip \
python3-requests \
python3-setuptools \
qemu-user \
scons \
wine64-development \
x11proto-dri2-dev \
x11proto-gl-dev \
x11proto-randr-dev \
xz-utils \
zlib1g-dev
apt-get install -y --no-remove -t buster-backports \
libclang-8-dev \
libllvm8 \
meson
# Needed for ci-fairy, this revision is able to upload files to MinIO
pip3 install git+http://gitlab.freedesktop.org/freedesktop/ci-templates@6f5af7e5574509726c79109e3c147cee95e81366
# for the vulkan overlay layer and ACO tests
wget https://github.com/KhronosGroup/glslang/releases/download/SDK-candidate-26-Jul-2020/glslang-master-linux-Release.zip
unzip glslang-master-linux-Release.zip bin/glslangValidator
install -m755 bin/glslangValidator /usr/local/bin/
rm bin/glslangValidator glslang-master-linux-Release.zip
############### Uninstall ephemeral packages
apt-get purge -y \
gnupg \
unzip
. .gitlab-ci/container/container_post_build.sh

View File

@@ -5,104 +5,39 @@ set -o xtrace
export DEBIAN_FRONTEND=noninteractive
CROSS_ARCHITECTURES="i386"
for arch in $CROSS_ARCHITECTURES; do
dpkg --add-architecture $arch
done
apt-get install -y \
ca-certificates \
gnupg \
unzip \
wget
# Upstream LLVM package repository
apt-key add .gitlab-ci/container/llvm-snapshot.gpg.key
echo "deb https://apt.llvm.org/buster/ llvm-toolchain-buster-9 main" >/etc/apt/sources.list.d/llvm9.list
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources.list.d/backports.list
apt-get update
# Use newer packages from backports by default
cat >/etc/apt/preferences <<EOF
Package: *
Pin: release a=buster-backports
Pin-Priority: 500
EOF
apt-get dist-upgrade -y
apt-get install -y --no-remove \
# Ephemeral packages (installed for this script and removed again at the end)
STABLE_EPHEMERAL=" \
autoconf \
automake \
autotools-dev \
bison \
clang-9 \
bzip2 \
cmake \
flex \
g++ \
gcc \
gettext \
git \
libclang-6.0-dev \
libclang-7-dev \
libclang-8-dev \
libclang-9-dev \
libclc-dev \
libelf-dev \
libepoxy-dev \
libexpat1-dev \
gnupg \
libgbm-dev \
libgtk-3-dev \
libomxil-bellagio-dev \
libpciaccess-dev \
libtool \
libunwind-dev \
libva-dev \
libvdpau-dev \
libvulkan-dev \
libx11-dev \
libx11-xcb-dev \
libxdamage-dev \
libxext-dev \
libxrandr-dev \
libxrender-dev \
libxshmfence-dev \
libxvmc-dev \
libxxf86vm-dev \
llvm-6.0-dev \
llvm-7-dev \
llvm-8-dev \
llvm-9-dev \
meson \
pkg-config \
python-mako \
python3-mako \
scons \
x11proto-dri2-dev \
x11proto-gl-dev \
x11proto-randr-dev \
xz-utils \
zlib1g-dev
make \
unzip \
wget \
"
# Cross-build Mesa deps
for arch in $CROSS_ARCHITECTURES; do
apt-get install -y --no-remove \
crossbuild-essential-${arch} \
libdrm-dev:${arch} \
libelf-dev:${arch} \
libexpat1-dev:${arch}
done
# We need multiarch for Wine
dpkg --add-architecture i386
apt-get update
# for 64bit windows cross-builds
apt-get install -y --no-remove \
libz-mingw-w64-dev \
mingw-w64 \
wine \
wine32 \
wine64
$STABLE_EPHEMERAL \
libarchive-dev \
liblua5.3-dev \
libxml2-dev \
wine-development \
wine32-development
apt-get install -y --no-remove -t buster-backports \
llvm-8-dev
. .gitlab-ci/container/container_pre_build.sh
# Debian's pkg-config wrapers for mingw are broken, and there's no sign that
# they're going to be fixed, so we'll just have to fix it ourselves
@@ -114,12 +49,6 @@ PKG_CONFIG_LIBDIR=/usr/x86_64-w64-mingw32/lib/pkgconfig pkg-config \$@
EOF
chmod +x /usr/local/bin/x86_64-w64-mingw32-pkg-config
# for the vulkan overlay layer
wget https://github.com/KhronosGroup/glslang/releases/download/master-tot/glslang-master-linux-Release.zip
unzip glslang-master-linux-Release.zip bin/glslangValidator
install -m755 bin/glslangValidator /usr/local/bin/
rm bin/glslangValidator glslang-master-linux-Release.zip
# dependencies where we want a specific version
export XORG_RELEASES=https://xorg.freedesktop.org/releases/individual
@@ -127,7 +56,6 @@ export XCB_RELEASES=https://xcb.freedesktop.org/dist
export WAYLAND_RELEASES=https://wayland.freedesktop.org/releases
export XORGMACROS_VERSION=util-macros-1.19.0
export LIBDRM_VERSION=libdrm-2.4.100
export XCBPROTO_VERSION=xcb-proto-1.13
export LIBXCB_VERSION=libxcb-1.13
export LIBWAYLAND_VERSION=wayland-1.15.0
@@ -148,10 +76,7 @@ tar -xvf $LIBXCB_VERSION.tar.bz2 && rm $LIBXCB_VERSION.tar.bz2
cd $LIBXCB_VERSION; ./configure; make install; cd ..
rm -rf $LIBXCB_VERSION
wget https://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.bz2
tar -xvf $LIBDRM_VERSION.tar.bz2 && rm $LIBDRM_VERSION.tar.bz2
cd $LIBDRM_VERSION; meson build -D vc4=true -D freedreno=true -D etnaviv=true; ninja -j4 -C build install; cd ..
rm -rf $LIBDRM_VERSION
. .gitlab-ci/build-libdrm.sh
wget $WAYLAND_RELEASES/$LIBWAYLAND_VERSION.tar.xz
tar -xvf $LIBWAYLAND_VERSION.tar.xz && rm $LIBWAYLAND_VERSION.tar.xz
@@ -167,7 +92,7 @@ rm -rf $WAYLAND_PROTOCOLS_VERSION
# The version of libglvnd-dev in debian is too old
# Check this page to see when this local compilation can be dropped in favour of the package:
# https://packages.debian.org/libglvnd-dev
GLVND_VERSION=1.2.0
GLVND_VERSION=1.3.2
wget https://gitlab.freedesktop.org/glvnd/libglvnd/-/archive/v$GLVND_VERSION/libglvnd-v$GLVND_VERSION.tar.gz
tar -xvf libglvnd-v$GLVND_VERSION.tar.gz && rm libglvnd-v$GLVND_VERSION.tar.gz
pushd libglvnd-v$GLVND_VERSION; ./autogen.sh; ./configure; make install; popd
@@ -181,40 +106,10 @@ cd shader-db
make
popd
# Use ccache to speed up builds
apt-get install -y --no-remove ccache
# We need xmllint to validate the XML files in Mesa
apt-get install -y --no-remove libxml2-utils
# Generate cross build files for Meson
for arch in $CROSS_ARCHITECTURES; do
cross_file="/cross_file-$arch.txt"
/usr/share/meson/debcrossgen --arch "$arch" -o "$cross_file"
# Explicitly set ccache path for cross compilers
sed -i "s|/usr/bin/\([^-]*\)-linux-gnu\([^-]*\)-g|/usr/lib/ccache/\\1-linux-gnu\\2-g|g" "$cross_file"
if [ "$arch" = "i386" ]; then
# Work around a bug in debcrossgen that should be fixed in the next release
sed -i "s|cpu_family = 'i686'|cpu_family = 'x86'|g" "$cross_file"
# Don't need wrapper for i386 executables
sed -i -e '/\[properties\]/a\' -e "needs_exe_wrapper = False" "$cross_file"
fi
done
############### Uninstall the build software
apt-get purge -y \
autoconf \
automake \
autotools-dev \
cmake \
git \
gnupg \
libgbm-dev \
libtool \
unzip \
wget
$STABLE_EPHEMERAL
apt-get autoremove -y --purge
. .gitlab-ci/container/container_post_build.sh

View File

@@ -24,36 +24,46 @@ EOF
apt-get dist-upgrade -y
apt-get install -y --no-remove \
llvm-3.9-dev \
libclang-3.9-dev \
llvm-4.0-dev \
libclang-4.0-dev \
llvm-5.0-dev \
libclang-5.0-dev \
g++ \
bison \
bzip2 \
ccache \
zlib1g-dev \
pkg-config \
flex \
g++ \
gcc \
git \
libepoxy-dev \
libclang-3.9-dev \
libclang-4.0-dev \
libclang-5.0-dev \
libclang-6.0-dev \
libclang-7-dev \
libclc-dev \
xz-utils \
libdrm-dev \
libexpat1-dev \
libelf-dev \
libunwind-dev \
libepoxy-dev \
libexpat1-dev \
libpng-dev \
libunwind-dev \
llvm-3.9-dev \
llvm-4.0-dev \
llvm-5.0-dev \
llvm-6.0-dev \
llvm-7-dev \
ninja-build \
pkg-config \
python-mako \
python3-mako \
bison \
flex \
gettext \
python3-pip \
python3-setuptools \
python3-wheel \
scons \
meson
xz-utils \
zlib1g-dev
# We need at least 0.52.0, which is not in stretch
python3 -m pip install meson>=0.52
. .gitlab-ci/container/container_pre_build.sh
############### Uninstall unused packages
apt-get autoremove -y --purge
. .gitlab-ci/container/container_post_build.sh

View File

@@ -0,0 +1,61 @@
#!/bin/bash
set -e
set -o xtrace
export DEBIAN_FRONTEND=noninteractive
apt-get install -y \
ca-certificates \
gnupg
# Upstream LLVM package repository
apt-key add .gitlab-ci/container/llvm-snapshot.gpg.key
echo "deb https://apt.llvm.org/buster/ llvm-toolchain-buster-9 main" >/etc/apt/sources.list.d/llvm9.list
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources.list.d/backports.list
apt-get update
apt-get dist-upgrade -y
apt-get install -y --no-remove \
git \
git-lfs \
libexpat1 \
libllvm9 \
liblz4-1 \
libpcre32-3 \
libpng16-16 \
libpython3.7 \
libvulkan1 \
libwayland-client0 \
libwayland-server0 \
libxcb-ewmh2 \
libxcb-randr0 \
libxcb-keysyms1 \
libxcb-xfixes0 \
libxkbcommon0 \
libxrandr2 \
libxrender1 \
python \
python3-mako \
python3-numpy \
python3-pil \
python3-pytest \
python3-requests \
python3-six \
python3-yaml \
python3.7 \
qt5-default \
qt5-qmake \
vulkan-tools \
waffle-utils \
xauth \
xvfb \
zlib1g
apt-get purge -y \
gnupg
apt-get autoremove -y --purge

View File

@@ -5,60 +5,42 @@ set -o xtrace
export DEBIAN_FRONTEND=noninteractive
apt-get install -y \
ca-certificates \
gnupg \
# Upstream LLVM package repository
apt-key add .gitlab-ci/container/llvm-snapshot.gpg.key
echo "deb https://apt.llvm.org/buster/ llvm-toolchain-buster-9 main" >/etc/apt/sources.list.d/llvm9.list
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources.list.d/backports.list
apt-get update
# Use newer packages from backports by default
cat >/etc/apt/preferences <<EOF
Package: *
Pin: release a=buster-backports
Pin-Priority: 500
EOF
apt-get dist-upgrade -y
apt-get install -y --no-remove \
# Ephemeral packages (installed for this script and removed again at the end)
STABLE_EPHEMERAL=" \
autoconf \
automake \
ccache \
cmake \
g++ \
git \
gcc \
libexpat1 \
libgbm-dev \
libgles2-mesa-dev \
libpng16-16 \
libpcre3-dev \
libpciaccess-dev \
libpng-dev \
libvulkan1 \
libvulkan-dev \
libwaffle-dev \
libwayland-server0 \
libxcb-xfixes0 \
libxkbcommon0 \
libxcb-keysyms1-dev \
libxkbcommon-dev \
libxrender1 \
libxrender-dev \
libllvm9 \
make \
meson \
patch \
pkg-config \
python3-mako \
python3-numpy \
python3-six \
python \
waffle-utils \
xauth \
xvfb \
zlib1g
python3-distutils \
python3.7-dev \
wget \
xz-utils \
"
apt-get install -y --no-remove \
$STABLE_EPHEMERAL
. .gitlab-ci/container/container_pre_build.sh
############### Build virglrenderer
. .gitlab-ci/build-virglrenderer.sh
############### Build piglit
@@ -72,25 +54,23 @@ apt-get install -y --no-remove \
. .gitlab-ci/build-deqp-gl.sh
############### Build apitrace
. .gitlab-ci/build-apitrace.sh
############### Build renderdoc
. .gitlab-ci/build-renderdoc.sh
############### Build libdrm
. .gitlab-ci/build-libdrm.sh
############### Uninstall the build software
ccache --show-stats
apt-get purge -y \
cmake \
g++ \
gcc \
git \
gnupg \
libc6-dev \
libgbm-dev \
libgles2-mesa-dev \
libpng-dev \
libwaffle-dev \
libxkbcommon-dev \
libxrender-dev \
meson \
patch \
pkg-config \
python
$STABLE_EPHEMERAL
apt-get autoremove -y --purge

View File

@@ -5,83 +5,133 @@ set -o xtrace
export DEBIAN_FRONTEND=noninteractive
apt-get install -y \
ca-certificates \
gnupg \
# Ephemeral packages (installed for this script and removed again at the end)
STABLE_EPHEMERAL=" \
ccache \
cmake \
g++ \
libgbm-dev \
libgles2-mesa-dev \
liblz4-dev \
libpng-dev \
libvulkan-dev \
libxcb-ewmh-dev \
libxkbcommon-dev \
libxrandr-dev \
libxrender-dev \
libzstd-dev \
meson \
p7zip \
pkg-config \
python3-distutils \
wget \
"
# Upstream LLVM package repository
apt-key add .gitlab-ci/container/llvm-snapshot.gpg.key
echo "deb https://apt.llvm.org/buster/ llvm-toolchain-buster-9 main" >/etc/apt/sources.list.d/llvm9.list
# Unfortunately, gfxreconstruct needs the -dev packages:
# https://github.com/LunarG/gfxreconstruct/issues/402
apt-get install -y --no-remove \
libwayland-dev \
libx11-xcb-dev \
libxcb-keysyms1-dev \
libxcb1-dev \
$STABLE_EPHEMERAL
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources.list.d/backports.list
# We need multiarch for Wine
dpkg --add-architecture i386
apt-get update
# Use newer packages from backports by default
cat >/etc/apt/preferences <<EOF
Package: *
Pin: release a=buster-backports
Pin-Priority: 500
apt-get install -y --no-remove \
wine \
wine32 \
wine64
############### Set up Wine env variables
export WINEDEBUG="-all"
export WINEPREFIX="/dxvk-wine64"
############### Install DXVK
DXVK_VERSION="1.6"
# We don't want crash dialogs
cat >crashdialog.reg <<EOF
Windows Registry Editor Version 5.00
[HKEY_CURRENT_USER\Software\Wine\WineDbg]
"ShowCrashDialog"=dword:00000000
EOF
apt-get dist-upgrade -y
# Set the wine prefix and disable the crash dialog
wine regedit crashdialog.reg
rm crashdialog.reg
apt-get install -y --no-remove \
cmake \
g++ \
git \
gcc \
libexpat1 \
libgbm-dev \
libgles2-mesa-dev \
libpng16-16 \
libpng-dev \
libvulkan1 \
libvulkan-dev \
libwayland-server0 \
libxcb-randr0 \
libxcb-xfixes0 \
libxkbcommon0 \
libxkbcommon-dev \
libxrender1 \
libxrender-dev \
libllvm9 \
meson \
patch \
pkg-config \
python3-distutils \
python \
xauth \
xvfb
# DXVK's setup often fails with:
# "${WINEPREFIX}: Not a valid wine prefix."
# and that is just spit because of checking the existance of the
# system.reg file, which fails.
# Just giving it a bit more of time for it to be created solves the
# problem ...
test -f "${WINEPREFIX}/system.reg" || sleep 2
wget "https://github.com/doitsujin/dxvk/releases/download/v${DXVK_VERSION}/dxvk-${DXVK_VERSION}.tar.gz"
tar xzpf dxvk-"${DXVK_VERSION}".tar.gz
dxvk-"${DXVK_VERSION}"/setup_dxvk.sh install
rm -rf dxvk-"${DXVK_VERSION}"
rm dxvk-"${DXVK_VERSION}".tar.gz
############### Install Windows' apitrace binaries
APITRACE_VERSION="9.0"
APITRACE_VERSION_DATE="20191126"
wget "https://github.com/apitrace/apitrace/releases/download/${APITRACE_VERSION}/apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64.7z"
7zr x "apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64.7z" \
"apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64/bin/apitrace.exe" \
"apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64/bin/d3dretrace.exe"
mv "apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64" /apitrace-msvc-win64
rm "apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64.7z"
# Add the apitrace path to the registry
wine \
reg add "HKEY_LOCAL_MACHINE\System\CurrentControlSet\Control\Session Manager\Environment" \
/v Path \
/t REG_EXPAND_SZ \
/d "C:\windows\system32;C:\windows;C:\windows\system32\wbem;Z:\apitrace-msvc-win64\bin" \
/f
############### Building ...
. .gitlab-ci/container/container_pre_build.sh
############### Build dEQP runner
. .gitlab-ci/build-cts-runner.sh
############### Build Fossilize
. .gitlab-ci/build-fossilize.sh
############### Build dEQP VK
. .gitlab-ci/build-deqp-vk.sh
############### Build gfxreconstruct
. .gitlab-ci/build-gfxreconstruct.sh
############### Build VulkanTools
. .gitlab-ci/build-vulkantools.sh
############### Uninstall the build software
ccache --show-stats
apt-get purge -y \
cmake \
g++ \
gcc \
git \
gnupg \
libgbm-dev \
libgles2-mesa-dev \
libpng-dev \
libvulkan-dev \
libxkbcommon-dev \
libxrender-dev \
meson \
patch \
pkg-config \
python
$STABLE_EPHEMERAL
apt-get autoremove -y --purge

34
.gitlab-ci/create-cross-file.sh Executable file
View File

@@ -0,0 +1,34 @@
#!/bin/bash
arch=$1
cross_file="/cross_file-$arch.txt"
/usr/share/meson/debcrossgen --arch $arch -o "$cross_file"
# Explicitly set ccache path for cross compilers
sed -i "s|/usr/bin/\([^-]*\)-linux-gnu\([^-]*\)-g|/usr/lib/ccache/\\1-linux-gnu\\2-g|g" "$cross_file"
if [ "$arch" = "i386" ]; then
# Work around a bug in debcrossgen that should be fixed in the next release
sed -i "s|cpu_family = 'i686'|cpu_family = 'x86'|g" "$cross_file"
fi
# Rely on qemu-user being configured in binfmt_misc on the host
sed -i -e '/\[properties\]/a\' -e "needs_exe_wrapper = False" "$cross_file"
# Set up cmake cross compile toolchain file for dEQP builds
toolchain_file="/toolchain-$arch.cmake"
if [[ "$arch" = "arm64" ]]; then
GCC_ARCH="aarch64-linux-gnu"
DE_CPU="DE_CPU_ARM_64"
CMAKE_ARCH=arm
elif [[ "$arch" = "armhf" ]]; then
GCC_ARCH="arm-linux-gnueabihf"
DE_CPU="DE_CPU_ARM"
CMAKE_ARCH=arm
fi
if [[ -n "$GCC_ARCH" ]]; then
echo "set(CMAKE_SYSTEM_NAME Linux)" > "$toolchain_file"
echo "set(CMAKE_SYSTEM_PROCESSOR arm)" >> "$toolchain_file"
echo "set(CMAKE_C_COMPILER /usr/lib/ccache/$GCC_ARCH-gcc)" >> "$toolchain_file"
echo "set(CMAKE_CXX_COMPILER /usr/lib/ccache/$GCC_ARCH-g++)" >> "$toolchain_file"
echo "set(ENV{PKG_CONFIG} \"/usr/bin/$GCC_ARCH-pkg-config\")" >> "$toolchain_file"
echo "set(DE_CPU $DE_CPU)" >> "$toolchain_file"
fi

View File

@@ -2,37 +2,85 @@
set -ex
LLVM=libllvm8
if [ $DEBIAN_ARCH = arm64 ]; then
ARCH_PACKAGES="firmware-qcom-media"
elif [ $DEBIAN_ARCH = amd64 ]; then
# Upstream LLVM package repository
apt-get -y install --no-install-recommends gnupg ca-certificates
apt-key add /llvm-snapshot.gpg.key
echo "deb https://apt.llvm.org/buster/ llvm-toolchain-buster-9 main" >/etc/apt/sources.list.d/llvm9.list
apt-get update
# LLVMPipe on armhf is broken with LLVM 8
if [ `dpkg --print-architecture` = "armhf" ]; then
LLVM=libllvm7
ARCH_PACKAGES="libelf1
libllvm9
libxcb-dri2-0
libxcb-dri3-0
libxcb-present0
libxcb-sync1
libxcb-xfixes0
libxshmfence1
firmware-amd-graphics
"
fi
apt-get -y install --no-install-recommends \
ca-certificates \
curl \
initramfs-tools \
libpng16-16 \
strace \
libsensors5 \
libexpat1 \
libdrm2 \
libdrm-nouveau2 \
$LLVM
libx11-6 \
libx11-xcb1 \
$ARCH_PACKAGES \
netcat-openbsd \
python3 \
libpython3.7 \
python3-pil \
python3-pytest \
python3-requests \
python3-yaml \
sntp \
wget \
xz-utils
if [ -n "$INCLUDE_VK_CTS" ]; then
apt-get install -y libvulkan1
fi
passwd root -d
chsh -s /bin/sh
ln -s /bin/sh /init
cat > /init <<EOF
#!/bin/sh
export PS1=lava-shell:
exec sh
EOF
chmod +x /init
mkdir -p /lib/firmware/rtl_nic
wget https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/rtl_nic/rtl8153a-3.fw -O /lib/firmware/rtl_nic/rtl8153a-3.fw
#######################################################################
# Strip the image to a small minimal system without removing the debian
# toolchain.
# xz compress firmware so it doesn't waste RAM at runtime. Except db820c's
# GPU firmware, due to using a precompiled kernel without compression support.
find /lib/firmware -type f -print0 | \
grep -vz a530 | \
xargs -0r -P4 -n4 xz -T1 -C crc32
ln -s /lib/firmware/qcom/a530* /lib/firmware/
# Copy timezone file and remove tzdata package
rm -rf /etc/localtime
cp /usr/share/zoneinfo/Etc/UTC /etc/localtime
UNNEEDED_PACKAGES="libfdisk1
tzdata
diffutils"
diffutils
gnupg"
export DEBIAN_FRONTEND=noninteractive
@@ -54,6 +102,7 @@ rm -rf /var/log/*
# Dropping documentation, localization, i18n files, etc
rm -rf /usr/share/doc/*
rm -rf /usr/share/locale/*
rm -rf /usr/share/X11/locale/*
rm -rf /usr/share/man
rm -rf /usr/share/i18n/*
rm -rf /usr/share/info/*
@@ -83,8 +132,8 @@ rm -rf usr/share/misc/usb.ids
# IMPORTANT: The Debian system is not longer functional at this point,
# for example, apt and dpkg will stop working
UNNEEDED_PACKAGES="apt libapt-pkg5.0 "\
"ncurses-bin ncurses-base libncursesw5 libncurses5 "\
UNNEEDED_PACKAGES="apt libapt-pkg6.0 "\
"ncurses-bin ncurses-base libncursesw6 libncurses6 "\
"perl-base "\
"debconf libdebconfclient0 "\
"e2fsprogs e2fslibs libfdisk1 "\
@@ -93,14 +142,23 @@ UNNEEDED_PACKAGES="apt libapt-pkg5.0 "\
"init-system-helpers "\
"bash "\
"cpio "\
"xz-utils "\
"passwd "\
"libsemanage1 libsemanage-common "\
"libsepol1 "\
"gzip "\
"gpgv "\
"hostname "\
"adduser "\
"debian-archive-keyring "\
"libegl1-mesa-dev "\
"libegl-mesa0 "\
"libgl1-mesa-dev "\
"libgl1-mesa-dri "\
"libglapi-mesa "\
"libgles2-mesa-dev "\
"libglx-mesa0 "\
"mesa-common-dev "\
"libz3-4 "\
# Removing unneeded packages
for PACKAGE in ${UNNEEDED_PACKAGES}
@@ -154,10 +212,10 @@ rm -rf usr/lib/xtables
rm -rf usr/lib/locale/*
# partition helpers
rm usr/sbin/*fdisk
rm -rf usr/sbin/*fdisk
# local compiler
rm usr/bin/localedef
rm -rf usr/bin/localedef
# Systemd dns resolver
find usr etc -name '*systemd-resolve*' -prune -exec rm -r {} \;
@@ -178,18 +236,16 @@ find usr etc -name '*fuse*' -prune -exec rm -r {} \;
rm -rf usr/lib/lsb
# Only needed when adding libraries
rm usr/sbin/ldconfig*
rm -rf usr/sbin/ldconfig*
# Games, unused
rmdir usr/games
# Remove pam module to authenticate against a DB
# plus libdb-5.3.so that is only used by this pam module
rm usr/lib/*/security/pam_userdb.so
rm usr/lib/*/libdb-5.3.so
rm -rf usr/lib/*/security/pam_userdb.so
rm -rf usr/lib/*/libdb-5.3.so
# remove NSS support for nis, nisplus and hesiod
rm usr/lib/*/libnss_hesiod*
rm usr/lib/*/libnss_nis*
rm bin/tar
rm -rf usr/lib/*/libnss_hesiod*
rm -rf usr/lib/*/libnss_nis*

View File

@@ -0,0 +1,4 @@
lp_test_arit
roundeven
u_format_test
u_half_test

View File

@@ -0,0 +1,4 @@
lp_test_arit
lp_test_format
lp_test_printf
u_format_test

View File

@@ -31,3 +31,463 @@ dEQP-GLES2.functional.texture.filtering.cube.nearest_linear_clamp_l8_npot
dEQP-GLES2.functional.texture.filtering.cube.nearest_linear_clamp_rgb888_npot
dEQP-GLES2.functional.texture.filtering.cube.nearest_linear_clamp_rgba4444_npot
dEQP-GLES2.functional.texture.filtering.cube.nearest_linear_clamp_rgba8888_npot
dEQP-GLES3.functional.clipping.line.wide_line_clip_viewport_center
dEQP-GLES3.functional.clipping.line.wide_line_clip_viewport_corner
dEQP-GLES3.functional.clipping.point.wide_point_clip
dEQP-GLES3.functional.clipping.point.wide_point_clip_viewport_center
dEQP-GLES3.functional.clipping.point.wide_point_clip_viewport_corner
dEQP-GLES3.functional.draw.instancing.draw_arrays_instanced_grid_100x100
dEQP-GLES3.functional.draw.instancing.draw_arrays_instanced_grid_32x32
dEQP-GLES3.functional.draw.instancing.draw_elements_instanced_grid_100x100
dEQP-GLES3.functional.draw.instancing.draw_elements_instanced_grid_32x32
dEQP-GLES3.functional.draw.random.124
dEQP-GLES3.functional.fbo.blit.depth_stencil.depth24_stencil8_basic
dEQP-GLES3.functional.fbo.blit.depth_stencil.depth24_stencil8_scale
dEQP-GLES3.functional.fbo.blit.depth_stencil.depth24_stencil8_stencil_only
dEQP-GLES3.functional.fbo.blit.depth_stencil.depth32f_stencil8_basic
dEQP-GLES3.functional.fbo.blit.depth_stencil.depth32f_stencil8_scale
dEQP-GLES3.functional.fbo.blit.depth_stencil.depth32f_stencil8_stencil_only
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_dst_y
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_y
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_dst_y
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_dst_y
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_y
dEQP-GLES3.functional.fbo.color.blend.r8_src_over
dEQP-GLES3.functional.fbo.depth.basic.depth24_stencil8
dEQP-GLES3.functional.fbo.depth.basic.depth32f_stencil8
dEQP-GLES3.functional.fbo.depth.basic.depth_component16
dEQP-GLES3.functional.fbo.depth.basic.depth_component24
dEQP-GLES3.functional.fbo.depth.basic.depth_component32f
dEQP-GLES3.functional.fbo.depth.depth_test_clamp.depth24_stencil8
dEQP-GLES3.functional.fbo.depth.depth_test_clamp.depth32f_stencil8
dEQP-GLES3.functional.fbo.depth.depth_test_clamp.depth_component16
dEQP-GLES3.functional.fbo.depth.depth_test_clamp.depth_component24
dEQP-GLES3.functional.fbo.depth.depth_test_clamp.depth_component32f
dEQP-GLES3.functional.fbo.depth.depth_write_clamp.depth24_stencil8
dEQP-GLES3.functional.fbo.depth.depth_write_clamp.depth32f_stencil8
dEQP-GLES3.functional.fbo.depth.depth_write_clamp.depth_component16
dEQP-GLES3.functional.fbo.depth.depth_write_clamp.depth_component24
dEQP-GLES3.functional.fbo.depth.depth_write_clamp.depth_component32f
dEQP-GLES3.functional.fbo.invalidate.sub.unbind_blit_color
dEQP-GLES3.functional.fbo.invalidate.sub.unbind_blit_depth
dEQP-GLES3.functional.fbo.invalidate.sub.unbind_blit_msaa_color
dEQP-GLES3.functional.fbo.invalidate.sub.unbind_blit_msaa_depth
dEQP-GLES3.functional.fbo.invalidate.sub.unbind_blit_msaa_depth_stencil
dEQP-GLES3.functional.fbo.invalidate.sub.unbind_blit_msaa_stencil
dEQP-GLES3.functional.fbo.invalidate.whole.unbind_blit_color
dEQP-GLES3.functional.fbo.invalidate.whole.unbind_blit_depth
dEQP-GLES3.functional.fbo.invalidate.whole.unbind_blit_msaa_color
dEQP-GLES3.functional.fbo.invalidate.whole.unbind_blit_msaa_depth
dEQP-GLES3.functional.fbo.invalidate.whole.unbind_blit_msaa_depth_stencil
dEQP-GLES3.functional.fbo.invalidate.whole.unbind_blit_msaa_stencil
dEQP-GLES3.functional.fbo.msaa.2_samples.depth24_stencil8
dEQP-GLES3.functional.fbo.msaa.2_samples.depth32f_stencil8
dEQP-GLES3.functional.fbo.msaa.2_samples.depth_component16
dEQP-GLES3.functional.fbo.msaa.2_samples.depth_component24
dEQP-GLES3.functional.fbo.msaa.2_samples.depth_component32f
dEQP-GLES3.functional.fbo.msaa.2_samples.r11f_g11f_b10f
dEQP-GLES3.functional.fbo.msaa.2_samples.r16f
dEQP-GLES3.functional.fbo.msaa.2_samples.r8
dEQP-GLES3.functional.fbo.msaa.2_samples.rg16f
dEQP-GLES3.functional.fbo.msaa.2_samples.rg8
dEQP-GLES3.functional.fbo.msaa.2_samples.rgb10_a2
dEQP-GLES3.functional.fbo.msaa.2_samples.rgb565
dEQP-GLES3.functional.fbo.msaa.2_samples.rgb5_a1
dEQP-GLES3.functional.fbo.msaa.2_samples.rgb8
dEQP-GLES3.functional.fbo.msaa.2_samples.rgba4
dEQP-GLES3.functional.fbo.msaa.2_samples.rgba8
dEQP-GLES3.functional.fbo.msaa.2_samples.srgb8_alpha8
dEQP-GLES3.functional.fbo.msaa.2_samples.stencil_index8
dEQP-GLES3.functional.fbo.msaa.4_samples.depth24_stencil8
dEQP-GLES3.functional.fbo.msaa.4_samples.depth32f_stencil8
dEQP-GLES3.functional.fbo.msaa.4_samples.depth_component16
dEQP-GLES3.functional.fbo.msaa.4_samples.depth_component24
dEQP-GLES3.functional.fbo.msaa.4_samples.depth_component32f
dEQP-GLES3.functional.fbo.msaa.4_samples.r11f_g11f_b10f
dEQP-GLES3.functional.fbo.msaa.4_samples.r16f
dEQP-GLES3.functional.fbo.msaa.4_samples.r8
dEQP-GLES3.functional.fbo.msaa.4_samples.rg16f
dEQP-GLES3.functional.fbo.msaa.4_samples.rg8
dEQP-GLES3.functional.fbo.msaa.4_samples.rgb10_a2
dEQP-GLES3.functional.fbo.msaa.4_samples.rgb565
dEQP-GLES3.functional.fbo.msaa.4_samples.rgb5_a1
dEQP-GLES3.functional.fbo.msaa.4_samples.rgb8
dEQP-GLES3.functional.fbo.msaa.4_samples.rgba4
dEQP-GLES3.functional.fbo.msaa.4_samples.rgba8
dEQP-GLES3.functional.fbo.msaa.4_samples.srgb8_alpha8
dEQP-GLES3.functional.fbo.msaa.4_samples.stencil_index8
dEQP-GLES3.functional.fbo.render.recreate_depth_stencil.tex2d_rgba8_depth_rbo_depth_component16
dEQP-GLES3.functional.fbo.render.recreate_depth_stencil.tex2d_rgba8_depth_rbo_depth_component24
dEQP-GLES3.functional.fbo.render.recreate_depth_stencil.tex2d_rgba8_depth_rbo_depth_component32f
dEQP-GLES3.functional.fbo.render.recreate_depth_stencil.tex2d_rgba8_depth_stencil_rbo_depth24_stencil8
dEQP-GLES3.functional.fbo.render.recreate_depth_stencil.tex2d_rgba8_depth_stencil_rbo_depth32f_stencil8
dEQP-GLES3.functional.fbo.render.recreate_depth_stencil.tex2d_rgba8_depth_stencil_tex2d_depth24_stencil8
dEQP-GLES3.functional.fbo.render.recreate_depth_stencil.tex2d_rgba8_depth_stencil_tex2d_depth32f_stencil8
dEQP-GLES3.functional.fbo.render.recreate_depth_stencil.tex2d_rgba8_depth_tex2d_depth_component16
dEQP-GLES3.functional.fbo.render.recreate_depth_stencil.tex2d_rgba8_depth_tex2d_depth_component24
dEQP-GLES3.functional.fbo.render.recreate_depth_stencil.tex2d_rgba8_depth_tex2d_depth_component32f
dEQP-GLES3.functional.fbo.render.recreate_depth_stencil.tex2d_rgba8_stencil_rbo_stencil_index8
dEQP-GLES3.functional.fbo.render.shared_colorbuffer.rbo_r8
dEQP-GLES3.functional.fbo.render.shared_colorbuffer.rbo_r8_depth_rbo_depth24_stencil8
dEQP-GLES3.functional.fbo.render.shared_colorbuffer.rbo_r8_depth_stencil_rbo_depth24_stencil8
dEQP-GLES3.functional.fbo.render.shared_colorbuffer.tex2d_r8
dEQP-GLES3.functional.fbo.render.shared_colorbuffer.tex2d_r8_depth_rbo_depth24_stencil8
dEQP-GLES3.functional.fbo.render.shared_colorbuffer.tex2d_r8_depth_stencil_rbo_depth24_stencil8
dEQP-GLES3.functional.lifetime.attach.deleted_input.buffer_vertex_array
dEQP-GLES3.functional.lifetime.attach.deleted_output.buffer_transform_feedback
dEQP-GLES3.functional.multisample.fbo_max_samples.proportionality_alpha_to_coverage
dEQP-GLES3.functional.multisample.fbo_max_samples.proportionality_sample_coverage
dEQP-GLES3.functional.multisample.fbo_max_samples.proportionality_sample_coverage_inverted
dEQP-GLES3.functional.multisample.fbo_max_samples.sample_coverage_invert
dEQP-GLES3.functional.negative_api.buffer.blit_framebuffer_multisample
dEQP-GLES3.functional.negative_api.buffer.read_pixels_fbo_format_mismatch
dEQP-GLES3.functional.negative_api.vertex_array.draw_elements_instanced
dEQP-GLES3.functional.negative_api.vertex_array.draw_range_elements
dEQP-GLES3.functional.occlusion_query.depth_clear
dEQP-GLES3.functional.occlusion_query.depth_clear_stencil_write
dEQP-GLES3.functional.occlusion_query.depth_clear_stencil_write_stencil_clear
dEQP-GLES3.functional.occlusion_query.depth_write
dEQP-GLES3.functional.occlusion_query.depth_write_depth_clear
dEQP-GLES3.functional.occlusion_query.depth_write_depth_clear_stencil_clear
dEQP-GLES3.functional.occlusion_query.depth_write_depth_clear_stencil_write
dEQP-GLES3.functional.occlusion_query.depth_write_depth_clear_stencil_write_stencil_clear
dEQP-GLES3.functional.occlusion_query.depth_write_stencil_clear
dEQP-GLES3.functional.occlusion_query.depth_write_stencil_write
dEQP-GLES3.functional.occlusion_query.depth_write_stencil_write_stencil_clear
dEQP-GLES3.functional.occlusion_query.scissor
dEQP-GLES3.functional.occlusion_query.scissor_depth_clear_stencil_write
dEQP-GLES3.functional.occlusion_query.scissor_depth_clear_stencil_write_stencil_clear
dEQP-GLES3.functional.occlusion_query.scissor_depth_write_depth_clear
dEQP-GLES3.functional.occlusion_query.scissor_depth_write_stencil_write
dEQP-GLES3.functional.occlusion_query.scissor_depth_write_stencil_write_stencil_clear
dEQP-GLES3.functional.occlusion_query.scissor_stencil_write
dEQP-GLES3.functional.occlusion_query.scissor_stencil_write_stencil_clear
dEQP-GLES3.functional.occlusion_query.stencil_clear
dEQP-GLES3.functional.occlusion_query.stencil_write
dEQP-GLES3.functional.occlusion_query.stencil_write_stencil_clear
dEQP-GLES3.functional.polygon_offset.fixed16_displacement_with_units
dEQP-GLES3.functional.polygon_offset.fixed16_render_with_units
dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.interpolation.lines_wide
dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.interpolation.triangles
dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.primitives.lines_wide
dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.primitives.points
dEQP-GLES3.functional.rasterization.fbo.rbo_singlesample.interpolation.triangles
dEQP-GLES3.functional.rasterization.fbo.rbo_singlesample.primitives.points
dEQP-GLES3.functional.rasterization.fbo.texture_2d.interpolation.triangles
dEQP-GLES3.functional.rasterization.fbo.texture_2d.primitives.points
dEQP-GLES3.functional.rasterization.flatshading.lines_wide
dEQP-GLES3.functional.rasterization.flatshading.triangles
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.texture.msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.texture.msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.texture.msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.texture.msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.texture.msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.texture.msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.texture.msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.texture.msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.texture.msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.texture.msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.texture.msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.texture.msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.texture.msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.texture.msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.texture.msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.texture.msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.float_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.float_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec2_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec3_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec4_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.texture.msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.texture.msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.texture.msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.texture.msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.texture.msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.texture.msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.texture.msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.texture.msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa2.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.nicest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fastest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa2.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.dfdy.nicest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fastest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.float_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.float_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec2_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec3_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec4_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa2.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec2_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec2_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec3_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec3_mediump
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec4_highp
dEQP-GLES3.functional.shaders.derivate.fwidth.nicest.fbo_msaa4.vec4_mediump
dEQP-GLES3.functional.shaders.linkage.varying.rules.differing_interpolation_2
dEQP-GLES3.functional.shaders.texture_functions.texturegradoffset.isampler2d_vertex
dEQP-GLES3.functional.shaders.texture_functions.texturegradoffset.isampler3d_vertex
dEQP-GLES3.functional.shaders.texture_functions.texturegradoffset.sampler2darray_fixed_vertex
dEQP-GLES3.functional.shaders.texture_functions.texturegradoffset.sampler2darrayshadow_vertex
dEQP-GLES3.functional.shaders.texture_functions.texturegradoffset.sampler3d_fixed_vertex
dEQP-GLES3.functional.shaders.texture_functions.textureprojgradoffset.sampler2dshadow_vertex
dEQP-GLES3.functional.shaders.texture_functions.textureprojgradoffset.sampler3d_float_vertex
dEQP-GLES3.functional.shaders.texture_functions.textureprojgradoffset.usampler3d_vertex
dEQP-GLES3.functional.shaders.texture_functions.textureprojlodoffset.sampler2dshadow_vertex
dEQP-GLES3.functional.shaders.texture_functions.textureprojoffset.sampler2dshadow_vertex
dEQP-GLES3.functional.state_query.fbo.framebuffer_attachment_component_type
dEQP-GLES3.functional.state_query.integers.max_samples_getfloat
dEQP-GLES3.functional.state_query.integers.max_samples_getinteger64
dEQP-GLES3.functional.state_query.rbo.renderbuffer_component_size_color
dEQP-GLES3.functional.texture.mipmap.cube.max_level.linear_nearest
dEQP-GLES3.functional.texture.specification.random_teximage2d.cube_3
dEQP-GLES3.functional.texture.units.2_units.mixed.1
dEQP-GLES3.functional.texture.units.2_units.mixed.9
dEQP-GLES3.functional.texture.units.2_units.only_3d.5
dEQP-GLES3.functional.texture.units.2_units.only_3d.9
dEQP-GLES3.functional.texture.units.2_units.only_cube.2
dEQP-GLES3.functional.texture.units.4_units.mixed.1
dEQP-GLES3.functional.texture.units.4_units.mixed.9
dEQP-GLES3.functional.texture.units.4_units.only_2d.0
dEQP-GLES3.functional.texture.units.4_units.only_2d_array.0
dEQP-GLES3.functional.texture.units.4_units.only_3d.0
dEQP-GLES3.functional.texture.units.4_units.only_3d.1
dEQP-GLES3.functional.texture.units.4_units.only_3d.5
dEQP-GLES3.functional.texture.units.4_units.only_3d.7
dEQP-GLES3.functional.texture.units.4_units.only_3d.9
dEQP-GLES3.functional.texture.units.4_units.only_cube.2
dEQP-GLES3.functional.texture.units.8_units.mixed.6
dEQP-GLES3.functional.texture.units.8_units.mixed.7
dEQP-GLES3.functional.texture.units.8_units.mixed.8
dEQP-GLES3.functional.texture.units.8_units.only_2d.0
dEQP-GLES3.functional.texture.units.8_units.only_2d.6
dEQP-GLES3.functional.texture.units.8_units.only_2d_array.0
dEQP-GLES3.functional.texture.units.8_units.only_2d_array.6
dEQP-GLES3.functional.texture.units.8_units.only_3d.6
dEQP-GLES3.functional.texture.units.8_units.only_3d.8
dEQP-GLES3.functional.texture.units.8_units.only_cube.1
dEQP-GLES3.functional.texture.units.8_units.only_cube.2
dEQP-GLES3.functional.texture.units.all_units.mixed.0
dEQP-GLES3.functional.texture.units.all_units.mixed.5
dEQP-GLES3.functional.texture.units.all_units.mixed.6
dEQP-GLES3.functional.texture.units.all_units.mixed.8
dEQP-GLES3.functional.texture.units.all_units.mixed.9
dEQP-GLES3.functional.texture.units.all_units.only_2d.0
dEQP-GLES3.functional.texture.units.all_units.only_2d.6
dEQP-GLES3.functional.texture.units.all_units.only_2d_array.0
dEQP-GLES3.functional.texture.units.all_units.only_2d_array.5
dEQP-GLES3.functional.texture.units.all_units.only_2d_array.6
dEQP-GLES3.functional.texture.units.all_units.only_3d.5
dEQP-GLES3.functional.texture.units.all_units.only_3d.6
dEQP-GLES3.functional.texture.units.all_units.only_cube.1
dEQP-GLES3.functional.texture.units.all_units.only_cube.2
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.highp_vec4_lines_interleaved
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.highp_vec4_lines_separate
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.highp_vec4_triangles_interleaved
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.highp_vec4_triangles_separate
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.lowp_vec4_lines_interleaved
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.lowp_vec4_lines_separate
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.lowp_vec4_triangles_interleaved
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.lowp_vec4_triangles_separate
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.mediump_vec4_lines_interleaved
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.mediump_vec4_lines_separate
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.mediump_vec4_triangles_interleaved
dEQP-GLES3.functional.transform_feedback.interpolation.centroid.mediump_vec4_triangles_separate
dEQP-GLES3.functional.transform_feedback.random.interleaved.lines.10
dEQP-GLES3.functional.transform_feedback.random.interleaved.lines.4
dEQP-GLES3.functional.transform_feedback.random.interleaved.lines.8
dEQP-GLES3.functional.transform_feedback.random.interleaved.lines.9
dEQP-GLES3.functional.transform_feedback.random.interleaved.triangles.1
dEQP-GLES3.functional.transform_feedback.random.interleaved.triangles.3
dEQP-GLES3.functional.transform_feedback.random.interleaved.triangles.8
dEQP-GLES3.functional.transform_feedback.random.separate.lines.10
dEQP-GLES3.functional.transform_feedback.random.separate.lines.2
dEQP-GLES3.functional.transform_feedback.random.separate.lines.4
dEQP-GLES3.functional.transform_feedback.random.separate.lines.7
dEQP-GLES3.functional.transform_feedback.random.separate.triangles.10
dEQP-GLES3.functional.transform_feedback.random.separate.triangles.3
dEQP-GLES3.functional.transform_feedback.random.separate.triangles.4
dEQP-GLES3.functional.transform_feedback.random.separate.triangles.5
dEQP-GLES3.functional.transform_feedback.random.separate.triangles.6
dEQP-GLES3.functional.transform_feedback.random.separate.triangles.7
dEQP-GLES3.functional.transform_feedback.random.separate.triangles.8
dEQP-GLES3.functional.transform_feedback.random.separate.triangles.9
dEQP-GLES3.functional.vertex_arrays.single_attribute.first.byte.first6_offset16_stride32_quads5
dEQP-GLES3.functional.vertex_arrays.single_attribute.normalize.int2_10_10_10.components4_quads256
dEQP-GLES3.functional.vertex_arrays.single_attribute.usages.static_copy.stride4_short_quads256

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# Note: skips lists for CI are just a list of lines that, when
# non-zero-length and not starting with '#', will regex match to
# delete lines from the test list. Be careful.
# Skip the perf/stress tests to keep runtime manageable
dEQP-GLES[0-9]*.performance.*
dEQP-GLES[0-9]*.stress.*
# These are really slow on tiling architectures (including llvmpipe).
dEQP-GLES[0-9]*.functional.flush_finish.*
# Flaky results
dEQP-GLES3.functional.occlusion_query.stencil_write
dEQP-GLES3.functional.rasterization.fbo.rbo_.*
dEQP-GLES3.functional.rasterization.fbo.texture_2d.interpolation.triangles
dEQP-GLES3.functional.rasterization.fbo.texture_2d.primitives.points
dEQP-GLES3.functional.rasterization.flatshading.lines_wide
dEQP-GLES3.functional.rasterization.flatshading.triangles
dEQP-GLES3.functional.shaders.linkage.varying.interpolation.centroid
dEQP-GLES3.functional.shaders.texture_functions.texturegradoffset.*
dEQP-GLES3.functional.shaders.texture_functions.textureprojgradoffset.*
dEQP-GLES3.functional.texture.units.4_units.only_3d.*
dEQP-GLES3.functional.vertex_arrays.single_attribute.*

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dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_center
dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_corner
dEQP-GLES2.functional.clipping.point.wide_point_clip
dEQP-GLES2.functional.clipping.point.wide_point_clip_viewport_center
dEQP-GLES2.functional.clipping.point.wide_point_clip_viewport_corner
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_alpha
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_luminance
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgb
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgba
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_dst_y
dEQP-GLES3.functional.transform_feedback.array.interleaved.lines.lowp_float
dEQP-GLES3.functional.transform_feedback.array.interleaved.lines.mediump_int
dEQP-GLES3.functional.transform_feedback.array.interleaved.points.highp_mat3x2
dEQP-GLES3.functional.transform_feedback.array.interleaved.triangles.highp_mat2x3
dEQP-GLES3.functional.transform_feedback.array.interleaved.triangles.lowp_uvec3
dEQP-GLES3.functional.transform_feedback.array.separate.lines.highp_mat3x4
dEQP-GLES3.functional.transform_feedback.array.separate.points.lowp_mat2
dEQP-GLES3.functional.transform_feedback.array.separate.points.mediump_uint
dEQP-GLES3.functional.transform_feedback.array.separate.triangles.lowp_vec3
dEQP-GLES3.functional.transform_feedback.array.separate.triangles.mediump_ivec3
dEQP-GLES3.functional.transform_feedback.array_element.interleaved.lines.highp_uvec4
dEQP-GLES3.functional.transform_feedback.array_element.interleaved.points.highp_vec2
dEQP-GLES3.functional.transform_feedback.array_element.interleaved.points.lowp_ivec3
dEQP-GLES3.functional.transform_feedback.array_element.interleaved.triangles.lowp_int
dEQP-GLES3.functional.transform_feedback.array_element.separate.lines.highp_vec4
dEQP-GLES3.functional.transform_feedback.array_element.separate.lines.lowp_uint
dEQP-GLES3.functional.transform_feedback.basic_types.interleaved.lines.lowp_mat2x4
dEQP-GLES3.functional.transform_feedback.basic_types.interleaved.lines.mediump_uvec3
dEQP-GLES3.functional.transform_feedback.basic_types.interleaved.points.highp_int
dEQP-GLES3.functional.transform_feedback.basic_types.interleaved.points.mediump_float
dEQP-GLES3.functional.transform_feedback.basic_types.interleaved.triangles.highp_mat4x3
dEQP-GLES3.functional.transform_feedback.basic_types.separate.lines.highp_ivec3
dEQP-GLES3.functional.transform_feedback.basic_types.separate.lines.mediump_vec3
dEQP-GLES3.functional.transform_feedback.basic_types.separate.points.lowp_mat4x2
dEQP-GLES3.functional.transform_feedback.basic_types.separate.triangles.lowp_mat3
dEQP-GLES3.functional.transform_feedback.interpolation.smooth.highp_vec4_triangles_separate
dEQP-GLES3.functional.transform_feedback.position.lines_separate
dEQP-GLES3.functional.transform_feedback.random.interleaved.lines.3
dEQP-GLES3.functional.transform_feedback.random.separate.points.3
dEQP-GLES31.functional.image_load_store.cube.format_reinterpret.r32i_rgba8
dEQP-GLES31.functional.image_load_store.cube.format_reinterpret.rgba32f_rgba32ui
dEQP-GLES31.functional.image_load_store.cube.format_reinterpret.rgba8_snorm_r32ui
dEQP-GLES31.functional.image_load_store.cube.format_reinterpret.rgba8i_r32f
dEQP-GLES31.functional.image_load_store.cube.load_store.r32f_single_layer
dEQP-GLES31.functional.image_load_store.cube.load_store.rgba32i_single_layer
dEQP-GLES31.functional.image_load_store.cube.load_store.rgba8_snorm_single_layer
dEQP-GLES31.functional.image_load_store.early_fragment_tests.early_fragment_tests_stencil_fbo
dEQP-GLES31.functional.layout_binding.image.image2d.fragment_binding_single
dEQP-GLES31.functional.layout_binding.image.image3d.fragment_binding_single
dEQP-GLES31.functional.program_interface_query.program_input.location.interface_blocks.in.named_block.var_struct_explicit_location
dEQP-GLES31.functional.program_interface_query.program_input.resource_list.interface_blocks.in.named_block_explicit_location.var_struct
dEQP-GLES31.functional.program_interface_query.program_input.type.interface_blocks.in.named_block_explicit_location.struct.uint
dEQP-GLES31.functional.separate_shader.random.119
dEQP-GLES31.functional.separate_shader.random.59
dEQP-GLES31.functional.separate_shader.random.69
dEQP-GLES31.functional.separate_shader.random.79
dEQP-GLES31.functional.separate_shader.random.99
dEQP-GLES31.functional.texture.border_clamp.formats.compressed_rgb8_punchthrough_alpha1_etc2.linear_size_tile_multiple
dEQP-GLES31.functional.texture.border_clamp.formats.luminance.nearest_size_pot
dEQP-GLES31.functional.texture.border_clamp.per_axis_wrap_mode.texture_2d.unorm_color.gather.s_mirrored_repeat_t_clamp_to_border_pot
dEQP-GLES31.functional.texture.border_clamp.sampler.unorm_depth
dEQP-GLES31.functional.texture.texture_buffer.modify.bufferdata.buffer_size_131071
dEQP-GLES31.functional.texture.texture_buffer.render.as_index_array_as_fragment_texture.offset_7_alignments
dEQP-GLES31.functional.texture.texture_buffer.render.as_vertex_array_as_index_array_as_fragment_texture.offset_1_alignments
dEQP-GLES31.functional.texture.texture_buffer.render.as_vertex_texture_as_fragment_texture.range_size_98304
dEQP-GLES31.functional.texture.texture_buffer.state_query.max_texture_buffer_size_getinteger

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# Note: skips lists for CI are just a list of lines that, when
# non-zero-length and not starting with '#', will regex match to
# delete lines from the test list. Be careful.
# Skip the perf/stress tests to keep runtime manageable
dEQP-GLES[0-9]*.performance.*
dEQP-GLES[0-9]*.stress.*
# These are really slow on tiling architectures (including llvmpipe).
dEQP-GLES[0-9]*.functional.flush_finish.*
# unstable results (probably related to the iommu faults).
dEQP-GLES3.functional.texture.filtering.3d.*
dEQP-GLES3.functional.texture.vertex.3d.filtering.*
dEQP-GLES3.functional.fbo.invalidate.sub.unbind_blit_msaa_stencil
dEQP-GLES3.functional.fbo.invalidate.whole.unbind_blit_msaa_stencil
dEQP-GLES31.functional.ubo.2_level_struct_array.single_buffer.packed_instance_array_fragment

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dEQP-GLES31.functional.blend_equation_advanced.barrier.colorburn
dEQP-GLES31.functional.blend_equation_advanced.barrier.colordodge
dEQP-GLES31.functional.blend_equation_advanced.barrier.darken
dEQP-GLES31.functional.blend_equation_advanced.barrier.difference
dEQP-GLES31.functional.blend_equation_advanced.barrier.exclusion
dEQP-GLES31.functional.blend_equation_advanced.barrier.hardlight
dEQP-GLES31.functional.blend_equation_advanced.barrier.hsl_color
dEQP-GLES31.functional.blend_equation_advanced.barrier.hsl_hue
dEQP-GLES31.functional.blend_equation_advanced.barrier.hsl_luminosity
dEQP-GLES31.functional.blend_equation_advanced.barrier.hsl_saturation
dEQP-GLES31.functional.blend_equation_advanced.barrier.lighten
dEQP-GLES31.functional.blend_equation_advanced.barrier.multiply
dEQP-GLES31.functional.blend_equation_advanced.barrier.overlay
dEQP-GLES31.functional.blend_equation_advanced.barrier.screen
dEQP-GLES31.functional.blend_equation_advanced.barrier.softlight
dEQP-GLES31.functional.blend_equation_advanced.basic.colorburn
dEQP-GLES31.functional.blend_equation_advanced.basic.colordodge
dEQP-GLES31.functional.blend_equation_advanced.basic.darken
dEQP-GLES31.functional.blend_equation_advanced.basic.difference
dEQP-GLES31.functional.blend_equation_advanced.basic.exclusion
dEQP-GLES31.functional.blend_equation_advanced.basic.hardlight
dEQP-GLES31.functional.blend_equation_advanced.basic.hsl_color
dEQP-GLES31.functional.blend_equation_advanced.basic.hsl_hue
dEQP-GLES31.functional.blend_equation_advanced.basic.hsl_luminosity
dEQP-GLES31.functional.blend_equation_advanced.basic.hsl_saturation
dEQP-GLES31.functional.blend_equation_advanced.basic.lighten
dEQP-GLES31.functional.blend_equation_advanced.basic.multiply
dEQP-GLES31.functional.blend_equation_advanced.basic.overlay
dEQP-GLES31.functional.blend_equation_advanced.basic.screen
dEQP-GLES31.functional.blend_equation_advanced.basic.softlight
dEQP-GLES31.functional.blend_equation_advanced.msaa.colorburn
dEQP-GLES31.functional.blend_equation_advanced.msaa.colordodge
dEQP-GLES31.functional.blend_equation_advanced.msaa.darken
dEQP-GLES31.functional.blend_equation_advanced.msaa.difference
dEQP-GLES31.functional.blend_equation_advanced.msaa.exclusion
dEQP-GLES31.functional.blend_equation_advanced.msaa.hardlight
dEQP-GLES31.functional.blend_equation_advanced.msaa.hsl_color
dEQP-GLES31.functional.blend_equation_advanced.msaa.hsl_hue
dEQP-GLES31.functional.blend_equation_advanced.msaa.hsl_luminosity
dEQP-GLES31.functional.blend_equation_advanced.msaa.hsl_saturation
dEQP-GLES31.functional.blend_equation_advanced.msaa.lighten
dEQP-GLES31.functional.blend_equation_advanced.msaa.multiply
dEQP-GLES31.functional.blend_equation_advanced.msaa.overlay
dEQP-GLES31.functional.blend_equation_advanced.msaa.screen
dEQP-GLES31.functional.blend_equation_advanced.msaa.softlight
dEQP-GLES31.functional.blend_equation_advanced.srgb.colorburn
dEQP-GLES31.functional.blend_equation_advanced.srgb.colordodge
dEQP-GLES31.functional.blend_equation_advanced.srgb.darken
dEQP-GLES31.functional.blend_equation_advanced.srgb.difference
dEQP-GLES31.functional.blend_equation_advanced.srgb.exclusion
dEQP-GLES31.functional.blend_equation_advanced.srgb.hardlight
dEQP-GLES31.functional.blend_equation_advanced.srgb.hsl_color
dEQP-GLES31.functional.blend_equation_advanced.srgb.hsl_hue
dEQP-GLES31.functional.blend_equation_advanced.srgb.hsl_luminosity
dEQP-GLES31.functional.blend_equation_advanced.srgb.hsl_saturation
dEQP-GLES31.functional.blend_equation_advanced.srgb.lighten
dEQP-GLES31.functional.blend_equation_advanced.srgb.multiply
dEQP-GLES31.functional.blend_equation_advanced.srgb.overlay
dEQP-GLES31.functional.blend_equation_advanced.srgb.screen
dEQP-GLES31.functional.blend_equation_advanced.srgb.softlight
dEQP-GLES31.functional.compute.basic.shared_var_single_group
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_common.common_advanced_blend_eq_buffer_advanced_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_common.common_blend_eq_buffer_advanced_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_common.common_separate_blend_eq_buffer_advanced_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_advanced_blend_eq_buffer_advanced_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_advanced_blend_eq_buffer_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_advanced_blend_eq_buffer_separate_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_separate_blend_eq_buffer_blend_eq
dEQP-GLES31.functional.image_load_store.early_fragment_tests.early_fragment_tests_depth_fbo
dEQP-GLES31.functional.ssbo.layout.3_level_array.std140.column_major_mat4x2
dEQP-GLES31.functional.ssbo.layout.3_level_unsized_array.std430.mat3
dEQP-GLES31.functional.ssbo.layout.random.arrays_of_arrays.6
dEQP-GLES31.functional.ssbo.layout.unsized_struct_array.per_block_buffer.shared_instance_array
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_draw
dEQP-GLES31.functional.stencil_texturing.render.depth32f_stencil8_clear
dEQP-GLES31.functional.stencil_texturing.render.depth32f_stencil8_draw
dEQP-GLES31.functional.tessellation.invariance.inner_triangle_set.quads_fractional_even_spacing
dEQP-GLES31.functional.tessellation.invariance.tess_coord_component_range.triangles_fractional_odd_spacing_cw
dEQP-GLES31.functional.texture.multisample.samples_1.use_texture_depth_2d
dEQP-GLES31.functional.texture.multisample.samples_1.use_texture_depth_2d_array
dEQP-GLES31.functional.texture.multisample.samples_2.use_texture_depth_2d
dEQP-GLES31.functional.texture.multisample.samples_2.use_texture_depth_2d_array
dEQP-GLES31.functional.texture.multisample.samples_3.use_texture_depth_2d
dEQP-GLES31.functional.texture.multisample.samples_3.use_texture_depth_2d_array
dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_depth_2d
dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_depth_2d_array

View File

@@ -1,3 +1,15 @@
# Possibly https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/2035 related
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_clear
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_draw
dEQP-VK.binding_model.descriptorset_random.sets4.constant.ubolimitlow.sbolimithigh.imglimithigh.noiub.uab.frag.ialimitlow.0
dEQP-VK.draw.output_location.array.b8g8r8a8-unorm-mediump-output-vec3
dEQP-VK.glsl.linkage.varying.struct.mat3x2
dEQP-VK.graphicsfuzz.mat-array-deep-control-flow
dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp32.input_args.negate_denorm_preserve
dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp32.input_args.rounding_rtz_out_prod
dEQP-VK.spirv_assembly.instruction.graphics.opquantize.carry_bit_geom
dEQP-VK.subgroups.builtin_var.graphics.subgroupinvocationid
# not sure what's wrong here
dEQP-VK.tessellation.invariance.outer_edge_index_independence.triangles_equal_spacing_ccw_point_mode
dEQP-VK.tessellation.invariance.primitive_set.isolines_fractional_odd_spacing_ccw_point_mode

View File

@@ -9,13 +9,29 @@ dEQP-GLES[0-9]*.stress.*
# These are really slow on tiling architectures (including llvmpipe).
dEQP-GLES[0-9]*.functional.flush_finish.*
# Unstable test results
#dEQP-GLES3.functional.fragment_out.random.*
dEQP-GLES3.functional.transform_feedback.*points.*
dEQP-GLES3.functional.transform_feedback.*lines.*
dEQP-GLES31.functional.primitive_bounding_box.*
#dEQP-GLES31.functional.layout_binding.ssbo.fragment_binding_array.*
# Flakes reported more than once during Jan-Feb 2020
dEQP-GLES31.functional.layout_binding.ssbo.fragment_binding_array
# Intermittent timeout
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.23
# This started failing, despite passing locally (and generating identical
# cmdstream as before. Not sure what is going on, but adding it to skips
# for now
dEQP-GLES31.functional.compute.shared_var.atomic.compswap.lowp_int
# Non-sysmem flakes
dEQP-VK.pipeline.spec_constant.compute.composite.matrix.mat3x2
# Fails NIR_VALIDATE so probably flaky
dEQP-VK.memory_model.write_after_read.core11.u32.coherent.fence_fence.atomicwrite.workgroup.payload_nonlocal.workgroup.guard_local.buffer.comp
# Sysmem flake: this one is fairly frequent, but if you enable it then
# it moves to dEQP-VK.renderpass.dedicated_allocation.attachment.3.393
#
#dEQP-VK.renderpass.suballocation.attachment_allocation.grow_shrink.89
# At least some of the separate_channels tests fail on sysmem due to an
# interaction of use of a UBWC buffer as both a render target and a
# texture. Stores are done through both paths in separate channels,
# and the UBWC updates don't get synced. The current a650 blob also
# fails these tests and qcom apparently noted the failure at one point
# https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/2017
dEQP-VK.renderpass.*separate_channels.*

View File

@@ -4,32 +4,6 @@ dEQP-GLES2.functional.clipping.triangle_vertex.clip_two.clip_neg_x_neg_y_pos_z_a
dEQP-GLES2.functional.clipping.triangle_vertex.clip_two.clip_neg_x_pos_y_pos_z_and_pos_x_neg_y_neg_z
dEQP-GLES2.functional.clipping.triangle_vertex.clip_two.clip_pos_x_neg_y_pos_z_and_neg_x_pos_y_neg_z
dEQP-GLES2.functional.clipping.triangle_vertex.clip_two.clip_pos_x_pos_y_pos_z_and_neg_x_neg_y_neg_z
dEQP-GLES2.functional.depth_stencil_clear.depth_stencil_masked
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgba4_depth_component16
@@ -61,116 +35,9 @@ dEQP-GLES2.functional.fragment_ops.depth_stencil.random.7
dEQP-GLES2.functional.fragment_ops.depth_stencil.random.8
dEQP-GLES2.functional.fragment_ops.depth_stencil.random.9
dEQP-GLES2.functional.fragment_ops.depth_stencil.write_mask.stencil
dEQP-GLES2.functional.shaders.algorithm.hsl_to_rgb_vertex
dEQP-GLES2.functional.shaders.functions.array_arguments.global_in_int_vertex
dEQP-GLES2.functional.shaders.functions.array_arguments.local_in_int_vertex
dEQP-GLES2.functional.shaders.functions.datatypes.int_int_vertex
dEQP-GLES2.functional.shaders.functions.overloading.builtin_sin_vertex
dEQP-GLES2.functional.shaders.functions.overloading.builtin_step_vertex
dEQP-GLES2.functional.shaders.functions.overloading.user_func_arg_int_types_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.inout_highp_int_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.inout_int_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.inout_lowp_int_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.out_highp_int_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.out_int_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.out_lowp_int_vertex
dEQP-GLES2.functional.shaders.indexing.matrix_subscript.mat3_dynamic_loop_write_static_loop_read_vertex
dEQP-GLES2.functional.shaders.indexing.matrix_subscript.mat3_dynamic_loop_write_static_read_vertex
dEQP-GLES2.functional.shaders.indexing.matrix_subscript.mat3_dynamic_write_dynamic_loop_read_vertex
dEQP-GLES2.functional.shaders.loops.do_while_constant_iterations.conditional_body_vertex
dEQP-GLES2.functional.shaders.loops.do_while_dynamic_iterations.vector_counter_fragment
dEQP-GLES2.functional.shaders.loops.do_while_uniform_iterations.conditional_body_vertex
dEQP-GLES2.functional.shaders.loops.do_while_uniform_iterations.nested_tricky_dataflow_2_vertex
dEQP-GLES2.functional.shaders.loops.for_dynamic_iterations.vector_counter_fragment
dEQP-GLES2.functional.shaders.loops.while_constant_iterations.compound_statement_vertex
dEQP-GLES2.functional.shaders.loops.while_constant_iterations.sequence_statement_vertex
dEQP-GLES2.functional.shaders.loops.while_dynamic_iterations.nested_sequence_vertex
dEQP-GLES2.functional.shaders.loops.while_dynamic_iterations.vector_counter_fragment
dEQP-GLES2.functional.shaders.loops.while_uniform_iterations.nested_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_int_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_int_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_int_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_int_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_int_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_int_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_int_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_int_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_int_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.highp_int_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.highp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.highp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.highp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.lowp_int_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.lowp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.lowp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.lowp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.mediump_int_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.mediump_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.mediump_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.mediump_ivec4_vertex
dEQP-GLES2.functional.shaders.random.all_features.fragment.37
dEQP-GLES2.functional.shaders.random.exponential.fragment.11
dEQP-GLES2.functional.shaders.random.exponential.fragment.12
@@ -183,13 +50,9 @@ dEQP-GLES2.functional.shaders.random.trigonometric.fragment.65
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2d_bias
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2dproj_vec4_bias
dEQP-GLES2.functional.shaders.texture_functions.fragment.texturecube_bias
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_linear_clamp_etc1
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_linear_clamp_rgba8888
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_linear_mirror_etc1
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_linear_mirror_rgba8888
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_nearest_clamp_etc1
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_nearest_clamp_rgba8888
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_nearest_mirror_etc1
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_nearest_mirror_rgba8888
dEQP-GLES2.functional.texture.mipmap.cube.basic.linear_linear
dEQP-GLES2.functional.texture.mipmap.cube.basic.linear_nearest

View File

@@ -9,16 +9,9 @@ dEQP-GLES[0-9]*.stress
# These are really slow on tiling architectures (including llvmpipe).
dEQP-GLES[0-9]*.functional.flush_finish
# Crashes
dEQP-GLES2.functional.shaders.invariance.highp.common_subexpression_1
dEQP-GLES2.functional.shaders.invariance.mediump.common_subexpression_1
dEQP-GLES2.functional.shaders.invariance.lowp.common_subexpression_1
# Flaky
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
dEQP-GLES2.functional.default_vertex_attrib.float.vertex_attrib_1f
dEQP-GLES2.functional.default_vertex_attrib.float.vertex_attrib_2f
dEQP-GLES2.functional.default_vertex_attrib.float.vertex_attrib_3f
dEQP-GLES2.functional.default_vertex_attrib.*
dEQP-GLES2.functional.fbo.completeness.size.distinct
dEQP-GLES2.functional.negative_api.shader.uniform_matrixfv_invalid_transpose
dEQP-GLES2.functional.negative_api.texture.generatemipmap_zero_level_array_compressed
@@ -28,18 +21,11 @@ dEQP-GLES2.functional.shaders.random.all_features.fragment.55
dEQP-GLES2.functional.shaders.random.trigonometric.fragment.1
dEQP-GLES2.functional.shaders.random.trigonometric.fragment.69
# Driver bugs causing GPU errors
dEQP-GLES2.functional.shaders.loops.while_constant_iterations.nested_sequence_vertex
dEQP-GLES2.functional.shaders.loops.while_constant_iterations.conditional_body_vertex
dEQP-GLES2.functional.shaders.loops.while_uniform_iterations.conditional_continue_vertex
dEQP-GLES2.functional.shaders.loops.while_uniform_iterations.double_continue_vertex
# Hangs / OOM
dEQP-GLES2.functional.shaders.indexing.varying_array.vec4_dynamic_loop_write_static_read
dEQP-GLES2.functional.shaders.indexing.varying_array.vec4_dynamic_loop_write_dynamic_read
dEQP-GLES2.functional.shaders.indexing.varying_array.vec4_dynamic_loop_write_static_loop_read
dEQP-GLES2.functional.shaders.indexing.varying_array.vec4_dynamic_loop_write_dynamic_loop_read
dEQP-GLES2.functional.shaders.indexing.tmp_array.vec3_dynamic_loop_write_dynamic_read_vertex
dEQP-GLES2.functional.shaders.indexing.tmp_array.vec4_dynamic_loop_write_static_read_vertex
dEQP-GLES2.functional.shaders.indexing.tmp_array.vec4_dynamic_loop_write_dynamic_read_vertex

View File

@@ -28,10 +28,6 @@ dEQP-GLES2.functional.rasterization.interpolation.basic.lines_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.line_loop_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.line_strip_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.lines_wide
dEQP-GLES2.functional.rasterization.limits.points
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2d_bias
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2dproj_vec3_bias
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2dproj_vec4_bias
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_linear_clamp_rgba8888
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_linear_mirror_etc1
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_linear_mirror_rgba8888
@@ -80,45 +76,3 @@ dEQP-GLES2.functional.texture.mipmap.cube.bias.linear_linear
dEQP-GLES2.functional.texture.mipmap.cube.bias.linear_nearest
dEQP-GLES2.functional.texture.mipmap.cube.projected.linear_linear
dEQP-GLES2.functional.texture.mipmap.cube.projected.linear_nearest
dEQP-GLES2.functional.texture.vertex.2d.filtering.linear_mipmap_linear_linear_clamp
dEQP-GLES2.functional.texture.vertex.2d.filtering.linear_mipmap_linear_linear_mirror
dEQP-GLES2.functional.texture.vertex.2d.filtering.linear_mipmap_linear_linear_repeat
dEQP-GLES2.functional.texture.vertex.2d.filtering.linear_mipmap_linear_nearest_clamp
dEQP-GLES2.functional.texture.vertex.2d.filtering.linear_mipmap_linear_nearest_mirror
dEQP-GLES2.functional.texture.vertex.2d.filtering.linear_mipmap_linear_nearest_repeat
dEQP-GLES2.functional.texture.vertex.2d.filtering.nearest_mipmap_linear_linear_clamp
dEQP-GLES2.functional.texture.vertex.2d.filtering.nearest_mipmap_linear_linear_mirror
dEQP-GLES2.functional.texture.vertex.2d.filtering.nearest_mipmap_linear_linear_repeat
dEQP-GLES2.functional.texture.vertex.2d.filtering.nearest_mipmap_linear_nearest_clamp
dEQP-GLES2.functional.texture.vertex.2d.filtering.nearest_mipmap_linear_nearest_mirror
dEQP-GLES2.functional.texture.vertex.2d.filtering.nearest_mipmap_linear_nearest_repeat
dEQP-GLES2.functional.texture.vertex.2d.wrap.clamp_clamp
dEQP-GLES2.functional.texture.vertex.2d.wrap.clamp_mirror
dEQP-GLES2.functional.texture.vertex.2d.wrap.clamp_repeat
dEQP-GLES2.functional.texture.vertex.2d.wrap.mirror_clamp
dEQP-GLES2.functional.texture.vertex.2d.wrap.mirror_mirror
dEQP-GLES2.functional.texture.vertex.2d.wrap.mirror_repeat
dEQP-GLES2.functional.texture.vertex.2d.wrap.repeat_clamp
dEQP-GLES2.functional.texture.vertex.2d.wrap.repeat_mirror
dEQP-GLES2.functional.texture.vertex.2d.wrap.repeat_repeat
dEQP-GLES2.functional.texture.vertex.cube.filtering.linear_mipmap_linear_linear_clamp
dEQP-GLES2.functional.texture.vertex.cube.filtering.linear_mipmap_linear_linear_mirror
dEQP-GLES2.functional.texture.vertex.cube.filtering.linear_mipmap_linear_linear_repeat
dEQP-GLES2.functional.texture.vertex.cube.filtering.linear_mipmap_linear_nearest_clamp
dEQP-GLES2.functional.texture.vertex.cube.filtering.linear_mipmap_linear_nearest_mirror
dEQP-GLES2.functional.texture.vertex.cube.filtering.linear_mipmap_linear_nearest_repeat
dEQP-GLES2.functional.texture.vertex.cube.filtering.nearest_mipmap_linear_linear_clamp
dEQP-GLES2.functional.texture.vertex.cube.filtering.nearest_mipmap_linear_linear_mirror
dEQP-GLES2.functional.texture.vertex.cube.filtering.nearest_mipmap_linear_linear_repeat
dEQP-GLES2.functional.texture.vertex.cube.filtering.nearest_mipmap_linear_nearest_clamp
dEQP-GLES2.functional.texture.vertex.cube.filtering.nearest_mipmap_linear_nearest_mirror
dEQP-GLES2.functional.texture.vertex.cube.filtering.nearest_mipmap_linear_nearest_repeat
dEQP-GLES2.functional.texture.vertex.cube.wrap.clamp_clamp
dEQP-GLES2.functional.texture.vertex.cube.wrap.clamp_mirror
dEQP-GLES2.functional.texture.vertex.cube.wrap.clamp_repeat
dEQP-GLES2.functional.texture.vertex.cube.wrap.mirror_clamp
dEQP-GLES2.functional.texture.vertex.cube.wrap.mirror_mirror
dEQP-GLES2.functional.texture.vertex.cube.wrap.mirror_repeat
dEQP-GLES2.functional.texture.vertex.cube.wrap.repeat_clamp
dEQP-GLES2.functional.texture.vertex.cube.wrap.repeat_mirror
dEQP-GLES2.functional.texture.vertex.cube.wrap.repeat_repeat

View File

@@ -19,11 +19,8 @@ dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_depth_com
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgba4_depth_component16

View File

@@ -12,3 +12,6 @@ dEQP-GLES[0-9]*.functional.flush_finish.*
# XXX: Why does this flake?
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
# Needs investigation
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgba_depth_component16

View File

@@ -1,31 +0,0 @@
dEQP-GLES2.functional.depth_stencil_clear.depth_stencil_masked
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.tex2d_rgba_depth_component16

View File

@@ -8,3 +8,4 @@ dEQP-GLES[0-9]*.stress.*
# These are really slow on tiling architectures (including llvmpipe).
dEQP-GLES[0-9]*.functional.flush_finish.*

View File

@@ -1,31 +0,0 @@
dEQP-GLES2.functional.depth_stencil_clear.depth_stencil_masked
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.tex2d_rgba_depth_component16

View File

@@ -1,31 +1,44 @@
dEQP-GLES2.functional.depth_stencil_clear.depth_stencil_masked
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.tex2d_rgba_depth_component16
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_dst_y
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_dst_y
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_y
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_dst_y
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_dst_y
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_y
dEQP-GLES3.functional.fbo.invalidate.sub.unbind_blit_msaa_color
dEQP-GLES3.functional.fbo.invalidate.sub.unbind_blit_msaa_depth
dEQP-GLES3.functional.fbo.invalidate.sub.unbind_blit_msaa_stencil
dEQP-GLES3.functional.fbo.invalidate.whole.unbind_blit_msaa_color
dEQP-GLES3.functional.fbo.invalidate.whole.unbind_blit_msaa_depth
dEQP-GLES3.functional.fbo.invalidate.whole.unbind_blit_msaa_stencil
dEQP-GLES3.functional.fbo.msaa.2_samples.depth24_stencil8
dEQP-GLES3.functional.fbo.msaa.2_samples.depth32f_stencil8
dEQP-GLES3.functional.fbo.msaa.2_samples.depth_component16
dEQP-GLES3.functional.fbo.msaa.2_samples.depth_component24
dEQP-GLES3.functional.fbo.msaa.2_samples.depth_component32f
dEQP-GLES3.functional.fbo.msaa.2_samples.r16f
dEQP-GLES3.functional.fbo.msaa.2_samples.rg16f
dEQP-GLES3.functional.fbo.msaa.2_samples.rgba16f
dEQP-GLES3.functional.fbo.msaa.2_samples.stencil_index8
dEQP-GLES3.functional.fbo.msaa.4_samples.depth24_stencil8
dEQP-GLES3.functional.fbo.msaa.4_samples.depth32f_stencil8
dEQP-GLES3.functional.fbo.msaa.4_samples.depth_component16
dEQP-GLES3.functional.fbo.msaa.4_samples.depth_component24
dEQP-GLES3.functional.fbo.msaa.4_samples.depth_component32f
dEQP-GLES3.functional.fbo.msaa.4_samples.r16f
dEQP-GLES3.functional.fbo.msaa.4_samples.r32f
dEQP-GLES3.functional.fbo.msaa.4_samples.rg16f
dEQP-GLES3.functional.fbo.msaa.4_samples.rg32f
dEQP-GLES3.functional.fbo.msaa.4_samples.rgba16f
dEQP-GLES3.functional.fbo.msaa.4_samples.rgba32f
dEQP-GLES3.functional.fbo.msaa.4_samples.stencil_index8
dEQP-GLES3.functional.fence_sync.client_wait_sync_finish
dEQP-GLES3.functional.draw.random.156
dEQP-GLES3.functional.draw.random.208

View File

@@ -0,0 +1,11 @@
# Note: skips lists for CI are just a list of lines that, when
# non-zero-length and not starting with '#', will regex match to
# delete lines from the test list. Be careful.
# Skip the perf/stress tests to keep runtime manageable
dEQP-GLES[0-9]*.performance.*
dEQP-GLES[0-9]*.stress.*
# These are really slow on tiling architectures (including llvmpipe).
dEQP-GLES[0-9]*.functional.flush_finish.*

View File

@@ -0,0 +1,3 @@
# Exclude WSI related tests.
dEQP-VK.image.swapchain_mutable.*
dEQP-VK.wsi.*

View File

@@ -0,0 +1,29 @@
# Interesting failures...
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_zero
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_zero
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_zero
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_zero
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_zero
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_zero
dEQP-VK.rasterization.flatshading.line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.basic.line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.projected.lines_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_lines_wide

View File

@@ -0,0 +1,9 @@
dEQP-VK.rasterization.flatshading.line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.basic.line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.projected.lines_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_lines_wide

View File

@@ -0,0 +1,9 @@
dEQP-VK.rasterization.flatshading.line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.basic.line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.projected.lines_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_lines_wide

View File

@@ -0,0 +1,11 @@
dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
dEQP-VK.rasterization.flatshading.line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.basic.line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.projected.lines_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_lines_wide

View File

@@ -0,0 +1,9 @@
dEQP-VK.rasterization.flatshading.line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.basic.line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.projected.lines_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_lines_wide

View File

@@ -0,0 +1,9 @@
dEQP-VK.rasterization.flatshading.line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.basic.line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.projected.lines_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_lines_wide

View File

@@ -0,0 +1,3 @@
# This subset of CTS seems to randomly hangs on RAVEN only.
# This needs to be investigated and fixed!
dEQP-VK.synchronization.*

View File

@@ -0,0 +1,9 @@
dEQP-VK.rasterization.flatshading.line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_line_strip_wide
dEQP-VK.rasterization.flatshading.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.basic.line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.basic.non_strict_lines_wide
dEQP-VK.rasterization.interpolation.projected.lines_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_line_strip_wide
dEQP-VK.rasterization.interpolation.projected.non_strict_lines_wide

View File

@@ -2,17 +2,15 @@
set -ex
DEQP_OPTIONS="--deqp-surface-width=256 --deqp-surface-height=256"
DEQP_OPTIONS="$DEQP_OPTIONS --deqp-surface-width=256 --deqp-surface-height=256"
DEQP_OPTIONS="$DEQP_OPTIONS --deqp-surface-type=pbuffer"
DEQP_OPTIONS="$DEQP_OPTIONS --deqp-gl-config-name=rgba8888d24s8ms0"
DEQP_OPTIONS="$DEQP_OPTIONS --deqp-visibility=hidden"
# It would be nice to be able to enable the watchdog, so that hangs in a test
# don't need to wait the full hour for the run to time out. However, some
# shaders end up taking long enough to compile
# (dEQP-GLES31.functional.ubo.random.all_per_block_buffers.20 for example)
# that they'll sporadically trigger the watchdog.
#DEQP_OPTIONS="$DEQP_OPTIONS --deqp-watchdog=enable"
# deqp's shader cache (for vulkan) is not multiprocess safe for a common
# filename, see:
# https://gitlab.freedesktop.org/mesa/parallel-deqp-runner/-/merge_requests/13
DEQP_OPTIONS="$DEQP_OPTIONS --deqp-shadercache=disable"
if [ -z "$DEQP_VER" ]; then
echo 'DEQP_VER must be set to something like "gles2", "gles31" or "vk" for the test run'
@@ -31,12 +29,12 @@ if [ -z "$DEQP_SKIPS" ]; then
exit 1
fi
ARTIFACTS=`pwd`/artifacts
INSTALL=`pwd`/install
# Set up the driver environment.
export LD_LIBRARY_PATH=`pwd`/install/lib/
export EGL_PLATFORM=surfaceless
export VK_ICD_FILENAMES=`pwd`/install/share/vulkan/icd.d/"$VK_DRIVER"_icd.x86_64.json
export VK_ICD_FILENAMES=`pwd`/install/share/vulkan/icd.d/"$VK_DRIVER"_icd.`uname -m`.json
# the runner was failing to look for libkms in /usr/local/lib for some reason
# I never figured out.
@@ -49,9 +47,14 @@ mkdir -p $RESULTS
if [ "$DEQP_VER" = "vk" ]; then
cp /deqp/mustpass/vk-master.txt /tmp/case-list.txt
DEQP=/deqp/external/vulkancts/modules/vulkan/deqp-vk
else
elif [ "$DEQP_VER" = "gles2" -o "$DEQP_VER" = "gles3" -o "$DEQP_VER" = "gles31" ]; then
cp /deqp/mustpass/$DEQP_VER-master.txt /tmp/case-list.txt
DEQP=/deqp/modules/$DEQP_VER/deqp-$DEQP_VER
SUITE=dEQP
else
cp /deqp/mustpass/$DEQP_VER-master.txt /tmp/case-list.txt
DEQP=/deqp/external/openglcts/modules/glcts
SUITE=KHR
fi
# If the job is parallel, take the corresponding fraction of the caselist.
@@ -60,17 +63,29 @@ if [ -n "$CI_NODE_INDEX" ]; then
sed -ni $CI_NODE_INDEX~$CI_NODE_TOTAL"p" /tmp/case-list.txt
fi
if [ -n "$DEQP_CASELIST_FILTER" ]; then
sed -ni "/$DEQP_CASELIST_FILTER/p" /tmp/case-list.txt
fi
if [ ! -s /tmp/case-list.txt ]; then
echo "Caselist generation failed"
exit 1
fi
if [ -n "$DEQP_EXPECTED_FAILS" ]; then
XFAIL="--xfail-list $ARTIFACTS/$DEQP_EXPECTED_FAILS"
XFAIL="--xfail-list $INSTALL/$DEQP_EXPECTED_FAILS"
fi
set +e
if [ -n "$DEQP_PARALLEL" ]; then
JOB="--job $DEQP_PARALLEL"
elif [ -n "$FDO_CI_CONCURRENT" ]; then
JOB="--job $FDO_CI_CONCURRENT"
else
JOB="--job 4"
fi
run_cts() {
deqp=$1
caselist=$2
@@ -79,9 +94,10 @@ run_cts() {
--deqp $deqp \
--output $output \
--caselist $caselist \
--exclude-list $ARTIFACTS/$DEQP_SKIPS \
--exclude-list $INSTALL/$DEQP_SKIPS \
--compact-display false \
$XFAIL \
--job ${DEQP_PARALLEL:-1} \
$JOB \
--allow-flakes true \
$DEQP_RUNNER_OPTIONS \
-- \
@@ -93,7 +109,16 @@ report_flakes() {
return 0
fi
flakes=$1
bot="$CI_RUNNER_DESCRIPTION-$CI_PIPELINE_ID"
# The nick needs to be something unique so that multiple runners
# connecting at the same time don't race for one nick and get blocked.
# freenode has a 16-char limit on nicks (9 is the IETF standard, but
# various servers extend that). So, trim off the common prefixes of the
# runner name, and append the job ID so that software runners with more
# than one concurrent job (think swrast) don't collide. For freedreno,
# that gives us a nick as long as db410c-N-JJJJJJJJ, and it'll be a while
# before we make it to 9-digit jobs (we're at 7 so far).
runner=`echo $CI_RUNNER_DESCRIPTION | sed 's|mesa-||' | sed 's|google-freedreno-||g'`
bot="$runner-$CI_JOB_ID"
channel="$FLAKES_CHANNEL"
(
echo NICK $bot
@@ -102,8 +127,10 @@ report_flakes() {
echo "JOIN $channel"
sleep 1
desc="Flakes detected in job: $CI_JOB_URL on $CI_RUNNER_DESCRIPTION"
if [ -n "CI_MERGE_REQUEST_SOURCE_BRANCH_NAME" ]; then
if [ -n "$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME" ]; then
desc="$desc on branch $CI_MERGE_REQUEST_SOURCE_BRANCH_NAME ($CI_MERGE_REQUEST_TITLE)"
elif [ -n "$CI_COMMIT_BRANCH" ]; then
desc="$desc on branch $CI_COMMIT_BRANCH ($CI_COMMIT_TITLE)"
fi
echo "PRIVMSG $channel :$desc"
for flake in `cat $flakes`; do
@@ -120,29 +147,35 @@ extract_xml_result() {
shift 1
qpas=$*
start="#beginTestCaseResult $testcase"
for qpa in $qpas; do
# Pick the first QPA mentioning our testcase
qpa=`grep -l "$start" $qpas | head -n 1`
# If we found one, go extract just that testcase's contents from the QPA
# to a new QPA, then do testlog-to-xml on that.
if [ -n "$qpa" ]; then
while IFS= read -r line; do
if [ "$line" = "$start" ]; then
dst="$testcase.qpa"
echo "#beginSession" > $dst
echo $line >> $dst
echo "$line" >> $dst
while IFS= read -r line; do
if [ "$line" = "#endTestCaseResult" ]; then
echo $line >> $dst
echo "$line" >> $dst
echo "#endSession" >> $dst
/deqp/executor/testlog-to-xml $dst "$RESULTS/$testcase.xml"
/deqp/executor/testlog-to-xml $dst "$RESULTS/$testcase$DEQP_RUN_SUFFIX.xml"
# copy the stylesheets here so they only end up in artifacts
# if we have one or more result xml in artifacts
cp /deqp/testlog.css "$RESULTS/"
cp /deqp/testlog.xsl "$RESULTS/"
return 0
fi
echo $line >> $dst
echo "$line" >> $dst
done
return 1
fi
done < $qpa
done
fi
}
extract_xml_results() {
@@ -178,6 +211,39 @@ generate_junit() {
echo "</testsuites>"
}
parse_renderer() {
RENDERER=`grep -A1 TestCaseResult.\*info.renderer $RESULTS/deqp-info.qpa | grep '<Text' | sed 's|.*<Text>||g' | sed 's|</Text>||g'`
VERSION=`grep -A1 TestCaseResult.\*info.version $RESULTS/deqp-info.qpa | grep '<Text' | sed 's|.*<Text>||g' | sed 's|</Text>||g'`
echo "Renderer: $RENDERER"
echo "Version: $VERSION "
if ! echo $RENDERER | grep -q $DEQP_EXPECTED_RENDERER; then
echo "Expected GL_RENDERER $DEQP_EXPECTED_RENDERER"
exit 1
fi
}
check_renderer() {
echo "Capturing renderer info for GLES driver sanity checks"
# If you're having trouble loading your driver, uncommenting this may help
# debug.
# export EGL_LOG_LEVEL=debug
VERSION=`echo $DEQP_VER | tr '[a-z]' '[A-Z]'`
$DEQP $DEQP_OPTIONS --deqp-case=$SUITE-$VERSION.info.\* --deqp-log-filename=$RESULTS/deqp-info.qpa
parse_renderer
}
check_vk_device_name() {
echo "Capturing device info for VK driver sanity checks"
$DEQP $DEQP_OPTIONS --deqp-case=dEQP-VK.info.device --deqp-log-filename=$RESULTS/deqp-info.qpa
DEVICENAME=`grep deviceName $RESULTS/deqp-info.qpa | sed 's|deviceName: ||g'`
echo "deviceName: $DEVICENAME"
if [ -n "$DEQP_EXPECTED_RENDERER" -a $DEVICENAME != "$DEQP_EXPECTED_RENDERER" ]; then
echo "Expected deviceName $DEQP_EXPECTED_RENDERER"
exit 1
fi
}
# wrapper to supress +x to avoid spamming the log
quiet() {
set +x
@@ -185,52 +251,80 @@ quiet() {
set -x
}
run_cts $DEQP /tmp/case-list.txt $RESULTS/cts-runner-results.txt
if [ "$GALLIUM_DRIVER" = "virpipe" ]; then
# deqp is to use virpipe, and virgl_test_server llvmpipe
export GALLIUM_DRIVER="$GALLIUM_DRIVER"
VTEST_ARGS="--use-egl-surfaceless"
if [ "$VIRGL_HOST_API" = "GLES" ]; then
VTEST_ARGS="$VTEST_ARGS --use-gles"
fi
GALLIUM_DRIVER=llvmpipe \
GALLIVM_PERF="nopt,no_filter_hacks" \
virgl_test_server $VTEST_ARGS >$RESULTS/vtest-log.txt 2>&1 &
sleep 1
fi
if [ $DEQP_VER = vk ]; then
quiet check_vk_device_name
else
quiet check_renderer
fi
RESULTSFILE=$RESULTS/cts-runner-results$DEQP_RUN_SUFFIX.txt
UNEXPECTED_RESULTSFILE=$RESULTS/cts-runner-unexpected-results$DEQP_RUN_SUFFIX.txt
FLAKESFILE=$RESULTS/cts-runner-flakes$DEQP_RUN_SUFFIX.txt
run_cts $DEQP /tmp/case-list.txt $RESULTSFILE
DEQP_EXITCODE=$?
quiet generate_junit $RESULTS/cts-runner-results.txt > $RESULTS/results.xml
echo "System load: $(cut -d' ' -f1-3 < /proc/loadavg)"
echo "# of CPU cores: $(cat /proc/cpuinfo | grep processor | wc -l)"
# junit is disabled, because it overloads gitlab.freedesktop.org to parse it.
#quiet generate_junit $RESULTSFILE > $RESULTS/results.xml
if [ $DEQP_EXITCODE -ne 0 ]; then
# preserve caselist files in case of failures:
cp /tmp/deqp_runner.*.txt $RESULTS/
echo "Some unexpected results found (see cts-runner-results.txt in artifacts for full results):"
cat $RESULTS/cts-runner-results.txt | \
grep -v ",Pass" | \
grep -v ",Skip" | \
grep -v ",ExpectedFail" > \
$RESULTS/cts-runner-unexpected-results.txt
head -n 50 $RESULTS/cts-runner-unexpected-results.txt
egrep -v ",Pass|,Skip|,ExpectedFail" $RESULTSFILE > $UNEXPECTED_RESULTSFILE
if [ -z "$DEQP_NO_SAVE_RESULTS" ]; then
echo "Some unexpected results found (see cts-runner-results.txt in artifacts for full results):"
head -n 50 $UNEXPECTED_RESULTSFILE
# Save the logs for up to the first 50 unexpected results:
head -n 50 $RESULTS/cts-runner-unexpected-results.txt | quiet extract_xml_results /tmp/*.qpa
head -n 50 $UNEXPECTED_RESULTSFILE | quiet extract_xml_results /tmp/*.qpa
else
echo "Unexpected results found:"
cat $UNEXPECTED_RESULTSFILE
fi
count=`cat $RESULTS/cts-runner-unexpected-results.txt | wc -l`
count=`cat $UNEXPECTED_RESULTSFILE | wc -l`
# Re-run fails to detect flakes. But use a small threshold, if
# something was fundamentally broken, we don't want to re-run
# the entire caselist
else
cat $RESULTS/cts-runner-results.txt | \
grep ",Flake" > \
$RESULTS/cts-runner-flakes.txt
grep ",Flake" $RESULTSFILE > $FLAKESFILE
count=`cat $RESULTS/cts-runner-flakes.txt | wc -l`
count=`cat $FLAKESFILE | wc -l`
if [ $count -gt 0 ]; then
echo "Some flakes found (see cts-runner-flakes.txt in artifacts for full results):"
head -n 50 $RESULTS/cts-runner-flakes.txt
head -n 50 $FLAKESFILE
if [ -z "$DEQP_NO_SAVE_RESULTS" ]; then
# Save the logs for up to the first 50 flakes:
head -n 50 $RESULTS/cts-runner-flakes.txt | quiet extract_xml_results /tmp/*.qpa
head -n 50 $FLAKESFILE | quiet extract_xml_results /tmp/*.qpa
fi
# Report the flakes to IRC channel for monitoring (if configured):
quiet report_flakes $RESULTS/cts-runner-flakes.txt
quiet report_flakes $FLAKESFILE
else
# no flakes, so clean-up:
rm $RESULTS/cts-runner-flakes.txt
rm $FLAKESFILE
fi
fi

View File

@@ -449,7 +449,6 @@ dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.blit_framebuffer
dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.read_pixels_fbo_format_mismatch
dEQP-GLES31.functional.debug.negative_coverage.log.buffer.read_pixels_fbo_format_mismatch
dEQP-GLES31.functional.draw_base_vertex.draw_elements_instanced_base_vertex.line_loop.instanced_attributes
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_color_mask_buffer_color_mask
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.0
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.1
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.10
@@ -576,55 +575,15 @@ dEQP-GLES31.functional.texture.filtering.cube_array.sizes.63x63x18_nearest_mipma
dEQP-GLES31.functional.texture.filtering.cube_array.sizes.64x64x12_nearest_mipmap_linear
dEQP-GLES31.functional.texture.filtering.cube_array.sizes.64x64x12_nearest_mipmap_nearest
dEQP-GLES31.functional.texture.filtering.cube_array.sizes.8x8x6_nearest
dEQP-GLES31.functional.texture.gather.basic.2d.rgba8i.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.basic.2d.rgba8i.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.basic.2d.rgba8i.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.basic.2d.rgba8i.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.basic.2d.rgba8ui.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.basic.2d.rgba8ui.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.basic.2d.rgba8ui.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.basic.2d.rgba8ui.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.basic.2d_array.rgba8i.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.basic.2d_array.rgba8i.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.basic.2d_array.rgba8i.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.basic.2d_array.rgba8i.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.basic.2d_array.rgba8ui.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.basic.2d_array.rgba8ui.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.basic.2d_array.rgba8ui.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.basic.2d_array.rgba8ui.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8.no_corners.size_pot.clamp_to_edge_repeat
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8.no_corners.size_pot.mirrored_repeat_clamp_to_edge
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8.no_corners.size_pot.repeat_mirrored_repeat
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8i.no_corners.size_pot.clamp_to_edge_repeat
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8i.no_corners.size_pot.mirrored_repeat_clamp_to_edge
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8i.no_corners.size_pot.repeat_mirrored_repeat
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8i.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8i.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8i.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8i.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8ui.no_corners.size_pot.clamp_to_edge_repeat
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8ui.no_corners.size_pot.mirrored_repeat_clamp_to_edge
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8ui.no_corners.size_pot.repeat_mirrored_repeat
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8ui.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8ui.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8ui.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.basic.cube.rgba8ui.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d.rgba8i.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d.rgba8i.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d.rgba8i.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d.rgba8i.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d.rgba8ui.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d.rgba8ui.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d.rgba8ui.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d.rgba8ui.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d_array.rgba8i.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d_array.rgba8i.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d_array.rgba8i.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d_array.rgba8i.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d_array.rgba8ui.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d_array.rgba8ui.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d_array.rgba8ui.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.offset.implementation_offset.2d_array.rgba8ui.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.offset_dynamic.implementation_offset.2d.depth32f.base_level.level_1
dEQP-GLES31.functional.texture.gather.offset_dynamic.implementation_offset.2d.depth32f.base_level.level_2
dEQP-GLES31.functional.texture.gather.offset_dynamic.implementation_offset.2d.depth32f.filter_mode.min_linear_mag_linear
@@ -821,22 +780,6 @@ dEQP-GLES31.functional.texture.gather.offset_dynamic.min_required_offset.2d_arra
dEQP-GLES31.functional.texture.gather.offset_dynamic.min_required_offset.2d_array.rgba8ui.size_pot.clamp_to_edge_repeat
dEQP-GLES31.functional.texture.gather.offset_dynamic.min_required_offset.2d_array.rgba8ui.size_pot.mirrored_repeat_clamp_to_edge
dEQP-GLES31.functional.texture.gather.offset_dynamic.min_required_offset.2d_array.rgba8ui.size_pot.repeat_mirrored_repeat
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d.rgba8i.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d.rgba8i.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d.rgba8i.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d.rgba8i.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d.rgba8ui.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d.rgba8ui.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d.rgba8ui.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d.rgba8ui.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d_array.rgba8i.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d_array.rgba8i.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d_array.rgba8i.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d_array.rgba8i.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d_array.rgba8ui.texture_swizzle.alpha_zero_one_red
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d_array.rgba8ui.texture_swizzle.blue_alpha_zero_one
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d_array.rgba8ui.texture_swizzle.one_red_green_blue
dEQP-GLES31.functional.texture.gather.offsets.implementation_offset.2d_array.rgba8ui.texture_swizzle.zero_one_red_green
dEQP-GLES31.functional.texture.multisample.samples_1.sample_mask_and_alpha_to_coverage
dEQP-GLES31.functional.texture.multisample.samples_1.sample_mask_and_sample_coverage
dEQP-GLES31.functional.texture.multisample.samples_1.sample_mask_and_sample_coverage_and_alpha_to_coverage

View File

@@ -10,7 +10,10 @@ dEQP-GLES[0-9]*.stress.*
dEQP-GLES[0-9]*.functional.flush_finish.*
# Random failures
dEQP-GLES31.functional.shaders.builtin_functions.*geometry
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_color_mask_buffer_color_mask
dEQP-GLES31.functional.fbo.no_attachments.maximums.all
dEQP-GLES31.functional.fbo.no_attachments.maximums.size
dEQP-GLES31.functional.geometry_shading.input.basic_primitive.points
dEQP-GLES31.functional.shaders.builtin_functions.*geometry
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.const_expression.geometry.usampler3d
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.dynamically_uniform.geometry.sampler2darray

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,126 @@
dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_center
dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_corner
dEQP-GLES2.functional.clipping.point.wide_point_clip
dEQP-GLES2.functional.clipping.point.wide_point_clip_viewport_center
dEQP-GLES2.functional.clipping.point.wide_point_clip_viewport_corner
dEQP-GLES2.functional.clipping.triangle_vertex.clip_two.clip_neg_y_neg_z_and_neg_x_neg_y_pos_z
dEQP-GLES2.functional.clipping.triangle_vertex.clip_two.clip_pos_y_pos_z_and_neg_x_neg_y_neg_z
dEQP-GLES2.functional.draw.random.10
dEQP-GLES2.functional.draw.random.42
dEQP-GLES2.functional.fbo.render.color_clear.rbo_rgba4
dEQP-GLES2.functional.fbo.render.color_clear.rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.color_clear.rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.depth.rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_depthbuffer.no_rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_depthbuffer.rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_stencilbuffer.no_rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_stencilbuffer.rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgba4
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgba4_depth_component16
dEQP-GLES2.functional.polygon_offset.default_displacement_with_units
dEQP-GLES2.functional.polygon_offset.fixed16_displacement_with_units
dEQP-GLES2.functional.rasterization.interpolation.basic.line_loop_wide
dEQP-GLES2.functional.rasterization.interpolation.basic.line_strip_wide
dEQP-GLES2.functional.rasterization.interpolation.basic.lines_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.line_loop_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.line_strip_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.lines_wide
dEQP-GLES3.functional.clipping.line.wide_line_clip_viewport_center
dEQP-GLES3.functional.clipping.line.wide_line_clip_viewport_corner
dEQP-GLES3.functional.clipping.point.wide_point_clip
dEQP-GLES3.functional.clipping.point.wide_point_clip_viewport_center
dEQP-GLES3.functional.clipping.point.wide_point_clip_viewport_corner
dEQP-GLES3.functional.clipping.triangle_vertex.clip_two.clip_neg_y_neg_z_and_neg_x_neg_y_pos_z
dEQP-GLES3.functional.clipping.triangle_vertex.clip_two.clip_pos_y_pos_z_and_neg_x_neg_y_neg_z
dEQP-GLES3.functional.draw.random.105
dEQP-GLES3.functional.draw.random.114
dEQP-GLES3.functional.draw.random.124
dEQP-GLES3.functional.draw.random.135
dEQP-GLES3.functional.draw.random.144
dEQP-GLES3.functional.draw.random.155
dEQP-GLES3.functional.draw.random.174
dEQP-GLES3.functional.draw.random.206
dEQP-GLES3.functional.draw.random.31
dEQP-GLES3.functional.draw.random.43
dEQP-GLES3.functional.draw.random.84
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_dst_y
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_dst_y
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_x
dEQP-GLES3.functional.fbo.depth.depth_test_clamp.depth24_stencil8
dEQP-GLES3.functional.fbo.depth.depth_test_clamp.depth32f_stencil8
dEQP-GLES3.functional.fbo.depth.depth_test_clamp.depth_component16
dEQP-GLES3.functional.fbo.depth.depth_test_clamp.depth_component24
dEQP-GLES3.functional.fbo.depth.depth_test_clamp.depth_component32f
dEQP-GLES3.functional.fbo.depth.depth_write_clamp.depth32f_stencil8
dEQP-GLES3.functional.fbo.depth.depth_write_clamp.depth_component32f
dEQP-GLES3.functional.polygon_offset.default_displacement_with_units
dEQP-GLES3.functional.polygon_offset.default_render_with_units
dEQP-GLES3.functional.polygon_offset.fixed16_displacement_with_units
dEQP-GLES3.functional.polygon_offset.fixed16_render_with_units
dEQP-GLES3.functional.polygon_offset.fixed24_displacement_with_units
dEQP-GLES3.functional.polygon_offset.fixed24_render_with_units
dEQP-GLES3.functional.polygon_offset.float32_displacement_with_units
dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_4.interpolation.lines
dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_4.primitives.lines
dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_4.primitives.points
dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.interpolation.lines
dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.primitives.lines
dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.primitives.points
dEQP-GLES3.functional.rasterization.fbo.rbo_singlesample.interpolation.lines_wide
dEQP-GLES3.functional.rasterization.fbo.texture_2d.interpolation.lines_wide
dEQP-GLES3.functional.rasterization.interpolation.basic.line_loop_wide
dEQP-GLES3.functional.rasterization.interpolation.basic.line_strip_wide
dEQP-GLES3.functional.rasterization.interpolation.basic.lines_wide
dEQP-GLES3.functional.rasterization.interpolation.projected.line_loop_wide
dEQP-GLES3.functional.rasterization.interpolation.projected.line_strip_wide
dEQP-GLES3.functional.rasterization.interpolation.projected.lines_wide
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.8
dEQP-GLES31.functional.draw_buffers_indexed.random.max_required_draw_buffers.4
dEQP-GLES31.functional.draw_buffers_indexed.random.max_required_draw_buffers.9
dEQP-GLES31.functional.draw_indirect.random.20
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.48
KHR-GL30.transform_feedback.api_errors_test
KHR-GL30.transform_feedback.capture_vertex_interleaved_test
KHR-GL30.transform_feedback.capture_vertex_separate_test
KHR-GL30.transform_feedback.discard_vertex_test
KHR-GL30.transform_feedback.draw_xfb_instanced_test
KHR-GL30.transform_feedback.draw_xfb_stream_instanced_test
KHR-GL30.transform_feedback.get_xfb_varying
KHR-GL30.transform_feedback.query_vertex_interleaved_test
KHR-GL30.transform_feedback.query_vertex_separate_test
KHR-GL31.CommonBugs.CommonBug_ParenthesisInLayoutQualifierIntegerValue
KHR-GL31.transform_feedback.capture_vertex_interleaved_test
KHR-GL31.transform_feedback.capture_vertex_separate_test
KHR-GL31.transform_feedback.discard_vertex_test
KHR-GL31.transform_feedback.draw_xfb_instanced_test
KHR-GL32.transform_feedback.draw_xfb_stream_test
KHR-GL31.transform_feedback.draw_xfb_stream_instanced_test
KHR-GL31.transform_feedback.query_vertex_interleaved_test
KHR-GL31.transform_feedback.query_vertex_separate_test
KHR-GL32.CommonBugs.CommonBug_ParenthesisInLayoutQualifierIntegerValue
KHR-GL32.transform_feedback.capture_vertex_interleaved_test
KHR-GL32.transform_feedback.capture_vertex_separate_test
KHR-GL32.transform_feedback.discard_vertex_test
KHR-GL32.transform_feedback.draw_xfb_instanced_test
KHR-GL32.transform_feedback.draw_xfb_stream_test
KHR-GL32.transform_feedback.draw_xfb_stream_instanced_test
KHR-GL32.transform_feedback_overflow_query_ARB.advanced-single-stream-interleaved-attribs
KHR-GL32.transform_feedback_overflow_query_ARB.advanced-single-stream-separate-attribs
KHR-GL32.transform_feedback_overflow_query_ARB.basic-single-stream-interleaved-attribs
KHR-GL32.transform_feedback_overflow_query_ARB.basic-single-stream-separate-attribs
KHR-GL32.transform_feedback_overflow_query_ARB.multiple-streams-multiple-buffers-per-stream
KHR-GL32.transform_feedback_overflow_query_ARB.multiple-streams-one-buffer-per-stream
KHR-GL32.transform_feedback.query_vertex_interleaved_test
KHR-GL32.transform_feedback.query_vertex_separate_test

1
.gitlab-ci/docs Symbolic link
View File

@@ -0,0 +1 @@
../docs/ci

View File

@@ -0,0 +1,36 @@
#!/bin/bash
set +e
set -o xtrace
# if we run this script outside of gitlab-ci for testing, ensure
# we got meaningful variables
CI_PROJECT_DIR=${CI_PROJECT_DIR:-$(mktemp -d)/mesa}
if [[ -e $CI_PROJECT_DIR/.git ]]
then
echo "Repository already present, skip cache download"
exit
fi
TMP_DIR=$(mktemp -d)
echo "Downloading archived master..."
/usr/bin/wget -O $TMP_DIR/mesa.tar.gz \
https://minio-packet.freedesktop.org/git-cache/mesa/mesa/mesa.tar.gz
# check wget error code
if [[ $? -ne 0 ]]
then
echo "Repository cache not available"
exit
fi
set -e
rm -rf "$CI_PROJECT_DIR"
echo "Extracting tarball into '$CI_PROJECT_DIR'..."
mkdir -p "$CI_PROJECT_DIR"
tar xzf "$TMP_DIR/mesa.tar.gz" -C "$CI_PROJECT_DIR"
rm -rf "$TMP_DIR"
chmod a+w "$CI_PROJECT_DIR"

20
.gitlab-ci/fossilize-runner.sh Executable file
View File

@@ -0,0 +1,20 @@
#!/bin/sh
set -ex
if [ -z "$VK_DRIVER" ]; then
echo 'VK_DRIVER must be to something like "radeon" or "intel" for the test run'
exit 1
fi
INSTALL=`pwd`/install
# Set up the driver environment.
export LD_LIBRARY_PATH=`pwd`/install/lib/
export VK_ICD_FILENAMES=`pwd`/install/share/vulkan/icd.d/"$VK_DRIVER"_icd.x86_64.json
# To store Fossilize logs on failure.
RESULTS=`pwd`/results
mkdir -p results
"$INSTALL/fossils/fossils.sh" "$INSTALL/fossils.yml" "$RESULTS"

10
.gitlab-ci/fossils.yml Normal file
View File

@@ -0,0 +1,10 @@
fossils-db:
repo: "https://gitlab.freedesktop.org/hakzsam/fossils-db"
commit: "5626cedcb58bd95a7b79a9664651818aea92b21c"
fossils:
- path: sascha-willems/database.foz
- path: parallel-rdp/small_subgroup.foz
- path: parallel-rdp/small_uber_subgroup.foz
- path: parallel-rdp/subgroup.foz
- path: parallel-rdp/uber_subgroup.foz

77
.gitlab-ci/fossils/fossils.sh Executable file
View File

@@ -0,0 +1,77 @@
#!/usr/bin/env bash
FOSSILS_SCRIPT_DIR="$(dirname "$(readlink -f "$0")")"
FOSSILS_YAML="$(readlink -f "$1")"
FOSSILS_RESULTS="$2"
clone_fossils_db()
{
local repo="$1"
local commit="$2"
rm -rf fossils-db
git clone --no-checkout "$repo" fossils-db
(cd fossils-db; git reset "$commit" || git reset "origin/$commit")
}
query_fossils_yaml()
{
python3 "$FOSSILS_SCRIPT_DIR/query_fossils_yaml.py" \
--file "$FOSSILS_YAML" "$@"
}
create_clean_git()
{
rm -rf .clean_git
cp -R .git .clean_git
}
restore_clean_git()
{
rm -rf .git
cp -R .clean_git .git
}
fetch_fossil()
{
local fossil="${1//,/?}"
echo -n "[fetch_fossil] Fetching $1... "
local output=$(git lfs pull -I "$fossil" 2>&1)
local ret=0
if [[ $? -ne 0 || ! -f "$1" ]]; then
echo "ERROR"
echo "$output"
ret=1
else
echo "OK"
fi
restore_clean_git
return $ret
}
if [[ -n "$(query_fossils_yaml fossils_db_repo)" ]]; then
clone_fossils_db "$(query_fossils_yaml fossils_db_repo)" \
"$(query_fossils_yaml fossils_db_commit)"
cd fossils-db
else
echo "Warning: No fossils-db entry in $FOSSILS_YAML, assuming fossils-db is current directory"
fi
# During git operations various git objects get created which
# may take up significant space. Store a clean .git instance,
# which we restore after various git operations to keep our
# storage consumption low.
create_clean_git
for fossil in $(query_fossils_yaml fossils)
do
fetch_fossil "$fossil" || exit $?
fossilize-replay --num-threads 4 $fossil 1>&2 2> $FOSSILS_RESULTS/fossil_replay.txt
if [ $? != 0 ]; then
echo "Replay of $fossil failed"
grep "pipeline crashed or hung" $FOSSILS_RESULTS/fossil_replay.txt
exit 1
fi
rm $fossil
done
exit $ret

View File

@@ -0,0 +1,69 @@
#!/usr/bin/python3
# Copyright (c) 2019 Collabora Ltd
# Copyright (c) 2020 Valve Corporation
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
# OTHER DEALINGS IN THE SOFTWARE.
#
# SPDX-License-Identifier: MIT
import argparse
import yaml
def cmd_fossils_db_repo(args):
with open(args.file, 'r') as f:
y = yaml.safe_load(f)
print(y['fossils-db']['repo'])
def cmd_fossils_db_commit(args):
with open(args.file, 'r') as f:
y = yaml.safe_load(f)
print(y['fossils-db']['commit'])
def cmd_fossils(args):
with open(args.file, 'r') as f:
y = yaml.safe_load(f)
fossils = list(y['fossils'])
if len(fossils) == 0:
return
print('\n'.join((t['path'] for t in fossils)))
def main():
parser = argparse.ArgumentParser()
parser.add_argument('--file', required=True,
help='the name of the yaml file')
subparsers = parser.add_subparsers(help='sub-command help')
parser_fossils_db_repo = subparsers.add_parser('fossils_db_repo')
parser_fossils_db_repo.set_defaults(func=cmd_fossils_db_repo)
parser_fossils_db_commit = subparsers.add_parser('fossils_db_commit')
parser_fossils_db_commit.set_defaults(func=cmd_fossils_db_commit)
parser_fossils = subparsers.add_parser('fossils')
parser_fossils.set_defaults(func=cmd_fossils)
args = parser.parse_args()
args.func(args)
if __name__ == "__main__":
main()

View File

@@ -3,12 +3,15 @@
from jinja2 import Environment, FileSystemLoader
import argparse
import os
import datetime
parser = argparse.ArgumentParser()
parser.add_argument("--template")
parser.add_argument("--pipeline-info")
parser.add_argument("--base-artifacts-url")
parser.add_argument("--mesa-url")
parser.add_argument("--device-type")
parser.add_argument("--dtb", nargs='?', default="")
parser.add_argument("--kernel-image-name")
parser.add_argument("--kernel-image-type", nargs='?', default="")
parser.add_argument("--gpu-version")
@@ -16,30 +19,31 @@ parser.add_argument("--boot-method")
parser.add_argument("--lava-tags", nargs='?', default="")
parser.add_argument("--env-vars", nargs='?', default="")
parser.add_argument("--deqp-version")
parser.add_argument("--arch")
parser.add_argument("--ci-node-index")
parser.add_argument("--ci-node-total")
parser.add_argument("--job-type")
args = parser.parse_args()
env = Environment(loader = FileSystemLoader(os.path.dirname(args.template)), trim_blocks=True, lstrip_blocks=True)
template = env.get_template(os.path.basename(args.template))
env_vars = "%s CI_NODE_INDEX=%s CI_NODE_TOTAL=%s" % (args.env_vars, args.ci_node_index, args.ci_node_total)
values = {}
values['pipeline_info'] = args.pipeline_info
values['base_artifacts_url'] = args.base_artifacts_url
values['mesa_url'] = args.mesa_url
values['device_type'] = args.device_type
values['dtb'] = args.dtb
values['kernel_image_name'] = args.kernel_image_name
values['kernel_image_type'] = args.kernel_image_type
values['gpu_version'] = args.gpu_version
values['boot_method'] = args.boot_method
values['tags'] = args.lava_tags
values['env_vars'] = args.env_vars
values['env_vars'] = env_vars
values['deqp_version'] = args.deqp_version
values['arch'] = args.arch
values['ci_node_index'] = args.ci_node_index
values['ci_node_total'] = args.ci_node_total
f = open('lava-deqp.yml', "w")
f = open(os.path.splitext(os.path.basename(args.template))[0], "w")
f.write(template.render(values))
f.close()

View File

@@ -1,5 +1,7 @@
job_name: mesa-deqp-{{ gpu_version }} {{ pipeline_info }}
job_name: mesa-deqp-{{ deqp_version }}-{{ gpu_version }} {{ pipeline_info }}
device_type: {{ device_type }}
context:
extra_nfsroot_args: " init=/init rootwait"
timeouts:
job:
minutes: 40
@@ -11,8 +13,9 @@ timeouts:
priority: 75
visibility: public
{% if tags %}
{% set lavatags = tags.split(',') %}
tags:
{% for tag in tags %}
{% for tag in lavatags %}
- {{ tag }}
{% endfor %}
{% endif %}
@@ -26,19 +29,31 @@ actions:
{% if kernel_image_type %}
{{ kernel_image_type }}
{% endif %}
ramdisk:
url: {{ base_artifacts_url }}/lava-rootfs-{{ arch }}.cpio.gz
nfsrootfs:
url: {{ base_artifacts_url }}/lava-rootfs.tgz
compression: gz
{% if dtb %}
dtb:
url: {{ base_artifacts_url }}/{{ device_type }}.dtb
url: {{ base_artifacts_url }}/{{ dtb }}.dtb
{% endif %}
os: oe
- boot:
timeout:
minutes: 5
method: {{ boot_method }}
commands: ramdisk
{% if boot_method == "fastboot" %}
{#
For fastboot, LAVA doesn't know how to unpack the rootfs/apply overlay/repack,
so we transfer the overlay over the network after boot.
#}
transfer_overlay:
download_command: wget -S --progress=dot:giga
unpack_command: tar -C / -xzf
{% else %}
commands: nfs
{% endif %}
prompts:
- '#'
- 'lava-shell:'
- test:
timeout:
minutes: 60
@@ -56,32 +71,30 @@ actions:
steps:
- mount -t proc none /proc
- mount -t sysfs none /sys
- mount -t devtmpfs none /dev
- mount -t devtmpfs none /dev || echo possibly already mounted
- mkdir -p /dev/pts
- mount -t devpts devpts /dev/pts
- echo "nameserver 8.8.8.8" > /etc/resolv.conf
- for i in 1 2 3; do sntp -sS pool.ntp.org && break || sleep 2; done
{% if env_vars %}
- export {{ env_vars }}
{% endif %}
# deqp-runner.sh assumes some stuff is in pwd
- cd /
- wget -S --progress=dot:giga -O- {{ mesa_url }} | tar -xz
- export DEQP_NO_SAVE_RESULTS=1
- 'export DEQP_RUNNER_OPTIONS="--compact-display false --shuffle false"'
- 'export DEQP_RUNNER_OPTIONS="--shuffle false"'
- export DEQP_EXPECTED_FAILS=deqp-{{ gpu_version }}-fails.txt
- export DEQP_SKIPS=deqp-{{ gpu_version }}-skips.txt
- export DEQP_VER={{ deqp_version }}
- export LIBGL_DRIVERS_PATH=`pwd`/install/lib/dri
- export CI_NODE_INDEX={{ ci_node_index }}
- export CI_NODE_TOTAL={{ ci_node_total }}
# Put stuff where the runner script expects it
- mkdir artifacts
- mkdir results
- mkdir -p install/lib
- cp /deqp/$DEQP_EXPECTED_FAILS artifacts/.
- cp /deqp/$DEQP_SKIPS artifacts/.
- mv /mesa/lib/* install/lib/.
- "if sh /deqp/deqp-runner.sh; then
- "if sh /install/deqp-runner.sh; then
echo 'deqp: pass';
else
echo 'deqp: fail';

View File

@@ -1,21 +1,70 @@
variables:
DISTRIBUTION_TAG: "2020-08-03-nfs-2"
.kernel+rootfs:
stage: container-2
extends:
- .ci-run-policy
variables:
GIT_STRATEGY: fetch
KERNEL_URL: "https://gitlab.freedesktop.org/tomeu/linux/-/archive/v5.5-panfrost-fixes/linux-v5.5-panfrost-fixes.tar.gz"
UPLOAD_FOR_LAVA: 1
script:
- .gitlab-ci/container/lava_build.sh
kernel+rootfs_amd64:
extends:
- .use-x86_build-base
- .kernel+rootfs
image: "$CI_REGISTRY_IMAGE/debian/x86_build-base:$BASE_TAG"
variables:
DEBIAN_ARCH: "amd64"
kernel+rootfs_arm64:
extends:
- .use-arm_build
- .kernel+rootfs
tags:
- aarch64
variables:
DEBIAN_ARCH: "arm64"
kernel+rootfs_armhf:
extends:
- kernel+rootfs_arm64
variables:
DEBIAN_ARCH: "armhf"
.lava-test:
extends:
- .ci-run-policy
stage: test
# Cancel job if a newer commit is pushed to the same branch
interruptible: true
variables:
GIT_STRATEGY: none # testing doesn't build anything from source
ENV_VARS: "MESA_GLES_VERSION_OVERRIDE=3.0 DEQP_PARALLEL=6"
ENV_VARS: "DEQP_PARALLEL=6"
FIXED_ENV_VARS: "CI_PIPELINE_ID=${CI_PIPELINE_ID} CI_JOB_ID=${CI_JOB_ID} CI_PROJECT_PATH=${CI_PROJECT_PATH} CI_JOB_JWT=${CI_JOB_JWT} TRACIE_NO_UNIT_TESTS=1 TRACIE_UPLOAD_TO_MINIO=1"
DEQP_VERSION: gles2
ARTIFACTS_PREFIX: "https://minio-packet.freedesktop.org/mesa-lava/"
MESA_URL: "https://minio-packet.freedesktop.org/artifacts/${CI_PROJECT_PATH}/${CI_PIPELINE_ID}/mesa-${ARCH}.tar.gz"
script:
- BUILD_JOB_ID=`cat artifacts/build_job_id.txt`
# Try to use the kernel and rootfs built in mainline first, to save cycles
- >
if wget -q --method=HEAD "${ARTIFACTS_PREFIX}/mesa/mesa/${DISTRIBUTION_TAG}/${ARCH}/done"; then
ARTIFACTS_URL="${ARTIFACTS_PREFIX}/mesa/mesa/${DISTRIBUTION_TAG}/${ARCH}"
else
ARTIFACTS_URL="${ARTIFACTS_PREFIX}/${CI_PROJECT_PATH}/${DISTRIBUTION_TAG}/${ARCH}"
fi
- >
artifacts/generate_lava.py \
--template artifacts/lava-deqp.yml.jinja2 \
--template artifacts/lava-${TEST_SUITE}.yml.jinja2 \
--pipeline-info "$CI_PIPELINE_URL on $CI_COMMIT_REF_NAME ${CI_NODE_INDEX}/${CI_NODE_TOTAL}" \
--base-artifacts-url $CI_PROJECT_URL/-/jobs/$BUILD_JOB_ID/artifacts/raw/artifacts \
--base-artifacts-url ${ARTIFACTS_URL} \
--mesa-url ${MESA_URL} \
--device-type ${DEVICE_TYPE} \
--env-vars "${ENV_VARS}" \
--arch ${ARCH} \
--deqp-version gles2 \
--dtb ${DTB} \
--env-vars "${ENV_VARS} ${FIXED_ENV_VARS}" \
--deqp-version ${DEQP_VERSION} \
--kernel-image-name ${KERNEL_IMAGE_NAME} \
--kernel-image-type "${KERNEL_IMAGE_TYPE}" \
--gpu-version ${GPU_VERSION} \
@@ -23,16 +72,17 @@
--lava-tags "${LAVA_TAGS}" \
--ci-node-index "${CI_NODE_INDEX}" \
--ci-node-total "${CI_NODE_TOTAL}"
- lava_job_id=`lavacli jobs submit lava-deqp.yml`
- lava_job_id=`lavacli jobs submit lava-${TEST_SUITE}.yml` || lavacli jobs submit lava-${TEST_SUITE}.yml
- echo $lava_job_id
- rm -rf artifacts/*
- cp lava-deqp.yml artifacts/.
- lavacli jobs logs $lava_job_id | grep -a -v "{'case':" | tee artifacts/lava-deqp-$lava_job_id.log
- cp lava-${TEST_SUITE}.yml artifacts/.
- lavacli jobs logs $lava_job_id | tee artifacts/lava-${TEST_SUITE}-$lava_job_id.log
- lavacli jobs show $lava_job_id
- result=`lavacli results $lava_job_id 0_deqp deqp | head -1`
- result=`lavacli results $lava_job_id 0_${TEST_SUITE} ${TEST_SUITE} | head -1`
- echo $result
- '[[ "$result" == "pass" ]]'
artifacts:
name: "mesa_${CI_JOB_NAME}"
when: always
paths:
- artifacts/
@@ -43,12 +93,12 @@
KERNEL_IMAGE_NAME: zImage
KERNEL_IMAGE_TYPE: "type:\ zimage"
BOOT_METHOD: u-boot
TEST_SUITE: "deqp"
extends:
- .lava-test
- .use-arm_build
dependencies:
- meson-armhf
needs:
- kernel+rootfs_armhf
- meson-armhf
.lava-test:arm64:
@@ -57,66 +107,195 @@
KERNEL_IMAGE_NAME: Image
KERNEL_IMAGE_TYPE: "type:\ image"
BOOT_METHOD: u-boot
TEST_SUITE: "deqp"
extends:
- .lava-test
- .use-arm_build
dependencies:
- meson-arm64
needs:
- kernel+rootfs_arm64
- meson-arm64
panfrost-t720-test:arm64:
extends: .lava-test:arm64
.lava-test:amd64:
variables:
ARCH: amd64
KERNEL_IMAGE_NAME: bzImage
KERNEL_IMAGE_TYPE: "type:\ zimage"
BOOT_METHOD: u-boot
TEST_SUITE: "deqp"
extends:
- .lava-test
- .use-arm_build
needs:
- kernel+rootfs_amd64
- arm_build
- meson-testing
.lava-traces:amd64:
variables:
TEST_SUITE: "tracie"
extends:
- .lava-test:amd64
.lava-traces:armhf:
variables:
TEST_SUITE: "tracie"
extends:
- .lava-test:armhf
.lava-traces:arm64:
variables:
TEST_SUITE: "tracie"
extends:
- .lava-test:arm64
panfrost-t720-gles2:arm64:
extends:
- .lava-test:arm64
- .panfrost-rules
variables:
DEVICE_TYPE: sun50i-h6-pine-h64
DTB: ${DEVICE_TYPE}
GPU_VERSION: panfrost-t720
ENV_VARS: "PAN_MESA_DEBUG=gles3 DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=T720"
tags:
- lava-sun50i-h6-pine-h64
- mesa-ci-aarch64-lava-collabora
panfrost-t760-test:armhf:
extends: .lava-test:armhf
panfrost-t760-gles2:armhf:
extends:
- .lava-test:armhf
- .panfrost-rules
variables:
DEVICE_TYPE: rk3288-veyron-jaq
DTB: ${DEVICE_TYPE}
GPU_VERSION: panfrost-t760
BOOT_METHOD: depthcharge
KERNEL_IMAGE_TYPE: ""
ENV_VARS: "PAN_MESA_DEBUG=gles3 DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=T760"
tags:
- lava-rk3288-veyron-jaq
- mesa-ci-aarch64-lava-collabora
panfrost-t860-test:arm64:
extends: .lava-test:arm64
.panfrost-t760-traces:armhf:
extends:
- .lava-traces:armhf
- .panfrost-rules
variables:
DEVICE_TYPE: rk3288-veyron-jaq
DTB: ${DEVICE_TYPE}
GPU_VERSION: panfrost-t760
BOOT_METHOD: depthcharge
KERNEL_IMAGE_TYPE: ""
ENV_VARS: "PAN_MESA_DEBUG=deqp MESA_GLES_VERSION_OVERRIDE=3.1 MESA_GL_VERSION_OVERRIDE=3.3 MESA_GLSL_VERSION_OVERRIDE=330"
tags:
- mesa-ci-aarch64-lava-collabora
.lava-rk3399-gru-kevin:
extends:
- .panfrost-rules
variables:
DEVICE_TYPE: rk3399-gru-kevin
DTB: ${DEVICE_TYPE}
GPU_VERSION: panfrost-t860
BOOT_METHOD: depthcharge
KERNEL_IMAGE_TYPE: ""
tags:
- lava-rk3399-gru-kevin
- mesa-ci-aarch64-lava-collabora
.panfrost-t820-test:arm64:
extends: .lava-test:arm64
panfrost-t860-gles2:arm64:
extends:
- .lava-test:arm64
- .lava-rk3399-gru-kevin
variables:
ENV_VARS: "PAN_MESA_DEBUG=gles3 DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=T860"
panfrost-t860-gles3:arm64:
parallel: 2
extends:
- .lava-test:arm64
- .lava-rk3399-gru-kevin
variables:
DEQP_VERSION: gles3
ENV_VARS: "PAN_MESA_DEBUG=gles3 DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=T860"
panfrost-t860-traces:arm64:
extends:
- .lava-traces:arm64
- .lava-rk3399-gru-kevin
variables:
ENV_VARS: "PAN_MESA_DEBUG=deqp MESA_GLES_VERSION_OVERRIDE=3.1 MESA_GL_VERSION_OVERRIDE=3.3 MESA_GLSL_VERSION_OVERRIDE=330"
.panfrost-t820-gles2:arm64:
extends:
- .lava-test:arm64
- .panfrost-rules
variables:
DEVICE_TYPE: meson-gxm-khadas-vim2
DTB: ${DEVICE_TYPE}
GPU_VERSION: panfrost-t820
LAVA_TAGS: panfrost
ENV_VARS: "PAN_MESA_DEBUG=gles3 DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=T820"
tags:
- lava-meson-gxm-khadas-vim2
- mesa-ci-aarch64-lava-baylibre
.lima-mali400-test:armhf:
parallel: 2
extends: .lava-test:armhf
extends:
- .lava-test:armhf
- .lima-rules
variables:
DEVICE_TYPE: sun8i-h3-libretech-all-h3-cc
DTB: ${DEVICE_TYPE}
GPU_VERSION: lima
ENV_VARS: "DEQP_PARALLEL=3"
ENV_VARS: "DEQP_PARALLEL=3 DEQP_EXPECTED_RENDERER=Mali400"
tags:
- lava-sun8i-h3-libretech-all-h3-cc
- mesa-ci-aarch64-lava-baylibre
lima-mali450-test:arm64:
extends: .lava-test:arm64
.lima-mali450-test:arm64:
extends:
- .lava-test:arm64
- .lima-rules
variables:
DEVICE_TYPE: meson-gxl-s905x-libretech-cc
DTB: ${DEVICE_TYPE}
GPU_VERSION: lima
ENV_VARS: "DEQP_PARALLEL=6"
ENV_VARS: "DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=Mali450"
tags:
- lava-meson-gxl-s905x-libretech-cc
- mesa-ci-aarch64-lava-baylibre
# Commented out while waiting for more DUTs to come online
.radeonsi-stoney-gles2:amd64:
extends:
- .lava-test:amd64
- .radeonsi-rules
variables:
DEVICE_TYPE: hp-11A-G6-EE-grunt
DTB: ""
GPU_VERSION: radeonsi-stoney
BOOT_METHOD: depthcharge
KERNEL_IMAGE_TYPE: ""
ENV_VARS: "DEQP_PARALLEL=4 DEQP_EXPECTED_RENDERER=STONEY NIR_VALIDATE=0"
tags:
- mesa-ci-aarch64-lava-collabora
# Commented out while waiting for more DUTs to come online
.radeonsi-stoney-gles3:amd64:
extends:
- .radeonsi-stoney-gles2:amd64
variables:
DEQP_VERSION: gles3
tags:
- mesa-ci-aarch64-lava-collabora
radeonsi-stoney-traces:amd64:
extends:
- .lava-traces:amd64
- .radeonsi-rules
variables:
DEVICE_TYPE: hp-11A-G6-EE-grunt
DTB: ""
GPU_VERSION: radeonsi-stoney
BOOT_METHOD: depthcharge
KERNEL_IMAGE_TYPE: ""
tags:
- mesa-ci-aarch64-lava-collabora

View File

@@ -0,0 +1,104 @@
job_name: mesa-tracie-{{ gpu_version }} {{ pipeline_info }}
device_type: {{ device_type }}
context:
extra_nfsroot_args: " init=/init rootwait"
timeouts:
job:
minutes: 40
action:
minutes: 10
actions:
power-off:
seconds: 30
priority: 75
visibility: public
{% if tags %}
{% set lavatags = tags.split(',') %}
tags:
{% for tag in lavatags %}
- {{ tag }}
{% endfor %}
{% endif %}
actions:
- deploy:
timeout:
minutes: 10
to: tftp
kernel:
url: {{ base_artifacts_url }}/{{ kernel_image_name }}
{% if kernel_image_type %}
{{ kernel_image_type }}
{% endif %}
nfsrootfs:
url: {{ base_artifacts_url }}/lava-rootfs.tgz
compression: gz
{% if dtb %}
dtb:
url: {{ base_artifacts_url }}/{{ dtb }}.dtb
{% endif %}
os: oe
- boot:
timeout:
minutes: 5
method: {{ boot_method }}
{% if boot_method == "fastboot" %}
{#
For fastboot, LAVA doesn't know how to unpack the rootfs/apply overlay/repack,
so we transfer the overlay over the network after boot.
#}
transfer_overlay:
download_command: wget -S --progress=dot:giga
unpack_command: tar -C / -xzf
{% else %}
commands: nfs
{% endif %}
prompts:
- 'lava-shell:'
- test:
timeout:
minutes: 60
definitions:
- repository:
metadata:
format: Lava-Test Test Definition 1.0
name: tracie
description: "Mesa tracie test plan"
os:
- oe
scope:
- functional
run:
steps:
- mount -t proc none /proc
- mount -t sysfs none /sys
- mount -t devtmpfs none /dev || echo possibly already mounted
- mkdir -p /dev/pts
- mount -t devpts devpts /dev/pts
- echo "nameserver 8.8.8.8" > /etc/resolv.conf
- for i in 1 2 3; do sntp -sS pool.ntp.org && break || sleep 2; done
# amdgpu failed to find its firmware during boot, rebind
- echo 0000:00:01.0 > /sys/bus/pci/drivers/amdgpu/bind || true
{% if env_vars %}
- export {{ env_vars }}
{% endif %}
# tracie-runner.sh assumes some stuff is in pwd
- cd /
- wget -S --progress=dot:giga -O- {{ mesa_url }} | tar -xz
- export PYTHONPATH=$(python3 -c "import sys;print(\":\".join(sys.path))")
- export LIBGL_DRIVERS_PATH=`pwd`/install/lib/dri
- export DEVICE_NAME="gl-{{ gpu_version }}"
- "if sh /install/tracie-runner-gl.sh; then
echo 'tracie: pass';
else
echo 'tracie: fail';
fi"
parse:
pattern: '(?P<test_case_id>\S*):\s+(?P<result>(pass|fail))'
from: inline
name: tracie
path: inline/mesa-tracie.yaml

View File

@@ -54,11 +54,10 @@ meson _build --native-file=native.file \
${GALLIUM_ST} \
-D gallium-drivers=${GALLIUM_DRIVERS:-[]} \
-D vulkan-drivers=${VULKAN_DRIVERS:-[]} \
-D I-love-half-baked-turnips=true \
${EXTRA_OPTION}
cd _build
meson configure
ninja -j4
ninja
LC_ALL=C.UTF-8 ninja test
ninja install
cd ..

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File diff suppressed because it is too large Load Diff

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View File

@@ -3,19 +3,25 @@
set -e
set -o xtrace
VERSION=`cat artifacts/VERSION`
VERSION=`cat install/VERSION`
cd /piglit
PIGLIT_OPTIONS=$(echo $PIGLIT_OPTIONS | head -n 1)
set +e
xvfb-run --server-args="-noreset" sh -c \
"export LD_LIBRARY_PATH=$OLDPWD/install/lib;
wflinfo --platform glx --api gl --profile core | grep \"Mesa $VERSION\\\$\" &&
./piglit run -j4 $PIGLIT_OPTIONS $PIGLIT_PROFILES $OLDPWD/results"
wflinfo --platform glx --api gl --profile core | tee /tmp/version.txt | grep \"Mesa $VERSION\\\$\" &&
./piglit run -j${FDO_CI_CONCURRENT:-4} $PIGLIT_OPTIONS $PIGLIT_PROFILES $OLDPWD/results"
retVal=$?
if [ $retVal -ne 0 ]; then
echo "Found $(cat /tmp/version.txt), expected $VERSION"
fi
set -e
PIGLIT_RESULTS=${PIGLIT_RESULTS:-$PIGLIT_PROFILES}
mkdir -p .gitlab-ci/piglit
cp $OLDPWD/artifacts/piglit/$PIGLIT_RESULTS.txt .gitlab-ci/piglit/$PIGLIT_RESULTS.txt.baseline
cp $OLDPWD/install/piglit/$PIGLIT_RESULTS.txt .gitlab-ci/piglit/$PIGLIT_RESULTS.txt.baseline
./piglit summary console $OLDPWD/results | head -n -1 | grep -v ": pass" >.gitlab-ci/piglit/$PIGLIT_RESULTS.txt
if diff -q .gitlab-ci/piglit/$PIGLIT_RESULTS.txt{.baseline,}; then

View File

@@ -22,38 +22,35 @@ find install -name \*.so -exec $STRIP {} \;
# Test runs don't pull down the git tree, so put the dEQP helper
# script and associated bits there.
mkdir -p artifacts/
cp VERSION artifacts/
cp -Rp .gitlab-ci/deqp* artifacts/
cp -Rp .gitlab-ci/piglit artifacts/
echo "$(cat VERSION) (git-$(git rev-parse HEAD | cut -b -10))" >> install/VERSION
cp -Rp .gitlab-ci/bare-metal install/
cp -Rp .gitlab-ci/deqp* install/
cp -Rp .gitlab-ci/piglit install/
cp -Rp .gitlab-ci/traces-baremetal.yml install/
cp -Rp .gitlab-ci/traces.yml install/
cp -Rp .gitlab-ci/tracie install/
cp -Rp .gitlab-ci/tracie-runner-gl.sh install/
cp -Rp .gitlab-ci/tracie-runner-vk.sh install/
cp -Rp .gitlab-ci/fossils.yml install/
cp -Rp .gitlab-ci/fossils install/
cp -Rp .gitlab-ci/fossilize-runner.sh install/
cp -Rp .gitlab-ci/deqp-runner.sh install/
cp -Rp .gitlab-ci/deqp-*-fails.txt install/
cp -Rp .gitlab-ci/deqp-*-skips.txt install/
# Tar up the install dir so that symlinks and hardlinks aren't each
# packed separately in the zip file.
mkdir -p artifacts/
tar -cf artifacts/install.tar install
# If the container has LAVA stuff, prepare the artifacts for LAVA jobs
if [ -d /lava-files ]; then
# Copy kernel and device trees for LAVA
cp /lava-files/*Image artifacts/.
cp /lava-files/*.dtb artifacts/.
if [ -n "$UPLOAD_FOR_LAVA" ]; then
# Pass needed files to the test stage
cp $CI_PROJECT_DIR/.gitlab-ci/generate_lava.py artifacts/.
cp $CI_PROJECT_DIR/.gitlab-ci/lava-deqp.yml.jinja2 artifacts/.
cp $CI_PROJECT_DIR/.gitlab-ci/lava-tracie.yml.jinja2 artifacts/.
# Pack ramdisk for LAVA
mkdir -p /lava-files/rootfs-${CROSS:-arm64}/mesa
cp -a install/* /lava-files/rootfs-${CROSS:-arm64}/mesa/.
cp .gitlab-ci/deqp-runner.sh /lava-files/rootfs-${CROSS:-arm64}/deqp/.
cp .gitlab-ci/deqp-*-fails.txt /lava-files/rootfs-${CROSS:-arm64}/deqp/.
cp .gitlab-ci/deqp-*-skips.txt /lava-files/rootfs-${CROSS:-arm64}/deqp/.
find /lava-files/rootfs-${CROSS:-arm64}/ -type f -printf "%s\t%i\t%p\n" | sort -n | tail -100
pushd /lava-files/rootfs-${CROSS:-arm64}/
find -H | cpio -H newc -o | gzip -c - > $CI_PROJECT_DIR/artifacts/lava-rootfs-${CROSS:-arm64}.cpio.gz
popd
# Store job ID so the test stage can build URLs to the artifacts
echo $CI_JOB_ID > artifacts/build_job_id.txt
# Pass needed files to the test stage
cp $CI_PROJECT_DIR/.gitlab-ci/generate_lava.py artifacts/.
cp $CI_PROJECT_DIR/.gitlab-ci/lava-deqp.yml.jinja2 artifacts/.
gzip -c artifacts/install.tar > mesa-${DEBIAN_ARCH}.tar.gz
MINIO_PATH=minio-packet.freedesktop.org/artifacts/${CI_PROJECT_PATH}/${CI_PIPELINE_ID}
ci-fairy minio login $CI_JOB_JWT
ci-fairy minio cp mesa-${DEBIAN_ARCH}.tar.gz minio://${MINIO_PATH}/mesa-${DEBIAN_ARCH}.tar.gz
fi

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