VERSION: bump for 23.0.0-rc2

Otherwise build fails:

"../src/intel/compiler/brw_private.h:40:4: note:
 ‘std::variant’ is only available from C++17 onwards"

Fixes: 6c194ddd18 ("intel/compiler: Prepare SIMD selection helpers to handle different prog_datas")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20725>
(cherry picked from commit 53de48f1c4)

.gitlab-ci/build/gitlab-ci.yml

@@ -78,7 +78,7 @@ debian-testing:
       -D dri3=enabled
       -D gallium-va=enabled
     GALLIUM_DRIVERS: "swrast,virgl,radeonsi,zink,crocus,iris,i915"
-    VULKAN_DRIVERS: "swrast,amd,intel,intel_hasvk,virtio-experimental"
+    VULKAN_DRIVERS: "swrast,amd,intel,virtio-experimental"
     BUILDTYPE: "debugoptimized"
     EXTRA_OPTION: >
       -D spirv-to-dxil=true
@@ -121,7 +121,7 @@ debian-testing-msan:
     MESON_TEST_ARGS: "--suite glcpp --suite gallium  --suite format"
     # Freedreno dropped because freedreno tools fail at msan.
     GALLIUM_DRIVERS: "iris,nouveau,kmsro,r300,r600,swrast,svga,v3d,vc4,virgl,etnaviv,panfrost,lima,zink,radeonsi,tegra,d3d12,crocus"
-    VULKAN_DRIVERS: intel,intel_hasvk,amd,broadcom,virtio-experimental
+    VULKAN_DRIVERS: intel,amd,broadcom,virtio-experimental
 
 .debian-cl-testing:
   extends:
@@ -305,7 +305,7 @@ fedora-release:
       -D shared-llvm=enabled
     LLVM_VERSION: ""
     UNWIND: "disabled"
-    VULKAN_DRIVERS: "amd,broadcom,freedreno,intel,intel_hasvk,imagination-experimental"
+    VULKAN_DRIVERS: "amd,broadcom,freedreno,intel,imagination-experimental"
   script:
     - .gitlab-ci/meson/build.sh
 
@@ -350,7 +350,7 @@ debian-android:
     # is not a dependency that AOSP wants to accept.  Can't do Radeon Gallium
     # drivers because they requires LLVM, which we don't have an Android build
     # of.
-    - PKG_CONFIG_PATH=/usr/local/lib/x86_64-linux-android/pkgconfig/:/android-ndk-r21d/toolchains/llvm/prebuilt/linux-x86_64/sysroot/usr/lib/x86_64-linux-android/pkgconfig/ CROSS=x86_64-linux-android GALLIUM_DRIVERS=iris VULKAN_DRIVERS=amd,intel,intel_hasvk .gitlab-ci/meson/build.sh
+    - PKG_CONFIG_PATH=/usr/local/lib/x86_64-linux-android/pkgconfig/:/android-ndk-r21d/toolchains/llvm/prebuilt/linux-x86_64/sysroot/usr/lib/x86_64-linux-android/pkgconfig/ CROSS=x86_64-linux-android GALLIUM_DRIVERS=iris VULKAN_DRIVERS=amd,intel .gitlab-ci/meson/build.sh
 
 .meson-cross:
   extends:
@@ -481,7 +481,7 @@ debian-clang:
       -D shared-llvm=enabled
       -D opencl-spirv=true
     GALLIUM_DRIVERS: "iris,nouveau,kmsro,r300,r600,freedreno,swrast,svga,v3d,vc4,virgl,etnaviv,panfrost,lima,zink,radeonsi,tegra,d3d12,crocus,i915,asahi"
-    VULKAN_DRIVERS: intel,intel_hasvk,amd,freedreno,broadcom,virtio-experimental,swrast,panfrost,imagination-experimental,microsoft-experimental
+    VULKAN_DRIVERS: intel,amd,freedreno,broadcom,virtio-experimental,swrast,panfrost,imagination-experimental,microsoft-experimental
     EXTRA_OPTION:
       -D spirv-to-dxil=true
       -D osmesa=true
@@ -579,7 +579,7 @@ debian-vulkan:
       -D c_args=-fno-sanitize-recover=all
       -D cpp_args=-fno-sanitize-recover=all
     UBSAN_OPTIONS: "print_stacktrace=1"
-    VULKAN_DRIVERS: intel,intel_hasvk,amd,freedreno,broadcom,virtio-experimental,imagination-experimental,microsoft-experimental
+    VULKAN_DRIVERS: intel,amd,freedreno,broadcom,virtio-experimental,imagination-experimental,microsoft-experimental
     EXTRA_OPTION: >
       -D vulkan-layers=device-select,overlay
       -D build-aco-tests=true
@@ -592,7 +592,7 @@ debian-i386:
     - .use-debian/i386_build
   variables:
     CROSS: i386
-    VULKAN_DRIVERS: intel,intel_hasvk,amd,swrast,virtio-experimental
+    VULKAN_DRIVERS: intel,amd,swrast,virtio-experimental
     GALLIUM_DRIVERS: "iris,nouveau,r300,r600,radeonsi,swrast,virgl,zink,crocus"
     LLVM_VERSION: 13
     EXTRA_OPTION: >

VERSION

@@ -1 +1 @@
-23.0.0-devel
+23.0.0-rc2

docs/relnotes/new_features.txt

@@ -1,9 +1,21 @@
-VK_EXT_descriptor_buffer on RADV
+VK_EXT_descriptor_buffer on RADV, Turnip
 VK_AMD_shader_early_and_late_fragment_tests on RADV
 VK_AMD_shader_explicit_vertex_parameter on RADV/RDNA3
-VK_EXT_swapchain_colorspace on RADV
+VK_EXT_swapchain_colorspace on RADV, ANV, Turnip
 Enabled VK_EXT_mesh_shader by default on RADV/RDNA2
-Implemented more VK_EXT_dynamic_state3 features on RADV
+Implemented more VK_EXT_dynamic_state3 features on RADV, Turnip
 Various raytracing, graphics pipeline library and RDNA3 improvements on RADV
 Radeon Memory Visualizer support with RADV.
 VK_KHR_shader_integer_dot_product on V3DV
+VK_KHR_present_wait on ANV, RADV, Turnip
+VK_KHR_push_descriptor on Venus
+VK_KHR_pci_bus_info on Venus
+GL_ARB_clip_control on panfrost
+GL_ARB_texture_filter_anisotropic on panfrost, asahi
+GL_ARB_occulsion_query2 on asahi
+GL_ARB_shader_stencil_export on asahi
+GL_ARB_draw_instanced on asahi
+GL_ARB_instanced_ararys on asahi
+GL_ARB_seamless_cube_map on asahi
+GL_NV_conditional_render on asahi
+GL_ARB_texture_mirror_clamp_to_edge on asahi

src/amd/ci/radv-renoir-aco-flakes.txt

@@ -1,5 +1,4 @@
 dEQP-VK.dynamic_rendering.basic.*
-dEQP-VK.glsl.texture_functions.query.texturequerylod.*
 dEQP-VK.image.sample_texture.64_bit_compressed_format_two_samplers
 dEQP-VK.image.sample_texture.64_bit_compressed_format_two_samplers_cubemap
 dEQP-VK.image.sample_texture.128_bit_compressed_format_two_samplers

src/amd/ci/radv-vega10-aco-flakes.txt

@@ -1,9 +1,4 @@
 dEQP-VK.dynamic_rendering.basic.*
-dEQP-VK.glsl.texture_functions.query.texturequerylod.sampler1darray_float_zero_uv_width_fragment
-dEQP-VK.glsl.texture_functions.query.texturequerylod.sampler1d_fixed_fragment
-dEQP-VK.glsl.texture_functions.query.texturequerylod.usampler1darray_fragment
-dEQP-VK.glsl.texture_functions.query.texturequerylod.usampler1darray_zero_uv_width_fragment
-dEQP-VK.glsl.texture_functions.query.texturequerylod.isampler1darray_fragment
 dEQP-VK.image.sample_texture.64_bit_compressed_format_two_samplers
 dEQP-VK.image.sample_texture.64_bit_compressed_format_two_samplers_cubemap
 dEQP-VK.image.sample_texture.128_bit_compressed_format_two_samplers

src/amd/compiler/aco_instruction_selection.cpp

@@ -9626,7 +9626,7 @@ visit_tex(isel_context* ctx, nir_tex_instr* instr)
    unsigned wqm_coord_count = 0;
    std::vector<Temp> unpacked_coord;
    if (ctx->options->gfx_level == GFX9 && instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
-       instr->op != nir_texop_lod && instr->coord_components) {
+       instr->coord_components) {
       RegClass rc = a16 ? v2b : v1;
       for (unsigned i = 0; i < coord.bytes() / rc.bytes(); i++)
          unpacked_coord.emplace_back(emit_extract_vector(ctx, coord, i, rc));

src/amd/vulkan/bvh/ploc_internal.comp

@@ -198,6 +198,9 @@ combined_node_cost(uint32_t lds_base, uint32_t i, uint32_t j)
    combined_bounds.max = max(shared_bounds[i - lds_base].max, shared_bounds[j - lds_base].max);
    float area = aabb_surface_area(combined_bounds);
 
+   if (area == 0.0)
+      return 0.0;
+
    /* p_a and p_b are the probabilities that i or j are hit by a ray:
     *    Assuming that the current node is hit (p = 1) and the probability of hitting a node
     *    is proportional to its surface area, p = area * c with p = 1 for the current node.

src/amd/vulkan/radv_acceleration_structure.c

@@ -790,7 +790,7 @@ ploc_build_internal(VkCommandBuffer commandBuffer, uint32_t infoCount,
                             cmd_buffer->device->meta_state.accel_struct_build.ploc_p_layout,
                             VK_SHADER_STAGE_COMPUTE_BIT, 0, sizeof(consts), &consts);
       vk_common_CmdDispatch(commandBuffer,
-                            MAX2(DIV_ROUND_UP(bvh_states[i].node_count, 64), 1), 1, 1);
+                            MAX2(DIV_ROUND_UP(bvh_states[i].node_count, PLOC_WORKGROUP_SIZE), 1), 1, 1);
    }
 }
 

src/amd/vulkan/radv_cmd_buffer.c

@@ -6233,7 +6233,7 @@ radv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipeline
 
       if (cmd_buffer->device->physical_device->rad_info.rbplus_allowed &&
           (!cmd_buffer->state.emitted_graphics_pipeline ||
-           cmd_buffer->state.emitted_graphics_pipeline->col_format_non_compacted != graphics_pipeline->col_format_non_compacted)) {
+           cmd_buffer->state.col_format_non_compacted != graphics_pipeline->col_format_non_compacted)) {
          cmd_buffer->state.col_format_non_compacted = graphics_pipeline->col_format_non_compacted;
          cmd_buffer->state.dirty |= RADV_CMD_DIRTY_RBPLUS;
       }

src/amd/vulkan/radv_rmv.c

@@ -276,6 +276,8 @@ append_trace_events(struct radv_device *device, int pipe_fd)
          read_ptr += length - sizeof(struct trace_event_header);
       }
    } while (true);
+
+   free(page);
 }
 
 static void

src/compiler/nir/nir_opt_move.c

@@ -51,13 +51,13 @@
  * lower register pressure.
  */
 
-static ALWAYS_INLINE bool
+static inline bool
 src_is_ssa(nir_src *src, void *state)
 {
    return src->is_ssa;
 }
 
-static ALWAYS_INLINE bool
+static inline bool
 instr_reads_register(nir_instr *instr)
 {
    return !nir_foreach_src(instr, src_is_ssa, NULL);

src/gallium/drivers/panfrost/pan_cmdstream.c

@@ -4209,7 +4209,7 @@ panfrost_create_blend_state(struct pipe_context *pipe,
       const bool supports_2src = pan_blend_supports_2src(PAN_ARCH);
       so->info[c] = (struct pan_blend_info){
          .enabled = (equation.color_mask != 0),
-         .opaque = pan_blend_is_opaque(equation),
+         .opaque = !blend->logicop_enable && pan_blend_is_opaque(equation),
          .constant_mask = constant_mask,
 
          /* TODO: check the dest for the logicop */

src/gallium/drivers/panfrost/pan_context.c

@@ -60,12 +60,15 @@ panfrost_clear(struct pipe_context *pipe, unsigned buffers,
                const union pipe_color_union *color, double depth,
                unsigned stencil)
 {
+   if (!panfrost_render_condition_check(pan_context(pipe)))
+      return;
+
+   /* Only get batch after checking the render condition, since the check can
+    * cause the batch to be flushed.
+    */
    struct panfrost_context *ctx = pan_context(pipe);
    struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx);
 
-   if (!panfrost_render_condition_check(ctx))
-      return;
-
    /* At the start of the batch, we can clear for free */
    if (!batch->scoreboard.first_job) {
       panfrost_batch_clear(batch, buffers, color, depth, stencil);

src/gallium/drivers/panfrost/pan_screen.c

@@ -135,6 +135,7 @@ panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return 1;
 
    case PIPE_CAP_OCCLUSION_QUERY:
+   case PIPE_CAP_PRIMITIVE_RESTART:
    case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
       return true;
 
@@ -312,8 +313,8 @@ panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
    /* Removed in v9 (Valhall). PRIMTIIVE_RESTART_FIXED_INDEX is of course
     * still supported as it is core GLES3.0 functionality
     */
-   case PIPE_CAP_PRIMITIVE_RESTART:
-      return dev->arch <= 7;
+   case PIPE_CAP_EMULATE_NONFIXED_PRIMITIVE_RESTART:
+      return dev->arch >= 9;
 
    case PIPE_CAP_FLATSHADE:
    case PIPE_CAP_TWO_SIDED_COLOR:

src/intel/compiler/meson.build

@@ -208,6 +208,7 @@ if with_tests
       link_with : [
         libintel_compiler, libintel_common, libintel_dev, libisl,
       ],
+      override_options: ['cpp_std=c++17'],
       dependencies : [idep_gtest, idep_nir, idep_mesautil],
     ),
     suite : ['intel'],

src/microsoft/vulkan/dzn_image.c

@@ -240,16 +240,16 @@ dzn_image_create(struct dzn_device *device,
     * destination. Both operations require the RT or DS cap flags.
     */
    if ((image->vk.usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT) &&
-       image->vk.tiling == VK_IMAGE_TILING_OPTIMAL &&
-       (image->desc.Flags & (D3D12_RESOURCE_FLAG_ALLOW_RENDER_TARGET |
-                             D3D12_RESOURCE_FLAG_ALLOW_DEPTH_STENCIL)) == D3D12_RESOURCE_FLAG_NONE) {
+       image->vk.tiling == VK_IMAGE_TILING_OPTIMAL) {
 
       D3D12_FEATURE_DATA_FORMAT_SUPPORT dfmt_info =
          dzn_physical_device_get_format_support(pdev, pCreateInfo->format);
       if (dfmt_info.Support1 & D3D12_FORMAT_SUPPORT1_RENDER_TARGET) {
          image->desc.Flags |= D3D12_RESOURCE_FLAG_ALLOW_RENDER_TARGET;
          image->valid_access |= D3D12_BARRIER_ACCESS_RENDER_TARGET;
-      } else if (dfmt_info.Support1 & D3D12_FORMAT_SUPPORT1_DEPTH_STENCIL) {
+      } else if ((dfmt_info.Support1 & D3D12_FORMAT_SUPPORT1_DEPTH_STENCIL) &&
+                 (image->desc.Flags & (D3D12_RESOURCE_FLAG_ALLOW_RENDER_TARGET |
+                                       D3D12_RESOURCE_FLAG_ALLOW_UNORDERED_ACCESS)) == D3D12_RESOURCE_FLAG_NONE) {
          image->desc.Flags |= D3D12_RESOURCE_FLAG_ALLOW_DEPTH_STENCIL;
          image->valid_access |= D3D12_BARRIER_ACCESS_DEPTH_STENCIL_WRITE;
       } else if (dfmt_info.Support1 & D3D12_FORMAT_SUPPORT1_TYPED_UNORDERED_ACCESS_VIEW) {

src/panfrost/compiler/bi_lower_swizzle.c

@@ -133,8 +133,10 @@ lower_swizzle(bi_context *ctx, bi_instr *ins, unsigned src)
       bi_index dest = ins->dest[0];
       bi_index tmp = bi_temp(ctx);
 
+      bi_index swizzled_src = bi_replace_index(ins->src[0], tmp);
+      ins->src[0].swizzle = BI_SWIZZLE_H01;
       ins->dest[0] = tmp;
-      bi_swz_v2i16_to(&b, dest, bi_replace_index(ins->src[0], tmp));
+      bi_swz_v2i16_to(&b, dest, swizzled_src);
       return;
    }
 

src/panfrost/lib/pan_afbc.c

@@ -118,6 +118,13 @@ unswizzled_format(enum pipe_format format)
 enum pan_afbc_mode
 panfrost_afbc_format(unsigned arch, enum pipe_format format)
 {
+   /* sRGB does not change the pixel format itself, only the
+    * interpretation. The interpretation is handled by conversion hardware
+    * independent to the compression hardware, so we can compress sRGB
+    * formats by using the corresponding linear format.
+    */
+   format = util_format_linear(format);
+
    /* Luminance-alpha not supported for AFBC on v7+ */
    switch (format) {
    case PIPE_FORMAT_A8_UNORM:
@@ -132,13 +139,6 @@ panfrost_afbc_format(unsigned arch, enum pipe_format format)
       break;
    }
 
-   /* sRGB does not change the pixel format itself, only the
-    * interpretation. The interpretation is handled by conversion hardware
-    * independent to the compression hardware, so we can compress sRGB
-    * formats by using the corresponding linear format.
-    */
-   format = util_format_linear(format);
-
    /* We handle swizzling orthogonally to AFBC */
    format = unswizzled_format(format);
 

src/panfrost/lib/pan_blend.c

@@ -796,7 +796,8 @@ GENX(pan_blend_get_shader_locked)(const struct panfrost_device *dev,
    };
 
    /* Blend shaders should only be used for blending on Bifrost onwards */
-   assert(dev->arch <= 5 || !pan_blend_is_opaque(state->rts[rt].equation));
+   assert(dev->arch <= 5 || state->logicop_enable ||
+          !pan_blend_is_opaque(state->rts[rt].equation));
    assert(state->rts[rt].equation.color_mask != 0);
 
    struct hash_entry *he =

src/vulkan/wsi/wsi_common.c

@@ -641,10 +641,22 @@ void
 wsi_destroy_image_info(const struct wsi_swapchain *chain,
                        struct wsi_image_info *info)
 {
-   vk_free(&chain->alloc, (void *)info->create.pQueueFamilyIndices);
-   vk_free(&chain->alloc, (void *)info->format_list.pViewFormats);
-   vk_free(&chain->alloc, (void *)info->drm_mod_list.pDrmFormatModifiers);
-   vk_free(&chain->alloc, info->modifier_props);
+   if (info->create.pQueueFamilyIndices != NULL) {
+      vk_free(&chain->alloc, (void *)info->create.pQueueFamilyIndices);
+      info->create.pQueueFamilyIndices = NULL;
+   }
+   if (info->format_list.pViewFormats != NULL) {
+      vk_free(&chain->alloc, (void *)info->format_list.pViewFormats);
+      info->format_list.pViewFormats = NULL;
+   }
+   if (info->drm_mod_list.pDrmFormatModifiers != NULL) {
+      vk_free(&chain->alloc, (void *)info->drm_mod_list.pDrmFormatModifiers);
+      info->drm_mod_list.pDrmFormatModifiers = NULL;
+   }
+   if (info->modifier_props != NULL) {
+      vk_free(&chain->alloc, info->modifier_props);
+      info->modifier_props = NULL;
+   }
 }
 
 VkResult