Jordan Justen
bb8063e1f4
anv/generated_indirect_draws: Adjust xe2 simd32 sends_count_expectation
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: e9f63df ('intel/dev: Enable LNL PCI IDs without INTEL_FORCE_PROBE')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30093 >
2024-07-19 16:09:06 +00:00
Eric Engestrom
2c6e8b2dd5
Revert "bin/ci_run_n_monitor: explain that the 'Universal Recycling symbol' ♲ emoji means these jobs were cancelled"
...
This reverts commit 032d4a20f9 .
The `if not to_cancel: return` was a red herring as what actually matters
is the job status, which is checked in each cancel_job() call, so we
can't know in advance whether anything will be cancelled, so let's just
drop this text explanation.
In the meantime we've also improved the emoji next to cancelled jobs, so
let's hope there is no longer any need to explain what this long list of
job names means.
Fixes: 032d4a20f9 ("bin/ci_run_n_monitor: explain that the 'Universal Recycling symbol' ♲ emoji means these jobs were cancelled")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30265 >
2024-07-19 16:03:24 +00:00
Samuel Pitoiset
1846eed38b
radv/meta: create the layout for clear depth/stencil on-demand
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
7c62f53b83
radv/meta: rework getting depth stencil clear pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
cfd9d550d8
radv/meta: create the layout for clear color on-demand
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
dd188b7e77
radv/meta: rework getting clear color pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
2af57b1cac
radv/meta: create the louts for DCC comp-to-single clear on-demand
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
6c6dae59fb
radv/meta: create the layouts for compute resolve on-demand
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
fd5526fd87
radv/meta: create the layouts for FMASK expand on-demand
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
4f3f3ccd0d
radv/meta: create the layouts for FMASK copy on-demand
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
40724a657a
radv/meta: create the layouts for depth decompress on-demand
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
e7eb201e18
radv/meta: create the layouts for FS resolve pipelines on-demand
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
fc30915637
radv/meta: create the layouts for blit pipelines on-demand
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
5361a50d54
radv/meta: stop creating similar pipeline layouts for depth decompress
...
Only the pipeline depends on the number of samples.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
5b7459d0fa
radv/meta: remove unnecessary goto
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Samuel Pitoiset
c96f2c5e3d
radv/meta: stop checking that creating NIR shaders failed
...
This shouldn't happen in practice.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262 >
2024-07-19 14:53:44 +00:00
Daniel Stone
508a3bdd27
u_format: Reword introduction
...
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29649 >
2024-07-19 13:50:42 +00:00
Daniel Stone
974d31dba7
format: Generate sRGB<->linear conversions from table
...
Instead of having a hardcoded table to convert between sRGB formats and
their linear-gamma equivalents (and vice-versa), generate this from the
information in the format table.
This requires adding a 'sublayout' attribute to differentiate between,
e.g. DXT1 and DXT3, which otherwise appear to be equivalent but for
their name prefix.
As an anonymous union is being used, we also need named initialisers for
the util_format_description entries.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29649 >
2024-07-19 13:50:42 +00:00
Daniel Stone
e05415a82e
format: Generate endian-independent format aliases
...
Instead of having a hardcoded list of endian-independent format aliases
in the header, generate them from the format definitions.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29649 >
2024-07-19 13:50:42 +00:00
Daniel Stone
ccc6442d6f
u_format: Rewrite format table to use YAML
...
u_format has always had its format table in CSV. This is kind of nice
for some things, but is a serious pain to extend, especially with
optional fields.
In going through our many (many, many) duplicated tables of format
mappings, it would've been nice to add some descriptions to our central
u_format table, such as mapping to DRM FourCC, to EGLImage mappings, and
to GL internalformats for EGLImage imports. Unfortunately, doing so with
more additional fields would just make the CSV totally unreadable.
Move the CSV table to a YAML-based table and adjust the Python parsers
to suit. The resulting generated files are identical before and after
the transition.
The new parser also has a significant amount of format validation to
make it easier to catch common errors.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29649 >
2024-07-19 13:50:42 +00:00
Jesse Natalie
12a33ecd0f
ci/windows: Specify numpy < 2.0 to prevent breaking changes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29649 >
2024-07-19 13:50:41 +00:00
Jesse Natalie
4b3cd808aa
ci/windows: Disable zlib in LLVM
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29649 >
2024-07-19 13:50:41 +00:00
Karol Herbst
3386e1425f
rusticl: support read_write images
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30242 >
2024-07-19 13:26:12 +00:00
Karol Herbst
3d0ec53275
zink: fix OpenCL read_write images
...
With OpenCL read_write images enabled we can actually hit image_loads.
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30242 >
2024-07-19 13:26:12 +00:00
Valentine Burley
52cf610975
tu: Enable VK_KHR_shader_subgroup_uniform_control_flow
...
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29277 >
2024-07-19 12:54:09 +00:00
Valentine Burley
d43a271175
freedreno/ci: Use the common a6xx-skips on a750
...
Some tests will have to be skipped on all devices on Turnip.
To avoid duplication use the common a6xx-skips file on a750 as well.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29277 >
2024-07-19 12:54:09 +00:00
Valentine Burley
c4da848a1a
freedreno,tu,ir3: Move threadsize_base and max_waves to fd_dev_info
...
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29277 >
2024-07-19 12:54:09 +00:00
Lionel Landwerlin
692e1ab2c1
anv: get rid of the second dynamic state heap
...
Pretty big change... Sorry for that.
I can't exactly remember why I created 2 heaps. I think it's because I
mistakenly thought the samplers in the binding sampler pointers needed
to be indexed from the binding table. But that's not the case, they
just need to be in the dynamic state heap.
In the future, this change will allow to also allocate buffers for
push constant data in the newly created dynamic_visible_pool which
will be useful on < Gfx12.0 where this is the only place push constant
data can live for compute shaders.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30047 >
2024-07-19 12:21:46 +00:00
Timothy Arceri
355a1f2058
glsl: remove out of date comment
...
GLSL 4.40 changed the relevant language in Section 8.13.2 (Interpolation
Functions) to:
"Component selection operators (e.g., .xy) may be used when specifying
interpolant."
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30239 >
2024-07-19 10:59:11 +00:00
Eric Engestrom
b2c3dfef75
llvmpipe/ci: mark spec@!opengl 1.1@gl_select tests as fixed
...
Fixed by a commit in the range d94a40fe...6f02ec5e, likely
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26018
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30260 >
2024-07-19 09:57:24 +00:00
Eric Engestrom
4696e9c49b
v3d/ci: mark spec@amd_performance_monitor@vc4 tests as fixed
...
Fixed by a commit in the range 452fed52..decc040a, but no obvious
candidate stands out.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30259 >
2024-07-19 09:11:16 +00:00
Eric Engestrom
23ef65ea3b
ci/vkd3d: fix LD_LIBRARY_PATH
...
Fixes: 50fc7cc290 ("glx: directly link to gallium")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30258 >
2024-07-19 08:29:51 +00:00
Georg Lehmann
e5b48da908
aco: remove optimize_cmp_subgroup_invocation
...
The new NIR optimization pass handles all these cases and more.
No Foz-DB changes.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30236 >
2024-07-19 08:06:58 +00:00
Georg Lehmann
aa6d363634
nir: constant fold inverse_ballot
...
Foz-DB Navi21:
Totals from 210 (0.26% of 79395) affected shaders:
Instrs: 79583 -> 78892 (-0.87%)
CodeSize: 435636 -> 431680 (-0.91%)
VGPRs: 7208 -> 7224 (+0.22%)
Latency: 660376 -> 658808 (-0.24%); split: -0.38%, +0.14%
InvThroughput: 127489 -> 127544 (+0.04%); split: -0.35%, +0.39%
VClause: 1503 -> 1504 (+0.07%)
SClause: 3970 -> 3947 (-0.58%)
Copies: 4932 -> 4682 (-5.07%); split: -5.17%, +0.10%
Branches: 2411 -> 2406 (-0.21%); split: -0.33%, +0.12%
PreSGPRs: 6395 -> 6434 (+0.61%); split: -0.31%, +0.92%
PreVGPRs: 4100 -> 4103 (+0.07%)
VALU: 48484 -> 48145 (-0.70%); split: -0.70%, +0.00%
SALU: 12499 -> 12202 (-2.38%); split: -2.41%, +0.03%
SMEM: 6448 -> 6420 (-0.43%)
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30235 >
2024-07-19 07:24:34 +00:00
Georg Lehmann
efb9258814
aco: handle clustered uniform reductions correctly
...
Alternatively we could just trust divergence analysis to do the right thing.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30235 >
2024-07-19 07:24:34 +00:00
Samuel Pitoiset
65acc81e9d
radv: fix shaders cache corruption with indirect pipeline binds
...
Indirect pipeline binds force indirect descriptor sets and this needs
to be in the shader stage key, otherwise two shaders might result in
the same pipeline cache key.
Fixes: b1ba02e707 ("radv: force using indirect descriptor sets for indirect compute pipelines")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30209 >
2024-07-19 06:52:21 +00:00
M Henning
95bff5ca5b
nak: Add minimum bindgen requirement
...
This is copied from rusticl. We need bindgen 0.65 so we have
size_t-is-usize by default.
Fixes: 94436580 ("nak: Only convert the written portion of the buffer in NirInstrPrinter")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11371
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30178 >
2024-07-19 05:45:05 +00:00
Eric Engestrom
d5ec3a8988
meson/megadriver: replace hardlinks with symlinks
...
The wording in the script has always (3218056e0e ) been about symlinks,
and it feels like the use of `link()` instead of `symlink()` was
a typo that became fact.
These hardlinks make packaging harder (many distros have some variant of
this patch locally) especially when it comes to debug packages where gdb
expects the symbols file to have the same name as the lib the symbols
come from, and I don't think they make anything better, so let's change
to code to match the documentation :)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29731 >
2024-07-19 01:24:16 +00:00
Eric Engestrom
ac5d14c5ea
meson/megadriver: stop removing the "master" .so file
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29731 >
2024-07-19 01:24:16 +00:00
Eric Engestrom
da05938e65
meson/megadriver: fix install message to match the rest of meson
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29731 >
2024-07-19 01:24:16 +00:00
Eric Engestrom
dbc28332a9
meson: fix filename printed when generating devenv files
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29731 >
2024-07-19 01:24:16 +00:00
David Heidelberg
decc040abe
intel/debug: allow silencing CL warnings
...
Useful for CI and users previously aware of the warning.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29691 >
2024-07-19 00:24:29 +00:00
Mike Blumenkrantz
da47c0ed65
zink: use PIPE_CAP_NIR_SAMPLERS_AS_DEREF
...
this simplifies a bunch of stuff, though it also requires manually
clamping constnat oob indexing to avoid piglit hangs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30001 >
2024-07-18 22:43:35 +00:00
Mike Blumenkrantz
235eb1af96
zink: move image aoa access to nir pass
...
this brings zink's output nir closer to the emitted spirv
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30001 >
2024-07-18 22:43:35 +00:00
Mike Blumenkrantz
586d0c4a9b
vl/dri3: use loader's dri3 init code and delete everything else
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30128 >
2024-07-18 21:58:49 +00:00
Mike Blumenkrantz
985e9c09f8
egl: use loader's multibuffer check to deduplicate lots of code
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30128 >
2024-07-18 21:58:49 +00:00
Mike Blumenkrantz
293c7b38ff
loader/glx: move multibuffers check to loader
...
make this code more reusable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30128 >
2024-07-18 21:58:49 +00:00
Mike Blumenkrantz
63191107ab
loader/dri3: avoid killing the xcb connection if dri3 not found
...
calling open if the extension is unsupported closes the connection
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30128 >
2024-07-18 21:58:49 +00:00
Mike Blumenkrantz
c24891e044
loader/dri3: check xfixes version in loader_dri3_open()
...
this will allow simplifying some code without losing functionality
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30128 >
2024-07-18 21:58:49 +00:00
Mike Blumenkrantz
fa541a887c
loader: delete loader_open_driver()
...
no longer used
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29771 >
2024-07-18 20:30:43 +00:00
Mike Blumenkrantz
93511c1c5c
gbm: link directly with libgallium
...
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29771 >
2024-07-18 20:30:43 +00:00
Mike Blumenkrantz
69c772e4ea
egl: link with libgallium directly
...
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29771 >
2024-07-18 20:30:43 +00:00
Mike Blumenkrantz
50fc7cc290
glx: directly link to gallium
...
this eliminates the loader interface, which avoids an entire class
of issues and simplifies a bunch of code
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29771 >
2024-07-18 20:30:43 +00:00
Lionel Landwerlin
67b778445a
brw: fix uniform rebuild of sources
...
If you have something like this :
con 32 %66 = @load_reg (%62) (base=0, legacy_fabs=0, legacy_fneg=0)
con 32 %27 = @resource_intel (%22 (0xdeaddead), %66, %67, %17 (0x0)) (desc_set=2, binding=96, resource_intel=0, resource_block_intel=-1)
Just copying the brw_reg in ssa_values[] is not enough for the
load_reg intrinsic. We need to call get_nir_src() to force some logic
to create the register correct.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: b8209d69ff ("intel/fs: Add support for new-style registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30050 >
2024-07-18 19:58:46 +00:00
Rob Clark
b0d22461b9
freedreno: Enable the X1-85
...
Enable the GPU in the X1 elite/plus laptop SoCs.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30249 >
2024-07-18 19:27:03 +00:00
Eric Engestrom
330006375e
bin/ci_run_n_monitor: replace ♲ with 🗙 to represent cancelled jobs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30223 >
2024-07-18 19:21:45 +00:00
Eric Engestrom
964ecac0a4
bin/ci_run_n_monitor: add text labels next to the emojis
...
IMO emojis are nice to add next to the information to recognize things
easily in cases where they are visible, but they should not *replace*
the information.
This adds a readable text next to all emojis (some already had one,
like the "job duration" ones).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30223 >
2024-07-18 19:21:45 +00:00
Eric Engestrom
032d4a20f9
bin/ci_run_n_monitor: explain that the 'Universal Recycling symbol' ♲ emoji means these jobs were cancelled
...
And not "restarted" for instance, which would also be a reasonable
interpretation.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30223 >
2024-07-18 19:21:45 +00:00
Kenneth Graunke
d630ff1f79
intel/brw: Disallow scalar byte to float conversions on DG2+
...
I haven't been able to find this restriction mentioned anywhere in the
hardware documentation, but the simulator has code to reject this case
as invalid, and it doesn't appear to work on hardware anymore.
Having lower_regioning() handle this takes care of the issue so we
don't have to worry about generating it in random places.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11489
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30140 >
2024-07-18 18:51:35 +00:00
Sushma Venkatesh Reddy
7ca77370d2
anv: Fix I915_PARAM_HAS_CONTEXT_FREQ_HINT check
...
When I915_PARAM_HAS_CONTEXT_FREQ_HINT is not supported the
intel_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp) will return -1 and that
will cause i915_gem_get_param() to return false.
val will be different than 1 when not using GuC submission, so we are
forcing val check to ensure this holds good in platforms that doesn't
support GuC submission.
Fixes: d52dd5a9 ("anv/drirc: add option to provide low latency hint")
Signed-off-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30234 >
2024-07-18 18:26:38 +00:00
Eric Engestrom
35cb0c350e
ci: replace gallium-drivers=swrast with gallium-drivers=llvmpipe,softpipe
...
Except debian-arm32 which disables llvm, so it can't get llvmpipe.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27607 >
2024-07-18 17:48:20 +00:00
Adam Jackson
010b2f9497
gallium/meson: Deconflate swrast/softpipe/llvmpipe
...
This adds explicit names for softpipe and llvmpipe to the gallium driver
list. "swrast" is treated as a compatibility name that selects both. We
clarify how lavapipe depends on (just) llvmpipe, and we make it possible
to build llvmpipe without softpipe.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27607 >
2024-07-18 17:48:20 +00:00
Samuel Pitoiset
3fba270907
radv/meta: create clear r32g32b32 pipelines on-demand when needed
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
5933d2274b
radv/meta: add a helper to create clear r32g32b32 pipeline
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
9a3f00e7e6
radv/meta: create clear pipeliones on-demand when needed
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
7bda80f08b
radv/meta: update the helper that creates clear pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
b406121d22
radv/meta: create itoi r32g32b32 pipelines on-demand when needed
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
2e21c4098f
radv/meta: add a helper to create itoi r32g32b32 pipeline
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
ef2af61300
radv/meta: create itoi pipelines on-demand when needed
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
e47dffb100
radv/meta: update the helper that creates itoi pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
bb745776b7
radv/meta: create btoi r32g32b32 pipeline on-demand when needed
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
010e2c373b
radv/meta: add a helper to create btoi r32g32b32 pipeline
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
b68b9b1677
radv/meta create btoi pipelines on-demand when needed
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
3332de3640
radv/meta: add a helper to create btoi pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
c23ec1a7c3
radv/meta: create itob pipelines on-demand when needed
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
0cdd230772
radv/meta: add a helper to create itob pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248 >
2024-07-18 17:27:46 +02:00
Samuel Pitoiset
9a2730d9a5
radv/meta: create DCC comp-to-single pipelines on-demand when needed
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244 >
2024-07-18 14:55:05 +00:00
Samuel Pitoiset
72fa7a0449
radv/meta: create clear HTILE mask pipeline on-demand when needed
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244 >
2024-07-18 14:55:05 +00:00
Samuel Pitoiset
f8a434bb93
radv/meta: rework creating clear HTILE mask pipeline
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244 >
2024-07-18 14:55:05 +00:00
Samuel Pitoiset
e5f3d8d24e
radv/meta: rework creating DCC decompress compute pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244 >
2024-07-18 14:55:05 +00:00
Samuel Pitoiset
792665bbee
radv/meta: rework creating HW resolve pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244 >
2024-07-18 14:55:05 +00:00
Samuel Pitoiset
c4d8ccfcb3
radv/meta: cleanup creating HW resolve pipelines
...
Create the NIR VS shader at the same place as the FS shader for
consistency.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244 >
2024-07-18 14:55:05 +00:00
Samuel Pitoiset
c5130e779c
radv/meta: rework creating compute depth/stencil resolve pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244 >
2024-07-18 14:55:05 +00:00
Samuel Pitoiset
22e1d0f293
radv/meta: rework creating compute color resolve pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244 >
2024-07-18 14:55:05 +00:00
Samuel Pitoiset
edbf6fce55
radv/meta: rework creating GFX color resolve pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244 >
2024-07-18 14:55:05 +00:00
Samuel Pitoiset
21dd086c07
radv/meta: rework creating GFX depth/stencil resolve pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244 >
2024-07-18 14:55:05 +00:00
Daniel Stone
80bcdc08ec
loader/dri3: Use FourCC for buffer allocations
...
Switch to using FourCC for buffer allocations instead of
DRI_IMAGE_FORMAT, albeit with a transient helper to convert from FourCC
to DRI_IMAGE_FORMAT for createImage.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Daniel Stone
084cedb522
egl/x11: Remove __DRI_IMAGE_FORMAT remnants
...
These are now immediately converted to a FourCC.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Daniel Stone
361f362258
dri: Unify createImage and createImageWithModifiers
...
There's no real reason for the two to exist separately. Nuke the old
createImage in favour of just having createImageWithModifiers.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Daniel Stone
4072809149
dri: Delete createImageFromName
...
Its last user is now gone. Bye!
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Daniel Stone
ecd0fd8deb
egl/x11: Update to createImageFromNames
...
This is the last user of the old createImageFromName entrypoint; use
createImageFromNames instead, which involves converting to using FourCC
and also a byte rather than pixel stride.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Daniel Stone
efb88deb36
loader/dri3: Use FourCC for create-image entrypoints
...
Use FourCC for everything winsys-facing, instead of pipe_format.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Daniel Stone
648d3da090
gallium/dri: Drop mesa_format indirection for lookup
...
Instead of looking up a mesa_format from a DRI_IMAGE_FORMAT, then
looking up the internal format from there, just go directly from A to B.
Inspired by an unmerged commit from Emma Anholt.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Daniel Stone
d62bea127d
gallium/dri: Delete unused helper function
...
This isn't used since some of the DRI_IMAGE_FORMAT rework.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Emma Anholt
2ef4b6ed54
dri: Drop the old lookupEGLImage wrapper function.
...
All the loaders implemented the split version. We don't need to maintain
the old function and struct layout, because we're version locked
between loader and driver.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Emma Anholt
733b7002e7
dri: Fold lookup_egl_image_validated into its one caller
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Emma Anholt
0c859fd278
dri: Collapse dri2_validate_egl_image() into dri_validate_egl_image()
...
Unnecessary indirection.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Emma Anholt
b2777e455b
mesa: Drop some version checking around ValidateEGLImage
...
We can just have the screen check if the loader exports it, and take the
path we would otherwise.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Emma Anholt
0d8c74bd7c
dri: Move EGL image lookup/validate setup to dri_init_screen()
...
All 4 callers did the same thing based on loader interface presence.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Daniel Stone
3cd654b88a
dri: Stop answering DRI_IMAGE_ATTRIB_FORMAT
...
External users only care about FourCC, and they can already query that
directly.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Daniel Stone
d6bce728de
dri: Remove createImageFromFds
...
All callers have been switched to use the newer createImageFromDmaBufs.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:51 +00:00
Daniel Stone
60cb420996
dri: Remove old createImageWithModifiers
...
Everyone can use createImageWithModifiers2, which is now just called
createImageWithModifiers.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:50 +00:00
Emma Anholt
3bfd157483
dri: Drop createImageFromFds2() in favor of createImageFromDmaBufs()
...
They're calling the same thing in the backend, just merge the impls. We
don't need to maintain the old function and struct layout, because we're
version locked between loader and driver.
Reviewed-by: Adam Jackson <ajax@redhat.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:50 +00:00
Emma Anholt
26c1354578
dri: Consistently use createImageFromDmabufs() not createImageFromFds()
...
They're calling the same thing in the backend, so reduce the proliferation
of interfaces consumed within our implementation.
driVkImageExtensionSw now sets dri2_from_dma_bufs, which means that
egl_dri2 will now expose EXT_image_dma_buf_import. Given that it
previously set dri2_from_fds suggesting that it can import dmabufs, this
is presumably OK.
Reviewed-by: Adam Jackson <ajax@redhat.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:50 +00:00
Emma Anholt
b1bcda45be
dri: Drop old createImageFromRenderbuffer()
...
... and rename createImageFromRenderbuffer2() to be it. We don't need to
maintain the old function and struct layout, because we're version locked
between loader and driver.
Reviewed-by: Adam Jackson <ajax@redhat.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:50 +00:00
Emma Anholt
24d03a1c0f
dri: Replace createImageFromDmaBufs() with createImageFromDmaBufs3()
...
If FromDmaBufs()/FromDmaBufs2() are available, then FromDmaBufs3() is.
Drop the old method (unused by third parties) and make the new preferred
entrypoint take its name.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:50 +00:00
Emma Anholt
13ea03f088
dri: Consistently use createImageFromFds2(), not createImageFromFds()
...
dri_screen.c supports it if it supports createImageFromFds().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:50 +00:00
Emma Anholt
9a026df0f7
dri: Consistently use createImageWithModifiers2()
...
dri_screen.c supports it regardless.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:50 +00:00
Daniel Stone
cb90f99ee5
egl/dri2: Use createImageFromNames for DRM buffers
...
When using the ancient DRM-buffer extension, use createImageFromNames
instead of createImageFromName, so we can deprecate the latter.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:50 +00:00
Emma Anholt
6227d83910
dri: Fix a pasteo in dri2_from_names()
...
Fixes: 433ca3127a ("st/dri: replace format conversion functions with single mapping table")
Reviewed-by: Adam Jackson <ajax@redhat.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30245 >
2024-07-18 14:16:50 +00:00
David Rosca
8fa9e78e39
radeonsi/vcn: Support 10bit RGB for EFC input
...
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30101 >
2024-07-18 13:11:13 +00:00
nyanmisaka
eb05111bf7
frontends/va: add support for A2RGB10/X2RGB10/A2BGR10/X2BGR10
...
Signed-off-by: nyanmisaka <nst799610810@gmail.com >
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30101 >
2024-07-18 13:11:13 +00:00
Juan A. Suarez Romero
433a0422d5
v3dv: don't leak cache key
...
The hashtable stores a hash generated from the key, so there is no need
to duplicate the key, as otherwise it is a leak.
Found through address sanitizer.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30204 >
2024-07-18 11:49:07 +00:00
Bas Nieuwenhuizen
6be7e25256
relnotes: Add an entry about the new cache default.
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22339 >
2024-07-18 10:56:07 +00:00
Bas Nieuwenhuizen
87a25adf08
util/cache_test: Add tests for old cache deletion.
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22339 >
2024-07-18 10:56:07 +00:00
Bas Nieuwenhuizen
c3bc6991d2
util/disk_cache: Delete the old multifile cache if using the default.
...
Only after 7 days so people who switch all the time aren't impacted.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22339 >
2024-07-18 10:56:07 +00:00
Daniel Schürmann
bd4fbdf510
util/disk_cache: enable Mesa-DB disk cache by default
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22339 >
2024-07-18 10:56:07 +00:00
Georg Lehmann
5e8bb93ea3
aco: micro optimize VALU fquantize2f16
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:15 +00:00
Georg Lehmann
5b4fcfd638
aco/gfx11.5: select SALU fquantize2f16
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:15 +00:00
Georg Lehmann
2549bc2f9e
aco/gfx11.5: select SALU fneg/fabs
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:15 +00:00
Georg Lehmann
284b9965e8
aco/gfx11.5+: allow sgpr dst for trans ops and use pseudo scalar ops on gfx12
...
Also optimize the denorm scaling path by only emitting the expensive trans op once
and allowing fma for the final muliplication.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:15 +00:00
Georg Lehmann
314053a3e3
aco/gfx11.5: select SALU fsign
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:15 +00:00
Georg Lehmann
b1b5a0c6ad
aco/gfx11.5: select SALU fsat
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:15 +00:00
Georg Lehmann
ee0e183700
aco/gfx11.5: select SOPC float instructions
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:15 +00:00
Georg Lehmann
4bd229ac50
aco/gfx11.5: select SOP2 float instructions
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:14 +00:00
Georg Lehmann
6affd916b5
aco/gfx11.5: fix s_fmac acc to definition
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:14 +00:00
Georg Lehmann
a90d4d340c
aco/gfx11.5: select SALU float conversions
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:14 +00:00
Georg Lehmann
4399c7bac3
aco: add aco_opcode::p_s_cvt_f16_f32_rtne
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:14 +00:00
Georg Lehmann
1efb7754fc
aco/gfx11.5: select s_(ceil|floor|trunc|rndne)
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:14 +00:00
Georg Lehmann
33a719b3e2
aco/gfx11.5: select s_cvt_[ui]32_f32
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:14 +00:00
Georg Lehmann
343420fd4e
aco/gfx12: don't allow vgpr operands for pseudo scalar
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:14 +00:00
Georg Lehmann
d58d0274a8
aco/gfx12: use trans s_delay_alu for pseudo scalar
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245 >
2024-07-18 08:36:14 +00:00
Kenneth Graunke
534f0019d7
intel/brw: Don't mix types for unary extended math instructions
...
We were generating odd instructions like:
math inv(8) g93<1>HF g85<8,8,1>HF null<8,8,1>F { align1 1Q @7 $4 };
It's unclear whether the type of the null operand matters, but sometimes
these things don't get ignored properly. Out of caution, retype the
null source to match the actual operand's type. It'll at least look
less surprising in assembly dumps.
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30193 >
2024-07-18 03:25:06 +00:00
Faith Ekstrand
452fed5203
nak: Run copy-prop again after opt_prmt and opt_lop
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30230 >
2024-07-18 01:48:51 +00:00
Faith Ekstrand
842bde8694
nak: Add a pass macro for more consistent debug printing
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30230 >
2024-07-18 01:48:51 +00:00
Faith Ekstrand
aed223ca89
nak: Optimize nested OpPrmt
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30230 >
2024-07-18 01:48:51 +00:00
Faith Ekstrand
b96d2d4351
nak: Add some helpers for working with OpPrmt selectors
...
We had some helpers for this at one point but the old ones were super
clunky and didn't really do what we wanted so they were removed.
However, we have a lot of manual banging in opt_copy_prop and we're
about to add more. These new helpers will make it all a lot safer.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30230 >
2024-07-18 01:48:51 +00:00
Icenowy Zheng
7e3106fa6f
gallivm: orcjit: use a mutex to protect symbol looking up
...
When a symbol is looked up for the first time, the associated function
is built, and the building process seems to be not thread-safe.
Use a mutex to protect the symbol looking up process, which should be
serialized when the function is not built, and fast when the function is
built.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me >
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30217 >
2024-07-18 00:59:30 +00:00
Adam Jackson
d709b42180
dri: Let dril handle the DRI driver link farm
...
xserver's loader will look for drivers this way, but there's no reason
we need to keep hurting ourselves like that.
Co-authored-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28378 >
2024-07-17 23:47:05 +00:00
Adam Jackson
3de62b2f9a
gallium/dril: Compatibility stub for the legacy DRI loader interface
...
This provides just enough of a "DRI driver" for non-glamor-using
xservers to initialize GLX and enable direct clients. We build it if you
build DRI support for GLX, or if you build any X11 client support for
EGL. We only build it at this point, we'll swap it into the install
next.
Co-authored-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Co-authored-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28378 >
2024-07-17 23:47:05 +00:00
Adam Jackson
91e1ea52c9
mesa_interface: Move out of GL/internal/
...
Move it into src/gallium/include/ to make it absolutely clear this is a Mesa detail.
While we're at it, clean up its include sites, including some places
where we can just include kopper_interface.h instead since it includes
mesa_interface.h as its first act.
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28378 >
2024-07-17 23:47:05 +00:00
Adam Jackson
de41fda2f5
mesa_interface: Set ourselves free
...
Paste in a copy of dri_interface.h so we can freely modify our internals
without breaking Xorg compatibility.
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28378 >
2024-07-17 23:47:05 +00:00
Adam Jackson
6be17e222d
treewide: Include mesa_interface.h not dri_interface.h
...
We're about to split the latter off as a compatibility detail for older
versions of Xorg, and the former includes the latter at this point, so
this should be just to prove no functional change.
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28378 >
2024-07-17 23:47:04 +00:00
Adam Jackson
3c48fd8a6d
gallium: Rename ${target}/target.c to ${target}/{$target}_target.c
...
This is one of the few places in Mesa where filenames collide this much
and it's Super Annoying.
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28378 >
2024-07-17 23:47:04 +00:00
Iván Briano
c8d64860ec
anv: set MOCS for protected memory when needed
...
We were missing setting the EncryptedData bit in the MOCS field when
emitting the surface states for protected buffer/images. How this works
on ADL remains a mystery to me.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11313
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30097 >
2024-07-17 22:56:51 +00:00
Iván Briano
ece7abb599
anv: get scratch surface from the correct pool
...
Fixes: 3ccf80f9b1 ("anv: prepare 2 variants of all shader instructions")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30097 >
2024-07-17 22:56:51 +00:00
Karol Herbst
bcc79499fa
rusticl/queue: format file
...
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30215 >
2024-07-17 22:39:22 +00:00
Karol Herbst
00540594df
rusticl/event: fix outdated comment in call
...
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30215 >
2024-07-17 22:39:22 +00:00
Karol Herbst
38e15037f4
rusticl/mesa: set take_ownership to true in set_constant_buffer_stream
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11485
Fixes: 8da8c6c2d8 ("rusticl: use stream uploader for cb0 if prefered")
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30215 >
2024-07-17 22:39:22 +00:00
Karol Herbst
17b66799b6
rusticl/mesa: handle failures with u_upload_data
...
It can fail to allocate in which case we should return an error instead of
continuing.
Fixes: 8da8c6c2d8 ("rusticl: use stream uploader for cb0 if prefered")
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30215 >
2024-07-17 22:39:22 +00:00
Karol Herbst
8a77488c9c
rusticl/event: return execution errors when doing a blocking enqueue
...
Cc: mesa-stable
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30215 >
2024-07-17 22:39:22 +00:00
Karol Herbst
f4bf6f26a9
rusticl/queue: properly implement in-order queue error checking
...
Cc: mesa-stable
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30215 >
2024-07-17 22:39:21 +00:00
Karol Herbst
3684912e3f
rusticl/event: properly implement CL_EXEC_STATUS_ERROR_FOR_EVENTS_IN_WAIT_LIST
...
The current approach doesn't take into account when a dependency failed
executing, so we'd miss out of resource errors and the likes.
Cc: mesa-stable
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30215 >
2024-07-17 22:39:21 +00:00
Karol Herbst
8a5ef4411b
rusticl/queue: properly check all dependencies for an error status
...
Cc: mesa-stable
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30215 >
2024-07-17 22:39:21 +00:00
Karol Herbst
25dedee67d
rusticl/queue: do not overwrite event error states
...
Cc: mesa-stable
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30215 >
2024-07-17 22:39:21 +00:00
Karol Herbst
d2d3f8e446
rusticl/event: make set_status handle error status properly
...
Event::set_status only called the cbs for the passed in status, but we
need it to call all cbs up to the passed in status. This simplifies error
handling.
Cc: mesa-stable
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30215 >
2024-07-17 22:39:21 +00:00
Samuel Pitoiset
5072848a2f
radv/meta: remove useless memset when destroying DCC retile state
...
There should be only one finish call.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:33 +00:00
Samuel Pitoiset
602bdda3a5
radv/meta: rework creating DCC retile pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:33 +00:00
Samuel Pitoiset
176befe439
radv/meta: fix potential memleak when creating DCC retile pipelines
...
If the driver needs to create two different DCC retile pipelines which
is based on the image swizzle, it will just overwrite the existing
layouts.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:33 +00:00
Samuel Pitoiset
8e53114de3
radv/meta: fix potential race condition when creating DCC retile pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:33 +00:00
Samuel Pitoiset
0906b64724
radv/meta: rework creating copy expand pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:33 +00:00
Samuel Pitoiset
67d720d115
radv/meta: create fmask copy layouts regardless on-demand
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:33 +00:00
Samuel Pitoiset
ee1bc2e821
radv/meta: rework creating FMASK expand pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:33 +00:00
Samuel Pitoiset
f1ec223cd2
radv/meta: create fmask expand layouts regardless on-demand
...
To be consistent with other meta operations.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:33 +00:00
Samuel Pitoiset
4bef832b10
radv/meta: rework creating blit pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:33 +00:00
Samuel Pitoiset
ad82a338b3
radv/meta: cleanup meta_emit_blit()
...
Passing the image and the image view is useless.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:33 +00:00
Samuel Pitoiset
89dc316720
radv/meta: move the locking around creating blit pipelines
...
Only the on-demand path needs to be locked.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:33 +00:00
Samuel Pitoiset
e8683cae01
radv/meta: cleanup radv_device_init_meta_blit_{color,depth,stencil]()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Samuel Pitoiset
20be729636
radv/meta: create the fill/copy pipelines on-demand
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Samuel Pitoiset
c57987afc7
radv/meta: separate creating the fill/copy pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Samuel Pitoiset
5f2cbc3ab9
radv/meta: cleanup creating the compute depth decompress pipeline
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Samuel Pitoiset
b3d9afe44d
radv/meta: create the compute depth decompress pipeline on-demand
...
It was always compiled when the device is created.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Samuel Pitoiset
f3e7c7e19f
radv/meta: rework creating the gfx depth decompress pipeline
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Samuel Pitoiset
b54dc6a29a
radv/meta: remove unused parameter to radv_get_depth_pipeline()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Samuel Pitoiset
38567300d4
radv/meta: move locking around the gfx depth decompress pipeline
...
Locking is only needed when the pipeline is created on-demand, so move
that to the caller.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Samuel Pitoiset
7c94ed0394
radv/meta: avoid potential NULL deref with the gfx depth decompress pipeline
...
If the pipeline failed to be created.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Samuel Pitoiset
9c1fa23adf
radv/meta: remove the depth resummarize operation
...
This has never been used and if we need at some point, we can just
re-introduce it.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Samuel Pitoiset
76bf65b613
radv/meta: rework creating the VRS copy HTILE pipeline
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Samuel Pitoiset
f5c743e9e9
radv/meta: fix potential race condition when creating the copy VRS pipeline
...
This could lead to a race condtion if two command buffers are recorded
at the same time because it's accessing the device meta state.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233 >
2024-07-17 21:55:32 +00:00
Mike Blumenkrantz
f24742e8dc
winsys/radeon: revert recent changes
...
This reverts commit f673e2bf68 .
This reverts commit 216ff9591b .
This reverts commit ec2451fcb3 .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30228 >
2024-07-17 18:48:11 +00:00
Vinson Lee
cc9503206e
panvk: Fix assert
...
Fix defect reported by Coverity Scan.
Assign instead of compare (PW.ASSIGN_WHERE_COMPARE_MEANT)
assign_where_compare_meant: use of "=" where "==" may have been intended
Fixes: 0e74b6eda9 ("panvk: Add support for layered rendering")
Signed-off-by: Vinson Lee <vlee@freedesktop.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30181 >
2024-07-17 18:27:50 +00:00
José Roberto de Souza
0500e35165
intel/dev: Drop writeback_incoherent from Xe2
...
Xe2 platforms are only supported by Xe KMD that do not support
CPU WB + 0 way coherent.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29950 >
2024-07-17 17:41:32 +00:00
José Roberto de Souza
6d77dfa75d
intel/dev: Use GPU WB PAT for Xe2 writecombining
...
So for this entry we want the CPU mapping to be WC but GPU caches
can be WB.
This way GPU don't need to snoop to CPU caches and at the end of
workloads L3 cache is flushed, so CPU access is coherent after get
the signal that workload was finished.
With this the transient(XD) L3 flushes will only affect displayable
buffers.
Ref: Bspec 71582 (r59285)
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29950 >
2024-07-17 17:41:32 +00:00
José Roberto de Souza
48da8eab55
intel/dev: Add comment documenting the PAT entries
...
Like said in the past patch, coherency is not needed and there
was a miss understating about caching used by CPU and GPU.
With this new comment it much better explained.
Ref: Bspec 45101 (r51017)
Ref: Bspec 71582 (r59285)
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29950 >
2024-07-17 17:41:32 +00:00
José Roberto de Souza
7295e09b53
intel/dev: Drop coherency from intel_device_info_pat_entry
...
It is not used in run-time so we can drop from the struct.
It might have value as PAT entries documentation but that will be done
in the next patch.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29950 >
2024-07-17 17:41:32 +00:00
José Roberto de Souza
fa1129540a
intel/dev: Add documentation about intel_device_info_pat_entry::mmap
...
My initial understating was that L3_CACHE_POLICY would be the CPU
caching mode but that has nothing to do with CPU caching, it is the
GPU caching mode.
Due this miss understating we were using a not optimal PAT index that
will be fixed in the next patches, so to avoid such issues in future
adding comments to intel_device_info_pat_entry struct.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29950 >
2024-07-17 17:41:32 +00:00
José Roberto de Souza
4173e0f910
intel/dev: Drop DG1 PAT entries
...
It inherents that table from TGL.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29950 >
2024-07-17 17:41:32 +00:00
José Roberto de Souza
178950bf9b
anv: Fix return of PAT index for compressed bos for discrete GPUs
...
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29950 >
2024-07-17 17:41:32 +00:00
Eric Engestrom
ad96a99385
docs: add sha256sum for 24.1.4
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30226 >
2024-07-17 17:34:13 +00:00
Eric Engestrom
096548bbe9
docs: update calendar for 24.1.4
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30226 >
2024-07-17 17:34:13 +00:00
Eric Engestrom
cc078c2dcf
docs: add release notes for 24.1.4
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30226 >
2024-07-17 17:34:13 +00:00
Samuel Pitoiset
619bcd3b5c
radv: allow to capture with RGP on GFX11_5
...
It works fine.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30225 >
2024-07-17 16:25:19 +00:00
Samuel Pitoiset
e2882ea3e2
ac/rgp: assume GFX11_5 use the same SQTT/RGP versions as GFX11
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30225 >
2024-07-17 16:25:19 +00:00
Samuel Pitoiset
664a31bcd1
radv: disable SPM trace on GFX11_5
...
SPM needs performance counters and they aren't exposed yet.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30225 >
2024-07-17 16:25:19 +00:00
Samuel Pitoiset
057c4e3786
radv: expose BufferFloat32AtomicMinMax on GFX11_5
...
This is supported like GFX11.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30225 >
2024-07-17 16:25:19 +00:00
Samuel Pitoiset
d2ae0c9ef8
radv: fix programming DB_RENDER_CONTROL for NULL depth/stencil on GFX11_5
...
It should be programmed like GFX11.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30225 >
2024-07-17 16:25:19 +00:00
Samuel Pitoiset
1c5779250b
radv: do not expose ImageFloat32AtomicMinMax on GFX11_5
...
These opcodes aren't supported on GFX11-11.5.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30225 >
2024-07-17 16:25:19 +00:00
Georg Lehmann
eff0998064
radv: use radv_nir_opt_tid_function to create inverse_ballot
...
Foz-DB Navi21:
Totals from 542 (0.68% of 79395) affected shaders:
Instrs: 617316 -> 616259 (-0.17%); split: -0.19%, +0.02%
CodeSize: 3347852 -> 3320040 (-0.83%); split: -0.85%, +0.02%
VGPRs: 21864 -> 21824 (-0.18%); split: -0.29%, +0.11%
SpillSGPRs: 207 -> 199 (-3.86%)
Latency: 4900847 -> 4895665 (-0.11%); split: -0.11%, +0.01%
InvThroughput: 860278 -> 857272 (-0.35%); split: -0.35%, +0.00%
SClause: 21251 -> 21169 (-0.39%); split: -0.40%, +0.01%
Copies: 57759 -> 58881 (+1.94%); split: -0.06%, +2.00%
Branches: 20854 -> 20365 (-2.34%); split: -2.36%, +0.01%
PreSGPRs: 20785 -> 20774 (-0.05%)
PreVGPRs: 17309 -> 17212 (-0.56%)
VALU: 379885 -> 378180 (-0.45%); split: -0.45%, +0.00%
SALU: 87522 -> 88664 (+1.30%); split: -0.02%, +1.32%
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24650 >
2024-07-17 15:04:38 +00:00
Georg Lehmann
39de178656
radv: use radv_nir_opt_tid_function for shuffles
...
The main motivation were open coded clustered inclusive scans
and clustered broadcasts in the gdeflate decompression shader used by
DirectStorage.
Foz-DB Navi21 (only the_last_of_us_part1 is affected):
Totals from 8 (0.01% of 79395) affected shaders:
Instrs: 6230 -> 5438 (-12.71%)
CodeSize: 33376 -> 29148 (-12.67%)
Latency: 77017 -> 72917 (-5.32%)
InvThroughput: 10190 -> 9280 (-8.93%)
Copies: 566 -> 569 (+0.53%)
PreSGPRs: 528 -> 524 (-0.76%)
PreVGPRs: 232 -> 230 (-0.86%)
VALU: 2889 -> 2616 (-9.45%)
SALU: 1748 -> 1491 (-14.70%); split: -14.82%, +0.11%
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24650 >
2024-07-17 15:04:38 +00:00
Georg Lehmann
ca88783318
radv/nir: add a pass to optimize shuffle/booleans dependent only on tid/consts
...
This pass uses constant folding to determine which invocation is read by shuffle
for each invocation. Then, it detects patterns in the result and uses more
a specialized intrinsic if possible.
For booleans it creates inverse_ballot.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24650 >
2024-07-17 15:04:38 +00:00
Georg Lehmann
2d3f536174
aco,nir: add dpp16_shift_amd intrinsic
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24650 >
2024-07-17 15:04:38 +00:00
Faith Ekstrand
1f430b1111
nak/nir: Make interpolate_at_sample more efficient
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30218 >
2024-07-17 13:38:24 +00:00
Faith Ekstrand
24d5acf052
nak/nir: Use prmt for barycentric offset lowering
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30218 >
2024-07-17 13:38:24 +00:00
Faith Ekstrand
fffbd3ff2b
nak/nir: Use prmt in texture lowering
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30218 >
2024-07-17 13:38:24 +00:00
Faith Ekstrand
bbccbd8d50
nir,nak: Add a nir_op_prmt_nv
...
We have this in hardware since forever and it's really useful. May as
well add it to NIR so we can use it in various lowerings.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30218 >
2024-07-17 13:38:24 +00:00
Faith Ekstrand
3619ec9630
nak: Don't print the destination of OpIpa twice
...
While we're here, also implement Display for InterpFreq and InterpLoc
and simplify printing a bit.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30218 >
2024-07-17 13:38:24 +00:00
Faith Ekstrand
ef88597ebb
nak/copy_prop: Ignore the top 16 bits of OpPrmt::sel
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30218 >
2024-07-17 13:38:24 +00:00
Faith Ekstrand
f949c00170
nak/copy_prop: Propagate OpSel with a selector of SrcRef::Zero
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30218 >
2024-07-17 13:38:24 +00:00
Faith Ekstrand
cc33cafcac
nak/nir: Use an indirect load for sample locations
...
A single ldc is probably more efficient than a 64-bit load and the pile
of math we were generating before. The only reason for the old method
was that it let us avoid indirect cbuf loads because we didn't support
them for a while. Now that we can support all cbuf loads, we can just
do an indirect 1B load and call it good.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30218 >
2024-07-17 13:38:24 +00:00
Mike Blumenkrantz
f673e2bf68
winsys/radeon: switch to rendernode when card node doesn't work
...
initializing the winsys from a /dev/dri/cardX node (as discovered by
gbm) doesn't work, as the kernel abi expects a render node
thus, the winsys needs to open the card's rendernode and use that
everywhere except when importing buffers, where it has to explicitly
export from the card node and import to the rendernode
Acked-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30224 >
2024-07-17 13:20:48 +00:00
Mike Blumenkrantz
216ff9591b
winsys/radeon: wrap fd access with util function
...
no functional changes
Acked-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30224 >
2024-07-17 13:20:48 +00:00
Mike Blumenkrantz
ec2451fcb3
winsys/radeon: take the full winsys struct in radeon_get_drm_value()
...
Acked-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30224 >
2024-07-17 13:20:48 +00:00
Mary Guillemard
10d9bc3a2c
panfrost: Fetch available system memory
...
This reproduces panvk logic of showing how much memory is available
while taking into account the address space limits we have.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30088 >
2024-07-17 12:04:11 +00:00
Mary Guillemard
02e38664f3
panfrost: Increase address space to 48-bit
...
Valhall can allow up to 48-bit of address space, we should reflect this
here to allow more memory to be mapped in the same address space when
possible.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30088 >
2024-07-17 12:04:11 +00:00
Mary Guillemard
04685e732e
panfrost: Do not recreate bo if already mapped
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30088 >
2024-07-17 12:04:11 +00:00
Mary Guillemard
3f2793ee10
panfrost: Rewrite set_global_binding to make resources truly global
...
Before this, CL buffers would not be attached to subsequent batches.
This fix spurious fails when running OpenCL CTS test_basic astype and
likely others.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30088 >
2024-07-17 12:04:11 +00:00
Mary Guillemard
801922cbe6
bi: Implement basic 8-bit vec support
...
Not the most efficient approach but functional.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Rebecca Mckeever <rebecca.mckeever@collabora.com >
Reviewed by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30088 >
2024-07-17 12:04:11 +00:00
Mary Guillemard
368100d71c
bi: Enable lower_pack pass in compiler
...
Required for OpenCL
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30088 >
2024-07-17 12:04:11 +00:00
Mary Guillemard
5420b73925
bi: Lower pack_32_4x8_split and pack_32_2x16_split in algebraic
...
Required for OpenCL.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30088 >
2024-07-17 12:04:10 +00:00
Mary Guillemard
32ef369322
bi: Enable lower_pack_64_4x16
...
Required for OpenCL.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30088 >
2024-07-17 12:04:10 +00:00
Mary Guillemard
02cea97629
bi: Clean up mem_access_size_align_cb
...
Also ensure that we never emit vector with more than 4 components.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30088 >
2024-07-17 12:04:10 +00:00
Mary Guillemard
660218529c
rusticl: Add panthor when panfrost is present in RUSTICL_ENABLE
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed by: Eric R. Smith <eric.smith@collabora.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30088 >
2024-07-17 12:04:10 +00:00
Eric Engestrom
e565873911
features.txt: specify that GL_ARB_depth_clamp is only supported on v3d/vc7+
...
Fixes: cbd3927445 ("v3d: expose ARB_depth_clamp in V3D 7.x")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30185 >
2024-07-17 11:58:21 +00:00
Eric Engestrom
4e9c16b035
features.txt: specify that VK_EXT_depth_clip_enable is only supported on v3dv/vc7+
...
Fixes: 16f6f50ce4 ("v3dv: expose VK_EXT_depth_clip_enable")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30185 >
2024-07-17 11:58:21 +00:00
Eric Engestrom
f5a93fa83b
features.txt: specify that VK_EXT_depth_clamp_zero_one is only supported on v3dv/vc7+
...
Fixes: f8623ea7da ("v3dv: adversise VK_EXT_depth_clamp_zero_one")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30185 >
2024-07-17 11:58:21 +00:00
Sergi Blanch Torne
e6de8e2533
ci: fix run_n_monitor single execution
...
When there is a single job as a target and, when it is triggered, it takes
more than one loop time in pending status, it confuses the script to fall in
a wrong return of the pipeline monitoring.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11517
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30219 >
2024-07-17 11:25:50 +00:00
Marek Olšák
15461dc62f
mesa: switch ID allocation to util_idalloc_sparse to reduce virtual memory usage
...
If the max ID was allocated, it caused virtual memory usage to increase
to 512 MB. This commit reduced it to 512 KB.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10968
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30106 >
2024-07-17 10:29:12 +00:00
Marek Olšák
d4085aaf56
util: add util_idalloc_sparse, solving the excessive virtual memory usage
...
The code comment in the header file describes how it works.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30106 >
2024-07-17 10:29:12 +00:00
Marek Olšák
ace7c32333
util: don't use variable names that can appear in args of idalloc foreach macros
...
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30106 >
2024-07-17 10:29:12 +00:00
Marek Olšák
287ed620d0
util: make util_idalloc_exists private
...
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30106 >
2024-07-17 10:29:12 +00:00
Faith Ekstrand
2d260314f1
nvk: Use the page size queried from NVKMD
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30138 >
2024-07-17 08:17:57 +00:00
Faith Ekstrand
68c06558be
nvk: Drop the sparse alignment back down to 4096
...
nouveau uses the OS page size which is almost always 4096. The next
patch will make this properly queried but this version is back-portable.
Fixes: 58181b7bbc ("nvk: Bump the sparse alignment requirement on buffers to 64K")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30138 >
2024-07-17 08:17:57 +00:00
Faith Ekstrand
bccb9fe091
nvk/nvkmd: nouveau uses the OS page size
...
It's the same, regardless of whether the memory comes from VRAM or
system RAM.
Fixes: 7f45d20d2b ("nvk/nvkmd: Be more specific about memory alignments")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30138 >
2024-07-17 08:17:56 +00:00
Iago Toral Quiroga
78c00fbc2c
v3d: rename job->clear to job->clear_tlb
...
This is more specific as to the type of clear it represents.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30205 >
2024-07-17 06:03:12 +00:00
Iago Toral Quiroga
4e19c139de
v3d: skip tlb loads when emitting clears with a draw call
...
We skip loading the tile buffer from memory if the job has flagged
a clear (job->clears) for the buffer, however, this only tracks
clears emitted via the TLB. In some cases we may need to fallback
to clearing with a draw call, in which case we also want to skip
the load.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30205 >
2024-07-17 06:03:12 +00:00
Timothy Arceri
c9f26a9995
glsl: fix cross validate globals
...
We want to skip the validation of compiler added global temps.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30199 >
2024-07-17 05:19:03 +00:00
Timothy Arceri
dde1a69929
glsl: set how_declared to hidden for compiler temps
...
This will be useful for the nir linker that otherwise cant detect these
compiler temps created in glsl ir.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30199 >
2024-07-17 05:19:03 +00:00
Icenowy Zheng
bb0efdd4d8
llvmpipe: add shader cache support for ORCJIT implementation
...
Signed-off-by: Icenowy Zheng <uwu@icenowy.me >
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30036 >
2024-07-17 04:39:19 +00:00
Timothy Arceri
60292b714c
mesa: add unreachable to _mesa_shader_stage_to_subroutine_prefix()
...
All the other subroutine functions in this file use an unreachable for
the equivalent switch.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11425
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30202 >
2024-07-17 02:02:03 +00:00
Paulo Zanoni
22fe73a86a
iris: fix iris_xe_wait_exec_queue_idle() on release builds
...
We need to call iris_wait_syncobj() on both release and debug builds,
so take it out of the assert() call. Only assert the result.
With this patch, gnome-session finally works for me. Also steam.
Fixes: 665d30b544 ("iris: Wait for drm_xe_exec_queue to be idle before destroying it")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30195 >
2024-07-17 01:31:50 +00:00
José Roberto de Souza
4fd7cad05d
intel: Rename XE_PERF to XE_OBSERVATION
...
Xe KMD renamed XE_PERF to XE_OBSERVATION to better match with Intel
specification and avoid confusion.
This uAPI rename will land in the same kernel version that added
the uAPI being renamed.
There is no uAPI change, just renames.
Sync xe_drm.h with 63347fe031e3 ("drm/xe/uapi: Rename xe perf layer as xe observation layer").
Acked-by: Caio Oliveira <caio.oliveira@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30027 >
2024-07-17 01:00:34 +00:00
Lucas Fryzek
40dbb6e8e8
egl/x11: Remove force software check for exporting SBWD
...
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29910 >
2024-07-17 00:20:54 +00:00
Lucas Fryzek
ba1a6a7e38
egl/x11/sw: Implement shm support
...
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29910 >
2024-07-17 00:20:54 +00:00
Lucas Fryzek
71a97b2047
vulkan/wsi: Update sw x11 wsi to only copy damage regions
...
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29910 >
2024-07-17 00:20:54 +00:00
Lucas Fryzek
be050e34a7
egl/x11/sw: Implement swapbuffers with damage
...
Co-authored-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29910 >
2024-07-17 00:20:54 +00:00
Mike Blumenkrantz
fb5afd804e
egl/x11/sw: plug in swap_buffers_with_damage handling
...
just some plumbing
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29910 >
2024-07-17 00:20:54 +00:00
Mike Blumenkrantz
6088a0bf51
egl/x11/sw: fix partial image uploads
...
* swrast allocates images aligned to 64x64 tiles, which results in images
that are larger than the window. PutImage requests must be clamped on
the y-axis to avoid uploading/damaging out-of-bounds regions
* winsys coords are y-inverted
cc: mesa-stable
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29910 >
2024-07-17 00:20:54 +00:00
Caio Oliveira
e3e712e74e
intel/elk: Convert missing uses of ralloc to linear in fs_live_variables
...
And use the non-zeroing variant in cases we are filling the data
immediately.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30201 >
2024-07-16 23:53:45 +00:00
Caio Oliveira
3700e49fff
intel/brw: Convert missing uses of ralloc to linear in fs_live_variables
...
And use the non-zeroing variant in cases we are filling the data
immediately.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30201 >
2024-07-16 23:53:45 +00:00
Samuel Pitoiset
117a93a550
zink/ci: remove redundant arb_shader_image_load_store skips on POLARIS10
...
This subset is already skipped at the end of the file.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30210 >
2024-07-16 23:35:01 +00:00
Samuel Pitoiset
78aab2db80
zink/ci: skip arb_shader_image_load_store also on NAVI31/VANGOGH
...
This subset hangs the GPU on NAVI10/POLARIS10 and I got a hang locally
on VANGOGH.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30210 >
2024-07-16 23:35:01 +00:00
Alyssa Rosenzweig
6690343e10
zink: match shader-db report.py format
...
this way we can use shader-db report.py to analyze shader-db changes for zink
with the vk driver of our choosing. requires corresponding report.py relaxations
to be useful, the idea was to change zink a bit and change report.py a bit and
meet in the middle with something useful for arbitrary vulkan drivers.
the output isn't too pretty but it works,
synthetic example on nvk:
Instruction count HURT: shaders/glmark/1-1.shader_test vertex: 42 -> 43 (2.38%)
total Instruction count in shared programs: 7135 -> 7136 (0.01%)
Instruction count in affected programs: 42 -> 43 (2.38%)
helped: 0
HURT: 1
total Code Size in shared programs: 114160 -> 114160 (0.00%)
Code Size in affected programs: 0 -> 0
helped: 0
HURT: 0
total Number of GPRs in shared programs: 2677 -> 2677 (0.00%)
Number of GPRs in affected programs: 0 -> 0
helped: 0
HURT: 0
total SLM Size in shared programs: 0 -> 0
SLM Size in affected programs: 0 -> 0
helped: 0
HURT: 0
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30194 >
2024-07-16 22:57:01 +00:00
Alyssa Rosenzweig
d45e2f3f15
zink: remove extraneous \n with shaderdb
...
the newline is implicit for util debug messages. this fixes shaderdb output
being half blank lines and brings zink in line with hardware mesa drivers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30194 >
2024-07-16 22:57:01 +00:00
David (Ming Qiang) Wu
8177a4f72a
radeonsi/vcn: support DPB_MAX_RES on VCN5
...
Use common db_alignment to calculate dpb_size for DPB_MAX_RES,
DPB_DYNAMIC_TIER_1 and DPB_DYNAMIC_TIER_2. This makes the db_pitch
in sync with all DPB types.
Remove the VCN5 hack of using 256 for H264 as 64 works.
Remove redundant codes for width and height as they were calculated
at the beginning in calc_dpb_size().
Reviewed-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30186 >
2024-07-16 22:26:05 +00:00
David Rosca
e040ee1098
frontends/va: Support frame rate per temporal layer for AV1
...
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30149 >
2024-07-16 22:08:31 +00:00
C Stout
f6099903c1
vulkan/runtime: add spirv_info_h to vulkan_lite_runtime_header_gen_deps
...
spirv_info_h was added to idep_vulkan_lite_runtime_headers but it's also
needed for building libvulkan_lite_runtime. Without this patch, from
a clean meson setup (tested with: -Dvulkan-drivers=freedreno -Dgallium-drivers= -Dplatforms=wayland)
ninja -C build src/vulkan/runtime/libvulkan_lite_runtime.a
In file included from ../src/vulkan/runtime/vk_physical_device.c:24:
../src/vulkan/runtime/vk_physical_device.h:32:10: fatal error: compiler/spirv/spirv_info.h: No such file or directory
Fixes: 1759c0eba7 ("vulkan: add helper to fill out spirv caps automatically")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30189 >
2024-07-16 21:43:13 +00:00
Paulo Zanoni
241585667f
anv: reimplement the anv_fake_nonlocal_memory workaround
...
Commit 94989b45a5 ("anv,driconf: Add fake non device local memory WA
for Total War: Warhammer 3") implemented a workaround to make
Warhammer 3 work on ADL, but the game still doesn't work on LNL, which
uses xe.ko, and MTL, which uses i915.ko: it still fails at launch
claiming it couldn't allocate memory.
So in this implementation, instead of clearing DEVICE_LOCAL_BIT we
just duplicate our memory types, one having the bit and one not
having.
v2:
- Check for VK_MAX_MEMORY_TYPES (José)
- Invert the order of the memory types (José)
- Fix white space issue (José)
v3:
- Comment our non-spec-compliance (José)
- Remove useless lines (José)
Link: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8721
Fixes: 94989b45a5 ("anv,driconf: Add fake non device local memory WA for Total War: Warhammer 3")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30162 >
2024-07-16 20:43:02 +00:00
Collabora's Gfx CI Team
cdf646dbc3
Uprev Piglit to 582f5490a124c27c26d3a452fee03a8c85fa9a5c
...
647d072502...582f5490a1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30167 >
2024-07-16 20:05:32 +00:00
Caio Oliveira
d202f24698
spirv: Don't warn about FPFastMathMode if not OpenCL
...
This decoration can now be used in Vulkan with
VK_KHR_shader_float_controls2.
Acked-by: Iván Briano <ivan.briano@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30191 >
2024-07-16 19:14:21 +00:00
Valentine Burley
b3842f9f41
tu: Don't disable 2 10-bit formats
...
VK_FORMAT_R10X6_UNORM_PACK16 and VK_FORMAT_R10X6G10X6_UNORM_2PACK16
were previously disabled because they were failing some CTS tests.
Re-enable them now as they are no longer causing crashes.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30157 >
2024-07-16 18:51:50 +00:00
Alyssa Rosenzweig
9f1d1c4fc8
nir/opt_constant_folding: fix array size define, pt 2
...
In practice these are equal but the old code was semantically wrong: that
dimension is "sources" not "components". Use the correct #define.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Suggested-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30214 >
2024-07-16 17:38:16 +00:00
Rob Clark
bda47e29de
freedreno/a6xx: Allow blit based transfers
...
Some apps (like firefox and chromium) seem to like to create textures
with internal format GL_RGBA8 but then upload GL_BGRA to them. If the
app were a bit more clever it could hit the memcpy path. But fallback
sw conversion (convert_ubytes()) is slow. If we are going to have to
make this extra copy, do it on the gpu.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Rob Clark
30dbfc87cd
freedreno/a6xx: Add more format swizzles
...
Ass missing R8G8B8X8_SNORM as well as various ABGR and ARGB.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Rob Clark
89dd8d101b
freedreno/a6xx: Skip blitter for L/A conversions
...
The blitter cannot do the needed swizzle gymnastics for blitting to
luminance and/or alpha formats. So fallback to the 3d path.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Rob Clark
3bb393e7b9
freedreno/a6xx: Tweak blitter traces
...
Make things easier to read when there are a lot of blits.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Rob Clark
7e250033ee
freedreno/bc: Rework flush order
...
A sequence like:
1) set_framebuffer_state(A)
2) clears and/or draws
3) set_framebuffer_state(B)
4) context_flush(ASYNC)
would result in the fence for batch B being returned, instead of batch A.
Resulting in a fence that signals too early.
Instead, in context_flush() find the most recently modified batch, so
that in the example above batch A would be flushed.
There is one wrinkle, that we want to avoid a dependency loop. So the
'last_batch' can actually be a batch that depends on the most recently
modified batch. But in either case, the batch that is used for the
returned fence is one that directly or indirectly depends on all other
batches associated with the context.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Rob Clark
57694b8944
freedreno/a6xx: Drop 16b packed image formats
...
See also commit f1c1b9687e ("tu: Do not expose storage image/buffer
features for PACK16 formats")
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Rob Clark
fb9d86299b
freedreno: Use LINEAR for staging resources
...
These are for CPU access, so no point in having additional staging blit
to convert from/to linear. Depth formats are an exception, as normally
they cannot be linear.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Rob Clark
5de33f3d3e
freedreno: Implement stencil blit fallback
...
Now that there is a util_blitter_clear_depth_stencil() helper, we can
use that to implement stencil blits in the fallback path.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Rob Clark
8bc0cb8040
freedreno/a6xx: Implement S8 support
...
Basically z32+s8 mode but without the z32.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Rob Clark
5056f5b69c
u_blitter+d3d12: Move stencil fallback clear to caller
...
The other callers were already doing the prepatory stencil clear before
calling util_blitter_stencil_fallback(). Doing the clear in the driver
avoids recursively entering u_blitter if the driver uses
util_blitter_clear_depth_stencil() to implement ->clear_depth_stencil().
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Rob Clark
9372875222
freedreno: Handle non-null cb with null buffer
...
u_blitter does this to restore constant state, so we need to handle both
cases.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Rob Clark
9123ee0f18
st/mesa/pbo: Set src type on image_store
...
Adreno/ir3 actually needs this information.
Pixes PBO brokenness with freedreno.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30064 >
2024-07-16 17:03:15 +00:00
Alex Deucher
dec4603a21
ac/surface: fix version check for gfx12 DCC
...
It's 58, not 59. The original 58 feature was not
ready so it was dropped.
Fixes: 0bb83a4060 ("ac/surface: finish display DCC for gfx12")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30212 >
2024-07-16 16:33:32 +00:00
Josh Simmons
2b99906e5b
radv: Fix shader mask for SQ_WGP SPM counters
...
Signed-off-by: Josh Simmons <josh@nega.tv >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30200 >
2024-07-16 16:10:11 +00:00
Alyssa Rosenzweig
acb10043cb
nvk: add instruction count exec property
...
useful for shader-db, this isn't as simple as dividing the code size so it's
worth reporting.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: M Henning <drawoc@darkrefraction.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30136 >
2024-07-16 15:13:40 +00:00
Faith Ekstrand
4030447dab
nak: gather instr count explicitly
...
This isn't as simple as dividing so we want a real shader info property for nvk
to consume. Plumb one through.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: M Henning <drawoc@darkrefraction.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30136 >
2024-07-16 15:13:40 +00:00
Alyssa Rosenzweig
67e3b3fbfd
nouveau/drm-shim: set ram_user
...
this is required for nvk to create a heap. fixes zink+nvk+drm-shim:
run: ../src/gallium/drivers/zink/zink_screen.c:3371: zink_internal_create_screen: Assertion `i == ZINK_HEAP_HOST_VISIBLE_COHERENT_CACHED || i == ZINK_HEAP_DEVICE_LOCAL_LAZY || i == ZINK_HEAP_DEVICE_LOCAL_VISIBLE' failed.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: M Henning <drawoc@darkrefraction.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30136 >
2024-07-16 15:13:40 +00:00
Daniel Schürmann
6723128e94
aco/spill: Don't add phi definitions to live-in variables
...
Changes are because we don't add artificial uses to the phi definitions anymore.
Totals from 13 (0.02% of 79395) affected shaders: (GFX10.3)
Instrs: 230510 -> 230285 (-0.10%); split: -0.10%, +0.00%
CodeSize: 1269916 -> 1268760 (-0.09%); split: -0.10%, +0.01%
SpillSGPRs: 2057 -> 2058 (+0.05%)
Latency: 2729731 -> 2723103 (-0.24%)
InvThroughput: 696888 -> 695286 (-0.23%)
VClause: 5795 -> 5768 (-0.47%)
SClause: 6855 -> 6858 (+0.04%)
Copies: 32336 -> 32275 (-0.19%); split: -0.22%, +0.03%
VALU: 151782 -> 151731 (-0.03%); split: -0.04%, +0.01%
SALU: 30766 -> 30758 (-0.03%); split: -0.03%, +0.01%
VMEM: 12157 -> 12078 (-0.65%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30120 >
2024-07-16 14:00:49 +00:00
Daniel Schürmann
bb5af6bede
aco: remove live-out variables from IR
...
Since we changed all passes to use the live-in variables,
these are not needed anymore.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30120 >
2024-07-16 14:00:49 +00:00
Daniel Schürmann
f86816ca85
aco/print_ir: print live-in instead of live-out variables
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30120 >
2024-07-16 14:00:49 +00:00
Daniel Schürmann
043ec096c1
aco/validate: use live-in variables for RA validation
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30120 >
2024-07-16 14:00:49 +00:00
Daniel Schürmann
976dd71942
aco/cssa: use live-in variables instead of live-out variables
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30120 >
2024-07-16 14:00:49 +00:00
Daniel Schürmann
c146d4b6b6
aco/spill: use live-in variables directly rather than computing them
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30120 >
2024-07-16 14:00:49 +00:00
Daniel Schürmann
162876c875
aco/ra: use live-in variables directly rather than computing them
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30120 >
2024-07-16 14:00:49 +00:00
Daniel Schürmann
29262f8cf3
aco: compute live-in variables in addition to live-out variables
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30120 >
2024-07-16 14:00:49 +00:00
Mary Guillemard
9a4a03ec1f
ci/panfrost: Update t760 fails
...
Add a new failure found while running gles job manually
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30150 >
2024-07-16 13:10:56 +00:00
Mary Guillemard
32a4596d17
panfrost: Handle gracefully resource BO alloc failures
...
This makes panfrost_bo_alloc not assert anymore and propagate the
failure again.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30150 >
2024-07-16 13:10:56 +00:00
Mary Guillemard
71a24a0c5e
panfrost: Handle context_init errors correctly
...
This fix OpenCL CTS "multiple_device_context/test_multiples" failures.
Also improve create_context/destroy error management a bit.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30150 >
2024-07-16 13:10:56 +00:00
Mary Guillemard
668bde4421
pan/kmod: Avoid deadlock on VA allocation failure on panthor
...
Fixes: 97f6a62f7e ("pan/kmod: Add a backend for panthor")
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30150 >
2024-07-16 13:10:55 +00:00
Daniel Schürmann
ffef3d1709
nir/opt_sink: ignore loops without backedge
...
Loops without backedge should not be considered loops.
For RADV, 2069 (2.61% of 79395) affected shaders.
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28783 >
2024-07-16 12:29:08 +00:00
Daniel Schürmann
79875737cc
radv: use NIR loop invariant code motion pass
...
Totals from 3469 (4.37% of 79395) affected shaders: (GFX11)
MaxWaves: 78690 -> 78622 (-0.09%); split: +0.03%, -0.11%
Instrs: 11093592 -> 11092346 (-0.01%); split: -0.09%, +0.07%
CodeSize: 57979444 -> 58077232 (+0.17%); split: -0.12%, +0.29%
VGPRs: 257892 -> 258336 (+0.17%); split: -0.08%, +0.25%
SpillSGPRs: 2958 -> 2521 (-14.77%); split: -32.83%, +18.05%
Latency: 135247583 -> 134446992 (-0.59%); split: -0.61%, +0.02%
InvThroughput: 25654328 -> 25478620 (-0.68%); split: -0.73%, +0.05%
VClause: 244799 -> 244499 (-0.12%); split: -0.17%, +0.05%
SClause: 313323 -> 315081 (+0.56%); split: -0.40%, +0.96%
Copies: 835953 -> 842457 (+0.78%); split: -0.38%, +1.15%
Branches: 330136 -> 330210 (+0.02%); split: -0.03%, +0.05%
PreSGPRs: 193374 -> 200277 (+3.57%); split: -0.38%, +3.95%
PreVGPRs: 223947 -> 224227 (+0.13%); split: -0.02%, +0.15%
VALU: 6312413 -> 6314841 (+0.04%); split: -0.02%, +0.06%
SALU: 1222275 -> 1227329 (+0.41%); split: -0.26%, +0.67%
VMEM: 408421 -> 408412 (-0.00%)
SMEM: 430966 -> 430399 (-0.13%)
VOPD: 2482 -> 2440 (-1.69%); split: +0.44%, -2.14%
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28783 >
2024-07-16 12:29:08 +00:00
Daniel Schürmann
540ee1c81a
nir: implement loop invariant code motion (LICM) pass
...
This simple LICM pass hoists all loop-invariant instructions
from the loops' top-level control flow, skipping any nested CF.
The hoisted instructions are placed right before the loop.
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28783 >
2024-07-16 12:29:08 +00:00
Alejandro Piñeiro
e18b54fa5d
drm-shim: stub synobj_timeline_wait and query ioctl
...
Needed to avoid unhandled code DRM ioctl errors on some platforms when
using shader-db.
Reviewed-by: Eric Engestrom <eric@igalia.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30184 >
2024-07-16 11:17:59 +02:00
Dave Airlie
814a2da2f4
radv/video: advertise mutable/extended for dst video images.
...
This allows zink video to create planar image views if needed.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30203 >
2024-07-16 07:04:15 +00:00
Samuel Pitoiset
8863704c6b
radv/meta: add a helper to create descriptor set layout
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30187 >
2024-07-16 06:17:07 +00:00
Samuel Pitoiset
3d322b787e
radv/meta: add a helper to create pipeline layout
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30187 >
2024-07-16 06:17:07 +00:00
Samuel Pitoiset
c6a626e000
radv/meta: add a helper to create compute pipeline
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30187 >
2024-07-16 06:17:07 +00:00
Samuel Pitoiset
bf3b2d2912
radv/meta: remove useless checks for NULL handles before destroying
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30187 >
2024-07-16 06:17:07 +00:00
Samuel Pitoiset
4deb138e7d
radv/meta: remove unused number of rectangles for internal operations
...
It was always 1.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30187 >
2024-07-16 06:17:07 +00:00
Samuel Pitoiset
ecd3bbf826
radv/meta: remove redundant check for hw resolve pipelines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30187 >
2024-07-16 06:17:07 +00:00
Samuel Pitoiset
76e4edefbf
radv/meta: remove unnecessary blit2d_dst_temps struct
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30187 >
2024-07-16 06:17:07 +00:00
Samuel Pitoiset
e739d0e5bb
radv/meta: remove non-valuable comments
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30187 >
2024-07-16 06:17:07 +00:00
Yukari Chiba
6f02ec5ed1
llvmpipe: add an implementation with llvm orcjit
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26018 >
2024-07-16 12:22:29 +10:00
Yukari Chiba
0b69b8d0db
llvmpipe/tests: add a new test for multiple symbols for orc jit testing
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26018 >
2024-07-16 11:31:24 +10:00
Yukari Chiba
ba283c0d84
llvmpipe: add function name to gallivm_jit_function
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26018 >
2024-07-16 11:31:24 +10:00
Yukari Chiba
28530c3eaa
gallivm: add riscv support to the mattrs setting code
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26018 >
2024-07-16 09:41:41 +10:00
Yukari Chiba
465510a211
util: detect RISC-V architecture
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26018 >
2024-07-16 09:41:28 +10:00
Doug Brown
60488d6213
xa: add missing stride setup in renderer_draw_yuv
...
This fixes a problem observed in VMware VMs where Xv playback results in
a black screen instead of the actual video.
Signed-off-by: Doug Brown <doug@schmorgal.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11490
Fixes: 7672545223 ("gallium: move vertex stride to CSO")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30116 >
2024-07-15 20:54:43 +00:00
Josh Simmons
1ced840632
radv: Add RADV_PROFILE_PSTATE envvar
...
Enable selecting the specific pstate to enter when using thread tracing
and when acquiring the profiling lock for performance queries.
Signed-off-by: Josh Simmons <josh@nega.tv >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30139 >
2024-07-15 20:32:01 +00:00
Alyssa Rosenzweig
bda1de89db
asahi: eliminate load_num_workgroups from TCS unrolled ID
...
honeykrisp doesn't want to implement this sysval, we don't need it here.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30051 >
2024-07-15 20:09:00 +00:00
Alyssa Rosenzweig
ae769727d8
libagx: handle VS/IA pipeline stats on GPU
...
This was an obnoxious bit of cheating we had in the gl4.6 driver that I added
literally the morning I passed gl4.6 cts, just to fix my last gl4.6 cts test.
It had an expiration date.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30051 >
2024-07-15 20:09:00 +00:00
Alyssa Rosenzweig
1fbf2002e3
asahi: handle CS pipeline stat with indirect dispatch
...
no more stall here.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30051 >
2024-07-15 20:09:00 +00:00
Alyssa Rosenzweig
bc4d38d4ed
libagx: add kernel for incrementing CS counter
...
for indirect dispatch
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30051 >
2024-07-15 20:09:00 +00:00
Alyssa Rosenzweig
d26ae4f455
asahi,libagx: tessellate on device
...
Add OpenCL kernels implementing the tessellation algorithm on device. This is an
OpenCL C port of the D3D11 reference tessellator, originally written by
Microsoft in C++. There are significant differences compared to the CPU based
reference implementation:
* significant simplifications and clean up. The reference code did a lot of
things in weird ways that would be inefficient on the GPU. I did a *lot* of
work here to get good AGX assembly generated for the tessellation kernels ...
the first attempts were quite bad! Notably, everything is carefully written to
ensure that all private memory access is optimized out in NIR; the resulting
kernels do not use scratch and do not spill on G13.
* prefix sum variants. To implement geom+tess efficiently, we need to first
calculate the count of indices generated by the tessellator, then prefix sum
that, then tessellate using the prefix sum results writing into 1 large index
buffer for a single indirect draw. This isn't too bad, we already have most of
the logic and the guts of the prefix sum kernel is shared with geometry
shaders.
* VDM generation variant. To implement tess alone, it's fastest to generate a
hardware Index List word for each patch, adding an appropriate 32-bit index
bias to the dynamically allocated U16 index buffers. Then from the CPU, we
have the illusion of a single draw to Stream Link with Return to. This
requires packing hardware control words from the tessellator kernel.
Fortunately, we have GenXML available so we just use agx_pack like we would in
the driver.
Along the way, we pick up indirect tess support (this follows on naturally),
which gets rid of the other bit of tessellation-related cheating. Implementing
this requires reworking our internal agx_launch data structures, but that has
the nice side effect of speeding up GS invocations too (by fixing the workgroup
size).
Don't get me wrong. tessellator.cl is the single most unhinged file of my
career, featuring GenXML-based pack macros fed by dynamic memory allocation fed
by the inscrutable tessellation algorithm.
But it works *really* well.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30051 >
2024-07-15 20:09:00 +00:00
Alyssa Rosenzweig
cc9b815efa
libagx: specify heap size explicitly
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30051 >
2024-07-15 20:09:00 +00:00
Alyssa Rosenzweig
a82c0211e7
asahi: tuck in null query check
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30051 >
2024-07-15 20:09:00 +00:00
Alyssa Rosenzweig
bce466586e
asahi: make agx_pack opencl compatible
...
we don't want generic pointers here to keep things happy. also rename
CONSTANT to avoid collisions
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30051 >
2024-07-15 20:09:00 +00:00
Alyssa Rosenzweig
9624b86af0
asahi: drop stale comment
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30051 >
2024-07-15 20:08:59 +00:00
Alyssa Rosenzweig
1d4f0d3002
asahi: drop old comment
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30051 >
2024-07-15 20:08:59 +00:00
Alyssa Rosenzweig
e8b673a109
agx: do not flush denorms for fp16 fmin/fmax
...
total instructions in shared programs: 2164639 -> 2158940 (-0.26%)
instructions in affected programs: 319475 -> 313776 (-1.78%)
helped: 1200
HURT: 6
Instructions are helped.
total alu in shared programs: 1690198 -> 1684653 (-0.33%)
alu in affected programs: 272173 -> 266628 (-2.04%)
helped: 1181
HURT: 6
Alu are helped.
total fscib in shared programs: 1686497 -> 1680797 (-0.34%)
fscib in affected programs: 272922 -> 267222 (-2.09%)
helped: 1200
HURT: 6
Fscib are helped.
total bytes in shared programs: 14334550 -> 14300314 (-0.24%)
bytes in affected programs: 2075546 -> 2041310 (-1.65%)
helped: 1200
HURT: 6
Bytes are helped.
total regs in shared programs: 662332 -> 662302 (<.01%)
regs in affected programs: 1103 -> 1073 (-2.72%)
helped: 14
HURT: 15
Inconclusive result (value mean confidence interval includes 0).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:29:00 +00:00
Alyssa Rosenzweig
6ac289dade
agx: set lower_fminmax_signed_zero
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:29:00 +00:00
Alyssa Rosenzweig
d238d766c6
nir: add lower_fminmax_signed_zero
...
This implements IEEE-754-2019 signed zero semantics for fmin/fmax, as now
required by NIR, for hardware that has busted signed zero behaviour for
fmin/fmax. Ian expressed interest in this for Intel.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:29:00 +00:00
Alyssa Rosenzweig
0e46f7b39a
nir/lower_alu: remove dead #define
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:29:00 +00:00
Alyssa Rosenzweig
4ab3d95c11
nir/lower_double_ops: handle signed zero with min/max
...
Ensure the following identities hold to match IEEE-754-2019 and upcoming NIR:
min(-0, +0) = -0
min(+0, -0) = -0
max(-0, +0) = +0
max(+0, -0) = +0
NVK uses this lowering. In a simple compute shader using fmin64 on an SSBO with
signed zero preserve required, testing the effect of this patch, the instruction
count goes from 47->52. Obviously I'm not thrilled by that but I also couldn't
find any obvious way of mitigating the issue. (Maybe NVIDIA has special hardware
support here. By instruction count, lowering all the way to int64 is a loss,
though I don't know how to count cycles on NVIDIA.)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:29:00 +00:00
Alyssa Rosenzweig
26de3d5366
glsl/float64: handle signed zero with min/max
...
Ensure the following identities hold to match IEEE-754-2019 and upcoming NIR:
min(-0, +0) = -0
min(+0, -0) = -0
max(-0, +0) = +0
max(+0, -0) = +0
To implement, we specialize a version of flt64_nonnan. The regular flt64 has
extra logic to handle signed zero, so this version is actually simpler. So in
addition to the bug fix, this is an optimization. Compute shaders from
KHR-GL46.gpu_shader_fp64.builtin.max_dvec4 before and after:
before: 136 inst, 122 alu, 122 fscib, 4 ic, 1006 bytes, 39 regs, 28 uniforms
after: 104 inst, 90 alu, 90 fscib, 4 ic, 766 bytes, 39 regs, 28 uniforms
I will happy take a 24% reduction in instruction count as the cost of standards
conformance ^_^
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:29:00 +00:00
Alyssa Rosenzweig
6f48fa4ebe
nir: strengthen fmin/fmax definitions with signed zero
...
SPIR-V strengthened the semantics around signed zero, requiring fmin(-0, +0) =
-0. Since nir_op_fmin is commutative, we must also require fmin(+0, -0) = -0 to
match, although it's unclear if SPIR-V requires that. We must strengthen NIR's
definitions accordingly.
This strengthening is additionally motivated by the existing nir_opt_algebraic
rule like:
(('fmin', a, ('fneg', a)), ('fneg', ('fabs', a))),
With the strengthened new definition, this transform is clearly exact. With the
weaker definition, the transform could change the sign of zero based on
implementation-defined behaviours which ... while, not exactly unsound, is
undesireable semantically.
...
This is probably technically a bug fix, but I'm not convinced it's worth it's
weight in backporting.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:29:00 +00:00
Alyssa Rosenzweig
7fc5a2296b
nir: use MIN2/MAX2 opcodes for imin/umax folding
...
This is more idiomatic and already #include'd.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:29:00 +00:00
Alyssa Rosenzweig
e8db5759b8
nir/search: use ALU float control helpers
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:29:00 +00:00
Alyssa Rosenzweig
d4c6fbc4a7
nir: add nir_alu_instr float controls queries
...
These are helpful now that float_controls2 exists, these are common
patterns worth factoring out into helpers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:29:00 +00:00
Konstantin Seurer
43dadbd2fa
nir: Add FLOAT_CONTROLS_.*_PRESERVE
...
A logical or of all bit sizes.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:28:59 +00:00
Alyssa Rosenzweig
fc1521e57c
util: add dui/uid helpers
...
like fui/uif but for fp64. will be used for NIR constant folding.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075 >
2024-07-15 19:28:59 +00:00
C Stout
b16b1d05c5
meson: remove unnecessary line continuation
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30190 >
2024-07-15 18:46:31 +00:00
Marek Olšák
2afd233145
radeonsi: lock a mutex when updating scratch_va for compute shaders
...
Fixes: 3b0bfd254f - radeonsi/gfx11: make flat_scratch changes for compute
Reviewed-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30071 >
2024-07-15 13:52:27 -04:00
Marek Olšák
a5b4ae67ae
ac: add radeon_info::has_scratch_base_registers
...
Fixes: 3b0bfd254f - radeonsi/gfx11: make flat_scratch changes for compute
Reviewed-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30071 >
2024-07-15 13:52:25 -04:00
Marek Olšák
bc4382348d
radeonsi: don't update compute scratch if the compute shader doesn't use it
...
We need to save the last COMPUTE_TMPRING_SIZE value in si_context because
it's no longer computed when compute scratch isn't used.
Fixes: 3b0bfd254f - radeonsi/gfx11: make flat_scratch changes for compute
Reviewed-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30071 >
2024-07-15 13:52:22 -04:00
Marek Olšák
c353394a21
radeonsi: replace si_shader::scratch_bo with scratch_va, don't set it on gfx11+
...
This removes the unnecessary buffer reference and improves this fragile
code.
Fixes: 3b0bfd254f - radeonsi/gfx11: make flat_scratch changes for compute
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11463
Reviewed-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30071 >
2024-07-15 13:52:18 -04:00
C Stout
880f0fc8ce
vulkan/util: add missing dependencies
...
gen_enum_to_str.py and vk_struct_type_cast_gen.py both import
vk_extensions.py
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30164 >
2024-07-15 16:19:41 +00:00
Marek Olšák
7ff016610f
radeonsi/ci: update gfx11 failures
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30173 >
2024-07-15 15:00:50 +00:00
Marek Olšák
02e60a221c
radeonsi: rewrite the clear/copy_buffer microbenchmark
...
It removes testing cases that we don't need, and adds testing cases that we
need, such as alignment and the default codepath. The result is much less code.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30173 >
2024-07-15 15:00:50 +00:00
Marek Olšák
65b09edff2
radeonsi: clear buffers with a 12B clear value by clearing 4 dwords per thread
...
It's faster than clearing 3 dwords per thread.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30173 >
2024-07-15 15:00:50 +00:00
Marek Olšák
9fa0cb8aa8
radeonsi: add dwords_per_thread parameter into si_compute_clear_copy_buffer
...
It will be used by the dmaperf microbenchmark.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30173 >
2024-07-15 15:00:50 +00:00
Marek Olšák
ca4f6fde54
radeonsi: use a hash_table and define a shader key for the DMA compute shader
...
Right now the shader has 3 variants, and there will be more.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30173 >
2024-07-15 15:00:50 +00:00
Marek Olšák
8df427f162
radeonsi: add fail_if_slow parameter into compute_clear/copy_buffer
...
and move all failure paths into it.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30173 >
2024-07-15 15:00:50 +00:00
Mike Blumenkrantz
e42a25aea1
mesa/st: load state params for feedback draws with allow_st_finalize_nir_twice
...
as proposed by Amol Surati, this should ensure that the params are always updated
Fixes: 5eb0136a3c ("mesa/st: when creating draw shader variants, use the base nir and skip driver opts")
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30126 >
2024-07-15 13:11:20 +00:00
Georg Lehmann
b0ad3c2160
aco: fix s_delay_alu with salu and trans dependency
...
These events were silently truncated in get_counters_for_event.
The integer types in this pass are a bit all over the place, maybe we should
consider using typedefs for clarity or a different solution with type safety.
Fixes: 9e9cabd2fa ("aco/waitcnt: support GFX12 in waitcnt pass")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30163 >
2024-07-15 12:02:35 +00:00
Mark Collins
a4b8d17c29
fd/meson: Only build 'ds' when system has DRM
...
This would result in compilation errors on non-DRM Turnip builds
that included perfetto support.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30147 >
2024-07-15 11:39:20 +00:00
Mark Collins
d77b0f7cb1
tu/kgsl: Fix profiling buffer GPU IOVA
...
The IOVA being submitted was of the suballocation rather than
the parent buffer.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30147 >
2024-07-15 11:39:20 +00:00
Mark Collins
0d6faa21f8
tu/kgsl: Spin unti KGSL reports queue timestamp during profiling
...
KGSL writes the profiling values asynchronously while we read them
immediately after the IOCTL returns which can result in the struct
not being filled in by the time we read it, this results in AGI not
correctly processing any timestamps from larger submits which take
longer to queue. To fix this, we now busy-wait on until the value
has been written out by KGSL.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30147 >
2024-07-15 11:39:20 +00:00
Juan A. Suarez Romero
2d54a605fe
v3dv: free temp image created when copying with blit
...
This fixes a leak that happens when copying a image using blit, and the
image is a compressed one.
In this case a new image view is created that can be re-interpreted to
perform the copy, but was not properly free.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30161 >
2024-07-15 11:14:29 +00:00
Juan A. Suarez Romero
cbd3927445
v3d: expose ARB_depth_clamp in V3D 7.x
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30155 >
2024-07-15 11:45:37 +02:00
Juan A. Suarez Romero
f8623ea7da
v3dv: adversise VK_EXT_depth_clamp_zero_one
...
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30148 >
2024-07-15 09:17:40 +00:00
Eric Engestrom
ce7e1e0f7a
v3d/ci: add disabled job for CL testing on the RPi5
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30076 >
2024-07-15 08:29:36 +00:00
Eric Engestrom
7c40c35b97
v3d/ci: rename "rusticl on v3d" suite to v3d-rusticl
...
There's nothing rpi4-specific in there, it just tests rusticl on v3d,
and the next commit will do exactly that on the rpi5.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30076 >
2024-07-15 08:29:36 +00:00
Eric Engestrom
beb05d14ae
v3d/ci: add disabled job for GL testing on the RPi5
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30076 >
2024-07-15 08:29:36 +00:00
Samuel Pitoiset
15a3aff0f1
radv: use zero allocation for the device queues
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153 >
2024-07-15 09:34:42 +02:00
Samuel Pitoiset
5fa22f9fec
radv: regroup all tools initialization in one helper
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153 >
2024-07-15 09:34:42 +02:00
Samuel Pitoiset
9d2751bbde
radv: add radv_device_init_rmv()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153 >
2024-07-15 09:34:42 +02:00
Samuel Pitoiset
27a90f1f29
radv: add helpers for init/deinit device fault detection
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153 >
2024-07-15 09:34:42 +02:00
Samuel Pitoiset
351fba7ee3
radv: add radv_device_init_trap_handler()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153 >
2024-07-15 09:34:42 +02:00
Samuel Pitoiset
4ab6357c42
radv: simplify keeping shader info for GPU hangs debugging
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153 >
2024-07-15 09:34:42 +02:00
Samuel Pitoiset
fe09a6d72b
radv: add helpers for init/deinit RGP
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153 >
2024-07-15 09:34:42 +02:00
Samuel Pitoiset
033084c912
radv: add helpers for init/deinit device memory cache
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153 >
2024-07-15 09:34:42 +02:00
Samuel Pitoiset
01339c6c93
radv: add radv_device_init_perf_counter()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153 >
2024-07-15 09:34:42 +02:00
Samuel Pitoiset
5657f21fcf
radv: destroy the perf counter BO in radv_device_finish_perf_counter()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153 >
2024-07-15 09:34:42 +02:00
Josh Simmons
c68408d195
radv: Fix crash when using SQTT and NO_COMPUTE
...
Signed-off-by: Josh Simmons <josh@nega.tv >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30177 >
2024-07-15 07:05:40 +00:00
Dave Airlie
d94a40fe08
anv/video: use correct offset for MPR row store scratch buffer.
...
While playing with zink video, I found this was using the wrong
offset.
Fixes: 98c58a16ef ("anv: add initial video decode support for h264.")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30143 >
2024-07-15 01:05:18 +00:00
M Henning
e506955056
nir: Handle texop_*_nv in nir_tex_instr_is_query
...
Fixes: aa1f00cf ("nir/gather_info: handle uses_fbfetch_output for texture operations")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11505
Tested-by: Thomas H.P. Andersen <phomes@gmail.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30166 >
2024-07-13 15:36:29 +00:00
Eric Engestrom
bfef1a4450
lvp+zink/ci: document a flake seen in a merge pipeline
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30175 >
2024-07-13 10:17:10 +00:00
Eric Engestrom
f0af09d1f6
turnip+zink/ci: add two more CS related flakes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30174 >
2024-07-13 09:55:17 +00:00
Eric Engestrom
89742437ef
zink+nvk/ci: document regression from !30033
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30171 >
2024-07-13 11:30:09 +02:00
Eric Engestrom
92572501bb
zink+nvk/ci: ascii-sort fails
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30171 >
2024-07-13 11:30:09 +02:00
Pierre-Eric Pelloux-Prayer
a04dc1a451
frontends/dri: add error logs to dri2_create_image_from_fd
...
These silent failures are hard to track otherwise.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30159 >
2024-07-13 02:44:17 +00:00
Pierre-Eric Pelloux-Prayer
252485b0e2
radeonsi: fix si_get_dmabuf_modifier_planes for gfx12
...
DCC_RETILE/DCC only makes sense if TILE_VERSION is lower than
AMD_FMT_MOD_TILE_VER_GFX12.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30159 >
2024-07-13 02:44:17 +00:00
Marek Olšák
0bb83a4060
ac/surface: finish display DCC for gfx12
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30114 >
2024-07-13 02:17:37 +00:00
Marek Olšák
46071c90c7
ac/surface: finish display DCC for gfx11.5
...
Fixes: 6835257246 - amd/common: update DCC for gfx11.5
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30114 >
2024-07-13 02:17:37 +00:00
Marek Olšák
641ec0ae6e
radeonsi/gfx12: fix compute register settings for global_atomic_ordered_add
...
This is for future documentation/reference. It's likely radeonsi won't use
the atomic in compute shaders.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063 >
2024-07-13 01:32:48 +00:00
Marek Olšák
acb3d5f132
radeonsi/gfx12: always set BO metadata, not just during export
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063 >
2024-07-13 01:32:48 +00:00
Marek Olšák
462ef2d638
radeonsi: expose internal buffer bindings to compute shaders
...
so that compute shaders can use SI_RING_SHADER_LOG.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063 >
2024-07-13 01:32:48 +00:00
Marek Olšák
33d4e32545
radeonsi: implement nir_intrinsic_load_ssbo_address
...
It was useful for testing the ordered_add_loop_gfx12_amd intrinsic.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063 >
2024-07-13 01:32:48 +00:00
Marek Olšák
678d520162
as/llvm: add s_nops before the ordered add loop and s_wait_alu workaround
...
The s_nops improve performance.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063 >
2024-07-13 01:32:48 +00:00
Marek Olšák
bd8d20543d
ac/llvm: fix inline assembly register constraints for ordered_add_loop_gfx12_amd
...
This is only known to fix the assembly code when num_atomics > 6, which is
not currently used.
The VGPRs are reordered to simplify the clobber constraint.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063 >
2024-07-13 01:32:48 +00:00
Marek Olšák
b617c3b06e
ac/llvm: remove s_nop from ordered_add_loop_gfx12_amd
...
This is faster.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063 >
2024-07-13 01:32:48 +00:00
Marek Olšák
11272a8d82
ac/nir: remove sleeps from gfx12 streamout code
...
This is faster.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063 >
2024-07-13 01:32:48 +00:00
Marek Olšák
1b2cd628b8
nir: rename ordered_xfb_counter_add_gfx12_amd -> ordered_add_loop_gfx12_amd
...
because it can also be used by compute.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063 >
2024-07-13 01:32:48 +00:00
Marek Olšák
1fd43bca2c
radeonsi: don't use CP DMA on GFX940
...
It's been defeatured.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30115 >
2024-07-13 00:58:30 +00:00
Marek Olšák
b0205a92d9
radeonsi: replace shader SHA1 hashes with BLAKE3
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30110 >
2024-07-12 23:43:55 +00:00
Marek Olšák
090f27035d
mesa: switch remaining shader functions from SHA1 to BLAKE3
...
This fixes shader replacements, which require BLAKE3 now.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30110 >
2024-07-12 23:43:55 +00:00
Yiwei Zhang
c2d26a5c08
venus: simplify cached mem type emulation
...
Instead of exposing the original cached memory type index and silently
remapping to the first coherent, we could directly append the cached bit
to the first coherent if coherent-cached doesn't exist.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30144 >
2024-07-12 21:28:15 +00:00
Mike Blumenkrantz
9e37ec9cb6
zink: use maint7 to capture venus driver and more accurately use workarounds
...
maint7 provides the ability for virtualized drivers to pass along the
real driver's info, which allows for the enablement of per-driver workarounds
based on the underlying hardware
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29964 >
2024-07-12 21:04:02 +00:00
Mike Blumenkrantz
7e9d5c7b12
zink: hook up maintenance7
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29964 >
2024-07-12 21:04:02 +00:00
Mike Blumenkrantz
f9d451e837
zink: move all driverID checks to a helper function
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29964 >
2024-07-12 21:04:01 +00:00
Caio Oliveira
f48b3bee31
intel/brw: Split off assembler logic into library
...
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30006 >
2024-07-12 19:34:23 +00:00
Faith Ekstrand
1f906f8715
zink/kopper: Set VK_COMPOSITE_ALPHA_OPAQUE_BIT when PresentOpaque is set
...
This is required for EGL_EXT_present_opaque to work correctly.
Fixes: 8ade5588e3 ("zink: add kopper api")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11007
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30133 >
2024-07-12 15:22:44 +00:00
Mike Blumenkrantz
70b40fd2a0
zink: modify some buffer mapping behavior for buffer replacement srcs
...
if the src for a replace_buffer call is mapped after replacement:
* avoid clearing access flags
* update valid range
the pointer access here is always safe because the only case in which
this scenario can occur is if tc is forced to sync immediately after
creating a replaceent buffer, and the replacement buffer's lifetime
will always be exceeded by the lifetime of the real buffer
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30107 >
2024-07-12 12:29:47 +00:00
Mike Blumenkrantz
76da22bfc2
zink: track the "real" buffer range from replacement buffers
...
when tc replaces a buffer in subdata, it may subsequently perform subdata calls
on the replacement if it is forced to sync during map, e.g.,
* bind_vbo(dst)
* draw
* subdata(src)
* buffer replacement
* map
* tc sync
* replace_buffer(dst, src)
* memcpy <- broken
* draw
in this scenario, src may not have data at the time of replacement,
but it will get data soon after, and this buffer range is the real one
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30107 >
2024-07-12 12:29:47 +00:00
Mike Blumenkrantz
fa210726b6
zink: propagate valid buffer range to real buffer when mapping staging
...
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30107 >
2024-07-12 12:29:47 +00:00
Danylo Piliaiev
7231eef630
tu: Have single Flush/Invalidate memory entrypoints
...
Make all flush/invalidation logic kernel independent. The only
downside is that aarch32 would have cached non-coherent memory
disabled, but there are probably no users of it.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11468
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30131 >
2024-07-12 11:48:36 +00:00
Rohan Garg
5bb9c1cca9
anv: reuse existing macro to query for flushes
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30102 >
2024-07-12 10:50:12 +00:00
Eric Engestrom
29c4961b53
v3d/ci: include results of CL run in expectations
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30134 >
2024-07-12 10:12:38 +00:00
Eric Engestrom
10af395f72
v3d/ci: include results of GL full run in expectations
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30134 >
2024-07-12 10:12:38 +00:00
Samuel Pitoiset
aa1f00cf5c
nir/gather_info: handle uses_fbfetch_output for texture operations
...
Like nir_texop_txf_ms.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30109 >
2024-07-12 09:33:51 +00:00
Samuel Pitoiset
0d0b949cd7
nir/gather_info: handle uses_fbfetch_output for sparse image loads
...
Looks like this was missing.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30109 >
2024-07-12 09:33:51 +00:00
Samuel Pitoiset
0a6852907d
radv: fix marking RADV_DYNAMIC_COLOR_ATTACHMENT_MAP as dirty
...
Due to the cmdbuf dirty split.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30119 >
2024-07-12 06:37:52 +00:00
Christian Gmeiner
87786a7a7e
nak: Move imad late optimization to nir
...
It is more or less just a code move, but I touched
is_only_used_by_iadd(..) to match the style of the other functions in
that file.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30099 >
2024-07-12 05:54:46 +00:00
Christian Gmeiner
e019517d6e
nak: Set has_imad32 conditionally
...
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30099 >
2024-07-12 05:54:46 +00:00
Faith Ekstrand
b209fedebe
nak/sm50: Fix immediates for IMnMx
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
faeb715535
nak/sm50: Re-order all the ops
...
This puts them in the same order as nak/ir.rs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
970b3e0e71
nak: Add a legalize() method to ShaderModel
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
e039b7e1ac
nak/sm50: Move legalization into SM50Op
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
59f1ad581e
nak/sm50: Move instruction encoding into a trait
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
99c4b90f3c
nak/sm70: Move legalization into SM70Op
...
This puts the legalize routine and the encoder right next to each other
in the code, making it much easier to verify that legalize() enforces
all of the constraints reqauired by encode().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
f20b1c50b4
nak/legalize: Handle RA instructions up-front
...
This pulls them out of the per-SM flow. They're also all no-ops to
legalize since they don't take vectors and are handled directly by RA.
This also means these instructions are now getting properly handled on
Maxwell where we previously trusted in the (probably broken) maxwell
legalizing code.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
9d8d928a59
nak/legalize: Handle OpBreak and OpBSSy specially
...
This lets us stop passing liveness information into the per-op
legalization code. Long-term, I want to add a more general core
concept of destinations which are also reads but I haven't gotten
around to that yet.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
d9a9bb651c
nak/legalize: Move a bunch of helpers to a trait
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
1b9b6a9529
nak/sm70: Re-organize the code a bit
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
20e1160f3f
nak/sm70: Move instruction encoding into a trait
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
57667aeac8
nak: Move instruction encoding into ShaderModel
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
d4db2f43de
nak: Move Instr::can_be_uniform() into ShaderModel
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
6ddb2b291d
nak: Move RegFile::num_regs() into ShaderModel
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
74ac40da2d
nak/ra: Move the NAK_DEBUG=spill logic into RA
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
e6b8da5427
nak: Plumb a ShaderModel trait through everywhere
...
Instead of scattering number checks everywhere, this lets us actually
start splitting code paths. This commit just adds the shader model
trait. Later commits will add more methods.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
69bea2b49f
nak/sm50: Get rid of the hand-rolled align_up/down() helpers
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
0f7ff6fbdc
nak: Move encode_sm* to to sm*.rs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:31 +00:00
Faith Ekstrand
d82a5d0f59
nak/sph: Stop storing the shader model in ShaderProgramHeader
...
It's only needed for one Kepler+ check which is unlikely to ever be
relevant for NAK. Also, that should probably be based on the SPH
version or something, not an arbitrary shader model.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141 >
2024-07-11 22:28:30 +00:00
Caio Oliveira
c2d1e10315
intel/brw: Don't print extra newlines in assembler
...
Handle '\n' when inside the MSGDESC start condition,
otherwise the lexer would apply its default rule (write
to stdout).
Without that, newlines were "leaking" to the output when
parsing a multiple line "MsgDesc". E.g. given the file
example.asm below
```
send(8) nullUD g126UD nullUD 0x02000000 0x00000000
thread_spawner MsgDesc: mlen 1 ex_mlen 0 rlen 0
{ align1 WE_all 1Q @1 EOT };
```
the assembler would produce one extra newline
```
$ brw_asm -t hex -g tgl example.asm
31 01 03 80 04 00 00 00 0c 7e 00 70 00 00 00 00
```
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30100 >
2024-07-11 21:07:54 +00:00
Alyssa Rosenzweig
b8dcbfbd39
zink: print pipeline stats for compute shader-db
...
this is useful for evaluating compute shaders with zink. the open shader-db
doesn't have any compute shaders in it, but shader-db runner is capable of
compute and we need to handle it. (Rob's shaderdb definitely has some compute
shaders in it, at least.)
this gets us pipeline stats printing on zink+nvk for a simple compute shader I wrote when working on common NIR stuff:
b.shader_test - type: compute, Code Size: 752, Number of GPRs: 19, SLM Size: 0
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30135 >
2024-07-11 20:37:38 +00:00
Alyssa Rosenzweig
8c597c0861
zink: move print_pipeline_stats
...
we need it higher up in the file for the next patch. nfc.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30135 >
2024-07-11 20:37:38 +00:00
Louis-Francis Ratté-Boulianne
2b8eaf3bd6
panfrost: add PAN_AFRC_RATE env var to force a compression rate
...
Valid values are "default" and integers from 1 to 12 (bpc).
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813 >
2024-07-11 19:02:50 +00:00
Louis-Francis Ratté-Boulianne
2ff543f3b8
panfrost: add support for fixed-rate compression
...
Add support for the gallium interface to retrieve supported bitrates
and modifiers and creation of a compressed resource.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813 >
2024-07-11 19:02:50 +00:00
Louis-Francis Ratté-Boulianne
6665840929
panfrost: add translation between modifier and compression rates
...
Add some util methods to be able to translate from an AFRC modifier
to the associated compression bitrate (bits-per-components) and
vice-versa. Also add a method to query all the supported compression
bitrate for a format.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813 >
2024-07-11 19:02:50 +00:00
Louis-Francis Ratté-Boulianne
894657a5ed
panfrost: add support for AFRC modifiers
...
Add support for all three block sizes (16, 24 and 32) and two
paging tiles layout (rotation or scan optimized). The size of the
resource is aligned to the paging tile width and height.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813 >
2024-07-11 19:02:50 +00:00
Louis-Francis Ratté-Boulianne
450c853f8b
panfrost: add support for AFRC render targets
...
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813 >
2024-07-11 19:02:50 +00:00
Louis-Francis Ratté-Boulianne
df226c237e
panfrost: add support for AFRC textures
...
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813 >
2024-07-11 19:02:50 +00:00
Louis-Francis Ratté-Boulianne
87aad0a5e4
panfrost: encode component order as an inverted swizzle (v10)
...
v10 restricts component orders when AFRC is in use, so we use the
same solution as for AFBC on v7.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813 >
2024-07-11 19:02:50 +00:00
Louis-Francis Ratté-Boulianne
2dae926850
panfrost: add utils for AFRC fixed-rate support
...
There are mainly two parameters to control the fixed-rate
compression:
- Block size: the size (16, 24 or 32 bytes) that will take a
coding unit (format dependent).
- AFRC format: the pixel format and paging tile layout
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813 >
2024-07-11 19:02:50 +00:00
Louis-Francis Ratté-Boulianne
fb95e8ada0
panfrost: add device querying for AFRC support
...
As of now, only Mali-G310 supports ARM fixed-rate compression but
it should be advertised in bit 25 of TEXTURE_FEATURES_0
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813 >
2024-07-11 19:02:50 +00:00
Louis-Francis Ratté-Boulianne
a7b489f7be
panfrost: Add AFRC overlay in v10 xml specification
...
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28813 >
2024-07-11 19:02:50 +00:00
David Rosca
6cc32c609b
radeonsi/vcn: Add low latency encode support
...
This feature should be enabled for use cases when the lowest encoding
latency is desired, such as real-time game streaming.
Disabled by default due to increased power usage.
There is no libva interface currently that could be used for this, so
for now it can only be enabled by setting AMD_DEBUG=lowlatencyenc
environment variable.
See: https://gitlab.freedesktop.org/drm/amd/-/issues/3336
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30039 >
2024-07-11 18:33:41 +00:00
David Rosca
c06b944398
radeonsi: Add debug option to enable low latency encode
...
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30039 >
2024-07-11 18:33:41 +00:00
Caio Oliveira
e63b0571bc
intel/brw: Account for reg_unit() in assembler
...
Use reg_unit() to match the internal representation in brw_reg.
Fixes the assembler tool when targetting Xe2.
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30060 >
2024-07-11 16:38:54 +00:00
Caio Oliveira
6cdd56e7ed
intel/brw: Use brw_inst_set_group() to set QtrCtrl and NibCtrl
...
The function handles the Xe2 case where NibCtrl is gone. Also add
error messages for invalid input when assembling for Xe2, e.g. "2N".
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30060 >
2024-07-11 16:38:54 +00:00
Caio Oliveira
c3c65e8821
intel/brw: Don't set acc_wr_control for Xe2
...
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30060 >
2024-07-11 16:38:54 +00:00
David Rosca
3a6513d7c4
radeonsi/vcn: Limit size to target size in AV1 decode
...
Avoids page faults when trying to decode into small target buffer.
This currently happens due to ffmpeg bug when decoding AV1-TEST-VECTORS/av1-1-b8-03-sizeup.
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30072 >
2024-07-11 13:33:04 +00:00
Karol Herbst
d36b1e30a2
rusticl: require PIPE_CAP_IMAGE_STORE_FORMATTED for image support.
...
Luckily we don't need PIPE_CAP_IMAGE_LOAD_FORMATTED as this will only be
relevant for read_write image support.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30104 >
2024-07-11 12:14:57 +00:00
Karol Herbst
382b88cbc4
rusticl/device: fix advertizement of 3d write images support
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30104 >
2024-07-11 12:14:57 +00:00
Karol Herbst
06cecdc420
rusticl/device: turn image_3d_write_supported into a cap
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30104 >
2024-07-11 12:14:57 +00:00
Karol Herbst
386632e2a3
rusticl/device: fix image_3d_write_supported for embedded
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30104 >
2024-07-11 12:14:57 +00:00
Karol Herbst
5cc37b9025
rusticl/spirv: support more caps
...
Fixes: 22171d16f8 ("mesa: Use the new spirv_capabilities struct")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30104 >
2024-07-11 12:14:57 +00:00
Karol Herbst
48050d9f45
v3d: support unnormalized coords
...
Useful for OpenCL and maybe other things.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30104 >
2024-07-11 12:14:57 +00:00
Kenneth Graunke
837c441acb
intel/nir: Don't needlessly split u2f16 for nir_type_uint32
...
Commit f695a9fed2 moved the 64-bit float <-> 16-bit float conversion
splitting into a core NIR pass, so the code remaining here is only
needed for 64-bit integer types.
Presumably in an attempt to remove the float handling, it replaced
simple bit_size == 64 checks with this expression:
(full_type & (nir_type_int64 | nir_type_uint64))
I believe that the intended expression was:
(full_type == nir_type_int64 || full_type == nir_type_uint64)
Unfortunately, the former is incorrect. Any integer or unsigned
NIR type would trigger the former expression. For example:
nir_type_uint32 & (nir_type_int64 | nir_type_uint64) => nir_type_uint
This meant that we were splitting e.g. u2f16 on 32-bit unsigned types
into u2f32 and f2f16, when we can easily natively handle that case.
To fix this, we go back to simple bit_size == 64 checks. This pass is
already run after nir_lower_fp16_casts which will split the float case,
so we will never see it here.
fossil-db on Alchemist shows a -1.14% reduction in affected shaders for
google-meet-clvk shaders. In another ChromeOS workload, it improves
performance by around 8% on Meteorlake.
Thanks to Sushma Venkatesh Reddy for finding this performance issue!
Fixes: f695a9fed2 ("intel/compiler: use nir_lower_fp16_casts")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30091 >
2024-07-11 02:37:05 -07:00
Sergi Blanch Torne
5873b3ac14
ci: run_n_monitor, sort by name when listing jobs
...
The job loops, w/o and explicit sort, are sorted by the job id. As they produce
logs, humans could feel an improvement by sorting by name.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29444 >
2024-07-11 08:28:31 +00:00
Sergi Blanch Torne
12c1bdc31d
ci: run_n_monitor, listing job names with a padding
...
Formatting the output lines with a padding in the job name fields may help
the readability of the information when one tries to follow the progress of
a specific job.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29444 >
2024-07-11 08:28:31 +00:00
Sergi Blanch Torne
d80d35ceff
ci: run_n_monitor, pretty duration with padding
...
When printing time durations, the smaller units can always have the same
number of digits. Helps to have aligned fields when printing.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29444 >
2024-07-11 08:28:31 +00:00
Sergi Blanch Torne
45f19b3631
ci: run_n_monitor, arguments review and unicode
...
Coding style homogenous for all the methods in the file. Document
unicode symbols used.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29444 >
2024-07-11 08:28:31 +00:00
Juan A. Suarez Romero
795b3f83ff
v3d/ci: update expected list
...
Add new failures, and update comments.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30117 >
2024-07-11 09:29:39 +02:00
Rhys Perry
4b36668575
radv: remove unecessary nir_remove_unused_varyings cleanup passes
...
I think the comment meant to refer to nir_remove_unused_varyings.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25590 >
2024-07-10 19:11:38 +00:00
Rhys Perry
c4706c6177
nir/linking_helpers: remove nested IF
...
Just add a && to the condition. This is more readable to me.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25590 >
2024-07-10 19:11:38 +00:00
Rhys Perry
525aacd9d7
nir/linking_helpers: remove varying accesses in nir_remove_unused_io_vars
...
interp_deref_at_sample of a nir_var_shader_temp is nonsensical and might
be ignored by later passes, instead of removed.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7818
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10588
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25590 >
2024-07-10 19:11:38 +00:00
Rhys Perry
bcd98e091a
nir/linking_helpers: remove special case for read mesh outputs
...
Only VK_NV_mesh_shader allows this kind of access, and no driver
advertises that extension anymore.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25590 >
2024-07-10 19:11:38 +00:00
Rhys Perry
57080749f7
gallium: remove PIPE_CAP_SHADER_CAN_READ_OUTPUTS
...
nir_lower_io_to_temporaries is now done for all stages except TCS, and
nir_lower_io_to_temporaries with a TCS is a no-op.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25590 >
2024-07-10 19:11:38 +00:00
Rhys Perry
767ea18517
glsl: always lower non-TCS outputs to temporaries
...
It seems only radeonsi and v3d sets
CAN_READ_OUTPUTS/SupportsReadingOutputs, and v3d has
lower_all_io_to_temps=true. It looks like radeonsi basically lowers the
outputs to temporaries in the backend.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25590 >
2024-07-10 19:11:38 +00:00
Ryan Neph
969cb02de7
venus: chain VkExternalMemoryAcquireUnmodifiedEXT for wsi ownership transfers
...
Venus implements guest WSI on host external memory and thus cannot
transition guest wsi images to/from VK_IMAGE_LAYOUT_PRESENT_SRC_KHR.
Thus, when a client would attempt to transition a Venus wsi image
to/from VK_IMAGE_LAYOUT_PRESENT_SRC_KHR, Venus instead transitions
to/from VK_IMAGE_LAYOUT_GENERAL and performs an explicit ownership
transfer to/from VK_QUEUE_FAMILY_FOREIGN_EXT. Unfortunately, the
read-only guarantee of VK_IMAGE_LAYOUT_PRESENT_SRC_KHR is lost.
Upon the "acquire from foreign queue" side of that symmetry, when a
client would attempt to retain the contents of the image (i.e.
transition from VK_IMAGE_LAYOUT_PRESENT_SRC_KHR instead of
VK_IMAGE_LAYOUT_UNDEFINED), Venus knows that the image's backing memory
has not been modified. Thus, when those "acquire from FOREIGN queue"
ownership transfers flow to the native driver, Venus can signal it to
skip any acquisition-time validation of an image's internal data,
obtaining the same optimization as native WSI.
This is useful for drivers such as ARM's Mali (with Transaction
Elimination) that would otherwise need to recompute costly per-tile
checksums (CRCs) to ensure that they haven't gone stale during FOREIGN
ownership of the image's memory.
Signed-off-by: Ryan Neph <ryanneph@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29777 >
2024-07-10 18:57:27 +00:00
Ryan Neph
3f86894639
venus: skip barrier fixes as early as possible
...
Image memory barriers don't need to be fixed when Venus' internal
"presentable" layout is PRESENT_SRC (generally only in specific types of
debugging). In that case, skip barrier fixes as early as possible and
remove early returns from procedures deeper in the call stack.
Signed-off-by: Ryan Neph <ryanneph@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29777 >
2024-07-10 18:57:27 +00:00
Ryan Neph
1656eb4706
venus: refactor image memory barrier fix storage and conventions
...
Prepare to allocate VkExternalMemoryAcquireUnmodifiedEXT structs from
command pool cached storage with the same lifetime as
VkImageMemoryBarrier(2) structs.
Also use common parameter naming and function call signatures for the
both the barrier and barrier2 variants.
Signed-off-by: Ryan Neph <ryanneph@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29777 >
2024-07-10 18:57:27 +00:00
Ryan Neph
53f0c12b0c
venus: factor image memory barrier fixes to common implementation
...
Signed-off-by: Ryan Neph <ryanneph@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29777 >
2024-07-10 18:57:27 +00:00
Ryan Neph
a5e4880cbe
venus: enable VK_EXT_external_memory_acquire_unmodified
...
Signed-off-by: Ryan Neph <ryanneph@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29777 >
2024-07-10 18:57:27 +00:00
Ryan Neph
b57b332b86
venus: sync headers for VK_EXT_external_memory_acquire_unmodified
...
Signed-off-by: Ryan Neph <ryanneph@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29777 >
2024-07-10 18:57:26 +00:00
Erico Nunes
de9dcea0ca
mesa/st: don't set lower_fdot in draw_nir_options
...
lower_fdot outputs fsum ops like fsum3, which in this stage may
go through nir_to_tgsi paths and tgsi doesn't implement them.
This hits an assert in ntt_emit_alu:
feedback: ../src/gallium/auxiliary/nir/nir_to_tgsi.c:1804:
ntt_emit_alu: Assertion `!"" "Unknown NIR opcode"' failed.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30079 >
2024-07-10 18:12:20 +00:00
Zan Dobersek
5e862a372b
freedreno/drm: add mesautil dependency
...
The libfreedreno_drm library should depend on mesautil to bring in the
zlib compiler and linker flags used by the RD dumping facilities that
were integrated recently.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Fixes: bde26a32e1 ("freedreno/drm: Add rd dumper support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30103 >
2024-07-10 17:39:23 +00:00
Timothy Arceri
22bd26079f
util/mesa: move mesa/main log code to util
...
This removes the unrequired dependance on _mesa_init_debug() and moves
all log code to the util file so that _mesa_log* can now be used without
creating a dependance on mesa/main. Since the code we are moving depends
on the code already in the util (as it was moved here previously) this is
also a much better spot for the code.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30012 >
2024-07-10 17:00:33 +00:00
Timothy Arceri
6c4e03024c
mesa: remove _mesa_get_log_file() wrapper
...
There is no need for this wrapper.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30012 >
2024-07-10 17:00:33 +00:00
Aleksi Sapon
0441c69527
util: macOS support for cnd_monotonic
...
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29900 >
2024-07-10 15:23:53 +00:00
Aleksi Sapon
f12dfd7940
wsi: fix compilation on macOS
...
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29900 >
2024-07-10 15:23:53 +00:00
Aleksi Sapon
345c198c22
util: fix memory related OS calls on macOS
...
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29900 >
2024-07-10 15:23:53 +00:00
Aleksi Sapon
94379377c4
lavapipe: build "Windows" check should use the host machine, not the platforms option.
...
`with_platform_windows` depends on the `platforms` option,
and is an inaccurate proxy check for `host_machine.system() == 'windows'`.
The ICD path and shared library name are dependent on the host system,
not whether or not Lavapipe is built with `WIN32` platform support.
In fact Lavapipe can be built with no platforms (`-Dplatforms=`)
if you only need headless (then this check would be incorrect)
fixes: e030ab5163
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Reviewed-by: Dylan Baker <dylan@pnwbakers.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29900 >
2024-07-10 15:23:53 +00:00
Aleksi Sapon
13e7a39f49
lavapipe: fixes for macOS support
...
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Reviewed-by: Dylan Baker <dylan@pnwbakers.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29900 >
2024-07-10 15:23:53 +00:00
Karol Herbst
51e56c6c7b
rusticl/mesa: make PipeResource repr(transparent)
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30082 >
2024-07-10 13:58:56 +00:00
Karol Herbst
a382fb08a4
rusticl/memory: optimize sw_copy when the row_pitch matches the height
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30082 >
2024-07-10 13:58:56 +00:00
Karol Herbst
e4456b2399
rusticl/mesa: remove ResourceType::Cb0
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30082 >
2024-07-10 13:58:56 +00:00
Karol Herbst
91cd3295d8
rusticl: remove unused interfaces to simplify code
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30082 >
2024-07-10 13:58:56 +00:00
Karol Herbst
7b22bc617b
rusticl/memory: complete rework on how mapping is implemented
...
Previously we tried to map GPU resources directly wherever we could,
however this was always causing random issues and was overall not very
robust.
Now we just allocate a staging buffer on the host to copy into, with some
short-cut for host_ptr allocations.
Fixes the following tests across various drivers:
1Dbuffer tests (radeonsi, zink)
buffers map_read_* (zink)
multiple_device_context context_* (zink)
thread_dimensions quick_* (zink)
math_brute_force (zink)
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30082 >
2024-07-10 13:58:56 +00:00
Karol Herbst
00180933ad
rusticl/ptr: add a few APIs to TrackedPointers
...
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30082 >
2024-07-10 13:58:56 +00:00
Karol Herbst
d28ab687bb
rusticl/context: move SVM pointer tracking into own type
...
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30082 >
2024-07-10 13:58:56 +00:00
Karol Herbst
41bb73baf6
rusticl/buffer: harden bound checks against overflows
...
Fixes: 20c90fed5a ("rusticl: added")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30082 >
2024-07-10 13:58:56 +00:00
Georg Lehmann
cd9187a1e1
aco/ra: fix affinity for s_addk
...
The first, non SCC def matters.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Fixes: 39380d475a ("aco: add affinities for possible sopk optimizations")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29943 >
2024-07-10 13:36:00 +00:00
Daniel Schürmann
fab95c78f9
aco/ra: remove special-casing of p_logical_end
...
There is always enough registers available and this code
was broken anyway and had no effect.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962 >
2024-07-10 12:31:02 +00:00
Daniel Schürmann
ad01e473f5
aco/live_var_analysis: use separate allocator for temporary live sets
...
This drastically reduces the memory footprint of the live sets.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962 >
2024-07-10 12:31:02 +00:00
Daniel Schürmann
7c466157d0
aco/live_var_analysis: remove unused includes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962 >
2024-07-10 12:31:02 +00:00
Daniel Schürmann
6729e81d15
aco/live_var_analysis: inline block->register_demand updates
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962 >
2024-07-10 12:31:02 +00:00
Daniel Schürmann
2f4fb9eecf
aco/live_var_analysis: ignore phi definition and operand demand at predecessors
...
The linear_phi changes are already reflected in the live-in demand
of the successor. The logical_phi_sgpr_ops can only reduce the
register demand at the predecessor. Although this might slightly
overestimate the register-demand, no differences in code quality
were found.
Totals from 1610 (2.03% of 79395) affected shaders: (GFX11)
PreSGPRs: 54002 -> 56954 (+5.47%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962 >
2024-07-10 12:31:02 +00:00
Daniel Schürmann
68c1e7237c
aco/live_var_analysis: refactor using ctx struct
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962 >
2024-07-10 12:31:02 +00:00
Daniel Schürmann
daac18f2ce
aco/util: skip empty blocks in IDSet::insert(IDSet)
...
Since we don't remove empty blocks on erase(), this avoids
duplicating them unnecessarily.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962 >
2024-07-10 12:31:02 +00:00
Daniel Schürmann
6c6f382d68
aco: add RegisterDemand member to Instruction
...
Since we never need both at the same time, we can use
a union with pass_flags.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962 >
2024-07-10 12:31:02 +00:00
Daniel Schürmann
dc851c0aa6
aco/ra: use live_in_demand in should_compact_linear_vgprs()
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29962 >
2024-07-10 12:31:02 +00:00
Connor Abbott
4e2a0a5ad0
ir3: Add descriptor prefetching optimization on a7xx
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873 >
2024-07-10 11:54:15 +00:00
Connor Abbott
fdfe86aa52
ir3: Expand preamble rematerialization
...
Add the ability to deduplicate hoisted expressions, which will be
necessary to avoid repeatedly hoisting the same descriptors and blowing
our budget. The offset calculation may have itself been hoisted into the
preamble, so we also have to be able to hoist a bindless_resource_ir3
referencing a load_preamble and connect it to the source of the
corresponding store_preamble.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873 >
2024-07-10 11:54:15 +00:00
Connor Abbott
59940d6577
ir3: Make preamble rematerialization common code
...
We will need it for prefetching descriptors too. Move it to
ir3_nir_opt_preamble since that seems like the most related place.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873 >
2024-07-10 11:54:15 +00:00
Connor Abbott
45a57fa735
ir3: Plumb through descriptor prefetch intrinsics
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873 >
2024-07-10 11:54:15 +00:00
Connor Abbott
b39b82dfbd
ir3: Don't consider r63.x as a GPR
...
We have to be careful here because r63.x is also used to mean "register
not assigned yet," but dummy destinations for prefetches will use r63.x
and we don't want them to count as GPRs when determining whether to
enable early preamble.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873 >
2024-07-10 11:54:15 +00:00
Connor Abbott
fa8758fc81
ir3: Split out bindless tex/samp encoding
...
It will be used with prefetching, which is an intrinsic.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873 >
2024-07-10 11:54:15 +00:00
Connor Abbott
ccf88d940b
nir/instr_set: Don't remove matching instruction
...
We currently assume that the instruction is already inserted and we are
optimizing it away, but in the use case I have where we are hoisting
instructions into a preamble and deduplicating as we go along, that
isn't the case. Move this responsibility onto the caller, which also
makes it a bit clearer what's going on and turns this into something
more similar to an actual set.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873 >
2024-07-10 11:54:15 +00:00
Connor Abbott
cda7d9c971
nir/instr_set: Return the matching instruction
...
This allows use cases where we copy over expression trees and
deduplicate as we go along. We can use the matching instruction to build
up the rest of the expression tree.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29873 >
2024-07-10 11:54:15 +00:00
Juan A. Suarez Romero
2c74872bbc
broadcom/ci: update traces for rpi4
...
Mainly mark some traces as flake.
Reviewed-by: Eric Engestrom <eric@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30087 >
2024-07-10 10:31:24 +00:00
Juan A. Suarez Romero
4bb564f40d
broadcom/ci: add more jobs to test with rpi5
...
Now that there are more rpi5 in the CI, let's add pre-merge jobs.
This also restrict the nightly job to be executed by devices allocated
to run full runs.
Reviewed-by: Eric Engestrom <eric@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30087 >
2024-07-10 10:31:24 +00:00
Samuel Pitoiset
56aa1ac74b
radv: use ac_is_reduction_mode_supported()
...
This reduces the number of formats that support filter min/max
reduction on <= GFX8 due to some hw limitations.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30074 >
2024-07-10 07:57:42 +00:00
Samuel Pitoiset
cc3cb526c4
ac,radeonsi: add ac_is_reduction_mode_supported()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30074 >
2024-07-10 07:57:42 +00:00
Samuel Pitoiset
2d29b8b01e
radv: disable VK_EXT_sampler_filter_minmax on TAHITI and VERDE
...
Ported from RadeonSI.
This also explains all the flakes on Tahiti, see
9329f2c15b for reference.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30074 >
2024-07-10 07:57:42 +00:00
Samuel Pitoiset
4994c0fa94
radv: use blake3 for hashing pipeline layouts
...
This should also be faster.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30089 >
2024-07-10 07:35:19 +00:00
Samuel Pitoiset
51c6910ba7
radv: use blake3 for hashing descriptor set layouts
...
It's faster than sha1, up to 28% with 1M of bindings.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9476
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30089 >
2024-07-10 07:35:18 +00:00
Samuel Pitoiset
2c28ed7c5c
radv: remove radv_descriptor_set_layout::shader_stages
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30089 >
2024-07-10 07:35:18 +00:00
Iago Toral Quiroga
bb63b7b802
v3dv: don't lower fsat on V3D 7.x
...
This requires that our nir options are different across V3D versions
so we can't use a static global any more.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086 >
2024-07-10 08:30:21 +02:00
Iago Toral Quiroga
5b1e88760a
v3dv: make nir helpers receive nir compiler options from caller
...
We are about to make a change that will make compiler options
depend on v3d version, so helpers would usually need additional
parameters to retrieve them. Isntead of doing this, we will make
the callers get the options instead and provide them to the
helpers.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086 >
2024-07-10 08:30:15 +02:00
Iago Toral Quiroga
d3a684803d
v3d: don't lower fsat on V3D 7.x
...
This requires that our nir compiler options are different between V3D versions
so we can't use a static global any more.
total instructions in shared programs: 11241106 -> 11047872 (-1.72%)
instructions in affected programs: 4634458 -> 4441224 (-4.17%)
helped: 25119
HURT: 1717
Instructions are helped.
total threads in shared programs: 425238 -> 425036 (-0.05%)
threads in affected programs: 878 -> 676 (-23.01%)
helped: 79
HURT: 180
Inconclusive result (%-change mean confidence interval includes 0).
total loops in shared programs: 1968 -> 1933 (-1.78%)
loops in affected programs: 35 -> 0
helped: 35
HURT: 0
Loops are helped.
total uniforms in shared programs: 3845314 -> 3845219 (<.01%)
uniforms in affected programs: 213615 -> 213520 (-0.04%)
helped: 1338
HURT: 1059
Inconclusive result (value mean confidence interval includes 0).
total max-temps in shared programs: 2224313 -> 2221507 (-0.13%)
max-temps in affected programs: 236054 -> 233248 (-1.19%)
helped: 4863
HURT: 3357
Max-temps are helped.
total spills in shared programs: 4264 -> 4294 (0.70%)
spills in affected programs: 274 -> 304 (10.95%)
helped: 8
HURT: 16
total fills in shared programs: 6638 -> 6497 (-2.12%)
fills in affected programs: 2240 -> 2099 (-6.29%)
helped: 55
HURT: 17
total sfu-stalls in shared programs: 14942 -> 14353 (-3.94%)
sfu-stalls in affected programs: 4863 -> 4274 (-12.11%)
helped: 1287
HURT: 1165
Sfu-stalls are helped.
total inst-and-stalls in shared programs: 11256048 -> 11062225 (-1.72%)
inst-and-stalls in affected programs: 4635701 -> 4441878 (-4.18%)
helped: 25074
HURT: 1728
Inst-and-stalls are helped.
total nops in shared programs: 270482 -> 270621 (0.05%)
nops in affected programs: 27579 -> 27718 (0.50%)
helped: 1583
HURT: 1967
Inconclusive result (value mean confidence interval includes 0).
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086 >
2024-07-10 08:30:04 +02:00
Iago Toral Quiroga
33187012ab
broadcom/compiler: implement nir_op_fsat
...
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086 >
2024-07-10 08:29:59 +02:00
Iago Toral Quiroga
d62082a131
broadcom/compiler: disallow copy propagation of FMOV exclusive modifiers
...
Since .sat, .nsat and .max0 are only supported with FMOV we can't copy
propagate an FMOV with any of these unpack modifiers into a different
opcode.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086 >
2024-07-10 08:29:50 +02:00
Iago Toral Quiroga
fa959c2993
broadcom/compiler: add new float32 unpack modifiers in V3D 7.x
...
These are only supported with FMOV.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30086 >
2024-07-10 08:29:40 +02:00
Christian Gmeiner
ae3e0ae26a
etnaviv: isa: Rework branch instruction
...
Introduce unary and binary versions of the branch instruction. This will
give more ISA_OPC_BRANCH_XXX opcodes to work with. This helps to get rid
of these 'maybe' bitsets and is needed for the assembler.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30030 >
2024-07-09 18:33:34 +00:00
Christian Gmeiner
b771d2eef6
etnaviv: isa: Add support for bitset's displayname
...
In isaspec the displayname of a bitset defines what is shown in
dissassembly. The assembler only sees this representation and
needs to be able to handle it.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30030 >
2024-07-09 18:33:34 +00:00
Pierre-Eric Pelloux-Prayer
87439ffed1
ci: bump Fedora and Android libdrm2 to 2.4.122
...
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Corentin Noël <corentin.noel@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30043 >
2024-07-09 17:54:49 +00:00
Pierre-Eric Pelloux-Prayer
253f26558a
radeonsi, radv: bump libdrm_amdgpu version requirement
...
This will be needed for virtio native context support.
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30043 >
2024-07-09 17:54:49 +00:00
Connor Abbott
2c462fe9cc
ir3: Fix stg/ldg immediate offset on a7xx
...
Don't multiply by 4 twice. While we're here, fix the in-bounds check on
a6xx, since we need to account for the multiplying by 4. This was done
correctly on a7xx but the commit below didn't correctly port it to a6xx
when adding the multiply on a6xx.
Fixes: 01bac643f6 ("freedreno/ir3: Fix ldg/stg offset")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30046 >
2024-07-09 17:22:15 +00:00
Rob Clark
bde26a32e1
freedreno/drm: Add rd dumper support
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30083 >
2024-07-09 16:44:47 +00:00
Connor Abbott
c77a4e1db7
tu: Add VPC hardware workaround for a750
...
This fixes hangs in e.g.
dEQP-VK.transform_feedback.primitives_generated_query.concurrent.pgq_secondary_cmd_buffers.64bit.triangle_list_with_adjacency.draw
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30090 >
2024-07-09 13:57:33 +00:00
Connor Abbott
fe6471ded2
freedreno: Fix decoding primitive counter events on a7xx
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30090 >
2024-07-09 13:57:33 +00:00
Christian Gmeiner
898752818c
nak: Update comment about explicit padding
...
The bindgen thing is not used anymore and NAK_SHADER_INFO_STAGE_UNION_SIZE
is not defined anywhere.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30094 >
2024-07-09 13:44:13 +00:00
Pierre-Eric Pelloux-Prayer
43438aa9c4
radeonsi: fix ac_create_shadowing_ib_preamble parameter
...
shadowing_preamble is a si_pm4_state but ac_pm4_cmd_add expects a
ac_pm4_state.
Fixes: 428601095c ("ac,radeonsi import PM4 state from RadeonSI")
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876 >
2024-07-09 15:07:28 +02:00
Pierre-Eric Pelloux-Prayer
0a4f3d0b54
radeonsi/tests: correctly parse the family name
...
62a2ed8602 changed the format of GL_RENDERER and now the family name
is the 2nd word, not the first one.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876 >
2024-07-09 15:07:28 +02:00
Pierre-Eric Pelloux-Prayer
a7a1e3d329
radeonsi: fix crash in si_update_tess_io_layout_state for gfx8 and earlier
...
si_set_patch_vertices was only called if tcs.current was non-NULL but
this condition is not enough for GFX9+ since vs is used as ls.
Add a check in si_update_tess_io_layout_state instead, and set
sctx->do_update_shaders for case where the ls_current is not yet
available.
This fix crashes on GFX6.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876 >
2024-07-09 15:07:27 +02:00
Pierre-Eric Pelloux-Prayer
e8fc4546ff
winsys/radeon: fill lds properties
...
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876 >
2024-07-09 15:07:27 +02:00
Pierre-Eric Pelloux-Prayer
e7b200f20b
ac/info: remove has_syncobj
...
syncobj support is now required so these features are always available.
This is the same as 02fe3c32cd , without the radeonsi parts
to not break radeonsi on radeon.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876 >
2024-07-09 15:07:27 +02:00
Pierre-Eric Pelloux-Prayer
2021813450
Revert "ac, radeonsi: remove has_syncobj, has_fence_to_handle"
...
This reverts commit 02fe3c32cd .
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11352
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876 >
2024-07-09 15:07:27 +02:00
Pierre-Eric Pelloux-Prayer
84a563cf6f
radeonsi: fix buffer_size in si_compute_shorten_ubyte_buffer
...
buffer_size is not the full buffer size, but the part of the
buffer that is accessed by the compute shader.
This fixes the assert hit in si_set_shader_buffer.
Fixes: 1a99f50c7f ("radeonsi: use a compute shader to convert unsupported indices format")
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876 >
2024-07-09 15:07:27 +02:00
Connor Abbott
c84d1f5571
tu: Support bufferDeviceAddressCaptureReplay on kgsl
...
We use the method used by the blob, which sets the USE_CPU_MAP flag,
originally intended for SVM, to allocate from a separate address range
and to control the address by passing a preferred address to mmap().
With this we can capture and replay gfxreconstruct traces on kgsl for
apps that use BDA, and we can replay them on msm with a small hack to
increase the address space size:
echo 274877906944 > /sys/module/msm/parameters/address_space_size
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29251 >
2024-07-09 09:01:57 +01:00
msizanoen
e5e108706c
egl/wayland: Fix direct scanout with EGL_EXT_present_opaque
...
We select the feedback tranche according to the image format but not the
actual format that we will use for presentation. This breaks direct
scanout in cases where the application selected a visual with an alpha
channel but using EGL_EXT_present_opaque which previously worked as
expected.
Fix this by selecting the feedback tranche according to the actual
presentation format.
Fixes: 9ea9a963aa ("egl/wayland: Fix EGL_EXT_present_opaque")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28153 >
2024-07-09 06:42:33 +00:00
Alexandros Frantzis
4cac8468d4
egl/wayland: Fail EGL surface creation if opaque format is unsupported
...
When using the EGL_EXT_present_opaque extension we create wayland
buffers with the opaque variant of the surface format, while the
underlying image is created with the normal surface format. However,
there is no guarantee that the compositor supports that opaque format,
or that we can use that format with all the modifiers of the surface
format.
Since this is completely out of the control of the application, and the
compositor will disconnect the client with an error if the format is not
supported, this commit:
1. Fails EGL surface creation if it determines that the opaque format
cannot be used, either because it's not present at all, or because
it shares no modifier with the non-opaque format.
2. When creating the DRI image ensures that we use a modifier that's
also supported by the opaque format.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28153 >
2024-07-09 06:42:33 +00:00
Alexandros Frantzis
a271a34d59
egl/wayland: Pass dri2_wl_formats to create_dri_image
...
Make the dri2_wl_formats struct available in create_dri_image, in
preparation for upcoming changes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28153 >
2024-07-09 06:42:33 +00:00
Samuel Pitoiset
d1c97a1a50
radv: rework generating all graphics state for compiling pipelines
...
This introduces a new helper that will be used to generate a graphics
pipeline hash from a pCreateInfo struct only. Similar to RT.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30049 >
2024-07-09 05:48:31 +00:00
Samuel Pitoiset
8f102c9d61
radv: stop passing a pipeline to some graphics related helpers
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30049 >
2024-07-09 05:48:30 +00:00
Dave Airlie
fcf5946828
nvk: use 2k overallocation for shader heap.
...
NVIDIA has informed us via Arthur (and Ben) that 2K
is sufficient here, so move nvk to use that.
Reviewed-by: M Henning <drawoc@darkrefraction.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29746 >
2024-07-09 15:10:30 +10:00
Faith Ekstrand
c7c3942786
nouveau/push: Cache the last header DW to avoid read-back
...
The pushbuf may live in VRAM in which case readback gets very expensive.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
1c5901c0dc
nvk: Put descriptors in VRAM
...
This improves frame rates in The Witness by another 5% or so.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
a342379c56
nvk: Put CB0 in VRAM
...
This improves frame rates in The Witness by about 2%.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
68f1df5ebb
nvk/nvkmd: Be a lot more pedantic about VA alignments
...
The VA alignment now has two pieces: The bind alignment and the base
address alignment. The caller gets to request the later but not the
former. The bind alignment is based entirely on whether or not we know
a priori that the given VA will only ever be used for GART.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
7f45d20d2b
nvk/nvkmd: Be more specific about memory alignments
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
1db57bb414
nvk/nvkmd: Rework memory placement flags
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
e04bb3dffa
nvk: Drop nvk_buffer::is_local
...
It was always kinda BS and we aren't even using it anymore thanks to
alignment requirements.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
2689760e38
nvk/nvkmd: Flip the script on NO_SHARED
...
It's a positive flag in the kernel interface because it enables an
optimization and adds restrictions to the BO. But from a userspace PoV,
NO_SHARE shoudd be the default with import/export being something we
expressly have to ask for. This also reduces the number of flags we're
setting everywhere.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
1cee0c9cb7
nvk/nvkmd: Add real mem<->bo flag translation
...
This way we can start to disconnect nvkmd_mem_flags from
nouveau_ws_bo_flags.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
0c024da291
nvk: Do mem maps directly in nvkmd on nouveau
...
There's no point in the extra layer. It's all just mmap() and friends.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
7bd9b9d96c
nvk/nvkmd: Re-implement NVK_DEBUG=vm
...
This new implementation is hooked at the nvkmd level and also works for
queued binds via a bind ctx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
0abd7fa58a
nvk/nvmkd: Plumb parent pointers through everywhere
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
d3264fdfb9
nvk: Move debug flags int nvk_debug.h
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
d96bf198b4
nvk: Move Heaps and BO binding into nvkmd
...
We may want to move this even higher, into NVK at some point. However
the wrappers in the winsys layer really aren't doing us much. If
anything, now that nvkdm_mem::va is an nvkmd_va *, this actually makes
everything simpler because it's allocated through exactly the same paths
as sparse VA.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
0856c27dd1
nouveau/mme: Use fixed BO addresses in the MME test
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
c6c4483d0f
nouveau/mme: Don't leak data_bo
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
7173ae1130
nouveau/mme: Don't dereference an empty vector
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
60c3c272ec
nvk: Remove the last vestages of nouveau/winsys from core NVK
...
Everything now goes through NVKMD.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
8a516394f9
nvk: Use nvkmd_ctx for queue submit
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
996b152375
nvk: Use an nvkmd_ctx for sparse binding
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
a8550862b5
nvk: Convert the upload queue to nvkmd_ctx
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
053b7f0f30
nvk/nvkmd: Implement nvkmd_ctx for nouveau
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
87ca92d881
nvk/nvkmd: Add a context interface
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
29e3b19860
nvk: Use nvkmd_mem for the zero page, VAB, and CB0
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
92ac7db7c8
nvk: Use nvkmd_mem for the nvk_queue_state::push
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
d0593bb86c
nvk: Drop extra_bos from nvk_queue_submit_simple()
...
We aren't using it anymore and the only reason it existed in the first
place was for providing BO lists to the old UAPI.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
b86079d61e
nvk: Use an nvkmd_mem for the SLM area
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
d8d2ba9666
nvk: Use nvkmd_mem for query pools
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
d072bea5b7
nvk: Use nvkmd_mem for shader and event heaps
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
17623bc8a9
nvk: Use nvkmd_mem for descriptor tables
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
a87ee75737
nvk: Use nvkmd_mem in nvk_upload_queue
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
bf180d2bbf
nvk: Use nvkmd_mem for nvk_descriptor_pool
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
586990f89e
nvk: Use nvkmd_mem for nvk_cmd_pool
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
bf8115e3c2
nvk: Use nvkmd_mem for nvk_image::linear_tiled_shadow_mem
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
99ddddb18d
nvk: Use nvkmd_mem for nvk_device_memory
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
93792b5ef2
nvk: Add static wrappers for image/buffer binding
...
This makes the looping and error handling more clear. We're about to
make some of these ops capable of failing so getting that right is
really important.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
e63649da11
nvk/nvkmd: Implement the mem and va interfaces for nouveau
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
0b93c42ba1
nvk/nvkmd: Add memory and virtual address interfaces
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
4323d2ac54
nvk: Use the NVKMD interface for device enumeration
...
We'll keep nvk_device::ws_dev for now because it's useful to not have to
change everything over at once.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
4db1bd5846
nvk/nvkmd: Implement dev and pdev for nouveau
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:23 +00:00
Faith Ekstrand
c8b36bbcc0
nvk: Add the start of a KMD abstraction
...
This is just the initial header and structs for device enumeration and a
few dev and pdev queries.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:22 +00:00
Faith Ekstrand
6de4a408f5
nvk: Initialize the debug flags in nvk_instance
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:22 +00:00
Faith Ekstrand
1f405ef9c6
nvk: Fetch debug flags from the physical device
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:22 +00:00
Faith Ekstrand
04bdbb71de
nvk: Align sparse-bound images to the sparse binding size
...
Instead of trusting in nil::Image::align_B, force it to the sparse
binding size because we know we're going to try and sparse bind it.
Otherwise, small sparse images could fail to bind at the bind step.
Fixes: 7321d151a9 ("nvk: Add support for sparse images")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:22 +00:00
Faith Ekstrand
58181b7bbc
nvk: Bump the sparse alignment requirement on buffers to 64K
...
Otherwise, if they live in VRAM, binding might fail.
Fixes: 03f0f01904 ("nvk: Add support for sparse buffers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:22 +00:00
Faith Ekstrand
9bd64cbefe
nvk: Why are nvk_image.c/h writeable?
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30033 >
2024-07-09 01:22:22 +00:00
Karol Herbst
47377b550f
Revert "rusticl/queue: gracefully stop the worker thread"
...
Apparently this code caused issues and the fix was only papering over the
issue, which I now I can't trigger anyway.
This reverts commit 9d458b7fc1 .
Fixes: 9d458b7fc1 ("rusticl/queue: gracefully stop the worker thread")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30067 >
2024-07-08 23:30:31 +00:00
Karol Herbst
cf27fd22c4
Revert "rusticl/queue: run rustfmt"
...
This reverts commit 47b1241251 .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30067 >
2024-07-08 23:30:31 +00:00
Faith Ekstrand
4f89af3723
vulkan: Use u_cnd_monotonic for vk_sync_timeline
...
The code we had for handling this with c11 cnd_t was gross. Let's use a
primitive that actually works.
Reviewed-by: Derek Foreman <derek.foreman@collabora.com >
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29924 >
2024-07-08 22:09:06 +00:00
Faith Ekstrand
6aaf6d090c
vulkan/wsi: Delete wsi_init_pthread_cond_monotonic
...
Reviewed-by: Derek Foreman <derek.foreman@collabora.com >
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29924 >
2024-07-08 22:09:06 +00:00
Faith Ekstrand
3c4e1c918c
vulkan/wsi/queue: Use mtx_t and u_cnd_monotonic
...
Reviewed-by: Derek Foreman <derek.foreman@collabora.com >
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29924 >
2024-07-08 22:09:06 +00:00
Faith Ekstrand
97e22b70b4
vulkan/wsi/display: Use mtx_t and u_cnd_monotonic
...
Reviewed-by: Derek Foreman <derek.foreman@collabora.com >
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29924 >
2024-07-08 22:09:06 +00:00
Faith Ekstrand
7aac3ea26a
vulkan/wsi/x11: Use mtx_t and u_cnd_monotonic
...
Reviewed-by: Derek Foreman <derek.foreman@collabora.com >
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29924 >
2024-07-08 22:09:06 +00:00
Faith Ekstrand
3ba664c640
vulkan/wsi/x11: Use c11/threads for thread spawning
...
Reviewed-by: Derek Foreman <derek.foreman@collabora.com >
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29924 >
2024-07-08 22:09:06 +00:00
Faith Ekstrand
a0820a2a37
vulkan/wsi/wayland: Use mtx_t and u_cnd_monotonic
...
Reviewed-by: Derek Foreman <derek.foreman@collabora.com >
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29924 >
2024-07-08 22:09:06 +00:00
Faith Ekstrand
bf3052009a
util/cnd_monotonic: Use a void * on Windows
...
This is the same thing that our win32 implementation of c11/threads does
and it allows us to avoid using CONDITION_VARIABLE in a header.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29924 >
2024-07-08 22:09:06 +00:00
Faith Ekstrand
71524fc82e
util/cnd_monotonic: Move the guts to a c file
...
We need to be able to include windows.h which is pretty mean to pull in
globally.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29924 >
2024-07-08 22:09:06 +00:00
Esdras Tarsis
2bbb859343
nvk: Enable 8bit and 16bit access in VK_KHR_workgroup_memory_explicit_layout.
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30059 >
2024-07-08 21:59:42 +00:00
David Rosca
20b76fe1d4
gallium: Remove pipe_h264_picture_desc.slice_parameter.slice_count
...
This is a duplicate of pipe_h264_picture_desc.slice_count and is not
currently used anywhere.
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30011 >
2024-07-08 19:09:38 +00:00
David Rosca
7c8a0c135c
frontends/va: Support multi elements slice parameter buffers for H264/5
...
Same as AV1, this is also valid for H264 and HEVC.
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30011 >
2024-07-08 19:09:38 +00:00
David Rosca
feba91d390
frontends/va: Rename slice_idx to have_slice_params and move to context
...
Add explanation what it does.
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30011 >
2024-07-08 19:09:38 +00:00
David Rosca
e0c15579f3
frontends/va: Move slice_data_offset to context
...
Before it only worked correctly if application sends all data/parameter
buffers in one RenderPicture call, which most applications do but it's
also valid to use multiple RenderPicture calls.
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30011 >
2024-07-08 19:09:37 +00:00
David Rosca
7b6749224f
frontends/va: Simplify AV1 slice parameters handling
...
Slice count is already tracked so no need to pass it from
RenderPicture. This way it also works correctly if application sends
the slice data/parameters buffers in multiple RenderPicture calls instead
of all at once.
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30011 >
2024-07-08 19:09:37 +00:00
Yogesh Mohan Marimuthu
47fb4b45f2
radeonsi: add more comments in si_query.c
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30052 >
2024-07-08 17:51:25 +00:00
Yogesh Mohan Marimuthu
51885bba64
radeonsi: rename query_hw_ops to hw_query_ops match sw
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30052 >
2024-07-08 17:51:25 +00:00
Yogesh Mohan Marimuthu
e00400e605
radeonsi: use reseults_end instead of unprepared to init query buffer
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30052 >
2024-07-08 17:51:25 +00:00
Yogesh Mohan Marimuthu
068f631814
radeonsi: remove si_query_hw_ops table and call func directly
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30052 >
2024-07-08 17:51:25 +00:00
Mike Blumenkrantz
a3c4d257a2
zink: don't lower fpow
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30070 >
2024-07-08 16:35:21 +00:00
Alyssa Rosenzweig
0ce2e6594d
nir/opt_constant_folding: fix array size define
...
In practice these are equal but the old code was semantically wrong: that
dimension is "sources" not "components". Use the correct #define. This came up
when reviewing https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29994
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30066 >
2024-07-08 14:34:29 +00:00
Tatsuyuki Ishi
24aab6bfaf
vk_cmd_queue_gen: Exclude CmdDispatchGraphAMDX
...
With the weak symbols changes and -Dvulkan-beta this fails to link.
Co-authored-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Fixes: 2953c93cca ("vulkan Add enqueue entrypoint for CmdDispatchGraphAMDX")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30057 >
2024-07-08 13:17:42 +00:00
Mike Blumenkrantz
41836133ce
aux/tc: update docs to indicate replaced buffers have multiple pipe_resources
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30040 >
2024-07-08 12:35:19 +00:00
Patrick Lerda
f3c9ea9b8d
st/pbo_compute: fix async->nir memory leak
...
This is an issue happening on radeonsi after the commit
6f8e6fb99c "mesa/st: use compute pbo download for readpixels".
This commit enables a new code path which has this memory leak.
For instance, this issue is triggered on radeonsi with
"piglit/bin/glsl-fs-raytrace-bug27060 -auto -fbo":
Too many leaks! Only the first 5000 leaks encountered will be reported.
Indirect leak of 327424 byte(s) in 5582 object(s) allocated from:
#0 0x7fe27fa4d7ef in __interceptor_malloc (/usr/lib64/libasan.so.6+0xb17ef)
#1 0x7fe2717fd4df in ralloc_size ../src/util/ralloc.c:118
#2 0x7fe272dbbae4 in calc_dom_children ../src/compiler/nir/nir_dominance.c:138
#3 0x7fe272dbbae4 in nir_calc_dominance_impl ../src/compiler/nir/nir_dominance.c:192
#4 0x7fe272b7f4a2 in nir_metadata_require ../src/compiler/nir/nir_metadata.c:40
#5 0x7fe272ba0d50 in nir_opt_cse_impl ../src/compiler/nir/nir_opt_cse.c:43
#6 0x7fe272ba0d50 in nir_opt_cse ../src/compiler/nir/nir_opt_cse.c:67
#7 0x7fe272686f83 in gl_nir_opts ../src/compiler/glsl/gl_nir_linker.c:92
#8 0x7fe271a31e69 in create_conversion_shader ../src/mesa/state_tracker/st_pbo_compute.c:701
#9 0x7fe271a353fa in create_conversion_shader_async ../src/mesa/state_tracker/st_pbo_compute.c:810
#10 0x7fe271806ea8 in util_queue_thread_func ../src/util/u_queue.c:309
#11 0x7fe27186379a in impl_thrd_routine ../src/c11/impl/threads_posix.c:67
#12 0x7fe27ea9a7c3 (/lib64/libc.so.6+0x867c3)
...
SUMMARY: AddressSanitizer: 1384704 byte(s) leaked in 17291 allocation(s).
Fixes: 5dab7673e1 ("mesa/st: add specialized pbo download shaders")
Signed-off-by: Patrick Lerda <patrick9876@free.fr >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30068 >
2024-07-08 11:41:17 +00:00
Juan A. Suarez Romero
4581bf595b
broadcom: follow version naming convention
...
We usually name the functions that depend on hardware version as
v3d<version>_foo.
Keep the same convention in QPU and lower_image_load_store, so it makes
easier when searching for versioned functions.
Acked-by: Iago Toral Quiroga <itoral@igalia.com >
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30000 >
2024-07-08 11:19:31 +00:00
Juan A. Suarez Romero
a10957adb6
broadcom/qpu: clean all versions not supported
...
Right now we only support V3D 4.2 and V3D 7.1, so clean older versions
that were left in the QPU.
Acked-by: Iago Toral Quiroga <itoral@igalia.com >
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30000 >
2024-07-08 11:19:30 +00:00
Erico Nunes
aa4d0836fe
lima: fix surface reload flags assignment
...
These flags are set at the end of the job based on its buffer usage and
then checked by following jobs.
If an application toggles stencil and depth tests alternatigly in
a sequence of jobs while also relying on previous contents to render,
with the current assignment the reload flags for depth or stencil may
be cleared incorrectly and a depth/stencil buffer may not be properly
reloaded.
Cc: mesa-stable
Signed-off-by: Erico Nunes <nunes.erico@gmail.com >
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30065 >
2024-07-08 08:44:04 +00:00
Lucas Stach
f0c54e02cf
etnaviv: always flush pending queries on get_query_result
...
This is basically a port from commit 591a3c738d ("freedreno: Be more
strict about QUERY_AVAILABLE to simplify the code.") to etnaviv.
perfmon queries already forced such a flush by setting no_wait_cnt
to a value above the flush threshold, now we unify the behavior between
occlusion and perfmon queries.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30055 >
2024-07-08 08:11:47 +00:00
Lucas Stach
3bae3217d5
etnaviv: drm: don't skip flush when there are active PMRs
...
When there are active PMRs attached to the command buffer we can
not optimize the flush away, as that results in the queries never
reaching their expected sequence number, livelocking readers
waiting for the query result.
Fixes: 148658638e7f ("etnaviv: drm: Be able to mark end of context init")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30055 >
2024-07-08 08:11:47 +00:00
Timothy Arceri
d1767ddd13
glsl/tests: fix test_gl_lower_mediump
...
This fixes test_gl_lower_mediump to properly test linking, which also
means we can drop all the custom nir calls as we are now simply passing
the tests directly through the real nir linking code.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30034 >
2024-07-08 06:38:19 +00:00
Timothy Arceri
2f5b99ec17
glsl/standalone: init EmptyUniformLocations
...
This updates the scaffolding to reflect init_shader_program() and
will be required in the following patch to avoid a segfault.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30034 >
2024-07-08 06:38:19 +00:00
Timothy Arceri
5ae5229e3d
glsl/mesa: remove UniformHash field
...
Unused since 9617184bc2
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30034 >
2024-07-08 06:38:19 +00:00
Eric Engestrom
801ed4d032
ci: simplify setting .no-auto-retry now that it isn't bundled with unrelated rules:
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30004 >
2024-07-07 19:31:44 +00:00
Eric Engestrom
f37af2ab8c
ci: split .no-auto-retry out of .scheduled_pipeline-rules
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30004 >
2024-07-07 19:31:44 +00:00
Konstantin Seurer
d9e41e8a8c
nir: Stop using "capture : true" for nir_opt_algebraic
...
"calture : true" is suboptimal and and prevents the script from writing
multiple files in one go.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30041 >
2024-07-06 15:51:06 +00:00
Dmitry Baryshkov
b018489245
freedreno/registers: drop display-related register files
...
Neither freedreno nor turnip make use of the display-related source
files. With the XML files being imported to the kernel, drop them from
Mesa to prevent possible confusion and/or deviation between those files.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27787 >
2024-07-06 15:16:48 +00:00
Sviatoslav Peleshko
b0b1907fa5
mesa: Fix PopAttrib not restoring states that changed on deeper stack level
...
Currently on each pop we reset the PopAttribState to the value from the
last push. But if we assume a sequence "push(X), push(Y), changeX(),
pop(), pop()": the first pop will remove X from PopAttribState, so the
second pop will not even try to restore X, leaving a wrong value forever.
Fix this by "bubbling up" the changed states that were not restored by pop.
Fixes: 68030bbf ("mesa: only pop states in glPopAttrib that have been changed since glPushAttrib")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11417
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30038 >
2024-07-06 07:08:30 +00:00
Jordan Justen
e9f63df2f2
intel/dev: Enable LNL PCI IDs without INTEL_FORCE_PROBE
...
Tested with upstream drm kernel:
commit fb625bf6187d97c3cd28d680b14bf80f84207e5a
Merge: 91fdc5e76513 9dec27bb8ae4
Author: Dave Airlie <airlied@redhat.com >
Date: Fri Jun 28 09:41:03 2024 +1000
Merge tag 'drm-habanalabs-next-2024-06-23' of https://github.com/HabanaAI/drivers.accel.habanalabs.kernel into drm-next
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24377 >
2024-07-05 22:00:49 +00:00
Faith Ekstrand
73ec9f0183
nvk: Silently fail to enumerate if not on nouveau
...
The NVIDIA proprietary driver exposes a DRM device these days and this
can trip up NVK as it advertises an NVIDIA device id. We fail to
enumerate but the check for nouveau happens too late and we throw a
warning. This means tha if NVK is even installed side-by-side with the
proprietary driver, we spam warnings on every device enumeration. It's
better to fail silently.
Fixes: 83786bf1c9 ("nvk: add vulkan skeleton")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11441
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30035 >
2024-07-05 20:36:01 +00:00
Faith Ekstrand
1b56292733
nvk: Don't emit conservative rasterization before Maxwell B
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30054 >
2024-07-05 20:22:58 +00:00
Faith Ekstrand
ea2aa3ca83
nvk: Re-order conservative rasterization checks
...
Generally, we check for the newest generation first and treat the later
generations as a fallback path.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30054 >
2024-07-05 20:22:58 +00:00
Faith Ekstrand
08a667e786
nvk: Fix whitespace issues around conservative rasterization
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30054 >
2024-07-05 20:22:58 +00:00
Christian Gmeiner
d1b5a44877
etnaviv: isa: Add support for extended instructions
...
An extended instruction uses 0x7f as opcode and stores the extended
opcode in the IMMED of src2.
Reverse engineered with the following dEQPs:
- dEQP-GLES31.functional.shaders.builtin_functions.integer.findmsb.int_lowp_vertex
- dEQP-GLES31.functional.shaders.builtin_functions.integer.findlsb.uvec3_lowp_fragment
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Acked-by: Lucas Stach <l.stach@pengutronix.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30010 >
2024-07-05 20:07:11 +00:00
Christian Gmeiner
63944c3347
etnaviv: isa: Drop 1:1 mapping of opc to bits
...
As we switched to an isaspec powered encoder there is no
need for this strict mapping of opc to instruction bits.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Acked-by: Lucas Stach <l.stach@pengutronix.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30010 >
2024-07-05 20:07:11 +00:00
Danylo Piliaiev
17c12a9924
turnip/kgsl: Support external memory via ION/DMABUF buffers
...
android12-5.10 kernel has ION disabled and the buffers should
be allocated via dma_heap.
Also before that there was ION abi breakage, which is handled here, see:
https://source.android.com/devices/architecture/kernel/ion_abi_changes
ion_4.19.h and ion.h are copied from libion:
https://android.googlesource.com/platform/system/memory/libion
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14928 >
2024-07-05 15:33:47 +00:00
Tatsuyuki Ishi
048f761fae
vk_entrypoints_gen: Apply hidden visibility to generated symbols
...
The symbols were not getting hidden visibility because
-fvisibility=hidden only applies to definitions, not declarations.
Declare them as hidden explicitly in the header so they don't end up in
.dynsym of linked shared objects.
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29986 >
2024-07-05 14:40:39 +00:00
Tatsuyuki Ishi
c217e8c21f
vk_entrypoints_gen: Rework ATTR_WEAK to unify Unix and MinGW
...
The way ATTR_WEAK works is changed to eliminate the "don't declare as
weak on MinGW" weirdness. When a weak is not undefined, MinGW requires
the definition to be a regular symbol. Instead of declaring as weak
everywhere, we now declare the symbol as a regular by default, and only
make it weak when it needs to fallback to NULL when undefined, which is
only needed for the dispatch table. This unifies the approach for Unix
and MinGW.
The name ATTR_WEAK is changed to VK_ENTRY_WEAK since it's now controlled
by the entrypoint specific VK_ENTRY_USE_WEAK flag.
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29986 >
2024-07-05 14:40:39 +00:00
Tatsuyuki Ishi
c8c131fba8
vk_entrypoints_gen: Add missing ATTR_WEAK for instance and physdev entrypoints
...
I'm not sure why Clang didn't warn for this case, but since we are
declaring in both .h and .c we should match both.
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29986 >
2024-07-05 14:40:39 +00:00
Samuel Pitoiset
1a3b3b845b
radv: simplify determining when a VS prolog is needed
...
Only if a VS is compiled without the vertex input state.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30045 >
2024-07-05 13:33:24 +00:00
Samuel Pitoiset
7608aada6f
radv: simplify determining when the rasterization primitive is unknown
...
Either if the vertex input state is missing, or if no TES/GS/MS.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30045 >
2024-07-05 13:33:24 +00:00
Samuel Pitoiset
0c0ecc90c4
radv: move radv_hash_shaders() to radv_graphics_pipeline.c
...
And rename it for consistency with compute/RT hash functions.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30045 >
2024-07-05 13:33:24 +00:00
Samuel Pitoiset
b51af513dd
radv: remove unnecessary radv_pipeline_has_ngg() function
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30045 >
2024-07-05 13:33:24 +00:00
Samuel Pitoiset
b5193c8937
radv: remove unused get_vs_output_info() function
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30045 >
2024-07-05 13:33:24 +00:00
Samuel Pitoiset
b43b71450c
radv: simplify importing libraries with retained shaders
...
It's possible to use create_flags directly.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30045 >
2024-07-05 13:33:24 +00:00
Samuel Pitoiset
6aba052f82
radv: remove unused parameter to radv_pipeline_import_retained_shaders()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30045 >
2024-07-05 13:33:24 +00:00
Mike Blumenkrantz
158369c38a
zink: enable compute pbos for turnip
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30026 >
2024-07-05 12:05:32 +00:00
Konstantin Seurer
0208927bcf
radv: Always use dynamic line smoothing
...
Static enablement is too complex for a feature that is barely used.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26833 >
2024-07-05 08:58:53 +00:00
Konstantin Seurer
d571e19966
radv: Fix smooth lines with dynamic polygon mode and topology
...
Non-line modes need to disable the smoothing paths. (overrasterization,
shader code)
Fixes: 85cbdba ("radv: add support for smooth lines")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9393
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26833 >
2024-07-05 08:58:53 +00:00
Karol Herbst
18dfde9985
rusticl/program: use default in more places
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29946 >
2024-07-05 08:31:32 +00:00
Karol Herbst
f08f770f16
rusticl/program: update binary format
...
This adds a magic number and the device name to the binary in order to
verify we indeed have a binary we can parse and matches the device.
Also save the binary header explicitly in little-endian order, so that we
at least make sure that's always the same.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29946 >
2024-07-05 08:31:31 +00:00
Karol Herbst
eda15ddafa
rusticl/program: use blob.h to parse binaries
...
It checks for alignment and overruns, and is a lot safer than whatever was
done before here.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29946 >
2024-07-05 08:31:31 +00:00
Karol Herbst
81bb379c94
rusticl/program: make binary API not crash on errors
...
Also properly return per device errors as required by the spec.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29946 >
2024-07-05 08:31:31 +00:00
Karol Herbst
34ecf560df
rusticl/program: move binary parsing into its own function
...
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29946 >
2024-07-05 08:31:31 +00:00
Jordan Justen
0b6875ca0e
intel/perf/xe: Fix free pointer location in xe_add_config()
...
Fixes: 6258c84375 ("intel/perf: Refactor and add Xe KMD support to add and remove configs")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30037 >
2024-07-05 00:25:03 -07:00
Eric Engestrom
9a3172e489
bin/ci: allow bugfixes in requirements.txt
...
The one exception is filecache which is just a 0.x which means any other
0.x might break compatibility, so we can't just set it to `0.*`.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30016 >
2024-07-04 20:15:28 +00:00
Mike Blumenkrantz
4576f440c3
zink: add an a750 skip
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30042 >
2024-07-04 13:42:53 +00:00
Corentin Noël
6aec920bbe
ci: Make sure to install libraries in the right directory on debian
...
Meson is using dpkg-architecture to guess the right triplet for the lib directory
make sure to have it installed (from dpkg-dev) to always use the right directory.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30015 >
2024-07-04 09:27:28 +00:00
Eric Engestrom
0b09cf63a8
ci_run_n_monitor: add RUNNING_STATUSES and use it where appropriate
...
A couple of these were trivially missing the `created` status which
usually doesn't stay for long enough for this very slow script to notice.
The `cancel_job()` function will no longer cancel manual jobs waiting to
be started.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29917 >
2024-07-04 09:14:36 +00:00
Eric Engestrom
a578101d5b
ci_run_n_monitor: use COMPLETED_STATUSES in more places
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29917 >
2024-07-04 09:14:36 +00:00
Eric Engestrom
fb2adbeeb7
ci_run_n_monitor: be coherent about using sets for element in group checks
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29917 >
2024-07-04 09:14:35 +00:00
Eric Engestrom
fa3d529f55
ci_run_n_monitor: add support for new canceling job status
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29917 >
2024-07-04 09:14:35 +00:00
Danylo Piliaiev
2fbdc4d462
ir3: Fix decoding of stib.b/ldib.b with offset
...
The OFFSET_LO in #instruction-cat6-a6xx-ibo-load-store aliased with
opcode of other instructions, resolve this by being less lax in some
instruction definitions.
A proper way to solve this would probably be to reconstruct instructions
hierarchy, but it's a much more complex task.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30018 >
2024-07-04 08:40:47 +00:00
Danylo Piliaiev
2c7e07655c
ir3/tests: Make possible to add generated disasm tests
...
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30018 >
2024-07-04 08:40:47 +00:00
Danylo Piliaiev
b5f0c44f2a
ir3/tests: Make possible to specify raw instr value as uint64
...
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30018 >
2024-07-04 08:40:46 +00:00
MastaG
d17338d403
gallivm: Call StringMapIterator from llvm:: scope
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11392
Fixes: b035d9cab5 ("gallivm: use getHostCPUFeatures on x86/llvm-4.0+.")
Reviewed-by: David Heidelberg <david@ixit.cz >
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30009 >
2024-07-03 21:55:54 -07:00
José Roberto de Souza
f9efedb1a1
intel/dev: Replace intel_device_info::apply_hwconfig by a gfx version check
...
There is no plans to remove hwconfig from platforms 12.5 and newer
so lets replace this bool by a ip version check.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27897 >
2024-07-03 22:17:37 +00:00
Mike Blumenkrantz
03a85edff7
ci: bump vvl to v1.3.289
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30025 >
2024-07-03 21:37:11 +00:00
Lionel Landwerlin
6f1f3ba444
hasvk: pass anv_address to predicate helper
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29997 >
2024-07-03 21:10:13 +00:00
Lionel Landwerlin
1279bba837
hasvk: move cmd_emit_timestamp initialization to genX
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29997 >
2024-07-03 21:10:13 +00:00
Lionel Landwerlin
b393ede8c8
intel/ds: remove duplicate arguments
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29997 >
2024-07-03 21:10:13 +00:00
Lionel Landwerlin
aa737e124c
anv: fix u_trace on < Gfx12.0
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 3984875792 ("u_trace: extend tracepoint end_of_pipe bit into flags")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29997 >
2024-07-03 21:10:13 +00:00
Faith Ekstrand
37d58b816b
vulkan/meta: Use demote instead of discard
...
We don't have the NIR options when we go to create the shader so
nir_discard_if() will segfault.
Fixes: 9b1a748b5e ("nir: remove nir_intrinsic_discard")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30028 >
2024-07-03 20:33:27 +00:00
Khem Raj
5a9c052ba7
amd: Include missing llvm IR header Module.h
...
With LLVM-19, Module.h header is not being pulled, which results in
compile errors e.g.
src/amd/llvm/ac_llvm_helper.cpp:102:10: error: no matching function for call to ‘unwrap(LLVMOpaqueModule*&)’
102 | unwrap(module)->setTargetTriple(TM->getTargetTriple().getTriple());
| ~~~~~~^~~~~~~~
In file included from /mnt/b/yoe/master/build/tmp/work/x86_64-linux/mesa-native/24.0.7/recipe-sysroot-native/usr/include/llvm/IR/Type.h:18,
from /mnt/b/yoe/master/build/tmp/work/x86_64-linux/mesa-native/24.0.7/recipe-sysroot-native/usr/include/llvm/IR/DerivedTypes.h:23,
from /mnt/b/yoe/master/build/tmp/work/x86_64-linux/mesa-native/24.0.7/recipe-sysroot-native/usr/include/llvm/IR/InstrTypes.h:26,
from /mnt/b/yoe/master/build/tmp/work/x86_64-linux/mesa-native/24.0.7/recipe-sysroot-native/usr/include/llvm/Analysis/TargetLibraryInfo.h:14,
from ../mesa-24.0.7/src/amd/llvm/ac_llvm_helper.cpp:8:
Its getting the definition from llvm/IR/Type.h instead of Module.h and caused
confusion to compiler
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11424
Signed-off-by: Khem Raj <raj.khem@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29993 >
2024-07-03 19:26:47 +00:00
Christian Gmeiner
8d0659efa5
ci/etnaviv: Drop shaders@glsl-bug-110796 line
...
Piglit has been fixed to skip this test when no GLES 3.2 support is present.
Fixes: dfabed2fc9 ("Uprev Piglit to cf8daaf5ba90fc9b8a0e144355026e2a14c79944")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: Lucas Stach <l.stach@pengutronix.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30020 >
2024-07-03 19:10:25 +00:00
Ali Homafar
a174e986c7
lavapipe: Set ICD api_version to 1.3
...
Lavapipe has been 1.3 compliant for a couple years, now.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30024 >
2024-07-03 18:32:47 +00:00
David Rosca
28fdc4b372
gallium: Remove PIPE_VIDEO_CAP_EFC_SUPPORTED
...
Reviewed-by: Thong Thai <thong.thai@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29932 >
2024-07-03 17:56:28 +00:00
David Rosca
2b93a918b3
frontends/va: Check if target buffer is supported in vlVaEndPicture
...
This is mainly to reject buffers allocated with modifiers not supported
for given entrypoint. There is no interface to query supported modifiers
for different formats and entrypoints in libva, so applications can
import externally allocated buffers that may be unsupported with some
entrypoints.
Reviewed-by: Thong Thai <thong.thai@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29932 >
2024-07-03 17:56:28 +00:00
David Rosca
a7469a9ffd
frontends/va: Rework EFC logic
...
Currently EFC would be used for every RGB->NV12 conversion, even if the
target surface wasn't going to be used as encode input. Also another
issue is that there may be multiple conversions from the same source
surface before the encode operation (this is the case with B-frames
when using one source surface).
EFC is now used only if the postproc conversion is the last postproc
operation immediately before encoding.
Until it's been observed that this is the case, the shader conversion is
also applied as a fallback in case EFC could not be used.
Tested with (fixes EFC + H264 with B-frames on radeonsi):
ffmpeg -vaapi_device /dev/dri/renderD128 -f lavfi -i testsrc \
-vf hwupload,scale_vaapi=format=nv12 -c:v h264_vaapi -bf 3 \
-vframes 200 out.mp4
Reviewed-by: Thong Thai <thong.thai@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29932 >
2024-07-03 17:56:28 +00:00
David Rosca
735c467197
frontends/va: Use is_video_target_buffer_supported for EFC
...
Move the internal logic to driver.
Reviewed-by: Thong Thai <thong.thai@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29932 >
2024-07-03 17:56:28 +00:00
David Rosca
40c3a53fec
radeonsi: Implement is_video_target_buffer_supported
...
Check EFC supported formats and reject DCC.
Reviewed-by: Thong Thai <thong.thai@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29932 >
2024-07-03 17:56:27 +00:00
David Rosca
03d4ec7321
gallium: Add is_video_target_buffer_supported
...
This will be used to replace PIPE_VIDEO_CAP_EFC_SUPPORTED.
Reviewed-by: Thong Thai <thong.thai@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29932 >
2024-07-03 17:56:27 +00:00
José Roberto de Souza
f28d2c1040
intel/perf: Adjust EU count for Xe2+
...
Xe2+ OA equations expects actual EU count but KMD returns legacy EU count.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29529 >
2024-07-03 17:15:05 +00:00
José Roberto de Souza
9b5ba06122
intel/perf: Do not add INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_PEC
...
MI_REPORT_PERF_COUNT reports all 64 PEC counters, so there is no
need to read individual registers.
Also the individual registers reads privileged and UMDs can't access
it, causing it to always read as always zero and overwritting valid
data read with MI_REPORT_PERF_COUNT.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29529 >
2024-07-03 17:15:05 +00:00
José Roberto de Souza
7b5bf6dcca
intel/perf: Return LNL OA sample format
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29529 >
2024-07-03 17:15:05 +00:00
José Roberto de Souza
f684f4efb0
intel/perf: Add support for LNL OA sample format size
...
LNL OA sample format is 576 bytes long while previous platforms were
256 bytes, so now we need a function to return the OA sample
format size.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29529 >
2024-07-03 17:15:05 +00:00
José Roberto de Souza
18775827bd
intel/perf: Implement intel_perf_query_result_accumulate() for gfx 20+
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29529 >
2024-07-03 17:15:05 +00:00
Eric Engestrom
5a8f6ea35c
docs: add sha256sum for 24.1.3
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30022 >
2024-07-03 17:08:37 +00:00
Eric Engestrom
5ae4265398
docs: update calendar for 24.1.3
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30022 >
2024-07-03 17:08:37 +00:00
Eric Engestrom
dcd4cd8b44
docs: add release notes for 24.1.3
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30022 >
2024-07-03 17:08:37 +00:00
Connor Abbott
2988f43420
tu: Support VK_EXT_fragment_density_map on a750
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29938 >
2024-07-03 16:36:19 +00:00
Connor Abbott
b0599a7fe2
tu: Fix fdm_apply_load_coords patchpoint size
...
Fixes: 7429ca3115 ("tu: Use SS6_INDIRECT consts upload path for 3d blits")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29938 >
2024-07-03 16:36:19 +00:00
Connor Abbott
bd179e6213
tu: Make cs writeable for GMEM loads when FDM is enabled
...
This was accidentally dropped.
Fixes: 21334e3b53 ("turnip: Move gmem clears and loads to the first subpass that uses them.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29938 >
2024-07-03 16:36:19 +00:00
Connor Abbott
6185134f28
ir3: Fix UBO size with indirect driver params
...
So far the only user of indirect driver params is FDM so this wasn't
noticed before.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29938 >
2024-07-03 16:36:19 +00:00
Connor Abbott
08d5505fa8
tu: Add support for aligned substreams
...
This is useful when the substream needs to be inside a UBO.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29938 >
2024-07-03 16:36:19 +00:00
Eric Engestrom
2bb6ea3a69
docs/features: mark VK_KHR_maintenance7 as implemented on anv and lvp
...
See 9a68be59ca ("anv: enable VK_KHR_maintenance7")
and 3d2d4f76d5 ("lavapipe: maint7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30017 >
2024-07-03 16:29:02 +00:00
Mike Blumenkrantz
6f8e6fb99c
mesa/st: use compute pbo download for readpixels
...
this massively improves (>100%) ReadPixels perf in a number of cases
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29841 >
2024-07-03 15:46:06 +00:00
Mike Blumenkrantz
ef0a156670
st/pbo_compute: special case stencil extraction from Z24S8
...
this otherwise tries to use the depth component and a UNORM format,
which returns all zeroes
cc: mesa-stable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29841 >
2024-07-03 15:46:05 +00:00
Zan Dobersek
968163524a
tu: add format feature flag checks for VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
...
In tu_get_image_format_properties(), image usage flags are matched against
sets of required format feature flags for the specified image format.
These mappings are defined in the Vulkan 1.3 spec in section 49.3.3.,
"Format Feature Dependent Usage Flags".
Handling for the VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT flag was missing. When
specified, at least one of color attachment or depth-stencil attachment
format feature flags should be present for the given format.
Fixes 110 new Vulkan CTS tests:
- dEQP-VK.api.info.unsupported_image_usage.linear.*
- dEQP-VK.api.info.unsupported_image_usage.optimal.*
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30013 >
2024-07-03 15:14:55 +00:00
Samuel Pitoiset
9b2aebebac
ci: bump vkd3d-proton to 3d46c082906c77544385d10801e4c0184f0385d9
...
This contains more tests for RADV, especially some task+mesh DGC tests.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29955 >
2024-07-03 13:16:09 +00:00
Samuel Pitoiset
dc89028bbc
radv: advertise VK_KHR_maintenance7
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29956 >
2024-07-03 12:39:01 +00:00
Romaric Jodin
65c0ef859f
intel/brw: allocate large table in the heap instead of the stack
...
When having a large number of virtual register this table can be too
large to be allocated on the stack.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30008 >
2024-07-03 12:10:28 +00:00
Mike Blumenkrantz
753d253df7
st/pbo: fix MESA_COMPUTE_PBO=spec crash on shutdown
...
the nir here has already been freed by the driver
Fixes: b8c82b50f7 ("mesa/st: add MESA_COMPUTE_PBO env var")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29998 >
2024-07-03 11:35:42 +00:00
Juan A. Suarez Romero
2a3b983728
broadcom/ci: run some GL tests in arm32 arch
...
While Raspberry PI OS 64-bit is the suggested version for rpi3 devices
and newers, for older devices like rpi1 to rpi2, which uses the same
GPU, the recommended flavour is 32-bit.
Also, while 64-bit is the recommended version, users can still decide to
use the 32-bit flavour.
Hence, spend a bit of nightly time to run a subset of the OpenGL/ES
tests.
Reviewed-by: Eric Engestrom <eric@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30003 >
2024-07-03 09:40:04 +00:00
Juan A. Suarez Romero
8554feab0c
vc4/ci: run tests in 64-bits
...
Nowadays the recommended version for Raspberry Pi OS in rpi3 is 64-bits.
Hence, let's run our tests in 64-bits too.
Reviewed-by: Eric Engestrom <eric@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30003 >
2024-07-03 09:40:03 +00:00
Juan A. Suarez Romero
a10ea7cec8
broadcom/ci: remove arch from hardware name
...
The same device can be run with 32-bits or 64-bits, so no need to
include the arch in the name.
Reviewed-by: Eric Engestrom <eric@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30003 >
2024-07-03 09:40:03 +00:00
Juan A. Suarez Romero
a16d7a0ba4
broadcom/ci: read 32-bit kernel from arm32 path
...
Makes it clear using arm32 name in contrast to arm64, than armhf.
Reviewed-by: Eric Engestrom <eric@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30003 >
2024-07-03 09:40:03 +00:00
Eric Engestrom
17c081380d
broadcom/ci: disable auto-retry on manual jobs
...
The v3d manual rules had this line but the vc4 and v3dv ones were
missing it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29999 >
2024-07-03 09:16:16 +00:00
Zan Dobersek
8a84e77b15
tu: support KHR_8bit_storage
...
Add basic KHR_8bit_storage support for Adreno 750 devices, for now enabling
the storageBuffer8BitAccess feature. A separate descriptor is provided for
8-bit storage access. The descriptor index is adjusted appropriately for
8-bit SSBO loads and stores.
The 8-bit SSBO loads cannot go through isam since that instruction isn't
able to handle those. The ldib and stib instruction encodings are a bit
peculiar but they match the blob's image buffer access through VK_FORMAT_R8
and the dedicated descriptor. These loads and stores do not work in
vectorized form, so they have to be scalarized. Additionally stores of
8-bit values have to clear up higher bits of those values.
8-bit truncation can leave higher bits as undefined. Zero-extension of
8-bit values has to use masking since the corresponding cov instruction
doesn't function as intended. 8-bit sign extension through cov from a
non-shared to a shared register also doesn't work, so an exception is
applied to avoid it.
Conversion of 8-bit values to and from floating-point values also doesn't
work with a straightforward cov instruction, instead the conversion has
to go through a 16-bit value.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9979
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28254 >
2024-07-03 08:31:39 +00:00
Zan Dobersek
c93a629f2c
ir3: rework TYPE_S8 as TYPE_U8_32
...
ir3's TYPE_S8 isn't actually a signed 8-bit type in a half-register, it's
in fact an unsigned 8-bit type in a full register. Only actual uses of
TYPE_S8 are in conversion operations, but those can be trivially replaced
with TYPE_U8, either truncating down to 8 bits or zero-extending or
sign-extending from 8 bits upward.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28254 >
2024-07-03 08:31:39 +00:00
Zan Dobersek
bc542b5827
ir3_nir_opt_preamble: handle 8-bit preamble loads and stores
...
Support 8-bit loads and stores in the preamble alongside 16-bit ones by
employing the correct conversion variants. Promotions to float remain
specific to 16-bit loads and stores.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28254 >
2024-07-03 08:31:39 +00:00
Zan Dobersek
a9b781fa54
tu: use either the 16-bit or 32-bit descriptor
...
Until now, if the 16-bit storage functionality is supported by the
hardware, two separate descriptors were set up, with isam loads and stores
piping through the descriptor of the corresponding size and other storage
access using the 16-bit descriptor.
These changes keep separate descriptors on a650, but leverage post-a650
isam.v functionality that enables use of 16-bit descriptors for 32-bit
loads, removing the need for the separate 32-bit descriptor.
Storage buffer descriptors are set up according to 16-bit storage support
and the indicated isam.v support, using those descriptors for 32-bit isam
loads as well if the latter is present.
Dynamic offset application in tu_CmdBindDescriptorSets is modified to
determine the offset shift value based on the descriptor's format and not
on the descriptor's position in the layout binding.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28254 >
2024-07-03 08:31:39 +00:00
Iago Toral Quiroga
1d418a3419
broadcom/compiler: add missing signal compatibilities for V3D 7.x
...
total instructions in shared programs: 11281777 -> 11246706 (-0.31%)
instructions in affected programs: 2230213 -> 2195142 (-1.57%)
helped: 11830
HURT: 487
Instructions are helped.
total max-temps in shared programs: 2226424 -> 2225398 (-0.05%)
max-temps in affected programs: 16833 -> 15807 (-6.10%)
helped: 722
HURT: 23
Max-temps are helped.
total sfu-stalls in shared programs: 14894 -> 14977 (0.56%)
sfu-stalls in affected programs: 138 -> 221 (60.14%)
helped: 30
HURT: 112
Inconclusive result (%-change mean confidence interval includes 0).
total inst-and-stalls in shared programs: 11296671 -> 11261683 (-0.31%)
inst-and-stalls in affected programs: 2230218 -> 2195230 (-1.57%)
helped: 11796
HURT: 495
Inst-and-stalls are helped.
total nops in shared programs: 270280 -> 270622 (0.13%)
nops in affected programs: 6492 -> 6834 (5.27%)
helped: 145
HURT: 349
Nops are HURT.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29995 >
2024-07-03 08:05:37 +02:00
Caio Oliveira
260a5fc7b3
intel/brw: Move brw_reg helpers into brw_reg.h
...
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:19 +00:00
Caio Oliveira
71ccf8e4cd
intel/brw: Rename fs_reg_* helpers to brw_reg_*
...
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:19 +00:00
Caio Oliveira
3670c24740
intel/brw: Replace uses of fs_reg with brw_reg
...
And remove the fs_reg alias.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:19 +00:00
Caio Oliveira
fe46efa647
intel/brw: Make fs_reg an alias of brw_reg
...
And rename the brw_reg_from_fs_reg() function to something more
appropriate.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:19 +00:00
Caio Oliveira
69f4ed3102
intel/brw: Rename brw_reg() helper to brw_make_reg()
...
To avoid conflict with the name of the type later on.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:18 +00:00
Caio Oliveira
6b2405e1f5
intel/brw: Remove duplicated functions between fs_reg/brw_reg
...
Update the brw_reg ones and use them.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:18 +00:00
Caio Oliveira
d00329e821
intel/brw: Replace some fs_reg constructors with functions
...
Create three helper functions for ATTR, UNIFORM and VGRF creation.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:18 +00:00
Caio Oliveira
06fbab3a74
intel/brw: Remove conversion from fs_reg to brw_reg
...
They are effectively the same now.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:18 +00:00
Caio Oliveira
e4f37c6ab9
intel/brw: Move most member functions from fs_reg to brw_reg
...
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:18 +00:00
Caio Oliveira
ca1afe2726
intel/brw: Use public inheritance for fs_reg/brw_reg
...
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:18 +00:00
Caio Oliveira
f54dfbf4fe
intel/brw: Move fs_reg data members up to brw_reg
...
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:18 +00:00
Caio Oliveira
2ce6dcf043
intel/brw: Remove unused variable from test
...
This would cause warning (and error in GitLab CI) after later changes to
fs_reg/brw_reg.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:18 +00:00
Caio Oliveira
0d9f58db04
intel/brw: Remove RALLOC helper from fs_reg
...
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:18 +00:00
Caio Oliveira
def70c1673
intel/brw: Remove unused brw_reg related functions
...
Most of these were used by the vec4 backend that was removed from brw.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791 >
2024-07-03 02:53:18 +00:00
Qiang Yu
8e146512d1
glsl: fix indirect tess factor access for compact_arrays=false drivers
...
Driver with compact_arrays=false (i.e. radeonsi) is broken when
tess factor is accessed indirectly, for example:
gl_TessLevelOuter[gl_InvocationID] = xxx;
This fix use nir_vectorize_tess_levels to lower array tess factor
access into direct vector access before nir_lower_io() like clip
and cull distance way.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29799 >
2024-07-03 02:06:56 +00:00
Qiang Yu
a071929f8d
nir: consider more deref types when fixup deref
...
Fix ANV and virpipe CI test fail when nir_fixup_deref_types
is used in nir_vectorize_tess_levels by later commits.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29799 >
2024-07-03 02:06:56 +00:00
Qiang Yu
f9ed3158b4
nir: nir_vectorize_tess_levels support indirect access
...
Replace the implementation with nir_lower_array_deref_of_vec.
This will be used by compact_array=false drivers to lower indirect
tess levels array access to direct vector access too.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29799 >
2024-07-03 02:06:56 +00:00
Qiang Yu
3151f5ec47
nir: add filter parameter to nir_lower_array_deref_of_vec
...
To be used by latter commits to limit the lowering to specific
variables.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29799 >
2024-07-03 02:06:56 +00:00
Timothy Arceri
370ed7b021
glsl: make warning tests pass linking
...
The standalone compiler previously ran these tests through a hacked up
partial linker. When this partial linker was recently removed from the
standalone compiler the --link option was turned on because some tests
are testing linking not just compilation. However in a future patchset
we will switch the standalone linker to use the nir linking code and
when this is done all of these shaders will need to pass full linking,
so here we update them to do so.
Acked-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29991 >
2024-07-03 01:20:02 +00:00
Timothy Arceri
a71ce0a6d6
glsl: drop glsl ir optimisation from the standalone compiler
...
There are no more users of the glsl ir at this point in the standalone compiler
anymore for these optimisations. Later patches will also switch the
standalone compiler to the nir linker.
Acked-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29991 >
2024-07-03 01:20:02 +00:00
Timothy Arceri
063d62f142
glsl: move call to create explicit ifc layout out of glsl_to_nir
...
We move this later so that we can call glsl_to_nir() on glsl ir that
has not set the array size on unsized ifc members. Later patches will
move sizing of the arrays out of glsl ir and into the nir linker.
Acked-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29991 >
2024-07-03 01:20:02 +00:00
Jianxun Zhang
870be63c7e
anv: Disable tracking of clear color on color attachment
...
Xe2+ platforms don't need it because of its new fast-clear
and compression design.
Fixes: Vulkan CTS
dEQP-VK.pipeline.pipeline_library.multisample.
sample_locations_ext.draw.depth.samples_4.
separate_subpass_clear_attachments
src/intel/vulkan/anv_private.h:5439:
anv_image_get_fast_clear_type_addr: Assertion
`device->info->ver < 20' failed.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29966 >
2024-07-03 00:55:13 +00:00
Jianxun Zhang
bd05ef9d91
anv: Support arbitrary fast-clear value on all layouts (xe2)
...
Xe2+ platforms don't use fast-type buffer for its new design.
We don't have to track different fast-clear types, so we just
return the highest level of support.
Fixes: Vulkan CTS
dEQP-VK.api.copy_and_blit.core.resolve_image.whole_array_image
_one_region.8_bit_not_all_remaining_layers
src/intel/vulkan/anv_private.h:5439: anv_image_get_fast_clear_type_addr:
Assertion `device->info->ver < 20' failed.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29966 >
2024-07-03 00:55:13 +00:00
Jianxun Zhang
4034539c00
anv: Fix Vulkan CTS failure related to MCS (xe2)
...
Fixes: Vulkan CTS
dEQP-VK.pipeline.monolithic.multisample.sampled_image.79x31_1.r32_uint.samples_2
src/intel/vulkan/anv_private.h:5439: anv_image_get_fast_clear_type_addr: Assertion
`device->info->ver < 20' failed.
deqp-vk: ../src/intel/vulkan/genX_cmd_buffer.c:1263: transition_color_buffer:
Assertion `must_init_fast_clear_state' failed.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29966 >
2024-07-03 00:55:13 +00:00
Jianxun Zhang
beb0ea2469
anv: Disable tracking fast clear and aux state (xe2)
...
Xe2+ doesn't use aux tracking buffers, and we should not
have access to the fast-clear type and compression state.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29966 >
2024-07-03 00:55:13 +00:00
Christian Gmeiner
01ea13cb6d
etnaviv: isa: Extend disasm test
...
With libetnaviv_parser we are able to parse the resulting string
representation into an etna_inst and assemble that to binary.
As we are not able to parse and/or assemble we need to mark some test
cases with special flags.
This allows us to test: bin -> disasm -> parsing -> assemble
If isa_parse_str(..) is not available we skip this part of the unit
test.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:55 +00:00
Christian Gmeiner
858d42bee9
etnaviv: isa: Add cli assembler
...
Nothing too fancy.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:55 +00:00
Christian Gmeiner
6db922c0bf
etnaviv: isa: Add C function impl
...
Implement the following C API's:
- isa_parse_str(..)
- isa_parse_file(..)
- isa_asm_result_destroy(..)
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:55 +00:00
Christian Gmeiner
d9bcaa1478
etnaviv: isa: Add parser module
...
This commit adds the actual parser, which makes use of the IsaParser
derive proc macro.
It provides two public functions:
- asm_process_str(..)
Parse the provided isa representation and return an etna_asm_result.
This will be used by our unit tests.
- asm_process_file(..)
Parse a whole file full of isa and return an etna_asm_result. This
will be used by our cli assembler.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Christian Gmeiner
db5e733e1b
etnaviv: isa: Add EtnaAsmResultExt trait
...
The impl of this trait provides some helpers to work with struct
etna_asm_result in Rust.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Christian Gmeiner
0f93393cd6
etnaviv: isa: Make etna_asm_result usable in Rust
...
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Christian Gmeiner
2ad2d86e49
etnaviv: isa: Add struct etna_asm_result
...
This struct contains the result of an assembler run and will be filled
in Rust and consumed via a C API.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Christian Gmeiner
863023ceda
etnaviv: isa: Add IsaParser proc_macro_derive
...
This proc derive macro does the following magic:
- read static rules file
- parse isaspec xml file
- generate valid pest PEG grammar and attaches it as grammar_inline to
the ast
- calls pest_generator::derive_parser(..) to generate the parser
- creates FromPestRule trait
- creates FromPestRule impl for enums and opcodes
This is the fundation of our assembler.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Christian Gmeiner
575814af14
etnaviv: isa: Add meson version check
...
meson had an issue [1] with proc_macro that got fixed in 1.4.0 and newer.
[1] https://github.com/mesonbuild/meson/issues/12758
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Christian Gmeiner
0ce255a9f6
etnaviv: isa: Make header C++ safe
...
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Christian Gmeiner
15a784689e
etnaviv: isa: Generate Rust FFI bindings for asm.h
...
We will work with etna_inst_* structs in Rust.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Christian Gmeiner
59406a9d85
etnaviv: isa: Add meta elements to instructions
...
This commits adds a meta elements with the following attributes:
- has_dest: does the instruction has a dest register?
- valid_srcs: which sources need to be valid?
Is used to generate PEST grammar and defines which of the three source
registers needs to be != void.
- type: which <template> shall be used?
Must match a known template name by the last part.
E.g.: <meta type=tex"/> --> <template name="INSTR_TEX">
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Christian Gmeiner
9e3e12e6a9
meson: Add indexmap rust dependencies
...
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Christian Gmeiner
02bc51f477
meson: Add roxmltree rust dependency
...
Will be used for a simple isaspec implementation in rust.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Christian Gmeiner
e28ff81869
meson: Add pest rust dependencies
...
Including its dependency ucd-trie.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869 >
2024-07-03 00:07:54 +00:00
Mauro Rossi
87ad3ca0ac
intel/common: fix building error in intel_common.c
...
Fixes the following building error:
../out_src/src/intel/common/intel_common.c:29:4: error: implicit declaration of function 'free' is invalid in C99 [-Werror,-Wimplicit-function-declarat
ion]
free(engine_info);
^
1 error generated.
Fixes: 5b8b4f78 ("intel/dev: Add engine_class_supported_count to intel_device_info")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29975 >
2024-07-02 23:35:26 +00:00
Jesse Natalie
74ba5cf885
blake3: fix Windows ARM64 build and detect ARM64EC as ARM64
...
Cherry-picked upstream 0816badf3ada3ec48e712dd4f4cbc2cd60828278
Reviewed-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29971 >
2024-07-02 22:17:17 +00:00
Christian Gmeiner
3f91f2cf31
meson: Update syn subproject
...
Fixes the following build error for fedora-release.
Error: method `inner` is never used
--> ../subprojects/syn-2.0.39/src/attr.rs:589:8
|
585 | pub(crate) trait FilterAttrs<'a> {
| ----------- method in this trait
...
589 | fn inner(self) -> Self::Ret;
| ^^^^^
|
= note: `-D dead-code` implied by `-D warnings`
= help: to override `-D warnings` add `#[allow(dead_code)]`
error: aborting due to 1 previous error
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29996 >
2024-07-02 21:36:14 +00:00
Eric Engestrom
ab0956eec9
lavapipe/ci: skip timing out test
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30002 >
2024-07-02 21:20:47 +00:00
Mike Blumenkrantz
3d2d4f76d5
lavapipe: maint7
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29963 >
2024-07-02 21:06:13 +00:00
Iván Briano
9a68be59ca
anv: enable VK_KHR_maintenance7
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29968 >
2024-07-02 20:24:43 +00:00
Iván Briano
53f196b8e0
vulkan/properties: handle LayeredApiPropertiesListKHR
...
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29968 >
2024-07-02 20:24:43 +00:00
Samuel Pitoiset
384392d729
vulkan: Update XML and headers to 1.3.289
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29968 >
2024-07-02 20:24:43 +00:00
Jianxun Zhang
597c6cdf20
isl: Add some formats not covered in CMF table (xe2)
...
The CMF values of these formats are not explicitly defined in the
spec. Refer to the added comment for more details.
Fixed Piglit tests:
[ISL_FORMAT_L8A8_UNORM_SRGB]
getteximage-formats -auto -fbo
[ISL_FORMAT_L8_UNORM_SRGB]
teximage-colors GL_SLUMINANCE8 -auto -fbo
[ISL_FORMAT_R9G9B9E5_SHAREDEXP]
fbo-generatemipmap-3d RGB9_E5 -auto -fbo
src/intel/isl/isl_genX_helpers.h:322: isl_get_render_compression_format:
Assertion `!"" "Unsupported render compression format!"' failed.
Also bump up Bspec revision in comments.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28620 >
2024-07-02 19:03:19 +00:00
Jianxun Zhang
77c83069ad
intel/dev: Select a compressed PAT entry (xe2)
...
Fix glxgears (LNL)
glxgears: xe/iris_kmd_backend.c:81: xe_gem_create:
Assertion `!"" "missing"' failed.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28620 >
2024-07-02 19:03:19 +00:00
Jianxun Zhang
c9ee484f21
blorp: Ensure MSAA fast clear in correct modes (xe2)
...
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28620 >
2024-07-02 19:03:19 +00:00
Ganesh Belgur Ramachandra
9c8dffd282
radeonsi: add GL_ARB_texture_filter_minmax extension
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29653 >
2024-07-02 18:27:00 +00:00
Ganesh Belgur Ramachandra
1f9bafbc74
radeonsi: add GL_EXT_texture_filter_minmax extension
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29653 >
2024-07-02 18:27:00 +00:00
Dylan Baker
11c27a6237
egl/wayland: fix memory leak in error handling case
...
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29990 >
2024-07-02 17:45:12 +00:00
Jesse Natalie
137c506a7a
subprojects: Use depth=1 in the git wrap files
...
Acked-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29361 >
2024-07-02 16:54:32 +00:00
Tim Huang
076cbf605e
amd/vpelib: support VPE IP v6.1.3
...
Use VPE_IP_LEVEL_1_0 for VPE IP version 6.1.3.
Signed-off-by: Tim Huang <Tim.Huang@amd.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29930 >
2024-07-02 12:05:23 +00:00
Tim Huang
e322b2b683
amd: add GFX v11.5.2 support
...
This is to enable GFX v11.5.2 support.
Signed-off-by: Tim Huang <Tim.Huang@amd.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29930 >
2024-07-02 12:05:23 +00:00
Christian Gmeiner
9945f9e8d3
meson: Update proc-macro2 subproject
...
There is a fix in 1.0.76 release that fixes an issue I have
seen on CI (fedora-release). Lets jump to the most recent
version 1.0.86.
See: https://github.com/dtolnay/proc-macro2/pull/435
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29992 >
2024-07-02 10:19:53 +00:00
Danylo Piliaiev
f77e9d8c4a
ir3: Print bindless samp/tex ids for tex prefetch
...
@tex(r0.z) src=4, bindless=1, samp=4, tex=3, wrmask=0x7, opc=sam
@tex(r1.y) src=4, bindless=1, samp=2, tex=1, wrmask=0xf, opc=sam
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29989 >
2024-07-02 08:16:02 +00:00
Juan A. Suarez Romero
c157e8991e
v3d: use original enabled_mask on setting vertex buffers
...
Current code uses a non-initialized enabled_mask to set the vertex
buffers mask, instead of using the original value from
`so->enabled_mask`
Let's use the original field instead of using an intermediate variable.
Fixes: cbcfb34cf7 ("v3d: use BITSET for the masks")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29987 >
2024-07-02 07:20:47 +00:00
Yiwei Zhang
2d728a037a
venus: tentative fix for test flakiness from invalid ring wait
...
If ring is already current when creating bo, we skip the ring wait but
miss to invalidate bo ring seqno. There's a false-positive for sending a
ring wait upon free memory if the ring has consumed about UINT32_MAX
bytes of traffic (unrelated to ring size).
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29988 >
2024-07-02 03:25:49 +00:00
Renato Pereyra
de0d237ab0
intel/perf: Move sysmacros.h include from header to implementation
...
sysmacros.h defines macros `minor()` and `major()`. These macros conflict
with a definition of `minor()` in the Perfetto SDK header. Move the
sysmacros.h include to intel_perf.c because the Perfetto header is only
included at the same time as intel_perf.h not *.c (in intel_driver_ds.cc).
Unbeknown to anyone, the definition of `minor()` in the Perfetto header is
being replaced with the macro. See the MR attachment for an example.
Signed-off-by: Renato Pereyra <renatopereyra@chromium.org >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29974 >
2024-07-01 22:02:49 +00:00
Paulo Zanoni
4aa3b2d3ad
anv: LNL+ doesn't need the special flush for sparse
...
Newer hardware is smart enough to know that if something writes to a
NULL tile and immediately reads back the value (from the cache), the
value should read back as zero, not whatever was written to the cache
but not the memory. Due to that, we don't need to flush the tile
cache, which is quite expensive.
Link: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11029
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29953 >
2024-07-01 21:28:26 +00:00
Mike Blumenkrantz
0b864388fd
egl: only enable MESA_image_dma_buf_export with PIPE_CAP_DMABUF
...
very minor nitpick but technically more correct
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29939 >
2024-07-01 19:32:23 +00:00
Mike Blumenkrantz
739694403d
egl: deduplicate MESA_image_dma_buf_export enablement
...
no functional changes
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29939 >
2024-07-01 19:32:23 +00:00
Sagar Ghuge
99ce8b5a07
intel/compiler: Add indirect mov lowering pass
...
Indirect addressing(vx1 and vxh) not supported with UB/B datatype for
src0, so we need to change the data type for both dest and src0.
This fixes following tests cases on Xe2+
- dEQP-VK.spirv_assembly.instruction.compute.8bit_storage.push_constant_8_to_16*
- dEQP-VK.spirv_assembly.instruction.compute.8bit_storage.push_constant_8_to_32*
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29316 >
2024-07-01 19:06:31 +00:00
Kenneth Graunke
1e69ec3b8d
intel/brw: Add a lower_csel pass and allow building it for all types
...
We can do CSEL on F, HF, *W, and *D on Gfx11+. Gfx9 can only do F.
We can lower unsupported types to CMP+CSEL, allowing us to use CSEL
in the IR and not worry about the limitations.
Rework: (Sagar)
- Update validation pass for CSEL
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29316 >
2024-07-01 19:06:31 +00:00
Mike Blumenkrantz
cb7b1a8d23
zink: remove adreno from broken_cache_semantics driver workaround
...
the proprietary driver was never affected by this, and turnip should
no longer be affected after some recent MRs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29174 >
2024-07-01 18:37:46 +00:00
Dylan Baker
dc604f340a
anv/grl: add some validation that we're not going to overflow
...
Coverity has spotted a place where we could in theory overflow. In
reality it wont happen as the potential overflow is a bitfield with a
maximum of two values. Add an `assume()` statement to help out the
compiler and document our assumption.
fixes: dc1aedef2b
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29825 >
2024-07-01 18:11:38 +00:00
Rhys Perry
1643c933ef
aco/gfx11: don't use v_bfrev_b32 with wave64
...
v_mov_b32 can be dual issued.
fossil-db (navi31):
Totals from 1792 (2.26% of 79395) affected shaders:
CodeSize: 27462476 -> 27470308 (+0.03%); split: -0.00%, +0.03%
Latency: 29403214 -> 29402713 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 5005863 -> 5004702 (-0.02%); split: -0.02%, +0.00%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
Rhys Perry
52e9370c13
aco: replace constant v_bfrev_b32 with v_mov_b32 to create vopd
...
fossil-db (navi31, wave32):
Totals from 1523 (1.92% of 79395) affected shaders:
Instrs: 1502625 -> 1501998 (-0.04%); split: -0.05%, +0.01%
CodeSize: 8980508 -> 8983032 (+0.03%); split: -0.00%, +0.03%
Latency: 8405687 -> 8405375 (-0.00%); split: -0.01%, +0.01%
InvThroughput: 1567484 -> 1566728 (-0.05%); split: -0.05%, +0.00%
VALU: 732709 -> 732058 (-0.09%); split: -0.09%, +0.00%
VOPD: 158191 -> 158842 (+0.41%); split: +0.41%, -0.00%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
Rhys Perry
17758f0a02
aco: fix wmma raw hazard
...
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
Rhys Perry
a6eb5c9caa
aco: use alignment information in visit_load_constant()
...
The intrinsic has this now.
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
Rhys Perry
7c995df9aa
aco: fix follow_operand with combined label_extract and label_split
...
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
Rhys Perry
9ee24db882
aco: add missing isConstant()/isTemp() checks
...
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
Rhys Perry
5e1d3f571d
aco: turn split(vec()) into p_parallelcopy instead of p_create_vector
...
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
Rhys Perry
f842bd81ca
aco: use s_pack_*_b32_b16 more in p_insert/p_extract lowering
...
This opcode doesn't write SCC, which gives later passes more freedom to
move instructions.
fossil-db (navi21):
Totals from 727 (0.92% of 79395) affected shaders:
Latency: 14943483 -> 14942704 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 3225790 -> 3225766 (-0.00%); split: -0.00%, +0.00%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
Rhys Perry
ca161a96d1
aco: combine extracts into s_pack_ll_b32_b16
...
fossil-db (navi21):
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 45941 -> 45924 (-0.04%)
CodeSize: 241768 -> 241756 (-0.00%)
Latency: 176501 -> 176491 (-0.01%)
Copies: 6884 -> 6882 (-0.03%)
SALU: 6101 -> 6088 (-0.21%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:21 +00:00
Rhys Perry
98cb50297b
aco: use s_pack_ll_b32_b16 for pack_32_2x16_split
...
fossil-db (navi21):
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 45963 -> 45941 (-0.05%)
CodeSize: 241908 -> 241768 (-0.06%)
Latency: 176508 -> 176501 (-0.00%)
SALU: 6123 -> 6101 (-0.36%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:21 +00:00
Samuel Pitoiset
6326cc4a5e
radv: use radv_get_user_sgpr() more in DGC
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
Samuel Pitoiset
598e85b3e9
radv: use the graphics pipeline from the DGC info
...
Doesn't change anything because it's required to bind one graphics
pipeline before using DGC but it's cleaner.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
Samuel Pitoiset
4c8d44aed0
radv: move radv_CmdPreprocessGeneratedCommandsNV() to radv_cmd_buffer.c
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
Samuel Pitoiset
e7f6388ac7
radv: use radv_dgc_with_task_shader() more
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
Samuel Pitoiset
b51b8c54c0
radv: cleanup using vtx_base_sgpr for userdata with DGC
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
Samuel Pitoiset
c77e26daa5
radv: do not emit compute userdata for empty dispatches
...
Unnecessary.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
Samuel Pitoiset
3f919c0df6
radv: remove unused parameter to dgc_emit_draw_mesh_tasks_ace()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
Valentine Burley
c2af4f61a7
tu: Use vk_query_pool
...
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29441 >
2024-07-01 16:23:29 +00:00
Valentine Burley
cc432c358a
tu: Use the common versions of vkBegin/EndQuery()
...
Move all the logic into tu_CmdBegin/EndQueryIndexedEXT. CmdBegin/EndQuery in
the common runtime is a wrapper that calls tu_CmdBegin/EndQueryIndexedEXT with
index 0.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29441 >
2024-07-01 16:23:29 +00:00
Valentine Burley
45a3c2d197
tu: Rename tu_query.cc/h to tu_query_pool.cc/h
...
Match the structure of the common Vulkan runtime and NVK.
Additionally update a comment to reflect the current state.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29441 >
2024-07-01 16:23:28 +00:00
Valentine Burley
d8ebc632eb
tu: Move buffer view related code to tu_buffer_view.cc/h
...
More code isolation. Match the structure of the common Vulkan runtime,
NVK and RADV.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29441 >
2024-07-01 16:23:28 +00:00
Valentine Burley
09d224685d
tu: Drop tu_buffer_view_init helper function
...
Simplify the code by inlining the logic from tu_buffer_view_init
directly into tu_CreateBufferView.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29441 >
2024-07-01 16:23:28 +00:00
Valentine Burley
c21faf12e7
tu: Use vk_buffer_view
...
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29441 >
2024-07-01 16:23:28 +00:00
Michel Dänzer
cbd19e09d1
dri: Go back to hard-coded list of RGBA formats
...
Catching these programmatically without false positives / negatives is
surprisingly tricky, go back to the known-working list for now.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11398
Fixes: ad0edea53a ("st/dri: Check format properties from format helpers")
Fixes: 5ca85d75c0 ("dri: Fix BGR format exclusion")
v2:
* Also put back lima fails removed by 9eeaa4618f ("egl/gbm: Enable
RGBA configs"), as those tests are now failing again.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29979 >
2024-07-01 15:42:58 +00:00
Mike Blumenkrantz
a7f86e38ca
zink: free sparse page for miptail on uncommit
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29818 >
2024-07-01 14:24:57 +00:00
Erik Faye-Lund
0277d0321a
docs/panfrost: quote identifiers
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29902 >
2024-07-01 14:17:26 +00:00
Erik Faye-Lund
577b9efa75
docs/panfrost: use c:func-role for function
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29902 >
2024-07-01 14:17:26 +00:00
Erik Faye-Lund
a5f892b5cb
docs/panfrost: use math-role more
...
This renders cleaner and more consistent with the other math around
here.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29902 >
2024-07-01 14:17:26 +00:00
Erik Faye-Lund
7033623acd
docs/panfrost: fix math-notation
...
less or equal uses \leq, not <= in latex.
Fixes: e0752673be ("docs/panfrost: Move description of instancing")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29902 >
2024-07-01 14:17:26 +00:00
Erik Faye-Lund
41698eee96
docs/panfrost: fix numbered list
...
This got broken when it got moved into the documentation.
Fixes: e0752673be ("docs/panfrost: Move description of instancing")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29902 >
2024-07-01 14:17:26 +00:00
Samuel Pitoiset
484f613a97
radv: use radv_get_user_sgpr_loc() for the GS copy shader too
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29957 >
2024-07-01 13:39:51 +00:00
Samuel Pitoiset
f22ee282fc
radv: add radv_get_user_sgpr{_loc}() helpers
...
To simplify all the user sgpr computations which are very redundant.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29957 >
2024-07-01 13:39:51 +00:00
Samuel Pitoiset
bf852536fc
radv: rename radv_get_user_sgpr() to radv_get_user_sgpr_info()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29957 >
2024-07-01 13:39:51 +00:00
Sergi Blanch Torne
81424e1d50
Revert "ci: disable Collabora's farm due to maintenance"
...
This reverts commit c0138e99e6 .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29978 >
2024-07-01 12:21:10 +00:00
Juan A. Suarez Romero
f77216e9ac
Revert "ci: disable Igalia farm"
...
This reverts commit f0b0a71a9b .
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29984 >
2024-07-01 11:57:43 +00:00
Eric Engestrom
48a7c212ba
radeonsi/ci: mark test as fixed
...
This was fixed by one of the commits in the range 5cb15a6c...6006588a.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29981 >
2024-07-01 10:01:38 +00:00
Luc Ma
6b5a12611b
meson: Build pipe-loader when build-tests is true
...
Gallium/tests/trivial requires dynamic pipe loader at runtime, that is,
$prefix/$libdir/gallium-pipe/pipe_*.so must get built and installed.
so let's build it if build-tests is enabled.
v2:
- Fix error of meson when both of clover and tests are enabled (dbaker)
Signed-off-by: Luc Ma <luc@sietium.com >
Acked-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Dylan Baker <dylan@pnwbakers.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27180 >
2024-07-01 09:24:49 +00:00
Lionel Landwerlin
884397b587
anv: workaround flaky xfb query results on Gfx11
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29836 >
2024-07-01 09:04:12 +00:00
Juan A. Suarez Romero
feaa5ce1ec
vc4: fix out-of-bounds access to array
...
Detected by by Undefined Behaviour Sanitizer (UBSan), this fixes trying
to access index 5 in `util_format_channel_description`, which is
declared of size 4.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero
b827aee3a3
vc4: do not create 0-bytes variable length arrays
...
When declaring an array with variable length, like `nir_variable
*vars[num_entries]`, ensure the length is always greater than 0
This has been detected by Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero
2a16575dec
vc4: do not pass NULL pointer to function not expecting NULLs
...
memcmp() pointers arguments are declared to be non NULL.
This has been detected by Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero
eab3ee8d71
vc4: do not access member of a NULL structure
...
Check if the structure is NULL before trying to get access to its
members.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero
5e09b2b3f3
vc4: use unsigned types when performing bitshifting
...
Ensure unsigned integers of proper size are used instead of signed ones
when performing left bit shifts.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero
1bcf9c5da9
v3d: do not pass NULL pointer to function not expecting NULLs
...
memcpy() pointers arguments are declared to be non NULL.
This has been detected by Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero
417f70ef5a
v3d: do not access member of a NULL structure
...
Check if the structure is NULL before trying to get access to its
members.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero
fc286867fb
v3dv: fix misalignment in descriptor layout structure
...
Current memory layout for v3dv_descriptior_set_layout structure is the
following:
```
/* offset size */
type = struct v3dv_descriptor_set_layout {
struct vk_object_base base; /* 0 64 */
VkDescriptorSetLayoutCreateFlags flags; /* 64 4 */
uint32_t binding_count; /* 68 4 */
uint32_t bo_size; /* 72 4 */
uint16_t shader_stages; /* 76 2 */
/* PAD 2 */
uint32_t descriptor_count; /* 80 4 */
uint16_t dynamic_offset_count; /* 84 2 */
/* PAD 2 */
uint32_t ref_cnt; /* 88 4 */
struct v3dv_descriptor_set_binding_layout binding[0]; /* 92 32 */
} [...] binding[1]; /* 124 32 */
```
Besides wasting 4 bytes in padding, the main problem is that `binding`
fields are not aligned to 8 bytes (64-bits), which is undefined behaviour
in C.
Just moving `descriptor_count` field below we get the new layout:
```
/* offset size */
type = struct v3dv_descriptor_set_layout {
struct vk_object_base base; /* 0 64 */
VkDescriptorSetLayoutCreateFlags flags; /* 64 4 */
uint32_t binding_count; /* 68 4 */
uint32_t bo_size; /* 72 4 */
uint16_t shader_stages; /* 76 2 */
uint16_t dynamic_offset_count; /* 78 2 */
uint32_t descriptor_count; /* 80 4 */
uint32_t ref_cnt; /* 84 4 */
struct v3dv_descriptor_set_binding_layout binding[0]; /* 88 32 */
} [...] binding[1]; /* 120 32 */
```
Which removes the padding requirement, and more important, make the
`binding` pointers to be correctly aligned.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero
9696fd378a
v3dv: restrict to channels when encoding border color
...
Not all the formats have 4 channels, so let's restrict the border
encoding to the number of channels.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero
3ee47dc6d9
v3dv: do not pass NULL pointer to function not expecting NULLs
...
memcpy() pointers arguments are declared to be non NULL.
This has been detected by Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero
1d71be8e60
v3dv: do not access member of a NULL structure
...
Check if the structure is NULL before trying to get access to its
members.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero
7dc6b8df11
broadcom/compiler: use unsigned types when performing bitshifting
...
Ensure unsigned integers are used instead of signed ones when performing
left bit shifts.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911 >
2024-07-01 08:02:07 +00:00
Lionel Landwerlin
b8f8926026
anv: emit the right shader instruction for protected mode
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29778 >
2024-07-01 06:48:06 +00:00
Lionel Landwerlin
57e74d7b56
anv: allocate compute scratch using the right scratch pool
...
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29778 >
2024-07-01 06:48:06 +00:00
Lionel Landwerlin
3ccf80f9b1
anv: prepare 2 variants of all shader instructions
...
One variant uses a protected scratch surface the other not.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29778 >
2024-07-01 06:48:06 +00:00
Lionel Landwerlin
08a4e0a2e3
anv: add a protected scratch pool
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29778 >
2024-07-01 06:48:06 +00:00
Sergi Blanch Torne
c0138e99e6
ci: disable Collabora's farm due to maintenance
...
Planned downtime in the farm:
* Start: 2024-07-01 07:00 UTC
* End: 2024-07-01 13:00 UTC
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29891 >
2024-07-01 05:53:15 +00:00
David Heidelberg
68215332a8
build: pass licensing information in SPDX form
...
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Dylan Baker <dylan.c.baker@intel.com >
Acked-by: Eric Engestrom <eric@igalia.com >
Acked-by: Daniel Stone <daniels@collabora.com >
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29972 >
2024-06-29 12:42:49 -07:00
José Roberto de Souza
3b6e2475e4
intel/perf: Enable perf on Xe KMD
...
Support was added in the previous patches, so this check can now be
removed.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
936e87a7f9
anv: Implement Xe KMD query pools
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
3c1b545057
intel/perf: Implement Xe KMD perf stream read
...
Xe KMD perf stream reads just returns the samples, there is no header.
For error checking there is other uAPI that is not handled here yet.
So to mantain compatibility here reading the perf stream, adding a
header then copying the sample.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
da63c54db5
intel/perf: Remove i915_drm.h includes from common code
...
Only place that still has i915_drm.h includes in common code is
intel_perf_query.c.
This are the last i915_drm.h includes in headers in common code \o/.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
00c6b09812
tool/pps: Add Xe KMD support
...
This is the same config as intel.cfg only changing:
data_sources {
config {
name: "gpu.counters.i915"
gpu_counter_config {
counter_period_ns: 100000
}
}
}
to:
data_sources {
config {
name: "gpu.counters.xe"
gpu_counter_config {
counter_period_ns: 100000
}
}
}
Otherwise pps would not accept due to different KMD names.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
c2fd848002
intel/perf: Refactor and add Xe KMD support to change stream metrics id
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
b22899b494
intel/perf: Refactor and add Xe KMD support to enable and disable perf stream
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
981090f173
intel/perf: Add Xe KMD perf stream open function
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
6258c84375
intel/perf: Refactor and add Xe KMD support to add and remove configs
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
0e68d7a735
intel/perf: Replace i915_perf_version and i915_query_supported by a feature bitmask
...
Replacing the i915_perf_version that is i915 specific by a feature
mask makes easier to support Xe KMD.
Also this allow us to group a bool and a int into a single enum(int).
No changes in behavior is expected here.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
a56b085661
intel/perf: Add function to check if OA/perf is supported by Xe KMD
...
This is a uAPI added after initial Xe KMD upstreaming so not supported
by every version, also by default it requires high privilege
permissions so it check if current applications has it.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
f0c62b6438
intel/perf: Implement function that returns OA format for Xe KMD
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
José Roberto de Souza
bdeeaaff59
intel: Sync xe_drm.h
...
Sync xe_drm.h with 406d058dc323 ("drm/xe/oa/uapi: Allow preemption to be disabled on the stream exec queue").
Patch available in https://gitlab.freedesktop.org/drm/kernel/-/blob/drm-next/ .
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312 >
2024-06-29 01:17:37 +00:00
Sushma Venkatesh Reddy
d52dd5a9e9
anv/drirc: add option to provide low latency hint
...
GuC offers a mechanism for KMD/UMD to provide workload hints and one of
that strategy is low latency hint. We can utilize this hint when the
workload is more latency sensitive like compute usecases.
Signed-off-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28282 >
2024-06-28 21:45:59 +00:00
Jesse Natalie
d0151df322
mesa: Add ASSERTED to assert-only local variable
...
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29970 >
2024-06-28 20:44:36 +00:00
Jesse Natalie
13d11ab442
zink: Add ASSERTED to assert-only local variable
...
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29970 >
2024-06-28 20:44:36 +00:00
Jesse Natalie
c2b53d7bd0
nir: Remove assert-only variable by inlining its single use
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29970 >
2024-06-28 20:44:36 +00:00
Alyssa Rosenzweig
30db807f79
nir/algebraic: explicitly suffix constants
...
Make our intentions super duper clear.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Suggested-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29952 >
2024-06-28 19:53:36 +00:00
Alyssa Rosenzweig
270446ee21
nir: fix miscompiles with rules with INT32_MIN
...
812b3415 added rules for upcasts with comparisons with a variety of
types. The float & unsigned rules should be ok, but the signed integer rules are
unsound as currently implemented. This can cause end-to-end miscompiles.
I originally hit this issue while debugging a large real world OpenCL kernel. I
found the bug symptoms changed when disabling loop unrolling, which tipped me
off to a compiler bug. I've reduced it to a minimal test case. Imagine my
surprise when I find out the NIR my backend ingested was already constant folded
to be wrong.
In the minimal test case, during optimization we have NIR:
32 %6 = ....
64 %9 = i2i64 %6
64 %44 = load_const (0x0000000000000001)
1 %45 = ilt %9, %44 (0x1)
This is a simple check (int64_t)%6 < 1.
nir_opt_algebraic turns this into:
32 %6 = ...
64 %9 = i2i64 %6
64 %44 = load_const (0x0000000000000001)
64 %55 = load_const (0x0000000080000000 = 2147483648)
1 %56 = ilt %55 (0x80000000), %44 (0x1)
64 %57 = load_const (0x000000007fffffff = 2147483647)
1 %58 = ilt %57 (0x7fffffff), %44 (0x1)
32 %59 = i2i32 %44 (0x1)
1 %60 = ilt %6, %59
1 %61 = ior %58, %60
1 %62 = iand %56, %61
This pile of math constant-folds to an unconditional "false"! The problem is
%56. At first glance, INT32_MIN < 1 is true so %56 should be true. Indeed, it
should. But here's the kicker: both constants are 64-bit here, so the ilt
operation is a 64-bit comparison -- that left-hand side is INT32_MIN
zero-extended to 64-bit for the signed comparison at 64-bit. So in fact, it
evaluates to false, causing the whole expression to go false. If we're going to
do a 64-bit comparison for %56, then we need to sign-extend the bound. So we'll
just adjust the Python and be on our way, right?
Unfortunately the issue is deeper. According to the comment in the generated
nir_opt_algebraic.c file, the guilty algebraic rule is:
('ilt', ('i2i64', 'a@32'), '#b') =>
('iand', ('ilt', -2147483648, 'b'), ('ior', ('ilt', 2147483647, 'b'), ('ilt', 'a', ('i2i32', 'b'))))
From a Python perspective? That rule is correct. -2147483648 < 1 is a true
statement. Adjusting the Python rule is not the appropriate solution here, since
the issue is more fundamental and might affect other rules. The real problem is
the translation of that Python replacement tree into C, incorrectly
zero-extending -2147483648 into 0x0000000080000000 instead of sign-extending to
0xffffffff80000000.
Crawling down the rabbit hole of the generated algebraic file, we see the
constant encoded as:
{ .constant = {
{ nir_search_value_constant, 64 },
nir_type_int, { -0x80000000 /* -2147483648 */ },
} },
NIR correctly translates the negative constant to a C level negate operation of
its absolute value. This maps to the correct sign-extension...
...for all constants except for INT_MIN. Because that constant lacks a ULL
suffix, it is a 32-bit integer. And for this integer (only), negating it hits
signed integer overflow (UB!) and then we end up with an effective
zero-extension when going to 64-bit.
This patch fixes the end-to-end miscompile.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Closes : #11402
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29952 >
2024-06-28 19:53:36 +00:00
Maaz Mombasawala
8b756a0d0e
svga: Replace shared surface flag and simplify surface creation
...
The shared flag vmw_svga_winsys_surface was used to create shareable surfaces
and these surfaces are not discarded.
Since all surfaces created right now are shareable, there is no need for this
flag except to mark surfaces which should not be discarded. Renaming it to
nodiscard accordingly.
This also simplifies surface creation.
Signed-off-by: Maaz Mombasawala <maaz.mombasawala@broadcom.com >
Reviewed-by: Martin Krastev <martin.krastev@broadcom.com >
Reviewed-by: Ian Forbes <ian.forbes@broadcom.com >
Reviewed-by: Jose Fonseca <jose.fonseca@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29948 >
2024-06-28 19:41:02 +00:00
Neha Bhende
8b8f347e4b
svga: Retrieve stride info from hwtnl->cmd.vdecl for swtnl draws
...
This fixes spec@!opengl 1.0@gl-1.0-polygon-line-aa
spec@!opengl 1.1@clipflat and multiple piglit tests
failures on VGPU9 device
Fixes: 76725452 ("gallium: move vertex stride to CSO")
Reviewed-by: Brian Paul <brian.paul@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29947 >
2024-06-28 19:24:46 +00:00
Rémi Bernon
f9a15b37ef
zink: Add VKAPI_PTR specifier to generated stub functions.
...
Same as 8d210ae232 but for when NDEBUG
isn't defined.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29863 >
2024-06-28 18:15:34 +00:00
Mike Blumenkrantz
6466a977e4
zink: add a driver workaround to disable 2D_VIEW_COMPATIBLE+sparse
...
this fixes a lot of stuff on intel and hopefully never hits any corner
case app use
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29197 >
2024-06-28 17:44:00 +00:00
Jesse Natalie
e8ab5e4320
d3d12: Use GetResourceAllocationInfo instead of GetCopyableFootprints for residency sizes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29967 >
2024-06-28 17:21:52 +00:00
José Expósito
1ef3b38ff8
llvmpipe: Init eglQueryDmaBufModifiersEXT num_modifiers
...
Initialize the number of modifiers when `max` is 0 as documented [1]:
If <max_formats> is 0, no formats are returned, but the total number
of formats is returned in <num_formats>, and no error is generated.
[1] https://registry.khronos.org/EGL/extensions/EXT/EGL_EXT_image_dma_buf_import_modifiers.txt
Fixes: d74ea2c117 ("llvmpipe: Implement dmabuf handling")
Reported-by: Michal Odehnal <modehnal@redhat.com >
Tested-by: Michal Odehnal <modehnal@redhat.com >
Reviewed-by: Lucas Fryzek <lfryzek@igalia.com >
Signed-off-by: José Expósito <jexposit@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29941 >
2024-06-28 16:57:26 +00:00
Caio Oliveira
6dc7f65a39
anv: Use brw_nir_lower_cs_intrinsics for lowering Mesh/Task LocalID
...
Stop using the option in the generic pass
nir_lower_compute_system_values and use the same code as brw uses for
compute instead.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29828 >
2024-06-28 16:30:38 +00:00
Caio Oliveira
d89bfb1ff7
intel/brw: Reorganize lowering of LocalID/Index to handle Mesh/Task
...
Reorganize the code to make clearer all the lowering cases:
(a) Single invocation workgroup. Index and IDs are all zero.
(b) Local ID provided by hardware.
(c) Local Index provided by the hardware. Depending on the case this
might not be the final local index, e.g. heuristics for tile.
(d) Neither provided by the hardware.
Case (c) is new and supported by Mesh/Task shaders. At the moment the
nir_lower_compute_system_values handle lowering of LocalID for
Task/Mesh, but a later patch will flip that on ANV.
This will make the Task/Mesh use the same lowering as Compute shaders.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29828 >
2024-06-28 16:30:38 +00:00
Juan A. Suarez Romero
f0b0a71a9b
ci: disable Igalia farm
...
We have some network issues which prevents the hosts do their job
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29965 >
2024-06-28 16:27:17 +00:00
Connor Abbott
81fd13913a
freedreno: Fix RBBM_NC_MODE_CNTL variants
...
It exists on a6xx too, as made clear by kgsl.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29961 >
2024-06-28 15:09:04 +00:00
Samuel Pitoiset
cc48e12431
radv: suspend user conditional rendering when DGC has task shaders
...
Otherwise the DGC ACE IB would be uninitialized and it would hang.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29954 >
2024-06-28 14:35:22 +00:00
David Rosca
49eda4d742
frontends/va: Don't require exact match for packed headers
...
Apparently it's valid to create config with any combination of supported
packed headers.
Fixes libva-utils tests:
GetCreateConfig/VAAPIGetCreateConfig.CreateConfigWithAttributes/235, where GetParam() = (32:VAProfileAV1Profile0, 6:VAEntrypointEncSlice)
GetCreateConfig/VAAPIGetCreateConfig.CreateConfigPackedHeaders/235, where GetParam() = (32:VAProfileAV1Profile0, 6:VAEntrypointEncSlice)
QuerySurfaces/VAAPIQuerySurfaces.QuerySurfacesWithConfigAttribs/235, where GetParam() = (32:VAProfileAV1Profile0, 6:VAEntrypointEncSlice)
CreateSurfaces/VAAPICreateSurfaces.CreateSurfacesWithConfigAttribs/3995, where GetParam() = (32:VAProfileAV1Profile0, 6:VAEntrypointEncSlice, 16x16)
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29934 >
2024-06-28 14:19:22 +00:00
David Rosca
a3f35964ba
gallium/vl: Init shaders on first use
...
It takes significant amount of time at va context creation, and most
of the time the postproc pipelines are not used anyway.
This reduces total time it takes to run all libva-utils tests on my machine
from 38s to 28s.
Reviewed-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29936 >
2024-06-28 13:34:35 +00:00
Luc Ma
6f1dd9a2aa
gallium: inline trivial needs_pack()
...
No functional change.
Signed-off-by: Luc Ma <luc@sietium.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29833 >
2024-06-28 11:22:23 +00:00
Luc Ma
cde1a1d5c2
gallium: properly propagate the usage of resource
...
In case that some drivers might make decision depending on it,
it is better to tell drivers about usage of resource just like
in `blit_to_staging()` and `st_TexSubImage()` etc before going
to blit.
Signed-off-by: Luc Ma <luc@sietium.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29833 >
2024-06-28 11:22:23 +00:00
Konstantin Seurer
9ae1c5dce3
radv: Refactor radv_(dst|src)_access_flush
...
A few ifs should be faster and more readable than looping over every set
bit.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
Konstantin Seurer
41619da397
radv: Handle AS access bits like shader storage access bits
...
Acceleration structures are accessed directly from shaders or via
PKT3_WRITE_DATA.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
Konstantin Seurer
ca96abe1cb
radv: Remove write access handling from radv_dst_access_flush
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
Konstantin Seurer
3eefd0b040
radv: Remove handling for expanded access flags
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
Konstantin Seurer
135348a3c3
radv: Remove no-op access flag handling
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
Konstantin Seurer
3acab3dfff
radv: Use vk_expand_(src|dst)_access_flags2
...
Simplifies access flags handling since the driver doesn't have to worry
about VK_ACCESS_2_MEMORY_READ_BIT and friends.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
Konstantin Seurer
b0fa138c86
vulkan: Add vk_expand_(dst|src)_access_flags2
...
Those helpers do not filter out dead access bits to keep synchronization
conservative.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
Konstantin Seurer
7b3cdacf7f
vulkan: Handle group stages in vk_.*_access2_for_pipeline_stage_flags2
...
Avoids calling vk_expand_.*_stage_flags2.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
Eric Engestrom
76db69047f
panfrost/ci: split gl & vk jobs rules
...
No need to run all the gl jobs on vk changes, and vice-versa.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29942 >
2024-06-28 08:19:07 +00:00
Eric Engestrom
cdc0e60df5
panfrost/ci: drop duplicate job rules
...
It's overwritten by the `.panfrost-bifrost-manual-rules` 3 lines below.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29942 >
2024-06-28 08:19:07 +00:00
Samuel Pitoiset
88864b707a
radv: enable task shaders support with NV DGC
...
No games are using task shaders with DGC at the moment but this is
supposed to work.
This fixes test_amplification_shader_execute_indirect from vkd3d.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
Samuel Pitoiset
e6aee84265
radv: fix a synchronization issue with non-preprocessed DGC with task shader
...
We need to make sure that the DGC ACE IB will wait for the DGC
prepare shader before the execution starts. When DGC is preprocessed
the synchronization is already correct.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
Samuel Pitoiset
74713469e1
radv: disable conditional rendering with DGC and task shaders
...
When the DGC prepare shader is conditionally executed on the graphics
queue, the generated IBs might be uninitialized. It's fine for the
DGC GFX IB because the INDIRECT_PACKET would also be conditionally
skipped but it's not possible to do that for the DGC ACE IB
(ie. no IB2 on compute).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
Samuel Pitoiset
fec2385301
radv: emit push constant for task shaders with DGC
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
Samuel Pitoiset
1ffb420edd
radv: adjust the base upload offset when DGC uses task shaders
...
The upload space is after the DGC ACE IB.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
Samuel Pitoiset
f55d4f2f09
radv: reserve space for push constants in the DGC ACE IB
...
The upload space will be shared for both IBs when push constants need
to be allocated.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
Samuel Pitoiset
8d321421c7
radv: rework emitting push constants with DGC
...
Using a push constant stages mask to emit them in the DGC ACE IB for
task shaders.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
Samuel Pitoiset
f6150edbb3
radv: split allocating and emitting push constants with DGC
...
This will allow us to emit push constants for task shaders.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
Samuel Pitoiset
1f7bdcfa8d
radv: add a helper that determines if DGC uses task shaders
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
Samuel Pitoiset
58327fd3bf
radv: pre-compute the base upload offset in radv_prepare_dgc()
...
It will need to be adjusted if task+mesh shaders need to allocate
push constants.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
Samuel Pitoiset
842f3ea133
radv: improve clarity of DGC offset computations
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
Samuel Pitoiset
bc52e77397
radv: fix incorrect cache flushes before decompressing DCC on compute
...
Found by luck.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29940 >
2024-06-28 05:54:20 +00:00
Sagar Ghuge
edcad250ed
intel/compiler: Don't use half float param for sample_b
...
Looks like some of the tests uses the bias which does not fit into half
float parameter, so it's better to use float param for sample_b.
If we have cube arrays, we anyway combine BIAS and array index properly
so we don't have to worry about the first parameter.
This fixes: GTF-GL46.gtf21.GL3Tests.texture_lod_bias.texture_lod_bias_clamp_m_g_M
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29533 >
2024-06-28 03:33:18 +00:00
Sushma Venkatesh Reddy
d8c2930da0
drm-uapi: Sync i915_drm.h with a78313bb206e
...
Sync i915_drm.h with a78313bb206e
commit a78313bb206e0c456a989f380c4cbd8af8af7c76
Author: Dave Airlie <airlied@redhat.com >
Date: Thu Jun 27 17:21:43 2024 +1000
Merge tag 'drm-intel-gt-next-2024-06-12' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next
Fixes: a9f1151de2 ("intel/hang_replay: use hw image param")
Signed-off-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29885 >
2024-06-28 00:03:39 +00:00
Dylan Baker
35298e84f1
intel/compiler: move predicated_break out of backend loop
...
This has no impact on the generated shaders, but does have a small
(positive) impact on the amount of time spent in shader compilation.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29126 >
2024-06-27 15:20:19 -07:00
Jordan Justen
7b3149c99b
intel/brw: Retype some regs to BRW_TYPE_UD for Xe2 indirect accesses
...
Following https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28957 ,
some Xe2 code paths started triggering asserts.
In the cases fixed by this patch, it was because of the assert added
to brw_type_larger_of() in cf8ed9925f ("intel/brw: Make a helper for
finding the largest of two types"), and then brw_type_larger_of() is
used in 674e89953f . (For example, the assert was triggering when the
SHL types differed between D and UD.)
Fixes: 674e89953f ("intel/brw: Use new builder helpers that allocate a VGRF destination")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Francisco Jerez <currojerez@riseup.net >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29925 >
2024-06-27 21:51:07 +00:00
Karol Herbst
646a0ea576
meson: rename with_gallium_opencl to with_gallium_clover
...
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29646 >
2024-06-27 20:50:32 +00:00
Patrick Lerda
82e9880b04
clover: fix meson opencl-spirv option
...
As reported by https://gitlab.freedesktop.org/mesa/mesa/-/issues/10674
this option is broken. Indeed, when "with_clc" is false the compilation
process failed with the following error:
"ERROR: Unknown variable "idep_mesaclc".
Fixes: 815a6647eb ("meson: do not pull in clc for clover")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10674
Signed-off-by: Patrick Lerda <patrick9876@free.fr >
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29646 >
2024-06-27 20:50:32 +00:00
Paulo Zanoni
746f41e705
anv: properly store the engine_class_supported_count values
...
Function anv_physical_device_try_create() creates the devinfo variable
and then at some point it copies its contents to device->info:
device->info = devinfo;
Much much later we're calling:
intel_common_update_device_info(fd, &devinfo);
... which is updating devinfo but not device->info. As a consequence,
we're only creating one queue, as engine_class_supported_count[klass]
is zero for everybody.
Fixes: 5b8b4f7878 ("intel/dev: Add engine_class_supported_count to intel_device_info")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29927 >
2024-06-27 20:19:39 +00:00
Lionel Landwerlin
cff6df7e11
anv: limit vertex fetch invalidation on indirect read
...
Only used on Gfx9
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29810 >
2024-06-27 19:01:50 +00:00
Ian Romanick
531461d576
intel/brw: Test corner case CSE of ADD3 instructions
...
When the destination of both instructions is NULL and the conditional
modifier matches, operands_match (by way of instructions_match) will
only test the first two operands. This can result in bad CSE
happening.
This is a very, very narrow edge case.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29848 >
2024-06-27 18:34:53 +00:00
Kenneth Graunke
7adccbd48d
intel/brw: Support CSE of ADD3
...
This one is a bit more complex in that we need to handle 3-source
commutative opcodes. But it's also quite useful:
fossil-db results on Alchemist (A770):
Instrs: 151659750 -> 150164959 (-0.99%); split: -0.99%, +0.01%
Cycles: 12822686329 -> 12574996669 (-1.93%); split: -2.05%, +0.12%
Subgroup size: 7589608 -> 7589592 (-0.00%)
Send messages: 7375047 -> 7375053 (+0.00%); split: -0.00%, +0.00%
Loop count: 46313 -> 46315 (+0.00%); split: -0.01%, +0.01%
Spill count: 110184 -> 54670 (-50.38%); split: -50.79%, +0.41%
Fill count: 213724 -> 104802 (-50.96%); split: -51.43%, +0.47%
Scratch Memory Size: 9406464 -> 3375104 (-64.12%); split: -64.35%, +0.23%
Our older Shadow of the Tomb Raider fossil is particularly helped with
over a 90% reduction in scratch access (spills, fills, and scratch
size). However, benchmarking in the actual game shows no change in
performance. We're thinking the game's shaders have been updated since
our capture.
Ian noted that there was a bug here where we'd accidentally CSE two ADD3
instructions with null destinations and different src[2] that couldn't
be dead code eliminated due to conditional mods. However, this is only
a bug in the new cse_defs pass so we don't need to nominate this for
stable branches.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29848 >
2024-06-27 18:34:53 +00:00
Eric Engestrom
e1b1114bc2
v3d/ci: add nightly job for rusticl testing
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851 >
2024-06-27 17:49:02 +00:00
Eric Engestrom
959d38099f
llvmpipe,rusticl/ci: move rusticl files rule out of llvmpipe
...
With the next commit, llvmpipe will no longer be the only driver to test rusticl.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851 >
2024-06-27 17:49:02 +00:00
Eric Engestrom
70dfe9c6d1
ci: include rusticl in the arm64 build
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851 >
2024-06-27 17:49:02 +00:00
Eric Engestrom
b2a025f9a2
llvmpipe/ci: set rusticl variables in deqp-runner instead of passing them down from the job
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851 >
2024-06-27 17:49:02 +00:00
Eric Engestrom
5b3782a5ab
llvmpipe/ci: fix indentation of list nested in a dict item
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851 >
2024-06-27 17:49:01 +00:00
Eric Engestrom
3d09f93287
llvmpipe/ci: add comment for later on weird-looking code
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851 >
2024-06-27 17:49:01 +00:00
Mike Blumenkrantz
332252966b
ci: kill filament trace globally
...
this one is flaky and pointless
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29937 >
2024-06-27 14:36:13 +00:00
Vinson Lee
7c72580d23
panvk: Remove duplicate variable src_idx
...
Fix defect reported by Coverity Scan.
Evaluation order violation (EVALUATION_ORDER)
write_write_typo: In src_idx = src_idx = binding_layout->desc_idx + i * desc_stride + subdesc_idx,
src_idx is written twice with the same value.
Fixes: 7bea6f8612 ("panvk: Overhaul the Bifrost descriptor set implementation")
Signed-off-by: Vinson Lee <vlee@freedesktop.org >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29865 >
2024-06-27 12:49:30 +00:00
Alexandre Marquet
f5b44838a1
panfrost: implement SFBD raw format support on v4
...
For v4 GPUs, raw formats support is currently advertised as "not finished for SFBD".
This patch implements it.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10571
Signed-off-by: Alexandre Marquet <tb@a-marquet.fr >
Acked-by: Eric R. Smith <eric.smith@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29062 >
2024-06-27 12:21:03 +00:00
Collabora's Gfx CI Team
965627bc48
Uprev Piglit to 647d0725024f72bc49bbc91c686c5f61168a1fe8
...
fdf3fc09de...647d072502
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29886 >
2024-06-27 11:26:26 +00:00
Boris Brezillon
0e74b6eda9
panvk: Add support for layered rendering
...
This is needed if we want to use vk_meta_blit.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29450 >
2024-06-27 10:57:39 +00:00
Boris Brezillon
743b41a284
panvk: Use IDVS jobs when we can
...
This optimizes things by splitting the position and vertex
processing in two, allowing primitives to be discarded before
the varying shader is executed.
This optimization is even more important if we throw
layered rendering into the mix, because layered rendering on
Bifrost is implemented with N IDVS/fragment jobs (N being the
number of layers), with primitives not targetting a given
layer being artificially culled in the vertex shader by
issuing a position outside the render area.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29450 >
2024-06-27 10:57:39 +00:00
Boris Brezillon
8293376f7c
pan/blitter: Let pan_preload_fb() callers queue the jobs to the job chain
...
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29450 >
2024-06-27 10:57:38 +00:00
Boris Brezillon
629b9258df
pan/desc: Prepare things for fragment job chaining
...
Right now we assume the fragment job chain contains only one job, but
with multilayer/multiview rendering, we want to submit fragment jobs
for all layers at once.
Turn pan_emit_fragment_job() into pan_emit_fragment_job_payload() and
delegate the job header packing to the caller.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29450 >
2024-06-27 10:57:38 +00:00
Boris Brezillon
c694556657
pan/desc: Extend pan_emit_fbd() to support multilayer rendering
...
Right now, we always emit a framebuffer descriptor for the first layer
in the RT views. Extend the logic so we can emit one FBD per layer we're
supposed to render to without having to manually modify the RT views.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29450 >
2024-06-27 10:57:38 +00:00
Samuel Pitoiset
037eaa962b
radv: add support for executing the DGC ACE IB
...
It's disabled for now.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:50 +00:00
Samuel Pitoiset
1e0c6fab21
radv: add support for preparing the ACE IB in DGC
...
This is still missing push constants.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:50 +00:00
Samuel Pitoiset
723acbe1e2
radv: add a helper to pad DGC IB
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:50 +00:00
Samuel Pitoiset
0a5c6415d1
radv: refactor some DGC helpers in preparation for the ACE IB
...
These will be re-used for generating the ACE IB.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:49 +00:00
Samuel Pitoiset
12cc97a157
radv: prepare for DISPATCH_TASKMESH_DIRECT_ACE emission in the DGC shader
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:49 +00:00
Samuel Pitoiset
8a81a6066d
radv: prepare for DISPATCH_TASKMESH_GFX emission in the DGC shader
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:49 +00:00
Samuel Pitoiset
bdbe3e5886
radv: add support for computing the DGC ACE IB size
...
For task shaders, RADV will need to prepare two command buffers in the
DGC prepare shader. The preprocess buffer will be splitted in two
parts, one for GFX and one for ACE.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:49 +00:00
Samuel Pitoiset
99cd8b6a54
radv: add a helper to execute a DGC IB
...
It will be used to execute DGC IB for task shaders too.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:49 +00:00
Konstantin Seurer
e6772654ac
venus: Disable sparse binding on lavapipe
...
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408 >
2024-06-27 09:29:34 +00:00
Konstantin Seurer
6f28bf41f2
venus: Refactor hiding sparse features and properties
...
Disabling them after querying allows for driver workarounds.
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408 >
2024-06-27 09:29:34 +00:00
Konstantin Seurer
6168317b84
lavapipe: Implement shaderResourceResidency
...
Adds a bit set to llvmpipe_resurce where each bit stores the residency
of a 64KB tile. The sampling code is adjusted to make use of said table
and return a residency code for sparse texture operations.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408 >
2024-06-27 09:29:34 +00:00
Konstantin Seurer
d747c4a874
lavapipe: Implement sparse buffers and images
...
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408 >
2024-06-27 09:29:34 +00:00
Konstantin Seurer
a062544d3d
llvmpipe: Use an anonymous file for memory allocations
...
Preparation for sparse.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408 >
2024-06-27 09:29:34 +00:00
Konstantin Seurer
fcc0fd2fc1
gallium: Add a memory range parameter to resource_bind_backing
...
Needed to bind regions of the resource.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408 >
2024-06-27 09:29:34 +00:00
Konstantin Seurer
56028a888e
lavapipe: Do not allocate 0 sized buffers for descriptor sets
...
This will crash the new llvmpipe allocation mechanism.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408 >
2024-06-27 09:29:34 +00:00
Dave Airlie
3d159c02f6
llvmpipe: Introduce llvmpipe_memory_allocation
...
Will be useful for adding sparse info to pipe_memory_allocation.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408 >
2024-06-27 09:29:34 +00:00
Konstantin Seurer
eb64ce4386
util: Add a helper for querying sparse tile sizes
...
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408 >
2024-06-27 09:29:33 +00:00
Tapani Pälli
a603cc0633
anv: move some pc was to batch_emit_pipe_control_write
...
These were only applied in emit_apply_pipe_flushes but in theory could
be required for some other individually shot pipe controls.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29897 >
2024-06-27 09:02:03 +00:00
Georg Lehmann
3bfba9c565
iris/ci: update trace checksums
...
There is a small difference, but it looks like a minor precision change to me.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
Georg Lehmann
7fc8ad2ddd
aco/ir: remove unused vopc helpers
...
And rename get_swapped and get_inverse to show that they should only be used for VOPC.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
Georg Lehmann
2225a32bb0
aco: remove ordered/unordered optimizations
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
Georg Lehmann
3e86d2452f
nir/opt_algebraic: add various unordered/ordered patterns from aco
...
Foz-DB Navi21:
Totals from 6747 (8.50% of 79395) affected shaders:
MaxWaves: 134646 -> 134642 (-0.00%)
Instrs: 7830299 -> 7828851 (-0.02%); split: -0.03%, +0.01%
CodeSize: 43045532 -> 43010260 (-0.08%); split: -0.09%, +0.00%
VGPRs: 378960 -> 378968 (+0.00%)
SpillSGPRs: 1209 -> 1208 (-0.08%)
Latency: 74667977 -> 74670405 (+0.00%); split: -0.02%, +0.02%
InvThroughput: 20124981 -> 20124768 (-0.00%); split: -0.02%, +0.02%
VClause: 162870 -> 162868 (-0.00%); split: -0.00%, +0.00%
SClause: 277280 -> 277315 (+0.01%); split: -0.00%, +0.02%
Copies: 528627 -> 528667 (+0.01%); split: -0.00%, +0.01%
PreSGPRs: 319526 -> 319508 (-0.01%)
PreVGPRs: 334264 -> 334265 (+0.00%); split: -0.00%, +0.00%
VALU: 5485412 -> 5485408 (-0.00%); split: -0.02%, +0.02%
SALU: 743882 -> 742301 (-0.21%); split: -0.21%, +0.00%
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
Georg Lehmann
434dfb51ca
nir/opt_algebraic: optimize cmp(fneg(a), #b) and feq with fabs
...
Foz-DB Navi21:
Totals from 2483 (3.13% of 79395) affected shaders:
Instrs: 4067533 -> 4067756 (+0.01%); split: -0.00%, +0.01%
CodeSize: 22525156 -> 22499904 (-0.11%); split: -0.12%, +0.01%
Latency: 51967223 -> 51963654 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 16685020 -> 16683045 (-0.01%); split: -0.01%, +0.00%
SClause: 131890 -> 131907 (+0.01%)
Copies: 402557 -> 402510 (-0.01%); split: -0.01%, +0.00%
Branches: 146962 -> 146958 (-0.00%)
PreSGPRs: 118404 -> 118401 (-0.00%)
PreVGPRs: 123791 -> 123787 (-0.00%)
VALU: 2709846 -> 2710174 (+0.01%); split: -0.00%, +0.01%
SALU: 565883 -> 565786 (-0.02%)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
Georg Lehmann
98cc57bccb
nir/optimize cmp(a, -0.0)
...
+0.0 can use an inline constant for AMD hardware,
-0.0 needs a literal.
Foz-DB Navi21:
Totals from 1014 (1.28% of 79395) affected shaders:
Instrs: 3037490 -> 3036849 (-0.02%); split: -0.02%, +0.00%
CodeSize: 17060228 -> 17051276 (-0.05%); split: -0.05%, +0.00%
Latency: 45916788 -> 45916600 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 12982201 -> 12982187 (-0.00%); split: -0.00%, +0.00%
VClause: 79475 -> 79478 (+0.00%)
SClause: 119935 -> 119934 (-0.00%); split: -0.00%, +0.00%
Copies: 301641 -> 300964 (-0.22%); split: -0.23%, +0.00%
PreSGPRs: 59155 -> 59144 (-0.02%)
VALU: 2032016 -> 2032034 (+0.00%)
SALU: 386424 -> 385729 (-0.18%)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
Georg Lehmann
8e6bf596cb
nir/opt_algebraic: look through fabs/fneg when matching fmulz/ffmaz
...
Prevents regressions when removing input modifiers from a == 0.0.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
Georg Lehmann
080e03d021
ac/nir: enable ford, funord, fneo, fequ, fltu, fgeu
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
Georg Lehmann
3dfc8b3bcf
ac/llvm: implement ford, funord, fneo, fequ, fltu, fgeu
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
Georg Lehmann
c5ba17cd25
aco: implement ford, funord, fneo, fequ, fltu, fgeu
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
Georg Lehmann
99372c1ed7
nir: add ford, funord, fneo, fequ, fltu, fgeu
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:29 +00:00
Francisco Jerez
01118a3fbb
anv/xe2+: Align push constant ranges to GRF boundaries.
...
This fixes corruption of push constants on Xe2 due to a mismatch in
the uniform layout implemented by the compiler and assumed by the
driver. To fix it we need to align the push constant ranges computed
by the Vulkan driver to a multiple of the GRF size of the platform.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29926 >
2024-06-27 07:39:17 +00:00
Francisco Jerez
039f4fe25e
intel/dev: Add GRF size information to the intel_device_info struct.
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29926 >
2024-06-27 07:39:17 +00:00
Yiwei Zhang
fea9de3c83
vulkan: properly ignore unsupported feature structs
...
This is inspired from below MR but done in the fixed way:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26767
The requirements used to look up struct extensions are missing the alias
check for those promoted ones. This change fixes it so that the
condition now is correct.
We can land this now as all drivers have migrated to use the common
properties, which has now also been mandated.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29846 >
2024-06-27 07:04:39 +00:00
Iago Toral Quiroga
4e6b675974
broadcom/compiler: drop multop if we dce umul24
...
We always emit multop+umul24 to implement integer multiply and
this is the only scenario in which we use multop, so if we decide
to DCE umul24 we should also DCE the previous multop.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29909 >
2024-06-27 06:43:09 +00:00
Iago Toral Quiroga
0a7a36372f
broadcom/compiler: validate rtop + thrsw hazard
...
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29909 >
2024-06-27 06:43:09 +00:00
Iago Toral Quiroga
d1f8351f3c
broadcom/compiler: fix per-quad spilling
...
This is not safe when we have conditional spills since we could be
spilling disabled lanes with undefined values that could overwrite
valid data for those lanes from a previous spill of the same temp
that was unconditional (or that condionally enabled those same
lanes).
Fixes some Piglit OpenCL tests as well as the following OpenCL tests:
integer_divideAssign
integer_moduloAssign
integer_mad_sat
integer_ops integer_divideAssign
integer_ops integer_mad_sat
integer_ops integer_moduloAssign
integer_ops quick_char_math
integer_ops quick_short_math
math_brute_force half_powr
math_brute_force pow
math_brute_force pown
math_brute_force powr
math_brute_force rootn
Fixes: 597560e27c ('broadcom/compiler: always enable per-quad on spill operations')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29909 >
2024-06-27 06:43:09 +00:00
Iago Toral Quiroga
38b7f411a1
broadcom/compiler: don't spill in between multop and umul24
...
The multop instruction implicitly writes rtop which is not preserved
acrosss thread switches. We can spill the sources of the multop
(since these would happen before multop) and the destination of
umul24 (since that would happen after umul24).
Fixes some OpenCL tests when V3D_DEBUG=opt_compile_time is used to
choose a different compile configuration.
cc: mesa-stable
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29909 >
2024-06-27 06:43:09 +00:00
Jeremy Gebben
da1a7c04bc
radv: Return hang status from radv_check_gpu_hangs()
...
Return VK_ERROR_DEVICE_LOST if a hang is detected. This is necessary
because the application needs to know if it should call
vkGetDeviceFaultInfoEXT().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29921 >
2024-06-27 06:07:53 +00:00
Timothy Arceri
6006588ad8
glsl: remove out of date TODO
...
The TODO was complete when the glsl version of this function was removed
in 318d8ce6fc
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29887 >
2024-06-27 01:02:25 +00:00
Francisco Jerez
79fa3eba11
intel/fs/xe2+: Add ALU-based implementation of barycentric interpolation at a per-channel sample.
...
This implements a replacement for the previous implementation of
nir_intrinsic_load_barycentric_at_sample that relied on the Pixel
Interpolator shared function, since it's going to be removed from the
hardware from Xe2 onwards.
This implementation simply looks up the X/Y offsets of each sample
index on the table provided in the PS thread payload by using indirect
addressing, then does the actual interpolation by recursing into
emit_pixel_interpolater_alu_at_offset() introduced in the previous
commit.
Note that even though this is only immediately useful on Xe2+
platforms there's no reason why it shouldn't work on earlier
platforms, as long as we have the sample X/Y offsets available in the
thread payload.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29847 >
2024-06-27 00:18:00 +00:00
Francisco Jerez
95eec5a0dd
intel/fs/xe2+: Add ALU-based implementation of barycentric interpolation at a per-channel offset.
...
This implements a replacement for the previous implementation of
nir_intrinsic_load_barycentric_at_offset that relied on the Pixel
Interpolator shared function, since it's going to be removed from the
hardware from Xe2 onwards.
That's okay since we can get all the primitive setup information
needed for interpolation at an arbitrary coordinate: We use the X/Y
offset relative to the "X/Y Start" coordinates from the thread payload
order to evaluate the plane equations also provided in the thread
payload for each barycentric coordinate of each polygon. The
evaluation of the barycentric plane equations (and the RHW plane
equation for perspective-correct interpolation) uses the accumulator
and MAD/MAC for ALU efficiency, but that means we need to manually
split instructions to fit the width of the accumulator. The division
and scaling for perspective-correct interpolation is also now done in
the shader if necessary.
Note that even though this is only immediately useful on Xe2+, the
thread payload numbers are filled out for older platforms, and the EU
restrictions of previous Xe platforms are taken into account, mostly
for the purposes of testing and performance evaluation.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29847 >
2024-06-27 00:18:00 +00:00
Francisco Jerez
e8007c9325
intel/fs/xe2+: Don't lower barycentric load offsets to fixed-point format on Xe2+.
...
Floating-point offsets work fine in combination with the
floating-point arithmetic we're about to lower these intrinsics into,
and they require less instructions than converting to fixed-point and
then back. No reason to take the precision/range hit nor the extra
instructions.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29847 >
2024-06-27 00:18:00 +00:00
Francisco Jerez
04b5b8b9ec
anv/gfx11+: Request PS payload fields for ALU-based interpolation via 3DSTATE_PS_EXTRA.
...
Plumb the prog_data bits recently introduced for ALU-based
interpolation down to 3DSTATE_PS_EXTRA emission in the Vulkan driver.
Even though this is only going to be used on Xe2+ for now there seems
to be no reason not to plumb the bits on all platforms back to gfx11,
since the 3DSTATE_PS_EXTRA enables already existed on ICL.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29847 >
2024-06-27 00:18:00 +00:00
Francisco Jerez
76f095c354
iris/gfx11+: Request PS payload fields for ALU-based interpolation via 3DSTATE_PS_EXTRA.
...
Plumb the prog_data bits recently introduced for ALU-based
interpolation down to 3DSTATE_PS_EXTRA emission in the GL driver, as
well as the uses_depth_w_coefficients bit that was already in use by
the Vulkan driver for CPS shaders. Even though this is only going to
be used on Xe2+ for now there seems to be no reason not to plumb the
bits on all platforms back to gfx11, since the 3DSTATE_PS_EXTRA
enables already existed on ICL.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29847 >
2024-06-27 00:18:00 +00:00
Francisco Jerez
3d30cc82f9
intel/fs/xe2+: Ask driver for PS payload registers based on barycentric load intrinsics in use.
...
The ALU-based implementation of the barycentric interpolation
intrinsics introduced by a subsequent commit will require some
primitive setup information not delivered in the PS thread payload
unless explicitly requested:
- "Source Depth and/or W Attribute Vertex Deltas" if a
perspective-correct interpolation mode is used -- Note that this is
already requested for CPS interpolation, we just need to enable it
in more cases.
- "Perspective Bary Planes" if a perspective-correct interpolation
mode is used.
- "Non-Perspective Bary Planes" if a non-perspective-corrected
interpolation mode is used.
- "Sample offsets" if any at_sample interpolation is used so the
coordinate offsets of the sample can be calculated.
This ALU implementation of barycentric interpolation will only be
needed for *_at_offset and *_at_sample interpolation, since the fixed
function hardware still computes barycentrics for us at the current
sample coordinates, only the cases that previously relied on the Pixel
Interpolator shared function need to be re-implemented with ALU
instructions, since that shared function will no longer exist on Xe2
hardware.
Thanks to Rohan for a bugfix of the uses_sample_offsets calculation,
this patch includes his fix squashed in.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29847 >
2024-06-27 00:18:00 +00:00
Eli Schwartz
e60dcaa71d
meson: add various generated header dependencies as order-only deps
...
https://mesonbuild.com/FAQ.html#how-do-i-tell-meson-that-my-sources-use-generated-headers
A few locations had underspecified deps on the header files, and this
caused builds to fail given sufficient parallelism.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29115 >
2024-06-26 22:54:50 +00:00
Eli Schwartz
a4e0eb55ce
meson: create libglsl declared dependency to propagate order-only deps
...
https://mesonbuild.com/FAQ.html#how-do-i-tell-meson-that-my-sources-use-generated-headers
A few locations had underspecified deps on the header files, and this
caused builds to fail given sufficient parallelism. Fix this by creating
an interface library that can be linked against, instead.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29115 >
2024-06-26 22:54:50 +00:00
Eric Engestrom
d2c084beb9
drm-shim: stub syncobj_timeline_signal ioctl
...
Fixes
DRM_SHIM: unhandled core DRM ioctl 0xCD (0xc01864cd)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29919 >
2024-06-26 21:15:40 +00:00
Eric Engestrom
d2a2bc5040
ci: reorder alpine/x86_64_build rules to fix the nightly pipelines
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11400
Fixes: fdd204538b ("ci: build docs using meson")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29908 >
2024-06-26 20:25:39 +00:00
Eric Engestrom
2156ea8ec7
docs/ci: drop .no_scheduled_pipelines-rules from test-docs
...
None of the existing rules can match in a scheduled pipeline, so we already `never` run.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29908 >
2024-06-26 20:25:39 +00:00
Eric Engestrom
aba6bf7765
docs/ci: auto-run test-docs in fork pipelines
...
Since it's gated on a manual container job already.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29908 >
2024-06-26 20:25:39 +00:00
Eric Engestrom
d48c91c582
docs/ci: merge test-docs and test-docs-mr
...
No reason to have two different jobs, they both do exactly the same
thing with just different rules for existing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29908 >
2024-06-26 20:25:39 +00:00
Eric Engestrom
5e44b4b123
docs/ci: fix indentation of list nested in a dict item
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29908 >
2024-06-26 20:25:39 +00:00
Ian Romanick
5bc05c6f53
intel/tools: Advertise I915_PARAM_HAS_EXEC_TIMELINE_FENCES
...
This has been required from the kernel for quite some time, but it
wasn't (and technically still isn't) explicitly checked. Commit
7da5b1caef changed the code paths such that an assertion is hit when
I915_PARAM_HAS_EXEC_TIMELINE_FENCES is not available.
Fixes: 7da5b1caef ("anv: move trtt submissions over to the anv_async_submit")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29920 >
2024-06-26 20:00:26 +00:00
Alyssa Rosenzweig
dd85b50d18
treewide: use nir_break_if
...
Via Coccinelle patch and some manual hunk editing:
@@
expression b, E;
@@
-nir_push_if(b, E);
-{
-nir_jump(b, nir_jump_break);
-}
-nir_pop_if(b, NULL);
+nir_break_if(b, E);
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29877 >
2024-06-26 19:07:35 +00:00
Alyssa Rosenzweig
d57934fdec
nir: add nir_break_if helper
...
I see people open-coding this all over the tree and it makes nir_builder loops
really annoying. Make them slightly less annoying with a helper.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29877 >
2024-06-26 19:07:35 +00:00
Karol Herbst
3482ea599b
nir/schedule: add write dep also for shared_atomic
...
Otherwise it might change the order between a load_shared and a
shared_atomic on the same location.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29918 >
2024-06-26 18:20:14 +00:00
Connor Abbott
65298586b8
ir3: Use elect_any_ir3 in preambles
...
This fixes SP_FS_PREFETCH_CNTL::ENDOFQUAD not being used when there's a
preamble and texture prefetches.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29914 >
2024-06-26 17:40:15 +00:00
Connor Abbott
ec37e65a2d
ir3: Introduce elect_any_ir3
...
For preambles, we don't actually care which invocation we get, so we
don't have to enable helper invocations when the preamble uses "getone."
Introduce a new intrinsic with the right semantics and plumb it through.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29914 >
2024-06-26 17:40:15 +00:00
Samuel Pitoiset
fec9b56f17
radv/amdgpu: fix chaining CS with external IBs on compute queue
...
In a scenario where two non-concurrent cmdbufs are submitted to the
compute queue and with the second one using DGCC, the driver would have
chained the CS of the first cmdbuf to the new IB created right after
the DGC IB is executed.
Found while working on DGC task shader with vkd3d-proton.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29913 >
2024-06-26 17:03:10 +00:00
Mary Guillemard
bd93e33087
panvk: Enable texture filtering in CI for Mali-G52
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29872 >
2024-06-26 16:33:41 +00:00
Mary Guillemard
c45d05b1e4
panvk: Advertise VK_KHR_sampler_mirror_clamp_to_edge
...
We already support it under the hood.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29872 >
2024-06-26 16:33:41 +00:00
Mary Guillemard
111088a6db
panvk: Implement and advertise anisotropy support
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29872 >
2024-06-26 16:33:41 +00:00
Mary Guillemard
8b8eb7f3f4
panvk: Enable glsl.440.linkage in CI for Mali-G52
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29872 >
2024-06-26 16:33:41 +00:00
Mary Guillemard
a6f91afee1
panvk: Run nir_lower_io_to_vector for fragment shader
...
This makes sure that all output variables at the same location are
grouped together for bifrost_nir_lower_blend_components.
Fix various fails with
"dEQP-VK.glsl.440.linkage.varying.component.frag_out.*".
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29872 >
2024-06-26 16:33:41 +00:00
Mary Guillemard
ecbe3b30be
panvk: Do not emit blend shader when color_mask is 0
...
Also do not emit when color write is disabled.
Fix "dEQP-VK.renderpass.suballocation.attachment_write_mask.attachment_count_*.start_index_*" failures.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29872 >
2024-06-26 16:33:40 +00:00
Mary Guillemard
52c9cc6ed8
panvk: Advertise VK_EXT_private_data
...
Alread handled by common code.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29872 >
2024-06-26 16:33:40 +00:00
Mary Guillemard
afcfc72b83
panvk: Enable compute pipeline in CI for Mali-G52
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29872 >
2024-06-26 16:33:40 +00:00
Mary Guillemard
10e62cbe01
panvk: Report proper workgroup invocation and size
...
We cannot report a workgroup invocation and size bigger than
MAX_THREADS_PER_WG as splitting into serveral jobs has many limitations
that cannot be overlooked.
As such we limit to the MAX_THREADS_PER_WG property reported by kmod.
Fix "dEQP-VK.compute.pipeline.basic.max_local_size_*" failures.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29872 >
2024-06-26 16:33:40 +00:00
Mary Guillemard
b0fa3fda3a
panvk: Skip dispatch on empty workgroup
...
Fix "dEQP-VK.compute.pipeline.basic.empty_workgroup_*" crashes.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29872 >
2024-06-26 16:33:40 +00:00
Danylo Piliaiev
653a4dc58f
freedreno: Use LRZ feedback in gmem
...
(Same as in Turnip)
We set LRZ_FEEDBACK_EARLY_LRZ_LATE_Z mask for rendering pass after
HW binning because:
- Draws with EARLY_Z contributed to depth buffer in BINNING stage;
- Draws with LATE_Z is what usually disables LRZ.
- Draws with EARLY_LRZ_LATE_Z are the ones we want because they
represent the common case of FS with "discard".
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25345 >
2024-06-26 15:53:51 +00:00
Danylo Piliaiev
02b1d23fed
tu: Enable LRZ feedback in sysmem
...
The perf benefits are to be observed but that's what blob is doing.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25345 >
2024-06-26 15:53:51 +00:00
Danylo Piliaiev
2a33cd113a
tu: Use LRZ feedback in gmem
...
We set LRZ_FEEDBACK_EARLY_LRZ_LATE_Z mask for rendering pass after
HW binning because:
- Draws with EARLY_Z contributed to depth buffer in BINNING stage;
- Draws with LATE_Z is what usually disables LRZ.
- Draws with EARLY_LRZ_LATE_Z are the ones we want because they
represent the common case of FS with "discard".
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25345 >
2024-06-26 15:53:51 +00:00
Danylo Piliaiev
04e18dc96f
freedreno/devices: Define and appropriately set has_lrz_feedback
...
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25345 >
2024-06-26 15:53:51 +00:00
Danylo Piliaiev
229bd7b9b9
freedreno: Describe LRZ feedback mechanism
...
Some draws do write depth but cannot contribute to LRZ during the BINNING pass
e.g. when fragment shader has "discard" in it, however they can contribute to
LRZ during the RENDERING pass via LRZ feedback meachanism. This may allow the
draws that follow to depth test against the updated LRZ, this is especially
important if such "bad" draws were at the start of the renderpass.
LRZ feedback happens during the RENDERING pass when LRZ_FEEDBACK_ZMODE_MASK
is set, if draw has a6xx_ztest_mode that has corresponding flag set in
LRZ_FEEDBACK_ZMODE_MASK - its depth values would be used for feedback.
LRZ feedback alongside with LRZ testing also works during sysmem rendering.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25345 >
2024-06-26 15:53:51 +00:00
Connor Abbott
78c5daf029
tu: Add early preamble statistic
...
It can affect performance if we accidentally disable early preamble so
record it here.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29903 >
2024-06-26 15:16:38 +00:00
Connor Abbott
337fb7dec2
ir3, tu, freedreno: Move early_preamble to ir3_shader
...
The ir3_info is reset by ir3_collect_shader_info() on the expectation
that all info is collected inside that function. This meant that we were
accidentally disabling early preamble. Re-enable it.
We keep a copy in ir3_info for shader statistics in the next commit.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29903 >
2024-06-26 15:16:38 +00:00
Connor Abbott
293f137d4d
freedreno: Disable early preamble on a6xx gen4
...
Disable it until someone does more investigation of exactly what needs
to be disabled.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29903 >
2024-06-26 15:16:38 +00:00
Connor Abbott
c42f6597f9
ir3: Make sure constlen includes stc/ldc.k/ldg.k instructions
...
nir_opt_preamble sometimes adds useless expressions, in which case we
may have stc instructions and no corresponding use of the constant.
Things can go sideways when these aren't included in the constlen, so
far only observed when earlypreamble is enabled.
Fixes: ccc64b7e00 ("ir3: Plumb through store_uniform_ir3 intrinsic")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29903 >
2024-06-26 15:16:38 +00:00
Matt Coster
536775ee8b
docs: List VK_EXT_debug_utils
...
Signed-off-by: Matt Coster <matt.coster@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24488 >
2024-06-26 15:07:16 +00:00
Valentine Burley
8cfdc099cd
tu: Use the common version of vkQueueBindSparse
...
This is implemented in the common runtime. No need to provide a stub here.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29854 >
2024-06-26 14:38:22 +00:00
Valentine Burley
d882198fc3
tu: Move buffer related code to tu_buffer.cc/h
...
More code isolation. Match the structure of the common Vulkan runtime,
NVK and RADV.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29854 >
2024-06-26 14:38:22 +00:00
Valentine Burley
c0a9b0f8d6
tu: Use the common version of vkGetBufferMemoryRequirements2
...
Additionally simplify the code by inlining the logic from
tu_get_buffer_memory_requirements directly into
tu_GetDeviceBufferMemoryRequirements.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29854 >
2024-06-26 14:38:22 +00:00
Pierre-Eric Pelloux-Prayer
1a06494e65
radeonsi/tests: clarify the output when results changes
...
Print up to 10 results that are different from the baseline:
2 new results:
* spec@!opengl 1.0@rasterpos,Crash
* spec@glsl-es-3.00 @execution@built-in-functions@vs-packhalf2x16,Fail
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29612 >
2024-06-26 14:02:13 +00:00
Pierre-Eric Pelloux-Prayer
d9f150f18b
radeonsi/tests: update tests baseline
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29612 >
2024-06-26 14:02:13 +00:00
Pierre-Eric Pelloux-Prayer
6ec95b990e
ac/nir: don't use the compute blit for PIPE_FORMAT_R5G6B5_UNORM
...
It breaks spec@arb_pixel_buffer_object@texsubimage array pbo and
spec@arb_pixel_buffer_object@texsubimage pbo with some formats:
72,3,0: test = 140,0,8,255 ref = 148,0,8,255 (comparing 8 bits)
texsubimage failed
target: GL_TEXTURE_1D_ARRAY
internal format: GL_R3_G3_B2
region: 5, 3 116 x 11
72,3,0: test = 140,0,8,255 ref = 148,0,8,255 (comparing 8 bits)
texsubimage failed
target: GL_TEXTURE_1D_ARRAY
internal format: GL_RGB5
region: 33, 3 78 x 11
72,10,0: test = 140,0,41,255 ref = 148,0,41,255 (comparing 8 bits)
texsubimage failed
target: GL_TEXTURE_1D_ARRAY
internal format: GL_RGB5_A1
region: 3, 10 124 x 33
72,19,4: test = 140,65,74,255 ref = 148,65,74,255 (comparing 8 bits)
texsubimage failed
target: GL_TEXTURE_2D_ARRAY
internal format: GL_R3_G3_B2
region: 36, 19 81 x 18
12,36,4: test = 25,66,140,255 ref = 25,66,148,255 (comparing 8 bits)
texsubimage failed
target: GL_TEXTURE_2D_ARRAY
internal format: GL_RGB5
region: 12, 9 30 x 39
72,22,2: test = 140,33,90,255 ref = 148,33,90,255 (comparing 8 bits)
texsubimage failed
target: GL_TEXTURE_2D_ARRAY
internal format: GL_RGB5_A1
region: 39, 22 36 x 37
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29612 >
2024-06-26 14:02:13 +00:00
Pierre-Eric Pelloux-Prayer
c97591b862
radeonsi: add gfx11 workaround for upgraded_depth
...
For unknown reasons, this is needed to avoid breaking
a bunch of tests:
.*tex-miplevel-selection.*
KHR-GL46.direct_state_access.framebuffers_texture_attachment,Fail
KHR-GL46.direct_state_access.framebuffers_texture_layer_attachment,Fail
.*.core.texture_cube_map_array.sampling
These failures were previously hidden by extra flushes in the
blitter that were removed in 969ed851 .
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29612 >
2024-06-26 14:02:13 +00:00
Pierre-Eric Pelloux-Prayer
abd048124a
ac/surface: reject modifiers with retile_dcc and bpe != 32
...
radv has a comment in radv_meta_dcc_retile.c:
* BPE is always 4 at the moment and the rest is derived from the tilemode.
radeonsi has in si_retile_dcc:
/* We have only 1 variant per bpp for now, so expect 32 bpp. */
assert(tex->surface.bpe == 4);
This fixes ext_image_dma_buf_import-modifiers for radeonsi.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29612 >
2024-06-26 14:02:13 +00:00
Pierre-Eric Pelloux-Prayer
9d8073a5fd
radeonsi/tests: add a shortcut to re-run only failing tests
...
'-t baseline' will only run the tests that are marked as failing.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29612 >
2024-06-26 14:02:13 +00:00
Pierre-Eric Pelloux-Prayer
27a841d335
radeonsi/tests: don't match gfx10_3 baseline for gfx10 family
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29612 >
2024-06-26 14:02:13 +00:00
Pierre-Eric Pelloux-Prayer
19e342b877
radeonsi: handle DBG(TEX) after tc_compatible_htile is set
...
Otherwise the value printed might be incorrect.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29612 >
2024-06-26 14:02:13 +00:00
Erik Faye-Lund
f4e7204e73
docs: fix bootstrap-extension
...
We shouldn't use this extension at all if we're not using the HTML
builder. This should hopefully fix this issue a bit more fundamentally.
This caused issues when using the spelling extension, something I do
locally from time to time.
Fixes: f72033bb70 ("docs: add bootstrap extension")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29888 >
2024-06-26 13:54:13 +00:00
Erik Faye-Lund
18db05d3e6
vulkan/runtime: implementaiton -> implementation
...
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29890 >
2024-06-26 12:31:00 +00:00
Erik Faye-Lund
3967f8cd84
vulkan/runtime: multiesample -> multisample
...
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29890 >
2024-06-26 12:31:00 +00:00
Erik Faye-Lund
788d1b5a67
vulkan/runtime: abreviation -> abbreviation
...
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29890 >
2024-06-26 12:31:00 +00:00
Erik Faye-Lund
947446ade7
vulkan/runtime: initizlie -> initialize
...
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29890 >
2024-06-26 12:31:00 +00:00
Erik Faye-Lund
a966a11161
vulkan/runtime: tne -> the
...
This is clearly a typo.
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29890 >
2024-06-26 12:31:00 +00:00
Karol Herbst
e5bb32da98
rusticl: enable v3d
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
0b85476d86
v3d: never replace a mapped bo
...
The application might have a pointer into the mapped bo.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
e5c4ea9323
v3d: fix MAX_GLOBAL_SIZE and MAX_MEM_ALLOC_SIZE
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
6768c81974
v3d: support variable shared memory
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
61b1a14e91
v3d: lower 64 bit ALUs
...
Even though rusticl won't advertise support for 64 bit ints, some of the
libclc builtins still use 64 bit operations to lower 32 bit ALU ops.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
7ff96fb5b0
v3d: lower CL alus
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
8f72e60c75
v3d: treat SHADER_KERNEL as SHADER_COMPUTE
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
3889a8e26c
v3d: implement gallium APIs for OpenCL support
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
742984a325
broadcom/compiler: handle variable shared memory
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
9bf0b3a112
broadcom/compiler: call nir_lower_64bit_phis
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
4a169a518e
broadcom/compiler: implement load_kernel_input
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
caa3872f76
broadcom/compiler: abort on unknown intrinsics
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
f8ab9c0e93
broadcom/compiler: handle up to vec16 load_uniforms
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:03 +00:00
Karol Herbst
e050b13777
broadcom/compiler: try handling 8/16 bit alu operations
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:02 +00:00
Karol Herbst
c7f9cca985
broadcom/compiler: fix iu2f32 for 8 and 16 bit inputs
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:02 +00:00
Karol Herbst
214121e9b0
broadcom/compiler: handle fp16 conversion ops
...
As long as fp16 isn't advertized it's not doing much, but it also doesn't
hurt to add them.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:02 +00:00
Karol Herbst
c2ec65eeda
broadcom/compiler: add generated v3d_nir_lower_algebraic
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:02 +00:00
Karol Herbst
a8f4ff691b
rusticl/kernel/launch: fix global work offsets for 32 bit archs again
...
Fixes: bb2453c649 ("rusticl/kernel: move most of the code in launch inside the closure")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:02 +00:00
Karol Herbst
39721a7476
rusticl/mesa/screen: handle get_timestamp not set by driver
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:02 +00:00
Karol Herbst
bb33dbeeaa
rusticl/mesa/context: handle clear_buffer not set by driver
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:02 +00:00
Karol Herbst
be4f3c2aa8
rusticl/device: require PIPE_CAP_TEXTURE_SAMPLER_INDEPENDENT for image support
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:02 +00:00
Karol Herbst
0fa4eaf6f6
gallium: add PIPE_CAP_TEXTURE_SAMPLER_INDEPENDENT
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:02 +00:00
Karol Herbst
d5da434851
nir/opt_sink: add load_kernel_input
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:02 +00:00
Karol Herbst
535e617ccd
nir/lower_alu: support 8 and 16 bit bit_count
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362 >
2024-06-26 10:04:02 +00:00
Daniel Schürmann
c4a38c6583
aco/spill: don't remove spilled phis
...
They will be removed during register allocation.
Few changes due to different phi order.
Totals from 14 (0.02% of 79395) affected shaders: (GFX11)
Instrs: 315724 -> 315675 (-0.02%); split: -0.02%, +0.01%
CodeSize: 1673608 -> 1673268 (-0.02%); split: -0.03%, +0.00%
Latency: 3194243 -> 3189025 (-0.16%); split: -0.19%, +0.03%
InvThroughput: 638369 -> 637323 (-0.16%); split: -0.19%, +0.03%
VClause: 5716 -> 5714 (-0.03%)
Copies: 37786 -> 37748 (-0.10%); split: -0.13%, +0.03%
Branches: 10469 -> 10454 (-0.14%); split: -0.16%, +0.02%
VALU: 182498 -> 182454 (-0.02%); split: -0.03%, +0.00%
SALU: 36038 -> 36046 (+0.02%); split: -0.01%, +0.04%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29804 >
2024-06-26 09:42:34 +00:00
Daniel Schürmann
634051f913
aco/live_var_analysis: ignore dead phis
...
Since we don't emit code for dead phis, we also don't
have to keep their operands around.
Totals from 44 (0.06% of 79395) affected shaders: (GFX11)
MaxWaves: 648 -> 650 (+0.31%)
Instrs: 449898 -> 449120 (-0.17%); split: -0.18%, +0.00%
CodeSize: 2395000 -> 2389300 (-0.24%); split: -0.24%, +0.00%
VGPRs: 5504 -> 5468 (-0.65%)
Latency: 9005058 -> 9000966 (-0.05%); split: -0.07%, +0.03%
InvThroughput: 2154567 -> 2139095 (-0.72%); split: -0.77%, +0.06%
VClause: 8362 -> 8354 (-0.10%)
SClause: 9135 -> 9134 (-0.01%)
Copies: 60678 -> 60118 (-0.92%); split: -0.93%, +0.01%
Branches: 14379 -> 14385 (+0.04%)
PreSGPRs: 3877 -> 3863 (-0.36%)
PreVGPRs: 6318 -> 6286 (-0.51%)
VALU: 266975 -> 266301 (-0.25%); split: -0.25%, +0.00%
SALU: 52741 -> 52667 (-0.14%); split: -0.15%, +0.01%
VMEM: 16140 -> 16132 (-0.05%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29804 >
2024-06-26 09:42:34 +00:00
Daniel Schürmann
708e1a73f5
aco/live_var_analysis: slightly refactor handling of additional register demand for Operand copies
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29804 >
2024-06-26 09:42:34 +00:00
Daniel Schürmann
5cfa5b784b
aco: remove get_demand_before()
...
The register demand before executing an instruction is now included
in the instruction's register demand and this function is unused.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29804 >
2024-06-26 09:42:34 +00:00
Daniel Schürmann
09f1c40f2e
aco: track and use the live-in register demand per basic block
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29804 >
2024-06-26 09:42:34 +00:00
Daniel Schürmann
001c8caae0
aco: calculate register demand per instruction as maximum necessary to execute the instruction
...
Previously, the register demand per instruction was calculated as the number of
live variables in the register file after executing an instruction plus additional
temporary registers, necessary during the execution of the instruction.
With this change, now it also includes all variables which are live right before
executing an instruction, i.e. killed Operands.
Care has been taken so that the invariant
register_demand[idx] = register_demand[idx - 1] - get_temp_registers(prev_instr)
+ get_live_changes(instr) + get_temp_registers(instr)
still holds.
Slight changes in scheduling:
Totals from 316 (0.40% of 79395) affected shaders: (GFX11)
Instrs: 301329 -> 300777 (-0.18%); split: -0.31%, +0.12%
CodeSize: 1577976 -> 1576204 (-0.11%); split: -0.21%, +0.10%
SpillSGPRs: 448 -> 447 (-0.22%)
Latency: 1736349 -> 1726182 (-0.59%); split: -2.01%, +1.42%
InvThroughput: 243894 -> 243883 (-0.00%); split: -0.03%, +0.03%
VClause: 6134 -> 6280 (+2.38%); split: -1.04%, +3.42%
SClause: 6142 -> 6137 (-0.08%); split: -0.13%, +0.05%
Copies: 14037 -> 14032 (-0.04%); split: -0.56%, +0.52%
Branches: 3284 -> 3283 (-0.03%)
VALU: 182750 -> 182718 (-0.02%); split: -0.04%, +0.03%
SALU: 18522 -> 18538 (+0.09%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29804 >
2024-06-26 09:42:33 +00:00
Daniel Schürmann
4c2f231cc0
aco/spill: Unconditionally add 2 SGPRs to live-in demand
...
Due to undefined Operands, it might not be enough to check the
predecessors' register demand.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29804 >
2024-06-26 09:42:33 +00:00
Daniel Schürmann
26c58ca9de
aco/scheduler: fix register_demand validation debug code
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29804 >
2024-06-26 09:42:33 +00:00
Rhys Perry
e3ffc244f5
aco: skip continue_or_break LCSSA phis when not needed
...
Fixes:
//exec is empty here
loop {
%1:s[16-17] = ...
if () {
break
}
%2:s[16-17] = ...
continue_or_break
}
%3 = phi %1, undef
//because of the undef, %2 can use s[16-17] and overwrite the address
load(%3:s[16-17])
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Fixes: bbe4652430 ("aco: create lcssa phis for continue_or_break loops when necessary")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11333
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29838 >
2024-06-26 09:10:54 +00:00
Julian Orth
77759f7683
egl/wayland: ignore unsupported driver configs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29904 >
2024-06-26 06:56:39 +00:00
Jianxun Zhang
3589035d61
iris: Disable predraw resolve (xe2)
...
Fixes piglit test:
arb_texture_barrier-blending-in-shader 32 1 1 64 7 -auto -fbo
src/intel/blorp/blorp_genX_exec.h:910: blorp_emit_ps_config:
Assertion `!"" "Invalid fast clear op"' failed.
Suggested by Kenneth Graunke <kenneth@whitecape.org >
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:44 +00:00
Jianxun Zhang
dc26ad1e86
anv: Update synchronization of fast clear (xe2)
...
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:44 +00:00
Jianxun Zhang
930ea030ed
isl: Initialize the last usage in isl_encode_aux_mode[] (xe2)
...
The ISL_AUX_USAGE_STC_CCS is the last defined usage. We could
get a random value from isl_encode_aux_mode[] once it is passed
as index if its element is not initialized.
Explicit initialization of ISL_AUX_USAGE_HIZ_CCS_WT is added too.
Suggested by Nanley Chery <nanley.g.chery@intel.com >
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:44 +00:00
Jianxun Zhang
9d3ce65628
blorp: Don't convert ccs_e formats for copy (xe2)
...
Fix:
dEQP-GLES3.functional.texture.filtering.3d.formats.rgb9_e5_linear
blorp_blit.c:2770: get_ccs_compatible_copy_format:
Assertion `!"" "Not a compressible format"' failed.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
255889a795
isl: Remove restriction of CCS_E support on formats (xe2)
...
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
31b48fd041
iris: Workaround: Don't allocate compressed bo from cache (xe2)
...
There should be some deeper causes to dig out. The bo-caching
system shouldn't affect the compression by design.
Fixes:
dEQP-GLES3.functional.texture.filtering.3d.formats.rgb9_e5_linear
dEQP-GLES3.functional.texture.filtering.3d.formats.rgb9_e5_linear_mipmap_linear
The two cases can pass if we run them respectively. But once they
are fed to glcts in a test case list file (test.list) to run together,
the second test case hangs for a while and eventually fails, regardless
which of them is the second.
./glcts --deqp-caselist-file=test.list
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
8a815c83c2
iris: Update synchronization of fast clear (xe2)
...
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
6073f091bb
anv: Disable PAT-based compression on depth images (xe2)
...
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
b6f9702cf1
iris: Disable PAT-based compression on depth surfaces (xe2)
...
Fix: Piglit
PIGLIT_PLATFORM="gbm" piglit/bin/getteximage-depth -auto -fbo
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
e835b53a03
anv: Don't enable compression on external bos (xe2)
...
Fix:
dEQP-VK.synchronization.cross_instance.suballocated.
write_draw_indexed_read_blit_image.image_128x128_r16
_uint_binary_semaphore_fence_fd
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
9cd97b6137
iris: Add more restrictions on compression (Xe2)
...
Also move the declaration of a local variable to where
it is going to use.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
0b75f89f57
anv: Don't enable compression with modifiers (xe2)
...
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
66fa1c5ddd
iris: Limit FCV_CCS_E to platforms that enable it
...
We want to keep aux state always in compressed and no clear,
but the write behavior of FCV will change it to compressed and
clear. Reuse old CCS_E on Xe2 to workaround it.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8785
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
df006bba02
iris: Update aux state for color fast clears (xe2)
...
The texturing and rendering preparation functions restrict
fast clear support in some cases to account for limitations
on prior platforms. Instead of updating those checks to avoid
resolves on Xe2, we can bypass them by representing the aux
state of a fast-cleared surface as compressed-no-clear. This
is valid because there is no longer a bit pattern which
references a clear value stored outside of the aux surface.
Suggested by Nanley Chery <nanley.g.chery@intel.com >
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
1c92b31888
intel/genxml,blorp,common: Update 3DSTATE_PS command (xe2)
...
From Bspec 56423 (r58507), the legacy full resovling and
partial resolving options are gone since Xe2. They also
cause hang on Xe2 if not disabled.
Some suggested code from Nanley Chery <nanley.g.chery@intel.com > is
included.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
4dfc3367fc
blorp: Pass down fast clear color value (xe2)
...
Also add a quote of Bspec for previous platforms.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
3269d505e7
blorp: Get fast clear rectangle of non-MSAA surfaces (xe2)
...
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Jianxun Zhang
3b89bdb96e
isl: Don't set clear values or their address (xe2)
...
The render surface state doesn't have these features any
more since Xe2.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906 >
2024-06-26 05:25:43 +00:00
Qiang Yu
93f790b04a
nir: fix clip cull distance lowering metadata preserve
...
indirect store lowering will use if/else which changes
the control flow of the shader.
Fixes: 110887de2b ("nir: Add a new pass to lower array dereferences on vectors")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29894 >
2024-06-26 01:22:12 +00:00
Qiang Yu
09b4ba27a3
nir: fix lower array to vec metadata preserve
...
indirect store lowering will change control flow,
so we should not preserve control flow metadate
when it's present.
Fixes: 35b8f6f40b ("nir: Add a new pass to lower array dereferences on vectors")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29894 >
2024-06-26 01:22:12 +00:00
Jianxun Zhang
7be1912625
isl: Update render CMF mapping (xe2)
...
Update mapping between render target surface formats and
compression formats.
Some preexisting correct mappings are also re-ordered to
the order of types in the spec for an easier verification
(top to bottom and left to right).
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29905 >
2024-06-25 23:02:14 +00:00
Jordan Justen
a985576755
isl: Implement isl_get_render_compression_format for xe2
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29905 >
2024-06-25 23:02:14 +00:00
Jordan Justen
bb6e8cab79
isl: Move isl_get_render_compression_format in isl_genX_helpers.h
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29905 >
2024-06-25 23:02:14 +00:00
Ian Romanick
2bbd0fd9da
intel/brw/xe2+: Add LNL cooperative matrix configurations
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28834 >
2024-06-25 14:17:47 -07:00
Ian Romanick
6b678d32cb
nir: dpas_intel second source can have different number of components
...
The number of components for the second source is -1 to avoid validation of
its value. Some supported configurations will have the component count of
that matrix different than the others.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28834 >
2024-06-25 14:17:47 -07:00
Ian Romanick
556e78f737
intel/brw/xe2+: Allow vec16 for cooperative matrix
...
Xe2 will allow a B matrix large enough that it will be stored in a
vec16.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28834 >
2024-06-25 14:17:47 -07:00
Ian Romanick
b6236dd8f3
intel/brw/xe2+: Adjust DPAS lowering to DP4A to accommodate larger GRF and SIMD16
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28834 >
2024-06-25 14:17:47 -07:00
Ian Romanick
77ef241577
intel/brw/xe2+: Scale size_written by reg_unit for DPAS
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28834 >
2024-06-25 14:17:47 -07:00
Ian Romanick
e368b8e01b
intel/brw/xe2+: Adjust size_read() for DPAS
...
v2: Remov "DG2" from a comment because it applies to DG2 and
Xe2. Suggested by Caio.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28834 >
2024-06-25 14:17:47 -07:00
Ian Romanick
b051602754
intel/brw/xe2+: Catch invalid uses of writes_accumulator earlier
...
It turns out the problem I was trying to catch in be4fa59a72
("intel/brw: Clear write_accumulator flag when changing the
destination") also came from the DPAS lowering pass itself. Checking for
invalid uses of the feature in fs_validate helped detect the problem.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28834 >
2024-06-25 14:17:47 -07:00
Ian Romanick
7a773ac53e
intel/brw: Major rework of lower_cmat_load_store
...
The original goal was to get rid of a bunch of the magic constants
sprinkled through the function. Once I did that, I realized that there
was a lot my symmertry between the row-major and column-major paths
possible.
It's +6 lines of code, but about 15 of those lines are comments
explaining things that were not obvious in the original code.
v2: Save duplicated condition in a variable with a meaningful
name. Suggested by Caio.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28834 >
2024-06-25 14:16:48 -07:00
Ian Romanick
ea6e10c0b2
intel/brw: Temporarily disable result=float16 matrix configs
...
Even though the hardware does not naively support these configurations,
there are many potential benefits to advertising them. These
configurations can theoretically use half the memory bandwidth for loads
and stores. For large matrices, that can be the limiting in performance.
The current implementation, however, has a number of significant
problems.
The conversion from float16 to float32 is performed in the driver during
conversion from NIR. As a result, many common usage patterns end up
doing back-to-back conversions to and from float16 between matrix
multiplications (when the result of one multiplication is used as the
accumulator for the next).
The float16 version of the matrix waste half the possible register
space. Each float16 value sits alone in a dword. This is done so that
the per-invocation slice of an 8x8 float16 result matrix and an 8x8
float32 result matrix will have the same number of elements. This makes
it possible to do straightforward implementations of all the unary_op
type conversions in NIR.
It would be possible to perform N:M element type conversions in the
backend using specialized NIR intrinsics. However, per #10961 , this
would be very, very painful. My hope is that, once a suitable resolution
for that issue can be found, support for these configs can be restored.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28834 >
2024-06-25 13:52:12 -07:00
Juston Li
33dd38f9d5
anv/android: set ANV_BO_ALLOC_EXTERNAL for imported AHW
...
This fixes some cacheline flush artifacts
Signed-off-by: Juston Li <justonli@google.com >
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29882 >
2024-06-25 20:21:27 +00:00
Daniel Stone
9eeaa4618f
egl/gbm: Enable RGBA configs
...
Doing this is harmless since we operate on an allowlist of pipe_configs
anyway.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29837 >
2024-06-25 19:30:12 +00:00
Daniel Stone
94e15d0f64
egl/surfaceless: Enable RGBA configs
...
Doing this is harmless since we operate on an allowlist of pipe_configs
anyway.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29837 >
2024-06-25 19:30:12 +00:00
Daniel Stone
5ca85d75c0
dri: Fix BGR format exclusion
...
The check we had for BGR vs. RGB formats was testing completely the
wrong thing. Fix it so we can restore the previous set of configs we
expose to the frontend, which also fixes surfaceless platform on s390x.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Fixes: ad0edea53a ("st/dri: Check format properties from format helpers")
Closes : mesa/mesa#11360
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29837 >
2024-06-25 19:30:12 +00:00
Job Noorman
8f2533c356
ir3: set rounding mode for all floating point conversions
...
The rounding mode was only set for a subset of floating point
conversions. This patch sets it for all of them.
Fixes all the dEQP-VK.*.float_controls.* CTS tests.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29843 >
2024-06-25 17:00:59 +00:00
Job Noorman
93db751c63
ir3: print rounding mode for cov
...
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29843 >
2024-06-25 17:00:59 +00:00
Erik Faye-Lund
8c2bfa279d
panvk: support x11 wsi
...
This seems to be enough to get XCB working. From looking at what other
drivers does, it seems likely that XLib will just work, so let's enable
that as well.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29878 >
2024-06-25 15:49:42 +00:00
José Roberto de Souza
2d29dee889
intel/perf: Extend intel_perf_query_result_read_gt_frequency() to gfx 20
...
BSpec 62720 states that the previous and current offsets remains the
same as previous gfx versions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29899 >
2024-06-25 14:16:45 +00:00
José Roberto de Souza
0a6fe638f3
intel/perf: Add INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_PEC
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29899 >
2024-06-25 14:16:45 +00:00
José Roberto de Souza
6e1852981b
intel/perf: Add LNL OA XML
...
Also added pec_offset to struct intel_perf_query_info and two new
hw variables needed by this XML, those changes are required to at
least compile with this new XML.
pec_offset will be set in the next patches.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29899 >
2024-06-25 14:16:45 +00:00
José Roberto de Souza
5b8b4f7878
intel/dev: Add engine_class_supported_count to intel_device_info
...
Next patch will need to frequently get the count of supported engine
for compute and copy engines, so to reduce the overhead of doing
KMD queries at every call here caching this information into
intel_device_info struct.
With that ANV and Iris would need to set this information as intel/dev
can't depend on intel/common, so here adding a single function
to update intel_device_info with all fields filled by intel/common
functions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29899 >
2024-06-25 14:16:45 +00:00
José Roberto de Souza
2f2a0bc083
intel/perf: Add assert to check if allocated enough query fiels
...
Xe2 platforms will have way more query fields and allocation of that
will need to be increased but first lets add a function to return the
max_fields and assert if tried to access more query fields then
allocated.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29899 >
2024-06-25 14:16:45 +00:00
José Roberto de Souza
0a51842f7a
intel/perf: Change order of if blocks
...
Most places we follow the newest GFX version first, so doing that
here.
No changes in behavior exepected.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29899 >
2024-06-25 14:16:45 +00:00
Michel Dänzer
2dec0cbe01
egl/dri: Use packed pipe_format
...
This is consistent with __DRI_IMAGE_FORMAT_ARGB8888 and the rest of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27709 .
This makes no difference with little endian, it does with big endian
though.
Fixes: dcbf61f5df ("egl/dri: Use pipe_format instead of DRI_IMAGE_FORMAT")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29781 >
2024-06-25 12:27:17 +00:00
Erik Faye-Lund
fdd204538b
ci: build docs using meson
...
To avoid having to inflate the image here even further, let's just add
what we need to the the normal x86 Alpine build image, and use that.
Reviewed-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11494 >
2024-06-25 10:59:54 +00:00
Erik Faye-Lund
1e7636fbb1
meson: allow specifying html-docs-path
...
This will allow us to decide where to install docs. Useful for GitLab
Pages on CI.
Reviewed-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11494 >
2024-06-25 10:59:54 +00:00
Erik Faye-Lund
e31dde13d1
meson: error when missing hawkmoth
...
Hawkmoth is a hard depedency, and building without it will lead to
errors. Give a friendly error early on.
Reviewed-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11494 >
2024-06-25 10:59:54 +00:00
Erik Faye-Lund
2063003457
docs: automatically generate depfile
...
We need to regenerate the docs if any of the rst-files are changed. So
let's add a simple extension to generate a depfile, so meson will pick
up any changes needed.
Reviewed-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11494 >
2024-06-25 10:59:54 +00:00
Erik Faye-Lund
c26d4ee44f
meson: build html-docs
...
This allows us to build our Sphinx-based documentation from the meson
build system.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11494 >
2024-06-25 10:59:54 +00:00
Erik Faye-Lund
69809a0384
docs: allow out-of-tree docs build
...
Hawkmoth runs from the build-directory, which makes sense. However, we
set up a bunch of source-relative include paths, which will break if we
don't build in-tree.
Let's make these relative to the source-tree instead. We can deduce the
source-root from the parent directory of the current file.
Reviewed-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11494 >
2024-06-25 10:59:54 +00:00
Erik Faye-Lund
09c1f3b9fd
docs: use os.pardir
...
I'm not really sure if this ever matters in real-life, but os.pardir
exists and we should probably use it instead of hard-coding it to '..'.
Fixes: 67485efd65 ("docs: prepare for hawkmoth")
Reviewed-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11494 >
2024-06-25 10:59:54 +00:00
Erik Faye-Lund
e5f0481351
docs: metadatas -> metadata
...
"Metadata" is already plural, so adding the s at the end is not correct.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
4bb6816d26
docs: pusbuf -> pushbuf
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
372bd9366e
docs: pluggins -> plug-ins
...
The extra 'g' is probably a typo, but we also use a dash to separate
elsewhere, so let's be consistent.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
0945b24df7
docs: acress -> across
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
bc61409192
docs: attachements -> attachments
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
1fdc237e7b
docs: vulkan -> Vulkan
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
b35e574fd0
docs: zink -> Zink
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
c4f64fbf33
docs: debian -> Debian
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
f734a8c73b
docs: undifined behaviour -> undefined behavior
...
The first word is simply a typo. The second is using UK English, but we
usually use US English spelling in the docs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
ad968667b6
docs: precidence -> precedence
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
14df58bf21
docs: occured -> occurred
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
8fbf9bfad3
docs: colour -> color
...
Most of our documentation is US English, so let's stick to that.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
ee0157ec1f
docs: Steamos -> SteamOS
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
64ab555051
docs: submision -> submission
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
96cf3fa355
docs: spell out "stencil reference"
...
This is consistent with the wording in the OpenGL spec.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
aa59841b64
docs: renderpass -> render pass
...
This is how it's written in the Vulkan spec, let's follow that.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
a98b2f7ee6
docs: gpu -> GPU
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
3090041a21
docs: cpu -> CPU
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
e888049e11
docs: ssbo/ubo -> SSBO/UBO
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
14c6c07124
docs: Nvidia -> NVIDIA
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
4342f92c5a
docs: google -> Google
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
d1469294c2
docs: utrace -> trace
...
This is u_trace, not utrace. But it's clear from context that a "trace
marker" here means an u_trace marker, so let's just remove the needless
"u"-prefix.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
60f78b2d00
docs: remove apostrophe from uppercased
...
According to the Merriam-Webster Dictionary, this is the correct way
to spell this word.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
cf29440b2c
docs: sommelier -> Sommelier
...
This is a proper noun, and should be upper cased here.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
3f58be056d
docs: nabled -> enabled
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
1b317b4a72
docs: url -> URL
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
c1cb32ffec
docs: eg. -> e.g.
...
This is how we spell it elsewhere.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
9967df63df
docs: unify spelling of front/back-facing
...
We spell these with a dash elsewhere in the docs, let's be consistent.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
e2d94263d5
docs: mooth -> smooth
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:27 +00:00
Erik Faye-Lund
d8f589b57a
docs: hw -> HW
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:26 +00:00
Erik Faye-Lund
897e9d806f
docs: tgsi -> TGSI
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:26 +00:00
Erik Faye-Lund
498b2af1c7
docs: Anv -> ANV
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:26 +00:00
Erik Faye-Lund
e7b194834d
docs: zink -> Zink
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:26 +00:00
Erik Faye-Lund
f7ed909761
docs: edgeflag -> edge flag
...
This is how we usually spell it, and also how the OpenGL specification
spells it. Let's be consistent.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29879 >
2024-06-25 10:51:26 +00:00
Marek Olšák
932e8c7768
ac/nir/cdna: don't use image_descriptor intrinsics if the src is a descriptor
...
Fixes: 30af861bff - radeonsi: restructure (rewrite) the compute blit shader
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29852 >
2024-06-25 10:09:08 +00:00
Marek Olšák
8023e89d11
ac/nir/cdna: ignore image_descriptor intrinsics
...
Fixes: 30af861bff - radeonsi: restructure (rewrite) the compute blit shader
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29852 >
2024-06-25 10:09:08 +00:00
Marek Olšák
fec0a9fcdf
ac/nir/cdna: allow 16-bit coordinates
...
This can occur with the new compute blit shader.
Fixes: 30af861bff - radeonsi: restructure (rewrite) the compute blit shader
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29852 >
2024-06-25 10:09:07 +00:00
Samuel Pitoiset
ee2400acf1
ac/parse_ib: dump PKT3_DISPATCH_{TASKMESH_GFX,TASKMESH_DIRECT_ACE}
...
Useful for inspecting command buffers.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29821 >
2024-06-25 09:20:48 +00:00
Yiwei Zhang
c4b30b604f
venus: support VK_ANDROID_NATIVE_BUFFER_SPEC_VERSION 8
...
The aliased WSI image creation path is very much like the AHB case. It's
also the same with the deferred ANB binding path to support
VK_EXT_swapchain_maintenance1. Drop the cap as mesa currently only
supports up to spec version 8 because the later versions haven't been
upstreamed to the Vulkan registry yet.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29864 >
2024-06-25 09:08:12 +00:00
Yiwei Zhang
9420e90dfb
venus: refactor to add vn_android_image_from_anb_internal
...
This changes splits the anb image creation and anb memory import out to
be prepared for later aliased anb image bind.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29864 >
2024-06-25 09:08:11 +00:00
Yiwei Zhang
f2c1931010
venus: refactor vn_android_image_from_anb
...
Drop redundant codes. Add sufficient error logs on the wsi image
creation path.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29864 >
2024-06-25 09:08:11 +00:00
Samuel Pitoiset
4db32ac7ef
radv/amdgpu: use the non-IB path for dumping CS with external IBs
...
Only the first CS chunk was dumped, but this allows to dump CS that
are post the DGC execute IB when on compute queue.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29832 >
2024-06-25 07:24:50 +00:00
Daniel Lundqvist
3274af99bf
radeonsi: Fix unused variable when LLVM is not used for AMD.
...
use_aco is only used when define AMD_LLVM_AVAILABLE is set. Inline
it into its only user.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29862 >
2024-06-25 03:45:16 +00:00
Kenneth Graunke
5cb15a6c67
intel/brw: Make bld.ADD(x, 0) emit no instructions and return x directly
...
There are a lot of places where we add 0 to an offset. Avoiding
generating this can save us algebraic + copy_propagation later.
Cuts compile time in Borderlands 3 by -0.590631% +/- 0.170108% (n=25).
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29849 >
2024-06-24 19:12:21 -07:00
Kenneth Graunke
068865ce81
intel/brw: Make an alu2 builder helper
...
Instead of replicating the whole thing in macros, just make an alu2()
function and use that in the wrappers. It ought to get inlined anyway.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29849 >
2024-06-24 19:12:19 -07:00
Kenneth Graunke
c18de3f048
intel/brw: Delay liveness calculations in saturate propagation
...
Wait and see if we actually have a candidate for saturate propagation
before requesting liveness info. Saves the calculation in the case
where we have nothing to do.
Cuts compile time in Borderlands 3 by -0.304754% +/- 0.194162% (n=25).
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29849 >
2024-06-24 19:12:00 -07:00
Karol Herbst
47b1241251
rusticl/queue: run rustfmt
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29880 >
2024-06-25 01:39:46 +00:00
Karol Herbst
9d458b7fc1
rusticl/queue: gracefully stop the worker thread
...
Ohterwise we might get caught up in memory corruptions I still have no
explanation for.
Fixes spontanous crashes with radeonsi and the OpenCL CTS.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29880 >
2024-06-25 01:39:46 +00:00
Timothy Arceri
539aaad6a3
glsl: remove unused symbol table functionality
...
Added in a8f52647b0 and c17c790387 but not used since b04ef3c08a
over 10 years ago.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29868 >
2024-06-25 00:18:42 +00:00
Dave Airlie
6ebc94250c
gallivm: split out generating LLVM Mattrs
...
This will be reused in the orc jit
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29869 >
2024-06-25 09:35:28 +10:00
Dave Airlie
76e2ceb8f8
gallivm: export target init code for orc-jit to reuse
...
It doesn't need the wrapper since it already has a singleton
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29869 >
2024-06-25 09:35:28 +10:00
Dave Airlie
1f4268b53e
gallivm: make lp_bld_coro.h c++ include safe.
...
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29869 >
2024-06-25 09:35:28 +10:00
Dave Airlie
63d2bb103a
gallivm: split some code out from init module.
...
In order to introduce orc some code should be split out where
it can be reused.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29869 >
2024-06-25 09:35:28 +10:00
Dave Airlie
05dd12b9a5
gallivm: move ppc denorm disable to inline
...
This just puts it out of the way
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29869 >
2024-06-25 09:35:28 +10:00
Rhys Perry
17f2ebe8d2
aco: use 1.5x vgprs for gfx1151 and gfx12
...
From LLVM.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29839 >
2024-06-24 18:39:40 +00:00
Paulo Zanoni
41a95d0b13
anv/sparse: use ANV_SPARSE_BLOCK_SIZE instead of tile_size when possible
...
When I wrote sparse resources support for Anv we didn't have TileYs
support so I made non-opaque binds work even for non-standard block
shapes, which meant the block size could be either 64k or 4k. Since
then we merged TileYs support and changed our sparse resources
implementation to treat all the non-standard block shape cases as
"everything is the miptail", which means non-opaque binds are not
possible. So here we adjust the code to more explicitly represent
that.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29337 >
2024-06-24 17:54:30 +00:00
Paulo Zanoni
8271e12b8e
anv/sparse: unify and rework tile size calculation
...
There are 3 different places in our code where we calculate the tile
size and until recently the 3 implementations were different and with
slight bugs. Unify everything and also change the calculation to use
tile_info->phys_extent_B.
While doing this we move the isl_surf_get_tile_info() calls from
anv_sparse_calc_block_shape() to its callers so we total amount of
times we call it doesn't change.
v2: Adjust the patch now that tile_info is not part of isl_surf
anymore.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com > (v1)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29337 >
2024-06-24 17:54:30 +00:00
Paulo Zanoni
2ac35116d1
anv/sparse: remove obsolete linear tiling code path
...
The code that tries to create a "pretend block shape" for linear
tiling surfaces was necessary back when we were going to support
sparse residency (non-opaque binds) for non-standard block shapes
(since there was uncertainty about TileYs support). That hasn't been
the case since before we merged sparse resources upstream, so remove
the code and leave an assertion instead, just in case.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29337 >
2024-06-24 17:54:30 +00:00
Paulo Zanoni
2f65acfbb8
anv/sparse: fix TR-TT page table bo size and flags
...
Since commit 18d8c3ca33 we were allocating a little more than what
we were actually using (2621440 bytes instead of 2097152, aka 0x280000
instead of 0x200000), and we were not properly marking the BO as
internal. No applications should be misbehaving because of this.
Fixes: 18d8c3ca33 ("anv: Add missing ANV_BO_ALLOC_INTERNAL")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29337 >
2024-06-24 17:54:30 +00:00
Paulo Zanoni
23e91fdd64
anv/sparse: dump info about opaque binds when DEBUG_SPARSE
...
I've found myself adding this piece of code to our codebase when
debugging some Zink sparse failures recently, so let's upstream it.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29337 >
2024-06-24 17:54:30 +00:00
Paulo Zanoni
49504ab857
intel/isl: pass struct isl_tile_info to choose_image_alignment_el()
...
Pass struct isl_tile_info to isl_choose_image_alignment_el() and its
subfunctions. We already compute isl_tile_info at isl_surf_init_s(),
don't make the subfunctions compute it again, just reuse the results.
Other subfunctions of isl_surf_init_s() also take the tile info as an
argument instead of recomputing it.
v2: Rebase after the gen20 version was added.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com > (v1)
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com > (v2)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29337 >
2024-06-24 17:54:30 +00:00
Paulo Zanoni
6a6d449a1d
anv/sparse: fix reporting of VK_SPARSE_IMAGE_FORMAT_SINGLE_MIPTAIL_BIT
...
This calculation was wrong for both compressed formats and
multi-sampled images. As a result, we misreported the image as having
a single miptail.
No Vulkan or GL CTS tests were tripping on this bug. I found this
while looking for tile size calculations after fixing a similar bug
elsewhere in the code.
The calculation should now match what we have in
anv_sparse_bind_image_memory(), which is widely tested.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29337 >
2024-06-24 17:54:30 +00:00
Paulo Zanoni
789b53c523
anv/sparse: fix the image property sizes for multi-sampled images
...
We have to take the number of samples into account when calculating
the tile size. If we don't do this, multi-sampled images may end up
falling in the "goto out_everything_is_miptail" case, while in reality
multi-sampled images don't even have miptails.
Also assert that the value is one of the only two values we expect
this to be. This assert would have been useful to catch this issue,
since with multi-sampled images we were getting values like 16k or 32k
depending on the number of samples.
This helps move forward progress in some Zink tests, but does not
make them fully pass yet, as those tests are full of sub-cases and
this only helps some of them:
KHR-GL46.sparse_texture2_tests.UncommittedRegionsAccess
KHR-GL46.sparse_texture2_tests.SparseTexture2Commitment
KHR-GL46.sparse_texture2_tests.SparseTexture2Lookup
Fixes: 7ef3d652b2 ("anv/sparse: enable MSAA for Sparse when applicable")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29337 >
2024-06-24 17:54:30 +00:00
Paulo Zanoni
5c18ccd2d3
anv/sparse: reject 1D sparse residency images
...
The Vulkan spec splits sparse resources in two different features:
sparse binding and sparse residency.
Sparse binding is much simpler. It requires the resources to be fully
bound before being used and it treats them as a black box. We're
required to support sparse binding for all the formats that are
supported by non-sparse, but that's easy beacause this feature is
simpler.
Now sparse residency is the one where we're allowed to partially bind
resources, and the one that comes with more complicated features such
as block shapes and non-opaque binding of images. This feature is
subdivided into:
- sparseResidencyBuffer
- sparseResidencyImage2D
- sparseResidencyImage3D
- sparseResidency{2,4,8,16}Samples (which refers to 2D images)
Notice that there's no sparseResidencyImage1D. And if you read the
specs it's clear that sparse residency is meant for non-1D images.
Still, supporting it didn't require any extra effort in Anv so we just
did it.
That's until we started running GL CTS tests on Zink. There's a CTS
test that checks for the standard block shapes. It creates 1D images
and expects the block shapes for them to be the standard 2D block
shapes. While we could very well just patch
anv_sparse_calc_image_format_properties() to return the standard 2D
block shapes for 1D images, that's just wrong (block shapes for 1D
images are just line segments, not rectangles!) so let's just reject
this all until maybe one day Vulkan defines sparseResidencyImage1D and
we get GL_ARB_sparse_texture3 to match it, or somebody decides to
change the GL CTS test.
Testcase: KHR-GL46.sparse_texture2_tests.StandardPageSizesTestCase
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29337 >
2024-06-24 17:54:30 +00:00
Zack Middleton
21d3eacd23
gles1: fix glBufferSubData()
...
InternalBufferSubDataCopyMESA is required for
PIPE_CAP_ALLOW_GLTHREAD_BUFFER_SUBDATA_OPT.
Signed-off-by: Zack Middleton <zack@cloemail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29795 >
2024-06-24 17:08:12 +00:00
Zack Middleton
31841c6b11
gles1: fix GL_OES_vertex_array_object
...
Export functions for GL_OES_vertex_array_object through GetProcAddress
on gles1.
Signed-off-by: Zack Middleton <zack@cloemail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29794 >
2024-06-24 16:21:47 +00:00
Mike Blumenkrantz
35fd98f2d9
radeonsi: enable compute pbo blits
...
this probably needs better tuning by experts, but it massively improves
perf in a number of cases
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29842 >
2024-06-24 15:48:37 +00:00
Karol Herbst
a7ad53d550
radeonsi: set bo_size for user memory allocations
...
Otherwise the assert in si_set_shader_buffer could trigger for blits
through clear_buffer on user resources.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29867 >
2024-06-24 15:04:25 +00:00
Valentine Burley
617291d2d9
tu: Advertise VK_KHR_shader_float_controls2
...
No Turnip or ir3 changes required, this was implemented in NIR by Intel.
Passes dEQP-VK.spirv_assembly.instruction.*.float_controls2.*
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29866 >
2024-06-24 13:56:26 +00:00
Nanley Chery
6fc63b1d56
intel/isl: Enable Tile4 for CPB surfaces
...
I got the image alignment requirements for CPCB surfaces from Bspec
authors. The vertical alignment value of 8 was confirmed through the
Vulkan CTS test group, dEQP-VK.fragment_shading_rate*layered*. It also
happens to match the QPitch alignment requirement documented in the
Bspec. Hopefully the CTS will add tests for LOD2+ in order to exercise
the horizontal alignment value.
With this in place, we can start using Tile4.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10784
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29355 >
2024-06-24 13:08:51 +00:00
Tapani Pälli
7934b70ff1
isl/iris/anv: provide drirc toggle intel_sampler_route_to_lsc
...
Some applications may benefit from this while some can get a performance
hit. Default to false and make it possible to toggle only for selected
workloads.
See workaround 14022483228 for some measurements.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29760 >
2024-06-24 09:23:07 +00:00
Tapani Pälli
4a0a716b6a
isl: fix condition for enabling sampler route to lsc
...
This will disable cases with 2D array views (which could be views to 3D
texture) but enables on regular 2D surfaces which seems to work fine.
Fixes: 70382f7f06 ("intel/isl/xe2: Enable route of Sampler LD message to LSC")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29760 >
2024-06-24 09:23:07 +00:00
Samuel Pitoiset
030d6e6280
radv/amdgpu: allow cs_execute_ib() to pass a VA instead of a BO
...
DGC IBs are considered external IBs because they aren't managed by
the winsys and the BO itself isn't really useful. Passing a VA instead
will help for future work.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29600 >
2024-06-24 08:02:07 +00:00
Samuel Pitoiset
e51ae61a4d
radv: add the DGC preprocess BO to the cmdbuf BO list
...
This wasn't needed in practice because DGC NV is only enabled for
vkd3d-proton and it always uses the global BO list but better to add it
anyways.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29600 >
2024-06-24 08:02:07 +00:00
Collabora's Gfx CI Team
cdf3228f88
Uprev Piglit to fdf3fc09deb6beecdf212e65a16c645112540b59
...
cf8daaf5ba...fdf3fc09de
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29684 >
2024-06-24 07:10:48 +00:00
Samuel Pitoiset
25bf3200e2
radv: remove useless draw_id to radv_emit_userdata_task()
...
It's always 0 for direct draws.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29830 >
2024-06-24 06:38:43 +00:00
Samuel Pitoiset
d2b1d38392
radv: remove useless masking in radv_cs_emit_indirect_mesh_draw_packet()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29830 >
2024-06-24 06:38:43 +00:00
Samuel Pitoiset
b2ff08800e
radv: remove dead mesh shader code for indirect draws
...
This path is never used by mesh shaders.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29830 >
2024-06-24 06:38:43 +00:00
Samuel Pitoiset
d922a0e875
radv: use radv_shader_info::user_data_0 for task shaders
...
To avoid duplicating the base user SGPR.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29830 >
2024-06-24 06:38:43 +00:00
Samuel Pitoiset
334046648b
radv: cleanup getting AC_UD_TASK_RING_ENTRY for mesh shader
...
The last VGT shader is the mesh shader.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29830 >
2024-06-24 06:38:43 +00:00
Bas Nieuwenhuizen
9b775d26c4
util/disk_cache: Fix cache marker refresh.
...
Refresh if older than a day, not less than a day old.
Fixes: 3f119a1fd8 ("util/disk_cache: Add marker on cache usage")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29728 >
2024-06-23 23:29:33 +00:00
Caio Oliveira
b59ea3d63f
intel/brw: Print SWSB information when dumping instructions
...
These were only being shown before as part of disassemble.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29738 >
2024-06-23 08:09:56 -07:00
Karol Herbst
cdd604583f
rusticl/icd: rename all entry points to the actual correct name
...
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29855 >
2024-06-22 23:40:15 +00:00
Karol Herbst
be090abf2e
rusticl: add bsymbolic to linker flags
...
This will prevent the dynamic loader to pick the wrong function once we
rename things to the proper API names.
In any case, this should have been done all along anyway.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29855 >
2024-06-22 23:40:15 +00:00
Asahi Lina
51f2ed872e
asahi: Make asahi_clc build work on x86_64->x86 builds
...
Same hack used by intel_clc.
Signed-off-by: Asahi Lina <lina@asahilina.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29861 >
2024-06-22 10:09:45 -04:00
Alyssa Rosenzweig
27e3495902
agx: set discard_is_demote
...
this is simpler/more correct.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29861 >
2024-06-22 10:09:45 -04:00
Alyssa Rosenzweig
7dd73290fb
agx: add unit test for ballot bug
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29861 >
2024-06-22 10:09:45 -04:00
Alyssa Rosenzweig
6628f24e4d
agx: fix insidious ballot optimizer bug
...
see next test.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29861 >
2024-06-22 10:09:45 -04:00
Rémi Bernon
8d210ae232
zink: Add VKAPI_PTR specifier to zink_stub_function_not_loaded.
...
To avoid a warning with clang when the function is cast to stdcall
function pointer on Windows.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29856 >
2024-06-22 12:20:04 +02:00
Caio Oliveira
a0877c132c
glsl: Fix warning related to tg4_offsets in release mode
...
Compiler can't know that array_size() of the offsets parameter in
textureGatherOffsets is (at most) 4, so use a MIN2() to make the limit
visible. Just adding an assert() gets ignored in Release builds.
This fixes the following warning in Release compilation:
```
../src/compiler/glsl/glsl_to_nir.cpp: In member function ‘virtual void {anonymous}::nir_visitor::visit(ir_texture*)’:
../src/compiler/glsl/glsl_to_nir.cpp:2453:41: warning: writing 1 byte into a region of size 0 [-Wstringop-overflow=]
2453 | instr->tg4_offsets[i][j] = val;
| ~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~
In file included from ../src/compiler/glsl/glsl_to_nir.h:31,
from ../src/compiler/glsl/glsl_to_nir.cpp:29:
../src/compiler/nir/nir.h:2470:11: note: at offset 8 into destination object ‘nir_tex_instr::tg4_offsets’ of size 8
2470 | int8_t tg4_offsets[4][2];
| ^~~~~~~~~~~
../src/compiler/glsl/glsl_to_nir.cpp:2453:41: warning: writing 1 byte into a region of size 0 [-Wstringop-overflow=]
2453 | instr->tg4_offsets[i][j] = val;
| ~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~
../src/compiler/nir/nir.h:2470:11: note: at offset 9 into destination object ‘nir_tex_instr::tg4_offsets’ of size 8
2470 | int8_t tg4_offsets[4][2];
| ^~~~~~~~~~~
```
This is from: `gcc (GCC) 14.1.1 20240522 (Red Hat 14.1.1-4)`.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29508 >
2024-06-21 17:37:46 -07:00
Juan A. Suarez Romero
0d1813837b
mesa: do not pass NULL pointer to function not expecting NULLs
...
First argument for qsort() is declared to be never NULL, so ensure NULL
is never passed.
This has been detected by Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29772 >
2024-06-21 21:07:05 +00:00
Juan A. Suarez Romero
91593adc93
mesa: use unsigned types when performing bitshifting
...
Ensure unsigned integers are used instead of signed ones when performing
left bit shifts.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29772 >
2024-06-21 21:07:05 +00:00
Juan A. Suarez Romero
017bd4bf25
egl: do not access member of a NULL structure
...
Check if the structure is NULL before trying to get access to its
members.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29772 >
2024-06-21 21:07:05 +00:00
Juan A. Suarez Romero
ee1ced9dc5
glsl: fix downcasting addresses to wrong object types
...
This fixes several downcasting of address to object types when the
original object types were either different or invalid.
This has been detected throught Undefined Behaviour Sanitizer (UBSan).
An example of such issue were:
`downcast of address 0x55559c0cbcc0 which does not point to an object of
type 'ir_variable' 0x55559c0cbcc0: note: object is of type 'ir_constant'
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29772 >
2024-06-21 21:07:05 +00:00
Juan A. Suarez Romero
60e7cb7654
nir: use unsigned types when performing bitshifting
...
Ensure unsigned integers are used instead of signed ones when performing
left bit shifts.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29772 >
2024-06-21 21:07:05 +00:00
Juan A. Suarez Romero
e43cc49806
nir: fix overflow when negating maxint in constant expressions
...
Undefined Behaviour Sanitizer (UBSan) detected the following when
running testing `dEQP-VK.graphicsfuzz.cov-fold-negate-min-int-value`:
`negation of -2147483648 cannot be represented in type 'int'; cast to an unsigned type to negate this value to itself`
SPIR-V spec states that OpSNegate(0x80000000) has to return 0x80000000;
in our case, -2147483648 should be -2147483648.
While this is not causing any issue because compilers seem to be
behaving like that, it is still undefined behaviour, so it expects to be
this handled explicitly, which is the purpose of this commit.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29772 >
2024-06-21 21:07:05 +00:00
Juan A. Suarez Romero
081555c58b
vulkan: do not access member of a NULL structure
...
Check if the structure is NULL before trying to get access to its
members.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29772 >
2024-06-21 21:07:05 +00:00
Juan A. Suarez Romero
a407285ff2
util: use unsigned types when performing bitshift
...
Ensure unsigned integers are used instead of signed ones when performing
left bit shifts.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29772 >
2024-06-21 21:07:05 +00:00
Juan A. Suarez Romero
d4dcbaf825
util: do not access member of a NULL structure
...
Check if the structure is NULL before trying to get access to its
members.
This has been detected by the Undefined Behaviour Sanitizer (UBSan).
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29772 >
2024-06-21 21:07:05 +00:00
Juan A. Suarez Romero
d854dd32fb
dri: cast constant to uint for bitshift
...
Define 1 as uint for shifting bits is well-defined.
This has been detected by the Undefined Behaviour Sanitizer (UBSan)
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29772 >
2024-06-21 21:07:05 +00:00
Jesse Natalie
d9eacb05c9
nir_range_analysis: Use fmin/fmax to fix NAN handling
...
The following probable MSVC bug clued us in to some probably-unexpected behavior:
https://developercommunity.visualstudio.com/t/Incorrect-SSE-code-for-minmax-with-NaNs/10687862
Change the logic here so that we're always starting with NANs and use
fmin/fmax, which have more-deterministic handling of NANs. If one argument
is NAN, the non-NAN argument is returned. The previous code would've returned
the second argument if one was NAN.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29822 >
2024-06-21 20:13:46 +00:00
Valentine Burley
0ad1c80250
tu: Drop tu_init_sampler helper function
...
Simplify the code by inlining the logic from tu_init_sampler
directly into tu_CreateSampler.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29808 >
2024-06-21 19:30:06 +00:00
Valentine Burley
a931329146
tu: Move sampler related code to tu_sampler.cc/h
...
More code isolation. Match the structure of the common Vulkan runtime,
NVK and RADV.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29808 >
2024-06-21 19:30:06 +00:00
Valentine Burley
739dfcf807
tu: Use device->vk.enabled_features instead of iterating twice
...
vk_device already has the list of enabled features, no need to iterate
twice on the pNext structs.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29808 >
2024-06-21 19:30:06 +00:00
Valentine Burley
55fc7aea5f
tu: Use vk_sampler
...
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29808 >
2024-06-21 19:30:06 +00:00
Valentine Burley
75a6d185a0
tu: Switch to vk_ycbcr_conversion
...
Drop tu_sampler_ycbcr_conversion in favor of the common vk_ycbcr_conversion.
This allows using CreateSamplerYcbcrConversion and DestroySamplerYcbcrConversion
from the common runtime and will be required for vk_sampler and for using the
common ycbcr lowering later.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29808 >
2024-06-21 19:30:06 +00:00
Konstantin Seurer
ee751a26fc
radv/rra: Enable RADV_RRA_TRACE_COPY_AFTER_BUILD by default
...
RADV_RRA_TRACE_COPY_AFTER_BUILD is more accurate and the memory issues
are fixed now.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537 >
2024-06-21 17:47:53 +00:00
Konstantin Seurer
aa1b9d9be5
radv/rra: Rework calculating the ray history size
...
The previous approach was broken when writing empty metadata.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537 >
2024-06-21 17:47:53 +00:00
Konstantin Seurer
090ca37352
radv/rra: Reduce the memory requirement of copy_after_build
...
vkd3d-proton always sets the acceleration structure size to be the
whole buffer size. Because of that, allocating read back buffers
for all acceleration structures causes a system with a finite amount
of RAM to OOM.
This is solved by allocating read back buffers on build where the
required size is known.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537 >
2024-06-21 17:47:53 +00:00
Konstantin Seurer
c2c555402b
radv/rra: Bump rt_driver_interface_version to 8.0
...
8.0 matches the layout we emit more closely.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537 >
2024-06-21 17:47:53 +00:00
Konstantin Seurer
55f1fe9bc3
radv/rra: Fix reporting the isec invocations
...
Copy+paste mistake, we always set the last call to accept.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537 >
2024-06-21 17:47:53 +00:00
Konstantin Seurer
97c0f264f0
radv/rra: Fix disabling the ray history
...
There are a bunch of NULL pointer dereferences that went unnoticed
because the feature is enabled by default.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537 >
2024-06-21 17:47:53 +00:00
Konstantin Seurer
bd377cfe89
radv/rra: Move some code into handle_accel_struct_write
...
The code is the same for all callers.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537 >
2024-06-21 17:47:53 +00:00
Konstantin Seurer
ea69f7bc89
radv/rra: Detect BVHs with back edges
...
Avoid overflowing the stack and fail validation.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537 >
2024-06-21 17:47:53 +00:00
Eric Engestrom
b55158d536
venus/ci: drop fixed test from fails list
...
Might be a flake though, we'll see in the next nightly.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29844 >
2024-06-21 17:24:32 +00:00
Eric Engestrom
98f9dd3c7c
venus/ci: make sure nightly job doesn't get retried
...
It's long enough as it is, we don't want to waste 2x the resources when
a test fails.
Fixes: 0db4bb2ea0 ("venus/ci: add manual/nightly venus-lavapipe-full")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29844 >
2024-06-21 17:24:32 +00:00
Rhys Perry
21f8410191
vtn: ensure TCS control barriers have a large enough memory scope
...
A workgroup or larger scope is necessary for writes to be visible to other
invocations.
Fixes incorrect snow rendering in Indika.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11299
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29735 >
2024-06-21 16:24:08 +00:00
Alyssa Rosenzweig
da752ed7c1
treewide: use nir_def_replace sometimes
...
Two Coccinelle patches here. Didn't catch nearly as much as I would've liked but
it's a start.
Coccinelle patch:
@@
expression intr, repl;
@@
-nir_def_rewrite_uses(&intr->def, repl);
-nir_instr_remove(&intr->instr);
+nir_def_replace(&intr->def, repl);
Coccinelle patch:
@@
identifier intr;
expression instr, repl;
@@
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
...
-nir_def_rewrite_uses(&intr->def, repl);
-nir_instr_remove(instr);
+nir_def_replace(&intr->def, repl);
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com > [broadcom]
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com > [lima]
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com > [etna]
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com > [r300]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29817 >
2024-06-21 15:36:56 +00:00
Alyssa Rosenzweig
bbdd34b4ad
nir: add nir_def_replace helper
...
"Rewrite and remove" is a super common idiom in NIR passes. Let's add a helper
to make it more ergonomic.
More the point, I expect that /most/ of the time when a pass rewrites uses, they
also want to remove the parent instruction. The principle reason not to is
because it takes extra effort to add in the nir_instr_remove and nir_opt_dce
will clean up after you eventually, right? From a compile time perspective, it's
better to remove earlier to reduce the redundant processing between the pass and
the next DCE run. So ... we want to be doing *more* removes. From a UX
perspective - the way to nudge devs towards that is to make the
preferred "rewrite-and-remove" pattern more ergonomic than the "rewrite but
keep". That justifies the simple "replace" name rather than something silly like
"rewrite_uses_and_remove".
---
Something else I've wanted for a while.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29817 >
2024-06-21 15:36:56 +00:00
Alyssa Rosenzweig
535823682d
nir/format_convert: remove unorm bit size assert
...
Yes, we're losing precision if this assert fails and it's wrong. It's also
necessary to implement GL in a reasonable way on Asahi. Remove the assert that
was recently added and add more comment context on the mess.
Fixes debug build regression on asahi:
dEQP-GLES3.functional.vertex_arrays.single_attribute.normalize.int.components4_quads1
Fixes: 22f1b04a99 ("nir/format_convert: Assert that UNORM formats are <= 16 bits")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Suggested-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29820 >
2024-06-21 14:50:59 +00:00
Karol Herbst
1ff86021a7
rusticl: add new CL_INVALID_BUFFER_SIZE condition for clCreateBuffer
...
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29776 >
2024-06-21 13:58:15 +00:00
Karol Herbst
4df8567394
rusticl/memory: fix clFillImage for buffer images
...
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29776 >
2024-06-21 13:58:15 +00:00
Karol Herbst
45fc5c032e
rusticl/memory: assume minimum image_height of 1
...
But still report 0 for the slice_pitch when queried.
Fixes clCopyImage 1Dbuffer
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29776 >
2024-06-21 13:58:14 +00:00
Karol Herbst
d51a14aab8
util/u_printf: properly handle %%
...
Cc: mesa-stable
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29776 >
2024-06-21 13:58:14 +00:00
Konstantin Seurer
23ee6ca801
radv/meta: Use READ access for dst_access_flush
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29780 >
2024-06-21 12:52:39 +00:00
Konstantin Seurer
14f7b077c8
radv: Remove dead access bits
...
READ access bits are dead as radv_src_access_flush arguments and WRITE
access bits are dead as radv_dst_access_flush arguments.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29780 >
2024-06-21 12:52:39 +00:00
Konstantin Seurer
1c59634445
radv: Clean up pipeline barrier handling
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29780 >
2024-06-21 12:52:39 +00:00
Connor Abbott
ac34415e0f
freedreno/a7xx: Fix register file size
...
It was bumped back up to 96. Not sure about a6xx gen4.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29834 >
2024-06-21 12:21:54 +00:00
Connor Abbott
8e6ecf3df8
tu: Don't WFI after every dispatch
...
I'm not sure why this was added back in 2019 before proper barrier
support, but it surely shouldn't be necessary now and is unnecessarily
serializing compute dispatches.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29815 >
2024-06-21 11:06:35 +00:00
Connor Abbott
35c9b7fb90
tu: Fix unaligned indirect command synchronization
...
We need to wait to allow any previous uses to finish, and we have to
wait to allow the CACHE_INVALIDATE to finish before starting the
dispatch.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29815 >
2024-06-21 11:06:35 +00:00
Connor Abbott
a0a662f72d
freedreno, tu: Use CLEAN events on a7xx
...
This should reduce unnecessary invalidates.
We could combine a CLEAN and INVLIDATE into a FLUSH, but I'm not sure
how much benefit that brings.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29824 >
2024-06-21 10:34:05 +00:00
Connor Abbott
c7284c94ef
tu: Use a7xx terminology for flushes
...
a7xx renamed events around flushing:
a6xx a7xx
FLUSH CLEAN
INVALIDATE INVALIDATE
FLUSH+INVALIDATE FLUSH
The FLUSH events stayed the same but now they also invalidate. By not
adopting the new CLEAN events, we're inadvertantly invalidating too
much.
This change is just a refactor, that makes generic code consistently use
the a7xx terminology. The next commit will actually make us use CLEAN.
Note that LRZ_FLUSH is deliberately not changed because it actually
also invalidates (and the real name on a6xx was FLUSH_AND_INVALIDATE).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29824 >
2024-06-21 10:34:05 +00:00
Connor Abbott
0e220cd45a
tu: Support VK_EXT_attachment_feedback_loop_dynamic_state
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23374 >
2024-06-21 09:06:53 +00:00
Connor Abbott
833a0cf76e
tu: Use image aspects for feedback loops
...
For consistency with the dynamic state.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23374 >
2024-06-21 09:06:53 +00:00
Lionel Landwerlin
339630ab05
brw: enable A64 loads source rematerialization
...
Allows to avoid Wa_1407528679 on A64 loads
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
f482fc33cf
brw: blockify load_global_const_block_intel
...
This intrinsic is pretty much equivalent to
load_global_constant_uniform_block_intel, it just has a predicate. If
the predicate is always true we can turn into into the other.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
6fe6b9c8fa
brw: avoid Wa_1407528679 in uniform cases
...
When the surface handles are generated with exec_all, we can avoid
emitting the workaround.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
5227b2db73
brw: annotation send instructions with surface handles generated with exec_all
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
b79e85a93f
brw: always use new registers for load address increments
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
7f1ca16e3b
brw: enable rematerialization of non 32bit uniforms
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
0531f568ac
brw: remove some brackets
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
11a634151b
brw: remove rematerialization assert
...
The default case should lead us to the next rematerialization block so
this is useless.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
d42bc0d3fc
brw: bound the amount of rematerialized NIR instructions
...
Some of the instructions we don't need to rematerialize because we
already know they are executed with NoMask so we can use their
destination without reemitting them again.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
4bfb4f35a8
brw: improve rematalization of surface/sampler handles
...
This change handles patterns like this
con v0 = load_ubo ...
con v1 = add v0, 0x30
con v2 = load_ubo v1, 0x0
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
c7b312ad45
brw: factor out source extraction for rematerialization
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
8fbbc9c301
brw: add missing break
...
Not fixing anything because of the default case below.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Lionel Landwerlin
a869c57250
anv: don't apply descriptor array bound checking
...
This is a follow up to 059e82a4 ("anv: remove descriptor array bounds
checking"), that kind of bound checking is not required by the spec.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663 >
2024-06-21 08:29:44 +00:00
Eric Engestrom
e3b73374cd
egl: use os_get_option() to allow android to set EGL_LOG_LEVEL
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29816 >
2024-06-21 07:44:36 +00:00
Eric Engestrom
c6987258da
gallium/hud: use os_get_option() to allow android to set GALLIUM_HUD and related vars
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29816 >
2024-06-21 07:44:36 +00:00
Eric Engestrom
787e0751c5
loader: use os_get_option() to allow android to set LIBGL_DRIVERS_PATH, GBM_BACKENDS_PATH, GALLIUM_PIPE_SEARCH_DIR
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29816 >
2024-06-21 07:44:36 +00:00
Yukari Chiba
9bce6f5cc4
llvmpipe: make unnamed global have internal linkage
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29796 >
2024-06-21 06:12:16 +00:00
Yukari Chiba
fae6a8737a
llvmpipe: add gallivm_add_global_mapping
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29796 >
2024-06-21 06:12:16 +00:00
Dave Airlie
47cd0eee26
gallivm: create a pass manager wrapper.
...
With the introduction of the orc jit and looking at the mess that
is integrating with LLVM pass mgmt, encapsulate the passmgr
interactions in an internal abstraction so it can be shared,
and the compiler code isn't so messy to read.
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29796 >
2024-06-21 06:12:16 +00:00
Mingcong Bai
cfa0293c8b
meson: set default Vulkan drivers for ppc, ppc64
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29827 >
2024-06-21 05:22:28 +00:00
Jianxun Zhang
02813f341b
isl: Remove code for Xe2 from isl_gfx12.c
...
Xe2 code is in isl_gfx20.* now.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11329
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29702 >
2024-06-21 04:02:08 +00:00
Jianxun Zhang
4debb5bbc4
isl: Implement a part of WA_22018390030 (xe2)
...
Fix: piglit test
gl-3.2-layered-rendering-clear-color-all-types 2d_array mipmapped -auto
-fbo
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29702 >
2024-06-21 04:02:08 +00:00
Jianxun Zhang
8b084df0c0
isl: Add dispatching in isl.c (xe2)
...
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29702 >
2024-06-21 04:02:08 +00:00
Jianxun Zhang
8d3093a329
isl: Add isl_gfx20 into build (xe2)
...
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29702 >
2024-06-21 04:02:08 +00:00
Jianxun Zhang
5de9df094f
isl: Update isl_gfx20 code (xe2)
...
Purge code for previous platforms and rename functions
in Xe2 files.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29702 >
2024-06-21 04:02:07 +00:00
Jianxun Zhang
67fb44ccd6
isl: Clone from isl_gfx12.* files (xe2)
...
The new Xe2 files are copyed from intel/isl/isl_gfx12.*, as the
base for a seperation.
From 59218cdf07 .
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29702 >
2024-06-21 04:02:07 +00:00
Karol Herbst
ea1e7dd9e9
rusticl: depend on the spirv_info target
...
Hit this while building only rusticl_mesa_bindings.
Fixes: a09c5d55ed ("spirv: Auto-generate spirv_info.h")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29275 >
2024-06-21 03:54:02 +00:00
Karol Herbst
36a18208f7
rusticl/meson: add build root dir to the include dirs of rusticl_c
...
The static inline wrapper includes the header file relatively from where
`bindgen` gets executed, or so it seems.
And because meson doesn't allow us to add absolute paths, fs.relative_to
needs to be used. I'm sure we can come up with a better solution, but this
unbreaks builds.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11178
Fixes: 53629b0a2d ("rusticl: make use of new `output_inline_wrapper` meson.rust.bindgen feature")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29275 >
2024-06-21 03:54:01 +00:00
Dylan Baker
656b8bb340
compiler/glcpp: don't recalculate macro
...
The original code has a private helper called in one place doing a
lookup that it's parent has already done, which could be null, except
that the parent verified that it isn't. Instead, let's pass the pointer
from the parent and assert it's non-null in the child for good
measure/documentation.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29666 >
2024-06-21 03:19:26 +00:00
Paulo Zanoni
87787c4a87
anv/xe: fix declaration of memory flags for integrated non-LLC platforms
...
Makes Cyberpunk, Hitman and Total War Warhammer 3 run on LNL.
Fixes: c9e41f25a1 ("anv: Add heaps for Xe KMD in platforms without LLC")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29775 >
2024-06-21 02:49:24 +00:00
José Roberto de Souza
73ce3143a8
anv: Fix assert in xe_gem_create()
...
In this assert we want to enforce that if a cached buffer is created
it is a cached+coherent as Xe KMD don't support cached+incoherent.
Did not caught this issue because it only reproduces in platforms with
GPU outside of LLC.
Fixes: 9d8d5cf8c9 ("anv: Remove block promoting non CPU mapped bos to coherent")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29826 >
2024-06-21 02:19:55 +00:00
Francisco Jerez
c1feccdd90
intel/fs/gfx20+: Fix surface state address on extended descriptors for NIR scratch intrinsics.
...
The r0.5 thread payload register contains Surface State Offset bits
[27:6] as bits [31:10], so we need to shift the register right by 4 in
order to get the surface state offset expected in ExBSO mode, which is
the only extended descriptor encoding supported by the UGM shared
function for SS addressing on Xe2+.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29543 >
2024-06-21 01:49:43 +00:00
Francisco Jerez
8bbad903a2
anv/xe2+: Fix format of scratch space surface address in various 3DSTATE packets.
...
This field encodes bits [27:6] of the scratch surface state offset
according to the hardware spec, already on XeHP platforms. However,
on previous platforms we were passing bits [25:4] instead, which was
apparently okay for two reasons:
1/ We never used more than 8 MB of scratch surface states apparently.
2/ A shift right by 2 was implicitly happening while copying the
value of r0.5 into the address register holding the extended
descriptor, which with the ExBSO addressing mode disabled
considered bits [31:12] as the surface state index within the
pool.
However on Xe2 ExBSO addressing mode is always enabled for the UGM
shared function, so we have to add an extra SHR instruction to format
the extended descriptor regardless, and there is no point in
disobeying the hardware spec passing a left-shifted offset.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29543 >
2024-06-21 01:49:43 +00:00
Francisco Jerez
0cd927fa92
iris/xe2+: Fix format of scratch space surface address in various 3DSTATE packets.
...
This field encodes bits [27:6] of the scratch surface state offset
according to the hardware spec, already on XeHP platforms. However,
on previous platforms we were passing bits [25:4] instead, which was
apparently okay for two reasons:
1/ We never used more than 8 MB of scratch surface states apparently.
2/ A shift right by 2 was implicitly happening while copying the
value of r0.5 into the address register holding the extended
descriptor, which with the ExBSO addressing mode disabled
considered bits [31:12] as the surface state index within the
pool.
However on Xe2 ExBSO addressing mode is always enabled for the UGM
shared function, so we have to add an extra SHR instruction to format
the extended descriptor regardless, and there is no point in
disobeying the hardware spec passing a left-shifted offset.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29543 >
2024-06-21 01:49:43 +00:00
José Roberto de Souza
460aa58911
iris: Add support for compressed images allocation in Xe2
...
Xe2 replaces auxiliary surface mapping by software to compress buffers
with reserving part of the memory for the compression purpose.
To enable compression in Xe2 it is necessary to bind memory with one of
the PAT indexes that has compression enabled.
We're introducing 2 new iris_heaps to allocate compressed BO's out of
on Xe2, one for integrated and another for discrete platforms.
With these new iris_heaps we gain cache and sub-allocation for free.
If the compression requirements are met
iris_resource_image_is_pat_compressible() returns true so
BO_ALLOC_COMPRESSED is set and the the BO is allocated out of
the correct heap.
At this moment iris_resource_image_is_pat_compressible()
defaults to returning false as more work needs to be done but
the foundation for the compressed allocation is here.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28833 >
2024-06-21 01:19:12 +00:00
José Roberto de Souza
f5a6b84dd6
anv: Give apps the choice of compressed or uncompressed but cpu visible images
...
Compressed memory types are not CPU visible and Vulkan specification
don't have any requirement about that but some applications like
vkcube fails to run without a host visible option, so here appending
default_buffer_mem_types and compressed_mem_types.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28833 >
2024-06-21 01:19:12 +00:00
José Roberto de Souza
8aec37fe0c
anv: Add support for compressed images allocation in Xe2
...
Xe2 replaces auxiliary surface mapping by software to compress buffers,
instead it reserves part of the memory for the compression purpose.
To enable compression in Xe2 it is necessary bind memory with one of
the PAT indexes that has compression enabled.
It is still always returning false in anv_image_is_pat_compressible()
as it still needs more work before compression can be enabled but the
foundation for the compressed allocation is here.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28833 >
2024-06-21 01:19:12 +00:00
José Roberto de Souza
90b223331f
intel/dev: Add compressed PAT entry
...
This will be used in Xe2+ to store images compressed in memory.
Still missing add the compressed PAT index and attributes to
LNL intel_device_info.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28833 >
2024-06-21 01:19:12 +00:00
Dylan Baker
e67a8dc59a
clc: remove check for null pointer that cannot be true in llvm_mod_to_spirv
...
Snce the *args parameter was added it's assumed to be non-null. If it is
null then the function is going off to UB land. As such, a later check
added for args being NULL is useless, and confuses coverity.
fixes: 3a752256f5
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29664 >
2024-06-21 00:41:28 +00:00
Nanley Chery
9fa310b876
anv+zink/ci: Change sparse test result from crash to fail
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29659 >
2024-06-21 00:08:38 +00:00
Nanley Chery
b49182bed0
intel/isl: Pad the pitch on gfx12.0 for fast-clears
...
On gfx12.0, CCS fast clears don't seem to cover the correct portion of
the aux buffer when the pitch is not 512B-aligned. Pad the pitch unless
Wa_18020603990 applies (slow clear surfaces up to 256x256, 32bpp).
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29659 >
2024-06-21 00:08:38 +00:00
Nanley Chery
30ed4a7500
intel/isl: Require display flag for 512B pitch alignment
...
When CCS is enabled on a surface on gfx12, a 512B-aligned pitch is
required for the display engine. This is not required by the render
engine.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10740
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29659 >
2024-06-21 00:08:38 +00:00
Nanley Chery
eff2fab0bc
intel/isl: Consolidate some tiling checks for CCS
...
Filter out X-tiling early to avoid an assert failure in the next patch.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29659 >
2024-06-21 00:08:38 +00:00
Nanley Chery
26802b3224
iris,anv: Disable gfx12.0 fast-clears with unaligned pitch
...
We'll reduce pitch alignment in a following patch. However, CCS
fast-clears don't seem to work unless the pitch is 512B aligned.
Disable fast clears for unaligned pitches.
Prevents the next patch from failing the following piglit tests:
* fbo-attachments-blit-scaled-linear
* hiz-stencil-test-fbo-d24s8
* hiz
* polygon-mode-facing
* clearbuffer-mixed-format
* glsl-lod-bias (transient failure)
No failures have been observed in anv, but there are more restrictions
for fast-clears in that driver compared to iris.
Note:
* The -fbo flag is necessary to make these fail. Otherwise, they end up
with aligned render targets.
* Each of these tests allocate an image that has a pitch greater than
512B and they collectively cover all the misalignment options - 128B,
256B and 384B.
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29659 >
2024-06-21 00:08:38 +00:00
Nanley Chery
695577e5b0
intel/isl: Add and use isl_drm_modifier_needs_display_layout
...
Intel modifiers supporting compression are specified to be compatible
with the display engine, even if they won't actually be used for
scanout.
Attempting to capture a wider scope of modifiers resulted in test
errors. I chose to narrow the scope instead of digging into them.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29659 >
2024-06-21 00:08:38 +00:00
Nanley Chery
483707e901
intel/isl: Drop support for the gfx12 CCS ISL surf
...
Now that we're using macros to handle aux-map CCS layout, we have no
need for the ISL surface representation.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29659 >
2024-06-21 00:08:38 +00:00
Nanley Chery
1169f70983
iris: Add and use comp_ctrl_surf_offset on gfx12
...
Avoid using an isl_surf for the compression control surface on gfx12.
Instead, store the offset of this surface in the iris_resource struct.
The size of the surface is no longer stored, but it can be computed
on-demand with the aux-map helper functions.
This change enables us to get rid of the GFX12 CCS abstractions in ISL
that required all main surfaces to have a 512B-aligned pitch. This
requirement is seemingly only for display surfaces.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29659 >
2024-06-21 00:08:38 +00:00
Nanley Chery
236c4597fa
anv: Restrict CCS ISL surface creation to gfx9-11
...
ISL surfaces for CCS are not needed to describe flat CCS and aux-map
CCS.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29659 >
2024-06-21 00:08:38 +00:00
Rohan Garg
2c00b7d1e6
anv: flag WSI images as scanout images for ISL
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29465 >
2024-06-20 22:34:52 +00:00
José Roberto de Souza
85373f2b15
iris: Implement Wa_14019857787
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29619 >
2024-06-20 21:47:59 +00:00
José Roberto de Souza
19a8abde5f
anv: Implement Wa_14019857787
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29619 >
2024-06-20 21:47:59 +00:00
José Roberto de Souza
2fc79af07f
iris: Implement Wa_14019708328
...
As all screens shares the same bufmgr and vm_id in Xe KMD, we can
create a single dummy_aux_bo and re-use in all screens.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29619 >
2024-06-20 21:47:59 +00:00
José Roberto de Souza
f7e3aecb87
anv: Implement Wa_14019708328
...
As each anv_device has its own address space it was necessary create
one dummy_aux_bo per anv_device.
Also this workaround requires us to disable the
buffer_length_in_aux_addr optimization, that is done in the physical
device creating because isl_dev of physical device is copied
to isl_dev in anv_device.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29619 >
2024-06-20 21:47:59 +00:00
José Roberto de Souza
3ddcf17a12
intel/isl: Set dummy_aux_address to implement Wa_14019708328
...
This workaround ask us to set a dummy aux address to all
SURFTYPE_BUFFERs with AuxiliarySurfaceMode == AUX_NONE.
It also says that the same dummy aux address can be reused acrsoss all
buffers.
So here adding dummy_aux_address to isl_device, ANV and Iris will
set a value to when running a in a GPU affected.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29619 >
2024-06-20 21:47:59 +00:00
Jesse Natalie
df49d9da10
wgl: Fix flag check for GDI compat
...
Fixes: c432fbe5 ("wgl: Add no-gdi-single-buffered and gdi-double-buffered PFDs")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Reviewed-by: Jose Fonseca <jose.fonseca@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29819 >
2024-06-20 21:11:13 +00:00
Jesse Natalie
a02b759f41
wgl: Delete pixelformat support query
...
This whole thing was just a mess and never really worked the way it was
supposed to. All drivers can support GDI interop and double-buffering
independently at this point, so just remove it.
Fixes: c432fbe5 ("wgl: Add no-gdi-single-buffered and gdi-double-buffered PFDs")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Reviewed-by: Jose Fonseca <jose.fonseca@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29819 >
2024-06-20 21:11:13 +00:00
Eric Engestrom
b65f08e8c7
venus+zink/ci: drop fraction and add missing timeout on zink-venus-lvp
...
This job actually takes just under 5 minutes[*] without any fraction, so
there is no need for this, we can have full coverage and stay below the
10min-per-job limit.
[*] I've seen up to 10min when the CI is busy, so let's put the timeout
at 3x the normal run time.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29809 >
2024-06-20 20:47:22 +00:00
Mingcong Bai
32e781f381
meson: set default drivers for ppc, ppc64
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29811 >
2024-06-20 20:00:26 +00:00
Eric Engestrom
baf0cf7e2b
nvk+zink/ci: catch more double flakes
...
I just saw more of these in other glsl versions, and it's likely that it
doesn't matter which version is active from our point of view, so let's
just put all of them in the same "flaky" bag.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29813 >
2024-06-20 19:50:06 +00:00
Eric Engestrom
9a75c27518
nvk+zink/ci: add flakes seen over the last two nightly runs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29813 >
2024-06-20 19:50:06 +00:00
Eric Engestrom
152571bc0c
venus/ci: skip timed out test
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29803 >
2024-06-20 19:39:02 +00:00
Eric Engestrom
0db4bb2ea0
venus/ci: add manual/nightly venus-lavapipe-full
...
Technically not a "full" pipeline because that would take 12h, but
1/6 is much closer to it than the 1/60 that we can have in the merge
pipeline.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29803 >
2024-06-20 19:39:02 +00:00
Eric Engestrom
6b6655c1a8
venus/ci: fix indentation of list nested in a dict item
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29803 >
2024-06-20 19:39:01 +00:00
Corentin Noël
75820a5436
venus/ci: Update expectations
...
Signed-off-by: Corentin Noël <corentin.noel@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29803 >
2024-06-20 19:39:01 +00:00
Danylo Piliaiev
2c5d9c9675
freedreno/devices: Fix magic regs for Adreno A32
...
Now that I got a hands on access to this GPU and could run deqp-vk, it uses
blob v676.0 and the values are different from v744.19. Not only they
are different, with the values from v744 there are CTS test faulures.
Fixes at least ASTC tests.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29786 >
2024-06-20 17:55:57 +00:00
Lionel Landwerlin
00982e1af6
anv: fix vkCmdWaitEvents2 handling
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29716 >
2024-06-20 17:18:35 +00:00
Alyssa Rosenzweig
97ebe52ee3
lvp: use common descriptor update templates
...
this is now at parity with what we did. this gets rid of all divergence between
us and common vk enqueue.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28682 >
2024-06-20 16:43:56 +00:00
Alyssa Rosenzweig
8270ece6c0
lvp: fix silly casting for sampler desc updates
...
it worked out because the offset was 0 but it was semantically wrong and rather
confusing
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28682 >
2024-06-20 16:43:56 +00:00
Alyssa Rosenzweig
9b300bb662
lvp: use common push descriptor set enqueue
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28682 >
2024-06-20 16:43:56 +00:00
Alyssa Rosenzweig
f1c1f5936a
lvp: use common push constant enqueue
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28682 >
2024-06-20 16:43:56 +00:00
Alyssa Rosenzweig
a4fd4812fa
vulkan: handle enqueueing CmdPushDescriptorSet2KHR
...
implementation from lavapipe. again, no CTS for this...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28682 >
2024-06-20 16:43:56 +00:00
Alyssa Rosenzweig
b39efbc422
vulkan: handle enqueueing CmdPushConstants2KHR
...
implementation from lavapipe. there's no CTS coverage for this but hopefully
it works...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28682 >
2024-06-20 16:43:56 +00:00
Alyssa Rosenzweig
0ba7489243
vulkan: fix potential UAF with vk_cmd_enqueue_CmdPushDescriptorSetKHR
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reported-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28682 >
2024-06-20 16:43:56 +00:00
Alyssa Rosenzweig
5c2801f130
vulkan: handle push DUT with emulated secondaries
...
We need some manual logic to work out the size of pData, so we handroll this
one. This fixes push DUT with emulated secondaries.
Affects dEQP-VK.binding_model.shader_access.secondary_cmd_buf.*push*templ* if
emulated secondaries are used.
Neither panvk nor dozen support push DUT yet, so this isn't hurting anyone and
doesn't need to be cc'd stable. But hopefully panvk & dozen get on that :}
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28682 >
2024-06-20 16:43:56 +00:00
Alyssa Rosenzweig
24c897ff46
vulkan: reference count vk_descriptor_update_template
...
We need to extend the lifetime of DUTs for capture/replay based secondaries.
Copy the reference counting boilerplate from vk_descriptor_set_layout.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Suggested-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28682 >
2024-06-20 16:43:55 +00:00
Erik Faye-Lund
47e422adfa
Revert "docs: use html_static_path for static files"
...
No, html_static_path doesn't do the same thing as html_extra_path; it
puts things inside the _static folder, which we don't want here. Let's
revert the change.
This reverts commit e037761a2f .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29805 >
2024-06-20 16:35:06 +00:00
Mike Blumenkrantz
3784e04c96
zink: implement msaa replication with dynamic rendering
...
this was the last path that actually required legacy renderpasses,
which frees them up for deletion
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29789 >
2024-06-20 16:12:56 +00:00
Mike Blumenkrantz
d05f6f4693
zink: split out msaa replication
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29789 >
2024-06-20 16:12:56 +00:00
Mike Blumenkrantz
453ceceec2
zink: null check pipe loader config before use
...
Fixes: e3ea55fef2 ("zink: don't print error messages when failing an implicit driver load")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11220
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29806 >
2024-06-20 15:47:38 +00:00
Erik Faye-Lund
a1c220fd93
nir: fix utf-8 encoding-issue
...
This UTF-8 encoding issue seems to cause issues with the doxygen
docs-integration.
Fixes: 2111551485 ("Convert a few files to UTF-8")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29801 >
2024-06-20 14:51:31 +00:00
Mary Guillemard
0296955f0f
panvk: Enable offscreen_viewport tests in CI for Mali-G52
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29802 >
2024-06-20 14:27:02 +00:00
Mary Guillemard
738e202dce
panvk: Clamp viewport scissor to valid range
...
Fix "dEQP-VK.draw.renderpass.offscreen_viewport.x_off_screen_negative_y*" tests.
Also did a bit of clean up around emit_viewport.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29802 >
2024-06-20 14:27:02 +00:00
Danylo Piliaiev
d853443a2e
freedreno/devices: Turn off enable_tp_ubwc_flag_hint for a740 by default
...
Most devices with a740 have blob v6xx which doesn't have TP_UBWC_FLAG_HINT
set. Match them for better compatibility by default.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29754 >
2024-06-20 13:49:20 +00:00
Danylo Piliaiev
2d2f19aa44
tu: Add enable_tp_ubwc_flag_hint feature to a7xx
...
On a740 TPL1_DBG_ECO_CNTL1.TP_UBWC_FLAG_HINT must be the same between
all drivers in the system, somehow having different values affects
BLIT_OP_SCALE. We cannot automatically match blob's value, so the
best thing we could do is a toggle.
Example:
FD_DEV_FEATURES=enable_tp_ubwc_flag_hint=0
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29754 >
2024-06-20 13:49:20 +00:00
Danylo Piliaiev
f34862befa
freedreno: Rename TPL1_DBG_ECO_CNTL1.UBWC_WORKAROUND into TP_UBWC_FLAG_HINT
...
That's how it is referenced in KGSL.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29754 >
2024-06-20 13:49:20 +00:00
Pierre-Eric Pelloux-Prayer
2a9bf2b512
radeonsi: store the total binary size in si_shader
...
si_get_shader_prefetch_size is called each time a shader is changed.
Since the size of a given variant never changes, we can compute the
value once and store the result.
This has to be done in 2 places:
* si_create_shader_variant for all types of shaders
* si_create_compute_state_async for compute shader, when a shader
is loaded from the cache.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29304 >
2024-06-20 13:14:33 +00:00
Pierre-Eric Pelloux-Prayer
14974fd097
ac/llvm: implement WA in nir to llvm
...
LLVM implements multiple workarounds for gfx11.
The problem is that they're not applied for shaders built in
parts.
LLVM will be modified to be more conservative and apply the
workaround in more places but in the meantime, add a simpler
implementation in the NIR to LLVM backend: insert a wait at
the end of each shader part.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10785
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29304 >
2024-06-20 13:14:33 +00:00
Rhys Perry
71afacff39
aco/insert_exec_mask: ensure top mask is not a temporary at loop exits
...
This is problematic when the successor of the loop exit is an invert
block. It assumes that the top mask is Operand(bld.lm) and doesn't change
it when entering the else branch.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11348
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29767 >
2024-06-20 12:47:05 +00:00
Georg Lehmann
5c6c8182c8
radv: inline partial push constant loads
...
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29675 >
2024-06-20 12:09:29 +00:00
Rhys Perry
bdc229231d
aco: remove push constants
...
These are lowered in NIR.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29675 >
2024-06-20 12:09:29 +00:00
Rhys Perry
38d1456931
ac/llvm: remove push constants
...
These are lowered in NIR.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29675 >
2024-06-20 12:09:29 +00:00
Rhys Perry
edbb75ce3a
radv: lower push constants in NIR
...
fossil-db (navi21):
Totals from 879 (1.11% of 79395) affected shaders:
Instrs: 1359371 -> 1360237 (+0.06%); split: -0.02%, +0.08%
CodeSize: 7290856 -> 7294308 (+0.05%); split: -0.01%, +0.06%
SpillSGPRs: 751 -> 800 (+6.52%)
Latency: 21923904 -> 21923983 (+0.00%); split: -0.03%, +0.03%
InvThroughput: 7029748 -> 7029528 (-0.00%); split: -0.03%, +0.03%
VClause: 23595 -> 23610 (+0.06%)
SClause: 31819 -> 32256 (+1.37%); split: -0.07%, +1.44%
Copies: 109175 -> 110089 (+0.84%); split: -0.13%, +0.97%
Branches: 32068 -> 32072 (+0.01%); split: -0.02%, +0.03%
PreSGPRs: 41831 -> 41774 (-0.14%); split: -0.15%, +0.01%
PreVGPRs: 53605 -> 53604 (-0.00%)
VALU: 1020426 -> 1020521 (+0.01%); split: -0.00%, +0.01%
SALU: 135931 -> 136850 (+0.68%); split: -0.08%, +0.76%
SMEM: 51688 -> 51686 (-0.00%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29675 >
2024-06-20 12:09:28 +00:00
Lionel Landwerlin
1ca97f019e
anv: avoid initalizing TRTT stuff without sparseBinding
...
7da5b1caef ("anv: move trtt submissions over to the anv_async_submit")
added a hard dependency on timeline semaphore which is still optional.
And since it gates the sparseBinding feature, we should not use it if
sparseBinding is not enabled.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 7da5b1caef ("anv: move trtt submissions over to the anv_async_submit")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29779 >
2024-06-20 11:38:16 +00:00
Iago Toral Quiroga
e59f8faf8a
v3dv: don't call wsi_device_init too early
...
Since a5d59a50a9 this relies on the device capabilities to be already
cached in the device.
Fixes some crashes with WSI stuff, like vkcube-wayland or
dEQP-VK.wsi.wayland.swapchain.modify.resize.
Fixes: a5d59a50a9 ('v3dv: Use common runtime vk_properties')
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11363
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29798 >
2024-06-20 10:21:26 +00:00
Kenneth Graunke
50519598ff
intel/brw: Skip discarding the interference graph
...
We no longer need to reserve registers for constructing spill/fill
messages. We have split sends and construct message headers in new
temporary registers with a very short lifespan which are simply added
to the existing interference graph as new nodes and allocated via the
normal mechanism.
This means that when we need to spill for the first time, we can avoid
discarding and recomputing the entire interference graph. We also avoid
needing to recreate all spill candidate information once ra_allocate()
fails, because the graph remains valid, and none of the existing nodes
had any changes to their interference. The existing spill candidates
remain valid.
This will slightly help improve compile time when needing to spill.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25811 >
2024-06-20 09:47:18 +00:00
Kenneth Graunke
29d6264627
intel/brw: Build the scratch header on the fly for pre-LSC systems
...
Instead of reserving a register to contain the spill header, which
gets marked live for the entire program, we can just emit the ALU
instructions to build it on the fly. (This is similar to the way
we handle scratch on Alchemist with the newer LSC data port.)
There are a couple of downsides that make this not obviously a win.
First, in order to construct the scratch header on Gfx9-12, we have
to use fields from g0, which will have to remain live anywhere that
scratch access is required. This could negate the register pressure
benefits of creating the header on the fly. However, g0 is oft used
in other places anyway, so it may already be there. Another is that
it's a non-trivial number of ALU instructions to construct the value.
Still, trading lower pressure (so fewer spills, less memory access
and stalls) for more cheap ALU seems like it ought to be a win.
There is another valuable benefit: by not reserving a register, we
eliminate the need to reconstruct the interference graph. (The next
patch will actually do so.)
shader-db on Icelake shows spills/fills at 54/53 helped, 4/10 hurt,
and an 8% increase in ALU on affected shaders. Synmark's OglCSDof
(a benchmark that spills) performance remains the same on Alderlake.
fossil-db on Icelake shows a 5.6%/5.1% reduction in spills/fills and a
4% reduction in scratch memory size on affected shaders. Instruction
counts go up by 11.07%, but cycle estimates only increase by 0.57%.
Assassin's Creed Odyssey and Wolfenstein Youngblood both see 20-30%
reductions in spills/fills, a significant improvement.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25811 >
2024-06-20 09:47:18 +00:00
Konstantin Seurer
ce85f3a431
lavapipe: Always call finish_fence after lvp_execute_cmd_buffer
...
Makes sure that sample_functions is not modified while shaders are
running.
Fixes: 7ebf7f4 ("llvmpipe: Compile sample functioins on demand")
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29699 >
2024-06-20 09:18:19 +00:00
Konstantin Seurer
255f4bb290
llvmpipe: Only evict cache entries if a fence is available
...
Makes sure that no chaders are running when accessing sample_functions.
Fixes: 7ebf7f4 ("llvmpipe: Compile sample functioins on demand")
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29699 >
2024-06-20 09:18:19 +00:00
Konstantin Seurer
5941bee017
llvmpipe: Stop using a sample_functions pointer as cache key
...
sample_functions can be reallocated between get_sample_function and llvmpipe_clear_sample_functions_cache.
Fixes: 7ebf7f4 ("llvmpipe: Compile sample functioins on demand")
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29699 >
2024-06-20 09:18:18 +00:00
Konstantin Seurer
9e4a44d172
llvmpipe: Lock shader access to sample_functions
...
sample_functions can be re-allocated.
Fixes: 7ebf7f4 ("llvmpipe: Compile sample functioins on demand")
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29699 >
2024-06-20 09:18:18 +00:00
Mary Guillemard
b06661aaf3
panvk: Enable dEQP-VK.info tests in CI for Mali-G52
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29800 >
2024-06-20 08:50:12 +00:00
Mary Guillemard
3129d71fef
panvk: Report correct min value for discreteQueuePriorities
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Fixes: ac34183ec3 ("panvk: Move the VkPhysicalDevice logic to panvk_physical_device.{c,h}")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29800 >
2024-06-20 08:50:12 +00:00
Mary Guillemard
596306a984
panvk: Advertise shaderModuleIdentifier feature
...
Was missing from the original commit.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Fixes: f164819698 ("panvk: Advertise VK_EXT_shader_module_identifier")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29800 >
2024-06-20 08:50:12 +00:00
Konstantin Seurer
a3aadac5fe
zink: Blit using one triangle for nearest filtering
...
Fixes dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_out_of_bounds_.* on RADV.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28892 >
2024-06-20 07:02:15 +00:00
Konstantin Seurer
3233d19f87
zink: Always include renderdoc_app.h
...
Removes the dependency on a system wide installation ot the renderdoc
header.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28892 >
2024-06-20 07:02:15 +00:00
Samuel Pitoiset
e8fb4b82e9
radv: fix emitting indirect descriptor sets in the DGC prepare shader
...
NIR_DEBUG=validate_ssa_dominance failed because dgc_cs_emit() weren't
actually in the if.
Fixes: 33a849e004 ("radv: emit indirect sets for indirect compute pipelines with DGC")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29782 >
2024-06-20 06:33:51 +00:00
Lucas Fryzek
6a2309b676
u_gralloc/fallback: Set fd from handle directly
...
Fix returned fd by populating directly from the handle, instead of
from the fds array which is never populated.
Fixes: 7ae4a2ae34 ("u_gralloc/fallback: Extract modifier from QCOM native_handle")
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29785 >
2024-06-20 05:57:06 +00:00
Timothy Arceri
0ac0fbc19e
glsl: make glsl_to_nir() more generic
...
Here we move anything that expects the IR to have already been linked
so that in a future patch we can use glsl_to_nir() to convert IR that
has only been compiled.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29761 >
2024-06-20 00:56:10 +00:00
Dave Airlie
f19ddef76c
st/mesa: drop u_simple_shaders.h include where not used.
...
These functions aren't used in here anymore.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29793 >
2024-06-19 21:27:17 +00:00
Dave Airlie
6a464401d5
ac/radv/radeon: move film grain init to common code.
...
Share the film grain code between users.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29747 >
2024-06-19 20:51:53 +00:00
Dave Airlie
57535969cb
ac/radv/radeonsi: move av1 ctx/probs size/filling to common code.
...
All the av1 prob and ctx sizing code can be shared between
radv and radeonsi here.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29747 >
2024-06-19 20:51:52 +00:00
Dave Airlie
f1e27e156b
radv/video: use vcn ip versions for encoder detection.
...
This aligned with radeonsi code.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29747 >
2024-06-19 20:51:52 +00:00
Christian Gmeiner
08c4efdd8d
nak: Move nak_optimize_nir declaration to nak_private.h
...
It is not used outside of the compiler.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29792 >
2024-06-19 20:39:30 +00:00
Thomas H.P. Andersen
7c3bd27d3b
nvk/upload_queue: fix the _fill method
...
When calculating the height for multi line uploads we should ensure that
we do not exceed max_dim rather than using at least max_dim.
The assert is also changed to ensure that we do not upload more than the
source size.
Fixes: 22e44d54fd
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29784 >
2024-06-19 20:25:08 +00:00
David Heidelberg
a0c09eef93
util: bump blake3 from 1.3.3 to 1.5.1, improve armv7 and aarch64 performance
...
Steps for uprev:
- copy files from BLAKE3/c src/util/blake3/
- edit README
- `for file in *.asm; do mv "$file" "${file%.asm}.masm"; done`
- keep
- blake3.h (no relevant changes), only change BLAKE3_VERSION_STRING
- blake3_sse2_x86-64_unix.S (no changes)
- blake3_avx512_x86-64_unix.S (no changes)
- blake3_sse41_x86-64_unix.S (no changes)
Acked-by: Marek Olšák <marek.olsak@amd.com >
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29687 >
2024-06-19 12:27:30 -07:00
Derek Foreman
9f1effb03b
wsi/wayland: Use different queue names for different queries
...
We frequently create a new display, query some stuff, then throw it away.
Using different queue names for the different queries is a little more
expressive when debugging.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29787 >
2024-06-19 18:17:50 +00:00
Eric Engestrom
9e9a38481d
docs: update calendar for 24.1.2
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29790 >
2024-06-19 17:11:30 +00:00
Eric Engestrom
331ff0bc64
docs: add sha256sum for 24.1.2
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29790 >
2024-06-19 17:11:30 +00:00
Eric Engestrom
104d97c9c6
docs: add release notes for 24.1.2
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29790 >
2024-06-19 17:11:30 +00:00
José Roberto de Souza
9d8d5cf8c9
anv: Remove block promoting non CPU mapped bos to coherent
...
The intention of this block was to set one of the flags that is used
to select a PAT index but this was doing more than that.
It was promoting WB+0 way coherency BOs to WC+1 way coherency possibly
causing regression in platforms without LLC.
anv_device_get_pat_entry() return WC/writecombining if no flags is
set so we don't need this block after all.
Reported-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com >
Fixes: a65e982b44 ("anv: Split ANV_BO_ALLOC_HOST_CACHED_COHERENT into two actual flags")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29769 >
2024-06-19 16:34:21 +00:00
Juan A. Suarez Romero
5f27c4cc4e
v3dv/ci: add new timeouts
...
Add a set of tests that takes too much time to run in rpi5.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29788 >
2024-06-19 18:04:36 +02:00
Karmjit Mahil
9164ea7032
freedreno/isa: Fix isaspec map for a3xx-ld
...
When LDP uses a negative offset (which it valid), since
`struct ir3_register` uses `{i,u}nt32_t` for the immediate
values, using `extract_reg_uim()` wasn't sign extending
negative immediate values.
Addresses:
```
src/freedreno/isa/encode.h:84:
pack_field: Assertion '!(( val & ~BITFIELD64_MASK(1 + high - low)) &&
(~val & ~BITFIELD64_MASK(1 + high - low)))' failed.
```
seen in https://gitlab.freedesktop.org/mesa/mesa/-/issues/11153 .
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29768 >
2024-06-19 12:38:53 +00:00
Danylo Piliaiev
37ddf572b1
tu: Fix issues with render_pass tracepoint
...
cmd->state.attachments was accessed out of bounds, which somehow instead
of crash caused the tracepoint to be skipped.
drawcall_bandwidth_per_sample_sum was divided by 0 when there were no
draw calls in a renderpass.
Fixes: 1aab0fc4f5
("tu: Add attachments' UBWC info to renderpass tracepoint")
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29752 >
2024-06-19 12:11:10 +00:00
Mary Guillemard
887f0e0af6
panvk: Enable device_init, null_handle and object_management in CI for Mali-G52
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29783 >
2024-06-19 13:20:21 +02:00
Mary Guillemard
bbc7c76590
panvk: Implement CmdDispatchBase
...
Fix "dEQP-VK.compute.pipeline.device_group.dispatch_base"
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29783 >
2024-06-19 13:20:18 +02:00
Mary Guillemard
91fd031ba7
panvk: Add more allocation checks in create_device
...
That's not enough to make
"dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic"
happy but contribute to it.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29783 >
2024-06-19 13:20:15 +02:00
Mary Guillemard
f6a7a141c7
panvk: Fix device mempool leaks
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Fixes: 2eaa437574 ("panvk: Use memory pools for internal GPU data attached to vulkan objects")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29783 >
2024-06-19 13:20:14 +02:00
Mary Guillemard
9ff209342b
panvk: Ensure to unref transient bo in reset for mempools
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Fixes: 906fb2371a ("panvk: Prepare panvk_mempool for shared device memory pools")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29783 >
2024-06-19 13:20:13 +02:00
Mary Guillemard
16b0743375
panvk: Make panvk_kmod_zalloc use correct allocation scope on non-transient
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29783 >
2024-06-19 13:20:11 +02:00
Mary Guillemard
c0f8465fa8
panvk: Check for maxBufferSize in panvk_CreateBuffer
...
This fix failure on "dEQP-VK.api.buffer.basic.size_max_uint64".
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Fixes: 822478ec20 ("panvk: Move the VkBuffer logic to its own source file")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29783 >
2024-06-19 13:20:08 +02:00
Mary Guillemard
7dd771b2d7
panvk: Make mempool detect NULL BOs
...
Contribute to fixing "dEQP-VK.api.object_management.alloc_callback_fail.device".
We needs a way to report errors in mempools.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29783 >
2024-06-19 13:20:06 +02:00
Mary Guillemard
8b1eed39ad
panvk: Add missing clean up in blend_shader_cache_init
...
When pan_blend_shader_key_table_create was failing, we weren't
destroying the mutex and panvk_pool.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29783 >
2024-06-19 13:20:02 +02:00
Mary Guillemard
716e0e1568
panvk: Add missing null check in DestroyCommandPool
...
Fix a crash when a null handle is passed.
(dEQP-VK.api.null_handle.destroy_command_pool)
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Fixes: afbac1af77 ("panvk: Move the VkCommandPool logic to panvk_cmd_pool.{c,h}")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29783 >
2024-06-19 13:19:30 +02:00
Erik Faye-Lund
e6d487792e
mailmap: update rohan's primary email address
...
Rohan has been working for Intel for a while, so let's make that his
primary email address.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29240 >
2024-06-19 09:06:15 +00:00
Erik Faye-Lund
9cb82944e9
mailmap: use consistent spelling for constantine
...
Reviewed-by: Constantine Shablia <constantine.shablya@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29240 >
2024-06-19 09:06:15 +00:00
Erik Faye-Lund
926c7d67c4
mailmap: move konstantin to the right sorted position
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29240 >
2024-06-19 09:06:15 +00:00
Erik Faye-Lund
bc6fe203a7
mailmap: map collabora.co.uk to collabora.com
...
Gert has committed using both the com and co.uk email address. They lead
to the same inbox, but let's make sure they get counted as one
contributor in the git history.
Reviewed-by: Gert Wollny <gert.wollny@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29240 >
2024-06-19 09:06:15 +00:00
Erik Faye-Lund
f3e0cc5c30
mailmap: invert my mailmapping
...
I first and foremostly work on Mesa as a Collabora employee, so it's
clearer if my gmail address map to my collabora address instead of the
other way around.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29240 >
2024-06-19 09:06:15 +00:00
Erik Faye-Lund
df713647bc
mailmap: merge Robert and Bob Beckett into one
...
This is the same person, and he usually goes by Bob. Let's merge this
into one, so the commits gets counted together.
Reviewed-by: Bob Beckett <bob.beckett@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29240 >
2024-06-19 09:06:15 +00:00
Erik Faye-Lund
3c259f5cac
mailmap: invert tomeu's mapping
...
Tomeu hasn't been working at Collabora for a while now, let's invert the
mapping so his private email address is more prominent.
Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29240 >
2024-06-19 09:06:14 +00:00
Dave Airlie
b888946f7a
radv/video: fix layered decode h264/5 tests.
...
CTS tests both layered and separate DPB, but radv wasn't handling
layered properly when used with the tier 2 dpb handling.
This adjusts the addresses to use the layer index for tier2.
Fixes dEQP-VK.video.decode.*layered*
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29758 >
2024-06-19 08:02:31 +00:00
Yonggang Luo
a0f3d99f44
gallivm: add lp_context_ref for combine usage of LLVMContextSetOpaquePointers
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26033 >
2024-06-19 17:01:51 +10:00
Dave Airlie
65092ab1a5
nouveau/nvc0: add support for using common pushbuf dumper
...
This dumper is covers things a lot better than just hex, and
should support all the classes we currently use on nvc0.
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29542 >
2024-06-19 02:35:24 +00:00
Dave Airlie
f12641f89f
nouveau/push: add support for m2mf/i2mf to dumper
...
This will be used to dump nvc0 command buffers.
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29542 >
2024-06-19 02:35:24 +00:00
Faith Ekstrand
4b6970cf36
ci: Update trace SHAs
...
I have no idea which commit changed these but they look fine.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:23 +00:00
Faith Ekstrand
22f1b04a99
nir/format_convert: Assert that UNORM formats are <= 16 bits
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:23 +00:00
Faith Ekstrand
5f5f4474f6
nir: Add a format unpack helper and tests
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
faf4c2edfe
nir: Add a format pack helper and tests
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
bd961343d3
util: Make format_srgb.h C++ safe
...
This fixes link errors with MSVC if used in C++ files
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
1ffb0c5af4
nir: Support 0 and 32 bits in some format conversion helpers
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
34161d3fda
nir: Move most of nir_format_convert to a C file
...
There's no good reason for this to be header-only besides laziness on my
part when I first wrote a few "small" helpers. Some of those are pretty
good sized and don't need to be inlined.
Keeping the original copyright since this is just moving code.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
9d3b144018
nir: Add a nir_intrinsic_use for unit tests
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
5b9ac9a68f
nir/format_convert: Use fmin/fmax to clamp R9G9B9E5 data
...
As long as drivers implement an fmin/fmax that do the right thing with
NaN, there's no reason for the integer comparison.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
86aad90e2a
nir/format_convert: Smash NaN to 0 in pack_r9g9b9e5()
...
I have no idea why I flipped the order of these to checks vs. the C
code when I wrote the NIR helper. We need to deal with NaN first or
else the fmin will smash NaN to MAX_RGB9E5 and it won't get handled as
NaN.
Fixes: 9981709d8f ("nir/format_convert: Add a function to pack RGB9_E5 formats")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
cd8a3ea04b
util/format: Handle denorms when converting to R11G11B10F
...
The spec allows denormals and the R11G11B20F decoder handles them but
the encoder always flushes them to zero. We should be consistent and
handle denorms going both directions.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
ef5e441274
util/format: Round to nearest even when converting to R11G11B20F
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
3797fc18d8
util/format_pack: Clamp SNORM values to [-1, 1] when unpacking
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
354f0958af
util/format_pack: Also use iround for SCALED formats
...
This is probably not necessary but more correct.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Faith Ekstrand
b187be5b1c
util/format_pack: Fix packing of signed 1010102 SSCALED formats
...
Previously, [SU]SCALED formats would hit the integer path and we would
generate:
((uint32_t)CLAMP(src[i], min, max)) & MASK
This is fine for unsigned scaled formats. However, for signed formats,
a negative float value cast to an unsigned integer yields undefined
results. On x86, it implicitly clamps to 0. This change makes us
generate:
((uint32_t)(int32_t)CLAMP(src[i], min, max)) & MASK
hich gets us correct casting.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793 >
2024-06-19 01:56:22 +00:00
Caio Oliveira
2a9f4618c5
intel/brw: Make component_size() consistent between VGRF and FIXED_GRF
...
Change so the size rounds up to the next multiple of the horizontal stride like
is done for VGRF. This was causing an inconsistency in regs_read() -- The original
component_size() calculation for FIXED_GRF excluded any padding at the end but it was
still being discounted by regs_read().
Suggested by Curro.
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11069
Reviewed-by: Francisco Jerez <currojerez@riseup.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29736 >
2024-06-19 01:33:58 +00:00
Caio Oliveira
8fb70f0746
intel/brw: Add unit tests for scoreboard handling FIXED_GRF with stride
...
Based on shaders reported in
https://gitlab.freedesktop.org/mesa/mesa/-/issues/11069 and
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29723 . These
currently fail, later patch will enable them.
Reviewed-by: Francisco Jerez <currojerez@riseup.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29736 >
2024-06-19 01:33:58 +00:00
Dave Airlie
7013797827
nvidia: fixup classes import and import new classes.
...
This fixes the import script up and pulls in all new class changes,
a bunch of new registers and inline-to-memory classes which we can
use for debugging dumps from nvc0.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29773 >
2024-06-18 22:06:55 +00:00
Lionel Landwerlin
c4e952dbd9
anv: reuse device local variable
...
No functional changes.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29595 >
2024-06-18 20:44:51 +00:00
Lionel Landwerlin
0147908a89
anv: predicate emission of STATE_BASE_ADDRESS
...
Completely skip the stall & programming if the bindless address has
not changed. Only on Gfx12.5+ since previous generations also program
the binding table pool base address through STATE_BASE_ADDRESS.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29595 >
2024-06-18 20:44:51 +00:00
Lionel Landwerlin
9a3e8508a7
anv: factor out STATE_BASE_ADDRESS filling to helper function
...
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29595 >
2024-06-18 20:44:51 +00:00
Lionel Landwerlin
f8c0a99d52
anv: emit conditional after gfx state flushing
...
In a following change the predicate registers might be used when
flushing the state.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29595 >
2024-06-18 20:44:51 +00:00
Lionel Landwerlin
ed43be941e
anv: add custom mi write fences
...
The mi-builder already takes care of mi write/read fences, but we have
a few cases in Anv where we also need to fence mi-write ->
shader-read.
We also have one case where a command buffer jump address is modified
by a previous mi write command.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29595 >
2024-06-18 20:44:51 +00:00
Rhys Perry
9fe3af1e2a
aco: insert s_nop before discard early exit sendmsg(dealloc_vgpr)
...
Forgot about this one.
fossil-db (gfx1100):
Totals from 3920 (2.94% of 133461) affected shaders:
Instrs: 6632088 -> 6636008 (+0.06%)
CodeSize: 34165376 -> 34181056 (+0.05%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Fixes: 37fbfa655a ("aco: insert s_nop before VGPR deallocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29770 >
2024-06-18 20:17:38 +00:00
Erico Nunes
814e7c7af5
Revert "ci: lima farm maintenance"
...
This reverts commit c5e13af73c .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29474 >
2024-06-18 19:13:27 +00:00
Erico Nunes
08ecb39789
lima/ci: update piglit ci expectations
...
Signed-off-by: Erico Nunes <nunes.erico@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29474 >
2024-06-18 19:13:27 +00:00
Maaz Mombasawala
9cadf45ddf
svga: Retry DRM_VMW_SYNCCPU ioctl on failure.
...
The ioctl DRM_VMW_SYNCCPU may sometimes fail with ERESTART or EBUSY, which
in turn bubbles up to the application as a GL_OUT_OF_MEMORY error.
We are seeing this in glamor, while this does not cause any real issues, it
does pollute the system log.
Retrying DRM_VMW_SYNCCPU fixes this issue.
Reviewed-by: Neha Bhende <neha.bhende@broadcom.com >
Reviewed-by: Zack Rusin <zack.rusin@broadcom.com >
Reviewed-by: Martin Krastev <martin.krastev@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29755 >
2024-06-18 19:01:53 +00:00
Caio Oliveira
f982d2bb79
intel/brw: Fix typo in DPAS emission code
...
The enums were mixed up. Code was working because they were being
used only for their numerical values.
Fixes: e666872c75 ("intel/compiler: Initial bits for DPAS instruction")
Acked-by: Iván Briano <ivan.briano@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29762 >
2024-06-18 18:25:21 +00:00
Georg Lehmann
c3c398d56d
aco: make local functions static in files without anonymous namespace
...
I don't think adding an anonymous namespace in these files is worth it
given the amount of global functions
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29740 >
2024-06-18 17:53:07 +00:00
Georg Lehmann
046414e061
aco: add more anonymous namespaces
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29740 >
2024-06-18 17:53:07 +00:00
Connor Abbott
c9c483bf02
ir3: Enable early preamble
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462 >
2024-06-18 16:52:31 +00:00
Danylo Piliaiev
d8d192f3f4
ir3: Correctly assemble mova1 with (r) on const
...
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462 >
2024-06-18 16:52:31 +00:00
Danylo Piliaiev
e9c764c825
freedreno/ir3: mova has special meaning for (r) flag
...
It prevents the hazard when in the following case:
ldc.1.k.imm c[a1.x], 0, 1
(ss)mova1 a1.x, 8
The correct way is:
ldc.1.k.imm c[a1.x], 0, 1
(ss)mova1 a1.x, (r)8
Without it ldc may use a1.x which is set after ldc.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462 >
2024-06-18 16:52:31 +00:00
Connor Abbott
0a4afef6ea
freedreno/a6xx: Implement early preamble
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462 >
2024-06-18 16:52:31 +00:00
Connor Abbott
53ba1613ec
tu: Implement early preamble
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462 >
2024-06-18 16:52:31 +00:00
Connor Abbott
3ce04c1111
ir3: Add ir3_info::early_preamble
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462 >
2024-06-18 16:52:31 +00:00
Connor Abbott
d35c1e5051
freedreno/a6xx: Workaround early preamble HW bug
...
Port of the previous commit.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462 >
2024-06-18 16:52:31 +00:00
Connor Abbott
472ce31e56
tu: Workaround early preamble HW bug
...
This seems to be reproducable only by running CTS in parallel with
deqp-runner.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462 >
2024-06-18 16:52:31 +00:00
Connor Abbott
1f1f42e9d4
freedreno,ir3: Add has_early_preamble
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462 >
2024-06-18 16:52:31 +00:00
Connor Abbott
aa1603bcb0
ir3/legalize: Insert dummy bary.f after preamble
...
Otherwise it will not get executed with early preamble.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462 >
2024-06-18 16:52:31 +00:00
Connor Abbott
b38fef99ac
ir3: Put VS->TCS barrier after preamble
...
Putting it beforehand doesn't work with early preamble.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462 >
2024-06-18 16:52:31 +00:00
Adam Jackson
10d21d4100
mesa: Enable EXT_shadow_samplers for GLES2
...
I thought this was just the funny GLES spelling of the extn name, but
there's also some ESSL bits you need to add. Most of which you could
probably yoink from the old Unity glsl-optimizer (which itself yoinked
most of the GLSL compiler from Mesa):
94a9b2959b
Signed-off-by: Adam Jackson <ajax@redhat.com >
Co-authored-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Acked-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6691 >
2024-06-18 14:40:33 +00:00
Samuel Pitoiset
33a849e004
radv: emit indirect sets for indirect compute pipelines with DGC
...
This used to work by luck because the current DGC prepare shader
is using one descriptor set and it was the currently bound compute
shader... Using two descriptor sets or starting from 1 would just fail.
For indirect compute pipelines, descriptors must be emitted from the
DGC shader because there is no bound compute pipeline at all. This
solution is using indirect descriptor sets because it's much shorter
and easier to implement. This could be improved but nothing uses
indirect compute pipelines and this is like experimental stuff.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29700 >
2024-06-18 13:50:16 +00:00
Samuel Pitoiset
b1ba02e707
radv: force using indirect descriptor sets for indirect compute pipelines
...
Emitting descriptors in DGC is a huge pain but using indirect descriptor
sets is much easier.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29700 >
2024-06-18 13:50:16 +00:00
Timothy Arceri
ef21df917f
glsl: remove do_function_inlining()
...
This no longer has any users. nir based inlining should be used for any
new code.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29519 >
2024-06-18 12:34:52 +00:00
Timothy Arceri
f1ef6517e8
glsl: remove Par-linking from the standalone linker
...
lima was the last user of this feature so lets remove it. This will
allow us to drop more soon to be unused glsl ir code once full nir
linker support lands.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29519 >
2024-06-18 12:34:52 +00:00
Timur Kristóf
0bf10ad4ad
radv: Use number of TES inputs for TCS-TES linking.
...
This is to match what ac_nir_lower_tess_io_to_mem also does.
Doesn't address any known bug, but it's theoretically possible
that TCS outputs_written and TES inputs_read mismatch, so let's
be on the safe side here.
Fixes: be49b02f05
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29696 >
2024-06-18 12:06:22 +00:00
Timur Kristóf
0355364743
ac/nir/tess: Fix per-patch output VRAM mapping.
...
VARYING_SLOT_PATCH0 is greater than 64 so it is wrong to use it
with BITFIELD64_BIT. Check for VARYING_SLOT_TESS_LEVEL_* properly
when mapping output locations in VRAM.
Fixes: 2cf7f282df
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11253
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29696 >
2024-06-18 12:06:21 +00:00
Timur Kristóf
0f0ebd8512
ac/nir/tess: Fix per-patch output LDS mapping.
...
VARYING_SLOT_PATCH0 is greater than 64 so it is wrong to use it
with BITFIELD64_BIT. Check for VARYING_SLOT_TESS_LEVEL_* properly
when mapping output locations in LDS.
Fixes: c61eb54806
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29696 >
2024-06-18 12:06:21 +00:00
Timur Kristóf
348b8859dc
ac/nir/tess: Only write tess factors that the TES reads.
...
Otherwise we would write to a memory location reserved
for another per-patch output.
Fixes: 2cf7f282df
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11324
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29696 >
2024-06-18 12:06:21 +00:00
Zan Dobersek
9845e99960
tu: avoid memory polling in occlusion query endings using ZPASS_DONE
...
On newer hardware where ZPASS_DONE events are used for sample count writes
the memory polling in occlusion query endings can be wholly avoided. A WFI
is still required, but the performance gain is still in the range of 10% on
the trivial occlusionquery demo.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Tested-by: Mike Lothian <mike@fireburn.co.uk >
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29403 >
2024-06-18 11:39:57 +00:00
Zan Dobersek
5653c52151
tu: fix ZPASS_DONE interference between occlusion queries and autotuner
...
On newer devices where ZPASS_DONE events have sample count writing
abilities the firmware expects these events to come in begin-end pairs,
essentially corresponding to a typical occlusion query usage. Since this
event is also used in the autotuner we have to avoid event pairs to be
emitted in an interleaved fashion.
Additional renderpass state now tracks whether a given renderpass contains
an occlusion query. If so, autotuner will emit miscellaneous ZPASS_DONE
events in order to form its own begin-end pairs before and after the
renderpass commands.
Occlusion query behavior inside a renderpass doesn't change. But when used
outside of a renderpass, possible autotuner usage requires to again emit
ZPASS_DONE events that end up forming begin-end pairs of these events both
at the start and the end of the query.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Fixes: 4e6a1f8852 ("tu/autotune: Use `CP_EVENT_WRITE7::ZPASS_DONE` on A7XX")
Tested-by: Mike Lothian <mike@fireburn.co.uk >
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29403 >
2024-06-18 11:39:57 +00:00
Job Noorman
6bc7cd6108
ir3: only add live-in phis for top-level intervals while spilling
...
When both an interval and some of its children would be live-in, we used
to add phis for all of them. This could lead to cases where the pressure
after spilling was higher than before.
This happens, for example, when both a split and its parent are live-in.
Before spilling, the split wouldn't add to the pressure because its
parent had already been inserted. After spilling, since we created a phi
for the split, the link with its parent would be lost and it would add
to the pressure.
Fix this by only adding phis for top-level intervals and adding splits
after them.
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
18cd803cef
ir3: refactor ir3_spill.c to use the ir3_cursor/ir3_builder API
...
There were a few places that used an instruction pointer to decide where
new instructions should be created. NULL was used to add them at the end
of the block. While fixing a spilling bug, a new option was needed to
add instructions at the beginning of the block. This will be much easier
to implement using cursors.
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
1972db36c6
ir3: add ir3_cursor/ir3_builder helpers
...
Whenever instructions need to be created at specific locations, ir3
often passes around an instruction pointer. When set, new instructions
are added before or after it (depending on the context). When NULL, new
instructions are added at the end of the block. This whole scheme is
confusing.
This patch adds ir3_cursor and ir3_builder structs and the associated
helper functions. The API mirrors the one from nir_cursor/nir_builder.
This patch does not refactor existing code to use the new API. This will
happen in future patches.
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
dc04fd8e62
ir3: restore interval_offset after liveness recalculation in shared RA
...
This value is usually set by ir3_merge_regs. Since we don't need to call
this again after shared RA, we have to copy it manually to the new
liveness struct.
Fixes: fa22b0901a ("ir3/ra: Add specialized shared register RA/spilling")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
3f3c190649
ir3: move liveness recalculation inside ir3_ra_shared
...
Similar to how ir3_spill does it. This will make it easier to optimize
this in the future. E.g., we only need to recalculate liveness when any
instruction were added.
Fixes: fa22b0901a ("ir3/ra: Add specialized shared register RA/spilling")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
7a5b198a44
ir3: index instructions before fixing up merge sets after spilling
...
ir3_force_merge (through merge_merge_sets) expects instructions to be
indexed. However, the instructions created during spilling would not be
automatically indexed at this point.
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
018d0ab805
ir3: make indexing instructions optional in ir3_merge_regs
...
While fixing up merge sets after spilling, we need to index before
calling ir3_merge_regs so it would be a waste to index again.
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
17b155fede
ir3: expose instruction indexing helper for merge sets
...
We will need it to fix up merge sets after spilling.
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
1bc3b819e6
ir3: don't remove collects early while spilling
...
It might happen that a collect that cannot be coalesced with one of its
sources while spilling can be coalesced with it afterwards. In this
case, we might be able to remove it in remove_src_early during spilling
but not afterwards (because it may have a child interval). If this
happens, we could end up with a register pressure that is higher after
spilling than before. Prevent this by never removing collects early
while spilling.
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
eaec57ab6b
ir3: don't remove intervals for non-killed tex prefetch sources
...
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
70e10babea
ir3: correctly set wrmask for reload.macro
...
We used to set it MASK(elems) which would break when not all elements
are contiguous (which could happen for tex instructions after dce).
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
37c929ce5d
ir3: set offset on splits created while spilling
...
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
af6f82b954
ir3: fix handling of early clobbers in calc_min_limit_pressure
...
Early clobbers should always add to the register pressure since they
cannot overlap with sources. handle_instr in ir3_spill.c handles this
properly but calc_min_limit_pressure did not.
Fixes: 2ff5826f09 ("ir3/ra: Add IR3_REG_EARLY_CLOBBER")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
023c7351f2
ir3: fix crash in try_evict_regs with src reg
...
try_evict_regs might end up calling check_dst_overlap which only works
for dst regs. Make sure this doesn't happen for src regs.
Fixes: 34803d15ab ("ir3/ra: Add proper support for multiple destinations")
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
c24aad5867
ir3: set current instruction before all validation asserts
...
The first assert happened before setting the current instruction which
caused the error message to refer to the previous instruction.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
f57bee676f
ir3: debug print limit pressure and post-spill max pressure
...
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
eadabc2eab
ir3: print dst_offset of spill.macro
...
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
ac2a582fac
ir3: print intervals when dumping merge sets
...
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:23 +00:00
Job Noorman
0a0ac6a72f
ir3: print sharedness/halfness of merge set regs
...
This helps debugging issues when different types of registers end up in
the same merge set.
Signed-off-bype Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29497 >
2024-06-18 11:09:22 +00:00
Eric Engestrom
39f5bbf871
ci/vkd3d: drop redundant "vkd3d-proton execution: SUCCESS"
...
The `+ exit 0` on the next line says the same thing, and we no longer
use that string for grepping the status anyway.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:55 +00:00
Eric Engestrom
9a9204764a
ci/vkd3d: drop quiet wrapper
...
It could be useful for complex printf with embedded subshells, but here
it's just spammy, which is the opposite of what it claims to be for.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:55 +00:00
Eric Engestrom
b6633e5880
ci/vkd3d: drop the "clear results folder without deleting the folder" logic
...
I might be wrong about this one, but I don't see what it could be for.
We don't want to delete too much either, in case this script gets called
in the same job as another test suite.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:55 +00:00
Eric Engestrom
eddbadb0b1
ci/vkd3d: put then on the same line as the if to match the rest of the code style
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:55 +00:00
Eric Engestrom
57485f9a3d
ci/vkd3d: print URL to the vkd3d-proton.log file to make it easier to access
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:55 +00:00
Eric Engestrom
662b0ad3cd
ci/vkd3d: rename vkd3d test log file to end in .txt
...
That way GitLab allows reading it in the browser instead of forcing a download.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:55 +00:00
Eric Engestrom
6f6a13f5fc
ci/vkd3d: print a real error message when failing to get the list of failing tests
...
Instead of just `++ trap_err 1`.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:55 +00:00
Eric Engestrom
e266b6287e
ci/vkd3d: limit the vulkaninfo capture to the driverInfo line
...
This made for huge error messages when printing
`Found $(vulkaninfo), expected $MESA_VERSION`,
with the actual information lost in the flood.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:55 +00:00
Eric Engestrom
285ba60166
ci/vkd3d: group version check lines together
...
The comment clearly applies to the check, not the variable, but I'm
guessing stuff got added in between, so let's move the code and its
comment back together.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:55 +00:00
Eric Engestrom
bec7b417ca
ci/vkd3d: don't ignore errors
...
There was not even a matching `set -e` to restore the state afterwards,
so we just stopped caring about errors from that point forward.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:55 +00:00
Eric Engestrom
1c23b95aa4
ci/vkd3d: stop ignoring errors in a block where errors can't happen
...
The `if` will catch the exit code of what it calls (that's the whole point).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:54 +00:00
Eric Engestrom
b50c8217ef
ci/vkd3d: fix error message printing
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:54 +00:00
Eric Engestrom
7a1f28c1eb
ci/vkd3d: drop override of job artifacts
...
`.b2c-test` always exports all of `results/`, so having an override here
to only export one of the files in that folder and only `on_success` is
not very useful.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:54 +00:00
Eric Engestrom
4db58a04f9
ci/vkd3d: print a message when the expected failures file is missing
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:54 +00:00
Eric Engestrom
b1f82ce646
ci/vkd3d: deduplicate the diff between the expectation and the results
...
We're seeing weird errors where the results file has disappeared, so
let's start by combining the "is this right?" and "what's wrong?" logic
into one.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29749 >
2024-06-18 09:58:54 +00:00
Danylo Piliaiev
e602a7a392
freedreno/replay: Fix replaying without SET_IOVA
...
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29753 >
2024-06-18 09:46:19 +00:00
Danylo Piliaiev
7c07c44d57
freedreno/rddecompiler: Make possible to use original shader
...
Sometimes decompiled shader isn't easily compiled back into the
same binary, e.g. when some part of bitset is not decoded.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29753 >
2024-06-18 09:46:19 +00:00
Kenneth Graunke
9e750f00c3
intel/brw: Make opt_copy_propagation_defs clean up its own trash
...
Copy propagation often eliminates all uses of an instruction. If we
detect that we've done so, we can eliminate the instruction ourselves
rather than leaving it hanging until the next DCE pass.
This saves some CPU time as other passes don't see dead code.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Kenneth Graunke
2af84c2d49
intel/brw: Use the defs-based copy propagation along with the old one
...
The new def-based pass works better in many cases, and should be less
resource intensive. However, the limited visibility of the defs-based
pass due to many values not being SSA yet makes it unable to fully
replace the old pass. Try the new one, and if it can't make progress,
then try the old one. That way, things will mostly be handled by the
new pass, but everything that was being cleaned up still will be.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Kenneth Graunke
580e1c592d
intel/brw: Introduce a new SSA-based copy propagation pass
...
(Quite a few of the restrictions here are ported from the old pass.)
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Kenneth Graunke
9690bd369d
intel/brw: Delete old local common subexpression elimination pass
...
We no longer use this older pass, so there's no need to keep it.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Kenneth Graunke
8f09c58ddc
intel/brw: Switch to the new defs-based global CSE pass
...
While the limited visibility due to partial SSA is a downside to the new
pass, it has a huge number of advantages that make it worth switching
over even now. It's much more efficient, can eliminate redundant memory
loads across blocks, and doesn't generate loads of unnecessary copies
that other passes have to clean up. This means we also eliminate the
infighting between the old CSE, coalescing, and copy propagation passes.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Kenneth Graunke
234c45c929
intel/brw: Write a new global CSE pass that works on defs
...
This has a number of advantages compared to the pass I wrote years ago:
- It can easily perform either Global CSE or block-local CSE, without
needing to roll any dataflow analysis, thanks to SSA def analysis.
This global CSE is able to detect and coalesce memory loads across
blocks. Although it may increase spilling a little, the reduction
in memory loads seems to more than compensate.
- Because SSA guarantees that values are never written more than once,
the new CSE pass can directly reuse an existing value. The old pass
emitted copies at the point where it discovered a value because it
had no idea whether it'd be mutated later. This led it to generate
a ton of trash for copy propagation to clean up later, and also a
nasty fragility where CSE, register coalescing, and copy propagation
could all fight one another by generating and cleaning up copies,
leading to infinite optimization loops unless we were really careful.
Generating less trash improves our CPU efficiency.
- It uses hash tables like nir_instr_set and nir_opt_cse, instead of
linearly walking lists and comparing each element. This is much more
CPU efficient.
- It doesn't use liveness analysis, which is one of the most expensive
analysis passes that we have. Def analysis is cheaper.
In addition to CSE'ing SSA values, we continue to handle flag writes,
as this is a huge source of CSE'able values. These remain block local.
However, we can simply track the last flag write, rather than creating
entire sets of instruction entries like the old pass. Much simpler.
The only real downside to this pass is that, because the backend is
currently only partially SSA, it has limited visibility and isn't able
to see all values. However, the results appear to be good enough that
the new pass can effectively replace the old pass in almost all cases.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Kenneth Graunke
2b30b3bbd4
intel/brw: Print defs in dump_instructions
...
Like NIR, we print SSA defs as %1, %2, and so on. The number here is
the VGRF number. VGRFs that don't correspond to a SSA def remain
printed as vgrf1, vgrf2, and so on.
This makes it much easier to see what values are SSA and which aren't.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Caio Oliveira
08da7edc0e
intel/brw: Track the number of uses of each def in def_analysis
...
Even without a full use list, simply tracking the number of uses will
let us tell "this is the only use of the def" or "we've just replaced
all uses of a def". It's inexpensive to calculate and will be useful.
(rebased by Kenneth Graunke)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Kenneth Graunke
0d144821f0
intel/brw: Add a new def analysis pass
...
This introduces a new analysis pass that opportunistically looks for
VGRFs which happen to satisfy the SSA definition properties.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Kenneth Graunke
ad9e414aa9
intel/brw: Skip LOAD_PAYLOADs after every texture instruction if possible
...
This avoids generating a bunch of trash we have to clean up later.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Kenneth Graunke
84219892ad
intel/brw: Make gl_SubgroupInvocation lane index loading SSA
...
Our code to initialize gl_SubgroupInvocation uses multiple instructions
some of which are partial writes. This makes it difficult to analyze
expressions involving gl_SubgroupInvocation, which appear very
frequently in compute shaders.
To make this easier, we add a new virtual opcode which initializes
a full VGRF to the value of gl_SubgroupInvocation. (We also expand
it to UD for SIMD8 so there are not partial write issues.) We then
lower it to the original code later on in compilation, after we've
done the bulk of our optimizations.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Kenneth Graunke
344d4ee9f0
intel/brw: Make VEC() perform a single write to its destination.
...
This gathers a number of sources into a contiguous vector register,
typically using LOAD_PAYLOAD. However, it uses MOV for a single source.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28666 >
2024-06-18 09:02:25 +00:00
Timothy Arceri
7df492923a
glsl: drop dump-builder support from standalone compiler
...
The support is incomplete and largely untested, but more importantly
glsl ir is depreciated at this point. This feature was added to support
building additional passes but that shouldn't ever be needed from here
on.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29469 >
2024-06-18 08:12:45 +00:00
Iago Toral Quiroga
02f33b7d92
broadcom/compiler: initialize payload_conflict for all initial nodes
...
Fixes: cb83f25b39 ('broadcom/compiler: don't assign payload registers to spilling setup temps')
cc: mesa-stable
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29759 >
2024-06-18 07:19:07 +00:00
Juan A. Suarez Romero
7dcba7e873
v3dv/ci: fix spurious line in expected
...
Fixes: c8c9d1a802 ("v3dv/ci: add expected failure")
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29763 >
2024-06-18 08:48:38 +02:00
Mike Blumenkrantz
95828d8901
mesa/st: fix zombie shader handling for non-current programs
...
for drivers that don't support PIPE_CAP_SHAREABLE_SHADERS,
the zombie shader mechanism is used, storing shaders to delete after
the next flush
the zombie mechanism also calls bind_*_state(pipe, NULL) during deletion,
however, which breaks drivers in the following scenario:
* create_all_shaders(pipe_A)
* bind_vs(pipe_A, vs_A)
* bind_fs(pipe_A, fs_A)
* draw(pipe_A)
* makeCurrent(pipe_B)
* delete_vs(pipe_B, vs_B)
* vs_B must only be deleted on pipe_A
* zombie_shader_add(pipe_A, vs_B)
* makeCurrent(pipe_A)
* free_zombie_shaders(pipe_A)
* bind_vs(pipe_A, NULL)
* delete_vs(pipe_A, vs_B)
* draw(pipe_A)
* boom
the problem being that bind_vs(pipe_A, NULL) was called when deleting
vs_B, but it was actually vs_A which was bound
to solve this, just flag the shader state for updating and let st figure it out
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11122
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29680 >
2024-06-18 03:51:05 +00:00
Marek Olšák
75777f1dc8
nir: add a NIR option flag nir_io_prefer_scalar_fs_inputs
...
It's a NIR option because passing flags from radeonsi to the GLSL linker is
complicated.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29406 >
2024-06-17 23:48:35 +00:00
Marek Olšák
3622092614
glsl/linker: vectorize lowered IO
...
Since we scalarize all IO for nir_opt_varyings, we should re-vectorize it.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29406 >
2024-06-17 23:48:35 +00:00
Marek Olšák
2514999c9c
nir: add nir_opt_vectorize_io, vectorizing lowered IO
...
Since nir_opt_varyings requires scalar IO and thus all drivers have to
scalarize it, this gives the option to re-vectorize IO after that.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29406 >
2024-06-17 23:48:35 +00:00
Marek Olšák
0058989357
nir/lower_io_to_scalar: don't create output stores that have no effect
...
This fixes NIR validation errors that happen with certain shaders.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29406 >
2024-06-17 23:48:35 +00:00
Marek Olšák
756b4f907e
nir/lower_io_to_scalar: add new_component temporary variable
...
The next commit will use it. No change in behavior.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29406 >
2024-06-17 23:48:35 +00:00
Francisco Jerez
06e4e088a3
intel/brw/xe2+: Use active-thread-only barriers available since Xe2+.
...
These allow avoiding dead-locks in non-compliant applications that
execute barriers under non-uniform control flow. They're not expected
to have any major disadvantage so let's enable them unconditionally.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29562 >
2024-06-17 16:19:18 -07:00
Francisco Jerez
8e61d32db8
iris,anv/xe2+: Use pipelined variant of 3DSTATE_DRAWING_RECTANGLE.
...
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29562 >
2024-06-17 16:19:17 -07:00
Francisco Jerez
576c9e3af2
iris,anv/xe2+: Set tessellation redistribution regions per patch to recommended values.
...
See also HSDES#14015504893 regarding the region-based tessellation
redistribution feature which allows fine-tuning the number of regions
per patch. This sets it to the recommended value, since region-based
redistribution is enabled by default.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29562 >
2024-06-17 16:19:17 -07:00
Francisco Jerez
2aa4652a68
iris,anv/xe2+: Enable the DX10/OGL border mode for YCrCb as per Wa_14014226147.
...
Hardware defaults to DX9 YCrCb border color mode instead of the
behavior expected for DX10/OGL.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29562 >
2024-06-17 16:19:17 -07:00
Juan A. Suarez Romero
c8c9d1a802
v3dv/ci: add expected failure
...
This was caused when enabling VK_KHR_maintenance5 extension, but the
problem is fixed using a new Vulkan Loader.
Fixes: a589901328 ("v3dv: expose VK_KHR_maintenance5")
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29756 >
2024-06-17 22:03:01 +00:00
Alyssa Rosenzweig
ae3af4c73a
nir: document restriction on load_smem_amd constantness
...
This came up while reviewing
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29398 ... Possibly
this intrinsic should be renamed to load_smem_constant_amd for consistency with
load_global_constant. But if we're not going to convey constantness in the
intrinsic name, let's at least document the restriction, because NIR's optimizer
relies on it.
(I didn't inspect every call site, but it looks like load_smem_amd is just used
for descriptor loads so there's no bug to fix.)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29743 >
2024-06-17 21:17:09 +00:00
Alyssa Rosenzweig
15257b65c6
treewide: use nir_metadata_control_flow
...
Via Coccinelle patch:
@@
@@
-nir_metadata_block_index | nir_metadata_dominance
+nir_metadata_control_flow
...plus some manual fixups for call sites missed by coccinelle.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Acked-by: Karol Herbst <kherbst@redhat.com >
Acked-by: Juan A. Suarez Romero <jasuarez@igalia.com > [broadcom]
Acked-by: Vasily Khoruzhick <anarsoul@gmail.com > [lima]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29745 >
2024-06-17 16:28:14 -04:00
Alyssa Rosenzweig
90b6dba772
nir: add nir_metadata_control_flow
...
Most passes want to preserve this specific combination of metadata, so let's add
an alias for the combination. The alias communicates that the control flow graph
is preserved, rather than a particular statement about e.g. dominance
preservation.
You don't need to understand dominance to write a simple
nir_shader_instructions_pass. And since you were going to cargo cult the
metadata anyway, this way you'll cargo cult a version you're more likely to
understand.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Karol Herbst <kherbst@redhat.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29745 >
2024-06-17 16:28:11 -04:00
Daniel Schürmann
cfa5beeeab
spirv: workaround for tests assuming that OpKill terminates invocations or loops
...
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617 >
2024-06-17 19:37:16 +00:00
Daniel Schürmann
7af16e9f1e
nir/shader_info: remove uses_demote
...
This flag is mostly redundant with uses_discard and was only
introduced to implement demote with LLVM when it didn't have
that intrinsic.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617 >
2024-06-17 19:37:16 +00:00
Daniel Schürmann
e52e8dd02e
zink: pass zink_screen to nir_to_spirv().
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617 >
2024-06-17 19:37:16 +00:00
Daniel Schürmann
9b1a748b5e
nir: remove nir_intrinsic_discard
...
The semantics of discard differ between GLSL and HLSL and
their various implementations. Subsequently, numerous application
bugs occurred and SPV_EXT_demote_to_helper_invocation was written
in order to clarify the behavior. In NIR, we now have 3 different
intrinsics for 2 things, and while demote and terminate have clear
semantics, discard still doesn't and can mean either of the two.
This patch entirely removes nir_intrinsic_discard and
nir_intrinsic_discard_if and replaces all occurences either with
nir_intrinsic_terminate{_if} or nir_intrinsic_demote{_if} in the
case that the NIR option 'discard_is_demote' is being set.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617 >
2024-06-17 19:37:16 +00:00
Faith Ekstrand
4a84725ebb
intel/blorp: Set nir_shader::options up-front before building
...
Previously, we left it NULL until later in the compile. However, some
builder helpers are starting to check the options and they blow up when
options == NULL.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617 >
2024-06-17 19:37:15 +00:00
Daniel Schürmann
073e69c7dc
nir/opt_peephole_select: handle nir_terminate{_if}
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617 >
2024-06-17 19:37:15 +00:00
Daniel Schürmann
f3d8bd18dd
nir: introduce discard_is_demote compiler option
...
This new option indicates that the driver emits the same
code for nir_intrinsic_discard and nir_intrinsic_demote.
Otherwise, it is assumed that discard is implemented as
terminate.
spirv_to_nir uses this option in order to directly emit
nir_demote in case of OpKill.
RADV GFX11:
Totals from 3965 (4.99% of 79439) affected shaders:
MaxWaves: 119418 -> 119424 (+0.01%); split: +0.03%, -0.03%
Instrs: 1608753 -> 1620830 (+0.75%); split: -0.18%, +0.93%
CodeSize: 8759152 -> 8785152 (+0.30%); split: -0.18%, +0.48%
VGPRs: 152292 -> 149232 (-2.01%); split: -2.37%, +0.36%
Latency: 9162314 -> 10033923 (+9.51%); split: -0.46%, +9.97%
InvThroughput: 1491656 -> 1493408 (+0.12%); split: -0.10%, +0.22%
VClause: 21424 -> 21452 (+0.13%); split: -0.31%, +0.44%
SClause: 53598 -> 55871 (+4.24%); split: -2.15%, +6.39%
Copies: 90553 -> 90462 (-0.10%); split: -2.91%, +2.81%
Branches: 16283 -> 16311 (+0.17%)
PreSGPRs: 113993 -> 113254 (-0.65%); split: -1.84%, +1.19%
PreVGPRs: 110951 -> 108914 (-1.84%); split: -2.08%, +0.24%
VALU: 963192 -> 963167 (-0.00%); split: -0.01%, +0.01%
SALU: 87926 -> 90795 (+3.26%); split: -2.92%, +6.18%
VMEM: 25937 -> 25936 (-0.00%)
SMEM: 110012 -> 109799 (-0.19%); split: -0.20%, +0.01%
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617 >
2024-06-17 19:37:15 +00:00
Daniel Schürmann
d5821bdf7d
radv: emit discard as demote by default
...
Also removes radv_lower_discard_to_demote debug option.
Totals from 1506 (1.90% of 79439) affected shaders: (GFX11)
MaxWaves: 46432 -> 46448 (+0.03%)
Instrs: 664515 -> 667914 (+0.51%); split: -0.15%, +0.67%
CodeSize: 3569656 -> 3583440 (+0.39%); split: -0.12%, +0.51%
VGPRs: 50100 -> 49680 (-0.84%); split: -0.96%, +0.12%
Latency: 4221359 -> 4217875 (-0.08%); split: -0.67%, +0.59%
InvThroughput: 628809 -> 625565 (-0.52%); split: -0.53%, +0.02%
VClause: 9948 -> 9965 (+0.17%); split: -0.36%, +0.53%
SClause: 19656 -> 19695 (+0.20%); split: -0.77%, +0.97%
Copies: 32113 -> 33513 (+4.36%); split: -1.59%, +5.95%
Branches: 8406 -> 8378 (-0.33%)
PreSGPRs: 42328 -> 42555 (+0.54%); split: -0.39%, +0.93%
PreVGPRs: 38451 -> 38203 (-0.64%); split: -0.78%, +0.14%
VALU: 390770 -> 390208 (-0.14%); split: -0.16%, +0.02%
SALU: 43318 -> 46374 (+7.05%); split: -0.08%, +7.14%
VMEM: 15052 -> 15051 (-0.01%)
SMEM: 37225 -> 37215 (-0.03%); split: -0.03%, +0.01%
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617 >
2024-06-17 19:37:15 +00:00
Daniel Schürmann
e0ab1ed14e
spirv: make gl_HelperInvocation volatile if demote is being used
...
Non-volatile gl_HelperInvocation after demote is undefined.
In order to avoid application bugs, make it volatile if we use demote.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617 >
2024-06-17 19:37:15 +00:00
Erik Faye-Lund
9336190868
panvk: move macro-definition to header
...
This define is used in panvk_physical_device.c as well, so it needs to
be visible there.
Fixes: ac34183ec3 ("panvk: Move the VkPhysicalDevice logic to panvk_physical_device.{c,h}")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29751 >
2024-06-17 19:15:10 +00:00
Pavel Ondračka
4b040577d5
r300: vectorization tweaks for R300/R400
...
Vectorization can make the constant layout worse and increase
the constant register usage. The worst scenario is vectorization
lowered indirect register access, where we access i-th element
and later we access i-1 or i+1 (most notably glamor and gsk shaders).
In this case we already added constants 1..n where n is the array
size, however we can reuse them unless the lowered ladder gets
vectorized later.
Thus prevent vectorization of the specific patterns from lowered
indirect access.
This is quite a heavy hammer, we could in theory estimate how many
slots will the current ubos and constants need and only disable
vectorization when we are close to the limit. However, this would
likely need a global shader analysis each time r300_should_vectorize_inst
is called, which we want to avoid.
So for now just don't vectorize anything that loads constants if we
already have lot of uniforms.
This is the final missing piece to make glamor work on R400.
shader-db R420:
total instructions in shared programs: 107288 -> 107290 (<.01%)
instructions in affected programs: 236 -> 238 (0.85%)
helped: 2
HURT: 3
total temps in shared programs: 17730 -> 17726 (-0.02%)
temps in affected programs: 41 -> 37 (-9.76%)
helped: 4
HURT: 0
total cycles in shared programs: 163251 -> 163251 (0.00%)
cycles in affected programs: 478 -> 478 (0.00%)
helped: 2
HURT: 3
GAINED: 7 (2 glamor and 5 GSK shaders)
RV370 is quite similar instruction/temp-wise, but we don't gain any
shader there, because they are all over the 64 instructions limit...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10787
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Reviewed-by: Filip Gawin <filip.gawin@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29734 >
2024-06-17 18:16:02 +00:00
Pavel Ondračka
5f68ba505b
r300: missing whitespace in shader stats
...
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29734 >
2024-06-17 18:16:02 +00:00
Amol Surati
4bf330471b
nine: avoid using post-compacted indices with state expecting pre-compacted ones
...
The commit 973e6f3b implemented compaction of the stream-number space. The
functions `update_vertex_elements(_sw)` began using the post-compacted
stream-numbers/indices when maintaining the `stream_usage_mask` and
when reading from the arrays `vtxstride` and `stream_freq`.
But, the `stream_instancedata_mask`, with which the `stream_usage_mask`
is compared/bitwise-anded, maintains bits for the pre-compacted indices.
Additionally, the information within the arrays is stored using the
pre-compacted indices.
The functions have a disagreement, regarding the type (pre- vs post-
compacted) of indices, with the rest of the relevant source. This change
removes the disagreement by having them use pre-compacted indices when
maintaining the `stream_usage_mask` and when reading from the arrays.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11283
Fixes: 973e6f3b ("gallium: remove start_slot parameter from pipe_context::set_vertex_buffers")
Reviewed-by: Axel Davy <davyaxel0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29704 >
2024-06-17 17:53:43 +00:00
Michel Dänzer
0bee32a4c3
wsi: Call drmSyncobjQuery only once for all images
...
Reduces system call overhead.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29199 >
2024-06-17 16:06:46 +00:00
Alyssa Rosenzweig
574c5c70de
nir/lower_robust_access: handle MSAA images
...
We need to check the sample too. fixes on Honeykrisp with MSAA storage images:
dEQP-VK.robustness.robustness2.bind.notemplate.r32i.dontunroll.nonvolatile.storage_image.fmt_qual.img.samples_4.2d_array.comp
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29741 >
2024-06-17 15:28:15 +00:00
Samuel Pitoiset
bd59478d2f
radv: implement streamout on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29676 >
2024-06-17 14:46:36 +00:00
Samuel Pitoiset
aa9dfcad50
radv/nir: lower nir_intrinsic_load_xfb_state_address_gfx12_amd
...
This intrinsic returns a 64-bit address that points to the streamout
state buffer.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29676 >
2024-06-17 14:46:36 +00:00
Samuel Pitoiset
a9b8320031
radv: declare a new user SGPR for the streamout state buffer on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29676 >
2024-06-17 14:46:36 +00:00
Samuel Pitoiset
0e62c728eb
ac/surface: add NBC view support on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29676 >
2024-06-17 14:46:36 +00:00
Samuel Pitoiset
ef6deb35ef
radv: update configuring WALK_ALIGN8_PRIM_FITS_ST on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29676 >
2024-06-17 14:46:36 +00:00
Job Noorman
64cde7da62
ir3: set wrmask for spilled splits in shared RA
...
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29719 >
2024-06-17 14:11:46 +00:00
Job Noorman
a4ec62b497
ir3: remove spilled splits in shared RA
...
They get replaced by a newly created split and leaving the original one
around runs into validation errors.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29719 >
2024-06-17 14:11:46 +00:00
Samuel Pitoiset
07eb970d67
radv: always save/restore all shader objects for internal operations
...
If the application binds graphics shaders and that RADV performs an
internal operation with a compute pipeline, no shader objects would be
restored because binding the internal compute pipeline resets the ESO
state.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29678 >
2024-06-17 13:46:50 +00:00
Eric Engestrom
a9fff07c2e
asahi/lib: generate git_sha1.h for agx_device.c
...
`src/asahi/lib/agx_device.c` includes `git_sha1.h` since
0be124b77e ("asahi: Deserialize libagx when opening device"),
although it only started making use of it once ece3896d5b
("asahi: add broken bits of unstable Linux UAPI") was merged.
Regardless, without this meson change, this leads to a race condition in
builds, where `git_sha1.h` might be built (if ever) after `agx_device.c`.
Fixes: 0be124b77e ("asahi: Deserialize libagx when opening device")
Fixes: ece3896d5b ("asahi: add broken bits of unstable Linux UAPI")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29750 >
2024-06-17 12:33:19 +00:00
Samuel Pitoiset
10bd300b68
radv: allow VK_NV_device_generated_commands_{compute} with LLVM
...
DGC was disabled for LLVM due to 5/8 components SSBO stores but they
were not expected to work and this has been changed since a977a51a21
("radv: stop using 5/8 component SSBO stores"). No strong reason to
not enable it.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29714 >
2024-06-17 12:02:10 +00:00
Valentine Burley
d9af1633a9
tu: Remove declaration of unused update_stencil_mask function
...
The update_stencil_mask function was removed when moving to the common
Vulkan dynamic state handling.
Fixes: 97da0a7734 ("tu: Rewrite to use common Vulkan dynamic state")
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29658 >
2024-06-17 11:37:32 +00:00
Valentine Burley
5e9cb32c10
tu: Handle the new sync2 flags
...
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8277
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29658 >
2024-06-17 11:37:32 +00:00
Eric Engestrom
4f1c56bf46
nvk+zink/ci: add flakes seen over the last few nightlies
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29748 >
2024-06-17 11:18:05 +00:00
Eric Engestrom
2fe297e6d6
nvk+zink/ci: mark spec@ext_image_dma_buf_import@ext_image_dma_buf_import-refcount-multithread as fixed
...
Fixed by a commit in the 2498d673...39fdd2ae range, likely one of the
commits in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 ,
but it doesn't really matter, we're just happy it's fixed :P
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29748 >
2024-06-17 11:18:05 +00:00
Mary Guillemard
395b506912
panvk: Advertise VK_KHR_maintenance3
...
We already support everything needed for maintenace3.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29410 >
2024-06-17 10:53:12 +00:00
Mary Guillemard
9a2a301f69
panvk: Reorder extensions by name
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29410 >
2024-06-17 10:53:12 +00:00
Mary Guillemard
e580b0f597
panvk: Advertise VK_KHR_device_group and VK_KHR_device_group_creation
...
VK_KHR_buffer_device_address was enabled but actually depends on
VK_KHR_device_group.
This trivialy implement device group extensions like other drivers.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29410 >
2024-06-17 10:53:12 +00:00
Mary Guillemard
3dbe46f610
docs: Update features.txt to add panvk for BDA extensions
...
Was missing from previous MRs.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29410 >
2024-06-17 10:53:12 +00:00
Karol Herbst
05b9705ae0
broadcom/compiler: rework scratch lowering
...
Let's rely on nir_lower_mem_access_bit_sizes doing all the heavy work, so
v3d_nir_lower_scratch can be cleaned up quite a lot.
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711 >
2024-06-17 10:07:56 +00:00
Karol Herbst
75196e86f1
broadcom/compiler: only handle load_uniform explicitly in v3d_nir_lower_load_store_bitsize
...
Also use nir_get_io_offset_src_number while at it.
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711 >
2024-06-17 10:07:56 +00:00
Karol Herbst
a2eff2b9f9
broadcom/compiler: convert 2x32 global operations to scalar variants
...
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711 >
2024-06-17 10:07:56 +00:00
Karol Herbst
9827cfe49e
broadcom/compiler: use nir_lower_mem_access_bit_sizes for memory lowering
...
It does everything we need and allows us to remove a lot of code. It also
helps with supporting vec8/16 and unaligned load/stores for OpenCL.
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711 >
2024-06-17 10:07:56 +00:00
Karol Herbst
66b58e8a0e
broadcom/compiler: support global load/store intrinsics
...
It's the same as global_2x32 as there the 2nd component is ignored anyway
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711 >
2024-06-17 10:07:56 +00:00
Karol Herbst
358e09f9ff
nir: add global_atomic_2x32 variants to nir_get_io_offset_src_number
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711 >
2024-06-17 10:07:56 +00:00
Karol Herbst
d2d966a3c2
nir_lower_mem_access_bit_sizes: support unaligned store_scratch
...
This can be trivially be added as it doesn't even need atomics.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711 >
2024-06-17 10:07:56 +00:00
Iago Toral Quiroga
a589901328
v3dv: expose VK_KHR_maintenance5
...
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29669 >
2024-06-17 08:15:27 +00:00
Iago Toral Quiroga
212062f2aa
v3dv: fix handling of pipeline flags when pipeline init fails
...
We compute and store pipeline flags in the pipeline object but
we may need to access flags even in the case where the pipeline
init fails.
Fixes: 3f3c83a6b7 ('v3dv: handle VkPipelineCreateFlags2CreateInfoKHR')
Fixes: dEQP-VK.pipeline.monolithic.creation_cache_control.graphics_pipelines.batch_pipelines_early_return_maintenance5
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29669 >
2024-06-17 08:15:27 +00:00
Mary Guillemard
547da6e38f
panvk: Enable pipeline library in CI for Mali-G52
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:51 +00:00
Mary Guillemard
3119546508
panvk: Advertise VK_KHR_pipeline_library and VK_EXT_graphics_pipeline_library
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:51 +00:00
Mary Guillemard
f164819698
panvk: Advertise VK_EXT_shader_module_identifier
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:51 +00:00
Mary Guillemard
78605a4ac4
panvk: Advertise VK_EXT_pipeline_creation_cache_control and VK_EXT_pipeline_creation_feedback
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:51 +00:00
Mary Guillemard
8ea2931ed1
panvk: Generate proper device and driver UUIDs
...
This follows what NVK, ANV and V3DV does.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:51 +00:00
Mary Guillemard
886c054691
panvk: Advertise VK_KHR_pipeline_executable_properties
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:51 +00:00
Mary Guillemard
4dbc0feae2
panvk: Implement executable IR reporting
...
This report the NIR shader before sent to the back-end compiler and the
resulting assembly.
Caching when requested is disallowed for now.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:51 +00:00
Mary Guillemard
7d582cc665
panfrost: Add pan_shader_disassemble
...
Will be used for pipeline executable IR on panvk.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:51 +00:00
Mary Guillemard
81f4e93f60
bi: Move bi_disasm definitions to their own header
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
3622a1bb0d
midgard: Make disassembler take a const void*
...
All access are readonly.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
c309933987
bi: Make disassembler take a const void*
...
All access are readonly.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
1c2f2955ac
pan/va: Ensure no clash with other defs in disassembler
...
This move most of the disassembler detail to disasm.py.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
7a4b3dcbd1
panvk: Remove panvk_pipeline
...
This removes panvk_pipeline and shader_create interface to switch
entirely to vk_shader.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
563823c9ca
panvk: Implement vk_shader
...
Next commit will remove panvk_pipeline entirely.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
50925b4947
panvk: Move preprocess logic out of shader_create
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
2a88c30619
panvk: Move NIR lower logic out of shader_create
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
f3639f7900
panvk: Move compile logic out of shader_create
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
67341a8126
panvk: Link shaders at draw time
...
This moves the linking step at draw time so we can later support
VK_EXT_shader_module.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
a984419a2d
panvk: Kill panvk_pipeline_shader and use panvk_shader directly
...
Copy the shader pointers and linking data attached to the pipeline
at bind time.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
05020699b9
panvk: Move the linking bits to panvk_shader
...
Needed if we support late linking which is required for
VK_EXT_shader_object.
We also stop pretending the linking is generic and reflect the fact we
always link vertex with fragment shaders.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
9c39185e20
panvk: Upload render state in panvk_shader
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
384ebea7ac
panvk: Upload copy tables in panvk_shader
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
d54592ec72
panvk: Upload shader in panvk_shader
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
b186220566
panvk: Keep panvk_shader alive in panvk_pipeline_shader
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
a0f49428fd
panvk: Remove dynarray from panvk_shader
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Mary Guillemard
e8633b3b49
panvk: Remove panvk_lower_blend
...
It is unused, get ride of it.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Boris Brezillon
2eaa437574
panvk: Use memory pools for internal GPU data attached to vulkan objects
...
Some panvk objects need to allocate GPU memory but don't have Pool
objects to get this memory from. Use device-wide mempools with
.owns_bos=false, such that small allocations don't have to pay the 4k
granularity price of private BO allocations.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Boris Brezillon
906fb2371a
panvk: Prepare panvk_mempool for shared device memory pools
...
If we want to be able to allocate private device memory for small
objects and don't have a Pool to allocate from, we'd rather provide
some sort of device-wide heap to avoid the memory overhead incurred
by page-size BO granularity.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Boris Brezillon
7b017b1c97
panvk: Store private BOs in lists instead of dynarrays
...
This we don't get memory allocations in scopes where failures are not
supposed to happen, and this will also simplify things when we get to
implement memory pools at the device level.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Boris Brezillon
0e5140f88c
panvk: Refcount private BOs
...
Will be needed if we want device memory pools.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29161 >
2024-06-17 07:31:50 +00:00
Samuel Pitoiset
8fcfadf28e
radv: store a pointer to the logical device in dgc_cmdbuf
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29725 >
2024-06-17 06:45:44 +00:00
Samuel Pitoiset
7fb401c7b2
radv: add a helper to load the pipeline VA for DGC
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29725 >
2024-06-17 06:45:44 +00:00
Samuel Pitoiset
57206eb888
radv: remove redundant nir_builder param in some DGC helpers
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29725 >
2024-06-17 06:45:44 +00:00
Samuel Pitoiset
7ff6f492d5
radv: add new macros for emiting packets in DGC
...
This is way cleaner.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29725 >
2024-06-17 06:45:44 +00:00
Samuel Pitoiset
85d79376d8
radv: do not use nir_pkt3() when the packet len is constant with DGC
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29725 >
2024-06-17 06:45:44 +00:00
Samuel Pitoiset
dd66e43bd9
radv: remove dynamic uniform/storage buffers support with DGC
...
vkd3d-proton is the only user of NV DGC and it doesn't need that.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29726 >
2024-06-17 06:13:57 +00:00
Alyssa Rosenzweig
fda97d6d0a
asahi: be more clever about GS side effects
...
We need a heuristic for handling GS side effects in the least surprising way
possible. Upgrade our previous heuristic to a better one, moving more side
effects into the prepass from the rast shader. This is technically an optimization but mitigates VDM timeouts in absurd Vulkan CTS cases.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29742 >
2024-06-16 12:15:22 -04:00
Alyssa Rosenzweig
dcdad4fecb
asahi: implement robustness2 for msaa image stores
...
Same trick as for robustness2 buffer images.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29742 >
2024-06-16 12:15:22 -04:00
Alyssa Rosenzweig
9a29d08f9f
asahi: fix vbo clamp with stride=0
...
dEQP-VK.pipeline.monolithic.bind_buffers_2.single.stride_0_4_offset_0_0.count_1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29742 >
2024-06-16 12:15:22 -04:00
Alyssa Rosenzweig
38c36990b6
asahi: implement rba2 semantics for vbo
...
Different APIs have different robustness requirements for VBOs. Add a knob to
select the desired robustness so we can implement rba2 in honeykrisp.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29742 >
2024-06-16 12:15:22 -04:00
Alyssa Rosenzweig
d035976c00
libagx: generalize query copies
...
for xfb in hk
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29742 >
2024-06-16 12:15:22 -04:00
Alyssa Rosenzweig
4a71456a1a
libagx: make index buffer fetch robust
...
for hk
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29742 >
2024-06-16 12:15:22 -04:00
Alyssa Rosenzweig
87f9fe3c58
libagx: fix uint8_t definition
...
yikes!
this was causing cascading fails with hk.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29742 >
2024-06-16 10:10:33 -04:00
Alyssa Rosenzweig
88cdcd8f72
agx: fix fmin/fmax with (-0, 0) pair
...
We need additional lowering to handle negzero properly. fixes float_controls2
fails but strictly the bug was already present!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29742 >
2024-06-16 10:10:33 -04:00
Alyssa Rosenzweig
ab21d179d6
agx: fix 64-bit bcsel ingestion
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29742 >
2024-06-16 10:01:46 -04:00
Jianxun Zhang
09277c7ea6
blorp: Fix offset when ambiguating MCS buffer (xe2)
...
The MCS region to ambiguate needs to shift 4KB from its
starting address. The first 4KB is reserved for hardware.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28919 >
2024-06-15 14:57:59 +00:00
Jianxun Zhang
8aa0373a50
blorp: Scaledown rectangle of MSAA fast clear (xe2)
...
The scaledown rectangle of MSAA fast clear on Xe2 is 8 times
in X and 2 in Y dimension of previous platforms.
Absorb refactoring change suggested by
Nanley Chery <nanley.g.chery@intel.com >
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28919 >
2024-06-15 14:57:59 +00:00
Jianxun Zhang
4b64b04963
isl: Add AUX MCS encoding into aux modes (xe2)
...
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28919 >
2024-06-15 14:57:59 +00:00
Jianxun Zhang
765fb3e158
isl: Add a heading 4KB to MCS surface (xe2)
...
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28919 >
2024-06-15 14:57:59 +00:00
Faith Ekstrand
f39520e02c
nvk: Dirty cbufs in CmdPushDescriptorSetWithTemplate2KHR
...
Fixes: 091a945b57 ("nvk: Be much more conservative about rebinding cbufs")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29737 >
2024-06-15 06:14:28 +00:00
Faith Ekstrand
81e6c612f1
nvk: Use NVK_VK_GRAPHICS_STAGE_BITS in dirty_cbufs_for_descriprots()
...
This is a no-op change for now but it'll be a problem when we hook up
task/mesh if we don't consider those to be graphics stages.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29737 >
2024-06-15 06:14:28 +00:00
Faith Ekstrand
faaf33556e
nouveau: Fix a race in nouveau_ws_bo_destroy()
...
It's possible if nouveau_ws_bo_destroy() races with
nouveau_ws_bo_from_dma_buf() for the BO to be found in the cache and
referenced between dropping the final reference and actually invoking
GEM_CLOSE. This would result in us having a closed BO somewhere in our
cache.
Fixes: c370260a8f ("nouveau/winsys: Add dma-buf import support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29737 >
2024-06-15 06:14:28 +00:00
Faith Ekstrand
7e3d157bee
nak,nir: Drop r2ur_nv in favor of as_uniform
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29737 >
2024-06-15 06:14:27 +00:00
Dave Airlie
f7434d7576
nouveau/nvc0: increase overallocation on shader bo to 2K
...
I've been seeing a bunch of read page faults at the end of the
shader allocation, nvk uses a full page at the end to overallocate
so align with that and see if it goes away.
ahulliet and skeggsb both said 2k was used.
Cc: mesa-stable
Reviewed-by: Arthur Huillet <ahuillet@nvidia.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29722 >
2024-06-15 01:12:39 +00:00
Lionel Landwerlin
13dc2a28ce
intel/fs: fix lower_simd_width for MOV_INDIRECT
...
MOV_INDIRECT picks one lane from the src[0] and moves it to all lanes
in the destination. Even if we split the instruction, src[0] should
remain identical.
Noticed this while trying to use this instruction in SIMD32. All
current use cases are limited to SIMD8 shaders (or SIMD16 on Xe2). Or
maybe in SIMD32 but with a uniform src[0]. That's we think we've never
seen the issue so far.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Francisco Jerez <currojerez@riseup.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28036 >
2024-06-14 22:21:26 +00:00
Mike Blumenkrantz
2bb35bf489
lavapipe: fix mesh+task binding with shader objects
...
if mesh and task shaders are bound separately, and if they have different
workgroup sizes, the setting of workgroup size will be broken if
set during shader bind
this must be deferred to draw time to pull the correct values
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29733 >
2024-06-14 22:07:14 +00:00
Boris Brezillon
7bea6f8612
panvk: Overhaul the Bifrost descriptor set implementation
...
Turns out the current approach makes implementation of advanced features
like update-after-bind or shader modules quite challenging. Instead of
adding hacks all over the place to support these features, let's use
the Valhall descriptor model.
Each shader now gets its own descriptor tables, which are fed by pilot
shaders copying the descriptors used by the shader from the descriptor
sets currently bound the command buffer.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Co-developped-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29654 >
2024-06-14 20:52:21 +00:00
Mary Guillemard
ad86990056
panvk: Fix shader destruction when vk_shader_module_to_nir fail
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29654 >
2024-06-14 20:52:21 +00:00
Boris Brezillon
84e452b456
panvk: Extend Valhall descriptor set implementation to support Bifrost
...
The Bifrost descriptor model is a dead end for advanced features like
shader modules, pipeline libraries or update-after-bind. Let's prepare
the Valhall implementation so we can re-use it on Bifrost.
The implementation itself was pretty generic already. We just need to
map image descriptors to AttributeBuffer instead Texture descriptors,
and the Buffer object had no equivalent on Bifrost, so we just use a
software-defined panvk_ssbo_addr object containing the SSBO address and
size, and make sure this object is padded to 32-bytes.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29654 >
2024-06-14 20:52:21 +00:00
Rebecca Mckeever
1b467b9d5c
panvk: Add Valhall Descriptor{Set,Pool} implementations
...
Valhall descriptor model was loosely based on the Vulkan descriptor
model. Provide a new implementation for the VkDescriptor{Set,Pool}
objects that matches this new model.
Co-developed-by: Mary Guillemard <mary.guillemard@collabora.com >
Co-developed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29654 >
2024-06-14 20:52:21 +00:00
Rebecca Mckeever
73518dc169
panvk: Add Valhall DescriptorSetLayout implementation
...
Valhall descriptor model was loosely based on the Vulkan descriptor
model. Provide a new implementation for the VkDescriptorSetLayout
object that matches this new model.
Co-developed-by: Mary Guillemard <mary.guillemard@collabora.com >
Co-developed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29654 >
2024-06-14 20:52:21 +00:00
Boris Brezillon
3796bfbb76
panvk: Prepare things for compiling valhall source files
...
Valhall (v9/v10) will be added progressively. In order to allow that,
we need to extend the panvk_per_arch() macro for v9/v10 and tweak
meson.build so it does include valhall sources without compiling
common per-arch files.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29654 >
2024-06-14 20:52:21 +00:00
Boris Brezillon
6a4e1235ac
panvk: Prepare for Valhall buffer views
...
The only difference here is the fact image attributes are gone, and
texture descriptors are used instead. We rework the code so it uses
panfrost_new_texture() to emit the texture/plane descriptors, which
leaves us with one less thing to worry about.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29654 >
2024-06-14 20:52:21 +00:00
Boris Brezillon
970d382117
panvk: Prepare for Valhall image views
...
There's no image attribute on Valhall, storage images are passed as
texture descriptors.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29654 >
2024-06-14 20:52:20 +00:00
Danylo Piliaiev
1aab0fc4f5
tu: Add attachments' UBWC info to renderpass tracepoint
...
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29707 >
2024-06-14 20:18:32 +00:00
Danylo Piliaiev
0aa0c065df
util/u_trace: Add support for fixed-length string params in tracepoints
...
The argument would look like:
Arg(type='str', var='ubwc', c_format='%s', length_arg='12', copy_func='strncpy')
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29707 >
2024-06-14 20:18:32 +00:00
Danylo Piliaiev
aba7140b38
tu: Add LRZ disable reason to renderpass tracepoint
...
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29707 >
2024-06-14 20:18:32 +00:00
Marek Olšák
3b4133acf8
radeonsi/ci: update gfx10.3 failures
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29705 >
2024-06-14 19:54:28 +00:00
Marek Olšák
4e455c198f
Revert "radeonsi: fix initialization of occlusion query buffers for disabled RBs"
...
This reverts commit dab4295cd5 .
The commit causes hangs on Navi21 with 3 SEs.
Fixes: dab4295cd5 - radeonsi: fix initialization of occlusion query buffers for disabled RBs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29705 >
2024-06-14 19:54:28 +00:00
Valentine Burley
25e2fa3667
mr-label-maker: Separate freedreno and turnip labels
...
List all subdirectories in src/freedreno so that Turnip MRs don't get
labelled as freedreno too, just as turnip.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29660 >
2024-06-14 18:47:15 +00:00
Valentine Burley
3a543bae87
mr-label-maker: Update nouveau directories
...
Update the yml to reflect the changes in the nouveau folder structure.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29660 >
2024-06-14 18:47:15 +00:00
Job Noorman
57ea689273
ir3: optimize SSBO offset shifts for nir_opt_offsets
...
The shifted offsets generated by ir3_nir_lower_io_offsets are not always
optimized well by nir_opt_offsets. If the offset to be shifted has the
form "iadd constant, foo" don't shift the result but transform it to
"iadd constant>>shift, (ushr foo, shift)". This ensures nir_opt_offsets
(which only looks for iadds) can fold the constant into the immediate
offset.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28664 >
2024-06-14 17:12:59 +00:00
Job Noorman
e37093b160
ir3: use nir_opt_offsets for SSBO accesses
...
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28664 >
2024-06-14 17:12:59 +00:00
Job Noorman
0c1bb92690
nir/opt_offsets: add load/store_ssbo_ir3
...
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28664 >
2024-06-14 17:12:59 +00:00
Job Noorman
609a56d170
nir/opt_offsets: add option to allow offset wrapping
...
On some ISAs (e.g., ir3) the offset calculation wraps the same way as
normal unsigned addition so potentially wrapping operations do not have
to be ignored.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28664 >
2024-06-14 17:12:59 +00:00
Job Noorman
518c93768b
nir/opt_offsets: add callback for max base offset
...
To support cases where different instructions may be used for the same
storage type. For example, to load from an SSBO on ir3, either ldib (max
offset 127) or isam.v (max offset 255) can be used.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28664 >
2024-06-14 17:12:59 +00:00
Job Noorman
d3f8de791d
ir3: lower SSBO access imm offsets
...
Add the BASE index to the load/store_ssbo_ir3 intrinsic to store an
immediate offset. This offset is encoded in the corresponding fields of
isam.v/ldib.b/stib.b.
One extra optimization is implemented: whenever the regular offset is
also a constant, the total offset (regular plus immediate) is aligned
down to a multiple of the max immediate offset and this is used as the
regular offset while the immediate is set to the remainder. This ensures
that the register used for the regular offset can often be reused among
multiple contiguous accesses.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28664 >
2024-06-14 17:12:59 +00:00
Job Noorman
759a4679a3
ir3: add encoding of ldib/stib offsets
...
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28664 >
2024-06-14 17:12:59 +00:00
Job Noorman
c4fe247e62
ir3: use isam.v for multi-component SSBO loads
...
Since a7xx, isam.v can be used to perform multi-component SSBO loads.
Use this whenever possible to prevent excessive scalarization. isam.v
also uses only a single coordinate (as opposed to a 2-dimensional
coordinate for isam) so this reduces register pressure as well.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28664 >
2024-06-14 17:12:59 +00:00
Job Noorman
455ebcccfb
ir3: add encoding for isam.v
...
isam.v is a version of isam that can load multiple components from IBOs.
It uses some bits that are used for different purposes in other tex
instructions:
- bit 50 (.v): .s elsewhere
- bit 53 (indicates whether an immediate offset is used): .p elsewhere
- bit 18 (.1d when not set, has to be set for .v): 0 elsewhere
For this reason, the bitset hierarchy for cat5 had to be reordered a
bit.
The immediate offset is encoded as an extra (immed) source register and
an instruction flag (to be able to make the distinction between offset
zero and no offset, although this might not be useful).
This also adds a flag for the .1d field. Since this bit is active-low,
this flag has inverted semantics: setting it will make .1d inactive.
Note that some existing disassembler tests for isam had to be updated
because the bit is never set and this is now disassembled as .1d. This
matches the blob's disassembler.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28664 >
2024-06-14 17:12:59 +00:00
Job Noorman
c2dbc4a00a
ir3: simplify cat5 parsing
...
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28664 >
2024-06-14 17:12:59 +00:00
Eric Engestrom
ba55fa3163
glx: fix build -D glx-direct=false
...
Fixes: 014bbae4bf ("glx: pass implicit load param through allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29732 >
2024-06-14 16:24:33 +00:00
Alyssa Rosenzweig
ece3896d5b
asahi: add broken bits of unstable Linux UAPI
...
Rebasing around this patch has been a significant burden for development.
Staging patches to asahi/mesa helps somewhat but 1. it's still really
frustrating to have this much divergence with upstream, and 2. ideally we
wouldn't have to do that.
The kernel upstreaming is stalled for various reasons. This patch adds
compile-only code to speak the unstable Linux UAPI for the SOLE purpose of
reducing my rebase pain... NOT to actually work.
It is NOT for users OR distro maintainers. asahi will refuse to probe on
upstream Mesa to protect against regressions. The uapi is NOT STABLE and
upstream Mesa CANNOT be used with it. Attempting to bypass this WILL give you a
broken system.
This patch employs several layers of deterrents against system-breaking
enablement. With a lot of warning text at the relevant sites. Hopefully that is
good enough to prevent people from breaking systems. And if people brazenly
ignore all of the above ... they get to pick up the pieces.
You have been warned.
---
There is significant prior art for Mesa including downstream kernel uapi
supports in-tree:
* powervr (downstream android driver)
* turnip (downstream kgsl android driver)
* asahi ... ironically (prop macOS kernel driver)
* maybe vc4?
Linux is only special because of distros shipping tagged Mesa releases. The
several layers of guards here guarantee that no tagged Mesa release would
possibly probe even on an asahi downstream kernel. A distro would need a
significant scary patch to make it probe. If/when it breaks, that's on them
and they pick up the pieces.
I make a stability guarantee ONLY for Fedora Asahi Remix -- where we push
packages for both a downstream kernel and Mesa in tandem, while we patiently
wait for upstreaming -- and that is *it*. It will be a nice future when this all
works upstream, but unfortunately we're not there yet.
Acked by Dave [1] and Sima [2]
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29620#note_2444189
[2] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29620#note_2445155
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Co-developed-by: Asahi Lina <lina@asahilina.net >
Signed-off-by: Asahi Lina <lina@asahilina.net >
Co-developed-by: Sergio Lopez <slp@sinrega.org >
Signed-off-by: Sergio Lopez <slp@sinrega.org >
Co-developed-by: i509VCB <git@i509.me >
Signed-off-by: i509VCB <git@i509.me >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29620 >
2024-06-14 15:44:30 +00:00
Alyssa Rosenzweig
08984e68fb
gallium: remove ability to probe asahi
...
The asahi uapi is unstable. Do not attempt to probe on it.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29620 >
2024-06-14 15:44:30 +00:00
Corentin Noël
8c5c93acba
wsi: Make sure to return a valid wayland id string
...
The result of asprintf was previously ignored, handle the case of failure by
not returning undefined content.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29724 >
2024-06-14 15:18:56 +00:00
Daniel Schürmann
b7982152ff
aco: use aco::monotonic_allocator for IDSet
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29713 >
2024-06-14 14:32:35 +00:00
Daniel Schürmann
97fd5d3f33
aco: make aco::monotonic_buffer_resource declaration visible for aco::IDSet
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29713 >
2024-06-14 14:32:35 +00:00
Daniel Schürmann
95967c2ca0
aco/reindex_ssa: replace live_var parameter with boolean
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29713 >
2024-06-14 14:32:35 +00:00
Daniel Schürmann
a497d105e3
aco: move live var information into struct Program
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29713 >
2024-06-14 14:32:35 +00:00
Daniel Schürmann
2322ab427e
aco/scheduler: remove unused register_demand parameter
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29713 >
2024-06-14 14:32:35 +00:00
Karol Herbst
169dc86e74
gallium: properly type fields of pipe_resource.usage
...
This gets rid of most of the pointless bitfields and also moves away from
unsigned, which we really should stop using :)
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29720 >
2024-06-14 13:56:34 +00:00
Karol Herbst
40785d9a52
gallium: properly type pipe_resource.usage with the enum
...
This allows for a more strongly typed field on the Rust side.
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29720 >
2024-06-14 13:56:34 +00:00
Karol Herbst
f58247882a
gallium: reduce pipe_resource.usage to 4 bits
...
This works around a bindgen bug, but also moves the value into a single
byte as per the addition of compression_rate it spanned over two bytes.
Fixes: 5db7398672 ("gallium: add interface for fixed-rate surface/texture compression")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29720 >
2024-06-14 13:56:34 +00:00
Danylo Piliaiev
59937f62a6
ir3/a7xx: Fix FS consts corruption when other FS has zero constlen
...
Having zero consts in one FS may corrupt consts in follow up FSs,
on such GPUs blob never has zero consts in FS. The mechanism of
corruption is unknown.
Fixes geometry flickering in a number of games, including:
Baldur's Gate 3
Assasin's Creed Rogue
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29357 >
2024-06-14 13:27:01 +00:00
Danylo Piliaiev
98e3b1bc5f
freedreno/a7xx: Update TPL1_DBG_ECO_CNTL1 to fix UBWC corruption
...
Copying UBWC image via BLIT_OP_SCALE may be corrupted if previously
someone copied image with bit 18 set in TPL1_DBG_ECO_CNTL1.
Found by replaying blob's cmdstream on a740, but somehow this issue
doesn't happen on Android.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29358 >
2024-06-14 12:21:03 +00:00
Eric Engestrom
44e6850016
bin/ci: escape literal url in regex
...
Fixes: b24dd1fa1c ("ci: Fix parse GitLab pipeline url")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29718 >
2024-06-14 11:46:52 +00:00
Pierre-Eric Pelloux-Prayer
5c50e028d1
ac/sqtt: make VA helpers static
...
They're only used from ac_sqtt so don't expose them.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25397 >
2024-06-14 10:32:17 +02:00
Pierre-Eric Pelloux-Prayer
c44b20e8d6
radeonsi/sqtt: add AMD_THREAD_TRACE_INSTRUCTION_TIMING
...
To control if instruction timing should be enabled (on by default).
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25397 >
2024-06-14 10:32:10 +02:00
Pierre-Eric Pelloux-Prayer
365fda834e
radeonsi: use the common SQTT implementation
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25397 >
2024-06-14 10:32:04 +02:00
Sergi Blanch Torne
0c092dc5c4
ci: run_n_monitor, collect and summarize
...
The job duration is printed during the test progress. It can be collected and
summarized at the end of the process. It is interesting when doing a stress
test as one will have this information together at the end.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29419 >
2024-06-14 08:04:56 +00:00
Konstantin Seurer
5726ecae3e
khronos-update: Add ANDROID guards to vk_android_native_buffer.h
...
Avoids adding back the code after every header update.
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Acked-by: Yonggang Luo <luoyonggang@gmail.com >
Reviewed-by: Eric Engestrom <eric@engestrom.ch >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29621 >
2024-06-14 06:58:35 +00:00
Samuel Pitoiset
3f9fe2dbe1
radv: use BDA in the DGC prepare shader
...
Only for buffers that are managed by the application (ie. preprocess,
stream and sequence buffers). For future work.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29605 >
2024-06-14 06:35:18 +00:00
Samuel Pitoiset
730ba8322f
radv: fix incorrect buffer_list advance for multi-planar descriptors
...
If we have an array of multi-planar descriptors, buffer_list was
incorrectly incremented and this could have overwritten some BO entries.
In practice, this situation should be very rare because most of the
applications enable the global BO list.
Cc: mesa-stable
Closes : #10559
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28816 >
2024-06-14 06:14:30 +00:00
David Rosca
39fdd2aec0
radeonsi: Make si_compute_clear_image work with 422 subsampled formats
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29598 >
2024-06-14 03:19:24 +00:00
Qiang Yu
4a18809a56
radeonsi: add missing nir_intrinsic_bindless_image_descriptor_amd
...
Otherwise we get shader compilation error when imageSize().
Fixes: d4fdeaa820 ("radeonsi: replace llvm resource code with nir lower")
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29690 >
2024-06-14 02:52:52 +00:00
Qiang Yu
b1d0ecd00d
glsl: respect GL_EXT_shader_image_load_formatted when image is embedded in a struct
...
Fix compilation failure when image is embedded in struct when
GL_EXT_shader_image_load_formatted is enabled:
struct GpuPointShadow {
image2D RayTracedShadowMapImage;
};
layout(std140, binding = 2) uniform ShadowsUBO {
GpuPointShadow PointShadows[1];
} shadowsUBO;
Compile log:
error: image not qualified with `writeonly' must have a format layout qualifier
Fixes: 082d180a22 ("mesa, glsl: add support for EXT_shader_image_load_formatted")
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29693 >
2024-06-14 02:21:59 +00:00
Faith Ekstrand
8307fa95ec
nvk: Refactor build_cbuf_map()
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
636604ea5a
nvk: Only write draw parameters to cb0 when they change
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
9f7081b921
nvk: Use inline constant buffer updates for CB0
...
This is what the old GL driver did and appears to be what the blob does
as well. They should pipeline much better than full buffer re-binds
which appear to be causing stalling issues inside the GPU.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
f716bab6b7
nvk: Pass the queue to draw/dispatch_state_init()
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
b2d85ca36f
nvk: Use helper macros for accessing root descriptors
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
2423b0b295
nvk: Pass the base workgroup and global size to flush_compute_state()
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
7a0237bdcf
nvk: s/draw_idx/draw_index/g
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
20f21b1917
nvk: Use cbuf loads for variable pointers dynamic SSBO descriptors
...
We want everything that touches the root table to go through ldc path
and not to use global loads. This means that we need to do some
juggling to handle dynamic SSBO descriptors in the variable pointers
case.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
091a945b57
nvk: Be much more conservative about rebinding cbufs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
8b5835af31
nvk: Use bindless cbufs on Turing+
...
These are much faster than ld.global.constant. This takes The Witness
from 103 FPS to 130 FPS on my 4060 laptop GPU when run with
NVK_DEBUG=no_cbuf
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
248b22d158
nvk/descriptor_set_layout: Record which dynamic buffers are UBOs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
6e41f2a28d
nvk: Allow the cbuf optimization for VK_DESCRIPTOR_TYPE_MUTABLE_EXT
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
723e5cae59
nvk: Move the zero offset optimization to load_descriptor_for_idx_intrin()
...
Looking at binding_layout->desc_type is sketchy in the face of mutable
descriptors. It's safer for load_descriptor() to just return the
descriptor. load_descriptor_for_idx_intrin() knows about the
descriptor's actual shader usage and we can do the optimization there.
This isn't actually a bug fix. The optimization just didn't happen in
the presence of mutable descriptors.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
05e213f03e
nvk/lower_descriptors: Add a descriptor_type_is_ubo/ssbo() helper
...
This is a small behavioral change as we are no longer double-counting
inline uniform data loads when determining cbuf priority.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
903fb6f74a
nvk: Make nvk_min_cbuf_alignment() inline
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
cbe62813a1
nvk: Rename nvk_cmd_buffr_get_cbuf_descriptor()
...
This makes it clear that it returns an address, not a descriptor. That
distinction will matter soon.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
59303584e3
nvk: Align buffer descriptors
...
In theory, the app is supposed to do this for us but this gives us a bit
of protection against potential GPU faults.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
5685de8795
nvk: Split write_[dynamic_]buffer_desc into UBO and SSBO variants
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
6387ae7dfb
nvk: Split SSBO and UBO address formats
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
dc7b08c41a
nak: Implement nir_intrinsic_ldcx_nv
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
851b3ddd05
nak: Lower non-uniform ldcx_nv to global loads
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
e05cb967e7
nir: Add nir_foreach_block_in_cf_node_safe() iterators
...
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
7b5856ebe9
nak: Implement [un]pin_cx_handle_nv
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
12b79f814b
nak: Implement r2ur_nv
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:46 +00:00
Faith Ekstrand
dc99d9b2df
nvk,nak: Switch to nir_intrinsic_ldc_nv
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
b107240474
nir: Add some new _nv intrinsics
...
The ldc_nv and ldcx_nv intrinsics correspond to the index and bindless
forms of NVIDIA's LDC instruction, respectively. ldc_nv is pretty much
load_ubo without some of the unnecessary constant bits while ldcx_nv
takes a 64-bit bindless handle instead of an index. The other two give
us a little control over register allocation at the NIR level to ensure
that LDCX handles are placed in uniform registers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
ab84cf11c7
nak/copy_prop: Don't propagate bindless cbufs into non-uniform blocks
...
We can propagate within a non-uniform block just fine but not across
them because that might change live registers in unpredictable ways.
The real boundary here is that we can't propagate across an OpPin but
that's a lot harder to express.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
06fc2d018e
nak/legalize: Bindless cbufs must be pinned in non-uniform blocks
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
c8e25b45fb
nak/legalize: Allow pinned uniform vectors in non-uniform blocks
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
2279c2dd65
nak: Add OpPin and OpUnpin
...
These act as a vector OpCopy, except that copy-prop can't see through
them and the destination of OpPin gets pinned in the register file and
is unallowed to move. Of course, we have to be careful with these
because spilling can't spill them, either. If we have too many live
pinned values at the same time, spilling or RA may fail.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
718ef00ca4
nak/ra: Add a concept of pinned registers to RegAllocator
...
Unlike the pinned set in VecRegAllocator which exists for the duration
of an instruction, registers which are pinned in the main allocator are
pinned until the register is freed. The pinned set in VecRegAllocator
is initialized to a copy of the one in the main register allocator.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
049e7ce920
nak/ra: Rename PinnedRegAllocator to VecRegAllocator
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
b1dbe42343
nak/ra: Pull searching for unused/unpinned regs into a helper
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
5aab57e1b5
nak/ra: Handle bindless CBufs
...
This is done by adding a couple of helpers that we use throughout the RA
pass which abstract reading an SSA value from a source and writing a
register to that source.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
a8f8e441f5
nak/bitset: Add an iterator
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
82776f3882
nak/calc_instr_deps: Account for bindless CBufs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
0c0cb4b9e9
nak/dce: Account for bindless CBuf handles
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
40a5b83cb3
nak/sm70: Properly encode bindless cbufs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
d09d3f5246
nak/from_nir: Emit uniform instructions when !divergent
...
The really tricky case here is phis, which may have a uniform def even
though some of the srcs are non-uniform. This happens because of the
restriction elsewhere that requires UGPRs and UPreds to only ever be
written in uniform control-flow.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
3dfd92888a
nak: Add a UniformBuilder
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
ab8a4d1940
nak/from_nir: Clean up phi annotations
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
b013d54e4f
nak/lower_cf: Flag phis as convergent when possible
...
Because we go in and out of SSA, all the phis get re-created and the new
phis will default to divergent. This little pass attempts to prove as
many of the phis convergent as possible.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
06902bf52e
nak: Convert to LCSSA before divergence analysis
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
3528a0760c
nak/lower_cf: Track block divergence
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
0782087b8b
nak/lower_cf: Parent scopes are never NULL
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
29aad97279
nak/copy_prop: Don't propagate UBOs into uniform instructions
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
5406cfc7fe
nak/copy_prop: Rewrap a couple comments
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
81288bfad7
nak: Add a opt_uniform_instrs() pass
...
This both lowers away invalid uniform instructions and tries to optimize
things a bit so we don't end up with more R2UR than necessary.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
be91c321c9
nak/calc_instr_deps: Add latencies for uniform instructions
...
We know this is wrong. In many cases, they're faster than warp
instructions, sometimes with a latency as low as 2. However, there seem
to be a bunch of exceptions we don't understand and it's better to be
more concervative and have correct shaders.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
2d4e445099
nak/calc_instr_deps: Rewrite calc_delays() again
...
This time we take into account WaR and WaW dependencies and not just RaW
dependencies. The NVIDIA ISA is actually quite dynamic and the not
everything is nicely pipelined such that writes always happen at
consistent cycles. There are exact rules, of course, but we don't know
what those are so we need to make some worst-case assumptions.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
434af5b98b
nak/calc_instr_deps: Rename a couple variables
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
b47b8643b7
nak/legalize: Explicitly ignore OpPhiSrcs and OpPhiDsts
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
66a5608c11
nak/legalize: Uniform instructions can't have cbuf sources
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
7efc113bfe
nak/legalize: Copy uniform vectors in non-uniform control-flow
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
e4df28ade8
nak/legalize: Ensure all SSA values for a given ref are in the same file
...
It's possible for copy propagation to put a GPR and a UGPR into the same
vector source in an instruction. Hardware registers, however, are
either GPRs or UGPRs and never a mix.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
caf033b142
nak/legalize: Handle uniform sources in warp instructions
...
UGPRs in warp instructions are treated more like cbufs than GPRs.
You're only allowed to have one and it has to share space with the
possible cbuf or immediate. This means we need to treat them as a "not
a register" case for warp instructions but as a register for uniform
instructions.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
6ad49ca7d0
nak/legalize: Patch a RegFile through to copy helpers
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
c83593b07e
nak/legalize: Fix imad and ffma legalization on SM50
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
d9422a0897
nak/legalize: Be more precise about shfl and out
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
c1203ef5d1
nak/legalize: Drop some pointless plop3 logic
...
There is no restrictions on plop3 in terms of what sources can be
immediates vs. registers. Also, since we fold constants, all of this
code is dead.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
37b55ee34f
nak/legalize: Fold immediate sources before instructions
...
This way, if we insert a copy to move the immediate to a GPR, the
immediate we place in the copy is also folded.
Fixes: 85462f7455 ("nak: Legalize immediates with source modifiers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
00c6244ca2
nak/sm70: Implement a bunch of uniform ops on SM75+
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
7359c214b7
nak/sm70: Fix encoding of fadd/fsetp and friends with UGPRs
...
UGPRs are treated more like CBufs or immediates so we want to use the
default encoding in the UGPR case and only use the reg encoding in the
zero or GPR case.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
21b1eb8da7
nak/sm70: Add support for encoding uniform ALU ops
...
This requires a pretty significant rework of encode_alu_base(). In
particular, we can't know the register file that's going to be used
until we get into encode_alu_base() so ALUSrc::from_src() can't handle
Zero itself. Instead, we defer to a new ALUSrc::with_op_uniformity()
helper which does a postprocess step.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
8d2d2db6a0
nak/sm70: Rework ALU source encode helpers
...
We have a LOT of repeated bit numbers here and it helps if we can reduce
that a bit by making helpers for each thing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
1ae83135af
nak/sm70: Defer ALU src processing until encode_alu()
...
This makes encode_alu() take Option<&Src> and call ALUSrc::from_src()
itself. This is necessary for handling uniform ALU correctly as we
can't actually separate Reg from UReg without knowing what kind of ALU
op we are. While we're here, take an Option<&Dst> instead of
Option<Dst>.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
e244f7bb44
nak: Support uniform regs in lower_copy_swap()
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
130392e7ab
nak/ra: Never move uniform regs in non-uniform blocks
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
11670be661
nak/ra: Spill UGPRs and UPreds
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
1334cf8fca
nak/to_cssa: Resolve phi register file mismatches
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
1ed59706ea
nak: Add a concept of uniform blocks
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
d7f544365d
nak: Drop BasicBlock::new()
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
f0ec1873df
nak: Make SSARef::file() return Option<RegFile>
...
Once we start using UGPRs, it's possible to have a vector with a mix of
GPRs and UGPRs. This isn't actually allowed by the hardware but it's
possible as an intermediate state thanks to copy-propagation.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
d3e9373a90
nak/ra: Move an assert
...
We're allocating one register file at a time and our invariants are
per-file so we don't want to check the components assumption until we've
checked that it uses the active file.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
e0b051da39
nak: Clean up bindless cbuf handles
...
Take an SSARef instead of an SSAValue because they need to be vec2s.
Also, rename BindlessGPR to BindlessUGPR because that's what it is.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
35b445ba27
nak: Add OpR2UR
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
ebd16d1a56
nak: Add some helpers for uniform instructions and registers
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
0f70b14d9a
nak: Expose a BasicBlock::map_instrs() helper
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
fe2b06395e
nak: Get rid of OpINeg
...
Instead, do the same thing we do for float modifiers and use OpIAdd2 or
OpIAdd3. This makes for a little more work in copy-prop but the extra
opcode and lowering pass just isn't worth it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
a08f8c8804
nak: Only copy-prop neg into iadd2/3 if no carry is written
...
Fixes: 1b3382b861 ("nak: Add modifier propagation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
0a089b1b13
nak: BMov is always variable-latency
...
The barrier half is HW scoreboarded by the GPR isn't. When moving from
a GPR to a barrier, we still need a token for WaR hazards.
Fixes: 7cd9680554 ("nak: Add back OpBMov with better semantics")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
61be2c94dc
nak: Fix BasicBlock::phi*() for OpAnnotate
...
They assumed that phis would be at the start of the block which isn't
true if there are annotations in the way.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
944365802f
nak: Only convert the written portion of the buffer in NirInstrPrinter
...
Fixes: 02774be708 ("nak/sm50: add a memstream abstraction")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:45 +00:00
Faith Ekstrand
70b381e928
nak: Fix NAK_DEBUG=serial for warp barriers
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:44 +00:00
Faith Ekstrand
290cbf413c
nir/print: Improve divergence information
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591 >
2024-06-13 20:43:44 +00:00
Heinrich Fink
222fbcbfd5
zink: remove workaround of FB modifiers forcing present state
...
Remove a legacy workaround where presence of modifiers in framebuffer
state results in `needs_present` to be set without a good reason.
This prevents hitting an assertion for framebuffers that use DRM
modifiers, e.g. via GBM BO alloc -> EGLImage import -> GL FBO bind.
Co-authored-by: Daniel Stone <daniels@collabora.com >
Signed-off-by: Heinrich Fink <hfink@snap.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29715 >
2024-06-13 20:44:28 +02:00
Timothy Arceri
4c3d1a09de
nir: add additional opt_loop_merge() test of deref handling
...
Here we test the rematerialization of the deref produces valid nir
when both the deref and array index value are moved to the else branch of
the first terminator during the merge.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29686 >
2024-06-13 15:00:35 +00:00
Timothy Arceri
abb51f449d
nir: test opt_loop_merge_terminators() skips unhandled loops
...
This test makes sure the merge if pass skips loops with trainling phis
as those are not handled by the pass.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29686 >
2024-06-13 15:00:35 +00:00
Timothy Arceri
b26ef8f153
nir: correctly track current loop in nir_opt_loop()
...
We were not restoring an outer loop as the current loop after we had
finished processing a nested loop.
Fixes: 9995f336e6 ("nir: add merge loop terminators optimisation")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29686 >
2024-06-13 15:00:35 +00:00
Timothy Arceri
3d2a821198
nir: add test for opt_loop_merge_terminators
...
Makes sure we correctly rematerialize derefs moved during the merge.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29686 >
2024-06-13 15:00:35 +00:00
Rhys Perry
92af96e0b3
nir/opt_loop: fix formatting
...
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29686 >
2024-06-13 15:00:35 +00:00
Rhys Perry
cb51a93c1e
nir/opt_loop: rematerialize derefs instead of creating phis
...
Fixes NIR validation of hogwarts_legacy/00ac08423ad6e422.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Fixes: 9995f336e6 ("nir: add merge loop terminators optimisation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29686 >
2024-06-13 15:00:35 +00:00
Eric Engestrom
ea97397296
turnip+zink/ci: mark dEQP-GLES3.functional.fbo.depth.depth_test_clamp.* tests as fixed
...
Fixes: 96ed275a53 ("turnip: Implement VK_EXT_depth_clamp_zero_one")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29717 >
2024-06-13 14:20:18 +00:00
Sergi Blanch Torne
b24dd1fa1c
ci: Fix parse GitLab pipeline url
...
When the namespace have a dash, this method cannot recogniza properly
the fields in a url. Better to use a regular expression quickly defining
the fields. The exception raised, when the pattern is not recognized
would help more the handler.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29683 >
2024-06-13 14:10:57 +00:00
Eric Engestrom
f1fdba2432
lavapipe/ci: document regression while it's being worked on
...
Regression caused by !28998
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29712 >
2024-06-13 13:47:43 +00:00
Boris Brezillon
e2f13e7d41
panvk: Don't bail out when allocationSize is zero in AllocateMemory()
...
"
VUID-VkMemoryAllocateInfo-allocationSize-07897
If the parameters do not define an import or export operation,
allocationSize must be greater than 0
"
That means allocationSize can be zero if we're importing, so we need
to proceed with the import instead of bailing out.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29670 >
2024-06-13 14:48:40 +02:00
Mary Guillemard
58e6c8f6c8
pan/lib, panvk: Ensure data_size is on 64 bits
...
It was previously possible to overflow the data_size calculation (for
example with width=4096, height=4096, array_size=256 and any format)
This was then causing GetImageMemoryRequirements2 to return a size of 0.
Fix "dEQP-VK.pipeline.*.render_to_image.core.2d_array.huge.width_height_layers.r8g8b8a8_unorm" failures.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29670 >
2024-06-13 14:48:32 +02:00
Boris Brezillon
c184059005
panvk: Fix Cube/2DArray/3D img -> buf copies
...
Not that I really care about fixing copies now that vk_meta_copy is on
its way, but it fixes OOB accesses causing new crashes after the
panvk_mempool changes.
Fixes: f73ae1a6b5 ("panvk: Implement vkCmdCopyImageToBuffer()")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29670 >
2024-06-13 14:48:26 +02:00
Boris Brezillon
368d30befc
pan/bi: Fix dynamic indexing of push constants
...
Base offset of the push constant access shouldn't be taken into
account when selecting the push constant words to load. We should
instead assume the first word in the range is the base of the
dynamic indexing, which also simplifies the code.
Fixes: d53e848936 ("pan/bi: Lower load_push_constant with dynamic indexing")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29670 >
2024-06-13 14:48:18 +02:00
Boris Brezillon
87f89e4dec
pan/bi: Make sure global loads/stores don't exceed 16 bytes
...
This is the granularity of global loads/stores. Since all other type
of memory accesses have the same or even smaller constraints, we don't
even bother testing the intrinsic type.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29670 >
2024-06-13 14:48:09 +02:00
Boris Brezillon
bf8e17d5bb
panvk/ci: Flag exact_sampling.*.edge_right test as fails
...
d91d2c275e ("panfrost: change default rounding mode for samplers")
changed the default coordinate rounding mode to nearest-even, which is
what we should use in Vulkan. But it turns out the CTS picks a value
that's too close to pixel edge on right_edge tests, which causes a
precision loss on coordinate rounding and leads to an off-by-one
on these tests.
Flag those as failing until the CTS is fixed to take subpixel precision
into account when selecting the pixel coordinate offset.
See https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/5168 .
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29670 >
2024-06-13 14:48:02 +02:00
Boris Brezillon
bf8652b8f0
panvk: Fix formatting around OpaqueCaptureAddress implementation
...
Make clang-format happy, again.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29670 >
2024-06-13 14:47:53 +02:00
Lionel Landwerlin
86813c60a4
mi-builder: add read/write memory fencing support on Gfx20+
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
3b88a77b45
genxml: add MI_MEM_FENCE for Gfx20
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
5b4278ccd8
anv: use new mi-builder write check API to avoid stalls
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
59f11ef774
anv: set query mi-builder mocs only once
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
4f50cc12b9
anv: use default mocs for memory bits only touched by CS
...
Since we don't need to share that data with other fixed functions.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
c343cfc8b1
anv: move more MI_SDI to mi_builder
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
d056f36fab
anv: use the new relocated write mi-builder api
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
3e4f6def87
anv: centralize mi_builder setup
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
243ced4eb2
mi-builder: add a write check parameter
...
All the MI_SDI currently have forced write checks (meaning the command
streamer will stall until completion) on Gfx12.0+.
Now on Gfx12.0/12.5, the read commands have implicit waits on previous
writes (BSpec ). So if we're only dealing with CS writes & reads, we
don't need forced write checks.
In the few cases where CS is writing data for other bits of HW, we
need the forced write checks. This change adds an API that will let
the driver decide when to enable forced write checks.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
a623760f82
mi-builder: add relocated register/memory writes
...
When you want to write a value to a register or memory but you don't
know just yet that value when you emit the command.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
775db77baf
mi-builder: add missing write completion check
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
8ecc2ff56d
mi-builder: make instruction pointer manipulation more obvious
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
634c7b097b
mi-builder: c++ warning fix
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Lionel Landwerlin
eef1a5b607
mi-builder: rename relocated api
...
It wasn't clear what this was doing.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571 >
2024-06-13 11:04:31 +00:00
Samuel Pitoiset
fa634503ce
radv: emit SPI_GS_THROTTLE_CNTL1 when the attr ring is emitted
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29640 >
2024-06-13 10:24:11 +00:00
Samuel Pitoiset
028d573d37
radv: do not set registers set by CLEAR_STATE in the preamble on GFX10-11.5
...
Based on RadeonSI 7baeb54c2a ("radeonsi: don't set registers set by
CLEAR_STATE in the preamble for gfx10-11").
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29640 >
2024-06-13 10:24:11 +00:00
Samuel Pitoiset
a95d7e46b6
radv: update VGT_TESS_DISTRIBUTION.ACCUM_ISOLINE value
...
Based on PAL/RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29640 >
2024-06-13 10:24:11 +00:00
Eric Engestrom
1ee158df14
lavapipe/ci: update trace checksum following nir change
...
The change looks reasonable to me:
https://mesa.pages.freedesktop.org/-/mesa/-/jobs/59729004/artifacts/results/summary/results/trace@vk-lvp@unigine@sanctuary-d3d9.trace-dxgi.html
And that commit was already updating another trace hash so let's just assume this is all expected.
Fixes: 9995f336e6 ("nir: add merge loop terminators optimisation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29710 >
2024-06-13 10:01:51 +00:00
Daniel Schürmann
677c9d9e93
aco/assembler: fix GFX67 MTBUF opcode encoding
...
Fixes: 56ac6f26e0 ('aco/assembler: slightly refactor MTBUF assembly for more readability')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29708 >
2024-06-13 09:18:05 +00:00
Daniel Stone
30fd78a7e7
venus/ci: Temporarily disable jobs
...
There are too many failures. The job can be re-enabled when these have
been fixed (e.g. with skips) and the new lower fraction has been
stress-tested.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29709 >
2024-06-13 09:58:02 +01:00
Daniel Stone
78f52e59be
venus/ci: Significantly reduce CTS fraction
...
The jobs are just way too slow, regularly clocking in at over 20min and
being the long pole, especially when combined with failures.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29709 >
2024-06-13 09:57:26 +01:00
Daniel Stone
f2866fe971
venus/ci: Fix timeout
...
Nothing should be running with unbounded timeouts; unfortunately
venus-lavapipe does and is bouncing off them.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29709 >
2024-06-13 09:56:25 +01:00
Lionel Landwerlin
49d2d25e24
anv: make device initialization more asynchronous
...
With this change, the engine initialization batches are build and
submitted at vkCreateDevice() but the function doesn't wait for them
to complete. Instead we wait at vkDestroyDevice() or whenever another
submission happens on the queue, we check whether the initialization
batch has completed (without waiting) and free it if completed.
Seems to be about 25% reduction time of vkCreateDevice()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28975 >
2024-06-13 08:29:25 +00:00
Lionel Landwerlin
729c0b54b6
anv: use reserved array pool for legacy custom border colors
...
The array pool does a single allocation and then splits it out. The
downside is that the pool is not lockless, but for border colors it
likely doesn't matter much as there is a max border colors for 4k.
Seems to be a 30% time reduction for vkCreateDevice()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28975 >
2024-06-13 08:29:25 +00:00
Lionel Landwerlin
7da5b1caef
anv: move trtt submissions over to the anv_async_submit
...
We can remove a bunch of TRTT specific code from the backends as well
as manual submission tracking.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28975 >
2024-06-13 08:29:25 +00:00
Lionel Landwerlin
1adafbddbd
anv: rework utrace submission
...
We want to make this more generic so that it can be reused for device
initialization as well as TRTT submissions.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28975 >
2024-06-13 08:29:25 +00:00
Lionel Landwerlin
dd19e4240e
anv: reuse setup_execbuf_fence_params for utrace submissions
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28975 >
2024-06-13 08:29:25 +00:00
Lionel Landwerlin
8c7e1052a3
anv: simplify TRTT initialization
...
Drop usage of pthread mutex so initialization never fails.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28975 >
2024-06-13 08:29:25 +00:00
David Rosca
b754ad8f15
radv/video: Add missing VCN 3.0.2 to decoder init switch
...
Fixes video decode on Steam Deck.
Fixes: d599391ac9 ("radv/video: use vcn ip version in more places.")
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29688 >
2024-06-13 07:45:40 +00:00
Iván Briano
51f410f621
vulkan/runtime: pColorAttachmentInputIndices is allowed to be NULL
...
The Vulkan spec says:
"If pColorAttachmentInputIndices is NULL, it is equivalent to setting
each element to its index within the array."
Fix updated dEQP-VK.dynamic_rendering.primary_cmd_buff.local_read.*.
v2: Fix it correctly (Samuel)
Fixes: 03490ec019 ("vulkan/runtime: rework VK_KHR_dynamic_rendering_local_read state tracking")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29703 >
2024-06-13 07:13:50 +00:00
Louis-Francis Ratté-Boulianne
2498d67382
mesa: implement EXT_EGL_image_storage_compression extension
...
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:06 +00:00
Louis-Francis Ratté-Boulianne
e34ce71792
mesa: implement EXT_texture_storage_compression extension
...
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:06 +00:00
Louis-Francis Ratté-Boulianne
f81e3c7e5d
mesa/st: add compression parameter to st_texture_create
...
Allow allocation of a fixed-rate compressed resource
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:06 +00:00
Louis-Francis Ratté-Boulianne
bc134ade0b
mapi: add EXT_texture_storage_compression extension
...
This extension enables applications to opt-in to fixed-rate
compression for immutable textures.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:06 +00:00
Daniel Stone
a33bd78a54
gbm: Support fixed-rate compression allocation
...
Add the fixed-rate compression ratios exposed by GL and Vulkan to the
flags for gbm_bo and gbm_surface creation, and intersect these with the
list of supplied modifiers to add another filter.
Although gbm_surface could support this by the EGLSurface flags in
EGL_EXT_surface_compression, gbm_bo cannot: it allocates a buffer first
and then imports it into the consuming API post-hoc, after the modifier
is already (must be) known. It seems more important to keep the
gbm_surface and gbm_bo APIs in sync, so keep the responsibility for
filtering on the GBM side.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:06 +00:00
Louis-Francis Ratté-Boulianne
ea8977618f
egl/dri2: add support for EGL_EXT_surface_compression
...
Use the new DRI interface hooks to implement
eglQuerySupportedCompressionRatesEXT and the new
EGL_SURFACE_COMPRESSION_EXT attribute when creating a window
surface.
Only wayland support for now.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:06 +00:00
Louis-Francis Ratté-Boulianne
a6d099bcad
st/dri2: add support for fixed-rate compression interface
...
Needed for EGL_EXT_surface_compression
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:06 +00:00
Louis-Francis Ratté-Boulianne
6f852cb6ed
egl: wire up EGL_EXT_surface_compression extension
...
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:06 +00:00
Louis-Francis Ratté-Boulianne
f5d85365a7
egl/wayland: factor out common part of DRI image creation
...
Both paths are pretty much the same no matter if we are using the
old format protocol or the dmabuf_feedback protocol.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:06 +00:00
Louis-Francis Ratté-Boulianne
5db7398672
gallium: add interface for fixed-rate surface/texture compression
...
Add methods needed to implement EGL_EXT_surface_compression and
GL_EXT_texture_storage_compression.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:06 +00:00
Boris Brezillon
c8bf321bf8
egl: Use gbm_bo_create_with_modifiers2() when the surface has non-zero flags
...
We need to pass the flags around when creating a BO for a surface that
has explicit flags set.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:05 +00:00
Louis-Francis Ratté-Boulianne
d1c22c678c
dri_interface: add interface for EGL_EXT_surface_compression
...
This adds two new methods for the image extension (version 22):
- Query the supported compression bitrates for a given format
- Query the modifiers associated with a given format and bitrate
The interface user can then use createImageWithModifiers to
actually allocate the fixed-rate compressed image. When the default
bitrate is requested, one can query the image for the
__DRI_IMAGE_ATTRIB_COMPRESSION_RATE attribute to determine the
compression rate that was actually used.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109 >
2024-06-12 21:20:05 +00:00
Sviatoslav Peleshko
5ca51156e2
intel/elk: Actually retype integer sources of sampler message payload
...
According to PRMs:
"All parameters are of type IEEE_Float, except those in the The ld*,
resinfo, and the offu, offv of the gather4_po[_c] instruction message
types, which are of type signed integer."
Currently, we load parameters with the correct types, but use them as send
sources with the default float type, which may confuse passes downstream.
Fix this by actually storing the retyped sources.
Cc: mesa-stable
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29581 >
2024-06-12 18:59:17 +00:00
Sviatoslav Peleshko
2358c997f3
intel/brw: Actually retype integer sources of sampler message payload
...
According to PRMs:
"All parameters are of type IEEE_Float, except those in the The ld*,
resinfo, and the offu, offv of the gather4_po[_c] instruction message
types, which are of type signed integer."
Currently, we load parameters with the correct types, but use them as send
sources with the default float type, which may confuse passes downstream.
Fix this by actually storing the retyped sources.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11118
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29581 >
2024-06-12 18:59:17 +00:00
Christian Gmeiner
59218cdf07
gallium: Add vkms entrypoint
...
Makes it possible to use Virtual Kernel Mode-Setting (VKMS) in combination
with a render-only GPU. Is quite helpful to test the GPU when no kms driver
is ready.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29042 >
2024-06-12 17:35:26 +00:00
Philipp Zabel
5aadea47fa
etnaviv: update headers from rnndb
...
Update to etna_viv commit a2ee3de27b38.
This extends the VIVS_NFE_GENERIC_ATTRIB_CONFIG0_STREAM field to 4 bits,
to fix vertex shaders with 9 or more ttribute streams.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29694 >
2024-06-12 16:34:30 +00:00
Sil Vilerino
eee0b9b0e8
d3d12: Add missing case for CQP in d3d12_video_encoder_disable_rc_qualitylevels
...
Fixes: 58ca4cee9e ("d3d12: Video Encode - Fix inputs for older OS support query cap")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29697 >
2024-06-12 15:45:36 +00:00
Danylo Piliaiev
96ed275a53
turnip: Implement VK_EXT_depth_clamp_zero_one
...
For A6XX it's a no-op, but A7XX+ doesn't clamp to [0,1] with disabled
depth clamp, to support VK_EXT_depth_clamp_zero_one we have to always
enable clamp and manually set depth range to [0,1] when rs->depth_clamp_enable
is false.
Passes:
dEQP-VK.depth.*
dEQP-GLES3.functional.fbo.depth.depth_test_clamp.* (zink)
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29387 >
2024-06-12 12:58:32 +00:00
Valentine Burley
47bbaf000d
tu: Handle all dependencies of CmdWaitEvents2
...
The spec describes pDependencyInfos as an array with eventCount elements.
Addresses: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10580
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29630 >
2024-06-12 12:28:44 +00:00
Valentine Burley
a6a0730bd5
tu: Move event related related code to tu_event.cc/h
...
Match the structure of NVK and RADV. Pull all event related code from
tu_device.cc/h and tu_cmd_buffer.cc/h into one location.
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29630 >
2024-06-12 12:28:44 +00:00
Iago Toral Quiroga
14b0cb6b9f
v3dv: add more checks for device loss
...
VK_KHR_maintenance5 adds additional guarantees for functions that
can return VK_ERROR_DEVICE_LOSS to return this error if the device
was previously lost.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29668 >
2024-06-12 12:09:00 +00:00
Daniel Schürmann
56ac6f26e0
aco/assembler: slightly refactor MTBUF assembly for more readability
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29692 >
2024-06-12 11:41:58 +00:00
Daniel Schürmann
14f4906e53
aco/assembler: fix MTBUF opcode encoding on GFX11
...
We have accidentally set the tfe bit for some opcodes.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29692 >
2024-06-12 11:41:58 +00:00
Christian Gmeiner
8a4e530f9d
ci: uprev mold to 2.32.0
...
Also update tag list in build-mold.sh.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: David Heidelberg <david@ixit.cz >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29641 >
2024-06-12 11:01:28 +00:00
Corentin Noël
11812ae2aa
venus/ci: add more recently found flakes
...
Found in https://gitlab.freedesktop.org/mesa/mesa/-/jobs/59745506
Signed-off-by: Corentin Noël <corentin.noel@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29681 >
2024-06-12 10:27:48 +00:00
Lionel Landwerlin
99f92dd6d3
anv: ensure completion of surface state copies before secondaries
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29671 >
2024-06-12 10:06:05 +00:00
Lionel Landwerlin
1851629407
anv: limit aux invalidations to primary command buffers
...
This AUX-TT is only updated on the CPU since ee6e2bc4a3 ("anv: Place
images into the aux-map when safe to do so"). So the only really
important invalidation that needs to happens is on the beginning of a
primary command buffer.
We are required to idle the pipes prior invalidation the AUX-TT. This
might not be happening when the invalidation is put at the beginning
of the secondary command buffers.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29671 >
2024-06-12 10:06:05 +00:00
David Heidelberg
27cc8e375b
ci: introduce tool for comparing nightly runs
...
nightly_compare.
Compare the two latest scheduled pipelines and provide information
about the jobs you're interested in.
The job part reports:
- RED previously passing jobs
- YELLOW jobs which failed before, but continue to fail
here is also available link to the previous failed run
- If no job failing, program exits.
The test part reports:
- everything in lovely table
If any failing job is found, after this phase, commit list between these
two scheduled run is printed (you can also use the WebUI link).
Example: I care about all Adreno jobs passing and one Radeon (r300)
with gallium-nine tests.
```
./bin/ci/nightly_compare.py --target "a[3-7][0-9][0-9].*|r300-rv530-nine"
```
Co-authored-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29392 >
2024-06-12 09:26:07 +00:00
David Heidelberg
af056baa40
ci/freedreno: some A306 tests now pass/skip since proper GL detection in Piglit
...
Ref:
- https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/916
- https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/921
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29689 >
2024-06-12 09:09:15 +00:00
Dave Airlie
fd9f114d5a
draw/texture: handle mip_offset[0] being != 0 for layered textures.
...
When llvmpipe adds on a layer it uses mip_offset[0] for it, so it
should still be respected even for multisample.
Fixes KHR-GL45.texture_view.view_sampling
Fixes: 839045bcc8 ("gallivm/lp: merge sample info into normal info")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29685 >
2024-06-12 16:13:59 +10:00
David Heidelberg
f467a89523
rusticl: add -cl-std only when it's not defined
...
This fixes piglit "Invalid CL Version Declaration" test.
Fixes: fc30fe2c11 ("rusticl/kernel: add missing preprocessor definitions")
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29638 >
2024-06-11 12:41:39 -07:00
Leo Liu
3260d6c877
radeon/vcn: enable dpb to use pipe video buffer with swizzle mode
...
Signed-off-by: Leo Liu <leo.liu@amd.com >
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541 >
2024-06-11 12:29:11 -04:00
Leo Liu
bc696783bb
radeon/vcn: use pipe video buffers for dpb
...
gfx12 surface info can be used to fill up the dpb message buffer
Signed-off-by: Leo Liu <leo.liu@amd.com >
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541 >
2024-06-11 12:29:11 -04:00
Leo Liu
448c716358
ac/surface/tests: add the test for ADDR3_256B_2D
...
Signed-off-by: Leo Liu <leo.liu@amd.com >
Acked-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541 >
2024-06-11 12:29:11 -04:00
Leo Liu
59e813d953
ac/surface: add GFX12 256B tile mode for video
...
With VCN5, the DPB buffer uses gfx12 tile/swizzle mode.
Signed-off-by: Leo Liu <leo.liu@amd.com >
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541 >
2024-06-11 12:29:11 -04:00
Patrick Lerda
301a3bacce
radeonsi: fix assert triggered on gfx6 after the tessellation update
...
This change updates the affected calls to the proper function
which is radeon_set_config_reg().
For instance, this issue is triggered with
"piglit/bin/textureSize tes isampler2DMSArray -auto -fbo":
vertex-program-two-side: ../src/gallium/drivers/radeonsi/si_state_shaders.cpp:4981: void si_emit_spi_ge_ring_state(si_context*, unsigned int): Assertion `(0x008988) >= CIK_UCONFIG_REG_OFFSET && (0x008988) < CIK_UCONFIG_REG_END' failed.
Fixes: bd71d62b8f ("radeonsi: program tessellation rings right before draws")
Signed-off-by: Patrick Lerda <patrick9876@free.fr >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29645 >
2024-06-11 14:01:21 +00:00
Alyssa Rosenzweig
e7c131ec96
asahi: use nir_build_texture_query
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29614 >
2024-06-11 13:10:22 +00:00
Alyssa Rosenzweig
f1144aa56f
nir/builtin_builder: factor out nir_build_texture_query
...
useful for other queries too.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29614 >
2024-06-11 13:10:22 +00:00
Eric Engestrom
53e1bd141e
ci: fix meson install script
...
a93932daf0 ("ci/meson: reuse meson installation") forgot to
bump the image tags, and as a result this was merged untested and turned
out to be broken, as the fedora image.
The issue is that python in the Fedora image is not flagged as
EXTERNALLY-MANAGED, unlike what Debian does, so the
`--break-system-packages` is invalid.
Instead, remove this flag from the debian image as it makes very little
sense in a docker image.
Fixes: a93932daf0 ("ci/meson: reuse meson installation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29673 >
2024-06-11 12:15:07 +00:00
Rhys Perry
7a4f121c5d
aco: remove some missing label resets
...
In the case of:
c = xor(a, b)
d = not(c)
xor(d, e)
it will be optimized to:
d = xnor(a, b)
xor(d, e)
because "d" would still had a label with "instr=not(c)", it would then be
further optimized to:
d = xnor(a, b)
xnor(c, e)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11309
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29650 >
2024-06-11 09:30:16 +00:00
Sergi Blanch Torne
2d6e72c2cb
ci: continue stress run'n'monitor
...
When the tool is used to stress test a pipeline, if there are jobs already ran,
use their information like it does when the stress flag is not set.
This provides consistency between the behavior when stress argument is not set,
to when it is set. When it is not set, it uses the information about jobs that
are already done. When it is set, it has to use the information about the
already ran jobs. Also, it saves resources by triggering the minimum required.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29432 >
2024-06-11 11:22:29 +02:00
Samuel Pitoiset
51d1e005e8
radv: use the common SQTT implementation
...
I have verified the generated command stream using PM4 is similar to
the previous one on POLARIS10, VEGA10, NAVI21 and NAVI31.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499 >
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
ea8f29b4a7
radv: emit more consecutive registers for SQTT on GFX8-9
...
This change is only useful to compare the command stream generated by
PM4 in the next commit.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499 >
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
a373ba92c3
amd: add a common implementation for SQTT using PM4
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499 >
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
2fab42ad2e
amd: mark more registers that need RESET_FILTER_CAM in PM4
...
For SQTT.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499 >
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
0c08673656
amd: allow to emit privileged config registers in PM4
...
For SQTT.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499 >
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
b82e5c8da8
ac,radv,radeonsi: add more parameters to ac_sqtt
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499 >
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
155399d03b
ac,radv: add a helper for SQTT control register
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499 >
2024-06-11 06:46:55 +00:00
Pierre-Eric Pelloux-Prayer
a7880f3edb
radv/sqtt: use radeon_check_space before emit_spm_*
...
This fixes the following error on a rdna2:
radeon_set_uconfig_reg_seq: Assertion `cs->cdw + 2 + num <= cs->reserved_dw' failed.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499 >
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
a80a1c9838
radv: don't assume that TC_ACTION_ENA invalidates L1 cache on gfx9
...
Ported from RadeonSI 279315fd73 ("radeonsi: don't assume that
TC_ACTION_ENA invalidates L1 cache on gfx9")
Thanks to Rhys for noticing this by inspection.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29644 >
2024-06-11 06:15:12 +00:00
Iago Toral Quiroga
e7615a612f
v3dv: support VK_FORMAT_A1B5G5R5_UNORM_PACK16_KHR
...
VK_KHR_maintenance5 adds two new optional formats:
- VK_FORMAT_A1B5G5R5_UNORM_PACK16_KHR
- VK_FORMAT_A8_UNORM_KHR
The former we support natively, the latter we don't. We could
try to implement A8 with some effort by mapping it to R8 with
a 000X swizzle but that alone won't be enough, some issues we
would have to solve include:
- Border colors won't work because the texture shader state
swizzle also applies to these, so our 000X swizzle would mess
things up for them and since we don't know the format used with
the sampler in the general case, we would have always have to
create two samplers internally, one adequate for A8 and one for
the rest of formats and choose one or the other at run time.
- We would have to convert the A8 format to a compatible
R8 format but most of the transfer operations. This should be
fairly trivial since we already have infrastructure for this.
- At rendering time we would need to ensure we make our writes
from the alpha channel. This would probably require that we
use the color_fmt from the fs_key to swizzle color writes in
shaders.
- We would probably also need to special case the format for
color clears, etc
So for now, we don't support it.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29643 >
2024-06-11 05:32:26 +00:00
Timothy Arceri
9995f336e6
nir: add merge loop terminators optimisation
...
Merge two consecutive basic terminators.
Acked-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28998 >
2024-06-11 01:42:23 +00:00
Timothy Arceri
e25da8d8d7
nir: support more loop unrolling for logical operators
...
Here we support finding loop count when the termination condition
is a logical or.
Acked-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28998 >
2024-06-11 01:42:23 +00:00
Timothy Arceri
987cf4b47d
nir: more aggressively remove in loop during partial unroll
...
Acked-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28998 >
2024-06-11 01:42:23 +00:00
Timothy Arceri
9702570994
nir: clarify and update loop conditional instruction
...
This value is intended to be used to remove out of bounds array
access when unrolling loops so it should contain the comparison
that contains the the induction variable not the overall
condition of the loop terminator. So here we update the instruction
when dealing with iand/ior loop terminator conditions.
Acked-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28998 >
2024-06-11 01:42:23 +00:00
Juston Li
5ac539d70d
venus: sync protocol for conditionally ignored dyn arrays
...
Signed-off-by: Juston Li <justonli@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29661 >
2024-06-11 01:14:19 +00:00
Kenneth Graunke
f04bb49465
intel/brw: Delete SAD2 and SADA2 opcodes
...
These were removed with Icelake. While they technically still exist on
Skylake, which this compiler supports, we have never used these opcodes
in the 14 years we could have done so. So just scrap them.
Reviewed-by: Matt Turner <mattst88@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29665 >
2024-06-10 16:47:50 -07:00
Friedrich Vock
15f2c9c553
aco: Limit rt stages to 128 vgprs
...
Totals from 35472 (7.40% of 479373) affected shaders:
MaxWaves: 206239 -> 283776 (+37.60%)
Instrs: 193922210 -> 202721106 (+4.54%)
CodeSize: 1056819972 -> 1110833680 (+5.11%); split: -0.00%, +5.11%
VGPRs: 6026704 -> 4540416 (-24.66%)
SpillSGPRs: 23742 -> 25754 (+8.47%)
SpillVGPRs: 118897 -> 2295118 (+1830.34%)
Scratch: 7201792 -> 152752128 (+2021.03%)
Latency: 2713432565 -> 3194796286 (+17.74%); split: -0.20%, +17.94%
InvThroughput: 1052131232 -> 935049835 (-11.13%); split: -16.59%, +5.46%
VClause: 6972784 -> 8716721 (+25.01%); split: -0.02%, +25.03%
SClause: 4879313 -> 4852452 (-0.55%); split: -0.88%, +0.33%
Copies: 32782141 -> 35223995 (+7.45%)
Branches: 11075847 -> 11094087 (+0.16%); split: -0.00%, +0.17%
VALU: 118525960 -> 120929058 (+2.03%)
SALU: 33924572 -> 33973293 (+0.14%); split: -0.03%, +0.17%
VMEM: 12419116 -> 17104582 (+37.73%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29593 >
2024-06-10 19:39:52 +00:00
Friedrich Vock
ec8512ce85
aco/spill: Don't spill phis with all-undef operands
...
Fixes some crashes when limiting RT stages to 128 VGPRs.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29593 >
2024-06-10 19:39:52 +00:00
Sergi Blanch Torne
80eda406d8
Revert "ci: disable Collabora's farm due to runners maintenance"
...
This reverts commit 6cde457ab6 .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29648 >
2024-06-10 19:09:48 +00:00
Samuel Pitoiset
128cca21c0
radv: pass a radv_shader to radv_get_compute_pipeline_metadata()
...
And rename to radv_get_compute_shader_metadata().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29652 >
2024-06-10 17:31:12 +00:00
Alyssa Rosenzweig
31127d7b02
nir/lower_wpos_center: clean up
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29585 >
2024-06-10 16:59:38 +00:00
Emma Anholt
3beae0f98e
nir,panfrost,agx: Fix driver PIXEL_COORD_INTEGER setting and drop workaround.
...
nir_lower_frag_coord_to_pixel_coord was adding .5 to work around that the
drivers were mistakenly setting PIXEL_COORD_HALF_INTEGER. With the
setting corrected, the GL frontend handles it appropriately (instead of
subtracting half in the frontend for ARB_fragment_coord_conventions
integer setting and then adding the half back here), and makes the pass
reusable from Intel.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29585 >
2024-06-10 16:59:38 +00:00
Gert Wollny
6a9596be56
zink: limit minSampleShading to a maxium value of 1.0
...
This is required by the spec and fixes
VUID-VkPipelineMultisampleStateCreateInfo-minSampleShading-00786
when running
spec@arb_stencil_texturing@glblitframebuffer corrupts state@gl_texture_2d_multisample_array
Signed-off-by: Gert Wollny <gert.wollny@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29625 >
2024-06-10 15:54:12 +00:00
Marcin Ślusarz
a1d8837bad
anv,intel/compiler/xe2: fill MESH_CONTROL.VPandRTAIndexAutostripEnable
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29617 >
2024-06-10 15:21:34 +00:00
Marcin Ślusarz
1fa343c38b
intel/genxml/xe2: update MESH_CONTROL
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29617 >
2024-06-10 15:21:34 +00:00
Alyssa Rosenzweig
ba20cc1c72
mesa: fix duplicate initializer
...
fixes warning with clang:
../src/mesa/main/spirv_capabilities.c:98:45: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
98 | .TransformFeedback = gl_exts->ARB_transform_feedback3,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../src/mesa/main/spirv_capabilities.c:72:45: note: previous initialization is here
72 | .TransformFeedback = true,
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29613 >
2024-06-10 14:19:02 +00:00
Lionel Landwerlin
e6efe2e3fe
anv: support setting CFE_STATE::StackIDControl per application
...
This is a performance tuning value, recommended value is 512 on DG2.
On DG2 this was in the privileged register RT_CTRL.
Minor CFE_STATE defintion fixes from Jose.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29616 >
2024-06-10 14:08:03 +00:00
José Roberto de Souza
62a25f0649
anv/xe2: Add STATE_COMPUTE_MODE individual masks
...
So we can enable each mask individually when programming registers.
Also setting Mask2/mask of the second double word so all registers in
it are also zeored during state init.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29616 >
2024-06-10 14:08:03 +00:00
José Roberto de Souza
a472d415bc
anv/xe2: Enable compute walker and BTD thread preemption
...
GFX versions older than GFX 20 have 'Thread Preemption disable' while
GFX 20 has 'Thread Preemption' with value flipped in compute walker
instruction.
So here by default enabling thread preemption, only disabling it
when BTD mode is enabled as instructed in Wa_14017794102.
Similar for 3DSTATE_BTD, enabling preemption by default and
only disabling when platform is affected by Wa_14017794102.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29616 >
2024-06-10 14:08:02 +00:00
José Roberto de Souza
6e03ddd95d
intel/genxml/gfx20: Sync POSTSYNC_DATA struct with spec
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29616 >
2024-06-10 14:08:02 +00:00
Alejandro Piñeiro
f017beb29c
v3dv/pipeline: ensure vk_graphics_pipeline_all_state alive when still needed
...
Right now we have a statically allocated vk_graphics_pipeline_state,
that we declare at pipeline_init, and fill at
pipeline_init_dynamic_state. This one can be static as right now it is
only needed during pipeline_init lifetime.
But to fill it, we need a vk_graphics_pipeline_all_state structure,
that right now we declare at pipeline_init_dynamic_state. But that one
become part of that vk_graphics_pipeline_state, so still needed at
pipeline_init.
This was detected when trying to refactor the code to use the
pipeline_state later on, but it raises an "invalid read" error using
valgrind with the current code. It is surprising that didn't cause any
problem.
Fixes: f2236065b7 ("v3dv: port dynamic state tracking to use Mesa Vulkan")
Cc: mesa-stable
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29603 >
2024-06-10 13:47:50 +00:00
Ruijing Dong
8cd53d95fe
radesonsi/vcn: update vcn4 tile processing logic
...
Vcn4 tile number calculation doesn't consider
some input case, which could result in output
bitstream corruption, this fixed the issue.
Not using the number_of_tiles directly but from
calculation. Also change to re-use some macros
from local vcn_5_0.c to ac_vcn_enc.h header file.
Updated vcn4 spec_misc_av1 ip package.
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29556 >
2024-06-10 13:12:20 +00:00
Ruijing Dong
53f6cf29e9
radeonsi/vcn: remove tile_config_flag
...
The tile config structure will be used in vcn4 as well.
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29556 >
2024-06-10 13:12:20 +00:00
David Rosca
0d21aa4a08
frontends/va: Fix crash in vaRenderPicture when decoder is NULL
...
Fixes: d1b794685f ("frontends/va: Send all bitstream buffers to driver at once")
Reviewed-by: Sil Vilerino <sivileri@microsoft.com >
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29599 >
2024-06-10 12:58:18 +00:00
Sergi Blanch Torne
6cde457ab6
ci: disable Collabora's farm due to runners maintenance
...
The downtime should be small, as this would only mean to stop/start services.
After some test, the reenable (revert this commit) will serve as final
verification.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29647 >
2024-06-10 14:03:09 +02:00
Eric Engestrom
86ee97801b
egl/device: drop unnecessary intermediate variable
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29459 >
2024-06-10 10:51:57 +00:00
Eric Engestrom
0c58e8b893
egl: ensure future platforms get their teardown implemented
...
surfaceless & device platforms don't need anything special here.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29459 >
2024-06-10 10:51:57 +00:00
Eric Engestrom
20cae414ed
egl: move android-specific code into an android branch
...
Android is almost never compiled at the same time as another platform so
it doesn't change anything, but having that android branch is desirable
by the end of this series anyway, so let's do this :P
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29459 >
2024-06-10 10:51:57 +00:00
Eric Engestrom
54dd83e736
egl: fix teardown when using xcb
...
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29459 >
2024-06-10 10:51:57 +00:00
Eric Engestrom
99af53c6fd
driconf: drop param for setting default gpu vendor id in DRI_CONF_FORCE_VK_VENDOR()
...
The macro was ignoring the param and hard-coding 0, and it doesn't make
much sense to allow drivers to override it by default, so remove the
appearance of the ability to do so.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29632 >
2024-06-10 10:11:56 +00:00
Erik Faye-Lund
53b99d766e
mesa/main: merge identical checks
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29528 >
2024-06-10 09:40:38 +00:00
Erik Faye-Lund
e154c403fd
mesa/main: simplify conditions
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29528 >
2024-06-10 09:40:38 +00:00
Erik Faye-Lund
9648bab4b6
mesa/main: remove needless check
...
EXT_color_buffer_half_float is only exposed in GLES contexts, so this
check is needless.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29528 >
2024-06-10 09:40:38 +00:00
Erik Faye-Lund
e5bd74b775
mesa/main: use _mesa_is_gles1()-helper
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29528 >
2024-06-10 09:40:38 +00:00
Erik Faye-Lund
53fb085ebd
mesa/main: tighten rg/half-float interaction
...
The GL_HALF_FLOAT_OES-enum is about OES_texture_float, not e.g
ARB_texture_float. EXT_texture_rg does have an interaction that allows
this, but the other specs doesn't.
So let's tighten this. In reality, this shouldn't change any real
behavior, because we only support OES_texture_float in GLES contexts,
and in those we'd support EXT_texture_rg if we support RG textures in
the first place. But it makes the logic a bit clearer.
And just to be clear, the non-GLES version of the half-float enum does
not need the same check, because desktop GL supports all converions
here, and GLES 3 and later also requires RG-texture support in the first
place.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29528 >
2024-06-10 09:40:38 +00:00
Erik Faye-Lund
75645387b6
mesa/main: use extension-helper
...
This is only allowed if the extension is supported, so let's actually
check for it, instead of checking for GLES2 support.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29528 >
2024-06-10 09:40:38 +00:00
Erik Faye-Lund
d2817013ba
mesa/main: factor out format/type enum checking
...
Checking if the format and type enums are valid while checking that the
combinations are valid makes the code hard to modify when there's
complex conditions at play. Let's factor these checks out so we can
stricten up this code in a more maintainable way.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29528 >
2024-06-10 09:40:38 +00:00
Erik Faye-Lund
227c6627cb
mesa/main: do not allow RGBA_INTEGER et al in gles3
...
GLES3 doesn't allow all the format/type combinations that
ARB_texture_rgb10_a2ui does, so let's tighten the error-checking here a
bit.
Fixes: b5a370dc25 ("mesa/main: do not allow ARB_texture_rgb10_a2ui enums before gles3")
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29528 >
2024-06-10 09:40:38 +00:00
Erik Faye-Lund
5e5b0b0532
mesa/main: require EXT_texture_integer for GL 3.0
...
The GL enums from this extension got promoted to GL 3.0, so we need to
test for it before we bump the GL version. If not, bad things will
happen when people try using them.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29528 >
2024-06-10 09:40:38 +00:00
Erik Faye-Lund
b6c2d9a911
mesa/main: remove duplicate error-checks
...
We've already verified that both of these enums are valid earlier in this
function, so let's remove the duplicate checks here.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29528 >
2024-06-10 09:40:38 +00:00
Erik Faye-Lund
c0285f29ff
mesa/main: remove stale prototype
...
This function was removed a long time ago.
Fixes: 8e581747d2 ("mesa/formats: make format testing a gtest")
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29528 >
2024-06-10 09:40:38 +00:00
Erik Faye-Lund
4be89d7ad1
panfrost: lower maxVertexInputStride to match vulkan runtime
...
Since we now use the common vulkan runtime to handle pipeline state and
this sets a limit for this at MESA_VK_MAX_VERTEX_BINDING_STRIDE we should
do the same, or else we can run into an assert-fail in the runtime code.
Basically the same as !29454 , but for Panfrost.
Fixes: 214761bdfe ("panvk: Fully transition to vk_vertex_binding_state")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29461 >
2024-06-10 09:20:10 +00:00
Erik Faye-Lund
8fe554c2bf
mesa/main: remove unused function
...
Whoops, seems I left this function unused!
Fixes: dd8fb7139d ("mesa/main: rewrite mipmap generation code")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29582 >
2024-06-10 08:44:19 +00:00
Iago Toral Quiroga
d5e2f66314
v3dv: disable some TLB paths for cases of linear depth/stencil stores
...
In the case of buffer to image stores, we work around the limitation
for linear images by loading D/S data into a the color tile buffer
using a compatible format, however, this only works for formats with
a single aspect, for combined depth/stencil formats, since the copies
are specified to only copy a single aspect, we need to be able to
preserve the contents of the other aspect in the destination image,
and for that we still use the depth/stencil buffer, so we are affected
by the restriction.
Fixes some VK_KHR_maintenance5 CTS tests that hit this scenario,
such as some tests in:
dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.2d_to_1d.*
In the case of image to image copies, we don't have any workarounds for
linear depth/stencil so we always want to skip the TLB path. I have not
seen any tests hit this scenario.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29597 >
2024-06-10 07:25:04 +02:00
Iago Toral Quiroga
993ba4135c
v3dv: remove blit shader restriction on depth/stencil not being linear
...
We can't render to linear depth/stencil formats but the blit shader
automatically converts D/S blits to compatible color blits where we
don't have this restriction.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29597 >
2024-06-10 07:25:04 +02:00
Eric Engestrom
467230e7e4
freedreno/ci: disable mid-testing reboot on a750
...
Once testing has started, there won't be enough time left to try
rebooting and restarting if something went wrong, so instead just error
out of the job immediately.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29637 >
2024-06-10 02:01:05 +02:00
Eric Engestrom
bbe9cf47bf
nvk+zink/ci: consider all the double tests in spec@glsl-4.00@execution@built-in-functions to be flaky
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29636 >
2024-06-10 01:10:46 +02:00
Eric Engestrom
c2dc60751b
nvk+zink/ci: add flakes seen in nightly pipeline
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29635 >
2024-06-09 22:51:37 +00:00
Eric Engestrom
9f4c0d2a71
nvk+zink/ci: mark KHR-GL46.sparse_texture2_tests.SparseTexture2* as fixed
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29635 >
2024-06-09 22:51:37 +00:00
Eric Engestrom
b92ce1b0d6
panfrost/ci: remove duplicate path
...
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29634 >
2024-06-10 00:20:55 +02:00
Eric Engestrom
9c2e2b7a2e
turnip/ci: add a750 flakes seen in the latest nightly
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29633 >
2024-06-09 21:04:18 +00:00
Eric Engestrom
04c939113f
turnip+zink/ci: mark a dEQP-GLES(2|3).functional.rasterization.(fbo|primitives).line_(strip_|)wide as fixed
...
Fixes: 07fa635f11 ("gallium/u_blitter: add option to override fragment shader for util_blitter_blit")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29633 >
2024-06-09 21:04:18 +00:00
Eric Engestrom
95ca41bef9
radv/ci: drop duplicate navi31-aco flakes line
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29631 >
2024-06-09 22:31:30 +02:00
Eric Engestrom
ef0f926aff
radv/ci: drop duplicate navi21-aco flakes line
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29631 >
2024-06-09 22:31:23 +02:00
Eric Engestrom
f4f30ed826
radeonsi/ci: mark a bunch of tests as fixed on vangogh
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29631 >
2024-06-09 22:30:36 +02:00
Pavel Ondračka
ae06e018fa
r300: fix RC_OMOD_DIV_2 modifier
...
Backend only recognizes the MUL a*0.5 pattern if there is an immediate
as one of the sources, however by then the source would we already
coverted to RC_FILE_NONE with constant half swizzles. So teach
peephole_omod to recognize this pattern as well.
RV530:
total instructions in shared programs: 128860 -> 128750 (-0.09%)
instructions in affected programs: 11942 -> 11832 (-0.92%)
helped: 106
HURT: 17
total presub in shared programs: 8739 -> 8736 (-0.03%)
presub in affected programs: 32 -> 29 (-9.38%)
helped: 3
HURT: 0
total omod in shared programs: 427 -> 1212 (183.84%)
omod in affected programs: 38 -> 823 (2065.79%)
helped: 0
HURT: 160
total temps in shared programs: 17544 -> 17554 (0.06%)
temps in affected programs: 70 -> 80 (14.29%)
helped: 0
HURT: 10
total lits in shared programs: 3153 -> 3159 (0.19%)
lits in affected programs: 9 -> 15 (66.67%)
helped: 0
HURT: 6
total cycles in shared programs: 191334 -> 191253 (-0.04%)
cycles in affected programs: 21240 -> 21159 (-0.38%)
helped: 101
HURT: 27
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28784 >
2024-06-09 09:07:32 +02:00
Pavel Ondračka
d94d2a05b2
r300: fix for ouput modifier and DDX/DDX
...
Empirical testing shows that output modifiers are not working if the
DDX/DDY is writing directly to output.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28784 >
2024-06-09 09:07:32 +02:00
Pavel Ondračka
472c64c90e
r300: fix writemask rewrite when converting to omod
...
Consider the following case:
0: MUL temp[1].y, input[0]._x__, input[1]._y__;
1: MOV temp[1].x, input[0].x___;
2: MOV temp[1].z, const[0].__x_;
3: MUL temp[2].xyz, const[1].xxx_, temp[1].yxz_;
...
We correctly recognize that we can convert mul into omod for all three
instructions, however the mul swizzle was not handled correctly:
0: MUL temp[2].y / 2, input[0]._x__, input[1]._y__;
1: MOV temp[2].x / 2, input[0].x___;
2: MOV temp[2].z / 2, const[0].__x_;
...
Just create the conversion swizzle from the initial mul swizzle when rewriting
the original instruction writemasks.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28784 >
2024-06-09 09:07:31 +02:00
Pavel Ondračka
32cc2c2812
r300: fix cycles counting for KIL
...
We add a cycles penalty when we see a begin tex and than subtract from
it based on when first alu comes that needs the results. However if the
only instruction in the TEX block is just KIL, we don't have to add any
penalty as nothing waits for it.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28784 >
2024-06-09 09:07:31 +02:00
Pavel Ondračka
fcc97bd6c3
r300/ci: fails list update
...
shaders@glsl-bug-110796 skips since https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/921
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29626 >
2024-06-09 08:04:59 +02:00
Georg Lehmann
05ca6e2478
amd/common: set COMPUTE_STATIC_THREAD_MGMT_SE2-3 correctly on gfx10-11
...
There is a hole between SE1 and SE2 occupied by COMPUTE_TMPRING_SIZE.
Fixes: 3c8b48e310 ("ac,radeonsi: add a function to initialize compute preambles")
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29622 >
2024-06-08 19:18:53 +00:00
Karol Herbst
5d013da038
rusticl/memory: copies might overlap for host ptrs
...
We can't really gurantee there is no overlap, because applications might
pass in arbitrary host pointers.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29604 >
2024-06-08 17:03:31 +00:00
Karol Herbst
e522c91d5c
rusticl/spirv: do not pass a NULL pointer to slice::from_raw_parts
...
Fixes: e8de580998 ("rusticl/kernel: basic implementation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29604 >
2024-06-08 17:03:31 +00:00
Kenneth Graunke
3da444b79e
intel/brw: Refactor code to commute immediates into legal positions
...
This will let us reuse this in a new pass shortly.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29624 >
2024-06-08 02:19:12 -07:00
Kenneth Graunke
d45da713e7
intel/brw: Refactor try_constant_propagate()
...
This will let us reuse the bulk of this code in a new copy propagation
pass without replicating it. We retain a wrapper function for dealing
with ACP entries, which the new pass won't have.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29624 >
2024-06-08 02:19:10 -07:00
Kenneth Graunke
85aa6f80af
intel/brw: Drop BRW_OPCODE_IF from try_constant_propagate
...
This was for Sandybridge's IF with embedded comparison, which only
existed for a single generation of hardware. Since the compiler fork,
we no longer support Sandybridge here.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29624 >
2024-06-08 02:19:08 -07:00
Kenneth Graunke
7019bc4469
intel/brw: Drop compiler parameter from try_constant_propagate()
...
This is unused.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29624 >
2024-06-08 02:19:06 -07:00
Kenneth Graunke
43ab997951
intel/brw: Update instructions_match() to compare more fields
...
We were missing the following "newer" fields:
- ex_desc
- predicate_trivial
- sdepth
- rcount
- writes_accumulator
- no_dd_clear
- no_dd_check
- check_tdr
- send_is_volatile
- send_ex_desc_scratch
- send_ex_bso
- last_rt
- keep_payload_trailing_zeroes
- has_packed_lod_ai_src
We can actually just check ex_desc and the new "bits" union to handle
most of them with fewer checks.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29624 >
2024-06-08 02:19:03 -07:00
Kenneth Graunke
061da9f748
intel/brw: Make brw_reg::bits publicly accessible from fs_reg
...
I want to be able to hash an fs_reg, including all the brw_reg fields.
It's easiest to do this if I can use the "bits" union field that
incorporates many of the other ones.
We also move the using declaration for "nr" down because that field was
moved to the second section a while back.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29624 >
2024-06-08 02:19:01 -07:00
Kenneth Graunke
b4a595204b
intel/brw: Add a idom_tree::dominates(a, b) helper.
...
Simpler to use than the existing methods.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29624 >
2024-06-08 02:18:56 -07:00
Kenneth Graunke
e2d9ff8004
intel/brw: Handle scratch address swizzling of constants
...
Pass in the nir_src and check if it's constant, handling it via CPU-side
arithmetic instead of emitting instructions. While we can constant fold
these via our optimization passes, we have to do opt_algebraic to fold
the binary operation with constant sources into a MOV of an immediate,
then opt_copy_propagation to put it in the next expression, and so on,
until the entire expression is folded. This can take several iterations
of the optimization loop, which is inefficient.
For example, gfxbench5/aztec-ruins/normal/7 has load/store_scratch
intrinsics with constant sources, and this patch removes a number of
optimization passes according to INTEL_DEBUG=optimizer.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29624 >
2024-06-08 02:18:54 -07:00
Kenneth Graunke
07745752d6
intel/brw: Skip fs_nir_setup_outputs for compute shaders
...
There aren't any outputs, so there's no point to doing this work.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29624 >
2024-06-08 02:18:54 -07:00
Kenneth Graunke
fa1564fb87
intel/brw: Recreate GS output registers after EmitVertex
...
Geometry shaders write outputs multiple times, with EmitVertex()
between them. The value of output variables becomes undefined after
calling EmitVertex(), so we don't need to preserve those. This lets
us recreate new registers after each EmitVertex(), assuming we aren't
in control flow, allowing them to have separate live ranges. It also
means that those registers are more likely to be written once, rather
than having multiple writes, which can make optimization easier.
This is pretty much a total hack, but it's helpful.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29624 >
2024-06-08 02:18:51 -07:00
Eric Engestrom
cb30b266ca
ci/deqp: uprev gl & gles cts
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29602 >
2024-06-08 08:19:47 +00:00
Eric Engestrom
c02329ded1
ci: set a common B2C_JOB_SUCCESS_REGEX with the message that's printed for all jobs
...
Simpler code, and more reliable against serial corruption because that
message is printed 4 times (vs only once for the other ones).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29608 >
2024-06-08 07:16:27 +00:00
Marek Olšák
dc113c418d
ac/nir: import the dispatch logic for the universal compute clear/blit shader
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
6b15e45908
ac/nir: import the universal compute clear/blit shader
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
1becc6953c
ac/nir: import the MSAA resolving pixel shader from radeonsi
...
It has a lot of options for efficiency.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
f96bbb64d6
radeonsi: add decision code to select when to use compute blit for performance
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
3424e16ece
radeonsi: add decision code to select when to use CB_RESOLVE for performance
...
The answer is "almost never".
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
c5641387f3
radeonsi: add a new blit microbenchmark
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
0c545e2fca
radeonsi: add fail_if_slow parameter into si_msaa_resolve_blit_via_CB
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
77d81fb8b0
radeonsi: add a custom MSAA resolving pixel shader
...
This is faster for 8 samples because it forms a VMEM clause, unlike
the default shader.
It also uses 16-bit types in the shader when possible and averages fewer
components if the format has less than 4.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
21e90d9c6e
radeonsi: clear color buffers via compute for special tiling cases
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
2a0b9839ca
radeonsi: add use_aco into CS blit shader key
...
it will be set in a future commit
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
fe7a4ed708
radeonsi: use shader_info::use_aco_amd to determine whether to use ACO
...
It's set by si_nir_scan_shader, so we need to use it after that.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
c83225cd0a
radeonsi: print the compute shader blit key for AMD_DEBUG
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
d62ad0da5f
radeonsi: use MIMG A16 (16-bit image coordinates) in compute blits
...
This reduces VGPR usage for MSAA blits and blitting multiple pixels per
lane.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
d6c96024a8
radeonsi: extend NIR compute helpers to allow returning 16-bit results
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
5b3e1a0532
radeonsi: change the compute blit to clear/blit multiple pixels per lane
...
The target is 8-16B per lane regardless of the format and number of
samples. This is needed to fully utilize the memory bandwidth instead
of only a small fraction of it. These are optimal numbers identified by
benchmarking.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
d4c066abaf
radeonsi: adds flags parameter into si_compute_blit to replace fail_if_slow
...
So that we can also specify sync flags.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
30af861bff
radeonsi: restructure (rewrite) the compute blit shader
...
This merges the separate MSAA, downsampling, upsampling, and non-MSAA blocks.
It's not meant to change behavior, but some change are necessary:
- disallow 16 samples
- loads only load the number of components that we need
- optimizations barriers are placed optimally and include the sample index
in the same vector as the coordinates, so that LLVM is forced to form VMEM
clauses for loads and stores
- the shader queries the descriptor for the dst image manually and passes
it to the image store instead of the image variable (this is needed to get
latency hiding for scalar loads in the presence of optimization barriers)
This is a prerequisite for blitting multiple pixels per lane.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
d2ce5fc07a
radeonsi: split xy_clamp_to_edge to separate X and Y flags for the compute blit
...
to generate less shader code if only one of the axes needs clamping.
Use util_is_box_out_of_bounds instead of doing it manually.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
7ee936bf65
radeonsi: convert the compute blit shader hash table to u64 keys
...
32 bits is not enough anymore. We'll add more.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
40bcb588dd
radeonsi: remove the old si_compute_copy_image
...
It's replaced by the compute blit.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:11 +00:00
Marek Olšák
b0c0cca3a7
radeonsi: switch the old compute image copy to the new one using the blit
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
f3a59fe216
radeonsi: add a new version of si_compute_copy_image using the compute blit
...
It's faster and handles more stuff.
This is mostly the same code as the old version, but it calls
si_compute_blit at the end.
A later commit will remove the old version, so that there is no code
duplication.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
b7389615c6
radeonsi: rename si_compute_copy_image -> si_compute_copy_image_old
...
It will be replaced in several stages.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
8b030ac588
radeonsi: rename si_compute_blit "testing" parameter to "fail_if_slow"
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
a4602395d2
radeonsi: switch compute image clears to the compute blit shader
...
The compute blit shader is faster and handles more stuff.
This removes the old clear_render_target shader.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
9915289bdf
radeonsi: extend the compute blit to do image clears as well
...
The compute blit is faster and handles more stuff than
the clear_render_target shader. We can just pass a clear value to it
to replace the source image.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
e41887c6a4
radeonsi: cosmetic and robustness changes for the compute blit
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
0c5d727a5e
radeonsi: document better how X/Y flipping in the compute blit works
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
bb86366fee
radeonsi/gfx11: enable MSAA image stores in the compute blit
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
5897dde3f7
radeonsi: don't fail due to DCC when using the compute blit on compute queues
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
fcd9f0069f
radeonsi: don't use si_can_use_compute_blit in the compute blit
...
It makes supporting compute queues on all chips more complicated.
Other uses of si_can_use_compute_blit will be removed, so the function
will be removed too.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
1b924bad5e
radeonsi: reject unsupported parameters as the first thing in the compute blit
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
993c30af06
radeonsi: fix sample0_only for the compute blit
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
0ca93e8090
radeonsi: optimize unaligned compute blits
...
If a blit starts on a coordinate that is not at the beginning of a tile
(e.g. 8x8), launch extra threads before 0,0,0 to make all following blocks
start at the beginning of such tiles. This makes such blits faster.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
2423c5ad2f
radeonsi: use MIMG D16 (16-bit data) for image instructions in compute blits
...
This reduces VGPR usage.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
d3638a9f58
radeonsi: remove fp16_rtz from the compute blit
...
it's not useful to have precisely the same behavior as u_blitter,
and D16 image stores are not supported by gfx6-7.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
78ab033ae8
radeonsi: ignore PIPE_SWIZZLE_1 for 40% VGPR usage reduction for compute blits
...
It had no effect on correctness and it was very inefficient because all
formats without alpha have SWIZZLE_1 in the last channel.
util_format_get_last_component is the same, but ignores PIPE_SWIZZLE_1.
It improves MSAA compute blit performance.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
144fe156ef
radeonsi: use better workgroup sizes for compute blits to improve perf
...
It depends on the copy area and the tiling of the destination image.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
269ab6cc62
radeonsi: don't declare 3D coordinates in the compute blit if they aren't needed
...
This eliminates the 3rd coordinate VGPR.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
07fa635f11
gallium/u_blitter: add option to override fragment shader for util_blitter_blit
...
radeonsi will use a custom MSAA resolving shader
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917 >
2024-06-08 05:48:10 +00:00
Marek Olšák
9ab9644c1f
radeonsi/gfx12: fix stencil corruption
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Tested-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29564 >
2024-06-08 00:11:28 -04:00
Marek Olšák
1b9ce2625f
ac/nir/lower_ngg: don't use gfx12 xfb defs outside their basic block on gfx11
...
Move the defs after nir_pop_if and phis and inside the gfx12 branch.
Fixes: 1ea96a47cd - ac/nir/lower_ngg: use voffset in global_atomic_add for xfb
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29564 >
2024-06-08 00:11:18 -04:00
Marek Olšák
ea99c3fcb9
amd: update addrlib
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29564 >
2024-06-08 00:11:17 -04:00
Marek Olšák
2ea3cb054b
ac/surface: pass the correct addrlib handle to Addr3GetPossibleSwizzleModes
...
Fixes: d22564d29c - ac/surface: add gfx12
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29564 >
2024-06-08 00:11:15 -04:00
Guilherme Gallo
41dd1c52b1
ci/lava: Fix cmdline for UART/fastboot devices
...
Fastboot devices need an indirection for creating a boot image via
`mkbootimg`, so we need to propagate the cmdline from LAVA and our extra
arguments to it properly.
This commit fixes it by retrieving the default cmdline from LAVA and
sending it, together with the `extra_nfsroot_args` to the `mkbootimg`
command.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29611 >
2024-06-07 22:03:22 +00:00
Roland Scheidegger
eead805919
lavapipe: add option to enable snorm blending
...
This is disabled by default because it fails CTS, however this may
still be useful (as it generally works), hence use LVP_SNORM_BLEND
env var to enable it.
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Reviewed-by: Brian Paul <brian.paul@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29587 >
2024-06-07 21:33:12 +00:00
Jianxun Zhang
9654aa4c31
intel/isl: Allow multi-sample on depth aux usage (xe2)
...
The restriction on depth aux mode is gone on Xe2 in spec.
Fix: piglit
arb_post_depth_coverage-multisampling -auto -fbo
isl_surface_state.c:723: isl_gfx20_surf_fill_state_s:
Assertion `info->surf->samples == 1' failed.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29274 >
2024-06-07 21:06:37 +00:00
Eric Engestrom
bd6ace73f3
radv/ci: document navi31 regression from !29235
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29596 >
2024-06-07 20:57:01 +00:00
Eric Engestrom
89666be1b9
nvk+zink/ci: add another flake seen in nightly
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29601 >
2024-06-07 20:47:01 +00:00
Eric Engestrom
46247b3827
v3d/drm-shim: emulate a rpi4 instead of a rpi3
...
7278 is the chip on the rpi3, while the rpi4 that made it to market has
the 2711 chip.
When this was introduced (82bf1979 ), the rpi4 was probably still in
flux, which is why the rpi3 chip was put there (and v3d doesn't care
about that, but v3dv does).
cc: mesa-stable
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29584 >
2024-06-07 20:28:44 +00:00
Mike Blumenkrantz
2a90e16709
zink: add HKP to tiler mode switch
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29609 >
2024-06-07 20:02:19 +00:00
Mike Blumenkrantz
9a28f69ee7
vulkan: Update XML and headers to 1.3.287
...
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29610 >
2024-06-07 19:06:46 +00:00
Craig Stout
d0b3b2eb54
util: os_time: add Fuchsia support
...
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29539 >
2024-06-07 18:29:20 +00:00
C Stout
d39faf7f3d
util: u_dl: add Fuchsia support
...
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Acked-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29539 >
2024-06-07 18:29:20 +00:00
C Stout
2a3f53bd3b
util: os_misc: add Fuchsia support
...
v2: cleaner detect os check (robclark@)
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Acked-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29539 >
2024-06-07 18:29:20 +00:00
C Stout
d6096ce8c8
util: u_thread: add Fuchsia support
...
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Acked-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29539 >
2024-06-07 18:29:20 +00:00
C Stout
ebe4a8d75f
util: detect_os: add DETECT_OS_FUCHSIA and DETECT_OS_POSIX_LITE
...
Fuchsia is a microkernel-like OS. It strategically implements
some POSIX and Unix APIs to promote software re-use.
It considers itself POSIX lite.
"In order to reduce the amount of source modification needed to
run on Fuchsia, Fuchsia offers a POSIX compatibility layer, POSIX
Lite, that this software can target. POSIX Lite is layered on
top of the underlying Fuchsia System ABI as a client library.
However, POSIX Lite is not a complete implementation of POSIX."
In the case of Fuchsia + src/util, these heavy-weight POSIX
functions shouldn't be used:
- file descriptors
- syslog.h
- signals
- process creation
To differentiate POSIX Lite, which Fuchsia and all heavy-weight
POSIX implementations support, add DETECT_OS_POSIX_LITE.
The use case is incrementally upstreaming functionality used in
downstream drivers (lavapipe, ..). Being in-tree for obvious
patches helps until the full driver can be merged.
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Acked-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29539 >
2024-06-07 18:29:20 +00:00
Mike Blumenkrantz
9cdbb099ee
gallium: stop dropping drawid_offset param with util_draw_indirect
...
this breaks indirect draws with offsets
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29462 >
2024-06-07 17:47:53 +00:00
Mike Blumenkrantz
27cd4b061c
gallium: add drawid_offset to draw_mesh_tasks interface
...
this matches the other draw interfaces
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29462 >
2024-06-07 17:47:53 +00:00
Alyssa Rosenzweig
761d79ec3e
agx: fix indirect CF accounting
...
if we have a non-compact indirectly indexed array of scalars
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
30c8d55a71
asahi: extract agx_calculate_vbo_clamp
...
honeykrisp will use.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
ad85c043e7
agx: prepare for lower_wpos_center
...
required for correct sample shading in vk
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
55724ec9aa
asahi: implement rba2 for storage texel buffers
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
71fbd329fc
asahi: implement rba2 for uniform texel buffers
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
e5e3cac409
asahi: move null descriptor routines to common
...
HK will use.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
e08d99063c
asahi: use scalar outputs for rast shaders
...
where applicable, so we can point size lower the result
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
f6439f8c77
asahi: add flag controlling sample mask without MSAA
...
GL vs VK spec difference
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
8998034fa9
agx: switch to combined clip/cull
...
don't swim against the tide.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
24bd46aa10
asahi: pack blend key
...
reduce hashing for fs epilogs, hopefully
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
65e64b6e2d
agx: handle discard with force early tests
...
we need to predicate the store, since we can't do a hardware demote after
running tests. this is similar to what the blob does.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
1dfb461552
asahi: add AGX_TEXTURE_FLAG_CLAMP_TO_0 flag
...
for border colour emulation
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
ff032297de
asahi: support bigger buffer textures
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
b88bcca459
asahi: bounds check eMRT stores
...
this is a hack that fixes faults with eMRT. I do not understand what's going on
here. hopefully we can root cause this at some point :-/
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
152595057c
asahi: force bindless for eMRT
...
the perf difference is neglible and this simplifies the state management.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
e5bc9da499
asahi: add missing lowerings
...
not sure how this worked before.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
a9a6af50a7
agx: rework libagx I/O lowering
...
that would otherwise fight with other driver I/O lowering.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
5f72234745
asahi: split param structs for GS internal kernel
...
this simplifies state management consdierably
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
d3291ad001
agx: fix draw param gather for sw vs
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
3c42d55b15
asahi: be robust against out of sync shader info
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
e49e8fcfee
libagx: add libagx_copy_xfb_counters helper
...
for hk
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
70f043d6c1
libagx: drop unused !indexed path
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
5056ead5d2
libagx: fix triangle fan + prim restart + GS/XFB
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
3e3fd6877b
libagx: fix static assert
...
../src/asahi/lib/shaders/geometry.h:193:1: warning: redefinition of typedef 'static_assertion___line__' is a C11 feature [-Wtypedef-redefinition]
../src/asahi/lib/shaders/libagx.h:45:17: note: expanded from macro 'AGX_STATIC_ASSERT'
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
a412bf0127
libagx: rm unused field
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Alyssa Rosenzweig
18658d8d60
asahi/decode: drop Apple-specific decode check
...
Linux doesn't use a BO list.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29607 >
2024-06-07 16:57:03 +00:00
Vignesh Raman
5d9e650ed6
ci/lava: add farm in structured log files
...
Farm variable is added for devices in collabora farm.
So add support in LAVA job submitter to use this in
structured log files.
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29583 >
2024-06-07 14:32:49 +00:00
Vignesh Raman
cea3aeefd0
ci: add farm variable for devices in collabora farm
...
Add farm variable for devices in the collabora farm so that
the LAVA job submitter uses this in structured log files.
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29583 >
2024-06-07 14:32:49 +00:00
Rhys Perry
5297896856
aco: use ac_get_hw_cache_flags()
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29243 >
2024-06-07 13:22:43 +00:00
Rhys Perry
167b6cac45
ac: stop using radeon_info for ac_get_hw_cache_flags
...
This makes the function easier to use when radeon_info is not available.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29243 >
2024-06-07 13:22:43 +00:00
Rhys Perry
00eccf524f
aco: use GFX12 scope/temporal-hint
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29243 >
2024-06-07 13:22:42 +00:00
Rhys Perry
b41f0f6cc1
aco: use ac_hw_cache_flags
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29243 >
2024-06-07 13:22:42 +00:00
Rhys Perry
cdaf269924
aco: inline store_vmem_mubuf/emit_single_mubuf_store
...
Both of these are only used once.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29243 >
2024-06-07 13:22:42 +00:00
Rhys Perry
185fa04baa
aco/gfx6: set glc for buffer_store_byte/short
...
For the same reason we set it for image stores. GFX6 has a caching bug
which requires this.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29243 >
2024-06-07 13:22:42 +00:00
Rohan Garg
6f6da58315
intel/compiler: fix shuffle generation on LNL
...
There doesn't seem to be a restriction on the mentioned data types on
LNL anymore. Default to a maximum exec size of SIMD16.
This patch fixes dEQP-VK.subgroups.shuffle.framebuffer.* on LNL
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29504 >
2024-06-07 12:51:30 +00:00
Samuel Pitoiset
d4ccae739b
radv: fix creating unlinked shaders with ESO when nextStage is 0
...
When nextStage is 0, the driver needs to assume that a stage might be
used with any valid next stages.
Fixes new dEQP-VK.shader_object.binding.*_no_next_stage.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29567 >
2024-06-07 12:21:38 +00:00
Mark Collins
cc82f7f8ac
tu: Emit GRAS_LRZ_DEPTH_BUFFER_INFO correctly
...
This register stores the depth format of the underlying depth
buffer, it seemingly doesn't change anything about the LRZ buffer
itself and has no behavioral changes over setting it to 0.
However, it's possible that there's some case where it does matter
so matching the proprietary driver's behavior is safer.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
f57f1f70cf
docs/freedreno: Add documentation on A7XX LRZ
...
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
a6f08fd69d
fd/a7xx: Document LRZ_FLIP_BUFFER event
...
I found this while reverse engineering A7XX LRZ, it's going to be
relevant when we implement concurrent binning so I've added the
register definition.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
7ad5bacf7a
tu: Enable LRZ fast-clear for A7XX
...
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
9e936d3fde
tu: Specify LRZ FC depth clear value on A7XX
...
A7XX allows setting the FC depth to an arbitrary F32 value rather
than being limited to 0.0/1.0, we use this to match the depth clear
value.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
15b02f4700
tu: Update LRZ FC dirty clear for A7XX
...
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
db505ea565
tu: Update LRZ FC allocation for A7XX layout
...
The allocation size is now determined based off the LRFC structure
rather than hardcoding in A6XX's layout.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
bf5e8fb394
tu/lrz: Add structure for LRZ FC layout
...
The layout of the LRZ FC section has changed substantially between
A6XX and A7XX so the best way to express the layout was determined
to be a templated structure.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
c801fd9771
tu: Allow LRZ on A7XX
...
LRZ without FC should work with all the current changes.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
e2eda5a9eb
fd/a7xx: Initialize magic register 8008 to 0
...
This can be seen emitted in traces related to FDM on A740, it's set
to zero to ensure there's no side effects from prop writing to it.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
c85cd9c0b0
fd/a7xx: Initialize magic register 8C34 to 0
...
This register is set by prop sometimes, functionality is unknown
at the moment.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
0068e75fc6
tu/lrz: Use actual CHIP rather than hardcoding A6XX
...
A lot of CHIP template parameters were hardcoded to A6XX rather than
the actual chip which would lead to an incorrect command stream being
generated.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
895c091cdd
tu/lrz: Emit GRAS_LRZ_CNTL2 on A7XX
...
The functionality of GRAS_LRZ_CNTL on A6XX was split into GRAS_LRZ_CNTL
and GRAS_LRZ_CNTL2 on A7XX. The only new field is for the Z function to
be specified.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Mark Collins
f592483350
tu/shader: Allow LRZ when write pos with explicit early frag test
...
This is an exceptional case where any writes to gl_Depth should be
ignored, it means we can use LRZ in this case and don't need to
disable it.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29453 >
2024-06-07 10:18:10 +00:00
Alejandro Piñeiro
84b74599cb
v3d,v3dv: document cl_emit_with_prepacked
...
In addition to always being good to have some documentation, it was
added to clarify that if you use the macro to fill up values, it will
not override the values coming from the prepacked buffer, but doing an
OR.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29570 >
2024-06-07 09:44:13 +02:00
Sviatoslav Peleshko
94989b45a5
anv,driconf: Add fake non device local memory WA for Total War: Warhammer 3
...
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8721
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29127 >
2024-06-07 04:14:10 +00:00
Erik Faye-Lund
df17f2b89a
meson: bump test-timeout
...
This tests usually takes around 15 seconds on CI, according to logs. It
recently timed out under load, causing a job to fail spuriously.
Let's bump the timeout here to 60. That's in line with the glsl compiler
warnings test, which usually takes around the same time.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29547 >
2024-06-07 03:38:59 +00:00
Lucas Fryzek
db38a4913e
llvmpipe: query winsys support for dmabuf mapping
...
Fixes #11257 by ensuring winsys mapping functions is only called
if its supported by the winsys, which should prevent llvmpipe from
crashing with kmswast.
If the winsys is kms_swrast then this method will be null, but on
drisw it will be available.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29546 >
2024-06-07 02:42:20 +00:00
Erik Faye-Lund
d0d5fedbab
docs: wrap long words instead of overflowing
...
This fixes rendering on mobile for the 24.1.1 release notes, where we'd
otherwise end up with horizontal scrolling.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29573 >
2024-06-07 02:32:48 +00:00
Yonggang Luo
85ff3f525c
util: Rename DETECT_OS_UNIX to DETECT_OS_POSIX
...
Looking at each usage of DETECT_OS_UNIX, it's more about the POSIX API usage, not the
Unix-like OS, so let's rename it
And for POSIX it's a standard to claim which API present, but for UNIX there is no such thing
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com >
Acked-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29555 >
2024-06-07 01:56:28 +00:00
Eric Engestrom
73cc6c6738
venus/ci: add flake that's been blocking MRs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29590 >
2024-06-07 01:24:26 +00:00
Nanley Chery
de22e20294
anv: Rely more on ISL_SURF_USAGE_DISABLE_AUX_BIT
...
In order to support CCS, ISL may upgrade a main surface from Tile4 to
Tile64 with miptails disabled. To avoid using this space consuming
layout when not needed, inform ISL as soon as possible that compression
won't be used.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29094 >
2024-06-07 00:58:41 +00:00
Nanley Chery
fc57991b66
anv: Support multiple aspects in anv_formats_ccs_e_compatible
...
Prevents the next patch from causing the following assert failure:
Test case 'dEQP-VK.ycbcr.copy.g8_b8_r8_3plane_420_unorm.g8_b8_r8_3plane_444_unorm.linear_linear_disjoint'..
deqp-vk: ../../src/intel/vulkan/anv_private.h:4962: anv_aspect_to_plane: Assertion `!(aspect & ~all_aspects)' failed.
We still disable CCS for multiplane formats elsewhere. I've attempted
enabling CCS for those cases but end up with failures in CI that I
cannot reproduce locally. Hopefully this change gets the next person a
step closer towards enabling this feature.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29094 >
2024-06-07 00:58:41 +00:00
Nanley Chery
14a0f7391d
anv,hasvk: Drop anv_get_isl_format_with_usage
...
Since 3beaaa9ae8 ("anv: drop lowered storage images code"), this
function has not used the VkImageUsageFlags parameter. So, we can drop
it and simplify its callers.
This function isn't used in hasvk.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29094 >
2024-06-07 00:58:41 +00:00
Nanley Chery
3e9dc450a6
anv: Rely on the primary surf usage to disable aux
...
Instead of passing isl_extra_usage_flags to
add_aux_surface_if_supported, use the isl_surf::usage field of the
primary surface to check for ISL_SURF_USAGE_DISABLE_AUX_BIT.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29094 >
2024-06-07 00:58:41 +00:00
Nanley Chery
8e96b516ca
intel/isl: Assert alignments of surface addresses
...
In the import paths in iris, there are several cases where surface VMAs
are created without relying on the calculated surface alignment.
Asserting the alignments of surface addresses, should help catch any
cases where we end up with the wrong alignment.
This found a couple issues during development. One which required a
change to existing code is that when creating uncompressed surfaces from
compressed ones, ISL will sometimes increase the image alignment as a
result of the new format supporting CCS. This patch adds the usage flag
to disable that behavior.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29094 >
2024-06-07 00:58:41 +00:00
Nanley Chery
31560d82ad
iris: Simplify bo import in memobj_create_from_handle
...
Looking at the caller, we only import FDs without modifiers. By
asserting this behavior and dropping the unused cases, we gain some
clarity on the alignment of the imported BO's VMA.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29094 >
2024-06-07 00:58:41 +00:00
Nanley Chery
6b969a4b43
intel/isl: Add and use multi-engine surf usage bits
...
Add and use two new surf usage bits:
* ISL_SURF_USAGE_MULTI_ENGINE_SEQ_BIT: the surface may be accessed by
multiple engines, but not in parallel.
* ISL_SURF_USAGE_MULTI_ENGINE_PAR_BIT: the surface may be accessed by
multiple engines in parallel.
Both usages are not concerned with read-after-read access patterns.
Using these bits allows ISL to conditionally use Tile64 or a 64KB
alignment to account for the gfx12.5 CCS WA from HSD 22015614752. Apart
from the potential space savings, there are three benefits of this
approach:
1) CCS can now be used with miptails (though nothing makes use of this
today).
2) CCS can now be used with 3D depth/stencil surfaces in GL.
3) CCS can now be used with 3D depth/stencil surfaces in Vulkan when
apps only use a single queue.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11111
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11117
Tested-by: Mark Janes <markjanes@swizzler.org >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29094 >
2024-06-07 00:58:41 +00:00
Erik Faye-Lund
3053268fd0
mesa/main: updates for EXT_texture_format_BGRA8888
...
The spec is about to change, so let's prepare for the new and brighter
future.
Reviewed-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27726 >
2024-06-07 00:28:25 +00:00
Eric Engestrom
f81e38e5a9
docs: add sha256sum for 24.0.9
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29588 >
2024-06-07 00:21:41 +00:00
Eric Engestrom
15627f9203
docs: update calendar for 24.0.9
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29588 >
2024-06-07 00:21:41 +00:00
Eric Engestrom
92a44d3907
docs: add release notes for 24.0.9
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29588 >
2024-06-07 00:21:41 +00:00
Nanley Chery
53440554c4
intel/isl: Add and use ISL_MAIN_TO_CCS_SIZE_RATIO_XE
...
In iris, use the CCS scale down factor to calculate the impact of CCS on
TBIMR tile sizes. Even though we fall back to a seemingly less accurate
method to calculate the impact of CCS, it ends up giving the same
answer, 1bpp. Anv already uses this factor, so this patch replaces the
constant with this macro.
There are two benefits to doing this:
1) Consistency between anv and iris.
2) Preparation for a future where we no longer use ISL surfaces to
describe CCS on Xe+. In fact, in iris, we already don't create such
surfaces on ACM.
I considered using INTEL_AUX_MAP_MAIN_SIZE_SCALEDOWN for the calculation
in both drivers, but the naming is aux-map specific and the scaledown
actually exists on flat-ccs platforms as well.
So, we introduce a new macro for all Xe platforms, currently only used
for the specific use case of TBIMR calculations. We can add more such
macros for future platforms, as needed.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28942 >
2024-06-06 23:57:52 +00:00
Nanley Chery
26655a137f
intel/aux_map: Add and use INTEL_AUX_MAP_MAIN_SIZE_SCALEDOWN
...
Introduce a macro so that drivers don't need to rely on the isl_surf
struct to determine the size of the CCS buffer on gfx12.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28942 >
2024-06-06 23:57:52 +00:00
Nanley Chery
4ae50eaf70
intel/aux_map: Add and use INTEL_AUX_MAP_META_ALIGNMENT_B
...
Introduce a macro defining the alignment which aux data start addresses
should have. This alignment is for the worst case of the CCS buffer
being included in a dmabuf. Although a smaller alignment is possible for
non-dmabuf cases on TGL, no drivers would make use of that today as they
place CCS surfaces directly after tiled surfaces.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28942 >
2024-06-06 23:57:52 +00:00
Nanley Chery
e27d951527
intel/aux_map: Add and use INTEL_AUX_MAP_MAIN_PITCH_SCALEDOWN
...
Introduce a macro so that drivers don't need to rely on the isl_surf
struct to determine the pitch of the CCS buffer on gfx12. This is useful
during layout queries of dmabufs.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28942 >
2024-06-06 23:57:52 +00:00
Nanley Chery
e9653b5833
anv: Refactor modifier plane layout queries
...
Before this patch, we special-cased the clear color plane for layout
queries. This was because that plane lacks an ISL surface whereas all
others have one. We plan to drop the ISL surface for CCS buffers on
gfx12 in a future commit. So, in preparation, generalize the clear color
plane code to work for every plane queried on a surface that uses
modifiers.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28942 >
2024-06-06 23:57:52 +00:00
Nanley Chery
0194290bb5
intel/isl: Add and use ISL_DRM_CC_PLANE_PITCH_B
...
At the interfaces which query the pitch of the clear color plane in GL
and Vulkan, we've been returning 64B for various reasons. Unify the
rationale under a macro.
The documentation for the macro is picked from anv, which reflects the
most recently synchronized copy of drm_fourcc.h. See the notable changes
at 8cd8f3d697 .
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28942 >
2024-06-06 23:57:52 +00:00
Friedrich Vock
f1742d36f3
radv/rt: Fix memory leak when compiling libraries
...
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29579 >
2024-06-06 21:56:11 +00:00
Daniel Schürmann
c452a4d1cc
aco/ra: use round robin register allocation
...
Totals from 74681 (94.06% of 79395) affected shaders: (GFX11)
MaxWaves: 2265668 -> 2263546 (-0.09%); split: +0.01%, -0.10%
Instrs: 44941647 -> 44412809 (-1.18%); split: -1.23%, +0.05%
CodeSize: 234173852 -> 232009132 (-0.92%); split: -0.97%, +0.05%
VGPRs: 3033208 -> 3403000 (+12.19%); split: -0.02%, +12.22%
Latency: 305575738 -> 301100302 (-1.46%); split: -1.70%, +0.23%
InvThroughput: 49366070 -> 49020000 (-0.70%); split: -0.91%, +0.21%
VClause: 875748 -> 854930 (-2.38%); split: -2.65%, +0.27%
SClause: 1369614 -> 1327212 (-3.10%); split: -3.43%, +0.33%
Copies: 2887932 -> 2883061 (-0.17%); split: -1.93%, +1.76%
Branches: 885041 -> 885101 (+0.01%); split: -0.01%, +0.02%
VALU: 25218078 -> 25215170 (-0.01%); split: -0.20%, +0.19%
SALU: 4328640 -> 4326052 (-0.06%); split: -0.20%, +0.14%
VOPD: 9129 -> 9611 (+5.28%); split: +7.48%, -2.20%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29235 >
2024-06-06 21:02:15 +00:00
Daniel Schürmann
197943ae27
aco/ra: change heuristic to first fit
...
Totals from 73175 (92.17% of 79395) affected shaders: (GFX11)
MaxWaves: 2217690 -> 2217930 (+0.01%); split: +0.02%, -0.01%
Instrs: 44780731 -> 44784895 (+0.01%); split: -0.14%, +0.15%
CodeSize: 233238960 -> 233255604 (+0.01%); split: -0.11%, +0.12%
VGPRs: 3009116 -> 3007684 (-0.05%); split: -0.29%, +0.24%
Latency: 304320163 -> 304286592 (-0.01%); split: -0.31%, +0.30%
InvThroughput: 49121992 -> 49145025 (+0.05%); split: -0.20%, +0.25%
VClause: 872566 -> 873242 (+0.08%); split: -0.25%, +0.33%
SClause: 1359666 -> 1361640 (+0.15%); split: -0.11%, +0.26%
Copies: 2879649 -> 2881646 (+0.07%); split: -1.13%, +1.20%
Branches: 887102 -> 887093 (-0.00%); split: -0.01%, +0.01%
VALU: 25128240 -> 25128572 (+0.00%); split: -0.12%, +0.12%
SALU: 4328852 -> 4330559 (+0.04%); split: -0.07%, +0.11%
VOPD: 8861 -> 8992 (+1.48%); split: +2.63%, -1.15%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29235 >
2024-06-06 21:02:15 +00:00
Daniel Schürmann
d76fc005b6
aco/ra: re-use registers from killed operands
...
Totals from 77283 (97.34% of 79395) affected shaders: (GFX11)
MaxWaves: 2348498 -> 2348250 (-0.01%); split: +0.01%, -0.02%
Instrs: 45304558 -> 45097367 (-0.46%); split: -0.57%, +0.11%
CodeSize: 235719656 -> 234957768 (-0.32%); split: -0.43%, +0.11%
VGPRs: 3065984 -> 3073244 (+0.24%); split: -0.41%, +0.65%
Latency: 308010576 -> 307008565 (-0.33%); split: -0.85%, +0.52%
InvThroughput: 49560307 -> 49464214 (-0.19%); split: -0.54%, +0.34%
VClause: 881895 -> 879739 (-0.24%); split: -0.78%, +0.53%
SClause: 1388139 -> 1374634 (-0.97%); split: -1.12%, +0.14%
Copies: 2918583 -> 2910434 (-0.28%); split: -1.92%, +1.64%
Branches: 893947 -> 893712 (-0.03%); split: -0.06%, +0.03%
VALU: 25260728 -> 25256766 (-0.02%); split: -0.20%, +0.19%
SALU: 4377750 -> 4373595 (-0.09%); split: -0.17%, +0.07%
VOPD: 8603 -> 9163 (+6.51%); split: +8.54%, -2.03%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29235 >
2024-06-06 21:02:15 +00:00
Daniel Schürmann
b054cfe704
aco/ra: move can_write_m0() check into get_reg_specified()
...
This way, affinities are also covered.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29235 >
2024-06-06 21:02:15 +00:00
Daniel Schürmann
8e817cf52b
aco/ra: refactor get_reg_simple() with increased stride.
...
This should avoid some redundant calls.
Totals from 153 (0.19% of 79395) affected shaders: (GFX11)
Instrs: 301717 -> 301687 (-0.01%); split: -0.06%, +0.05%
CodeSize: 1583080 -> 1582988 (-0.01%); split: -0.06%, +0.05%
VGPRs: 10068 -> 10348 (+2.78%)
Latency: 6685446 -> 6685475 (+0.00%); split: -0.11%, +0.11%
InvThroughput: 999241 -> 999316 (+0.01%); split: -0.01%, +0.02%
VClause: 3868 -> 3870 (+0.05%)
Copies: 23752 -> 23769 (+0.07%); split: -0.27%, +0.34%
Branches: 6479 -> 6480 (+0.02%)
VALU: 179290 -> 179307 (+0.01%); split: -0.04%, +0.04%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29235 >
2024-06-06 21:02:15 +00:00
Daniel Schürmann
1b0edf3f33
aco/ra: Fix array access when finding register for subdword variables
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29235 >
2024-06-06 21:02:15 +00:00
Daniel Schürmann
5326e033ff
aco/ra: fix handling of killed operands in compact_relocate_vars()
...
Found by inspection.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29235 >
2024-06-06 21:02:14 +00:00
Samuel Pitoiset
afa2070c99
radv: initialize compute preambles with the common helper
...
The PM4 mechanism can emit paired packets on GFX11+ when possible.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29452 >
2024-06-06 20:26:47 +00:00
Samuel Pitoiset
3c8b48e310
ac,radeonsi: add a function to initialize compute preambles
...
Preambles are very similar between RADV and RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29452 >
2024-06-06 20:26:47 +00:00
Samuel Pitoiset
428601095c
ac,radeonsi import PM4 state from RadeonSI
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29452 >
2024-06-06 20:26:47 +00:00
Lionel Landwerlin
62c52fb59d
anv: expose VK_MESA_image_alignment_control
...
Our implementation is a no-op for the following reasons :
- ISL always tries to go for the smallest tiling mode (see
isl_surf_choose_tiling())
- In the few cases where we need to use Tile64 for compression
workarounds, VK_MESA_image_alignment_control doesn't require use
to disable compression
- vkd3d-proton has the ability to disable compression using
VK_EXT_image_compression_control, disabling Tile64 requirements
and ensuring ISL can select a 4k tiling mode
So vkd3d-proton should always be able to get a 4k tiling mode if it
wants to.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29175 >
2024-06-06 19:00:47 +00:00
Eric Engestrom
3e7a82968d
nvk+zink/ci: add another flake seen in nightly
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29574 >
2024-06-06 18:49:11 +00:00
Samuel Pitoiset
15fe733703
radv: add a helper to get image VA
...
Similar to buffer, and less error prone.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29428 >
2024-06-06 18:21:33 +00:00
Rhys Perry
4cfb7a0c17
aco: remove support for sub-dword push constants
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29480 >
2024-06-06 17:52:05 +00:00
Rhys Perry
e21312018e
ac/llvm: remove support for sub-dword push constants
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29480 >
2024-06-06 17:52:05 +00:00
Rhys Perry
41c5f71343
radv: lower sub-dword push constants
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29480 >
2024-06-06 17:52:05 +00:00
Rhys Perry
69b7fcd775
ac/nir: support lowering of sub-dword push constants
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29480 >
2024-06-06 17:52:04 +00:00
Yusuf Khan
e7a2127f0e
aux/draw: Use the draw info we get passed in instead of our own
...
Signed-off-by: Yusuf Khan <yusisamerican@gmail.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28641 >
2024-06-06 17:00:18 +00:00
Yusuf Khan
377600b9df
nv50/vbo: wrap draw_vbo to avoid ovehead from multidraw
...
Same as the nvc0 patch pretty much, similar improvement.
Signed-off-by: Yusuf Khan <yusisamerican@gmail.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
---
v2: remove tmp_info as per Karol Herbst suggestion
v3: nv50_draw_vbo -> nv50_draw_single_vbo per Karol's suggestion
v4: mutex assertion and remove num_draws
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28641 >
2024-06-06 17:00:18 +00:00
Yusuf Khan
225f2aac96
nvc0/vbo: wrap draw_vbo for multidraw performance
...
This patch is to avoid the high overhead that exists when trying to
kick ever single draw during multidraw.
glMultiDrawArrays performance profiling:
342.5 thousand draws/second -> 40 million draws/second
Special thanks to Arthur Huillet for helping getting this profiled
in irc.
Signed-off-by: Yusuf Khan <yusisamerican@gmail.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
---
v2: fix typos pointed out by Arthur
v3: nvc0_draw_vbo -> nvc0_draw_single_vbo, intialize count
v4: remove num_draws from wrapped function and add mutex assert
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28641 >
2024-06-06 17:00:18 +00:00
Georg Lehmann
3fb1a64918
aco: move s_add_u32 -> s_addk_i32 optimization fully to ra
...
Having this in one place is better.
When I wrote the old I wasn't aware that checking the kill flag on definitions
is the same as checking zero uses.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29512 >
2024-06-06 16:28:23 +00:00
Georg Lehmann
60f3f0fdbb
aco/ra: use a switch to check vop2acc instruction support
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29512 >
2024-06-06 16:28:23 +00:00
Georg Lehmann
fdc2fb6835
aco: move literal unswizzle opt to RA
...
Much simpler.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29512 >
2024-06-06 16:28:23 +00:00
Georg Lehmann
c63c750380
aco/gfx11+: fix inline constants for v_pk_fmac_f16
...
On newer hardware, the hi operation reads the lo half of the inline constant.
On older hardware, it reads the hi half (zero).
I tested this on Navi31 for gfx11 and Raphael for gfx10.
Foz-DB Navi31:
Totals from 4 (0.01% of 79395) affected shaders:
CodeSize: 36832 -> 36448 (-1.04%)
Latency: 20362 -> 20334 (-0.14%)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29512 >
2024-06-06 16:28:23 +00:00
Georg Lehmann
39380d475a
aco: add affinities for possible sopk optimizations
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29512 >
2024-06-06 16:28:23 +00:00
Georg Lehmann
fac475bc25
aco: rework how affinities for acc operands are determined
...
Improve accuracy by adding a helper that's also used by
the optimization function.
Foz-DB Navi31:
Totals from 50 (0.06% of 79206) affected shaders:
CodeSize: 126148 -> 126128 (-0.02%); split: -0.05%, +0.04%
Latency: 334049 -> 334060 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 59203 -> 59205 (+0.00%)
Copies: 2011 -> 1998 (-0.65%); split: -0.75%, +0.10%
VALU: 14221 -> 14208 (-0.09%); split: -0.11%, +0.01%
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29512 >
2024-06-06 16:28:23 +00:00
Samuel Pitoiset
5b6207b282
radv: only set valid bitfields for CB/DS surfaces address on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29566 >
2024-06-06 15:42:35 +00:00
Samuel Pitoiset
fe78ad2690
radv: fix emitting VGT_PRIMITIVEID_RESET in the GFX preamble on GFX12
...
It's a uconfig register.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29566 >
2024-06-06 15:42:35 +00:00
Samuel Pitoiset
be3c837c04
radv: update configuring COVERAGE_TO_SHADER_SELECT on GFX12
...
This bit has been moved to SPI_PS_INPUT_ENA.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29566 >
2024-06-06 15:42:35 +00:00
Samuel Pitoiset
27496928e4
radv: update configuring depth clamp enable on GFX12
...
DISABLE_VIEWPORT_CLAMP has been moved to a new register.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29566 >
2024-06-06 15:42:35 +00:00
Patrick Lerda
aa79030505
mesa/main: fix stack overflow related to the new mipmap code
...
Indeed, the access to the array is done with a 4x multiplier.
The size of the array should be calculated accordingly.
For instance, this issue is triggered on radeonsi with
"piglit/bin/arb_direct_state_access-gettextureimage-formats -auto -fbo":
==3419==ERROR: AddressSanitizer: stack-buffer-overflow on address 0x7ffc31f804b0 at pc 0x7fac7ef81b2d bp 0x7ffc31f803d0 sp 0x7ffc31f803c8
WRITE of size 1 at 0x7ffc31f804b0 thread T0
#0 0x7fac7ef81b2c in do_span_rgba_unorm8 ../src/mesa/main/mipmap.c:160
#1 0x7fac7ef83549 in do_row ../src/mesa/main/mipmap.c:258
#2 0x7fac7ef83986 in make_2d_mipmap ../src/mesa/main/mipmap.c:371
#3 0x7fac7ef8670b in generate_mipmap_compressed ../src/mesa/main/mipmap.c:1062
#4 0x7fac7ef8670b in _mesa_generate_mipmap ../src/mesa/main/mipmap.c:1119
#5 0x7fac7e5472aa in check_gen_mipmap ../src/mesa/main/teximage.c:2910
#6 0x7fac7e5472aa in check_gen_mipmap ../src/mesa/main/teximage.c:2904
#7 0x7fac7e5472aa in teximage ../src/mesa/main/teximage.c:3315
#8 0x7fac7e5472aa in teximage_err ../src/mesa/main/teximage.c:3342
#9 0x7fac7e550cfa in _mesa_TexImage2D ../src/mesa/main/teximage.c:3413
Address 0x7ffc31f804b0 is located in stack of thread T0 at offset 96 in frame
#0 0x7fac7ef814ff in do_span_rgba_unorm8 ../src/mesa/main/mipmap.c:132
This frame has 3 object(s):
[32, 96) 'result' (line 145) <== Memory access at offset 96 overflows this variable
[128, 384) 'rowA' (line 144)
[448, 704) 'rowB' (line 144)
Fixes: dd8fb7139d ("mesa/main: rewrite mipmap generation code")
Signed-off-by: Patrick Lerda <patrick9876@free.fr >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29572 >
2024-06-06 15:06:12 +00:00
Rhys Perry
8e475bba61
aco: implement nir_intrinsic_nop_amd and nir_intrinsic_sleep_amd
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29466 >
2024-06-06 14:26:52 +00:00
Rhys Perry
1ad05d4ca8
aco: implement nir_atomic_op_ordered_add_gfx12_amd
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29466 >
2024-06-06 14:26:52 +00:00
Rhys Perry
0dee5fdd3c
aco: don't combine vgpr into writelane src0
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29466 >
2024-06-06 14:26:52 +00:00
Rhys Perry
2a4424425a
aco/gfx12: fix s_wait_event immediate
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29466 >
2024-06-06 14:26:52 +00:00
Rhys Perry
26c981b2b8
ac/nir: skip subgroup_id/local_invocation_index lowering for gfx12
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29466 >
2024-06-06 14:26:52 +00:00
Rhys Perry
c651eed1d8
aco/gfx12: implement load_subgroup_id
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29466 >
2024-06-06 14:26:52 +00:00
Rhys Perry
61531b19cd
ac/llvm: implement load_subgroup_id
...
Usually this is lowered in NIR, but GFX12 needs to use an intrinsic.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29466 >
2024-06-06 14:26:51 +00:00
Eric Engestrom
ea5b3bfcd1
radv/ci: move radv manual rules into their own group
...
Makes it easier to re-use.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29550 >
2024-06-06 13:00:04 +00:00
Eric Engestrom
47bd1cff4b
radv/ci: fix manual rules
...
It was set to "always run" for amd common files changes when I obviously
meant for it to be manual and messed up my copy/paste when I wrote that.
Fixes: ebaede788e ("amd/ci: limit radv jobs to radv + aco files changes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29550 >
2024-06-06 13:00:04 +00:00
Samuel Pitoiset
4400ecafa7
Revert "radv/ci: Bring back vkcts-navi21-llvm-valve"
...
This job is consuming CI resources for nothing, it's still broken and
it's completely useless.
This reverts commit 8dc364806e .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29568 >
2024-06-06 12:22:33 +00:00
Karol Herbst
c13d8ac6d6
v3d: add support for load_workgroup_size
...
This is required for ARB_compute_variable_group_size and OpenCL support.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29554 >
2024-06-06 12:01:00 +00:00
Karol Herbst
83883a6cc2
broadcom/compiler: handle load_workgroup_size
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29554 >
2024-06-06 12:01:00 +00:00
Eric Engestrom
3aafe75471
turnip/ci: add a750 flakes seen in the latest nightly
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29569 >
2024-06-06 10:47:53 +00:00
Samuel Pitoiset
e2db42298d
amd/common: add MIN_LOD for texture descriptors on GFX12
...
RADV will need that.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29321 >
2024-06-06 10:15:10 +00:00
Samuel Pitoiset
8cb2cad434
ac,radv,radeonsi: add a function to build texture descriptors
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29321 >
2024-06-06 10:15:10 +00:00
Samuel Pitoiset
4bb308d403
radv: use pipe_format when building image view descriptors
...
This simplifies things before adding a common helper for building
texture descriptors.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29321 >
2024-06-06 10:15:10 +00:00
Iago Toral Quiroga
50e5067be7
v3dv: allow VK_REMAINING_ARRAY_LAYERS in VkImageSubresourceLayers
...
This is allowed with VK_KHR_maintenance5. There are helpers in Mesa
to help with this.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29544 >
2024-06-06 07:12:27 +00:00
Iago Toral Quiroga
5b6495a953
v3dv: fix a few asserts that check layerCount instead of array_layers
...
The intent behind these asserts is to ensure the layer is within
bounds, so we rather check it is within the image layer count than
within the layerCount of the image subresource passed by the API.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29544 >
2024-06-06 07:12:27 +00:00
Iago Toral Quiroga
e1dddfa75a
v3dv: fix pipeline leaks when meta pipeline cache is disabled
...
If the cache is disabled then we need to destroy the pipelines
manually when they are no longer needed. Do that by adding them
as private objects to the command buffer.
Fixes: 4f26303dbb ('v3dv: add debug option to disable custom pipeline caches for meta operations')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29544 >
2024-06-06 07:12:27 +00:00
Rebecca Mckeever
507a714506
panvk: Move vkCmd*Event functions to their own file
...
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29369 >
2024-06-06 06:47:44 +00:00
Rebecca Mckeever
b08a45c042
panvk: Move vkCmdDispatch* functions to their own file
...
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29369 >
2024-06-06 06:47:44 +00:00
Rebecca Mckeever
1f57aae4e4
panvk: Move vkCmdDraw* functions to their own file
...
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29369 >
2024-06-06 06:47:44 +00:00
Rebecca Mckeever
b9f194a6ed
panvk: Move panvk_descriptor_state to bifrost subdir
...
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29369 >
2024-06-06 06:47:44 +00:00
Rebecca Mckeever
d858c42a9d
panvk: Make helper functions panvk_cmd_buffer agnostic
...
Make some helper functions panvk_cmd_buffer agnostic to prepare for moving
them to the bifrost subdirectory.
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29369 >
2024-06-06 06:47:44 +00:00
Rebecca Mckeever
884382d496
panvk: Add push_uniform/constant helpers
...
Add helpers to fill/prepare the push_uniforms array. While at it
move the push_uniforms field out of the descriptor_state.
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29369 >
2024-06-06 06:47:44 +00:00
Rebecca Mckeever
2b5df15597
panvk: Add jm and bifrost dirs
...
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29369 >
2024-06-06 06:47:44 +00:00
Samuel Pitoiset
57d0d63d01
radv: only emit CB_COLOR0_DCC_CONTROL on GFX8
...
This register doesn't exist on GFX6-7 (no DCC at all).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545 >
2024-06-06 07:58:19 +02:00
Samuel Pitoiset
07b0096011
radv: only emit SPI_SHADER_PGM_SRC3_GS on GFX7+
...
This register doesn't exist on GFX6.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545 >
2024-06-06 07:58:00 +02:00
Samuel Pitoiset
4a7150b469
radv: do not set VGT_SHADER_STAGES_EN.DYNAMIC_HS on GFX9
...
This bit doesn't exist.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545 >
2024-06-06 07:58:00 +02:00
Samuel Pitoiset
4a75b50eb8
radv: only emit SQ_PERFCOUNTER_MASK on GFX7-9
...
This register doesn't exist on GFX10-10.3.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545 >
2024-06-06 07:58:00 +02:00
Samuel Pitoiset
96e7ac027c
radv: only emit VGT_GS_MAX_PRIMS_PER_SUBGROUP on GFX9
...
This register doesn't exist on GFX10+.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545 >
2024-06-06 07:58:00 +02:00
Samuel Pitoiset
f62a8f888f
radv: only set valid bitfields for CB/DS surfaces address
...
This isn't a problem in practice but better to mask them out.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545 >
2024-06-06 07:57:59 +02:00
Dave Airlie
726838620e
nvk: Only enable WSI modifiers if the extension is supported.
...
The extension relies on the kernel being new, so don't tell
wsi about it.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11270
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11166
Fixes: e6f77defec ("nvk/wsi: Advertise modifier support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29563 >
2024-06-06 02:15:36 +00:00
Marek Olšák
3d05d86d88
radeonsi/gfx12: add DCC
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
7232995fb5
radeonsi: remove leftover comment of non-existent RADEON_FLAG_MALL_NOALLOC
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
0dad61dfb6
radeonsi: allow RADEON_HEAP_BIT_GL2_BYPASS for VRAM
...
Queries might use it on gfx12.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
e303aae145
radeonsi: remove RADEON_FLAG_READ_ONLY
...
It's not used much and it doubles the number of heaps.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
21d6d44e96
radeonsi: remove cp_to_L2 and L2_to_cp, inline the values
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
c713fc7762
radeonsi: assume si_set_ring_buffer is only used by gfx6-10.3
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
fbc237037c
radeonsi/gfx12: fix GPU deadlocks due to query result incoherency
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
060d5dacfd
ac: add gfx12 DCC shared code
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
1ea96a47cd
ac/nir/lower_ngg: use voffset in global_atomic_add for xfb
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
b002564633
ac/nir/lower_ngg: use global_atomic_amd to fix gfx12 streamout
...
The intrinsics are lowered before this is called.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
5db194b1d1
ac/descriptors: fix gfx12 regressions
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Jordan Justen
e02c6663e9
intel/tools: Fix intel_dev_info --hwconfig switch
...
Since a42a5bf87e , we've been closing the file descriptor immediately
after loading the devinfo struct.
intel_get_and_print_hwconfig_table() re-queries the hwconfig info from
the device to print out all the entries, so we need to leave the fd
open for this use. I moved the close() call to all paths which exit
the for loop's current iteration.
Ref: a42a5bf87e ("intel/devinfo: add an option to pick platform to print")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29549 >
2024-06-06 00:41:13 +00:00
Sagar Ghuge
2dba5d484b
intel/fs: Adjust destination register size for global atomic on Xe2+
...
For 16-bit data type, we are padding 16-bit and using 32-bit data type,
so we need to account for the padded portion while calculating the
size_written.
Rework: (Rohan)
- Drop unnecessary fs_builder instance
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29271 >
2024-06-06 00:18:37 +00:00
Sagar Ghuge
55c7b24899
intel/fs: Adjust destination register size for untyped atomic on Xe2+
...
For 16-bit data type, we are padding 16-bit and using 32-bit data type,
so we need to account for the padded portion while calculating the
size_written.
Rework: (Rohan)
- Drop unnecessary fs_builder instance
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29271 >
2024-06-06 00:18:37 +00:00
Jordan Justen
1fa84d34ef
intel/compiler: Don't set size written in brw_lower_logical_sends.cpp
...
Rework: (Sagar)
- Drop unused variable
Suggested-by: Francisco Jerez <currojerez@riseup.net >
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29271 >
2024-06-06 00:18:37 +00:00
Zach Battleman
ecfe8b0f75
intel/brw: update Wa_1805992985 to use workarounds mechanism
...
Replaced two instances of checking version 11 with the new workaround
mechanism.
Reviewed-by: Mark Janes <markjanes@swizzler.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29560 >
2024-06-05 23:45:33 +00:00
Zach Battleman
ddaa7c4221
intel/brw: update comment to accurately reflect intended behavior
...
Removed mention of Wa_* when referencing an intended harware behavior
since version 12. This will prevent the erroneous usage of the
`intel_needs_workaround` in the future.
Reviewed-by: Mark Janes <markjanes@swizzler.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29559 >
2024-06-05 23:23:30 +00:00
Karol Herbst
fe5b0a4fe3
rusticl/kernel/launch: add helper to bind global buffers
...
At some point I want to create a builder, but that's what I want to do
later.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
17a52774db
rusticl/kernel/launch: get rid of Arc clones for global resources
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
5c1122728a
rusticl/kernel/launch: rework how the printf buffer is allocated
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
25d1f84b57
rusticl/kernel/launch: move allocation of resources vec
...
This way its capacity is actually correct and skips a reallocation.
Also optimize it for the globals vec as well while at it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
bb2453c649
rusticl/kernel: move most of the code in launch inside the closure
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
436122cb10
rusticl/kernel/launch: remove useless upload of the input
...
It's already done right before each launch_grid call, no point in doing it
before the loop.
Fixes: 91552bb4ec ("rusticl: lower huge grids")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
d02dfe0f71
rusticl/kernel/launch: fix mapping usize types to GPU pointer sizes
...
I incorrectly assumed the API side defines how those values are sized, but
it's actually the GPU's pointer size. The API is simply reduced to 32 bit
ranges in 32 bit mode, but has to still pass in 64 bit values to the GPU.
Also use explicit types in a couple of places to prevent such mistakes in
the future.
Fixes: 204c287327 ("rusticl/kernel: properly handle grid and offsets being usize")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Eric Engestrom
4086d3aa38
docs: update calendar for 24.1.1
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29558 >
2024-06-05 22:22:04 +00:00
Eric Engestrom
3c66a88a0a
docs: add sha256sum for 24.1.1
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29558 >
2024-06-05 22:22:04 +00:00
Eric Engestrom
2f41aad910
docs: add release notes for 24.1.1
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29558 >
2024-06-05 22:22:04 +00:00
Iván Briano
1c6a6349b0
intel/brw: always read LAYER/VIEWPORT from the FS payload
...
Following on https://gitlab.freedesktop.org/mesa/mesa/-/issues/9811 the
restriction that kept us from using the payload values for non-mesh
cases is gone, so just use the same codepath for everything.
But since we have functions that correctly read those for all gens, use
those instead of the broken hack we had until now.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9796
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29448 >
2024-06-05 21:52:51 +00:00
Iván Briano
3d071fe7db
intel/brw: add fetch_viewport_index function
...
Like fetch_render_target_array_index(), it reads the values provided by
the FS payload.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29448 >
2024-06-05 21:52:51 +00:00
Lionel Landwerlin
816b21cd87
anv: fix pipeline flag fields
...
Using the wrong type truncate the top bits of the pipeline flags.
Currently we don't have any bit in the top bits so not fixing any bug,
but in the future new extension could add some.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 688bb37552 ("anv: deal with new pipeline flags")
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29553 >
2024-06-05 20:30:16 +00:00
Nanley Chery
53e77cef36
intel/blorp: Allow gfx12 fast-clears without CCS surf
...
I'd like to phase out the ISL surface representation of CCS on gfx120 in
order to enable CCS without a 512B-aligned main surface pitch. Remove
the dependency on CCS ISL surfaces when fast-clearing to move drivers
one step towards that goal.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28536 >
2024-06-05 20:08:26 +00:00
Nanley Chery
18326211c3
intel/blorp: Factor bpb into the fast-clear rect
...
The vertical alignment of the fast-clear rectangle shrinks as the
bits-per-block of the CCS format increases.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28536 >
2024-06-05 20:08:26 +00:00
Eric Engestrom
8f483caffb
v3dv: add missing bounds check in VK_EXT_4444_formats
...
Fixes: fbe4d7ccf4 ("v3dv: implement VK_EXT_4444_formats")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29481 >
2024-06-05 19:10:24 +00:00
David Rosca
d1b794685f
frontends/va: Send all bitstream buffers to driver at once
...
Usually applications will submit one buffer per slice. Instead of
sending it to driver in parts, send all submitted buffers at the
end of vlVaRenderPicture.
Avoids excessive reallocations in driver.
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29131 >
2024-06-05 18:12:02 +00:00
Tapani Pälli
bbe9ab54d4
mesa: remove some conditions in mipmap code
...
This function already asserts that we have ZS format without stencil,
it should be guaranteed to have depth in it.
CID: 1602463
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29534 >
2024-06-05 17:38:23 +00:00
Alejandro Piñeiro
5eee101477
broadcom: move HW-dependant constants to v3d_device_info
...
Right now we have some HW-dependant constants that we are accessing
using the same mechanism that some hw-dependant functions, through a
macro (V3DV_X macro).
But this means that each time that we need to get those constant
values, we need to do a hw version check. Also, right now both the
macro and the defines with each HW value are duplicated on v3d and
v3dv. Also that macro is ugly and has a ugly name.
This commit moves those values to the already common v3d_device_info
structure.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29535 >
2024-06-05 17:14:59 +00:00
Alejandro Piñeiro
b0f3923d8a
v3d/devinfo: unify comment style
...
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29535 >
2024-06-05 17:14:59 +00:00
Juan A. Suarez Romero
bb15ecfc0b
broadcom/ci: update expected results
...
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29551 >
2024-06-05 16:55:46 +00:00
Tapani Pälli
e6b24221af
anv: implement WA 14018283232
...
WA 14018283232 indicates that we need to emit the resource barrier
when the following expression toggles value :
STATE_DEPTH_BOUNDS::depthboundstestenable & 3DSTATE_PS_EXTRA:: Pixel Shader Kills Pixel & 3DSTATE_PS_EXTRA:: Pixel Shader Valid
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29297 >
2024-06-05 15:22:25 +00:00
Rohan Garg
01faec2709
intel/genxml: Add RESOURCE_BARRIER for xe2
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29297 >
2024-06-05 15:22:25 +00:00
Lionel Landwerlin
108e79db1a
anv: factor out some more gpu_memcpy setup
...
We want to have all the setup/workaround in a single spot.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29297 >
2024-06-05 15:22:25 +00:00
Lionel Landwerlin
d98c47ccc3
anv: rewrite Wa_18019816803 tracking to be more like state
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29297 >
2024-06-05 15:22:25 +00:00
Samuel Pitoiset
f7e6609390
radv: assert that GDS/GDS OA buffers can't be created on GFX12
...
No GDS on GFX12 and this will be annoying for some queries that
currently rely on atomic GDS.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
8e9e877eb2
radv: cleanup radv_precompute_registers_hw_{ngg,fs}
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
d5074228ab
radv: do not set VGT_PRIMITIVEID_EN.PRIMITIVEID_EN on GFX12
...
This bitfield doesn't exist.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
87c1b981d9
radv: fix configuring NGG registers on GFX12
...
ac_compute_late_alloc() shouldn't be called on GFX12.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
052655b65d
radv: do not emit SPI_SHADER_PGM_RSRC3_GS on GFX12
...
This register shouldn't be emitted according to RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
e6609fa004
radv: update configuring PA_SC_WINDOW_SCISSOR on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
f6aeb86f35
radv: update configuring depth stencil buffers on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
d9650fef24
radv: update configuring color buffers on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
a06aaef704
radv: update number of input VGPRs for VS on GFX12
...
InstanceID is in VGPR1.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
b912d2f899
radv: configure PA_SC_SAMPLE_PROPERTIES on GFX12
...
MAX_SAMPLE_DIST has been moved from PA_SC_AA_CONFIG.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
aa02cd2a1b
ac,radeonsi: set COLOR_SW_MODE for mutable CB surfaces on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Iago Toral Quiroga
c6cacc5166
v3dv: implement vkGetRenderingAreaGranularityKHR
...
Introduced with VK_KHR_maintenance5, this is equivalent to
vkGetRenderAreaGranularity but for dynamic rendering where
we don't have render passes.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29468 >
2024-06-05 14:21:05 +00:00
Konstantin Seurer
8dc364806e
radv/ci: Bring back vkcts-navi21-llvm-valve
...
Most of the issues were fixed. Let's see how long it will last until it
has to be disabled again.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25293 >
2024-06-05 13:41:47 +00:00
Konstantin Seurer
b100d3f731
ac/llvm: Enable helper invocations for vote_all/any
...
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25293 >
2024-06-05 13:41:47 +00:00
Konstantin Seurer
2b38d4922e
ac/llvm: Fix DENORM_FLUSH_TO_ZERO with exact instructions
...
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25293 >
2024-06-05 13:41:47 +00:00
Eric Engestrom
6889a0a5dd
zink+nvk/ci: add flakes seen in latest nightly run
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29548 >
2024-06-05 11:31:08 +00:00
Eric Engestrom
e1e5663525
docs/meson: replace deprecated pkgconfig with pkg-config
...
See https://mesonbuild.com/Release-notes-for-1-3-0.html#machine-files-pkgconfig-field-deprecated-and-replaced-by-pkgconfig
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29505 >
2024-06-05 10:54:25 +00:00
Samuel Pitoiset
964f2b8140
radv: fix VRS subpass attachments with mipmaps
...
On GFX10.3, the driver should use the VRS image view provided by the
rendering state because it sets the base level correctly. On GFX11+,
using the image view dimension is enough.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29531 >
2024-06-05 06:14:10 +00:00
Kevin Chuang
9f22b31ce8
anv: toggle meshShaderQueries based on whether we support mesh_shader or not
...
Fixes: 4c7f51d3 ("anv: implement mesh shader queries")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29538 >
2024-06-05 04:35:11 +00:00
Timothy Arceri
39cc1a4ac4
glsl: add support for glsl es 310/320 to standalone compiler
...
This simple helps detect if we are using es or not.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29522 >
2024-06-04 23:01:49 +00:00
Yiwei Zhang
000d2d0b96
venus: defer qfb buffer init upon query being used
...
Previously the qfb mem alloc can exceed open fd limit, failing the
renderer side blob mem export.
Fixes: c97f9193ef ("venus: drop internal memory pools")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29540 >
2024-06-04 22:39:30 +00:00
Karol Herbst
abb1518bfd
rusticl/icd: make sure returned function pointers are of the right type
...
For extensions in the official CL headers this isn't all that important as
those are quite stable, but once we implement ext extensions it's better
to catch changes at compile time.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29526 >
2024-06-04 20:32:02 +00:00
Sergi Blanch Torne
c95d791c5e
Revert "ci: disable Collabora's farm due to maintenance"
...
This reverts commit 065ad0f271 .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29524 >
2024-06-04 18:17:57 +00:00
Sagar Ghuge
415c5ad989
intel/compiler: No need to re-type the destination register
...
For 16-bit float case handling, intermediate destination register is
already 32-bit wide, we don't have to retype it to 32-bit.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29506 >
2024-06-04 18:07:44 +00:00
José Roberto de Souza
1e0a0b4dd5
anv: Initialize variable to fix static analyzer warning
...
Static analyzer is complaning that tex_src could be not initialized
and then used, this should not happen as an instruction with type of
'tex' type needs to have source a texture handle.
But to make static analyzer happy here just initializing it to zero.
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29530 >
2024-06-04 17:38:17 +00:00
Georg Lehmann
75b1fa9263
nir/opt_algebraic: alternative 8bit pack_[us]norm_4x8 lowering
...
Foz-DB Navi21:
Totals from 42 (0.05% of 79395) affected shaders:
Instrs: 2709529 -> 2705848 (-0.14%)
CodeSize: 14720732 -> 14711384 (-0.06%); split: -0.06%, +0.00%
VGPRs: 4096 -> 4104 (+0.20%)
Latency: 17907612 -> 17904468 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 4723551 -> 4722649 (-0.02%); split: -0.02%, +0.00%
Copies: 223516 -> 219819 (-1.65%)
Branches: 109578 -> 109594 (+0.01%); split: -0.00%, +0.02%
VALU: 1730848 -> 1727151 (-0.21%)
Tested-by: Ian Romanick <ian.d.romanick@intel.com >
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28882 >
2024-06-04 17:00:29 +00:00
Georg Lehmann
f66883a875
nir: lower pack_uvec4_to_uint to pack_32_4x8 if supported
...
Foz-DB Navi31:
Totals from 42 (0.05% of 79395) affected shaders:
Instrs: 3326544 -> 3324640 (-0.06%)
CodeSize: 16908376 -> 16896212 (-0.07%); split: -0.07%, +0.00%
VGPRs: 4284 -> 4296 (+0.28%)
Latency: 17862544 -> 17855438 (-0.04%); split: -0.05%, +0.01%
InvThroughput: 3535291 -> 3533993 (-0.04%); split: -0.04%, +0.00%
VClause: 95270 -> 95275 (+0.01%); split: -0.01%, +0.01%
SClause: 65402 -> 65397 (-0.01%)
Copies: 229723 -> 234124 (+1.92%)
Branches: 109481 -> 109518 (+0.03%); split: -0.00%, +0.04%
PreVGPRs: 3879 -> 3909 (+0.77%)
VALU: 1789208 -> 1787370 (-0.10%); split: -0.10%, +0.00%
SALU: 409136 -> 409129 (-0.00%); split: -0.00%, +0.00%
Tested-by: Ian Romanick <ian.d.romanick@intel.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28882 >
2024-06-04 17:00:29 +00:00
Georg Lehmann
a3f77e09a1
ac: set has_pack_32_4x8
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28882 >
2024-06-04 17:00:29 +00:00
Faith Ekstrand
1604ab0ef7
dozen: Advertise VK_EXT_shader_replicated_composites
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
4db99332f3
lavapipe: Advertise VK_EXT_shader_replicated_composites
...
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
f8290aea48
turnip: Advertise VK_EXT_shader_replicated_composites
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
bf9038b3b8
radv: Advertise VK_EXT_shader_replicated_composites
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
705dc133c2
hasvk: Advertise VK_EXT_shader_replicated_composites
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
a7db1e80d0
anv: Advertise VK_EXT_shader_replicated_composites
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
d805ffd1a4
nvk: Advertise VK_EXT_shader_replicated_composites
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
c452143024
spirv: Implement SPV_EXT_replicated_composites
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
fff42bcc66
spirv: Assert that non-vector composites have the right length
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
8fa46b31a8
spirv: Handle constant cooperative matrices in OpCompositeExtract
...
Fixes: b98f87612b ("spirv: Implement SPV_KHR_cooperative_matrix")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
7e6cd395c7
nir: Handle cmat types in lower_variable_initializers
...
Fixes: b98f87612b ("spirv: Implement SPV_KHR_cooperative_matrix")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
c2ab522360
spirv: Update the JSON and headers
...
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Faith Ekstrand
5e01f9848b
vulkan: Update XML and headers to 1.3.286
...
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509 >
2024-06-04 16:34:48 +00:00
Kevin Chuang
4c7f51d3b4
anv: implement mesh shader queries
...
Mesh shader queries include mesh-primitives-generated count and
task/mesh shader pipeline statistics.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29523 >
2024-06-04 16:24:48 +00:00
Kevin Chuang
b69f7f625b
anv: Update pipeline statistics mask for task/mesh shader invocations
...
Since VkQueryPipelineStatisticFlagBits is extended by two bits for
task/mesh shader invocations, ANV_PIPELINE_STATISTICS_MASK should be
defined conditionally based on GFX_VER.
This commit modifies the mask and updates the vk_pipeline_stat_to_reg
array accordingly.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29523 >
2024-06-04 16:24:48 +00:00
Kevin Chuang
d07321e3d8
intel/genxml: add task/mesh shader statistics registers
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29523 >
2024-06-04 16:24:48 +00:00
Lionel Landwerlin
d9567b5ee4
anv: fix Gfx9 fast clears on srgb formats
...
Only MCS surfaces are affected because SRGB format are not listed as
supporting CCS compression.
Fixes CTS test :
dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.*_srgb_*sample_count_*
dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.*srgb*
This is similar to what we did in Iris in f8961ea0 ("iris: Disable
sRGB fast-clears for non-0/1 values").
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10003
Fixes: 4cfb4f7d12 ("anv: support fast color clears on vkCmdClearAttachments")
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29518 >
2024-06-04 16:12:32 +00:00
Georg Lehmann
18a0ff137f
nir: sink/move inverse_ballot like moves
...
It's just a copy for the backends that don't lower it.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29502 >
2024-06-04 15:40:57 +00:00
Georg Lehmann
818ff03865
aco: optimize branching sequence with p_create_vector exec producer
...
This happens with inverse_ballot and wave64.
Foz-DB Navi21:
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 2689 -> 2683 (-0.22%)
CodeSize: 14988 -> 14972 (-0.11%)
Latency: 20207 -> 20204 (-0.01%)
Copies: 144 -> 141 (-2.08%)
Branches: 76 -> 73 (-3.95%)
SALU: 241 -> 238 (-1.24%)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29502 >
2024-06-04 15:40:57 +00:00
Georg Lehmann
690f880d18
nir/opt_uniform_atomics: handle inverse_ballot when detecting single lane ifs
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29502 >
2024-06-04 15:40:57 +00:00
bbhtt
4f5503fa2d
nvk: Clean up unused header from libdrm_nouveau
...
This was added in 6e0089307e without a
dependency on libdrm_nouveau. If libdrm is not compiled with nouveau
enabled, the build errors here.
This is currently unused and since
821f4c8d99 removed dependency on
libdrm_nouveau, this should be gone too.
Fixes: 821f4c8d99 ("nouveau: import libdrm_nouveau")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29517 >
2024-06-04 15:24:40 +00:00
Rob Clark
46322630f1
gallium/tc: Allow replacement if replacing valid_range
...
If a buffer upload replaces the entire valid_buffer_range, we can
promote the update to DISCARD_WHOLE_RESOURCE. This helps badly behaved
apps which constantly upload to the same offset (but are overwriting
the entire valid range each time).
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29507 >
2024-06-04 14:49:56 +00:00
Rob Clark
27dd3807a8
freedreno: Use buffer replacement limit
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29507 >
2024-06-04 14:49:56 +00:00
Rob Clark
4c469b7cf0
gallium/tc: Add optional buffer replacement limit
...
Allow drivers to limit the amount of replacement buffers created, to
avoid runaway memory scenarios.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29507 >
2024-06-04 14:49:56 +00:00
Iago Toral Quiroga
0311ac50ad
v3dv: implement vkGetDeviceImageSubresourceLayoutKHR
...
Added with VK_KHR_maintenance5.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29472 >
2024-06-03 07:59:21 +00:00
Iago Toral Quiroga
b882cf2ae3
v3dv: add a get_image_subresource_layout helper
...
We want to use this helper to implement VkDeviceImageSubresourceInfoKHR.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29472 >
2024-06-03 07:59:21 +00:00
Iago Toral Quiroga
bf4a8a5c5a
v3dv: refactor create_image
...
So we can have a single internal helper we can use to create
any type of image.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29472 >
2024-06-03 07:59:21 +00:00
Iago Toral Quiroga
cccdaab4ef
v3dv: implement vkGetImageSubresourceLayout2KHR
...
Added with VK_KHR_maintenance5.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29472 >
2024-06-03 07:59:21 +00:00
Sergi Blanch Torne
dfabed2fc9
Uprev Piglit to cf8daaf5ba90fc9b8a0e144355026e2a14c79944
...
e180f96239...cf8daaf5ba
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29364 >
2024-06-03 06:58:28 +00:00
Sergi Blanch Torne
065ad0f271
ci: disable Collabora's farm due to maintenance
...
Planned downtime in the farm:
* Start: 2024-06-03 07:00 UTC
* End: 2024-06-03 13:00 UTC
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29486 >
2024-06-03 06:06:44 +00:00
Timothy Arceri
8112d44b94
lima: remove the standalone compiler
...
This is mostly a revert of cc78a42577 but we leave the meson tools
option as there is now a disassem tool.
This standalone compiler is unmaintained. The replacement is using
drm_shim which goes through the maintained/tested path.
Reviewed-by: Erico Nunes <nunes.erico@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29494 >
2024-06-03 00:25:44 +00:00
David Heidelberg
a79a2486c7
ci: propagate RUSTICL_ENABLE and DEBUG variables to the DUTs
...
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29513 >
2024-06-02 07:13:33 +00:00
David Heidelberg
0b54ccff57
ci/lava: the containers take sometimes more than 60m
...
It's sad, but killing the rebuild because of 60m when it finishes in 70m
it's such a waste. The Marge-bot pipeline will timeout anyway, so no
change here.
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29513 >
2024-06-02 07:13:33 +00:00
David Heidelberg
46dd8b8d89
ci/radv: Document recent flake
...
Probably same as dfe5e56671 and 1f0f76dbdc .
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29514 >
2024-06-02 06:56:57 +00:00
Karol Herbst
bc149e0303
iris: fix PIPE_RESOURCE_PARAM_STRIDE for buffers
...
Iris calls iris_resource_get_param with PIPE_RESOURCE_PARAM_STRIDE
internally now when exporting memory objects. OpenCL's gl_sharing allows
to export buffers as well, which do not have strides.
This fixes the assert being hit there for buffers.
Fixes: 831703157e ("iris: Use resource_get_param in resource_get_handle")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29501 >
2024-06-01 23:35:46 +00:00
David Heidelberg
2620a7064c
ci: move (c)bindgen to own shell script
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29394 >
2024-06-01 20:16:32 +00:00
David Heidelberg
a93932daf0
ci/meson: reuse meson installation
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29394 >
2024-06-01 20:16:32 +00:00
David Heidelberg
24d9c066e2
ci/lava: add support for RustiCL
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29394 >
2024-06-01 20:16:32 +00:00
David Heidelberg
70515de489
ci/arm64: rustify the build
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29394 >
2024-06-01 20:16:32 +00:00
David Heidelberg
a77d953e20
mailmap: update my email
...
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29511 >
2024-06-01 18:25:28 +00:00
Kevin Chuang
3349963645
anv: Properly handle cases for different query types in copy_query_results_with_shader
...
Like it describes in the comment section of VK_QUERY_TYPE_OCCLUSION,
only occlusion and timestamps queries needs ANV_COPY_QUERY_FLAG_PARTIAL.
VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT is captured by MI commands.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29493 >
2024-06-01 13:05:48 +00:00
Timothy Arceri
71d455b96f
glsl: remove unused detect_recursion_linked()
...
This is now unused as the recursion is now detected via a nir pass.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29495 >
2024-05-31 23:53:07 +00:00
Lionel Landwerlin
724bb7fa15
brw: better model READ_ARF_REG opcode
...
This opcode gets translated to 2 ALU instructions with dependency ALU
stall. This change reproduces the FS_OPCODE_PACK_HALF_2x16_SPLIT
values which is another opcode that generates 2 instructions.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29446 >
2024-05-31 20:22:27 +00:00
Lionel Landwerlin
ac03cefb28
brw: limit dependencies on SR register
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29446 >
2024-05-31 20:22:27 +00:00
Lionel Landwerlin
d8b78924c5
brw: use a single virtual opcode to read ARF registers
...
In 2c65d90bc8 I forgot to add the new SHADER_OPCODE_READ_MASK_REG
opcode to the list of barrier instruction in the scheduler. Let's just
use a single opcode for all ARF registers that need special
scoreboarding and put the register as source (nicer for the debug
output).
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 2c65d90bc8 ("intel/brw: ensure find_live_channel don't access arch register without sync")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29446 >
2024-05-31 20:22:27 +00:00
Francisco Jerez
588c725f27
intel/xe2+: Enable native 64-bit integer arithmetic.
...
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148 >
2024-05-31 09:14:01 -07:00
Ian Romanick
7b7e5cf5d4
nir/algebraic: intel/fs: Optimize some patterns before lowering 64-bit integers
...
v2: Add some comments explaining some of the nuance of the shift
optimizations. Fix a bug in the shift count calculation of the upper
32-bits. Move the @64 from the variable to the opcode. All suggested
by Jordan.
No shader-db changes on any Intel platform.
fossil-db:
Meteor Lake and DG2 had similar results. (Meteor Lake shown)
Totals:
Instrs: 154507026 -> 154506576 (-0.00%)
Cycle count: 17436298868 -> 17436295016 (-0.00%)
Max live registers: 32635309 -> 32635297 (-0.00%)
Totals from 42 (0.01% of 632575) affected shaders:
Instrs: 5616 -> 5166 (-8.01%)
Cycle count: 133680 -> 129828 (-2.88%)
Max live registers: 1158 -> 1146 (-1.04%)
No fossil-db changes on any other Intel platform.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148 >
2024-05-31 09:13:23 -07:00
Ian Romanick
4834df82e2
nir/algebraic: More patterns to generate iadd3
...
I noticed some shaders with patterns similar to these while working on
cooperative matrix lowering.
Meteor Lake and DG2 are the only platforms that support iadd3, so there
were no shader-db or fossil-db changes on any other platforms.
shader-db:
Meteor Lake and DG2 had similar results. (Meteor Lake shown)
total instructions in shared programs: 19869445 -> 19868343 (<.01%)
instructions in affected programs: 419426 -> 418324 (-0.26%)
helped: 913 / HURT: 2
total cycles in shared programs: 936010029 -> 935909811 (-0.01%)
cycles in affected programs: 31746523 -> 31646305 (-0.32%)
helped: 495 / HURT: 356
LOST: 10
GAINED: 12
fossil-db:
Meteor Lake and DG2 had similar results. (Meteor Lake shown)
Totals:
Instrs: 154514596 -> 154505466 (-0.01%); split: -0.01%, +0.00%
Cycle count: 17540226067 -> 17436266198 (-0.59%); split: -0.63%, +0.04%
Spill count: 146887 -> 146886 (-0.00%)
Fill count: 272499 -> 272489 (-0.00%); split: -0.01%, +0.00%
Max live registers: 32634290 -> 32634739 (+0.00%); split: -0.00%, +0.00%
Max dispatch width: 5550128 -> 5550368 (+0.00%)
Totals from 4401 (0.70% of 632560) affected shaders:
Instrs: 3095239 -> 3086109 (-0.29%); split: -0.30%, +0.00%
Cycle count: 7327352564 -> 7223392695 (-1.42%); split: -1.51%, +0.10%
Spill count: 28105 -> 28104 (-0.00%)
Fill count: 45830 -> 45820 (-0.02%); split: -0.04%, +0.02%
Max live registers: 264376 -> 264825 (+0.17%); split: -0.05%, +0.22%
Max dispatch width: 43768 -> 44008 (+0.55%)
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148 >
2024-05-31 09:13:23 -07:00
Ian Romanick
f1b941aaec
nir/search: Refactor is_16_bits
...
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Suggested-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148 >
2024-05-31 09:13:23 -07:00
Ian Romanick
6e53be2a0a
nir/search: Fix is_16_bits for vectors
...
Require that all elements of a vector be representable as either
int16_t or uint16_t.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Fixes: 7ef45e661f ("intel/fs: Add constant propagation for ADD3")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148 >
2024-05-31 09:13:23 -07:00
Ian Romanick
22095c60bc
nir/algebraic: Add nir_lower_int64_options::nir_lower_iadd3_64
...
This allows us to not generate 64-bit iadd3 on Intel but continue
generating it for NVIDIA.
No shader-db or fossil-db changes.
v2: Add nir_lower_iadd3_64 flag so we can continue to generate 64-bit
iadd3 on NVIDIA platforms.
v3: s/bit_size == 64/s == 64/. This cut-and-paste bug prevented any of
the optimizations from ever occuring.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148 >
2024-05-31 09:13:23 -07:00
David Heidelberg
fdc483df25
ci/etnaviv: remove duplicated line from skips
...
Fixes: fb1068c668 ("ci/etnaviv: skip Vulkan tests on GC2000")
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29503 >
2024-05-31 07:36:59 -07:00
Karol Herbst
6f713a764f
rusticl/event: fix deadlock when calling clGetEventProfilingInfo inside callbacks
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11243
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29483 >
2024-05-31 12:52:52 +00:00
Eric Engestrom
14ec84da17
zink+nvk/ci: add flakes seen in latest nightly run
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29500 >
2024-05-31 12:34:30 +00:00
Turo Lamminen
6796396257
radv: Optimize memcpy in write_image_descriptor
...
The size parameter can only take certain values. Make this visible to
the compiler to encourage it to inline the memcpy.
This improves descriptor_16combined_sampler from vkoverhead
considerably.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27191 >
2024-05-31 11:50:46 +00:00
Eric Engestrom
75849bd428
radv/ci: document angle regressions from !29436 on stoney
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29498 >
2024-05-31 11:26:16 +00:00
Jose Maria Casanova Crespo
f32a258503
v3d: really fix CLE MMU errors on 7.1HW Rpi5
...
Macro values that define values for different HW generations should
use the V3DV_X helper instead of being defined under a V3D_VERSION #if
condition.
Without this change, the original V3D_CLE_READAHEAD and
V3D_CLE_BUFFER_MIN_SIZE definitions used were only working for 4.2 HW.
For the 7.1 HW (RPi5) the 4.2 definitions were applied.
The CLE MMU errors were hidden as they were reported at dmesg as
"MMU error from client PTB (1) at 0x1884200, pte invalid" instead of
client CLE. So fixes all v3d dmesg warnings for PTB MMU errors on RPi5.
With this change we really don't need different functions per HW generation,
so we rename back file v3dx_cl.c to v3d_cl.c. As before, we can use
only the packets definitions for 4.2 HW as they use the same opcode as 7.1 HW.
Fixes: 11dce2ac81 ("v3d: fix CLE MMU errors avoiding using last bytes of CL BOs.")
Fixes: e2c624e74e ("v3d: Increase alignment to 16k on CL BO on RPi5")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29496 >
2024-05-31 10:32:27 +00:00
Jose Maria Casanova Crespo
07d3d55783
v3dv: really fix CLE MMU errors on 7.1HW Rpi5
...
Macro values that define values for different HW generations should
use the V3DV_X helper instead of being defined under a V3D_VERSION #if
condition.
Without this change, the original V3D_CLE_READAHEAD and
V3D_CLE_BUFFER_MIN_SIZE definitions used were only working for 4.2 HW.
For the 7.1 HW (RPi5) the 4.2 definitions were applied.
The CLE MMU errors were hidden as they were reported at dmesg as
"MMU error from client PTB (1) at 0x1884200, pte invalid" instead of
client CLE. So fixes all v3dv dmesg warnings for PTB MMU errors on RPi5.
With this change we really don't need different functions per HW generation,
so we rename back file v3dvx_cl.c to v3dv_cl.c. As before, we can use
only the packets definitions for 4.2 HW as they use the same opcode as 7.1 HW.
It fixes also an indentation error introduced with 26c8a5cd72 .
Fixes: bb77ac983e ("v3dv: Increase alignment to 16k on CL BO on RPi5")
Fixes: 26c8a5cd72 ("v3dv: fix CLE MMU errors avoiding using last bytes of CL BOs.")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29496 >
2024-05-31 10:32:27 +00:00
Georg Lehmann
dcab408a6c
nir: remove unpack_half_flush_to_zero
...
It doesn't make sense to have two sets of opcodes for this when all backends
that support the flush_to_zero variant just rely on the global floating point
mode anyway.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29433 >
2024-05-31 09:46:35 +00:00
Lionel Landwerlin
a1ea0956b4
intel: fix HW generated local-id with indirect compute walker
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 5e7f4ff97f ("intel: Add driver support for hardware generated local invocation IDs")
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29473 >
2024-05-31 08:44:22 +00:00
Samuel Pitoiset
d4b37eca5f
radv: do not set DX10_CLAMP on GFX12
...
This bit doesn't exist.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
407cbd8c87
radv: update configuring GS_VGPR_COMP_CNT on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
671329a934
radv: configure SPI_SHADER_GS_OUT_CONFIG_PS on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
00361d1ece
radv: configure PA_SC_HISZ_CONTROL on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
1f078f02d1
radv: update configuring SPI_PS_IN_CONTROL on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
640613f5a3
radv: update configuring GE_CNTL.PRIM_GRP_SIZE_GFX11 on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
0412b8c02b
radv: update configuring SPI_SHADER_PGM_RSRC4_{HS,GS,PS} on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
50df855fba
radv: update configuring SPI_SHADER_PGM_LO_ES on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
4f77fde475
radv: update configuring SPI_SHADER_PGM_LO_LS on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
8dbd353606
radv: mark all images coherent with TC L2 on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
2786928ce8
radv: do not flush L2 metadata on GFX12
...
This doesn't seem to exist.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
b795685da2
radv: update configuring the attribute ring on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
e080ce9004
radv: do not enable MEM_ORDERED on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
9a55198186
radv: configure DB_RENDER_CONTROL to zero on GFX12
...
This register shouldn't have any effects.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Samuel Pitoiset
b1abbfb893
radv: configure DB_Z_INFO.NUM_SAMPLES on GFX12
...
Similar to GFX11.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482 >
2024-05-31 08:02:33 +00:00
Yiwei Zhang
1e0b838c7b
anv: use os_get_option instead of getenv
...
so that the queue count override logic can catch Android system
properties.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29492 >
2024-05-31 07:04:07 +00:00
Timothy Arceri
ce43d7eb7f
lima: drop unrequired opt from standalone compiler
...
In 0f0fa64eed do_mat_op_to_vec() was moved out of the linker and into
the compiler so there is no reason to call it again.
Reviewed-by: Erico Nunes <nunes.erico@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29470 >
2024-05-31 00:24:03 +00:00
Jordan Justen
84216abd94
Revert "anv/grl: Set INTEL_FORCE_PROBE=* when running intel_clc"
...
We now use a separate code path to get devinfo for running intel_clc,
so we don't need to set the INTEL_FORCE_PROBE env-var.
This reverts commit aa152ef431 .
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29445 >
2024-05-30 22:28:50 +00:00
Jordan Justen
43f795d19f
intel/dev: If building the driver, always allow getting device info
...
Now that we know when we are getting the devinfo as part of the build
process, we can just always force the devinfo to be returned,
regardless of whether INTEL_FORCE_PROBE is set.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29445 >
2024-05-30 22:28:50 +00:00
Jordan Justen
fbf5ea6b44
intel/dev: Silence INTEL_FORCE_PROBE warning for intel_clc
...
Running intel_clc as part of the build doesn't need to issue this
warning.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29445 >
2024-05-30 22:28:50 +00:00
Kenneth Graunke
fbe0f8d36d
intel/brw: Blockify convergent load_shared on Gfx11-12 as well
...
Gfx11-12 can support SLM block loads via OWord Block Load messages
(notably, the aligned version, not the unaligned version).
A while back we deleted the SHADER_OPCODE_OWORD_BLOCK_READ opcode.
Rather than bring it back, we continue using UNALIGNED_OWORD_BLOCK_READ
for SLM block access (like we do for SSBOs) but switch it over to the
aligned variant when lowering logical sends. We do ensure the alignment
is at least 16B, however. This is ugly, but it's probably not worth
bringing back a whole extra opcode for a legacy HDC block load quirk.
References: BSpec 47652 and 1689
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9960
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29429 >
2024-05-30 22:01:10 +00:00
Rob Clark
3b1b2d9e6d
ir3: Add some more missing progress accumulation
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29203 >
2024-05-30 21:33:29 +00:00
Mike Blumenkrantz
fc68610f46
ir3: assert that no further optimizations can be done if !progress
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29203 >
2024-05-30 21:33:29 +00:00
Mike Blumenkrantz
37057ce691
ir3: flag progress from nir_lower_io_to_scalar
...
this otherwise fails to revectorize some memory
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29203 >
2024-05-30 21:33:29 +00:00
David Heidelberg
fb1068c668
ci/etnaviv: skip Vulkan tests on GC2000
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29491 >
2024-05-30 21:22:30 +00:00
Rob Clark
0d2168ce0a
vulkan/android: Fix YcbcrRange for !mapper4
...
Setting the range was overlooked when the fallback path was added.
Fixes: 930e4fa283 ("vulkan/android: Fix suggestedYcbcrModel with !mapper4")
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29490 >
2024-05-30 20:59:42 +00:00
Rob Clark
53df014730
tu: Fix imageview + ahb
...
With AHB + external format, we might get VK_FORMAT_UNDEFINED. And at
least with skiavk we might not get a chained VkExternalFormatANDROID.
In this case, just take the format from the image, which will have
already been resolved via VkExternalFormatANDROID when the image was
created.
See VUID-VkImageViewCreateInfo-image-02399
Also see commit 4f7de83110 ("venus: fix view format for ahb image")
for a similar fix.
Fixes the following cts tests:
CtsViewTestCases:
- android.view.cts.PixelCopyTest#testVideoProducer
CtsMediaDecoderTestCases:
- android.media.decoder.cts.DecodeAccuracyTest#testSurfaceViewLargerWidthDecodeAccuracy[50(c2.v4l2.avc.decoder_h264_520x360)]
- android.media.decoder.cts.DecodeAccuracyTest#testSurfaceViewLargerWidthDecodeAccuracy[50(c2.v4l2.avc.decoder_h264_520x360)]
CtsCameraTestCases:
- android.hardware.camera2.cts.MultiViewTest#testTextureImageWriterReaderOperation[1]
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29490 >
2024-05-30 20:59:42 +00:00
Christopher Michael
fa939898bb
broadcom: fix issue of ‘addr’ is used uninitialized
...
This small patch fixes an issue where 'addr' is used uninitialized if
the assert gets removed due to compiling release code and thus
returning uninitialized 'addr'
v2: Modified based on initial review:
a) No need to initialize the 'addr' and 'ret' variables
b) Fix 'ret' variable to be proper type based on hw->get_mem return value
v3: Modified based on additional review:
a) Since both the simulator and mesa have their own version of
'unreachable()' and we cannot use ASSERT for the 'ret' value here,
just use a (void) ret after the assert
Reviewed-by: Eric Engestrom <eric@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29434 >
2024-05-30 20:40:26 +00:00
Ruijing Dong
c1e52baf30
radeonsi/vcn: enable roi feature for vcn5
...
Compared to vcn4, qp map unit is a 32bit number,
vcn5 uses 16bit integer number, in addition to
that it has 2 unit alignment requirement(32 bit
alignment) and each qp value needs left shift 7 bits.
Acked-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423 >
2024-05-30 20:12:37 +00:00
Ruijing Dong
83d0189288
radeonsi/vcn: enable av1 encoding in vcn5
...
Have logic to handle tile allocation
according to vcn5's capability, if the
tile allocation is out of the limit, will
re-adjust the tile parameters.
re-construct frame header and obu instruction
logic. And add av1 encode params requried
for vcn5.
Acked-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423 >
2024-05-30 20:12:37 +00:00
Ruijing Dong
6d90a1baa5
radeonsi/vcn: add header files for vcn5 av1 tile
...
Update header files for av1 tile and delta qp.
vcn5 needs driver and applcation to manage that
while in vcn4 they are managed in FW.
Acked-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423 >
2024-05-30 20:12:37 +00:00
Ruijing Dong
5860d4348a
frontends/va: parsing uniform_tile_spacing flag
...
in order to keep uniform_tile_spacing flag, parsing
it in frontends/va.
Acked-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423 >
2024-05-30 20:12:37 +00:00
Ruijing Dong
250c89dd6d
radeonsi/vcn: share functions between vcn4/vcn5
...
change some local functions to be shared.
Acked-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423 >
2024-05-30 20:12:37 +00:00
Ruijing Dong
0712a5ef96
radeonsi/vcn: apply cdef mode to vcn5
...
When cdef_bits exist from external, use explicit mode,
otherwise, use default cdef mode.
Acked-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423 >
2024-05-30 20:12:37 +00:00
Ruijing Dong
80d3e84b81
radeonsi/vcn: add cdef modes for vcn5 encoding
...
default mode is the cdef id is managed by FW.
explicit mode is using external cdef id.
Acked-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423 >
2024-05-30 20:12:37 +00:00
Ruijing Dong
e20acd605e
radeonsi/vcn: correct tile_size_bytes_minus1
...
Acked-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423 >
2024-05-30 20:12:37 +00:00
Sagar Ghuge
57307df766
iris: Load 32-bit MMIO PREDICATE register from buffer
...
We are writing 32-bit register value to buffer and were reading back
64-bit value back into two register. We don't need to read the second
register in this case.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29389 >
2024-05-30 19:46:42 +00:00
Mike Blumenkrantz
2aaa6ebba1
build/amd: add amd-use-llvm build option
...
this allows amd drivers to disable llvm support while still allowing
llvmpipe/lavapipe to be built
by disabling llvm support in amd drivers, the load times for these drivers
decreases by 5-10ms
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Tested-by: Mike Lothian <mike@fireburn.co.uk >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28969 >
2024-05-30 19:05:00 +00:00
Amit Pundir
38dfbae116
android: Fix zink build failure
...
Otherwise we run into following build error on Android:
ld.lld: error: undefined symbol: galliumvk_driver_extensions
Fixes: cfa955ed78 ("glx/egl: fix LIBGL_KOPPER_DISABLE")
Signed-off-by: Amit Pundir <amit.pundir@linaro.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29475 >
2024-05-30 18:16:59 +00:00
Eric Engestrom
21138f418c
etnaviv/ci: skip VK piglit tests
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29488 >
2024-05-30 18:08:45 +00:00
Eric Engestrom
3ec480825e
panfrost: mark tests as fixed
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29487 >
2024-05-30 17:47:32 +00:00
Eric Engestrom
fbb306df15
panfrost/ci: add missing genxml trigger path
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29487 >
2024-05-30 17:47:32 +00:00
Samuel Pitoiset
72b1fa2ba3
radv: fix configuring the number of patch control points on GFX6
...
Fixes: bf936d0291 ("radv: update configuring the number of patch control points on GFX12")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29485 >
2024-05-30 17:18:54 +00:00
José Roberto de Souza
07855b0431
intel: Compute the optimal preferred SLM size per subslice
...
Up to now preferred SLM size was being set to maximum preferred SLM
size for GFX 12.5 platforms and to workgroup SLM size for Xe2 but
neither of those values are the optimal.
The optimal value is:
<number of workgroups that can run per subslice> * <workgroup SLM size>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910 >
2024-05-30 16:46:16 +00:00
José Roberto de Souza
fd368f5521
anv: Set maxComputeSharedMemorySize value for Xe2 platforms
...
Xe2 platforms allows for a larger compute shared memory(SLM).
For LNL this limit is 160KB but due to a workaround the limit is 128K.
BSpec: 71053
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910 >
2024-05-30 16:46:16 +00:00
José Roberto de Souza
ddda68bbf5
intel: Set preferred SLM allocation size >= than SLM size for Xe2
...
Xe2 has 2 requirements for preferred SLM size:
- this value needs to be >= then SLM size
- this value must be less than shared SLM/L1$ RAM in the sub-slice of platform
Also Xe2 don't have the special '0' encode that sets preferred SLM
allocation size to the maximum supported.
So here setting a value that is equal or larger than SLM size.
It was always setting SLM_ENCODES_128K for LNL A0 stepping probably
because of Wa_16018610683 but this restriction applies to all Xe2
platforms, also because of the first restriction mentioned here
this workaround is not being properly implemented, will fix that
in the next patch.
We should have a formula to calculate a preferred SLM allocation size
for gfx125 and Xe2 platfoms but until that this is enough to fix at
least the applications and tests below on LNL:
- GFXBench Aztec Ruins VK
- GravityMark VK
- Wildlife Extreme VK
- 5 crucible tests
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910 >
2024-05-30 16:46:16 +00:00
José Roberto de Souza
c4478ab4e3
intel/dev: Add function to get the number of EUs per subslice
...
This value will be needed to compute preferred SLM size.
User will be added in the next patch.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910 >
2024-05-30 16:46:16 +00:00
José Roberto de Souza
df3ce7add2
intel/dev: Use topology variables to calculate strides in Xe KMD
...
Lets avoid hard-coded values as much as possible.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910 >
2024-05-30 16:46:16 +00:00
José Roberto de Souza
e0af347791
intel/common: Implement preferred SLM encode
...
Preferred SLM has a different encode than SLM allocation size so
adding a function just to encode it, functions call to this new
function will be added in the next patches.
BSpec: 64042
BSpec: 68700
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910 >
2024-05-30 16:46:16 +00:00
José Roberto de Souza
f1ffbd4f51
intel/common: Implement Xe2 SLM encode
...
Xe2 SLM encode don't follow power of two so it needs a table doing
the kb size to value encode.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910 >
2024-05-30 16:46:16 +00:00
José Roberto de Souza
f5f71bae02
intel: Move slm functions from brw_compiler.h to intel_compute_slm.c/h
...
This functions were inlined in a header and duplicated between brw and
elk.
That would be enough reasons to move to a C file but next patches
will add more code to support Xe2 platforms, what would cause more
code to be inlined, duplicating even more code and increasing lib
size.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910 >
2024-05-30 16:46:16 +00:00
Eric Engestrom
357dde47a5
docs/calendar: add 24.2 branchpoint and release candidates schedule
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29484 >
2024-05-30 16:30:34 +00:00
Eric R. Smith
d91d2c275e
panfrost: change default rounding mode for samplers
...
The SamplerDescriptor structure has a field which describes how
floating point coordinates should be converted to fixed point.
Setting this to "true" (which causes round to nearest even) fixes
a failing CTS test.
The CTS test in question is:
dEQP-GLES31.functional.texture.border_clamp.range_clamp.linear_float_color
The OpenGL spec is somewhat vague about how rounding is to be
performed, so it appears both settings should be legal; this may
indicate a problem with the CTS. Nevertheless "round to nearest even"
is probably a better default and since it fixes the failing test we
may as well use it.
Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29464 >
2024-05-30 13:35:26 +00:00
Timur Kristóf
ad033506aa
radv: Ignore mediump IO flag.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29435 >
2024-05-30 12:57:20 +00:00
Timur Kristóf
0ea2bad74d
nir/lower_io: Add option to implement mediump as 32-bit.
...
For drivers that don't lower mediump shader inputs / outputs
to 16-bit, it's better to ignore the mediump flag completely,
letting mediump inputs / outputs work like normal 32-bit IO.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29435 >
2024-05-30 12:57:20 +00:00
Timur Kristóf
be49b02f05
radv: Properly link TCS->TES IO again.
...
This commit makes RADV TCS->TES IO great again.
Fossil DB stats on Navi 21:
Totals from 2634 (3.32% of 79395) affected shaders:
MaxWaves: 56336 -> 56450 (+0.20%)
Instrs: 1670370 -> 1667819 (-0.15%); split: -0.22%, +0.06%
CodeSize: 8675476 -> 8643176 (-0.37%); split: -0.39%, +0.01%
VGPRs: 126776 -> 126608 (-0.13%)
LDS: 10444288 -> 10617856 (+1.66%)
Inputs: 30910 -> 25426 (-17.74%)
Outputs: 27000 -> 21516 (-20.31%)
Latency: 9403584 -> 9391648 (-0.13%); split: -0.25%, +0.12%
InvThroughput: 2127488 -> 2127180 (-0.01%); split: -0.13%, +0.12%
VClause: 33495 -> 34413 (+2.74%); split: -0.32%, +3.06%
SClause: 27905 -> 27879 (-0.09%); split: -0.30%, +0.20%
Copies: 82562 -> 83007 (+0.54%); split: -0.32%, +0.86%
PreSGPRs: 91029 -> 91014 (-0.02%)
PreVGPRs: 108505 -> 108473 (-0.03%); split: -0.06%, +0.03%
VALU: 1088113 -> 1087730 (-0.04%); split: -0.18%, +0.14%
SALU: 182853 -> 179541 (-1.81%); split: -1.82%, +0.01%
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29436 >
2024-05-30 12:28:51 +00:00
Timur Kristóf
2cf7f282df
ac/nir/tess: Adjust TCS->TES output mapping for linked shaders.
...
Instead of relying on driver locations, let's use a prefix sum
of the inputs that the TES reads.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29436 >
2024-05-30 12:28:51 +00:00
Roman Stratiienko
902b142637
turnip/android: Use DETECT_OS_ANDROID in freedreno_rd_output
...
ANDROID definition is not available in some cases.
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29478 >
2024-05-30 11:58:46 +00:00
Roman Stratiienko
6fee2715ce
turnip/android: Use DETECT_OS_ANDROID in tu_device
...
ANDROID definition is not available in some cases.
Fixes: 99753001f3 ("turnip: Support AHardwareBuffer")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11242
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29478 >
2024-05-30 11:58:46 +00:00
Samuel Pitoiset
c1373239f2
radv: allow STORAGE for depth formats
...
Pass all new VKCTS test coverage for D16/D32.
Tested on PITCAIRN, POLARIS10, VEGA10 and NAVI21.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29239 >
2024-05-30 11:30:23 +00:00
Samuel Pitoiset
f9af8e7a2b
radv: do not enable HTILE for depth/stencil storage images
...
STORAGE will be allowed for depth-only formats, but HTILE is unlikely
to be supported.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29239 >
2024-05-30 11:30:22 +00:00
Samuel Pitoiset
b2fd49201e
radv: update VS input VGPRs on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
5636af1702
radv: update SDMA resource type on GFX12
...
It should be 0.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
d4d2578e91
radv: update global graphics shader pointers on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
aa0f9e356f
radv: update NUM_THREAD_FULL bitfields on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
45b6b0cafb
radv: enable GE_CNTL.DIS_PG_SIZE_ADJUST_FOR_STRIP on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
2ac7154189
radv: update configuring VGT_SHADER_STAGES_EN on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
bf936d0291
radv: update configuring the number of patch control points on GFX12
...
GFX12 uses VGT_PRIMITIVE_TYPE instead of LS_HS_CONFIG.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
d6ae8c689e
radv: emit SQ_NON_EVENT packets after drawing with streamout on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
9d50725ffe
radv: disallow merging multiple draws into one wave on GFX12
...
It's not supported.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
f25b2d179e
radv: update emitting stipple line on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
137b49ecd7
radv: update cache flush emission on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
bd95512e0a
radv: do not emulate clear state for shadowed regs on GFX12
...
There is no CLEAR_STATE on GFX12.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
ce6557cc04
aco: adjust loading local invocation ID for GS on GFX12
...
It uses gs_vtx_offset[0] instead.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
06598bc707
radv: update shader input arguments for GS stage on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
10b97836b9
radv: update emitting discard rectangles on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
f518bf1cb0
radv: update binning settings on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
18e6a9a6a8
radv: update configuring tess rings on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
19de04748e
radv: update configuring GFX preamble on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
a12373f462
radv: update configuring MSAA state on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
78e272432b
radv: update configuring occlusion query state on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
61e78fb143
radv: update configuring some CB states on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
b28107f46a
radv: update configuring rasterization states on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
0c019ff028
radv: update configuring DB states on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
f12c236625
radv: update configuring VGT states on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
5b4a50a3b7
radv: update configuring NGG states on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
2f5937dd36
radv: update configuring PS states on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:04 +00:00
Samuel Pitoiset
65df7248ff
radv: update configuring viewport/scissor on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:03 +00:00
Samuel Pitoiset
f015a4f453
radv: update configuring sample locations on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:03 +00:00
Samuel Pitoiset
a8ad33caac
radv: do not emit non-existent registers on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:03 +00:00
Samuel Pitoiset
087e49aadb
radv: enable GS_FAST_LAUNCH_2 by default on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:03 +00:00
Samuel Pitoiset
c6ffde61cc
radv: update NUM_THREAD_FULL bitfields
...
They are similar but it avoids confusion when looking at RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:03 +00:00
Samuel Pitoiset
78b4d356f3
ac,radv,radeonsi: add ac_gpu_info::has_tc_compatible_htile
...
It's apparently not supported on GFX12.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:03 +00:00
Samuel Pitoiset
94a6eb20f9
amd/common: define SDMA v7.0 for GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417 >
2024-05-30 11:05:03 +00:00
Samuel Pitoiset
5ff1e59ba7
radv: only emit streamout enable for legacy streamout
...
Only for GFX6-10.3.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29460 >
2024-05-30 10:43:25 +00:00
Boris Brezillon
6fe5129d3d
panvk: Override the default GetRender[in]AreaGranularityKHR()
...
Expose the real optimal render area granularity to users, so they can
optimize their rendering operations accordingly.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Suggested-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443 >
2024-05-30 12:16:40 +02:00
Boris Brezillon
8c2b4de386
panvk: Make sure replay of command buffers containing Dispatch calls works
...
In order to replay a command buffer, we need to reset the job status
fields of all previously executed jobs, which is done by walking the
the per-batch jobs array.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Cc: stable
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443 >
2024-05-30 12:16:40 +02:00
Boris Brezillon
0142fdf81c
panvk: Make sure we run the fragment shader if alpha_to_coverage is enabled
...
If alpha-to-coverage is enabled, we need to run the fragment shader even
if we don't have a color attachment, so depth/stencil updates can be
discarded if alpha, and thus coverage, is 0.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443 >
2024-05-30 12:16:40 +02:00
Boris Brezillon
98ab2d3436
panvk: Make sure we don't lose clear-only operations
...
The batch might contain just a clear operation on the color/depth/stencil
attachments. We need to make sure fragment jobs are emitted in that
case, which only happens if the framebuffer descriptor is != NULL.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443 >
2024-05-30 12:16:40 +02:00
Boris Brezillon
a1be9ee375
panvk: Fix dynamic rendering with images containing both depth and stencil
...
When the depth or stencil attachment points to an image that contains
both components and only one of those is updated, we need to preload
the other.
We also need to patch the ZS view to use the format with both components
when that happens.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443 >
2024-05-30 12:16:40 +02:00
Boris Brezillon
c82ce475d1
panvk: Skip depth/stencil attachments with non-matching aspect mask
...
Image views passed to the depth or stencil attachment might not have
the according depth/stencil aspect set in the image view. In that case,
we won't be able to preload or write the attachment, so let's just
act as if the attachment wasn't passed.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443 >
2024-05-30 12:16:40 +02:00
Boris Brezillon
e17e285b8f
panvk: Force a preload when the render area is not 32x32 aligned
...
If we don't do that, we lose the content that's outside the defined
render area but inside the 32x32 aligned render area.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443 >
2024-05-30 12:16:40 +02:00
Boris Brezillon
9ff5e56eb7
panvk: Take VK_RENDERING_{RESUM,SUSPEND}ING_BIT flags into account
...
Don't close the current batch when suspending a rendering pass, and
only open a new batch if the cur_batch was closed by a compute job
being queued in the middle.
We also don't re-init the FB info if we're resuming.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443 >
2024-05-30 12:16:40 +02:00
Boris Brezillon
6f8b691c2e
panvk: Add a render state to panvk_cmd_graphics_state
...
We will store information extracted from VkRenderingInfo there instead
of abusing the fb state, which is now part of the render state.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443 >
2024-05-30 12:16:40 +02:00
Rhys Perry
ac47ee1be7
meson: remove --depfile for aco_tests
...
This isn't needed right now and probably doesn't work. glsl_scraper.py
writes to the same depfile several times.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Dylan Baker <dylan@pnwbakers.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29348 >
2024-05-30 09:44:52 +00:00
Karol Herbst
11e85c8ce0
gallium/drivers: do not link against libgalliumvl directly
...
libgalliumvl_stub was added so not all frontends have to link in full
video accleration support, shaving off around 100kB of binary size.
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Acked-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680 >
2024-05-30 08:44:23 +00:00
Karol Herbst
b9ea6a3ab7
wgl: link against libgalliumvl_stub
...
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Acked-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680 >
2024-05-30 08:44:23 +00:00
Karol Herbst
691a22f015
rusticl: link against libgalliumvl_stub
...
Fixes compiling rusticl with certain configurations
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Acked-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680 >
2024-05-30 08:44:23 +00:00
Karol Herbst
b6f281bcb5
meson: centralize galliumvl_stub handling
...
This way frontends can simply link against the stub, but get the full
version if it's actually required (e.g. for radeonsi).
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Acked-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680 >
2024-05-30 08:44:23 +00:00
Karol Herbst
6c9c48a3ae
gallium/vl: remove stubs which are defined in mesa_util
...
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Acked-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680 >
2024-05-30 08:44:23 +00:00
Karol Herbst
95871d48aa
gallium/vl: stub vl_video_buffer_create_as_resource
...
It's used by radeonsi
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Acked-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680 >
2024-05-30 08:44:23 +00:00
Eric Engestrom
467fc985cd
zink+nvk/ci: add flakes seen in latest nightly run
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29471 >
2024-05-30 07:39:40 +00:00
Lionel Landwerlin
fd49b815ce
anv: optimize POSTSYNC_DATA rewrites in timestamp emissions
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438 >
2024-05-30 06:38:04 +00:00
Lionel Landwerlin
3984875792
u_trace: extend tracepoint end_of_pipe bit into flags
...
We ran into an issue with Intel drivers where it became tricky to tell
whether a timestamp must be recorded with a special end-of-pipe
compute instruction or something else.
We initially tried to deal with that internally by checking some state
in the command buffers but turns out it doesn't work.
This change adds a flag field to the tracepoint to have that
information there and the flags are passed to the record_ts vfunc.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438 >
2024-05-30 06:38:04 +00:00
Lionel Landwerlin
265b2b1255
anv: move last compute command pointers to the state structure
...
Makes it easier to clear.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438 >
2024-05-30 06:38:04 +00:00
Lionel Landwerlin
1d4e56d22a
anv: fix timestamp copies from secondary buffers
...
We increased the size of the timestamps but only copied 64bit values
from the secondaries.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438 >
2024-05-30 06:38:04 +00:00
Lionel Landwerlin
1511b25b0f
anv: fix utrace compute walker timestamp captures
...
The output of the POSTSYNC_DATA has to be 32-byte aligned.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438 >
2024-05-30 06:38:04 +00:00
Iago Toral Quiroga
5ec1f7fe38
v3dv: shader modules are deprecated with VK_KHR_maintenance5
...
Instead, API users can pass the VkShaderModuleCreateInfo in the
pNext chain of VkPipelineShaderStageCreateInfo.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29456 >
2024-05-30 06:07:41 +00:00
Karmjit Mahil
6825fc48f5
mailmap: Add Karmjit Mahil
...
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29374 >
2024-05-30 05:55:11 +00:00
Jordan Justen
c1d3fa007c
intel/dev: Add BMG PCI IDs (with FORCE_PROBE set)
...
Ref: bspec 68090
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457 >
2024-05-30 00:32:44 +00:00
Jordan Justen
1964346481
intel/dev: Add BMG device info
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457 >
2024-05-30 00:32:44 +00:00
José Roberto de Souza
25e7b74712
intel/dev: Add BMG stepping mapping
...
Bspec: 68090
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457 >
2024-05-30 00:32:44 +00:00
José Roberto de Souza
d4a180639f
intel/dev: Add LNL stepping mapping
...
Without this mapping no temporary workaround will be applied to LNL.
BSpec: 70821
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457 >
2024-05-30 00:32:44 +00:00
Jordan Justen
06ec218fdf
intel/dev: Add INTEL_PLATFORM_BMG enum, BMG WA info
...
intel/dev/mesa_defs.json also must be updated when the new platform
enum is added.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457 >
2024-05-30 00:32:44 +00:00
Jordan Justen
b2dbed2da0
intel/dev/mesa_defs.json: Update LNL WA entries
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457 >
2024-05-30 00:32:44 +00:00
Kevin Chuang
f8ccf70c99
anv: Properly fetch partial results in vkGetQueryPoolResults
...
Currently for an "unavailable" query, if VK_QUERY_RESULT_PARTIAL_BIT is
set, anv will return (slot.end - slot.begin). This can cause underflow
because slot.end might still be at the initial value of 0.
This commit fixes the issue by returning 0 in that situation.
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29447 >
2024-05-29 18:03:28 +00:00
Karmjit Mahil
7bdcbe11ac
turnip: Remove workaround for CTS bug zero-sized inline uniform block
...
The cts issue was addressed in:
ae8b8a0711
Affected:
dEQP-VK.binding_model.descriptorset_random.*.iublimit*
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29414 >
2024-05-29 17:36:27 +00:00
Juan A. Suarez Romero
a54f7f7dc5
v3d,v3dv: add compatibility revision in GPU name
...
So the version matches exactly the same as reported by the kernel in
`/sys/kernel/debug/dri/128/v3d_ident`, or the version used in the
simulator.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29186 >
2024-05-29 16:23:40 +00:00
Juan A. Suarez Romero
ac7971e7f4
v3d: use screen name in disk cache
...
To keep in sync the GPU name used by the (pipe) screen and disk cache,
use the former in the latter.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29186 >
2024-05-29 16:23:40 +00:00
Rohan Garg
7900ecdfc7
isl: Enable volumetric STC_CCS,HiZ+CCS on gfx12.0
...
The only remaining restriction applies to single sampled 3D textures on
Gen12.0. Move the check to disable CCS on such resources to the right
place.
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646 >
2024-05-29 15:50:23 +00:00
Rohan Garg
b69a34ab66
isl: disable CCS for 3D depth/stencil surfaces when WA is applicable
...
Clarify why 3D Tile64 on depth stencil buffers is unfeasible.
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646 >
2024-05-29 15:50:22 +00:00
Nanley Chery
1891b3db73
intel/isl: Allow sampling from 3D HIZ_CCS_WT
...
The restriction in RENDER_SURFACE_STATE is gone.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646 >
2024-05-29 15:50:22 +00:00
Rohan Garg
309c228bb7
anv: 3D stencil surfaces have fewer layers for higher miplevels
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646 >
2024-05-29 15:50:22 +00:00
Rhys Perry
1829d74ad3
aco: fix fddx/y with uniform inf/nan input
...
inf or nan subtracted by itself is not zero.
I don't think Vulkan requires this, but this better matches NIR's constant
folding and the divergent implementation.
fossil-db (navi31):
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 537 -> 588 (+9.50%)
CodeSize: 3132 -> 3380 (+7.92%)
Latency: 2806 -> 2819 (+0.46%)
InvThroughput: 286 -> 316 (+10.49%)
Copies: 24 -> 39 (+62.50%)
VALU: 262 -> 289 (+10.31%)
SALU: 33 -> 51 (+54.55%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29418 >
2024-05-29 15:18:52 +00:00
Antonio Ospite
09fb55ea92
meson: fix deprecation warning in create-android-cross-file.sh
...
When running .gitlab-ci/container/debian/android_build.sh using the
cross files created by .gitlab-ci/container/create-android-cross-file.sh
meson prints out the following warning:
-----------------------------------------------------------------------
DEPRECATION: "pkgconfig" entry is deprecated and should be replaced by "pkg-config"
-----------------------------------------------------------------------
Use the suggested name `pkg-config` in the cross files to silence the
warning.
Apply the same change also to the example meson cross file in
docs/android.rst
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29431 >
2024-05-29 14:22:39 +00:00
Eric Engestrom
b8f1e95cbe
freedreno/a6xx: fix kernel -> compute handling
...
9b2780dcaf folds the kernel path into the compute path, and then adds
a `compute -> compute` conversion that was very likely meant to be
`kernel -> compute`, so fix that.
Fixes: 9b2780dcaf ("freedreno/a6xx: Re-work fd6_emit_shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29458 >
2024-05-29 13:44:44 +00:00
Georg Lehmann
b04d99d093
aco/optimizer: use p_create_vector to create mask when a copy can't be used
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422 >
2024-05-29 11:59:22 +00:00
Georg Lehmann
2b56a97374
aco/lower_to_hw: optimize split 64bit constant copies
...
Foz-DB Navi21:
Totals from 3209 (4.04% of 79395) affected shaders:
Instrs: 6502065 -> 6496612 (-0.08%)
CodeSize: 35578300 -> 35556596 (-0.06%)
Latency: 66092924 -> 66092668 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 16968953 -> 16968900 (-0.00%); split: -0.00%, +0.00%
SClause: 198651 -> 198647 (-0.00%)
Copies: 597323 -> 591872 (-0.91%)
SALU: 930918 -> 925467 (-0.59%)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422 >
2024-05-29 11:59:22 +00:00
Georg Lehmann
5910a46101
aco/lower_to_hw: use copy_constant_sgpr for masks
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422 >
2024-05-29 11:59:22 +00:00
Georg Lehmann
23d88e68fc
aco: small constant copy optimizations
...
Foz-DB Navi21:
Totals from 13 (0.02% of 79395) affected shaders:
CodeSize: 93432 -> 93376 (-0.06%)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422 >
2024-05-29 11:59:22 +00:00
Georg Lehmann
54ad07c32a
aco/lower_to_hw: add copy_constant_sgpr
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422 >
2024-05-29 11:59:22 +00:00
Georg Lehmann
56354c6cd7
aco: don't pass program to emit_bpermute
...
Also change the param order, because the builder typically comes first.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422 >
2024-05-29 11:59:22 +00:00
Iago Toral Quiroga
98a86f8743
v3dv: lower maxVertexInputBindingStride to match vulkan runtime
...
Since we now use the common vulkan runtime to handle pipeline state and
this sets a limit for this at MESA_VK_MAX_VERTEX_BINDING_STRIDE we should
do the same, or else we can run into an assert-fail in the runtime code.
Fixes:
dEQP-VK.pipeline.monolithic.bind_buffers_2.maintenance5.triangle_list.buffers5.stride_offset_rnd321.whole_size
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29454 >
2024-05-29 11:13:11 +00:00
Alejandro Piñeiro
03554f18b3
v3dv/device: set DescriptorUpdateAfterBind limits
...
We were exposing them as zero, as based on just the name, we assumed
that it was about the descriptors using the
VK_DESCRIPTOR_SET_LAYOUT_CREATE_UPDATE_AFTER_BIND_POOL_BIT bit.
But from spec, that limit takes into account descriptors created *with
or without*, so for example:
"maxPerStageDescriptorUpdateAfterBindUniformBuffers is similar to
maxPerStageDescriptorUniformBuffers but counts descriptors from
descriptor sets created with or without the
VK_DESCRIPTOR_SET_LAYOUT_CREATE_UPDATE_AFTER_BIND_POOL_BIT bit
set."
As we don't support the feature, those limits are the same of the
existing without the DescriptorUpdateAfterBind.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29430 >
2024-05-29 10:35:27 +00:00
Alejandro Piñeiro
d6ac631c43
v3dv/device: compute maxDescriptorSet*Limits multiplying per-stage by 4
...
We were multiplying it by 6, that is the number of possible shader
stages, but from spec it points that we need to multiply by the number
of supported shader stages.
From Vulkan 1.3 spec, chapter 33, "Limits", note 8 on Table 33
"Required Limits":
"The minimum maxDescriptorSet* limit is n times the corresponding
specification minimum maxPerStageDescriptor* limit, where n is the
number of shader stages supported by the VkPhysicalDevice. If all
shader stages are supported, n = 6 (vertex, tessellation control,
tessellation evaluation, geometry, fragment, compute)."
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29430 >
2024-05-29 10:35:27 +00:00
Iago Toral Quiroga
3f3c83a6b7
v3dv: handle VkPipelineCreateFlags2CreateInfoKHR
...
This is added with VK_KHR_maintenance5 to allow 64-bit
for pipeline creation flags.
The flags are backwards compatible so we don't need to
change the flag enum values by the new ones.
This patch also addresses a small issue where compute pipelines
where not initializing the flags field in the pipeline object.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29449 >
2024-05-29 09:40:15 +00:00
Iago Toral Quiroga
5ff01962fc
v3dv: handle VkBufferUsageFlags2CreateInfoKHR
...
This is added with VK_KHR_maintenance5 to allow 64-bit
for buffer usage flags.
The flags are backwards compatible so we don't need to
change the flag enum values by the new ones.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29449 >
2024-05-29 09:40:15 +00:00
Konstantin Seurer
b31919f36e
radv: Return a block from radv_replay_shader_arena_block
...
ret_block is only set to NULL.
Fixes: 28be0cc ("radv: Add locking to radv_replay_shader_arena_block")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29455 >
2024-05-29 09:10:47 +00:00
Erik Faye-Lund
0f7bdc2d36
mesa/main: fixup indent
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386 >
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
e80201a685
mesa/main: prefer non-suffixed enums
...
These are the same enums, we're just sometimes using the old spelling.
Let's be consistent and use the non-EXT/ARB enums instead.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386 >
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
a37333305b
mesa/main: do not return _REV format for uncompressed format
...
Instead of returning the wrong value, and then correct it later on,
let's just return the correct value right away.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386 >
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
b9b4507faa
mesa/main: clean up switch statement
...
This groups the enums by return-value, and makes the table more
compact and easier to scan through.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386 >
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
1ddd043273
mesa/main: clean up _mesa_uncompressed_format_to_type_and_comps
...
No callsites cares about the number of components any more, so let's
remove it. Rename and make it return a single enum instead of passing
return values through pointers while we're at it.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386 >
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
d549d4fa82
mesa/main: rework GL_IMAGE_PIXEL_TYPE query
...
This used to depend on both _mesa_get_shader_image_format() and
_mesa_uncompressed_format_to_type_and_comps() doing a specific mapping
to behave like the spec requires. But only a small subset of what the
latter function does is needed, and that function is used for other
purposes where the needs are dictated by other means.
It's going to be easier to maintain this code if we use different
implementations for these two things.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386 >
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
563b9786ce
mesa/main: remove unused function
...
This has been unused since 8ec6534b26 ("mesa: Use _mesa_format_convert
to implement texstore_rgba."), from October 2014. It took us close to
10 years to notice that it's been unused. Let's remove it :)
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386 >
2024-05-29 06:41:03 +00:00
Samuel Pitoiset
07a826ba93
radv: fix flushing DB meta cache on GFX11.5
...
Only GFX11 is affected by this hw bug.
Found by inspection.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29424 >
2024-05-29 06:21:17 +00:00
Mike Blumenkrantz
bc29d2c9fc
zink: add atomic image ops to the ms deleting pass
...
this otherwise results in nir validation errors
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11209
Fixes: 90cf8d14d6 ("zink: add a pass to strip out multisample storage image ops")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29383 >
2024-05-29 01:51:12 +00:00
Eric Engestrom
8e60f26016
vc4/ci: skip VK piglit tests
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29442 >
2024-05-28 20:24:44 +00:00
Valentine Burley
20f4cd88e1
tu: Advertise VK_KHR_maintenance6
...
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28360 >
2024-05-28 20:02:50 +00:00
Valentine Burley
14d3dd8984
tu: Add support for version 2 of all descriptor binding commands
...
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28360 >
2024-05-28 20:02:50 +00:00
Valentine Burley
94e2c6d000
tu: Add support for NULL index buffer
...
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28360 >
2024-05-28 20:02:50 +00:00
Valentine Burley
7ac6aaf522
tu: Add support for VkBindMemoryStatusKHR
...
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28360 >
2024-05-28 20:02:50 +00:00
Eric Engestrom
06f7407172
ci: disable debian-build-testing until it can be fixed
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29439 >
2024-05-28 19:28:08 +00:00
Jordan Justen
410ca6a3e9
Revert "anv: Disable Ray Tracing on xe2 until our compiler supports Xe2 RT"
...
This reverts commit 65684b0c7f .
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273 >
2024-05-28 18:45:49 +00:00
Jordan Justen
f1b502f8c7
anv/grl: Build for xe2
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273 >
2024-05-28 18:45:49 +00:00
Jordan Justen
4ffe1a9f9e
intel/brw: Fix SSBO/shared load offset register size for Xe2
...
Rework:
* Ken: Reword commit message
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273 >
2024-05-28 18:45:49 +00:00
Jordan Justen
4bc4da01f4
intel/brw: Allow xe2 in brw_stage_has_packed_dispatch()
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273 >
2024-05-28 18:45:49 +00:00
Jordan Justen
739613ec70
intel/brw: Simplify enabling brw_fs_test_dispatch_packing
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Francisco Jerez <currojerez@riseup.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273 >
2024-05-28 18:45:49 +00:00
Jordan Justen
aa152ef431
anv/grl: Set INTEL_FORCE_PROBE=* when running intel_clc
...
In order to build grl, we need to get the device_info struct from the
PCI ID, but for pre-production platforms we don't want to enable them
unless INTEL_FORCE_PROBE is set.
Setting it when running intel_clc allows us to get the device_info
struct when the pre-production hardware is not ready to be enabled by
default.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273 >
2024-05-28 18:45:49 +00:00
Jordan Justen
2217cff68a
pci_ids/intel: Add LNL PCI IDs (with FORCE_PROBE set)
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273 >
2024-05-28 18:45:49 +00:00
Jordan Justen
845ca72a14
intel/dev: Add LNL device info
...
Reworks:
* José: Disable has_integer_dword_mul support (BSpec 56800)
* Rohan: Set has_indirect_unroll
* José: Add PAT settings
* Jianxun: Set has_flat_ccs
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Co-authored-by: José Roberto de Souza <jose.souza@intel.com >
Co-authored-by: Rohan Garg <rohan.garg@intel.com >
Co-authored-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273 >
2024-05-28 18:45:49 +00:00
Jordan Justen
4beab24d69
docs: Document INTEL_FORCE_PROBE env-var
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273 >
2024-05-28 18:45:49 +00:00
Jordan Justen
237d9e7c45
intel/dev: Support INTEL_FORCE_PROBE env-var
...
This environment variable allows some Intel devices that are
unsupported to be forced to run. These devices have incomplete
support, and therefore might not work at all.
Reworks:
* José: Simplify scan_for_force_probe() with strtok()
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273 >
2024-05-28 18:45:49 +00:00
Jordan Justen
c967b38c7c
intel/dev: Allow setting FORCE_PROBE for intel PCI IDs
...
For example:
CHIPSET(0x56a0, dg2_g10, "DG2", "Intel(R) Arc(tm) A770 Graphics", FORCE_PROBE)
For now if a PCI ID has FORCE_PROBE set, then we refuse to start the
device.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273 >
2024-05-28 18:45:49 +00:00
Iván Briano
8d098ecfea
anv: check cmd_buffer is on a transfer queue more properly
...
The queueFlags of the associated queue may have more flags than just the
type of queue it is, based on what that queue supports, like sparse or
protected content. Check that the queue is a blitter engine instead.
Fixes a bunch of dEQP-VK.api.copy_and_blit.core.*_transfer on MTL with
ANV_SPARSE=0
Fixes: 17b8b2cffd ("anv: Add support for a transfer queue on Alchemist")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29336 >
2024-05-28 18:25:16 +00:00
Eric Engestrom
e6d9201c6c
v3dv/ci: fix typo in renderer_check
...
Fixes: 993dd0832f ("rpi4/ci: use deqp-runner suite for vk job as well")
Fixes: c0e6a72b00 ("rpi5/ci: use deqp-runner suite for vk job")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29412 >
2024-05-28 18:04:22 +00:00
Eric Engestrom
dc3bc70899
.mailmap: fix email address for @cpmichael
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29437 >
2024-05-28 16:31:23 +00:00
Boris Brezillon
76047bfa5e
pan/jc: Drop unused pool argument passed to pan_jc_add_job()
...
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382 >
2024-05-28 16:03:30 +00:00
Boris Brezillon
443fe41ad2
pan/desc: Add missing format in translate_s_format()
...
Vulkan stencil image views of combined stencil Z32_S8 buffers can result
in a PIPE_FORMAT_X32_S8X24_UINT format being passed to the stencil view.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382 >
2024-05-28 16:03:30 +00:00
Boris Brezillon
586e427b78
pan/decode: Be robust to NULL texture payload
...
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382 >
2024-05-28 16:03:30 +00:00
Boris Brezillon
20d25b9f07
panvk: Make sure we dump memory mappings before crashing
...
Kinda useful when we want to debug things.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382 >
2024-05-28 16:03:30 +00:00
Boris Brezillon
47a1daa6da
panvk: Kill cmd_get_tiler_context()
...
cmd_prepare_tiler_context() is just a wrapper around
cmd_get_tiler_context(), and cmd_get_tiler_context() is only called
from cmd_prepare_tiler_context().
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382 >
2024-05-28 16:03:30 +00:00
Boris Brezillon
f57fac8d37
panvk: Use vk_pipeline_shader_stage_to_nir()
...
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382 >
2024-05-28 16:03:30 +00:00
Boris Brezillon
f21c163baa
panvk: Clean Midgard leftovers in the cmd_close_batch() path
...
pan_preload_fb() will use pre-frames on Bifrost. Pass NULL preload_jobs
and assert that num_preload_jobs is zero.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382 >
2024-05-28 16:03:30 +00:00
Erik Faye-Lund
dd8fb7139d
mesa/main: rewrite mipmap generation code
...
The old mipmap generation code has a few problems:
1. It open-codes the format conversion, which is error prone, and it's
hard to know if we're missing some formats. Manual inspection shows
that we're indeed missing some less commonly used formats.
2. When downsampling between two miplevels with the same width (e.g a
width of one), the code would read from outside the image.
3. It averages sRGB textures in gamma space. Whilte that's legal in GL
(the filtering algorithm is undefined), it doesn't produce very good
results. And it's not the same thing as util_gen_mipmap() does.
4. Similarly, it uses a box-filter for the stencil values. And while
that's actually what the spec recomments (regardless of format), it's
absolutely *not* what most applications would want. Using nearest
sampling would make more sense.
5. It has requirements about the type and format returned by
_mesa_uncompressed_format_to_type_and_comps() which other call-sites
in mesa doesn't have. This is the real reason I want to get rid of
it, because it ends up complicating the GLES read formats / types.
So, let's rewrite all of this, fixing all of the above. The result is
quite a bit shorter, and if this ends up being less performant, it's
unlikely that this matters, because we almost always use the GPU
accelerated code-path provided by util_gen_mipmap() anyway.
The new code works by a few identities: It uses the pack / unpack
helpers to convert the texture to a few reasonable intermediate formats,
so we keep the amount of open-coded averaging to a minimum. To do this
without heap-allocations, we introduce a concept of a "span", which has
a max fixed size, that can trivially be allocated on the stack.
We also add some more requirements to keep things sane; the higher level
do_row functions only allow the dest image to be half of the source
width or one (whichever is larger). This matches the high-level needs of
mipmap generation. The lower level do_span() function is a bit more
flexible, because that turns out to be helpful when implementing
do_span_3D(), where we want to avoid collapsing the inner dimension
twice.
Tested-by: Eric R. Smith <eric.smith@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29380 >
2024-05-28 15:04:14 +00:00
Erik Faye-Lund
cd37384985
util/format: correct a typo
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29380 >
2024-05-28 15:04:14 +00:00
Rohan Garg
6fc6f95e90
intel/genxml: Update STATE_COMPUTE_MODE for Xe2
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264 >
2024-05-28 14:42:19 +00:00
Rohan Garg
f5a5c35717
intel/genxml: update MI_SEMAPHORE_WAIT for Xe2
...
Rework:
* José: Restore "Register Poll Mode" default to "Memory Poll"
* José: Other minor formatting changes to match other genxml
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264 >
2024-05-28 14:42:19 +00:00
Rohan Garg
569a037fb1
intel/genxml: Update XY_BLOCK_COPY_BLT
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264 >
2024-05-28 14:42:19 +00:00
Rohan Garg
26e78f83bb
intel/genxml: update CFE_STATE for LNL
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264 >
2024-05-28 14:42:19 +00:00
Rohan Garg
7001134246
isl: enable compression for CPS buffers on xe2+
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264 >
2024-05-28 14:42:19 +00:00
Rohan Garg
b9c68883c4
intel/genxml: update 3DSTATE_CPSIZE_CONTROL_BUFFER for xe2+
...
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264 >
2024-05-28 14:42:19 +00:00
Rohan Garg
bd09649750
intel/genxml: add the new state byte stride instruction
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264 >
2024-05-28 14:42:19 +00:00
Jordan Justen
17b6db893b
intel/genxml: Update 3DSTATE_BTD for xe2
...
Reworks:
- Rohan: 3DSTATE_BTD can also be emitted on the CCS
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264 >
2024-05-28 14:42:19 +00:00
Jordan Justen
5709bbe033
intel/genxml: Add XY_FAST_COLOR_BLT for xe2
...
Reworks:
- Rohan: Use a uint for the surface format since we're dropping the
SURFACE_FORMAT enum from genxml
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264 >
2024-05-28 14:42:19 +00:00
Jordan Justen
92fa87f5bd
blorp: Update programming for XY_FAST_COLOR_BLT on xe2
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264 >
2024-05-28 14:42:19 +00:00
Samuel Pitoiset
7605456a9b
radv: apply the SQ_THREAD_TRACE_WPTR workaround on GFX11 only
...
GFX12 doesn't seem affected according to RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29426 >
2024-05-28 13:59:31 +00:00
Samuel Pitoiset
33ae2275bf
radv: apply the workaround for no PS inpputs and LDS on GFX11 only
...
GFX12 doesn't seem affected according to RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29426 >
2024-05-28 13:59:31 +00:00
Konstantin Seurer
a93f95c69c
radv/rt: Remove load_rt_dynamic_callable_stack_base_amd
...
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619 >
2024-05-28 12:23:45 +00:00
Konstantin Seurer
432f3eb9ca
radv/rt: Track ray_launch_size reads
...
Totals from 33 (8.71% of 379) affected shaders:
Instrs: 1434025 -> 1433988 (-0.00%); split: -0.01%, +0.00%
CodeSize: 7578824 -> 7578472 (-0.00%); split: -0.01%, +0.00%
Latency: 9241632 -> 9241639 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 3407014 -> 3407049 (+0.00%); split: -0.00%, +0.00%
VClause: 40399 -> 40391 (-0.02%)
SClause: 37755 -> 37760 (+0.01%); split: -0.04%, +0.05%
Copies: 169588 -> 169567 (-0.01%); split: -0.04%, +0.02%
PreSGPRs: 4323 -> 4319 (-0.09%)
VALU: 940500 -> 940484 (-0.00%); split: -0.00%, +0.00%
SALU: 220508 -> 220509 (+0.00%); split: -0.03%, +0.03%
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619 >
2024-05-28 12:23:45 +00:00
Konstantin Seurer
7ba8fccad3
radv/rt: Track ray_launch_id reads
...
We can expect the z-component to be unused most of the times. Avoid
preserving it in those cases.
Totals from 94 (24.80% of 379) affected shaders:
MaxWaves: 916 -> 935 (+2.07%)
Instrs: 3316697 -> 3318357 (+0.05%); split: -0.06%, +0.11%
CodeSize: 17618704 -> 17616680 (-0.01%); split: -0.09%, +0.08%
VGPRs: 11632 -> 11520 (-0.96%)
SpillSGPRs: 1139 -> 1205 (+5.79%); split: -0.35%, +6.15%
Latency: 22595907 -> 22598225 (+0.01%); split: -0.15%, +0.16%
InvThroughput: 7036479 -> 6923740 (-1.60%); split: -1.74%, +0.14%
VClause: 104325 -> 104361 (+0.03%); split: -0.16%, +0.19%
SClause: 83920 -> 83925 (+0.01%); split: -0.08%, +0.08%
Copies: 328140 -> 330687 (+0.78%); split: -0.27%, +1.05%
Branches: 134521 -> 134541 (+0.01%); split: -0.01%, +0.02%
PreSGPRs: 8753 -> 8806 (+0.61%)
PreVGPRs: 10984 -> 10937 (-0.43%)
VALU: 2149880 -> 2151318 (+0.07%); split: -0.08%, +0.15%
SALU: 499107 -> 499128 (+0.00%); split: -0.08%, +0.09%
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619 >
2024-05-28 12:23:45 +00:00
Konstantin Seurer
9fe34a3204
radv: Remove uses_dynamic_rt_callable_stack
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619 >
2024-05-28 12:23:45 +00:00
Konstantin Seurer
1038f48dd1
radv: Replace is_rt_shader with RADV_SHADER_TYPE_RT_PROLOG
...
The flag was only used for identifying the rt prolog.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619 >
2024-05-28 12:23:45 +00:00
Eric R. Smith
272dcaff01
panfrost: fix some omissions in valhall flow control
...
The code for checking flow control did not realize that
`LD_TEX` and `LD_TEX_IMM` were memory accesses, and hence was
not inserting waits where these were necessary. This showed up
as flakes in KHR-GLES31.core.shader_image_load_store.basic-glsl-misc-fs
Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29363 >
2024-05-28 11:18:14 +00:00
Rhys Perry
de07fd384d
aco/gfx12: disallow SCC and most constants for BUF SOFFSET
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330 >
2024-05-28 10:52:11 +00:00
Rhys Perry
12b4bdc134
aco/gfx12: decrease max_nsa_vgprs for VSAMPLE
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330 >
2024-05-28 10:52:11 +00:00
Rhys Perry
b1b3237590
aco/gfx12: remove MIMG vector affinity
...
Since GFX12 uses NSA unconditionally, there is no code size advantage to
avoiding it.
fossil-db (gfx1200):
Totals from 41700 (52.52% of 79395) affected shaders:
MaxWaves: 1063633 -> 1063623 (-0.00%); split: +0.00%, -0.00%
Instrs: 32745913 -> 32736332 (-0.03%); split: -0.10%, +0.07%
CodeSize: 177664256 -> 177623280 (-0.02%); split: -0.08%, +0.06%
VGPRs: 1668640 -> 1665280 (-0.20%); split: -0.26%, +0.06%
Latency: 248630176 -> 248803989 (+0.07%); split: -0.23%, +0.30%
InvThroughput: 51923793 -> 51958560 (+0.07%); split: -0.15%, +0.22%
VClause: 633381 -> 633594 (+0.03%); split: -0.31%, +0.34%
SClause: 1090207 -> 1090206 (-0.00%); split: -0.02%, +0.02%
Copies: 2042437 -> 2040188 (-0.11%); split: -0.53%, +0.42%
Branches: 680437 -> 680416 (-0.00%); split: -0.01%, +0.01%
VALU: 19387160 -> 19384917 (-0.01%); split: -0.06%, +0.04%
SALU: 3112590 -> 3112540 (-0.00%); split: -0.01%, +0.00%
VOPD: 5474 -> 5527 (+0.97%); split: +2.87%, -1.90%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330 >
2024-05-28 10:52:11 +00:00
Rhys Perry
8bc03668e1
radv/gfx12: don't add workgroup id shader args
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330 >
2024-05-28 10:52:11 +00:00
Rhys Perry
ef74407577
aco/gfx12: use ttmp9/ttmp7 for workgroup id
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330 >
2024-05-28 10:52:11 +00:00
Rhys Perry
c8123b67e0
aco/gfx12: don't create v_fmac_legacy_f32
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330 >
2024-05-28 10:52:11 +00:00
Rhys Perry
e79a8219d2
aco/gfx12: sign-extend s_getpc_b64
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330 >
2024-05-28 10:52:11 +00:00
Rhys Perry
ae18c88409
aco/gfx12: implement workgroup barrier
...
Same sequence LLVM uses for llvm.amdgcn.s.barrier.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330 >
2024-05-28 10:52:11 +00:00
Rhys Perry
fae2a85d57
aco/gfx12: implement subgroup shader clock
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330 >
2024-05-28 10:52:11 +00:00
Rhys Perry
872dda2bc5
aco: support GFX12 in insert_NOPs
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330 >
2024-05-28 10:52:11 +00:00
Jose Maria Casanova Crespo
4835dc0e7f
v3dv: Emit stencil draw clear if needed for GFXH-1461
...
Fixes: 1e81bb05ae (v3dv: implement workaround for GFXH-1461)
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29427 >
2024-05-28 10:29:18 +00:00
Iago Toral Quiroga
9912c734e9
v3dv: implement vkCmdBindIndexBuffer2KHR
...
This is added with VK_KHR_maintenance5. It adds a size parameter
to track the size of the index buffer data bound.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29425 >
2024-05-28 11:37:47 +02:00
Iago Toral Quiroga
e00da33474
v3dv: use pSizes paramater in vkCmdBindVertexBuffers2
...
We can use this to specify the maximum vertex index that can
be accessed, which the hardware will use to detect and prevent
out-of-bounds accesses to vertex buffers.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29425 >
2024-05-28 11:37:42 +02:00
Iago Toral Quiroga
70aa470bdb
v3dv: fix incorrect index buffer size
...
When programming the size, we should take into account the
offset from the start of the index buffer address.
cc: mesa-stable
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29425 >
2024-05-28 11:37:37 +02:00
Iago Toral Quiroga
6d2edd2585
v3dv: drop unused stride field from v3dv_pipeline_vertex_binding
...
This is unused since f4d426fae6 where we added support for dynamic
state vertex strides.
Fixes: f4d426fae6 ('v3dv: provide implementation for vkCmdBindVertexBuffers2')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29425 >
2024-05-28 11:37:19 +02:00
Samuel Pitoiset
a9f4931a91
ac,radv,radeonsi: a function that sets mutable CB surface fields
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29378 >
2024-05-28 08:49:53 +00:00
Tapani Pälli
6836118cd2
anv/android: enable emulated astc for applications
...
This layer was blocking Android emulated ASTC support as it did not
take "emu_astc_ldr" in to account.
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Tested-by: Mi, Yanfeng <yanfeng.mi@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29415 >
2024-05-28 08:11:49 +00:00
Konstantin Seurer
28be0cca45
radv: Add locking to radv_replay_shader_arena_block
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29169 >
2024-05-28 07:11:02 +00:00
Konstantin Seurer
c31038ef98
llvmpipe: Use a second LLVMContext for compiling sample functions
...
LLVMContextr is not thread safe. There are many code paths that use
llvmpipe_context::context and adding locking to all of them is
difficult and adds unnecessary overhead. This approach restricts locking
to lp_sampler_matrix, which makes covering all uses of the LLVMContext
easy and only adds overhead when running lavapipe.
Fixes: 7ebf7f4 ("llvmpipe: Compile sample functioins on demand")
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29397 >
2024-05-28 06:30:58 +00:00
Iago Toral Quiroga
a93b1960af
v3dv: emit a default point size when drawing points
...
Before VK_KHR_maintenance5 point size is undefined unless the
shader explicitly writes it, but this extension changes this and
expects a default point size of 1.0 if none has been written.
We accomplish this by emitting a POINT_SIZE packet with the
default point size the first time we draw with a POINT primitive
in the job. If the shaders used in the draw call doesn't write
point size then the hardware will take the point size from the
state set by the packet. If the shader does write to point size
then the value written in the shader will be used instead.
Passes all tests we support in:
dEQP-VK.rasterization.primitive_size.default_size.points.*
when forcing maintenance5 enabled.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29413 >
2024-05-28 05:31:13 +00:00
Iago Toral Quiroga
7e0616ecc5
v3dv: only flag 'shader writes point size' if the shader actually writes it
...
If the shader writes point size, then the compiler needs to ensure it
writes it in the appropriate vpm output slot and also clamp its value to
expected limits. This is why we have the per_vertex_point_size in the
shader key, so it doesn't really make sense to set this if the shader
doesn't write point size.
If the shader record flags that the shader writes point size then the
hardware will use the shader written value to override point size state
(set with the POINT_SIZE packet), so again, we really only want to set
this in the shader state record if the shader actually writes its value.
While we could also limit this to point primitives, since these are the
only primitives where point size has an effect, this is not really
required, and skipping this allows us to use the same shader with any
primitive type (otherwise we would have to compile 2 different shaders).
Finally, this change makes the vertex shader setup for point size match the
one we had been doing for geometry shaders, so it makes both stages behave
consistently regarding point size behavior.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29413 >
2024-05-28 05:31:13 +00:00
Iago Toral Quiroga
c30833f233
broadcom/compiler: check if vertex shader writes point size
...
The same we already check for geometry shaders. We will use this
shortly.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29413 >
2024-05-28 05:31:13 +00:00
Karol Herbst
7c07f1cdfb
nouveau: import nvif/ioctl.h file from libdrm_nouveau
...
Technically this is UAPI and should be moved into the UAPI headers, but
for now let's unbreak users this way.
Fixes: 821f4c8d99 ("nouveau: import libdrm_nouveau")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29420 >
2024-05-27 22:23:41 +00:00
Konstantin Seurer
9b932aadf4
radv: Remove radv_cmd_dirty_dynamic_bits
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29345 >
2024-05-27 20:34:36 +00:00
Sergi Blanch Torne
d963fd596e
ci: fix stress counter in run'n'monitor
...
The stress counter after enable_job(retry), often stores the new status
instead of the job complete. So, the summary printed later doesn't show the
real evolution of the test.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29416 >
2024-05-27 20:30:36 +00:00
José Roberto de Souza
a47c5c9eee
intel/perf: Add intel_perf_stream_read_samples()
...
Because of the differences between i915 and Xe KMD this function is
needed to abstract the special handling that Xe KMD needs while
reading perf stream.
This special handling will be implemented in the next patch.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29421 >
2024-05-27 19:34:06 +00:00
José Roberto de Souza
9841aeb6ad
intel/perf: Add a macro with header + sample length
...
To be more explicit lets have 2 macros one with sample lenght other
with header and sample length.
This will also help add Xe KMD support as it don't have a header like
i915.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29421 >
2024-05-27 19:34:06 +00:00
José Roberto de Souza
2f128b2ba5
intel/perf: Replace drm_i915_perf_record_header by intel_perf_record_header
...
drm_i915_perf_record_header requires i915_drm.h but we want to remove
all i915_drm.h includes from common code, so replacing it by
intel_perf_record_header.
No changes in behavior expected as the structs and enums are identical.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29421 >
2024-05-27 19:34:06 +00:00
José Roberto de Souza
da43bf3f2e
intel/perf: Allocate sseu in heap memory
...
This is a i915 specific struct and Xe KMD will not need anything like
that so lets allocate it in heap memory.
This will help us remove the i915_drm.h includes from common code.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29421 >
2024-05-27 19:34:06 +00:00
José Roberto de Souza
e1c2847b81
intel/perf: Move i915 specific code to load configurations to i915 file
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29421 >
2024-05-27 19:34:06 +00:00
José Roberto de Souza
30f97a7242
intel/perf: Move i915 specific code from common code
...
More code will be moved to i915 specific files in the next patches.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29421 >
2024-05-27 19:34:06 +00:00
José Roberto de Souza
8ad56247c3
intel/perf: Move code that will be shared by both KMDs
...
More code will be shared in the next patches.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29421 >
2024-05-27 19:34:06 +00:00
José Roberto de Souza
b601e4a18f
intel/perf: Replace I915_OA_FORMAT_* usage by platform check
...
Removing more i915_drm.h usage from common code.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29421 >
2024-05-27 19:34:06 +00:00
José Roberto de Souza
3d2c3dc62b
anv: Nuke perf_query_pass from anv_execbuf
...
It is set but not read.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29421 >
2024-05-27 19:34:06 +00:00
José Roberto de Souza
0442803eee
intel/perf: Fix return of read_oa_samples_until()
...
read_oa_samples_until() was returning OA_READ_STATUS_ERROR even
if already read samples, then it tried again and KMD returned 0/empty
or EAGAIN(as the read would block).
This is not causing any issue because read_oa_samples_for_query()
FALLTHROUGH OA_READ_STATUS_ERROR to OA_READ_STATUS_FINISHED
but that I think it is worthy to fix it.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29421 >
2024-05-27 19:34:06 +00:00
Yusuf Khan
42ee8d80d9
zink/query: begin time elapsed queries even if we arent in a rp
...
If we arent in a renderpass, but still wanna start the time elapsed
query(eg. to figure out how long some random operation will take) then
this seems to fix that case.
Signed-off-by: Yusuf Khan <yusisamerican@gmail.com >
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29411 >
2024-05-27 18:47:34 +00:00
Italo Nicola
62c8e58f39
nir: add {load,store}_global_etna intrinsics
...
Acked-by: David Heidelberg <david@ixit.cz >
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com >
Signed-off-by: Italo Nicola <italonicola@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29402 >
2024-05-27 17:58:51 +00:00
Tomeu Vizoso
7e7ee6a604
etnaviv: handle missing alu conversion opcodes
...
Acked-by: David Heidelberg <david@ixit.cz >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com >
Signed-off-by: Italo Nicola <italonicola@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29402 >
2024-05-27 17:58:51 +00:00
Samuel Pitoiset
348ea02801
radeonsi: use the common helper for initializing CB surfaces
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29342 >
2024-05-27 17:04:27 +02:00
Samuel Pitoiset
07c6fdb878
radv: use the common helper for initializing CB surfaces
...
This adds GFX12 support implicitly.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29342 >
2024-05-27 17:04:26 +02:00
Samuel Pitoiset
3f7a36a9fb
amd/common: add a function to initialize cb surface
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29342 >
2024-05-27 17:04:26 +02:00
Samuel Pitoiset
1935e63545
radv: align DCC control settings to RadeonSI for GFX8
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29342 >
2024-05-27 17:04:26 +02:00
David Rosca
103da56fba
radeonsi/vcn: Avoid copy when resizing bitstream buffer
...
The copy from old buffer is only needed when appending (when
decode_bitstream is called more than once in one frame).
This avoids map old buffer -> memcpy to new buffer which can get
expensive with large buffers.
Reviewed-by: David (Ming Qiang) Wu <David.Wu3@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29318 >
2024-05-27 13:28:54 +00:00
Danylo Piliaiev
0954afff5d
turnip/msm: Do rd dump only when there are commands in submission
...
Dumping per-submission RDs when replaying d3d11 capture resulted in a
surprising number of empty RDs.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29359 >
2024-05-27 12:29:32 +00:00
Rhys Perry
c9f5152ddd
radv: malloc graphics pipeline stages
...
This uses a lot of stack, which is apparently a problem for musl libc.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29379 >
2024-05-27 10:22:45 +00:00
Samuel Pitoiset
139bc6b813
radeonsi: use common build buffer descriptor helpers
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29385 >
2024-05-27 08:17:58 +02:00
Samuel Pitoiset
3c5173aabf
ac,radv: add a stride parameter to ac_build_attr_ring_descriptor()
...
For RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29385 >
2024-05-27 08:17:58 +02:00
Samuel Pitoiset
bb623b6144
amd/common: add a helper to set the third word of buffer descriptor
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29385 >
2024-05-27 08:17:58 +02:00
David Rosca
cc03f2ea5a
frontends/va: Fix leak when destroying VAEncCodedBufferType
...
Fixes: be4287c3aa ("pipe: Extend get_feedback with additional metadata")
Reviewed-by: Sil Vilerino <sivileri@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29217 >
2024-05-27 05:55:00 +00:00
David Heidelberg
19a875f7dc
ci/freedreno: document new failure after piglit update
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29407 >
2024-05-26 22:30:39 -07:00
Cong Liu
62b490fa92
nir: Fix out-of-bounds access in ntt_emit_store_output()
...
This patch resolves the problem by modifying the for loop condition
to ensure that it stays within the bounds of the array (i.e., i < 4)
Signed-off-by: Cong Liu <liucong2@kylinos.cn >
Reviewed-by: Gert Wollny <gert.wollny@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25446 >
2024-05-27 09:13:04 +08:00
Valentine Burley
d93d989e5d
wsi: Guard DRM-dependent function implementations with HAVE_LIBDRM
...
Adress an implicit function declaration error by ensuring that DRM-dependent
functions are only compiled when HAVE_LIBDRM is set.
Fixes: 59813ae468 ("wsi: Add common infrastructure for explicit sync")
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Reviewed-by: Joshua Ashton <joshua@froggi.es >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29267 >
2024-05-26 19:48:16 +00:00
Rob Clark
930e4fa283
vulkan/android: Fix suggestedYcbcrModel with !mapper4
...
Only mapper4 supports u_gralloc_get_buffer_color_info(), other gralloc
implementations do not. So add a fallback, so that we aren't telling
the app that the suggestedYcbcrModel is RGB_IDENTITY. We only go down
this path for YUV formats.
Fixes android.graphics.cts.BasicVulkanGpuTest#testBasicBufferImportAndRenderingExternalFormat
Fixes: 8732a619f1 ("vulkan/android: Add common vkGetAndroidHardwareBufferPropertiesANDROID")
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29391 >
2024-05-25 14:52:54 +00:00
Faith Ekstrand
67a3c81286
nak: Encode LDC directly
...
This instruction is so restricted that encode_alu() really isn't gaining
us much so we may as well just type it out. Also, the bindless version
is quite a bit different and doesn't follow the ALU patterns so it'll
make more sense to do it this way long-term.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29393 >
2024-05-25 13:26:38 +00:00
Faith Ekstrand
4366d4d181
nak: Don't emit a plop3 for immediate shift sources
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29393 >
2024-05-25 13:26:38 +00:00
Faith Ekstrand
d8b2d25052
nak: Add with -0 for fabs()
...
Adding with +0 is technically fine because the other source has abs()
applied and a non-negative value added to +0 is a no-op. However, copy
propagation won't detect that properly as of a43e6addca ("nak: Fix
fneg to do fadd(-0, x)")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29393 >
2024-05-25 13:26:38 +00:00
Faith Ekstrand
8061ed728a
nak: Emit !PT for carries on IADD3
...
They seem to be ignored by the hardware but the blob emits them.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29393 >
2024-05-25 13:26:38 +00:00
Valentine Burley
c1a4fcbb4a
freedreno/ci: Update expectations
...
Created by ci-collate from the following pipeline:
https://gitlab.freedesktop.org/Valentine/mesa/-/pipelines/1184168
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29373 >
2024-05-25 09:05:40 +00:00
David Heidelberg
890222fb5b
ci/lava: move wayland-protocols to the main section
...
Since Piglit buildsystem changes, we know it's already available
in all images anyway as we build with Wayland by default.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29370 >
2024-05-25 06:28:45 +00:00
David Heidelberg
97a081d41a
ci/lava: do not build Vulkan for armhf images
...
No hardware running armhf images has Vulkan at this moment,
rather ship smaller images.
Do not build VK-CTS for armhf (behind BUILD_VK flag now).
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29370 >
2024-05-25 06:28:45 +00:00
David Heidelberg
61c07cc1d9
ci/lava: enable Piglit OpenCL tests so we can test rusticl on the HW
...
THe CI job will follow in separate MR.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29370 >
2024-05-25 06:28:45 +00:00
David Heidelberg
a14e91981a
ci/piglit: be explicit about what we building
...
Now CI will easily fail build, when needed dependency is not present,
instead of building without it.
Shortens build for VK container, where we use only replayer.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29370 >
2024-05-25 06:28:45 +00:00
David Heidelberg
312b50da5c
ci: do not build Nine in debian-build-testing
...
Since we started testing on machines, it's already in debian-testing,
and we want to have these builds fast.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28648 >
2024-05-24 21:39:57 +00:00
David Heidelberg
f7cf53a0b1
ci: re-enable shader-db for nouveau
...
As we have separate jobs, failure won't trigger an extra 20m of waiting.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28648 >
2024-05-24 21:39:57 +00:00
Martin Roukala (né Peres)
addeb5ca9a
radv/ci: add a bunch of flakes
...
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29381 >
2024-05-24 21:05:46 +00:00
Martin Roukala (né Peres)
9a7facc97d
radv+zink/ci: document recent flakes
...
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29381 >
2024-05-24 21:05:46 +00:00
Martin Roukala (né Peres)
946b1027ef
turnip+zink/ci: add more flakes to the expectations
...
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29381 >
2024-05-24 21:05:46 +00:00
Martin Roukala (né Peres)
fed03b9662
turnip/ci: bump the a750_vk timeout
...
We already managed to hit the timeout once, and since the job is manual
anyway, let's bump it generously so as to also allow for more tests
to be added without having to bump the timeout every time.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29381 >
2024-05-24 21:05:46 +00:00
Martin Roukala (né Peres)
8b6ea47020
turnip/ci: document a missing flake from the a750_vk job
...
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29381 >
2024-05-24 21:05:46 +00:00
Martin Roukala (né Peres)
fb5096eb37
nvk+zink/ci: document more flakes in the ga106
...
It also has the benefit of being a shorter name than the original.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29381 >
2024-05-24 21:05:46 +00:00
Martin Roukala (né Peres)
1d9092ad49
nvk+zink/ci/ga106: make the expectations codename-specific
...
CI expectations are definitely not portable across different gpu
families, so let's tag them as such to reduce confusion and be more
in line with the rest of the codebase.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29381 >
2024-05-24 21:05:46 +00:00
Martin Roukala (né Peres)
d0d3924c60
nvk+zink/ci: rename the ga106 jobs to be more in line with RADV
...
It also has the benefit of being a shorter name than the original.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29381 >
2024-05-24 21:05:46 +00:00
Eric R. Smith
43f9b3b986
glsl: make the xfb varying sort stable
...
qsort is not guaranteed to produce a stable sort, and indeed
in MSVC CRT does not. The xfb varying sort functions were
relying on undefined behavior (that qsort would be stable).
Signed-off-by: Eric R. Smith <eric.smith@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29178 >
2024-05-24 17:36:39 +00:00
Eric R. Smith
5102a922e7
glsl: test both inputs when sorting varyings for xfb
...
In the sort functions used to sort varyings in gl_nir_link_varyings,
we were only checking the first input for whether or not it is xfb.
Check both inputs, and also provide a definite order for the xfb vs.
non-xfb varyings (the xfb come last, as the initial sort established).
This fixes a problem encountered on panfrost, where qsort could
mix xfb and non-xfb varyings which started out separate.
Note that the sort is still not stable. We probably should make it
stable, but that is a more extensive change that's handled in a later
commit.
Cc: mesa-stable
Signed-off-by: Eric R. Smith <eric.smith@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29178 >
2024-05-24 17:36:39 +00:00
Eric Engestrom
485d56ed81
mr-label-maker: label src/vulkan/wsi/ as wsi
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29388 >
2024-05-24 19:12:49 +02:00
Samuel Pitoiset
003d49c0bc
ac,radv,radeonsi: add a function to translate texture data format
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29301 >
2024-05-24 17:04:54 +02:00
Samuel Pitoiset
e1997226da
radv: use PIPE_FORMAT in radv_translate_tex_dataformat()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29301 >
2024-05-24 17:04:54 +02:00
Samuel Pitoiset
7785a63fc0
amd/common: add ac_gpu_info::has_etc_support
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29301 >
2024-05-24 17:04:54 +02:00
Marek Olšák
ae9331694b
radeonsi: lower NIR resource srcs to descriptors last
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
f493d6fb6f
radeonsi: don't lower UBO/SSBOs to descriptors if they are already lowered
...
The next change will depend on this.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
e1c65ce680
radeonsi/gfx12: fix a regression in si_init_depth_surface
...
si_htile_enabled has an assertion not expecting GFX12
Fixes: d0810d528c - radeonsi: use the common helper for initializing DS surfaces
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
321cb43c11
radeonsi/gfx12: fix depth bounds register values
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
59d7d06828
radeonsi/gfx12: fix a regression in si_set_mutable_tex_desc_fields
...
Fixes: 26cd3a1718 - ac,radv,radeonsi: add a helper to set mutable tex desc fields
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
a548ec7ad4
radeonsi/gfx12: disable CU1 instead of CU0 for GS due to SQTT
...
SQTT captures traces from CU0, so we need to keep it enabled.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
34be14d957
radeonsi/gfx12: fix incorrect condition for when to do clear_buffer via compute
...
It was missing the requirement that offset % 4 == 0.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
76b0ad33bc
radeonsi/gfx12: fix the alpha ref value
...
This was missed when the code was refactored.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
3ab0e18db4
radeonsi: vectorize loads/store after ABI lowering and optimizations
...
This results in slightly better code.
SGPRs: 3552 -> 3608 (1.58 %)
VGPRs: 1988 -> 2020 (1.61 %)
Code Size: 178036 -> 177664 (-0.21 %) bytes
Max Waves: 1136 -> 1136 (0.00 %)
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
35c5435eae
ac/llvm: fix incorrect parameter type in llvm.amdgcn.s.nop
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
ad07ea3162
amd: enable 32B minimum DCC block size for gfx1151
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
cf4eb41540
amd: add more gfx11 APUs
...
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Marek Olšák
7650127040
amd: update addrlib
...
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313 >
2024-05-24 13:48:28 +00:00
Natanael Copa
0274518615
nir/opt_varyings: reduce stack usage
...
Avoid put a huge struct on stack to fix a stack overflow on musl libc.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10988
Fixes: c66967b5cb (nir: add nir_opt_varyings, new pass optimizing and compacting varyings)
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29375 >
2024-05-24 13:15:33 +00:00
Valentine Burley
f7a262cd6d
freedreno/devices: Fix indentation for Adreno A32
...
Adjust indentation to match other entries.
Fixes: cd7da3a807 ("freedreno/devices: Add support for Adreno A32 (G3x Gen 2)")
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29347 >
2024-05-24 12:21:07 +00:00
Valentine Burley
674d5b54bf
tu: Expose VK_EXT_nested_command_buffer
...
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29347 >
2024-05-24 12:21:07 +00:00
Samuel Pitoiset
cd5f980d51
ac,radv,radeonsi: move ZRANGE_PRECISION to mutable DS fields
...
The DS surfaces are now completely configured in common code.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29349 >
2024-05-24 11:48:32 +00:00
Samuel Pitoiset
332a06903d
ac,radv,radeonsi: a function that sets mutable DS surface fields
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29349 >
2024-05-24 11:48:32 +00:00
Samuel Pitoiset
1a08fa6150
ac,radv,radeonsi: add function to get the number of ZPLANES
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29349 >
2024-05-24 11:48:32 +00:00
Samuel Pitoiset
709452b9d1
radv: do not check image usage for ITERATE256 with TC-compat HTILE
...
This is redundant because TC-compat HTILE is only enabled for images
that are readable by shaders.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29349 >
2024-05-24 11:48:32 +00:00
Samuel Pitoiset
dcfa351af3
radv: only enable DB_STENCIL_INFO.ITERATE_FLUSH when necessary
...
When no HTILE for stencil this shouldn't be neessary.
This also matches RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29349 >
2024-05-24 11:48:32 +00:00
Constantine Shablia
2adf01fa61
panvk: enable KHR and EXT BDA
...
And get it tested by CI.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29302 >
2024-05-24 13:07:26 +02:00
Boris Brezillon
deb9756e23
panvk: Lower global memory IOs
...
If we want to support KHR_buffer_device_address, we need to lower global
IOs.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29302 >
2024-05-24 13:06:50 +02:00
Mary Guillemard
fe59b772b5
bi: Alloc replacement array once in opt_cse
...
This create an uneeded pressure otherwise.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29372 >
2024-05-24 11:16:31 +02:00
Mary Guillemard
01ea55b44c
midgard: Reformat code
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29372 >
2024-05-24 11:16:31 +02:00
Mary Guillemard
547308990d
bi: Reformat code
...
Had some broken formatting.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29372 >
2024-05-24 11:16:03 +02:00
Lionel Landwerlin
2c65d90bc8
intel/brw: ensure find_live_channel don't access arch register without sync
...
Another architecture register that requires some care before reading.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 49ee3ae9e8 ("intel/compiler: Lower FIND_[LAST_]LIVE_CHANNEL in IR on Gfx8+")
Tested-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29319 >
2024-05-24 07:26:17 +00:00
Eric Engestrom
1add55863f
zink+nvk/ci: spec@ext_external_objects@vk-vert-buf-reuse has been fixed
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29371 >
2024-05-24 08:48:07 +02:00
Eric Engestrom
ace5c27898
zink+nvk/ci: add more flakes seen in nightly
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29371 >
2024-05-24 08:47:20 +02:00
Eric Engestrom
6789d4c0b2
zink+nvk/ci: more KHR-GL46.packed_pixels.varied_rectangle.* flakes, so mark the group as flaky
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29371 >
2024-05-24 08:45:39 +02:00
Eric Engestrom
6843a7951b
ci/b2c: make B2C_JOB_WARN_REGEX optional
...
Fixes: bfd4db0476 ("radv/ci: move amdgpu-specific kernel message warning to src/amd/ci/")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29368 >
2024-05-24 05:58:26 +00:00
Iago Toral Quiroga
865e682ad7
broadcom/compiler: apply payload conflict to spill setup before RA
...
We can emit spill setup before RA if we use scratch. In that case
we have the same situation as during spilling, with the caveat that
we have already emitted the instructions so we need to find them
(they should be the only instructions ones before the instructions
accessing payload registers) and flag them as such.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343 >
2024-05-24 05:25:22 +00:00
Iago Toral Quiroga
cb83f25b39
broadcom/compiler: don't assign payload registers to spilling setup temps
...
We read our payload registers first in the shader so we generally don't have
to care about temps being allocated to them and stomping their value before
we can read them. Hoewer, spilling setup instructions are an exception since
these will be inserted first when there is any spilling in the program.
To fix this, we flag RA nodes involved with these instructions so we can
then try to avoid assiging these registers to them.
Fixes CTS failures with V3D_DEBUG=opt_compile_time, particularly:
dEQP-VK.binding_model.buffer_device_address.set0.depth2.basessbo.convertcheckuv2.nostore.single.std140.comp_offset_nonzero
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343 >
2024-05-24 05:25:22 +00:00
Iago Toral Quiroga
901c485997
broadcom/compiler: make add_node return the node index
...
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343 >
2024-05-24 05:25:21 +00:00
David Heidelberg
33492dd9e8
ci/radv: dEQP-GLES3.functional.polygon_offset.fixed16_render_with_units passes now
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29367 >
2024-05-24 03:45:44 +00:00
David Heidelberg
c39cf7bcab
docs: correct svga3d redirected URLs
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29366 >
2024-05-24 03:19:21 +00:00
David Heidelberg
fca045f02f
ci/freedreno: a3xx will never have Vulkan support
...
Do not spam CI logs.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29365 >
2024-05-24 02:56:47 +00:00
Yiwei Zhang
c71f650c2d
ci/venus: skip a timeout test
...
There're already a few similar ones being skipped.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29362 >
2024-05-24 02:34:45 +00:00
Yiwei Zhang
60488962db
venus: allow non-wsi image alias path to passthrough upon bind memory
...
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29362 >
2024-05-24 02:34:45 +00:00
Yiwei Zhang
c97f9193ef
venus: drop internal memory pools
...
This exists due to historical limitations which have long gone obsolete.
This persists longer due to hostorical perf issues that have recently
gone obsolete on the platforms shipping Venus. Meanwhile, clients like
skiavk and ANGLE nowadays do a better job managing suballocations. The
tiny perf win from having this giant internal pool has been beaten by
the memory waste, longer one-shot jank due to largier alloc, allocations
no need to be mapped but only because host-visible is advertised across
mem types and varies workarounds and markups needed to make alignment
work and make VVL happy. Dropping it also reduces the maintenance cost.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29362 >
2024-05-24 02:34:45 +00:00
David Heidelberg
db62ec3370
ci/nouveau: adjust and add DEVICE_TYPE
...
Rather than string made from farm-device, use DTB as we use for most of
the DEVICE_TYPE entries.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26758 >
2024-05-23 22:50:20 +00:00
David Heidelberg
18eb91da59
ci/nouveau: separate HW definition from SW
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26758 >
2024-05-23 22:50:20 +00:00
David Heidelberg
6bc660a542
ci/nouveau: move disabled jobs back from include into main gitlab-ci.yml
...
Fixes: 9442571664 ("ci: separate hiden jobs to -inc.yml files")
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26758 >
2024-05-23 22:50:20 +00:00
David Heidelberg
d315585d89
ci/r300: update flake list from nightly reports
...
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29255 >
2024-05-23 21:32:35 +00:00
Rob Clark
450c9460c6
freedreno/loader: Switch over to probe_nctx
...
Unwind the hacks that were previously used for freedreno to probe on
virtgpu, and switch over to the new mechanism.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28777 >
2024-05-23 20:02:04 +00:00
Rob Clark
2ea4a59ab7
loader: Add better support for virtgpu nctx driver loading
...
In the case of virtio_gpu, if the drm native context capset is
supported, we should try loading the native driver before falling back
to virgl.
Previously this was done with hacks in pipe_virtio_gpu_create_screen(),
but this also requires virgl's driconf to be the superset of virgl and
all the nctx drivers.
Instead add an optional loader callback to probe for nctx support. This
is called with the drm capset, if the host supports the drm context
type, to allow driver specific code to determine if the specific GPU is
supported, so we can cleanly fall back to virgl if it does not (for ex,
an old VM guest with a newer host, where mesa in the guest does not
support the new GPU, but mesa in the host does).
TODO: How to handle the dynamic loader case?
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28777 >
2024-05-23 20:02:03 +00:00
Rob Clark
27ebf58ee8
virgl: Update headers
...
VIRGL_RENDERER_UNSTABLE_APIS has been dropped upstream
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28777 >
2024-05-23 20:02:03 +00:00
Rob Clark
bba6418fcb
freedreno: Namespace DEFINE_CAST()
...
Otherwise it conflicts with a similar macro in drm_hw.h. (Which should
also be renamed, but better to rename that in virglrenderer tree first.)
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28777 >
2024-05-23 20:02:03 +00:00
Lionel Landwerlin
5f2288095b
anv: fix shader identifier handling
...
When compilation is required, we should return
VK_PIPELINE_COMPILE_REQUIRED. The spec prevents the application from
passing a module or SPIR-V code so we have nothing to compile if the
cache lookup fails :
VUID-VkPipelineShaderStageCreateInfo-stage-06844:
If a shader module identifier is specified for this stage, a
VkShaderModuleCreateInfo structure must not be present in the pNext
chain
VUID-VkPipelineShaderStageCreateInfo-stage-06848:
If a shader module identifier is specified for this stage, module
must be VK_NULL_HANDLE
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11208
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29340 >
2024-05-23 19:05:05 +00:00
Eric Engestrom
bfd4db0476
radv/ci: move amdgpu-specific kernel message warning to src/amd/ci/
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29339 >
2024-05-23 18:28:41 +00:00
Caio Oliveira
e3099fc839
spirv: Add MESA_SPIRV_DEBUG=values to dump all values
...
Dumps the value associated with each SPIR-V ID after parsing the module.
This will show the intermediate vtn_* values that spirv_to_nir uses.
Only a subset of detailed information is printed at the moment (focus on
pointers and pointer types), but it is easy to add for other value types
later.
Example output when running crucible with the debug option enabled.
```
crucible: start : func.compute.num-workgroups.basic.q0
=== SPIR-V values
1 = extension
2 = type void glsl_type=void
3 = type function
4 = function
5 = block
6 = type scalar glsl_type=uint
7 = type vector glsl_type=uvec3
8 = type array glsl_type=uvec3[]
9 = type struct glsl_type=Storage
10 = type pointer deref=9 SpvStorageClassUniform glsl_type=uvec4
11 = pointer ptr_type=10 (pointed-)type=9
12 = type scalar glsl_type=int
13 = constant type=12
14 = type pointer deref=7 SpvStorageClassInput glsl_type=uint
15 = pointer ptr_type=14 (pointed-)type=7
16 = constant type=6
17 = type pointer deref=6 SpvStorageClassInput glsl_type=uint
18 = pointer ptr_type=17 (pointed-)type=6
NIR: 32 %2 = deref_array &(*%0)[0] (system uint) // &gl_LocalInvocationID[0]
19 = ssa glsl_type=uint
20 = pointer ptr_type=14 (pointed-)type=7
21 = ssa glsl_type=uvec3
22 = type pointer deref=7 SpvStorageClassUniform glsl_type=uint
23 = pointer ptr_type=22 (pointed-)type=7
NIR: 32x4 %12 = deref_array &(*%11)[%4] (ssbo uvec3) // &((Storage *)%9)->uv3a[%4]
24 = constant type=6
25 = constant type=6
26 = constant type=7
===
crucible: pass : func.compute.num-workgroups.basic.q0
```
When the environment variable is set, this dump will also be printed
during vtn_fail and its helpers.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29295 >
2024-05-23 17:07:31 +00:00
Eric Engestrom
0effbc625c
nvk/ci: add missing .test rules to avoid running nvk tests in post-merge pipeline
...
Fixes: 94c82cd938 ("nvk/ci: add nvk job on a GA106 (RTX 3060)")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29352 >
2024-05-23 16:45:29 +00:00
Samuel Pitoiset
d0810d528c
radeonsi: use the common helper for initializing DS surfaces
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329 >
2024-05-23 15:47:14 +00:00
Samuel Pitoiset
ed30b320c8
radv: use the common helper for initializing DS surfaces
...
This adds GFX12 support implicitly.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329 >
2024-05-23 15:47:14 +00:00
Samuel Pitoiset
636110485f
amd/common: add a function to initialize ds surface
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329 >
2024-05-23 15:47:14 +00:00
Samuel Pitoiset
e1da1c891c
radv: separate non-mutable vs mutable fields for ds surface
...
RADV doesn't really have a concept of mutable fields but RadeonSI does.
Separate setting those fields to introduce common helpers.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329 >
2024-05-23 15:47:14 +00:00
Samuel Pitoiset
55be5868c5
radv: tidy up radv_initialise_ds_surface()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329 >
2024-05-23 15:47:14 +00:00
Samuel Pitoiset
e9a390cb94
radv: replace db_{z,stencil}_{read,write}_base by db_{depth,stencil}_base
...
Both read/write register values are similar.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329 >
2024-05-23 15:47:14 +00:00
Eric R. Smith
4d298673da
get_color_read_type: make sure format/type combo is legal for gles
...
The GLES spec limits the valid combinations of format and type that
may be returned by queries and/or used by ReadPixel. The list of valid
combinations appears in table 8.2 of the GLES 3.2 spec. Our code for
reporting the type and format of the current framebuffer, however,
does not verify that the combination is legal for GLES. For example,
RGBA and UNSIGNED_SHORT_1_5_5_5_REV is not a valid GLES combination,
but it's what we were returning for a panthor 16 bit frame buffer.
We can fix this either by changing the format or type that we return
(internally we can handle any format/type combination). We advertise the
read_format_bgra extension, so we could return GL_BGRA for the format.
However, very few applications (including notably the Khronos CTS for GLES)
cope well with BGRA. So instead we change the type to a non-_REV one
so that the combination appears in the GLES spec table of legal values.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29144 >
2024-05-23 15:04:30 +00:00
Collabora's Gfx CI Team
5120d51d82
Uprev Piglit to e180f96239edba441f22f58dfc852cafb902844a
...
8a6ce9c6fc...e180f96239
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29317 >
2024-05-23 14:04:22 +00:00
Timur Kristóf
c23c5c0a07
nir/opt_varyings: Don't promote flat inputs when moving post-dominator.
...
Promoting flat inputs should only happen while assigning FS input
slot groups. Otherwise we risk adding extra input slots, which
is undesireable.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29208 >
2024-05-23 13:14:46 +00:00
Timur Kristóf
9dad0ced52
nir/opt_varyings: Print FS VEC4 type when debugging relocate_slot.
...
Useful when debugging this pass.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29208 >
2024-05-23 13:14:46 +00:00
Eric Engestrom
72330e607f
nvk/ci: mark the job as failing in case of hangs, instead of silently rebooting
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29341 >
2024-05-23 10:48:19 +00:00
Eric Engestrom
93493ea441
nvk/ci: adjust the regex for "dut is broken and needs to be rebooted"
...
We are seeing issues where the regex matches when it shouldn't, and
I think it might be because the `:` is causing issues in yaml.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29341 >
2024-05-23 10:48:19 +00:00
Erik Faye-Lund
afef382009
panfrost: untangle faces from layers
...
The hardware doesn't prevent us from mapping random 2DArray layers
as cube/cube arrays. The only restriction we have is on the number
of layers we pass (must be a multiple of 6 for cube arrays).
This patch makes the surface emission logic cube-agnostic, and
moves the cube face -> surface index conversion logic one layer
up to simplify things.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28909 >
2024-05-23 10:18:07 +00:00
Erik Faye-Lund
8455e0521e
panfrost: explicitly loop over surfaces
...
The surface iterator here doesn't really help much. It seems much more
to the point to explicitly iterate over the surfaces in the order the HW
descriptors expects it.
This will make it easier to change how things works in the future,
especially for V9 and later. More on that in a later commit.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28909 >
2024-05-23 10:18:07 +00:00
Erik Faye-Lund
6497adeb35
panfrost: simplify panfrost_texture_num_elements
...
Adjusting the cube-dimensions to account for layers and faces does
nothing to change the number of elements, it just shifts the number
between the two.
This means we can simplify things a bit, and avoid a questionable assert
in the process.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28909 >
2024-05-23 10:18:07 +00:00
Jose Maria Casanova Crespo
7cb2831ef5
v3dv/ci: Add more dEQP-VK subgroups that are currently skipped
...
We are skipping additional 357684 tests for the following subgroups
where all tests results are skip to reduce CI usage testing skipped
tests. It reduces the CI time execution by a 2%.
14304 dEQP-VK.binding_model.mutable_descriptor.*
22948 dEQP-VK.binding_model.shader_access.primary_cmd_buf.bind2.*
20258 dEQP-VK.binding_model.shader_access.secondary_cmd_buf.bind2.*
11662 dEQP-VK.compute.shader_object_binary.*
11662 dEQP-VK.compute.shader_object_spirv.*
196299 dEQP-VK.image.host_image_copy.*
14043 dEQP-VK.query_pool.statistics_query.*
54656 dEQP-VK.robustness.robustness2.*
11852 dEQP-VK.sparse_resources.*
We are also using alphabetical order these subgroups.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29328 >
2024-05-23 11:55:26 +02:00
Eric Engestrom
8b448ffdd7
turnip+zink/ci: add gl & gles CTS jobs on the a750
...
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29026 >
2024-05-23 06:58:01 +00:00
Eric Engestrom
3088af9051
turnip/ci: add vkcts jobs on the a750
...
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29026 >
2024-05-23 06:58:01 +00:00
Martin Roukala (né Peres)
6f9614c187
ci/b2c: Reduce the length of the kernel cmdline
...
The qcom boards I am about to introduce do not support long kernel
cmdline, so reduce its size by making use of b2c's extra argument URL.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org >
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29026 >
2024-05-23 06:58:01 +00:00
Eric Engestrom
265b0ebd9a
ci/b2c: add aarch64 tests for gl & vk
...
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29026 >
2024-05-23 06:58:01 +00:00
Samuel Pitoiset
2867a07922
radv: fix setting a custom pitch for CB on GFX10_3+
...
The gfx_level check was missing the version...
Found by inspection.
Fixes: 3f7ddaf281 ("radv: implement setting a custom pitch to any multiple of 256B on gfx10.3+"
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29331 >
2024-05-23 06:10:07 +00:00
Eric Engestrom
f168dc6d53
zink/ci: rename zink-turnip collabora rule to make it unambiguous
...
We're about to add zink-turnip jobs on another farm.
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241 >
2024-05-23 06:01:09 +02:00
Eric Engestrom
815a5e9a8e
ci: add debian/arm64_test images for gl & vk
...
These are real ARM images, unlike the `debian/baremetal_arm*_test` ones
that are x86_64 images with the ARM stuff tucked away in a sub-folder.
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241 >
2024-05-23 06:00:50 +02:00
Eric Engestrom
7fb13a9153
ci/image-tags: rename DEBIAN_X86_64_TEST_*_TAG to drop the x86 mention
...
We're about to add ARM images using this same infra.
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241 >
2024-05-23 06:00:50 +02:00
Eric Engestrom
c325632b14
ci: prepare VK debian test image for multi-arch
...
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241 >
2024-05-23 06:00:23 +02:00
Eric Engestrom
124ff9c232
ci: prepare GL debian test image for multi-arch
...
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241 >
2024-05-23 06:00:22 +02:00
Eric Engestrom
3cd6f86b7e
ci: prepare base debian test image for multi-arch
...
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241 >
2024-05-23 06:00:22 +02:00
Eric Engestrom
c7cecc1604
ci: rename debian/arm*_test to debian/baremetal_arm*_test to be clear about which infra uses that
...
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241 >
2024-05-23 06:00:22 +02:00
Eric Engestrom
968af05a53
ci: drop dead variables (see previous commit)
...
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241 >
2024-05-23 06:00:22 +02:00
Eric Engestrom
27592453ac
ci: fix build-kernel.sh -> download-prebuilt-kernel.sh
...
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241 >
2024-05-23 06:00:22 +02:00
Dave Airlie
2abdc84606
Revert "zink: use a slab allocator for zink_kopper_present_info"
...
This reverts commit 738fbddca8 .
This was missing locking which caused problems
Closes: 11161
Fixes: 738fbddca8 ("zink: use a slab allocator for zink_kopper_present_info")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29338 >
2024-05-23 12:24:51 +10:00
Eric Engestrom
cdf75e8e02
docs: update calendar for 24.1.0
...
And add expected calendar for 24.1.x releases.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29334 >
2024-05-22 19:07:01 +00:00
Eric Engestrom
f4cc6645ff
docs: add sha256sum for 24.1.0
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29334 >
2024-05-22 19:07:01 +00:00
Eric Engestrom
0e3d86f7d3
docs: add release notes for 24.1.0
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29334 >
2024-05-22 19:07:01 +00:00
Jose Maria Casanova Crespo
7afebc15ce
v3dv: V3D_CL_MAX_INSTR_SIZE bytes in last CL instruction not needed
...
As we are marking the last V3D_CLE_READAHEAD bytes as unusable we don't
need to reserve V3D_CL_MAX_INSTR_SIZE bytes for the CLE packet.
This reverts c2601f0690 ("v3dv: ensure at least V3D_CL_MAX_INSTR_SIZE
bytes in last CL instruction")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29023 >
2024-05-22 18:44:14 +00:00
Jose Maria Casanova Crespo
bb77ac983e
v3dv: Increase alignment to 16k on CL BO on RPi5
...
We increase the alignment to 16k for BOs allocated for the CL on RPi5 HW.
So we have the same ratio of usable space because of HW readahead as
than on RPi4, as readahead has been increased from 256 to 1024 bytes on
RPi5.
We have also concluded that when the kernel is running with 16k pages
that is the default on Raspberry Pi 5 HW, BO allocations are aligned to
16k so this increase has no cost and we would be using memory more
efficiently.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29023 >
2024-05-22 18:44:14 +00:00
Jose Maria Casanova Crespo
e2c624e74e
v3d: Increase alignment to 16k on CL BO on RPi5
...
We increase the alignment to 16k for BOs allocated for the CL on RPi5 HW.
So we have the same ratio of usable space because of HW readahead as
than on RPi4, as readahead has been increased from 256 to 1024 bytes on
RPi5.
We have also concluded that when the kernel is running with 16k pages
that is the default on Raspberry Pi 5 HW, BO allocations are aligned to
16k so this increase has no cost and we would be using memory more
efficiently.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29023 >
2024-05-22 18:44:14 +00:00
Jose Maria Casanova Crespo
26c8a5cd72
v3dv: fix CLE MMU errors avoiding using last bytes of CL BOs.
...
The last V3D_CLE_READAHEAD bytes of the CLE buffer are unusable because
using them would prefetch the next readahead bytes of the CL that would
be outside the allocated BO. To guarantee that we can chain a BO to the
current CL we always reserve space for the BRANCH or
RETURN_FROM_SUB_LIST packets.
Not taking this into account has been generating kernel dmesg errors like
"MMU error from client CLE".
As V3D_CLE_READAHEAD is different from RPi4 (256 bytes) to RPi5 (1024 bytes).
So we needed to rename v3dv_cl.c to v3dvX_cl.c to have different objects per
V3D_VERSION.
Extra assertions have been included to validate that we don't write
packets over the usable size of the CL silently.
v2: - Do not declare unusable the space needed for the BRANCH packet,
but take it into account for all space reservations.
v3: - Squash here ("v3dv: Secondary CL needs also to handle CLE readahead")
- Remove spureous parenthesis (Iago Toral)
- Refactor to avoid checking for needs_return_from_sub_list inside
cl_alloc_bo adding unusable_space as new parameter.
v4: - Improved logic for chaining BOs moving it to cl_alloc_bo using
a new enum v3dv_cl_chain_type to identify the different kinds
of BO chaining. Now we increase the size of the BO just before
submitting the BRACH/RETURN_FROM_SUB_LIST packages.
v5: - Assert on BO size updates that we are within the BO size.
(Iago Toral)
v6: - Remove changes at cmd_buffer_end_render_pass_secondary as we
assumed that cl->bo was already allocated when ending the
secondary CL, but it can be NULL. And this was already handle
by current code.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29023 >
2024-05-22 18:44:14 +00:00
Jose Maria Casanova Crespo
11dce2ac81
v3d: fix CLE MMU errors avoiding using last bytes of CL BOs.
...
The last V3D_CLE_READAHEAD bytes of the CLE buffer are unusable because
using them would prefetch the next readahead bytes of the CL that would
be outside the allocated BO. To guarantee that we can chain a BO to the
current CL we always reserve space for the BRANCH packet.
Not taking this into account has been generating kernel dmesg errors like
"MMU error from client CLE".
As V3D_CLE_READAHEAD is different from RPi4 (256 bytes) to RPi5 (1024 bytes).
So we needed to rename v3d_cl.c to v3dX_cl.c to have different objects per
V3D_VERSION.
Extra assertions have been included to validate that we don't write
packets over the usable size of the CL silently.
v2: - Remove spurious blank line (Iago Toral)
- Do not declare unusable the space needed for the BRANCH packet,
and take it into account for all reservations.
v3: - Handle BRANCH packet reserve only when CLE BO allocation is done.
v4: - Assert on BO size updates that we are within the BO size.
(Iago Toral)
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29023 >
2024-05-22 18:44:14 +00:00
Eric Engestrom
4c974c334c
docs: add sha256sum for 24.0.8
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29332 >
2024-05-22 18:35:36 +00:00
Eric Engestrom
7f09cac4a6
docs: update calendar for 24.0.8
...
And add one last 24.0.x release.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29332 >
2024-05-22 18:35:36 +00:00
Eric Engestrom
9c9307a972
docs: add release notes for 24.0.8
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29332 >
2024-05-22 18:35:36 +00:00
Corentin Noël
be6fece6e1
venus: enable VK_KHR_maintenance5
...
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Signed-off-by: Corentin Noël <corentin.noel@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29058 >
2024-05-22 18:15:34 +00:00
Corentin Noël
3359fbc25b
venus: sync protocol for VK_KHR_maintenance5
...
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Signed-off-by: Corentin Noël <corentin.noel@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29058 >
2024-05-22 18:15:34 +00:00
Renato Pereyra
51d6162c80
anv: Attempt to compile all pipelines even after errors
...
Per the Vulkan Spec section 10.1, the implementation is supposed to
attempt to create all pipelines even if creation of any one pipeline
in a create call fails. If more than one error occur, any one error
is valid as a return value.
Signed-off-by: Renato Pereyra <renatopereyra@chromium.org >
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29315 >
2024-05-22 17:46:34 +00:00
Danylo Piliaiev
745b0fc79f
freedreno: Make fd_pps_driver.h usable without including other FD sources
...
fd_pps_driver.h is included in src/tool/pps/pps_driver.cc which isn't
built with freedreno sources but linked with freedreno pps.
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11183
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29325 >
2024-05-22 17:09:59 +00:00
Samuel Pitoiset
f458b0fc4b
radv: replace vk_to_non_srgb_format() by vk_format_no_srgb()
...
Similar but it handles more formats.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29322 >
2024-05-22 16:34:17 +00:00
Samuel Pitoiset
bab26a239e
radv: simplify radv_is_vertex_buffer_format_supported()
...
ac_translate_buffer_dataformat() already handles everything correctly.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29322 >
2024-05-22 16:34:17 +00:00
Samuel Pitoiset
e7016fb7a6
radv: remove useless check about FIXED formats
...
There are no FIXED formats in Vulkan.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29322 >
2024-05-22 16:34:17 +00:00
Samuel Pitoiset
33e558f64a
radv: remove unused radv_translate_buffer_dataformat()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29322 >
2024-05-22 16:34:17 +00:00
Lionel Landwerlin
3584fc6482
anv: use weak_ref mode for global pipeline caches
...
So that as soon as pipelines are freed, they're removed from the
cache.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11185
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Tested-by: Brian Paul <brian.paul@broadcom.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29283 >
2024-05-22 15:22:56 +00:00
Timur Kristóf
3963e4b53a
radv: Fix TCS -> TES I/O linking typo of VARYING_SLOT vs. BIT.
...
In these bitwise expressions, VARYING_BIT_* should be used,
but the code mistakenly used VARYING_SLOT_* which is wrong.
Fixes: 0e481a4adc
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29327 >
2024-05-22 14:39:49 +00:00
Boris Brezillon
4b6f7613c0
panvk: Emit the fragment shader RSD dynamically
...
This is the final step of the dynamic graphics state transition,
making the panvk_pipeline logic a dumb layer on top of panvk_shader
whose sole responsibility is to compile+link shaders, and call some
vk_graphics_pipeline helpers to store the static state in a
vk_dynamic_graphics_state object that can be copied to the command
buffer dynamic graphics state at pipeline bind time.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
4335560bb7
panvk: Move fs_rsd fields to an fs sub-struct
...
Cosmetic change to group all fs related fields under a common struct.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
c6e0761d0d
panvk: Replace the stages array in panvk_draw_info by vs/fs fields
...
We only support vertex/fragment shaders, and a lot of the code (like
shader linking) makes this assumption. Let's not pretend we support
other stages by replacing the stages array in panvk_draw_info by vs/fs
fields.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
0471a30fcc
panvk: Fix/simplify the shader linking logic
...
Stop passing panvk_varyings_info around and emit varying attributes
when building the pipeline. All the command buffer logic has to do is
allocate varying memory, and emit the attribute buffer descriptors
pointing to these buffers. We also keep the buffer index fixed to keep
things simple, when a buffer is missing, it will simply be filled with
a zero-sized/NULL entry.
Note that we store the buffer stride information in panvk_pipeline_shader
to prepare the transition to vk_shader.
As a bonus, this simplification seems to fix a few CTS failures.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
dfbec67cb0
panvk: Simplify shader initialization in the pipeline logic
...
The multi-step compilation is not needed since we don't have clever
linking optimization tricks just yet. Let's handle compilation, shader
upload and renderer state descriptor emission in one step and make as
much as we can stage agnostic. The remaining FS-specific stuff are moved
to init_fs_state().
While at it, move as much information as we can to the
panvk_pipeline_shader object we created, to make the transition to
vk_shader easier.
We also stop using MESA_SHADER_STAGES-sized arrays everywhere, since
we only support vertex and fragment shaders.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
e7a9bd1cbe
panvk: Don't pass the stage to shader_create()
...
Can be extracted from stage_info instead.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
6724ee7619
panvk: Add a blend library to deal blend shaders/descriptors
...
We intend to support more dynamic color blending states, which implies
supporting blend shaders. Let's provide a lib automating blend
descriptor emission and blend shader management.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
5406a65955
pan/blend: Expose pan_blend_create_shader()
...
Will be used in panvk.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
92136c7062
pan/blend: Move constant inlining out of pan_blend_create_shader()
...
We will expose pan_blend_create_shader() so panvk can use it for its
blend shader logic. In panvk, we pass the blend constants through push
uniforms, and as such, we don't want constant inlining, so we can
re-use the same shader no matter the constants.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
214761bdfe
panvk: Fully transition to vk_vertex_binding_state
...
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
bd71c586cb
panvk: Leave holes in the attribute locations used by a shader
...
If we want to be able to emit attribute descriptors based on
vk_vertex_input_state without adjusting it every time a new vertex
shader is bound, we need to rely on the shader attribute location
info instead of compacting the location range.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
3683aaeb02
panvk: Emit VS-accessible image attributes at a fixed offset
...
We need to do that if we want to be able to use vk_vertex_input_state
as our reference attribute layout without having to adjust things based
on the attribute actually accessed by the vertex shader.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
497c43f161
panvk: Move VS attribute/buffer state to panvk_cmd_graphics_state
...
Vertex buffers/attributes and descriptor sets are orthogonal, move the
VS attrib/attrib_bufs fields to panvk_cmd_graphics_state to avoid the
confusion.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
9c6b922fe1
panvk: Prevent re-emission of image attributes used in vertex shaders
...
When we fill the image attributes of a VS attribute table, we shouldn't
have to re-emit those image attributes for the fragment shader. Make
sure we update img.{attrib_bufs,attribs} to prevent that.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
936ebd3370
panvk: Rename non_vs_attribs into img_attribs
...
Images attributes are the only non-VS attributes we might store in
the attribute table, so let's rename fields and functions to make that
clear.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
5a37a62bed
panvk: Set unused attribute buffers descriptors to zero
...
We assume two attribute buffer slot for each attribute buffer. Let's
fill unused slots with zeros so we don't risk unexpected read accesses
if the slot contains garbage.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
a195486e6f
panvk: Fully transition to vk_multisample_state
...
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
a3e024a59e
panvk: Fully transition to vk_depth_stencil_state
...
Replace our ZS state by the vk_depth_stencil_state provided by the
vulkan runtime lib.
This was the last bit using panvk_dynamic_state_bits enum, so we kill it
here along with the parse_dynamic_state() function.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
a58171fb3c
panvk: Use vk_color_blend_state to fill our blend constant
...
We need to keep some panvk-specific blend state at the panvk_pipeline
level until we've made RSD emission fully dynamic.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
bbcf505a08
panvk: Fully transition to vk_input_assembly_state
...
No need to have our own input assembly state.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
07afc7e3ed
panvk: Fully transition to vk_rasterization_state
...
There's no point storing the rasterizer state twice. Use
vk_rasterization_state everywhere, and let the core implement
CmdSetLineWidth() and CmdSetDepthBias() for us.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
f4ce783f0e
panvk: Fully transition to vk_viewport_state
...
Pre-emitting viewport descriptors at pipeline creation time makes things
more complex for little savings. Be dumb and emit viewport at draw time
based on the current command buffer dynamic state.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
6b1a8226fa
panvk: Transition the graphics pipeline logic to vk_graphics_pipeline_state
...
Fill a vk_graphics_pipeline_state and pass it around instead of passing
VkGraphicsPipelineCreateInfo.
We also call vk_cmd_set_dynamic_graphics_state() from CmdBindPipeline()
to prepare for a smooth 'make it all dynamic' transition.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
160db68bd7
panvk: Kill the panvk_pipeline_builder object
...
The pipeline builder object is not super useful, and it's now getting
in the way of the vk_graphics_state transition. Let's get rid of it and
pass CreateInfo around for now.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
2e0081d44c
panvk: Use memory pools to store pipeline shaders/descriptors
...
This greatly simplifies the pipeline creation logic, and the memory
footprint overhead of two panvk_pool objects should be negligible
compared to all the states we already have in a pipeline object.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
bd6e32ef9c
panvk: Split compute/graphics pipeline objects
...
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
513e0bd46b
panvk: Split the graphics and compute state at the cmd_buffer level
...
Prepare the ground for the transition to vk_graphics_state.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
5196aeacf6
panvk: Get rid of special attribute support
...
This is a leftover of the Midgard support removal.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
04b20157f8
panvk: Kill unused dynamic state bits
...
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
94e28d350d
panvk: Move panvk_cmd_state::batch to panvk_cmd_buffer::cur_batch
...
We are about to split the compute/graphics state, but before we do
that, move the batch field out of the cmd_state.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
330a75b9f3
panvk: Get rid of panvk_descriptor_state::dirty
...
This field is only set, never tested. When we want to flag a descriptor
dirty, we simply set the relevant mali_ptr in panvk_descriptor_state
to zero.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
a3fb990a86
panvk: Kill panvk_queue_get_device()
...
We use to_panvk_device() elsewhere.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Boris Brezillon
f57af8fe1c
panvk: clang-format fixups
...
Reconcile recent modifications with clang-format.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28927 >
2024-05-22 14:13:16 +00:00
Juan A. Suarez Romero
90f8be9bda
ci: define SNMP base interface on runner
...
In order to turn on/off through SNMP DuT under PoE switch, the SNMP key
in some vendors don't directly use the interface number, but a number
shifted a base number.
Define this base number as BM_POE_BASE environment in the runner.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29306 >
2024-05-22 12:09:55 +00:00
Friedrich Vock
18c736bcfc
radeonsi: Use max_se instead of num_se where appropriate
...
Scratch allocation needs to happen using max_se, otherwise there can be
hangs.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29202 >
2024-05-22 10:35:01 +00:00
Friedrich Vock
db564a40b3
radv: Use max_se instead of num_se where appropriate
...
Scratch allocation needs to happen using max_se, otherwise there can be
hangs.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29202 >
2024-05-22 10:35:01 +00:00
Eric Engestrom
1966b6c887
zink+nvk/ci: update expected failures
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28207 >
2024-05-22 10:06:16 +00:00
Eric Engestrom
acd395f1f8
zink+nvk/ci: document flakes seen during stress-testing
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28207 >
2024-05-22 10:06:16 +00:00
Eric Engestrom
fc1db264ed
zink+nvk/ci: skip more tests that times out
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28207 >
2024-05-22 10:06:16 +00:00
Eric Engestrom
0bd551f6ec
zink+nvk/ci: skip timing out test
...
Instead of spending our time running it to make sure it times out, which
is not very useful.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28207 >
2024-05-22 10:06:16 +00:00
Eric Engestrom
393cd1ffdf
zink+nvk/ci: skip glx piglit tests as they all fail
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28207 >
2024-05-22 10:06:16 +00:00
Eric Engestrom
5a6ffd1420
zink/ci: add zink+nvk glcts+piglit job on a GA106 (RTX 3060)
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28207 >
2024-05-22 10:06:16 +00:00
Eric Engestrom
94c82cd938
nvk/ci: add nvk job on a GA106 (RTX 3060)
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28207 >
2024-05-22 10:06:16 +00:00
Samuel Pitoiset
3d6957268b
aco: use new common helpers for building buffer descriptors
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29268 >
2024-05-22 08:31:39 +00:00
Samuel Pitoiset
074f3cfe73
radv: use new common helpers for building buffer descriptor
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29268 >
2024-05-22 08:31:39 +00:00
Samuel Pitoiset
d3b01fd95e
amd/common: add new helpers to build buffer descriptors
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29268 >
2024-05-22 08:31:39 +00:00
Samuel Pitoiset
3224fd706c
amd/common: only pass gfx_level to ac_get_gfx10_format_table()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29268 >
2024-05-22 08:31:39 +00:00
Samuel Pitoiset
64fefc1179
ac,radv,radeonsi: add a common helper for translating swizzle
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29268 >
2024-05-22 08:31:39 +00:00
Samuel Pitoiset
2487a87552
ac,radv,radeonsi: add function to determine if alpha should be on MSB
...
The only difference for RADV is that the helper now converts SRGB
formats to non-SRGB but that shouldn't change anything in practice.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29308 >
2024-05-22 08:17:31 +02:00
Samuel Pitoiset
179f4ed414
radv: adjust determining if alpha should be on MSB
...
Ported from RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29308 >
2024-05-22 08:14:56 +02:00
Samuel Pitoiset
68c4d26691
radv: only set ALPHA_IS_ON_MSB if the image has DCC on GFX6-9
...
This is technically incorrect to only check meta_offset which might be
non-zero for CMASK/FMASK but this applies to DCC only.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29308 >
2024-05-22 08:14:56 +02:00
Maíra Canal
3e8b2fe053
broadcom/simulator: Add DRM_IOCTL_V3D_GET_COUNTER to simulator
...
As this new IOCTL was introduced in the kernel, mirror the change in
the simulator.
Signed-off-by: Maíra Canal <mcanal@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29154 >
2024-05-22 05:37:48 +00:00
Maíra Canal
e630812b43
broadcom/simulator: Add DRM_V3D_PARAM_MAX_PERF_COUNTERS parameter support
...
As this new parameter was introduced in the kernel, mirror the change in
the simulator.
Signed-off-by: Maíra Canal <mcanal@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29154 >
2024-05-22 05:37:48 +00:00
Maíra Canal
017dde0d1c
v3d: Use DRM_IOCTL_V3D_GET_COUNTER to get perfcnt information
...
Currently, the information about the performance counters is duplicated
both in the kernel and in user space. Naturally, this leads to
inconsistency, as the user space might be updated and while the kernel
isn't.
Aiming to turn the kernel as the "single source of truth", use
DRM_IOCTL_V3D_GET_COUNTER, when available, to get performance counter
information.
Signed-off-by: Maíra Canal <mcanal@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29154 >
2024-05-22 05:37:48 +00:00
Maíra Canal
c5b2d943ad
v3dv: Use DRM_IOCTL_V3D_GET_COUNTER to get perfcnt information
...
Currently, the information about the performance counters is duplicated
both in the kernel and in user space. Naturally, this leads to
inconsistency, as the user space might be updated and the kernel isn't.
Aiming to turn the kernel as the "single source of truth", use
DRM_IOCTL_V3D_GET_COUNTER, when available, to get the performance
counter information.
Signed-off-by: Maíra Canal <mcanal@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29154 >
2024-05-22 05:37:48 +00:00
Maíra Canal
273ba51d7f
broadcom/common: Add maximum number of perf counters to v3d_device_info
...
Now, the kernel has the ability to inform about the maximum number of
performance counters of a V3D device. Let's add this information to the
`struct v3d_device_info` to use it when performing performance queries.
From now on, V3D_PERFCNT_NUM must not be used to retrieve the maximum
number of performance counters. We must use `devinfo->max_perfcnt`,
except on the case that the kernel doesn't support DRM_V3D_PARAM_MAX_PERF_COUNTERS.
Signed-off-by: Maíra Canal <mcanal@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29154 >
2024-05-22 05:37:47 +00:00
Maíra Canal
ce7bca176f
drm-uapi: Update v3d_drm.h
...
From https://cgit.freedesktop.org/drm/drm-misc/
commit 673087d8b023faf34b84e8faf63bbeea3da87bab
Author: Maíra Canal <mcanal@igalia.com >
Date: Sun May 12 19:23:29 2024 -0300
drm/v3d: Deprecate the use of the Performance Counters enum
Signed-off-by: Maíra Canal <mcanal@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29154 >
2024-05-22 05:37:47 +00:00
Juston Li
4b3e286d33
venus: add missing sTypes for vk_set_physical_device_properties_struct
...
The contents were previously copied with vk_copy_struct_guts(),
now that we use vk_set_physical_device_properties_struct, the sType
is needed.
Fixes: ("3c152a6e5dd venus: Use common physical device properties")
Signed-off-by: Juston Li <justonli@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29314 >
2024-05-21 23:01:37 +00:00
Rhys Perry
b99c48b011
aco/lower_phis: don't create boolean loop header phis in some situations
...
If we have a loop with continue_or_break and no divergent exits, there is
no need for a loop header phi.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29121 >
2024-05-21 21:28:13 +00:00
Rhys Perry
4ae8a558b2
aco: remove nir_to_aco
...
This isn't used anymore
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29121 >
2024-05-21 21:28:13 +00:00
Rhys Perry
b1964f03e7
aco: use scalar phi lowering for lcssa workaround
...
This lets us use non-undef for the last operand, if necessary
(demonstrated in the test).
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29121 >
2024-05-21 21:28:13 +00:00
Rhys Perry
bbe4652430
aco: create lcssa phis for continue_or_break loops when necessary
...
These might not exist because adding would decrease the quality of
divergence analysis. They are necessary for continue_or_break though, so
add them later, where they won't affect divergence analysis.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10623
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29121 >
2024-05-21 21:28:13 +00:00
Rhys Perry
3fc7207f50
aco/lower_phis: create loop header phis for non-boolean loop exit phis
...
These might be necessary if continue_or_break and divergent breaks are both used:
loop {
if (divergent) {
a = loop_invariant_sgpr
break
}
discard_if
}
b = phi a
If we break because discard_if makes exec empty but only did so in
previous iterations, then the phi should use "a" from those previous
iterations.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29121 >
2024-05-21 21:28:13 +00:00
Derek Foreman
175d2d680a
wsi/wayland: Fix use after free from improperly stored VkAllocationCallbacks
...
These callbacks are no longer valid when cleaning up, and a use after free
occurs.
There's no need to store this at all anyway, so just stop doing that.
Fixes: 57c03fe4
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11184
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29310 >
2024-05-21 21:01:25 +00:00
Timur Kristóf
0e0c2574d1
radv: Add shader stats for inputs and outputs.
...
These new stats report the combined inputs and outputs of
graphics stages stages where applicable.
Task -> Mesh payload is not included.
This is useful for reporting the effects of any shader
optimizations which affect linking.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29209 >
2024-05-21 20:37:05 +00:00
Timur Kristóf
590fff6906
radv: Add TES num_linked_patch_inputs.
...
Not needed by actual driver functionality, but will be
used for reporting I/O stats.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29209 >
2024-05-21 20:37:05 +00:00
David Heidelberg
4a6d7e79ad
subprojects: uprev perfetto to v45.0
...
Cc: mesa-stable
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29311 >
2024-05-21 20:02:00 +00:00
Constantine Shablia
0d59fe21ce
panvk: remove descriptor pool counters
...
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29250 >
2024-05-21 19:41:11 +00:00
Samuel Pitoiset
bb09fac659
ac,radv,radeonsi: add a function for getting border color swizzle
...
The swizzle for 8-bit stencil shuld be also fine on RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29307 >
2024-05-21 19:12:52 +00:00
Rob Clark
25a206b9ac
tu: Don't advertise AHB handle time on non-android
...
Fixes
dEQP-VK.api.external.memory.android_hardware_buffer.dedicated.image.info
among others.
Fixes: 99753001f3 ("turnip: Support AHardwareBuffer")
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29309 >
2024-05-21 18:45:31 +00:00
Rob Clark
b71f3f1314
docs/features: Add missing AHB for tu
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29309 >
2024-05-21 18:45:31 +00:00
Marek Olšák
eef5e4221f
radeonsi: vectorize load/stores and shrink stores
...
based on RADV
Reviewed-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29282 >
2024-05-21 18:20:30 +00:00
Marek Olšák
8cb254e0b8
radeonsi: call nir_lower_int64 later to fix ACO failure with Tomb Raider
...
Reviewed-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29282 >
2024-05-21 18:20:30 +00:00
Marek Olšák
5a115b1055
ac/llvm: global stores should have no holes in the writemask
...
Reviewed-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29282 >
2024-05-21 18:20:30 +00:00
Marek Olšák
7952e4fc7a
ac: move radv_mem_vectorize_callback to common code
...
Reviewed-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29282 >
2024-05-21 18:20:30 +00:00
Samuel Pitoiset
26cd3a1718
ac,radv,radeonsi: add a helper to set mutable tex desc fields
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29286 >
2024-05-21 16:41:40 +00:00
Samuel Pitoiset
7523c1ec57
radv: stop clearing unnecessary bitfields in radv_set_mutable_tex_desc_fields()
...
They should already be zero because nothing else sets them before.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29286 >
2024-05-21 16:41:40 +00:00
Samuel Pitoiset
d09afbdebc
radv: set ITERATE_256 for GFX10+ in radv_set_mutable_tex_desc_fields()
...
To be closer to the RadeonSI helper. This doesn't change anything for
RADV because images are required to be bound at image view creation.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29286 >
2024-05-21 16:41:40 +00:00
Samuel Pitoiset
fb37ea092d
radv: tidy up meta_va in radv_set_mutable_tex_desc_fields()
...
To be closer to the RadeonSI helper.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29286 >
2024-05-21 16:41:40 +00:00
Samuel Pitoiset
8adb326f59
radv: tidy up custom pitch for gfx10.3 in radv_set_mutable_tex_desc_fields()
...
To be closer to the RadeonSI helper.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29286 >
2024-05-21 16:41:40 +00:00
Samuel Pitoiset
d1fa5ffab0
radv: tidy up swizzle in radv_set_mutable_tex_desc_fields()
...
To be closer to the RadeonSI helper.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29286 >
2024-05-21 16:41:40 +00:00
Samuel Pitoiset
81e927ea05
ac,radv,radeonsi: add a helper to get the tile mode index
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29286 >
2024-05-21 16:41:40 +00:00
Samuel Pitoiset
72485fe592
radv: set image view descriptors as buffer for non-graphics GPU
...
Ported from RadeonSI, for CDNA.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29286 >
2024-05-21 16:41:40 +00:00
Timur Kristóf
c1d38b0b37
nir: Add nir_opt_load_store_update_alignments.
...
New pass that shares code with nir_opt_load_store_vectorize but
it only updates the alignment of load/store instructions.
It is useful before running other passes which may
potentially destroy that information (eg. by removing some
instructions from which the alignment may be deduced).
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29210 >
2024-05-21 16:06:23 +00:00
Alyssa Rosenzweig
0b582449f0
nir/lower_point_size: support lowered i/o
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29248 >
2024-05-21 15:30:10 +00:00
Valentine Burley
471ac97a4a
drm-shim: Stub syncobj reset ioctl
...
Fixes DRM_SHIM: unhandled core DRM ioctl 0xC4 (0xc01064c4).
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Reviewed-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28504 >
2024-05-21 14:14:25 +00:00
Georg Lehmann
cc404d45ff
aco: remove perfwarn
...
This didn't do anything useful.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29270 >
2024-05-21 13:31:23 +00:00
Georg Lehmann
ea3e5bcc99
aco/optimizer: remove ineffective undef opt
...
No stats changes.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29270 >
2024-05-21 13:31:23 +00:00
Georg Lehmann
bd699b5d88
aco/optimizer: remove ineffective vcc opt
...
No stats changes.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29270 >
2024-05-21 13:31:23 +00:00
Eric R. Smith
eefe34127f
panfrost: add a barrier when launching xfb jobs in CSF
...
When we start writing to an XFB buffer we need to synchronize with
any batches reading from it (because the data they need is about
to be overwritten). Do this by introducing a barrier in csf_launch_xfb.
This patch fixes a valhall failure in
KHR-GLES31.core.vertex_attrib_binding.advanced-iterations
Cc: mesa-stable
Signed-off-by: Eric R. Smith <eric.smith@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29092 >
2024-05-21 13:03:40 +00:00
Juan A. Suarez Romero
69ceb5dab9
v3d: remove handled cases for devices <= 42
...
The driver nowadays requires hardware version >= 4.2, but in the old
days it managed older versions.
Remove some leftovers remaining in the code.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29299 >
2024-05-21 12:39:41 +00:00
Juan A. Suarez Romero
cbcfb34cf7
v3d: use BITSET for the masks
...
So far we were using raw uint32_t for handling masks. But this has the
issue that it only allows to handle up to 32 elements; if we need to
handle more elements, the we need to upgrade to uint64_t.
And this happened inadvertently with commit 370f02bf02 ("gallium: Bump
PIPE_MAX_SHADER_IMAGES to 64"), where the number of elements to handled
were increased from 32 to 64, but we didn't upgrade the mask type.
To fix this, and avoid this happening again in the future, let's use
BITSET, which is designed to handle bitmasks, and can able to handle as
many elements as desired.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29299 >
2024-05-21 12:39:41 +00:00
Rob Clark
924c5ad2ac
egl/android: Fix sRGB visuals
...
The switch to filtering visuals by pipe_format overlooked the
corresponding _SRGB formats.
Fixes: 273e54391a ("egl/android: Remove hard-coded color-channel data")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11182
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29292 >
2024-05-21 11:57:55 +00:00
Samuel Pitoiset
97962f2a34
radv: mark some formats as unsupported on GFX8/CARRIZO
...
Ported from RadeonSI, untested.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29288 >
2024-05-21 06:34:06 +00:00
Samuel Pitoiset
e384b28805
radeonsi: reject some texture formats but only on GFX8/CARRIZO
...
Not sure why this check was missing.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29288 >
2024-05-21 06:34:06 +00:00
Samuel Pitoiset
95122a1cf7
ac,radv,radeonsi: introduce a helper to build a FMASK descriptor
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29259 >
2024-05-21 06:10:32 +00:00
Juston Li
e1b4b399ce
zink: disable cpu_storage for PIPE_USAGE_STREAM
...
See 8af8dc97bc ("tc: do a GPU->CPU copy to initialize cpu_storage")
On zink, initializing cpu_storage that requires a GPU->CPU copy is
particularly expensive; in addition to a sync, the buffer_map call to
copy the GPU data submits a batch and has to wait for that batch.
Take the PIPE_USAGE_STREAM hint and disable using cpu_storage on
resources that "will be modified once and used at most a few times"
where the benefit of cpu_storage is outweighed by the heavy init time.
Signed-off-by: Juston Li <justonli@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29294 >
2024-05-20 22:59:42 +00:00
Rob Clark
01bac643f6
freedreno/ir3: Fix ldg/stg offset
...
Basically a revert (but not a clean one) of commit 60686d4146
("ir3/a6xx: fix ldg/stg of ulong2 and ulong4 data"). The offset
is a byte offset, not a dword offset.
Backport note: Prior to commit 513fa1873c ("ir3/a7xx: Fix
load_global_ir3 with immediate offset") you could instead just revert
the original commit.
Fixes: 60686d4146 ir3/a6xx: ("fix ldg/stg of ulong2 and ulong4 data")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11169
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29228 >
2024-05-20 21:24:53 +00:00
Mike Blumenkrantz
23488790c1
zink: remove dgc debug mode
...
there is alternative testing available now
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29289 >
2024-05-20 19:47:39 +00:00
Mike Blumenkrantz
e093107115
lavapipe: lvp_indirect_command_layout -> lvp_indirect_command_layout_nv
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29293 >
2024-05-20 19:27:33 +00:00
Mike Blumenkrantz
aaa3f37ae5
lavapipe: plumb print_cmds through NV DGC
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29293 >
2024-05-20 19:27:33 +00:00
Mike Blumenkrantz
42e3d580cc
lavapipe: split out DGC into separate file
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29293 >
2024-05-20 19:27:33 +00:00
Mike Lothian
3be436830e
ac/llvm: Remove global access ops handling
...
They have been lowered in nir
v2: Keep the _amd versions
v3: Fix if's with removed ops
Signed-off-by: Mike Lothian <mike@fireburn.co.uk >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29280 >
2024-05-20 18:41:20 +00:00
Mike Lothian
d2e80e57a3
radeonsi,aco: Run ac_nir_lower_global_access pass
...
This allows rusticl to run under radeonsi when using ACO
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11179
Signed-off-by: Mike Lothian <mike@fireburn.co.uk >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29280 >
2024-05-20 18:41:20 +00:00
Dylan Baker
46644ba371
meson: use glslang --depfile argument when possible
...
This reduces the amount of manual dependency tracking developers need to
do. This is turned on if glslang >= 11.3.0 is used, or 11.9.0 on
Windows, but otherwise the status quo is maintained. This means I have
not removed any use of `depend_files`. We could make make these hard
requirements and remove the use of `depend_files` too.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28329 >
2024-05-20 17:34:17 +00:00
Samuel Pitoiset
32e43fe77c
ac,radv,radeonsi: add helper to know if a format is supported by DB
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29291 >
2024-05-20 16:55:37 +00:00
Samuel Pitoiset
d2234adf59
ac,radv,radeonsi: add helper to know if a format is supported by CB
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29291 >
2024-05-20 16:55:37 +00:00
Samuel Pitoiset
c62f86587f
amd/common: move some format related helpers to ac_formats.c
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29291 >
2024-05-20 16:55:37 +00:00
Samuel Pitoiset
473559001f
radv: add radv_is_colorbuffer_format_blendable()
...
This will allow us to add a common helper to know if a format is
supported by CB.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29291 >
2024-05-20 16:55:37 +00:00
Samuel Pitoiset
8f39e3a0f3
radv: stop checking the return value of ac_get_cb_number_type()
...
It can't be ~0U.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29291 >
2024-05-20 16:55:37 +00:00
Samuel Pitoiset
e227f2cc72
radv: remove redundant check for VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 on GFX6-10
...
ac_get_cb_format() already returns V_028C70_COLOR_INVALID.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29291 >
2024-05-20 16:55:37 +00:00
Sil Vilerino
58ca4cee9e
d3d12: Video Encode - Fix inputs for older OS support query cap
...
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29290 >
2024-05-20 14:45:56 +00:00
Sil Vilerino
d8eb9fc9b4
nir: Mark variable as ASSERTED to fix unused variable warning treated as error
...
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29290 >
2024-05-20 14:45:56 +00:00
Samuel Pitoiset
07080c5fc5
radv: simplify creating gfx10 texture descriptors for sliced 3d/2d view of 3d
...
This will be easier to add a common helper between RADV and RadeonSI
for creating texture descriptors.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29269 >
2024-05-20 14:15:40 +00:00
Samuel Pitoiset
16952a179b
radv: allow 3d views with VK_IMAGE_CREATE_2D_VIEW_COMPATIBLE_BIT_EXT
...
VK_IMAGE_CREATE_2D_VIEW_COMPATIBLE_BIT_EXT allows to create 2d views
of a 3d image but nothing in the spec disallows to also create 3d views
when this flag is set.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29269 >
2024-05-20 14:15:40 +00:00
Samuel Pitoiset
96a9625866
ac,radv,radeonsi: add a function to get the color format endian swap
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29265 >
2024-05-20 13:41:03 +00:00
Samuel Pitoiset
35c6b9c066
ac,radv,radeonsi: add a function to translate db format
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29265 >
2024-05-20 13:41:03 +00:00
Samuel Pitoiset
934fc47822
radv: use PIPE_FORMAT in radv_translate_dbformat()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29265 >
2024-05-20 13:41:03 +00:00
Samuel Pitoiset
7f0430bb36
ac,radv,radeonsi: add a function to translate colorswap
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29265 >
2024-05-20 13:41:02 +00:00
Samuel Pitoiset
40428bd497
radv: use PIPE_FORMAT in radv_translate_colorswap()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29265 >
2024-05-20 13:41:02 +00:00
Samuel Pitoiset
255e76b419
ac,radv,radeonsi: add a function to translate tex numformat
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29265 >
2024-05-20 13:41:02 +00:00
Samuel Pitoiset
6030c876d0
radv: use PIPE_FORMAT in radv_translate_tex_numformat()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29265 >
2024-05-20 13:41:02 +00:00
Samuel Pitoiset
2fef95f901
radv: stop checking the output value of radv_translate_tex_numformat
...
This function just never returns ~0.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29265 >
2024-05-20 13:41:02 +00:00
Rhys Perry
418fed1805
aco: update VS prolog waitcnt for GFX12
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29225 >
2024-05-20 10:45:39 +00:00
Rhys Perry
f01cac835f
aco/stats: support GFX12 in collect_preasm_stats()
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29225 >
2024-05-20 10:45:39 +00:00
Rhys Perry
9e9cabd2fa
aco/waitcnt: support GFX12 in waitcnt pass
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29225 >
2024-05-20 10:45:39 +00:00
Rhys Perry
cadce0f3b7
aco: add GFX12 wait counters
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29225 >
2024-05-20 10:45:38 +00:00
Erico Nunes
c5e13af73c
ci: lima farm maintenance
...
Signed-off-by: Erico Nunes <nunes.erico@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29285 >
2024-05-20 12:15:15 +02:00
Lionel Landwerlin
a31996ce5a
anv: switch to vk_device::mem_cache field for default cache
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11175
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29258 >
2024-05-20 08:23:48 +00:00
Alejandro Piñeiro
b2282e3a57
v3dv/meta_clear: use v3dv_renderpass used as parameter
...
emit_subpass_color_clear_rects and emit_subpass_ds_clear_rects is
receiving a v3dv_render_pass parameter pass, but then using
cmd_buffer->state.pass to access the current pass. All calls to those
methods are already initializing that parameter to that value.
This commit just uses the parameter. An alternative would be to remove
one of the parameters of the function call. I find this option
slightly more readable.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29218 >
2024-05-20 10:01:33 +02:00
Alejandro Piñeiro
07f3c37b9a
v3dv/meta_clear: take into account multiview for the custom clear pipeline caches
...
The resulting pipeline/shaders are different when we are using
multiview (for example, a geometry shader is injected in order to
support multiview).
Doesn't fix any CTS test run individually, but fixes some
dEQP-VK.draw.dynamic_rendering.primary_cmd_buff.multi_draw.overlapping*
CTS tests when run in a batch (using deqp-vk --deqp-caselist-file),
like:
dEQP-VK.draw.dynamic_rendering.primary_cmd_buff.multi_draw.mosaic.indexed_mixed.16_draws.stride_zero.10_instances.vert_only.single_view.offset_6_no_draw_id
dEQP-VK.draw.dynamic_rendering.primary_cmd_buff.multi_draw.overlapping.normal.one_draw.stride_zero.1_instance.vert_only.multiview.no_offset_no_draw_id
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29218 >
2024-05-20 10:01:33 +02:00
Alejandro Piñeiro
4f26303dbb
v3dv: add debug option to disable custom pipeline caches for meta operations
...
Included as a new option of the existing V3DV_ENABLE_PIPELINE_CACHE
environment variable.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29218 >
2024-05-20 10:01:33 +02:00
Timothy Arceri
795057d44e
glsl: move geom input array sizing to nir linker
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29256 >
2024-05-20 00:12:50 +00:00
David Heidelberg
08659a0baa
winsys/i915: depends on intel_wa.h
...
Prevent compilation failure due to not-yet generated intel_wa header.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11174
Cc: mesa-stable
Reviewed-by: Mark Janes <markjanes@swizzler.org >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29252 >
2024-05-18 15:36:13 +00:00
Mike Blumenkrantz
ffe54ca293
nir/linking: fix nir_assign_io_var_locations for scalarized dual blend
...
this would previously assign all scalar variables to the highest
driver location
cc: mesa-stable
Acked-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28753 >
2024-05-18 13:50:27 +00:00
Mike Blumenkrantz
e28061c502
nir/lower_aaline: fix for scalarized outputs
...
this otherwise was broken
cc: mesa-stable
Acked-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28753 >
2024-05-18 13:50:27 +00:00
Marek Olšák
b4bd380704
nir/algebraic: eliminate pack+unpack and unpack+pack pairs
...
A new NIR shader for AMD drivers will need this.
Reviewed-by: Gert Wollny <gert.wollny@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29233 >
2024-05-17 22:04:00 +00:00
Faith Ekstrand
681acde6d3
nvk/meta: Save and restore set_dynamic_buffer_start
...
Fixes: e0d907f56f ("nvk: Rework descriptor set binding")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29276 >
2024-05-17 21:41:18 +00:00
Faith Ekstrand
3e9b08f417
nvk: Refactor nvk_meta_begin() to use a desc helper
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29276 >
2024-05-17 21:41:17 +00:00
Faith Ekstrand
6f0292f6b0
nvk: Add an NVK_MAX_SAMPLES #define
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29276 >
2024-05-17 21:41:17 +00:00
Faith Ekstrand
ce0efbd175
nvk: Move and better document set_dynamic_buffer_start
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29276 >
2024-05-17 21:41:17 +00:00
Faith Ekstrand
99f806b733
nvk: Advertise 32 descriptor sets
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29276 >
2024-05-17 21:41:17 +00:00
Faith Ekstrand
54ce220f10
nvk: Store an nvk_buffer_address for each set in the root table.
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29276 >
2024-05-17 21:41:17 +00:00
Faith Ekstrand
0e417df499
nvk: Add static asserts for nvk_buffer_address layout
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29276 >
2024-05-17 21:41:17 +00:00
Faith Ekstrand
6fcfcd2625
nvk: Store descriptor set addresses in descriptor state
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29276 >
2024-05-17 21:41:17 +00:00
David Heidelberg
f55c51a343
ci/etnaviv: add flakes from nightly runs
...
Acked-by: Christian Gmeiner <cgmeiner@igalia.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29254 >
2024-05-17 19:29:40 +00:00
David Heidelberg
788d945c9a
ci/alpine: re-enable Mold linker
...
It's more than one year since it was problematic.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29272 >
2024-05-17 11:11:59 -07:00
Roman Stratiienko
7ae4a2ae34
u_gralloc/fallback: Extract modifier from QCOM native_handle
...
After Turnip moved to u_gralloc, some users started complaining
about issues. It turns out that modern platforms do not have
grallocs{0,1} but have gralloc4 only. There's no
known way to build mesa3d with gralloc4 support using NDK.
So we add this workaround to fallback gralloc to mimic the original
behavior of the Turnip driver before switching to u_gralloc.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11171
Fixes: 1373b0966c ("turnip: ANB/AHB support")
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Reviewed-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29260 >
2024-05-17 15:03:53 +00:00
Adrian Perez de Castro
2934e1fad5
Revert "egl/wayland: Remove EGL_WL_create_wayland_buffer_from_image"
...
The EGL_WL_create_wayland_buffer_from_image is still used in WPE WebKit.
There is work in progress to continue adoption of DMA-BUF usage inside
WebKit which will eventually render the extension unneeded; but in the
meantime an update to a version of Mesa without the extension would
render applications using WPE WebKit unusable.
This reverts commit a3418105b9 .
Signed-off-by: Adrian Perez de Castro <aperez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29266 >
2024-05-17 14:15:47 +00:00
Samuel Pitoiset
7fe169dd4a
ac,radv,radeonsi: introduce a helper to build a sampler descriptor
...
This introduces ac_sampler_state which contains all information to
build a sampler descriptor for AMD hardware instead of duplicating
code between RADV and RadeonSI. Both drivers just need to fill this
new struct to get a descriptor.
This allows RADV to get GFX12 support for free. I think we should
introduce helpers for other type of descriptors.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29221 >
2024-05-17 13:43:12 +00:00
Samuel Pitoiset
cd05b23a95
radeonsi: refactor si_translate_border_color()
...
For using the common ac helper for building a sampler descriptor.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29221 >
2024-05-17 13:43:12 +00:00
Mike Blumenkrantz
c6b29a4788
egl/dri2: fix error returns on dri2_initialize_x11_dri3 fail
...
this is a failure path, so return failure
Fixes: 62f65f4bfd ("egl/dri2: if zink is preferred from dri3 skip dri2 paths.")
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29171 >
2024-05-17 12:28:52 +00:00
Samuel Pitoiset
caca5e0de6
radv: add more helpers to emit viewports
...
Viewports are emitted differently on GFX12 and adding helpers would
help.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29215 >
2024-05-17 08:04:02 +00:00
Samuel Pitoiset
73e1ff6b54
radv: use float instead of double for viewport zscale/ztranslate
...
The float precision should be largely enough.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29215 >
2024-05-17 08:04:02 +00:00
Samuel Pitoiset
50ef8600bc
radv: pass radv_physical_device to radv_emit_default_sample_locations()
...
To emit PA_SC_CENTROID_0 which changed on GFX12.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29215 >
2024-05-17 08:04:02 +00:00
Samuel Pitoiset
9e7c44ea11
radv: simplify radv_emit_default_sample_locations()
...
PA_SC_CENTROID_PRIORITY has been moved on GFX12 and it will be easier
to emit it outside of the switch case.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29215 >
2024-05-17 08:04:02 +00:00
Samuel Pitoiset
0697452f57
ac,radv,radeonsi: add a helper to translate buffer dataformat
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29236 >
2024-05-17 07:30:16 +00:00
Samuel Pitoiset
5d9bdb6410
ac,radv,radeonsi: add a helper to translate buffer numformat
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29236 >
2024-05-17 07:30:16 +00:00
Samuel Pitoiset
3409015103
radv: reject unsupported buffer formats earlier
...
To simplify adding common helpers for translating buffer formats.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29236 >
2024-05-17 07:30:16 +00:00
Samuel Pitoiset
622e1b6385
radv: only enable VK_MESA_image_alignment_control on GFX9-11.5
...
This is not yet implemented on GFX6-8 and GFX12, better to disable it.
Fixes: 6c3457033a ("radv: Implement VK_MESA_image_alignment_control")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29219 >
2024-05-17 06:56:07 +00:00
Samuel Pitoiset
f0200a54d9
radv: add a helper to configure ring buffer descriptors
...
Instead of duplicating everything which is annoying for bringup when
some fields are updated.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29234 >
2024-05-17 06:21:35 +00:00
Juston Li
db58d0f40b
venus: forward nice priority when creating ring
...
Forward the nice priority to the renderer so that corresponding renderer
threads are created with the same priority.
For backwards compatibility, conditioned on
VK_MESA_VENUS_PROTOCOL_SPEC_VERSION >= 2
Signed-off-by: Juston Li <justonli@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29012 >
2024-05-17 00:03:44 +00:00
Juston Li
4d2d49c63f
sync protocol for VkRingPriorityInfoMESA
...
Bumps VK_MESA_VENUS_PROTOCOL_SPEC_VERSION to 2
Signed-off-by: Juston Li <justonli@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29012 >
2024-05-17 00:03:44 +00:00
David Heidelberg
9b02584bed
ci/panfrost: Revert "ci/panfrost: disable G52 until machines gets fixed"
...
Machines are reported as fixed.
This reverts commit 891730ac0b .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29207 >
2024-05-16 22:50:09 +00:00
David Heidelberg
782f2b3dea
ci/intel: add new jsl flake
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29207 >
2024-05-16 22:50:09 +00:00
David Heidelberg
49760b6af6
ci: Revert "ci: update failures list with angle for jsl, tgl"
...
MesaCI has new ANGLE, we can revert this one.
This reverts commit 197f99dc70 .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29207 >
2024-05-16 22:50:09 +00:00
David Heidelberg
ec8eeb39ae
ci: bump ANGLE
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29207 >
2024-05-16 22:50:09 +00:00
Alyssa Rosenzweig
9a8cb81f61
nir/tex_instr_result_size: handle subpass_ms
...
I hit this and don't see any reason it shouldn't work
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29249 >
2024-05-16 18:09:39 -04:00
Danylo Piliaiev
72326e15f3
anv: Use current_frame from vk device to delimit u_trace frames
...
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29220 >
2024-05-16 18:12:31 +00:00
Danylo Piliaiev
c73b3f590b
tu: Use current_frame from vk device to delimit u_trace frames
...
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29220 >
2024-05-16 18:12:30 +00:00
Danylo Piliaiev
4510350d55
util/u_trace: Pass explicit frame_nr argument to delimit frames
...
Otherwise u_trace has to think that each submission is a frame,
and that's not great if we want to gather statistics on per real
frame basis.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29220 >
2024-05-16 18:12:30 +00:00
Danylo Piliaiev
eed28932c0
vulkan/wsi: Make current_frame usable in all cases
...
It would be useful for u_trace to separate frames.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29220 >
2024-05-16 18:12:30 +00:00
Alyssa Rosenzweig
e5637f44b8
asahi: unify naming for COUNTS structs
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29247 >
2024-05-16 13:25:56 -04:00
Alyssa Rosenzweig
a173c2e38c
asahi: split CDM Launch words
...
similarly separates counts from USC words.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29247 >
2024-05-16 13:25:56 -04:00
Alyssa Rosenzweig
5fbd8bb694
asahi: split frag shader words
...
Isolate the counts from the rest, in particular.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29247 >
2024-05-16 13:25:56 -04:00
Alyssa Rosenzweig
7dcd5f1f02
asahi: don't allocate for USC words
...
let the driver.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29247 >
2024-05-16 13:25:56 -04:00
Alyssa Rosenzweig
06d59d3f5c
asahi: rename meta -> bg/eot
...
meta is for making meta gallium calls, we already have something else
appropriately named meta. bg/eot programs are not meta, they're their own
hardware mechanism. use the appropiate powervr name instead.
nfc
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29247 >
2024-05-16 13:25:56 -04:00
Alyssa Rosenzweig
cd3dabe8e0
asahi: clean up bg/eot counts
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29247 >
2024-05-16 13:25:56 -04:00
Alyssa Rosenzweig
ed2d15d42f
asahi: track imports for decode
...
otherwise we fail with interesting dmabuf tracing
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29247 >
2024-05-16 13:25:56 -04:00
Alyssa Rosenzweig
ff553d1ac8
asahi/decode: QoL improvements
...
- plumb through a context so we can handle multiple VMs in a single process
- add image heap dumping helper for bindless images
- try to guess betwen texture & PBE to reduce noise
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29247 >
2024-05-16 13:25:56 -04:00
Karol Herbst
564e569072
nir/lower_cl_images: set binding also for samplers
...
Fixes https://github.com/darktable-org/darktable/issues/16717 on radeonsi.
Fixes: 31ed24cec7 ("nir/lower_images: extract from clover")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29230 >
2024-05-16 16:39:42 +00:00
Danylo Piliaiev
97c99aa9b3
tu: Add more info to renderpass tracepoint
...
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29222 >
2024-05-16 15:57:10 +00:00
Danylo Piliaiev
57a3f0f949
util/u_trace: Allow mixing of ArgStruct and Arg
...
Would allow to define such arguments:
args=[ArgStruct(type='const struct tu_framebuffer *', var='fb'),
ArgStruct(type='const struct tu_tiling_config *', var='tiling'),
Arg(type='uint8_t', var='maxSamples', c_format='%u'),
Arg(type='uint8_t', var='clearCPP', c_format='%u'),
Arg(type='uint8_t', var='loadCPP', c_format='%u'),
Arg(type='uint8_t', var='storeCPP', c_format='%u'),],
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Reviewed-by: Karmjit Mahil <karmjit.mahil@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29222 >
2024-05-16 15:57:10 +00:00
David Rosca
5f4a6b5b00
radeonsi/vcn: Ensure at least one reference for H264 P/B frames
...
The original fix from
0f3370eede ("raseonsi/vcn: fix a h264 decoding issue")
would in some cases also trigger for I frames with interlaced streams.
Instead of checking used_for_reference_flags, use slice type and
only add one reference for P/B frames if needed.
This change still fixes playback of the sample from the original issue,
avoids the issue with interlaced streams and also fixes the case where
application provides no references at all.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11060
Cc: mesa-stable
Reviewed-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29055 >
2024-05-16 15:05:09 +00:00
David Rosca
2ef3a34f1a
radeonsi/vcn: Allow duplicate buffers in DPB
...
In case of missing frames (eg. when decoding corrupted streams), there
will be duplicate buffers and all of them needs to be in DPB to keep
the layout correct for decoding.
Cc: mesa-stable
Reviewed-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29055 >
2024-05-16 15:05:09 +00:00
David Rosca
47b6ca47d0
radeonsi/vcn: Ensure DPB has as many buffers as references
...
In case of corrupted streams (or application bugs) the number
of references may not be equal to DPB size. This needs to be fixed by
filling the missing slots with dummy buffers.
Cc: mesa-stable
Reviewed-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29055 >
2024-05-16 15:05:08 +00:00
David Rosca
9837dab4bd
frontends/va: Store slice types for H264 decode
...
Cc: mesa-stable
Reviewed-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29055 >
2024-05-16 15:05:08 +00:00
Patrick Lerda
f8a1d9f787
r600: fix vertex state update clover regression
...
This change handles the case when "vertex_fetch_shader.cso" is null,
it implements the previous behavior in this specific case. This
situation is happening with clover.
For instance, this issue is triggered with "piglit/bin/cl-custom-buffer-flags":
==6467==ERROR: AddressSanitizer: SEGV on unknown address 0x00000000000c (pc 0x7ff92908fe6e bp 0x7ffe86ae5ad0 sp 0x7ffe86ae5a30 T0)
==6467==The signal is caused by a READ memory access.
==6467==Hint: address points to the zero page.
#0 0x7ff92908fe6e in evergreen_emit_vertex_buffers ../src/gallium/drivers/r600/evergreen_state.c:2123
#1 0x7ff92908444b in r600_emit_atom ../src/gallium/drivers/r600/r600_pipe.h:627
#2 0x7ff92908444b in compute_emit_cs ../src/gallium/drivers/r600/evergreen_compute.c:798
#3 0x7ff92908444b in evergreen_launch_grid ../src/gallium/drivers/r600/evergreen_compute.c:927
#4 0x7ff9349f9350 in clover::kernel::launch(clover::command_queue&, std::vector<unsigned long, std::allocator<unsigned long> > const&, std::vector<unsigned long, std::allocator<unsigned long> > const&, std::vector<unsigned long, std::allocator<unsigned long> > const&) ../src/gallium/frontends/clover/core/kernel.cpp:105
#5 0x7ff9349c331d in std::function<void (clover::event&)>::operator()(clover::event&) const /usr/include/c++/11.4.0/bits/std_function.h:590
#6 0x7ff9349c331d in clover::event::trigger() ../src/gallium/frontends/clover/core/event.cpp:54
#7 0x7ff9349c82f1 in clover::hard_event::hard_event(clover::command_queue&, unsigned int, clover::ref_vector<clover::event> const&, std::function<void (clover::event&)>) ../src/gallium/frontends/clover/core/event.cpp:138
#8 0x7ff9348daa47 in create<clover::hard_event, clover::command_queue&, int, clover::ref_vector<clover::event>&, clEnqueueNDRangeKernel(cl_command_queue, cl_kernel, cl_uint, const size_t*, const size_t*, const size_t*, cl_uint, _cl_event* const*, _cl_event**)::<lambda(clover::event&)> > ../src/gallium/frontends/clover/util/pointer.hpp:241
#9 0x7ff9348daa47 in clEnqueueNDRangeKernel ../src/gallium/frontends/clover/api/kernel.cpp:334
Fixes: 659b7eb2 ("r600: better tracking for vertex buffer emission")
Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10079
Signed-off-by: Patrick Lerda <patrick9876@free.fr >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29163 >
2024-05-16 14:41:25 +00:00
Gert Wollny
f398f6ab08
r600/sfn: Set bit size for newly created store intrinsic
...
Fixes: 1632948a76
nir: validate src_type of store_output intrinsics, require bit_size >= 16
Signed-off-by: Gert Wollny <gert.wollny@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29227 >
2024-05-16 14:21:19 +00:00
Mike Blumenkrantz
e1b40373ce
zink: ci updates
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28884 >
2024-05-16 12:33:44 +00:00
Mike Blumenkrantz
ee2fb2f2f3
zink: split slot map between regular varyings and patch
...
these otherwise were using the same mapping
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28884 >
2024-05-16 12:33:44 +00:00
Mike Blumenkrantz
66eb26c00f
zink: move 'reserved' into io assign struct
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28884 >
2024-05-16 12:33:44 +00:00
Mike Blumenkrantz
9ca0c8cbae
zink: unify io assignment
...
this was the same in two places but with extra pre-checks in one
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28884 >
2024-05-16 12:33:43 +00:00
Mike Blumenkrantz
c6af91a968
zink: track masks of io locations used during linking
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28884 >
2024-05-16 12:33:43 +00:00
Mike Blumenkrantz
8f2e56350a
zink: pass a struct through io assignment functions
...
this is more easily extensible
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28884 >
2024-05-16 12:33:43 +00:00
Mike Blumenkrantz
42f2719a88
zink: outdent assign_consumer_var_io()
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28884 >
2024-05-16 12:33:43 +00:00
Mike Blumenkrantz
737de5573f
zink: outdent assign_producer_var_io()
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28884 >
2024-05-16 12:33:43 +00:00
Mike Blumenkrantz
613c7c1586
zink: minor tweaks to shader io assignment
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28884 >
2024-05-16 12:33:43 +00:00
Mike Blumenkrantz
18f9f17be5
zink: make unassigned io variables unreachable
...
this should no longer be possible to hit
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28884 >
2024-05-16 12:33:43 +00:00
Eric Engestrom
390ac5ba14
mailmap: add entry to unify Roman Stratiienko's contributions
...
$ git shortlog -sne --author 'Roman Stratiienko'
65 Roman Stratiienko <r.stratiienko@gmail.com >
7 Roman Stratiienko <roman.stratiienko@globallogic.com >
4 Roman Stratiienko <roman.o.stratiienko@globallogic.com >
3 Roman Stratiienko <roman.stratiienko@nure.ua >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29237 >
2024-05-16 12:05:27 +00:00
Collabora's Gfx CI Team
75931d6e68
Uprev Piglit to 8a6ce9c6fc5c8039665655bca4904d5601c6dba0
...
7aa7bc1b01...8a6ce9c6fc
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29050 >
2024-05-16 10:15:17 +00:00
Pierre-Eric Pelloux-Prayer
0f25cef8aa
radeonsi: add testmemperf mem bandwidth test
...
This commit adds a simple test to measure bandwidth to/from memory
domains.
It's using the winsys functions, not the driver ones, to be able
to control the domains and flags.
Acked-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29073 >
2024-05-16 09:51:19 +00:00
Pierre-Eric Pelloux-Prayer
cd9f6f9e85
radeonsi: allocate sqtt and spm buffers in GTT
...
This makes reading from it much, much faster.
It would be better to allocate them in VRAM, and do a copy
before reading them, but for now using GTT will do the trick.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29073 >
2024-05-16 09:51:19 +00:00
Pierre-Eric Pelloux-Prayer
afd2cbeb28
radeonsi/sqtt: use si_shader_binary_upload_at to reupload shaders
...
This allows to support ACO + sqtt.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29073 >
2024-05-16 09:51:19 +00:00
Pierre-Eric Pelloux-Prayer
38c6400167
radeonsi: add new si_shader_binary_upload_at method
...
Same as si_shader_binary_upload, but it uploads to the existing
shader->bo buffer at the specified offset.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29073 >
2024-05-16 09:51:18 +00:00
Pierre-Eric Pelloux-Prayer
5794a86f19
radeonsi/sqtt: support sqtt buffer auto-resizing
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29073 >
2024-05-16 09:51:18 +00:00
Pierre-Eric Pelloux-Prayer
316fff7d41
radeonsi/sqtt: cleanup si_sqtt_add_code_object a bit
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29073 >
2024-05-16 09:51:18 +00:00
Pierre-Eric Pelloux-Prayer
e32dddf7ab
radeonsi/sqtt: use ac_sqtt_get_shader_mask for spm counters
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29073 >
2024-05-16 09:51:18 +00:00
Konstantin Seurer
99a6511775
gitlab: Reference hang debugging documenttion
...
It should help the user with setting up UMR, which adds a lot of useful
information to the hang report.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29213 >
2024-05-16 09:47:53 +00:00
Yusuf Khan
586bca76dd
nvk: remove NVK_MME_COPY_QUERIES
...
Its not being used by anything, and it gets sent to the GPU, remove
it.
Signed-off-by: Yusuf Khan <yusisamerican@gmail.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29030 >
2024-05-16 08:14:30 +00:00
Mary Guillemard
12fa8d749a
nak: Migrate sph.rs to use SPH headers defintion
...
We still rely on bitfields for attributes as it map nicely.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29034 >
2024-05-16 07:56:30 +00:00
Mary Guillemard
8fda488aec
nak: Set SPH version to 4 on SM75+
...
The hardware doesn't check it but we should avoid possible mismatch.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29034 >
2024-05-16 07:56:30 +00:00
Mary Guillemard
170b09790a
nouveau: nvidia_header: Add AMPERE_B class generation
...
We only have SPHv4 definition for Ampere, add parsing of it.
Also make vk_push_print supports it.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29034 >
2024-05-16 07:56:30 +00:00
Arthur Huillet
784407f932
nvk: generate Rust bindings from SPH header files
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29034 >
2024-05-16 07:56:30 +00:00
Arthur Huillet
f7d4e4ba2b
nvk: import SPH headers files from open-gpu-doc
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29034 >
2024-05-16 07:56:30 +00:00
Chia-I Wu
a83c15654c
drm-shim: intercept access as well
...
Since libdrm commit 3bc3cca2 ("xf86drm: use drm device name to identify
drm node type"), drmGetMinorType uses access to get the node type and
causes amdgpu_device_initialize to fail with
DRM_SHIM: unhandled core DRM ioctl 0x5 (0xc0286405)
_amdgpu_device_initialize: amdgpu_get_auth (1) failed (-22)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29096 >
2024-05-16 07:18:14 +00:00
Karol Herbst
53629b0a2d
rusticl: make use of new output_inline_wrapper meson.rust.bindgen feature
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25265 >
2024-05-16 06:40:59 +00:00
Karol Herbst
3e3eab12d8
rusticl: bump meson req to 1.4
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25265 >
2024-05-16 06:40:59 +00:00
Karol Herbst
86a11248a5
rusticl: bump bindgen req to 0.65
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25265 >
2024-05-16 06:40:59 +00:00
Karol Herbst
c46cd101e1
rusticl: move mesa_version_string out of the inline wrapper
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25265 >
2024-05-16 06:40:59 +00:00
Karol Herbst
d2dfb3350f
rusticl: merge rusticl_nir and rusticl_mesa_bindings_inline_wrapper targets
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25265 >
2024-05-16 06:40:59 +00:00
Yiwei Zhang
2740d92e3d
vulkan: drop redundant core props query and copy helpers
...
The last client, venus, has stopped using those either.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Tested-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29180 >
2024-05-16 01:58:14 +00:00
Yiwei Zhang
374a14ce4c
venus: define VN_SET_VK_PROPS(_EXT) to simplify vk props init
...
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Tested-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Reviewed-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29180 >
2024-05-16 01:58:14 +00:00
Oskar Viljasaar
3c152a6e5d
venus: Use common physical device properties
...
This lets us delegate the GPDP2 entrypoint to common code.
This also lets us delete struct vn_physical_device_properties,
as it is redundant with struct vk_properties present in the runtime.
Move the properties present in vn_physical_device_properties to the
local_devices struct used to query the host device properties, so we can
still get and fill those properties.
Replace accesses to struct vn_physical_device with accesses to
struct vk_properties filled in at device initialization time.
v2: rebase and a few fixups (zzyiwei)
- rely solely on vk props for final props sanitizations
- set vk11 props behind vk 1.2 condition
- set default pci props if forwarded
- set extension props based on extension support
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Tested-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Reviewed-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29180 >
2024-05-16 01:58:14 +00:00
Oskar Viljasaar
f04bc27fe1
vulkan: add a property struct setter function
...
This takes in a (VkBaseInStructure *), checks for its type, casts it
into the right property struct and then copies its fields over the right
way to `struct vk_properties`.
v2: a few fixups (zzyiwei)
- add missing brackets required by clang
- fix some indents
- optimize to aovid deep-copying VkPhysicalDeviceProperties
- update to use DETECT_OS_ANDROID as suggested
- cast to avoid -Wswitch for Android struct beyond VkStructureType
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Tested-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29180 >
2024-05-16 01:58:14 +00:00
Yiwei Zhang
eb9a394e3c
venus: move props sanitization to a separate helper
...
So the main init properties function is clean. Also avoid giving any
sort of sane value for framebufferIntegerColorSampleCounts when we don't
query from 12 props directly, since the client side won't query that in
that case.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Tested-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Reviewed-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29180 >
2024-05-16 01:58:14 +00:00
Yiwei Zhang
dceb1b0c4d
venus: move custom props fill from GPDP2 to props init
...
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Tested-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Reviewed-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29180 >
2024-05-16 01:58:14 +00:00
Yiwei Zhang
0197924d63
venus: directly use vk drm and pci props in renderer info
...
We don't have to fill sType or pNext, and the default renderer info has
been zero-init already.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Tested-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Reviewed-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29180 >
2024-05-16 01:58:14 +00:00
Yiwei Zhang
b1e2293f8c
vulkan: cast to avoid -Wswitch for Android struct beyond VkStructureType
...
Fixes: 1afbf0ba4a ("vulkan/properties: support Android in the property generator")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Tested-by: Oskar Viljasaar <oskar.viljasaar@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29180 >
2024-05-16 01:58:14 +00:00
David Rosca
c522848d5a
radeonsi: Update buffer for other planes in si_alloc_resource
...
The buffer is shared with all planes, so it needs to be updated
in all other planes. This is already done in si_texture_create_object
when creating the buffer, but it was missing when reallocating
in si_texture_invalidate_storage.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11155
Cc: mesa-stable
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29216 >
2024-05-16 01:34:15 +00:00
Faith Ekstrand
ec90da3c76
nvk: Go wide for query copies
...
There's no reason why we're doing a single invocation and a loop in the
shader. We may as well let it parallelize on the off chance that
there's more than a few queries to copy.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29231 >
2024-05-16 00:49:08 +00:00
Faith Ekstrand
ce0da9ee97
nvk: Fix misc. whitespace and style issues
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29231 >
2024-05-16 00:49:08 +00:00
Roman Stratiienko
b0bba26f04
v3dv/android: Migrate ANB and AHB to use common helpers
...
Change-Id: I28bfeaa93b2eacb353ea46e5e91cf2a2ae774067
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29059 >
2024-05-16 00:27:24 +00:00
Eric Engestrom
3facbc0cd3
docs: update calendar for 24.1.0-rc4
...
And add -rc5/final for next week.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29229 >
2024-05-15 23:15:50 +00:00
Francisco Jerez
eebc4ec264
intel/brw/xe2+: Round up spill/unspill data size to nearest reg_size multiple.
...
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:52 +00:00
Francisco Jerez
50daf161f4
intel/brw/xe2+: Lower 64-bit integer uadd_sat.
...
Fixes failures of CTS tests that currently end up emitting 64-bit
integer ADDs with saturation, which isn't supported by the hardware.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:52 +00:00
Francisco Jerez
15a10786e3
nir: Add option to lower 64-bit uadd_sat.
...
C.f. 16be909936 . Intel Xe2 won't
support saturation for 64-bit integer addition, regardless of
signedness.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Francisco Jerez
4bb5b25e53
intel/xe2+: Enable native 64-bit integer arithmetic.
...
Note that some previously-supported 64-bit integer operations have
been removed from the hardware, so we need to instruct NIR to lower
them.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Francisco Jerez
8be9f00d84
intel/brw/xe2+: Lower 64-bit SHUFFLE and CLUSTER_BROADCAST.
...
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Francisco Jerez
6261f4d361
intel/brw/xe2+: Fix 64-bit subgroup scan intrinsics not to rely on SEL instructions.
...
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Francisco Jerez
1bf93ee4ec
intel/brw/xe2+: Don't use SEL peephole on 64-bit moves.
...
64-bit SEL isn't supported by the INT pipeline on this platform.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Francisco Jerez
b18e68fc25
blorp: Allocate fixed amount of space for blend state.
...
According to the simulator a cacheline of the blend state cache
corresponds to 3 cachelines of L3 that are always filled regardless of
the number of render targets in use. Allocate enough space to avoid
pagefaults under simulation, since a scratch page isn't bound by
default.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Francisco Jerez
b73638ae5e
iris: Allocate fixed amount of space for blend state.
...
According to the simulator a cacheline of the blend state cache
corresponds to 3 cachelines of L3 that are always filled regardless of
the number of render targets in use. Allocate enough space to avoid
pagefaults under simulation, since a scratch page isn't bound by
default.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Francisco Jerez
8f798cc911
intel/brw/xe2+: Fix indirect extended descriptor setup for scratch space.
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Francisco Jerez
0d92ec44e5
intel/brw: Don't emit Z coordinate interpolation if CPS isn't in use.
...
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Rohan Garg
475fb68726
intel/brw: We no longer have atomic fmin/fmax ops for fp64 in xe2
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Rohan Garg
8d8d3666c6
intel/brw: Advertise fp64 atomic add's when we have 64 bit float support and a LSC
...
Rework:
* Lionel: Simplify to just checking ver >= 20.
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Francisco Jerez
7c129d9365
intel/brw/xe2+: Keep PS sample mask in the f1.0 register whether or not kill is used.
...
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Rohan Garg
7668de019b
intel/eu/xe2+: Fix src1 length bits of SEND instruction with UGM target.
...
Rework:
* Francisco Jerez: Specify the src1 length value in the correct
units. Don't break earlier platforms.
Signed-off-by: Francisco Jerez <currojerez@riseup.net >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283 >
2024-05-15 17:16:51 +00:00
Eric Engestrom
fb6638da80
README: update links to our own docs
...
These currently only work because we have a redirection set up; let's
link to the right place instead.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29224 >
2024-05-15 17:13:10 +00:00
Karol Herbst
f1662e9bc9
rusticl/mesa/context: flush context before destruction
...
Drivers might still be busy doing things and not properly clean things up.
Fixes a rare crash on applicatione exits with some drivers.
Fixes: 50e981a050 ("rusticl/mesa: add fencing support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29223 >
2024-05-15 16:52:03 +00:00
Rohan Garg
ec06911b3d
Revert "iris: slow clear higher miplevels on single sampled 8bpp resources that have TILE64"
...
Miptails are now disabled on Tile64 resources, so we can drop this
restriction.
Ref: e3a5ade9 ('intel/isl: Disable miptails to align LODs for CCS WA')
This reverts commit 8670fd6ac4 .
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28984 >
2024-05-15 15:16:29 +00:00
Eric Engestrom
9e66d89be9
zink/ci: rename .zink-lvp-venus-rules to .zink-venus-lvp-rules to match the rest of the names
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
3cbb3c0b66
ci/env: move dead-code-with-comment to the end of the list to make it clearer
...
and improve comment
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
1f17b2fa76
ci/b2c: remove dead rules: that's always overwritten
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
93c0a607bc
ci/vkd3d: fail job when failing to get driver version
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
3127b52ef7
ci/vkd3d: fix version sanity check
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
300afd3c86
ci/vkd3d: un-hardcode architecture
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
978f967105
ci/init-stage2: set VK_DRIVER_FILES for both xorg and wayland
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
e0089a1ffd
ci/piglit-traces: drop re-definition of VK_DRIVER_FILES
...
It's already set higher up in that same file.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
cc49894e34
ci: drop dead VK_CPU option
...
Unused since 1eca809680 ("ci/v3dv: test v3dv in arm64
environment"), and in the meantime other code paths have been added and
do not support this (`.gitlab-ci/common/init-stage2.sh` when starting
xorg & wayland for instance), so instead of fixing dead code, let's
remove it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
b4a94b0969
ci/b2c: allow setting timeouts in seconds
...
Allows for tighter timeouts.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
9a07db7cd8
ci/b2c: rename B2C_TIMEOUT_* to B2C_TIMEOUT_CONSOLE_ACTIVITY_*
...
More verbose, sure, but also much easier to understand.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
09021a1c01
ci/b2c: rename B2C_TIMEOUT_FIRST_* to B2C_TIMEOUT_FIRST_CONSOLE_ACTIVITY_*
...
More verbose, sure, but also much easier to understand.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:56 +00:00
Eric Engestrom
66ad09f569
ci: inherit the debian container building infra for test container images
...
Instead of inheriting from the build job in the test job; it makes no
sense to tie them like this.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:55 +00:00
Eric Engestrom
5157363772
ci: factor out all the deps to build the debian containers into .debian-container
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:55 +00:00
Eric Engestrom
ad9e78ba82
ci: rename debian version variable job to include the word "version"
...
The name was way too generic, and the next commit introduces an actual
`.debian-container` dot-job.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201 >
2024-05-15 14:34:55 +00:00
Iago Toral Quiroga
b545e78f12
v3dv: support 2712D0
...
2712D0 has V3D 7.1.10 which included draw index and
base vertex in the shader state record packet, shuffling
the locations of most of its fields. Handle this at run
time by emitting the appropriate packet based on the
V3D version since our current versioning framework doesn't
support changes based on revision number alone.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29189 >
2024-05-15 13:57:10 +00:00
Iago Toral Quiroga
1fc846dce3
v3d: support 2712D0
...
2710D0 has V3D 7.1.10 which included draw index and
base vertex in the shader state record packet, shuffling
the locations of most of its fields. Handle this at run
time by emitting the appropriate packet based on the
V3D version since our current versoning framework doesn't
support changes based on revision number alone.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29189 >
2024-05-15 13:57:10 +00:00
Iago Toral Quiroga
7b807c3e94
broadcom/cle: fix up shader record for V3D 7.1.10 / 2712D0
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29189 >
2024-05-15 13:57:10 +00:00
Lionel Landwerlin
0daf5e243f
anv: shader printf example
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:38 +00:00
Lionel Landwerlin
5b76696861
intel/clc: enable printfs support
...
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:38 +00:00
Lionel Landwerlin
64010716c8
anv: add debug shader printf support
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:38 +00:00
Lionel Landwerlin
9a36278475
intel/nir: add printf lowering
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:38 +00:00
Lionel Landwerlin
6a8ff3b550
intel/compiler: store u_printf_info in prog_data
...
So that the driver can decode the printf buffer.
We're not going to use the NIR data directly from the driver
(Iris/Anv) because the late compile steps might want to add more
printfs.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:38 +00:00
Lionel Landwerlin
ecbec25e84
intel/nir: add reloc delta to load_reloc_const_intel intrinsic
...
We'll use the delta for an upcoming internal printf mechanism, where
the PARAM_IDX will be the base printf reloc identifier and the BASE
will be the string id.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:38 +00:00
Lionel Landwerlin
dde91d18c2
intel/nir: remove unused prototypes
...
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:37 +00:00
Lionel Landwerlin
c16e58eabd
nir: add a low level printf emission helper
...
Uses the same memory layout as the print intrinsic lowering. This one
just let's you do the emission without having to deal with variables.
This useful for debug traces.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:37 +00:00
Lionel Landwerlin
c518a176f5
nir: add ptr_bit_size parameter to nir_lower_printf
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:37 +00:00
Lionel Landwerlin
2be28ee58a
nir: add a base offset for printf indexing
...
This will allow a driver to use a single table of printf strings
across all shaders.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:37 +00:00
Lionel Landwerlin
8d336f069e
nir/divergence: add missing load_printf_buffer_address
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:37 +00:00
Lionel Landwerlin
3716bd704f
anv: fix push constant subgroup_id location
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 7c76125db2 ("anv: use 2 different buffers for surfaces/samplers in descriptor sets")
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814 >
2024-05-15 13:13:37 +00:00
Danylo Piliaiev
cd7da3a807
freedreno/devices: Add support for Adreno A32 (G3x Gen 2)
...
It is based on Adreno 740, with difference in SP_UNKNOWN_AE09
and TPL1_DBG_ECO_CNTL1. We also enable cmdbuf_start_a725_quirk since
blob does the same.
Values taken from blob v744.19
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29087 >
2024-05-15 12:42:54 +00:00
Rohan Garg
aa9244c8f6
intel/brw: update Xe2 max SIMD message sizes
...
All the non-transpose messages are SIMD 1,2,4,8,16,32 capable (BSpec
57330)
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29212 >
2024-05-15 12:02:02 +00:00
Samuel Pitoiset
c8852719d0
radv: rename radeon perfctr uconfig helpers
...
To match other helpers.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192 >
2024-05-15 11:34:35 +00:00
Samuel Pitoiset
2957cedad7
radv: remove redundant radeon_set_perfctr_reg() helper
...
It's exactly the same as radeon_set_uconfig_reg_perfctr().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192 >
2024-05-15 11:34:35 +00:00
Samuel Pitoiset
6b023780ad
radv: introduce radeon_set_reg_seq()
...
This is the base helper for emitting packets, it will be much more
closer to the new command buffer recording mecanishm if we decide to
use the same helpers as RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192 >
2024-05-15 11:34:35 +00:00
Samuel Pitoiset
f0d4212847
radv: stop using radv_physical_device for radeon helpers
...
It will be easier to share helpers between RadeonSI and RADV.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192 >
2024-05-15 11:34:35 +00:00
Karol Herbst
1e78e4a344
rusticl/device: properly handle devices with no support for images
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29205 >
2024-05-15 11:00:23 +00:00
Karol Herbst
017ae1f02d
rusticl/device/caps: move enough for has_images
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29205 >
2024-05-15 11:00:23 +00:00
Karol Herbst
e02b4e0d44
rusticl/device: add DeviceCaps and move timestamp stuff into it
...
We do query caps quite a lot and this struct should be used to cache
results and to make it easier to express more complex dependencies between
features (e.g. images being supported or not).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29205 >
2024-05-15 11:00:23 +00:00
Paulo Zanoni
e3e5f8e6db
anv/sparse: assert a format can't be standard and non-standard
...
A format can't be standard and non-standard at the same time. If we
ever hit this assertion, it's because something behind the scenes has
evolved (such as the tiling formats) so something that was marked as
non-standard became standard. Add an assertion so we can quickly catch
these issues in the future and adjust the code.
I don't want to mix this assertion with the one in the line above
since that one is the most useful assertion we have in all the sparse
code, so it's good to know which one we're hitting.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:16 +00:00
Paulo Zanoni
4384c8782e
anv+zink/ci: add failures related to multi-sampled sparse binding
...
After enabling multi-sampled sparse binding in Anv, we get these
failures. I've investigated them and none are trivial, it's not clear
if they're Anv's fault or not, especially considering how many other
texture-related failures we already have in this fails.txt file.
Since both deqp-vk and Vulkan native apps seem to be working with pure
Anv (no Zink), I don't think it's worth blocking multi-sampled sparse
on Anv just because of Zink.
From what I have investigated, the problems seem related to the
following:
- glcts is expecting 1D images to have 2D block shapes (this is
definitely the case for StandardPageSizesTestCase, we get rid of
the failure by either removing sparse support for 1D images or
telling their block shapes are the same as the 2D images)
- glcts/zink may be trying to use formats that are unsupported by Anv
as if they were supported
- there's probably something funny going on with the GL_R8 format
v2: Adjust test results after merging merging MR 29118.
v3: Zink test results are a moving target...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com > (v1)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:16 +00:00
Paulo Zanoni
5294faee20
anv: check for VK_RENDERING_SUSPENDING_BIT once at CmdEndRendering
...
Most of what we do in this function is conditional to not have
VK_RENDERING_SUSPENDING_BIT, so check for it once.
Suggested-by: Iván Briano <ivan.briano@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:16 +00:00
Paulo Zanoni
7ef3d652b2
anv/sparse: enable MSAA for Sparse when applicable
...
The newer platforms can't support 8x and 16x since Tile64's shape for
them is not a standard block shape (and claiming standard block shapes
is higher priority than supporting things without it). The TileYs
platforms are fine.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:16 +00:00
Paulo Zanoni
4e5979b5a2
anv/sparse: flush the tile cache when resolving sparse images
...
Consider the following program:
- Uses a multi-sampled image as the color attachment.
- Draws simple geometry at the color attachment.
- Uses the (non-multi-sampled) swapchain image as the resolve image.
- Presents the result.
If the color attachment image (the multi-sampled one) is a sparse
image and it's fully bound, everything works and this patch is not
required.
If the image is partially bound (or just completely unbound), without
this patch the unbound area of the image that ends up being displayed
on the screen is not completely black, and it should be completely
black due to the fact that we claim to support
residencyNonResidentStrict (which is required by vkd3d for DX12).
On DG2, what ends up being displayed in the swapchain image is
actually the whole image as if it was completely bound. On TGL the
unbound area partially displays the geometry that was supposed to be
drawn, but the background is a different color: it's a weird corrupted
image. On both platforms the unbound areas should all be fully black.
This patch applies the proper flushing so that we get the results we
should have.
The bug fixed by this patch is not caught by dEQP or anything our CI
runs (dEQP does have some checks for residencynonResidentStrict
correctness, but none that catch this issue in particular). I was able
to catch this with my own sample program. Using INTEL_DEBUG=stall also
makes the problem go away.
If we had a way to track which images are fully bound we would be able
to avoid this flush. I had code for that in the earliest versions of
sparse before xe.ko had support for gpuva, but it requires maintaining
a bunch of lists, so I'm not sure that's actually worth it.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:16 +00:00
Paulo Zanoni
8abfdfe576
anv/sparse: exclude Xe2's Tile64's non-standard block shapes
...
The Tile64 format from Xe2 is weird and some of its MSAA shapes are
non-standard. Reject them. Otherwise, we'll get dEQP failures such as:
deqp-vk: ../../src/intel/vulkan/anv_sparse.c:829: anv_sparse_calc_image_format_properties: Assertion `is_standard || is_known_nonstandard_format' failed.
Many tests can reproduce this issue, including:
dEQP-VK.memory.requirements.extended.image.sparse_tiling_optimal
Testcase: dEQP-VK.memory.requirements.extended.image.sparse_tiling_optimal
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:16 +00:00
Paulo Zanoni
e69c7cd149
anv/sparse: fix block_size_B when the image is multi-sampled
...
This is all that's needed to make anv_sparse_bind_image_memory() work
with multi-sampled images.
The assert() we just added would have been really helpful when
debugging this.
All the dEQP tests with "sparse" in their names are passing *even*
without this patch. Real-world applications show very clear visual
corruption for sparse MSAA images bound through non-opaque binds since
only a fraction of the the actual image ends up being bound.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:15 +00:00
Paulo Zanoni
6d748f5b2c
anv/sparse: reject all sample flags that non-sparse doesn't support
...
We call anv_get_image_format_properties() from
anv_GetPhysicalDeviceSparseImageFormatProperties2() because we want to
reject all images that we don't support for the non-sparse case. That
function does not take sample counts as its input, it outputs a list
of possible sample counts. In this patch we check the sample counts it
outputs: if what the user is querying isn't even supported by
non-sparse, reject it right away.
That saves us from having to code in anv_sparse_image_check_support()
cases that are coded elsewhere. Examples include: 1D images and
compressed formats.
This change affects a number of dEQP tests, including:
- dEQP-VK.api.info.sparse_image_format_properties2.1d.optimal.r4g4b4a4_unorm_pack16
- dEQP-VK.api.info.sparse_image_format_properties2.2d.optimal.bc2_srgb_block
Without this patch, and with sparse multi-sampling enabled, this would
hit the following assertion:
anv_formats.c:1903: anv_GetPhysicalDeviceSparseImageFormatProperties2: Assertion `false' failed.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:15 +00:00
Paulo Zanoni
620f1d1a7a
anv/sparse: properly reject sample counts we don't support
...
Yes, I understand that this looks like the kind of check that the
applications should be doing instead of us, but if we don't that, dEQP
will have failures. If we claim support for any multi-sampled sparse
feature, dEQP will try to create multi-sampled sparse images with all
possible sample counts, including the ones supported by non-sparse but
not supported by sparse (x8 and x16 on Tile64 platforms) and also the
ones not supported at all, like x32 and x64.
This change affects a number of dEQP tests, including:
- dEQP-VK.api.info.sparse_image_format_properties2.2d.optimal.r32g32_sfloat
Without this patch, and with sparse multi-sampling enabled, this would
hit the following assertion:
anv_sparse.c:866: anv_sparse_calc_image_format_properties: Assertion `is_standard || is_known_nonstandard_format' failed.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:15 +00:00
Paulo Zanoni
af725a2ccc
anv/sparse: we can't do multi-sampled depth/stencil sparse images
...
Our hardware has more than one layout for multi-sampled images that
use the tiling formats that give us the sparse standard block shapes:
see enum isl_msaa_layout. Only the layout we use for colored images is
compatible with the standard block shapes, so it's the only one we can
expose for multi-sampled sparse.
This change affects a number of dEQP tests, including:
- dEQP-VK.memory.requirements.create_info.image.sparse_residency_aliased_tiling_optimal
Without this patch, and with sparse multi-sampling enabled, this test
would hit the following assertion:
anv_sparse.c:866: anv_sparse_calc_image_format_properties: Assertion `is_standard || is_known_nonstandard_format' failed.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:15 +00:00
Paulo Zanoni
6d38801ebd
anv/sparse: add the MSAA block shape tables
...
We're not enabling sparse on multi-sampled images yet, but having the
table here is a first step. The current approach should make the code
a little more compact.
These tables are in section 33.4.3: Standard Sparse Image Block Shapes
of the Vulkan 1.3 spec.
PS: I know we've questioned the need for us to have these tables here
as they are something dEQP should check, but I've hit the "this shape
is not standard" assertion multiple times during development of the
various sparse features, and that really helps narrowing down the
problems. For example, see the next 2 patches in this MR.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:15 +00:00
Paulo Zanoni
66b6671d3c
isl: add ISL_TILING_64_XE2 to isl_tiling_to_name()
...
Fixes: c69650a95e ("isl,blorp,anv: introduce ISL_TILING_64_XE2 for Xe2+ platforms")
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306 >
2024-05-15 08:00:15 +00:00
Marek Olšák
90b0925588
radeonsi: constify struct pipe_vertex_buffer *
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:34 +00:00
Marek Olšák
283f8af976
radeonsi/ci: remove some gfx11 flakes
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:34 +00:00
Marek Olšák
f237f497eb
radeonsi/ci: update failures for all generations
...
This also removes ASTC failures fixed by:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:34 +00:00
Marek Olšák
87fd149bd8
radeonsi/ci: fix caselists for vk-gl-cts/main
...
The files were moved in the repo.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:34 +00:00
Marek Olšák
b91220a825
radeonsi: remove slow code from si_msaa_resolve_blit_via_CB
...
This is mainly a cleanup. It wasn't faster.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
b771d13557
radeonsi: replace the clear_12bytes_buffer shader with the DMA compute shader
...
It can handle 12-byte clear values with these trivial changes.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
995e7d927c
radeonsi: use set_work_size for all internal compute dispatches
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
83d8b3bc1a
radeonsi: simplify the complex clear/copy_buffer shader
...
Remove the logic that we don't need. In a future commit, it will be
extended to optimize aspects of buffer clears and copies that need to be
optimized.
Changes:
- remove the logic that generated multiple loads/stores per thread,
only 1 load and store can occur in the shader now, allowing clearing/
copying max 4 dwords per thread
- put the src buffer in SSBO slot 0, and the dst buffer in SSBO slot 1
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
92497d1c8f
radeonsi: minor simplifications of clear/copy_buffer shaders
...
- always use L2_LRU (never use ACCESS_NON_TEMPORAL) - for better perf
- never use ACCESS_COHERENT because the address might not be aligned to
a cache line
- assume the wave size is always 64
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
81c90cded0
radeonsi: get NIR options from si_screen instead of calling get_compiler_options
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
56f2cc2277
radeonsi/gfx11: use a lighter workaround for Navi31 dEQP failures
...
This passes tests.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
602dd4c601
radeonsi: set flags directly instead of having needs_db_flush
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
5ebe75fab1
radeonsi: remove GDS tests
...
They were useful in the past. Not anymore.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
0e546fb683
radeonsi: validate the buffer range in si_set_shader_buffer
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
1d3dbb2bef
radeonsi: fix the size of the query result SSBO
...
This was harmless because the shader writes only 4 bytes if the type has
32 bits.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
96cf96f611
radeonsi: serialize shader disassembly string to fix asm dumps for ACO
...
Shaders loaded from the shader cache should be printable. Before this,
sometimes only "(null)" was printed.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Marek Olšák
573b2b813a
ac/llvm: improve/simplify/fix load_ssbo
...
Effects:
- multi-component subdword handling removed because it's lowered
- 3-dword loads selected correctly instead of 4-dword loads
- the failure of dEQP-GLES3.functional.buffer.copy.subrange.large_to_small
due to LLVM exposed by a future commit is mysteriously fixed by this
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053 >
2024-05-15 06:42:33 +00:00
Tapani Pälli
197f99dc70
ci: update failures list with angle for jsl, tgl
...
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19414 >
2024-05-15 04:45:55 +00:00
Tapani Pälli
7dcea9dd7b
docs/features: add VK_EXT_legacy_dithering
...
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19414 >
2024-05-15 04:45:55 +00:00
Tapani Pälli
2ac5e70fae
anv: VK_EXT_legacy_dithering support
...
Toggle on dithering if it has been enabled on device and is set on the
rendering flags used.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19414 >
2024-05-15 04:45:55 +00:00
Tapani Pälli
e7ce48557a
vulkan/runtime: add a subpass bit for legacy dithering
...
v2: use bit only when dithering enabled on device
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19414 >
2024-05-15 04:45:55 +00:00
Valentine Burley
826d467e40
tu: Change commas to semicolons in VK_EXT_map_memory_placed features
...
Semicolons should be used for device features.
Fixes: 220dae5870 ("tu: Implement VK_EXT_map_memory_placed")
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29206 >
2024-05-15 02:08:29 +00:00
Valentine Burley
03d8620c4c
tu: Add missing VK_EXT_legacy_vertex_attributes feature
...
This was missed during enablement.
Fixes: 660a47ecbf ("tu: support VK_EXT_legacy_vertex_attributes")
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29206 >
2024-05-15 02:08:29 +00:00
Chia-I Wu
59babe9fa0
radv: make radv_pipeline_has_ngg static
...
radv_pipeline_has_ngg has no external user anymore. Also remove the
unused radv_pipeline_has_gs_copy_shader.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29200 >
2024-05-14 23:42:25 +00:00
Chia-I Wu
be391fdb33
radv: check gs_copy_shader directly for executable props
...
The pipeline could be a graphics pipeline library and
radv_pipeline_to_graphics would assert on debug builds.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29200 >
2024-05-14 23:42:25 +00:00
Iván Briano
a9f24fb5f1
intel/brw: fix subgroup size of geometry stages for lnl+
...
Fixes dEQP-VK.subgroups.size_control.*allow_varying_subgroup_size* and
maybe others checking subgroup size.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29177 >
2024-05-14 23:13:37 +00:00
David Heidelberg
a28a289374
ci/freedreno: update expectations from the nightly run
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
David Heidelberg
96ad012878
freedreno/ci: Implement nightly piglit job for Adreno 630 and 618
...
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
David Heidelberg
0e5a567523
freedreno/ci: Drop duplicated include and add missing stages
...
The .collabora-freedreno-rules are overriten by
.collabora-freedreno-turnip-rules which already includes these rules.
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
Rob Clark
926865580e
freedreno/ci: Increase a630/a618 piglit fraction
...
After dropping obsolete skips, the piglit jobs take too long to run, so
switch to 1-in-3 fractional runs.
TODO we need nightly full runs
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
Rob Clark
da212113f8
freedreno/ci: Skip some slow tests
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
Rob Clark
4e1be72dd4
freedreno/ci: Skip built-in-functions VS/GS tests
...
They don't really add any additional coverage compared to the same
built-ins in FS, so we can just skip them to trim runtime.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
Rob Clark
6cb8c5dad0
freedreno/ci: Add a common skips file to a618_piglit.
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
Rob Clark
b92c6e16ab
freedreno/ci: Skip max-texture-size
...
It is just an OoM test
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
Rob Clark
242a591d4c
freedreno/ci: Skip unsupported legacy gl stuff
...
Don't bother even trying to test legacy gl features that the hw does not
support and cannot be emulated (or at least not reasonably).
Some of this could in theory be emulated with GS shader on a6xx+, at the
cost of extra draw time overhead. But unless someone shows up with a
real world need for these features (ie. something other than piglit/cts)
I don't think we should penalize every other gl app with the extra
overhead. If you want a slow-but-implements-gl-rusty-sharp-edges driver,
zink already exists to fill that niche. (And if someone does find some
app that needs these features, the right answer is probably driconf to
trigger a transparent fallback to zink.)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8850
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
Rob Clark
2e7970b067
freedreno/ci: Refactor out common a6xx skips list
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
Rob Clark
6d260752b8
freedreno/ci: Remove some obsolete skips
...
These should have been in xfails, so we'd have noticed to remove them
when corresponding fixes and piglit fixes (uprevs) landed.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
Rob Clark
a42db02808
freedreno/ci: Remove some skips
...
We originally skipped these before they were supported, but forgot to
remove them from the skips list once gl46 and related extensions were
added.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323 >
2024-05-14 21:16:55 +00:00
Rhys Perry
4abe5b7927
aco/gfx12: disable s_cmpk optimization
...
These opcodes were removed.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29162 >
2024-05-14 20:50:28 +00:00
Rhys Perry
2c4f561708
aco: don't change prefetch mode on GFX11.5+
...
This instruction was effectively removed:
https://github.com/llvm/llvm-project/commit/ba131b7017ce
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29162 >
2024-05-14 20:50:27 +00:00
Rhys Perry
5e58e32832
aco/tests: add GFX12 assembler tests
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29162 >
2024-05-14 20:50:27 +00:00
Rhys Perry
e1e5bc0dd0
aco: support GFX12 in assembler
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29162 >
2024-05-14 20:50:27 +00:00
Rhys Perry
74aa6437d6
aco: add GFX11.5+ opcodes
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29162 >
2024-05-14 20:50:27 +00:00
Rhys Perry
97698e564a
aco: add SFPU/ValuPseudoScalarTrans instr class
...
The latency is from LLVM's SISchedule.td
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29162 >
2024-05-14 20:50:27 +00:00
Rhys Perry
e9a25151fa
aco/tests: support GFX12
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29162 >
2024-05-14 20:50:27 +00:00
Yiwei Zhang
43bb989070
turnip: virtio: fix racy gem close for re-imported dma-buf
...
Similar to the prior fix for msm. On the dmabuf import path, tu_bo_init
can be outside of the vma lock, but left inside for code simplicity.
Fixes: f17c5297d7 ("tu: Add virtgpu support")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29093 >
2024-05-14 19:11:12 +00:00
Yiwei Zhang
6ca192f586
turnip: virtio: fix iova leak upon found already imported dmabuf
...
There's a success path on found dmabuf while the iova won't be cleaned
up. This change defers iova alloc till lookup miss and also to prepare
for later racy dmabuf re-import fix.
Also documented a potential leak on error path due to unable to tell
whether a gem handle should be closed or not without refcounting.
Fixes: f17c5297d7 ("tu: Add virtgpu support")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29093 >
2024-05-14 19:11:12 +00:00
Yiwei Zhang
585a87ae53
turnip: virtio: fix error path in virtio_bo_init
...
Fixes: f17c5297d7 ("tu: Add virtgpu support")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29093 >
2024-05-14 19:11:11 +00:00
David Rosca
b33bb4077d
frontends/va: Only increment slice offset after first slice parameters
...
Fixes slice offset if app submits exactly one data buffer followed by
parameter buffers.
Fixes: 6746d4df6e ("frontends/va: Fix AV1 slice_data_offset with multiple slice data buffers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11133
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11138
Tested-by: Marcus Seyfarth <m.seyfarth@gmail.com >
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29124 >
2024-05-14 18:51:03 +00:00
Mike Blumenkrantz
1240fbba21
ci: bump VVL to v1.3.285
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29198 >
2024-05-14 18:09:28 +00:00
Mike Blumenkrantz
f4a66eadf9
zink: set all spirv caps for the vvl vtn pass
...
this avoids internal warnings/errors from caps
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29195 >
2024-05-14 17:47:01 +00:00
Karol Herbst
48c752d3e0
event: break long dependency chains on drop
...
This prevents stack overflows on drop without making it expensive to read
from dependencies (e.g. my attempt to use Weak instead).
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29190 >
2024-05-14 17:26:39 +00:00
Karol Herbst
2f1f98e846
Revert "rusticl/event: use Weak refs for dependencies"
...
I didn't like the solution and I _think_ it even introduced a potential
regressions involving releasing failed events and that causing dependents
to run and succeed regardless.
This reverts commit a45f199086 .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29190 >
2024-05-14 17:26:38 +00:00
Nanley Chery
3bdfe0e2a3
intel/isl: Update quote for XeHP's CCS halign rule
...
Clarify that the depth/stencil rules take precedence over the CCS rules.
From Bspec 43862 (r52666).
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29167 >
2024-05-14 16:56:04 +00:00
Nanley Chery
c31d59f078
intel/isl: Reduce halign for disabled CCS on XeHP
...
Reduce the space consumption of mipmapped images which don't use
compression.
Based on Bspec 43862 (r52666).
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29167 >
2024-05-14 16:56:04 +00:00
Nanley Chery
0f41ffe230
intel/isl: Add and use _isl_surf_info_supports_ccs
...
Replace a lot of open-coded checks which determine if CCS might be
enabled during surface layout.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29167 >
2024-05-14 16:56:04 +00:00
Samuel Pitoiset
6c8224c693
radv: simplify radv_emit_ps_inputs() slightly
...
Also remove useless check about ps_offset being zero because memcmp
return false in this case.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28983 >
2024-05-14 15:32:08 +00:00
Samuel Pitoiset
c63ac0521a
radv: track all graphics shaders context registers
...
This should be similar to the previous ctx_cs logic that was
implemented in order to reduce context rolls but this also applies
to shader objects.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28983 >
2024-05-14 15:32:08 +00:00
Samuel Pitoiset
db597d274b
radv: add more radeon_opt_set_xxx variants
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28983 >
2024-05-14 15:32:08 +00:00
Samuel Pitoiset
d5af67ea2c
radv: add graphics shaders context registers that need to be tracked
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28983 >
2024-05-14 15:32:07 +00:00
Samuel Pitoiset
9532b0f1b2
radv: emit graphics pipelines directly from the cmdbuf
...
This allows us to unify emitting monolithic graphics pipelines and
shader objects.
Though, this temporarily reduces performance in some games due to more
context rolls. But this will be fixed in the following commits by
using the recent mechanism to track context register writes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28983 >
2024-05-14 15:32:07 +00:00
Samuel Pitoiset
fca40bcce3
radv: make radv_conv_gl_prim_to_gs_out() a non-static function
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28983 >
2024-05-14 15:32:07 +00:00
Rob Clark
d516721cd0
tu: Support VkExternalFormatANDROID
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29090 >
2024-05-14 14:53:45 +00:00
Rob Clark
29f5a78d16
tu: Skip YUV conversion for RGB formats
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29090 >
2024-05-14 14:53:45 +00:00
tarsin
99753001f3
turnip: Support AHardwareBuffer
...
Signed-off-by: tarsin <yuanqingxiang233@163.com >
[rob: various fixes for android-cts failures]
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29090 >
2024-05-14 14:53:45 +00:00
tarsin
4b024a15f2
turnip: Split tu_image_init to use layout setting logic separately
...
Signed-off-by: tarsin <yuanqingxiang233@163.com >
[rob: improve comments about modifier taking precedence over image
create flags, and fix bogus assert]
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29090 >
2024-05-14 14:53:45 +00:00
tarsin
ecd9ece9c1
turnip: Convert tu_device_memory to use vk_device_memory
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29090 >
2024-05-14 14:53:45 +00:00
Roman Stratiienko
1373b0966c
turnip/android: Migrate to common ANB code
...
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Tested-by: tarsin <yuanqingxiang233@163.com >
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29090 >
2024-05-14 14:53:45 +00:00
tarsin
e047d75a57
turnip: Change tu_image to use common initialization helpers
...
This change is required to enable common ANB functionality,
which the following patch adds.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29090 >
2024-05-14 14:53:45 +00:00
Rob Clark
270ee65667
vulkan: Add helper to resolve Android external format
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29090 >
2024-05-14 14:53:45 +00:00
Rob Clark
12092d1ac7
vulkan: Don't request Ycbcr conversion for rgb
...
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29090 >
2024-05-14 14:53:45 +00:00
Rob Clark
b9bbeb77c7
vulkan/android: Add helper to probe AHB support
...
GetPhysicalDeviceImageFormatProperties() must that an image {format,
flags, usage} combo is unsupported if gralloc will not be able to
perform the allocation. The practical way to test this is to do a
small test allocation.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29090 >
2024-05-14 14:53:44 +00:00
Karol Herbst
be0a893a2e
rusticl/spirv: enable more caps
...
Silences warnings about them.
Fixes: ba11b12a82 ("rusticl: Use the new spirv_capabilities struct")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29193 >
2024-05-14 14:33:05 +00:00
Friedrich Vock
590ea76104
aco/spill: Insert p_start_linear_vgpr right after p_logical_end
...
If p_start_linear_vgpr allocates a VGPR that is already blocked, RA
will try moving the blocking VGPR somewhere else. If
p_start_linear_vgpr is inserted right before the branch, that move will
be inserted after exec has been overwritten, which might cause the move
to be skipped for some threads.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28041 >
2024-05-14 13:54:34 +00:00
Friedrich Vock
84c1870b65
aco/tests: Insert p_logical_start/end in reduce_temp tests
...
Linear VGPR insertion will depend on a p_logical_end existing in the
blocks the VGPR is inserted in.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28041 >
2024-05-14 13:54:34 +00:00
Mary Guillemard
02efe52aab
panvk: Only clear UBOs descriptors when set isn't present
...
The layout for dyn UBOs changed but we were still cleaning right after
UBOs.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Fixes: 9c553bda9c ("panvk: Prepare dynamic buffer descriptors at bind time")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29191 >
2024-05-14 13:31:06 +00:00
Konstantin Seurer
1f0f76dbdc
radv/ci: Document recent flakes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29188 >
2024-05-14 13:09:28 +00:00
Konstantin Seurer
9db41dfec5
radv/ci: Add back pipeline library flakes
...
The tests are still flaky.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29188 >
2024-05-14 13:09:28 +00:00
Rhys Perry
cb81ec7a61
aco: don't count certain pseudo towards VMEM_STORE_CLAUSE_MAX_GRAB_DIST
...
fossil-db (navi31):
Totals from 1023 (1.29% of 79395) affected shaders:
MaxWaves: 29258 -> 29240 (-0.06%)
Instrs: 1134024 -> 1133163 (-0.08%); split: -0.10%, +0.02%
CodeSize: 5682108 -> 5678696 (-0.06%); split: -0.08%, +0.02%
VGPRs: 60248 -> 60272 (+0.04%); split: -0.08%, +0.12%
Latency: 3797510 -> 3792797 (-0.12%); split: -0.18%, +0.05%
InvThroughput: 781270 -> 781239 (-0.00%); split: -0.03%, +0.03%
VClause: 24701 -> 23976 (-2.94%); split: -3.55%, +0.61%
Copies: 75177 -> 75169 (-0.01%); split: -0.20%, +0.19%
VALU: 659939 -> 659962 (+0.00%); split: -0.02%, +0.02%
VOPD: 2040 -> 2009 (-1.52%); split: +0.29%, -1.81%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28948 >
2024-05-14 12:30:54 +00:00
Eric Engestrom
34844deb3e
ci: fix section_end in debian-build-testing
...
Fixes: d428cc1116 ("ci/debian-build-testing: drop extra nesting section")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29170 >
2024-05-14 11:46:42 +00:00
David Heidelberg
d0c364a24b
ci: drop unused piglit-test and integrate it into piglit-traces-test
...
No longer used. We don't use piglit directly, except for the traces.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29170 >
2024-05-14 11:46:42 +00:00
Eric Engestrom
a40345aaeb
ci: reuse dead .vkd3d-proton-test to make vkd3d less radv-specific
...
Replace dead `script:` with `HWCI_TEST_SCRIPT`, and rename it to have
the `b2c-` prefix since it's no longer generic.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29170 >
2024-05-14 11:46:41 +00:00
Eric Engestrom
68c09a00c8
mr-label-maker: mark *-vkd3d.txt files as CI results expectations files
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29170 >
2024-05-14 11:46:41 +00:00
Eric Engestrom
9af82fc98f
amd/ci: track changes to VKD3D_PROTON_RESULTS files
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29170 >
2024-05-14 11:46:41 +00:00
Eric Engestrom
7dd2b9e11a
ci: hardcode -vkd3d namespace for VKD3D_PROTON_RESULTS
...
This means we can rely on these files always having that name.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29170 >
2024-05-14 11:46:41 +00:00
Eric Engestrom
c50f3d62b9
ci: drop default VKD3D_PROTON_RESULTS file name
...
Nobody uses that, and it doesn't make much sense to have a single file
used by everyone as each driver will have its own failures.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29170 >
2024-05-14 11:46:41 +00:00
Marek Olšák
5502ecd771
util: shift the mask in BITSET_TEST_RANGE_INSIDE_WORD to be relative to b
...
so that users don't have to shift it at every use. It was supposed to be
like this from the beginning.
Fixes: fb994f44d9 - util: make BITSET_TEST_RANGE_INSIDE_WORD take a value to compare with
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29187 >
2024-05-14 10:13:15 +00:00
Hans-Kristian Arntzen
6c3457033a
radv: Implement VK_MESA_image_alignment_control
...
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no >
Co-authored-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Co-authored-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29129 >
2024-05-14 09:30:40 +00:00
Hans-Kristian Arntzen
14457b358f
ac/surface: Add surface flags to prefer 4K and 64K alignment.
...
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no >
Co-authored-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Co-authored-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29129 >
2024-05-14 09:30:40 +00:00
Hans-Kristian Arntzen
47044cb019
vulkan: Update XML and headers to 1.3.285.
...
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29129 >
2024-05-14 09:30:40 +00:00
Weifeng Liu
ea7880478e
anv/anroid: Query gralloc for tiling mode
...
Tiled scan-out buffer works only for those platforms supporting
set_tiling/get_tiling ioctl, which is not used for newer platforms
(e.g., dGPU). This change switch to querying modifier reliably with
gralloc API.
Signed-off-by: Weifeng Liu <weifeng.liu@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29185 >
2024-05-14 09:06:00 +00:00
Samuel Pitoiset
2097bec163
radv: fix the late scissor workaround for GFX9 since a recent refactoring
...
This was a typo.
Fixes: 92337aff03 ("radv: split cmdbuf dirty flags into dirty/dirty_dynamic")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11142
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29156 >
2024-05-14 08:36:46 +00:00
Tapani Pälli
01608de875
iris: ForceZeroRTAIndexEnable if last geom stage does not write layer id
...
This matches anv and specification behavior, change makes us toggle the
field in tests/application that may use layered framebuffer but do not
assign any value to gl_Layer.
Example of such a test:
KHR-GL46.geometry_shader.layered_rendering_boundary_condition.layered_rendering_boundary_condition_no_default_layer
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29064 >
2024-05-14 08:09:17 +00:00
Eric Engestrom
8c22112a7d
util/format: add missing null check in util_format_is_srgb()
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11137
Fixes: ff6cf60cb8 ("gallium/util: add util_format_is_srgb() helper")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29160 >
2024-05-14 07:16:02 +00:00
Dave Airlie
2f02af39b3
radv/video/encode: fix quality params on v2 hw.
...
This should have the extra dword as well.
Fixes: 54d499818c ("radv/video: add initial support for encoding with h264.")
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29098 >
2024-05-14 05:45:57 +00:00
Alyssa Rosenzweig
d2cf17022d
libagx: don't use get_group_id()
...
We don't want to see base_wg intrinsics.
Fixes: d22f936019 ("nir: remove workgroup_id_zero_base")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
21f0b14844
libagx: add query copy kernel
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
13d875da32
libagx: use sub_group_scan_inclusive_add
...
now that the backend has a full subgroup impl.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
76bb81dd59
asahi: don't reserve extra UVS space for layer
...
it's a sysval now
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
48d16b3972
asahi: extend epilog key for force early frag handling
...
need to be extra careful around the sample mask.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
ee9dab83e7
asahi: don't ralloc in agx_fast_link
...
let the driver allocate upfront so we can suballoc etc.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
c1d68da5e2
asahi: plumb tri fan flatshading through common
...
not yet used in the GL driver but we should probably fix that.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
cad60ab4b1
asahi: extend varying linking for tri fan weirdness
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
d763ab2de0
asahi: don't allocate for ppp updates
...
let the driver.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
3eacd8a8b2
asahi: don't allocate varyings ourselves
...
let the driver do it.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
96521fbce3
asahi: use ppp_merge
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
59d2b7283c
asahi: add agx_ppp_push_merged helper
...
convenient for ppp merge trickery.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:27 +00:00
Alyssa Rosenzweig
22292afd3c
asahi: pack tilebuffer usc word ahead-of-time
...
reduce draw time overhead.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
289cc5f5dd
asahi: drop bogus assertion
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
64e2502e54
asahi: eliminate num_workgroups for VS->GS + VS->TCS
...
this is a step towards simpler geom/tess uniform management.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
c829f46fde
asahi: update comment for maint5
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
c16df593a5
asahi: update comment
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
a2094e8142
asahi: rm always true param
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
52211088a2
asahi: rm more dead lowering
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
45e5b7ad50
asahi: mv initialization of grid z for indirect GS
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
4a344de276
asahi: rm redundant input_vertices
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
e5c7bca88d
asahi: rm num_vertices uses
...
inline the last one to make obvious what we have left.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
1a9841ddef
asahi: rm unused lower
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
d90887a7f1
asahi: rm dated comment
...
no longer confusing.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
8fd2e3c71b
asahi: rm another num_vertices use
...
this wasn't even for vertices, just primitives!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
5af1828440
asahi: mv vertex_id_for_topology_class into GS lowering
...
not used with tess.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
a76e8447ac
asahi: don't use load_num_vertices in geometry shaders
...
It makes the uniform upload path more complicated (since num_vertices is backed
by a software compute shader construct), but we can just use gs_grid[0] the way
we already for rast shaders.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
0b7b201ab6
asahi: move some GS lowering into lower_gs
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
a27a803961
asahi: add agx_index_size_to_B helper
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
f18f578b63
asahi: rm dead code
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
f6b863df30
asahi: set src_type for store_output
...
Fixes: 1632948a76 ("nir: validate src_type of store_output intrinsics, require bit_size >= 16")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
5b3af5b7e6
asahi: rearrange VS uniforms
...
this puts draw parameters in the right order and adds in the draw ID. together
this makes MDI a lot more straightforward to do efficiently.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
6d518609e3
asahi: eliminate troublesome empty uniforms
...
these don't do what you expect and are wasteful.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
0e845e38f9
asahi: free libagx if we don't use a ralloc memctx
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
6b47d9c600
asahi: move primitive MSAA field
...
works on Cull but not Cull 2, because forget me.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
cccf0609a6
asahi: simplify image atomic lowering
...
Do more calculation in the preamble so we can do less pointer chasing and keep
everything within our 64-bit budget.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
9069ac986b
asahi: fix cull unknown bits
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
e04779ad4b
asahi: lower texture instructions with epilogs
...
for eMRT
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
f4991baa89
asahi: fix sample ID with multiblock epilogs
...
eMRT + MSAA + epilog case.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
cf653997d7
asahi: fix store_output component/offset
...
with epilogs
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
696f4654d4
asahi: fix rgb565 blending
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
292cd87054
asahi: clarify format code in image lowering
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
18239f3e88
asahi: handle agx_ppp_fragment_face_2 with no info
...
for null fs
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
afdc6891c1
asahi: mv AGX_MAX_OCCLUSION_QUERIES define
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
883b5407c8
asahi: rework VBO lower for divisor=0
...
silly special case that we should handle.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
602d9b98d8
asahi: fix txf/image_load robustness with arrays
...
need to zero out OOB layers, not clamp!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
3dd148bfc0
asahi: fix 1D array atomics
...
we grabbed the wrong component, also should be optimizing out the twiddling.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
4d832f8433
asahi: add missing rgba4 format
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
12ebea098c
asahi: drop rgb10a2_sint rendering
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
5f40b0e9fd
asahi: rm deadcode
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
3cb8c1de81
asahi: get debug in common
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
15333424a5
asahi: plumb shader stage into info
...
convenient.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
ee79b71753
asahi: pack UVS key properly
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
1df1260259
asahi: fix prolog emit
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
6373de5195
asahi: move agx_link_varyings_vs_fs
...
nothing gl here except for point sprites
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
fadb990463
asahi: cleanup fs epilog link info
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
71692a5d0b
asahi: resize key
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
a38f7c9151
asahi: rm unused #include
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:26 +00:00
Alyssa Rosenzweig
ad5f46ff8c
asahi: implement PIPE_CAP_QUERY_MEMORY_INFO
...
Steam uses it.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
74963d5364
asahi: unwrap pointless null check
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
8494288451
asahi: assert bo size > 0
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
4e05f549ea
asahi: agx_translate_sample_count
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
feabbddc2a
asahi: calculate validity when unpacking
...
for smarter printing.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
ac726ae5a9
asahi: mark eMRT loads as in-bounds
...
for layer clamping purposes.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
ac114030a7
ail: constify everything
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
efa9f242a8
agx: fix UB in cursor comparison
...
padding here is implementation-defined, do the cleaner thing. fixes invalid IR
generated with gcc but not clang.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reported-by: Janne Grunau <janne-fdr@jannau.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
bcffc84306
agx: optimize elect()
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
bc26e11c2a
agx: lower more quad ops
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
7aa17a122f
agx: implement quad_ballot
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
8a656b29f3
agx: handle quad reduce
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
1be0e8e348
agx: stash early_fragment_test info
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Mary Guillemard
1c8aab388c
agx: speed-up dce
...
Follows aco changes, there shouldn't be any loop header phis that are
dead code (as nir_opt_dce ensure that)
Signed-off-by: Mary Guillemard <mary@mary.zone >
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
5b03e7bab3
agx: fix bogus unit test
...
broken SSA.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
aad82f4265
agx: optimize txf with lod 0
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
5c898e56b2
agx: reserve scratch registers for mem<-->mem swaps
...
Trying to spill/fill a temp on the fly has pathologically bad performance in bad
cases, reserving a scratch reg is much more well-behaved. Fixes a fragment
shader timeout in dEQP-VK.graphicsfuzz.spv-stable-maze-flatten-copy-composite
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
f7ff0041c1
agx: document another sample_mask restriction
...
hit this with force early fragment tests.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
840394c169
agx: expose agx_link_libagx
...
for deduplication.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
5a3ac73747
agx: report uses_txf
...
so driver can optimize usc binding.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
54ec9512ef
agx: flesh out subgroup lowering
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
659db5049c
agx: lower 8-bit subgroups
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
00cfe84fd9
agx: forbid uniforms on ballots
...
needs more investigation..
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
c2c49b261c
agx: add missing b2b16 implementation
...
will show up with a subgroup lowering.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
a3cb0cbfda
agx: handle quad swaps
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
f4a5ac3554
agx: handle quad_broadcast
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
7b33c549b9
agx: handle non-immediate shuffles in divergent CF
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
589c69a646
agx: lower shuffle
...
per dougallj's notes in applegpu.py
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
fbcd9a83e4
agx: model more subgroup ops
...
additional shuffles, scans, reduces.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
e718a536ac
agx: delete unreachable blocks
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
3efa723b63
agx: lower nir_intrinsic_load_num_subgroups
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
765bf9a25b
agx: switch to demote internally
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
35d6f4a394
agx: fix spilling inside sample loop
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
bdd200a202
agx: handle subgroup barriers
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
d183b76fd4
agx: fix frag sidefx with sample shading
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
6269a1474d
agx: fix load_helper_invocation with sample shading
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
94f0209fb2
agx: fix phi translation corruption
...
we can't stomp over srcs[], where we allocated our space for sources. unclear
how this worked before but it definitely breaks once you have a phi with 7
sources.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
f21dbfe5ae
agx: allow 8-bit bcsel
...
can be generated from our lowerings but it just works with the implicit
conversion semantics we have.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
a948244058
agx: handle cross-workgroup memory barriers
...
there's no prior art for this, but experimentally this seems to do the right
thing.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
c22ce3cab9
agx: fix some ms texture packing
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
ec47f325f8
agx: fix query LOD of array
...
need to ignore the layer
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
8df39ac49b
agx: enable more lowering
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
69d7063ec0
agx: optimize and/or with booleans
...
Beneficial so we can fuse the comparison.
total instructions in shared programs: 2188179 -> 2185535 (-0.12%)
instructions in affected programs: 392512 -> 389868 (-0.67%)
helped: 894
HURT: 9
Instructions are helped.
total alu in shared programs: 1706063 -> 1703445 (-0.15%)
alu in affected programs: 275063 -> 272445 (-0.95%)
helped: 880
HURT: 9
Alu are helped.
total fscib in shared programs: 1702385 -> 1699743 (-0.16%)
fscib in affected programs: 276199 -> 273557 (-0.96%)
helped: 894
HURT: 9
Fscib are helped.
total ic in shared programs: 462494 -> 462490 (<.01%)
ic in affected programs: 124 -> 120 (-3.23%)
helped: 1
HURT: 0
total bytes in shared programs: 14476964 -> 14464512 (-0.09%)
bytes in affected programs: 2870824 -> 2858372 (-0.43%)
helped: 888
HURT: 155
Bytes are helped.
total regs in shared programs: 662444 -> 662461 (<.01%)
regs in affected programs: 1025 -> 1042 (1.66%)
helped: 14
HURT: 12
Inconclusive result (value mean confidence interval includes 0).
total uniforms in shared programs: 1638301 -> 1638374 (<.01%)
uniforms in affected programs: 17778 -> 17851 (0.41%)
helped: 22
HURT: 54
Uniforms are HURT.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
c43413f729
compiler: add ACCESS_IN_BOUNDS_AGX
...
useful for internal shaders on agx.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
eb5f82d221
nir,agx: fix load_active_subgroup_index
...
It can't be reordered globally, since its value is control-flow dependent.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
7fb60c4c81
nir,agx: add depth=never workaround
...
There seems to be a hardware issue where fragment shaders with side effects get
skipped if depth testing with NEVER. Add a workaround for this case where we
discard programmatically instead.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
9d824bd123
nir: add quad_ballot_agx intrinsic
...
to lower quad votes in nir.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:24 +00:00
Alyssa Rosenzweig
2912f531a7
nir: add texops for AGX border colour emulation
...
AGX has limited border colour hardware. To support full
customBorderColorWithoutFormat semantics, we're forced to emulate in shaders at
a substantial performance penalty. Actually, that's needed just to pass CTS
because of other hardware issues stacking on top of each others... Hooray!
Add the texops we need to facilitate efficient custom border colour lowering.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:24 +00:00
Alyssa Rosenzweig
8b9ed851ec
nir: add is_first_fan_agx sysval
...
needed for correct flatshading with fans, without falling back on software input
assembly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179 >
2024-05-14 04:57:24 +00:00
Faith Ekstrand
8bc694223e
zink: Set workarounds.can_do_invalid_linear_modifier for NVK
...
This fixes most of the egl_image_dma_buf* piglit tests. The remaining
fails are YCbCr tests which are likely unrelated to core dma-buf
import/export.
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
e6f77defec
nvk/wsi: Advertise modifier support
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
28342a581f
vulkan/wsi: Bind memory planes, not YCbCr planes.
...
Reviewed-by: Joshua Ashton <joshua@froggi.es >
Fixes: f5433e4d6c ("vulkan/wsi: Add modifiers support to wsi_create_native_image")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10176
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
cd428e01d7
nvk: Advertise VK_EXT_image_drm_format_modifier
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9636
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9480
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
d8e200c0d9
nvk: Advertise VK_EXT_queue_family_foreign
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Mohamed Ahmed
bca2f13dd8
nvk: enable rendering to DRM_FORMAT_MOD_LINEAR images
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
224d9a514a
nvk: Implement DRM format modifier queries
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
4ad79bfef4
nvk: Set tile mode and PTE kind on dedicated dma-buf BOs
...
This is our compromise to make NVK and nouveau GL play nice when it
comes to modifiers. The old GL driver depends heavily on the PTE kind
and tile mode, even for images with modifiers. While it correctly
encodes the PTE kind and tile mode in the modifiers it advertises, it
may ignore the modifier and just trust what's set on the BO when it
imports a dma-buf image. This is partly because it doesn't support
VM_BIND and partly because of preexisting bugs in the modifiers
implementation. In either case, we can't fix it retroactively.
To work around this, NVK also sets the PTE kind and tile mode on the BO
when it's a dedicated allocation created for a DRM format modifiers
image. If DRM format modifiers are used without dedicated allocations,
things may still break but that's getting into vanishingly unlikely
scenarios.
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
f1fdffa1b2
nvk: Support image creation with modifiers
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
3bb531d245
nouveau/winsys: Add back nouveau_ws_bo_new_tiled()
...
This reverts commit ce1cccea98 . In this
new version, we also add a query for whether or not tiled BOs are
supported by nouveau.ko.
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
03c4a46fe5
drm-uapi: Sync nouveau_drm.h
...
Taken from drm-misc-next-fixes:
commit 959314c438caf1b62d787f02d54a193efda38880
Author: Mohamed Ahmed <mohamedahmedegypt2001@gmail.com >
Date: Thu May 9 23:43:52 2024 +0300
drm/nouveau: use tile_mode and pte_kind for VM_BIND bo allocations
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
8cce121da4
nvk: Allow VK_IMAGE_ASPECT_MEMORY_PLANE_0_BIT
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Mohamed Ahmed
6063f96c61
nil: Support creating images with DRM modifiers
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Mohamed Ahmed
e1bd4127f3
nil: Add some helpers for DRM format modifiers
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
b7773f96f9
nil: Default to NV_MMU_PTE_KIND_GENERIC_MEMORY on Turing+
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
603389f7a3
nvk: Set color/Z compression based on nil_image::compressed
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Mohamed Ahmed
873a044cb3
nil: Add a nil_image::compressed bit
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
73c87dbc0c
nil: Use the right PTE kind for Z32 pre-Turing
...
This got lost in the Rust rewrite.
Fixes: 426553d61d ("nil: Re-implement nil_image in Rust")
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
71d1fa129a
nvk: Allow GART for dma-bufs
...
We also allow dma-bufs to be imported into arbitrary heaps because we
relly don't know where they'll come from.
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
6cd58de4eb
nouveau/winsys: Make BO_LOCAL and BO_GART separate flags
...
It's sometimes useful to specify both to allow migration.
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:34 +00:00
Faith Ekstrand
19b143b7bc
nouveau/winsys: Take a reference to BOs found in the cache
...
Fixes: c370260a8f ("nouveau/winsys: Add dma-buf import support")
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:33 +00:00
Faith Ekstrand
d63f015d0b
nvk: Improve the GetMemoryFdKHR error
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24795 >
2024-05-14 04:04:33 +00:00
Faith Ekstrand
756cbb41a2
nvk: Use the upload queue for NVK_DEBUG=zero_memory
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10800
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29183 >
2024-05-14 03:40:24 +00:00
Faith Ekstrand
22e44d54fd
nvk/upload_queue: Add a _fill method
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29183 >
2024-05-14 03:40:24 +00:00
Faith Ekstrand
3132a49eb0
nvk/upload_queue: Add some useful asserts
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29183 >
2024-05-14 03:40:24 +00:00
Faith Ekstrand
9b098209b9
nvk/upload_queue: Only upload one line of data
...
This only doesn't blow up beause we set multi_line_enable = FALSE.
Fixes: 2074e28a0d ("nvk: Add an upload queue")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29183 >
2024-05-14 03:40:24 +00:00
Mike Blumenkrantz
ac78076cd2
zink: hook up VK_EXT_legacy_vertex_attributes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29069 >
2024-05-14 03:11:22 +00:00
Ian Romanick
97e3c6a12a
intel/brw: Use range analysis to optimize fsign
...
shader-db:
Meteor Lake, DG2, and Tiger Lake had similar results. (Meteor Lake shown)
total instructions in shared programs: 19674784 -> 19665960 (-0.04%)
instructions in affected programs: 933425 -> 924601 (-0.95%)
helped: 3656 / HURT: 0
total cycles in shared programs: 810343919 -> 810241030 (-0.01%)
cycles in affected programs: 56752034 -> 56649145 (-0.18%)
helped: 3032 / HURT: 434
LOST: 11
GAINED: 0
Ice Lake and Skylake had similar results. (Ice Lake shown)
total instructions in shared programs: 20315795 -> 20305856 (-0.05%)
instructions in affected programs: 979698 -> 969759 (-1.01%)
helped: 3845 / HURT: 0
total cycles in shared programs: 830600281 -> 830534694 (<.01%)
cycles in affected programs: 45675615 -> 45610028 (-0.14%)
helped: 3250 / HURT: 325
total spills in shared programs: 4583 -> 4565 (-0.39%)
spills in affected programs: 180 -> 162 (-10.00%)
helped: 3 / HURT: 0
total fills in shared programs: 5245 -> 5219 (-0.50%)
fills in affected programs: 379 -> 353 (-6.86%)
helped: 3 / HURT: 0
LOST: 14
GAINED: 8
fossil-db:
All Intel platforms except Tiger Lake had similar results. (Meteor Lake shown)
Totals:
Instrs: 154024263 -> 154023814 (-0.00%)
Cycle count: 17463341602 -> 17461726239 (-0.01%); split: -0.01%, +0.00%
Totals from 322 (0.05% of 631440) affected shaders:
Instrs: 199933 -> 199484 (-0.22%)
Cycle count: 168492537 -> 166877174 (-0.96%); split: -0.96%, +0.00%
Tiger Lake
Instrs: 149984723 -> 149984287 (-0.00%)
Cycle count: 15238596937 -> 15239260415 (+0.00%); split: -0.00%, +0.01%
Max dispatch width: 5553408 -> 5553424 (+0.00%)
Totals from 318 (0.05% of 631414) affected shaders:
Instrs: 179624 -> 179188 (-0.24%)
Cycle count: 160724533 -> 161388011 (+0.41%); split: -0.06%, +0.48%
Max dispatch width: 3296 -> 3312 (+0.49%)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095 >
2024-05-14 01:28:21 +00:00
Ian Romanick
e578657313
intel/brw: Implement more strictly correct fsign lowering
...
The huge amount of helped shaders is due to the "~" versions of the
patterns.
shader-db:
Meteor Lake and DG2 had similar results. (Meteor Lake shown)
total instructions in shared programs: 19672345 -> 19662605 (-0.05%)
instructions in affected programs: 1147766 -> 1138026 (-0.85%)
helped: 2691 / HURT: 1650
total cycles in shared programs: 810323688 -> 810145191 (-0.02%)
cycles in affected programs: 68918312 -> 68739815 (-0.26%)
helped: 3651 / HURT: 1832
LOST: 29
GAINED: 38
Tiger Lake
total instructions in shared programs: 19489619 -> 19479909 (-0.05%)
instructions in affected programs: 1124564 -> 1114854 (-0.86%)
helped: 2682 / HURT: 1643
total cycles in shared programs: 811468406 -> 811706747 (0.03%)
cycles in affected programs: 66397690 -> 66636031 (0.36%)
helped: 3692 / HURT: 1775
total spills in shared programs: 3906 -> 3907 (0.03%)
spills in affected programs: 16 -> 17 (6.25%)
helped: 0 / HURT: 1
total fills in shared programs: 3220 -> 3222 (0.06%)
fills in affected programs: 50 -> 52 (4.00%)
helped: 0 / HURT: 1
LOST: 33
GAINED: 36
Ice Lake and Skylake had similar results. (Ice Lake shown)
total instructions in shared programs: 20317882 -> 20307495 (-0.05%)
instructions in affected programs: 1199651 -> 1189264 (-0.87%)
helped: 2863 / HURT: 1680
total cycles in shared programs: 830880024 -> 830457927 (-0.05%)
cycles in affected programs: 63347102 -> 62925005 (-0.67%)
helped: 4118 / HURT: 1622
total spills in shared programs: 4593 -> 4583 (-0.22%)
spills in affected programs: 205 -> 195 (-4.88%)
helped: 4 / HURT: 0
total fills in shared programs: 5284 -> 5245 (-0.74%)
fills in affected programs: 464 -> 425 (-8.41%)
helped: 4 / HURT: 0
LOST: 70
GAINED: 33
fossil-db:
Meteor Lake and DG2 had similar results. (Meteor Lake shown)
Totals:
Instrs: 154025275 -> 154022035 (-0.00%); split: -0.00%, +0.00%
Cycle count: 17472869499 -> 17463289530 (-0.05%); split: -0.06%, +0.00%
Spill count: 141269 -> 141246 (-0.02%); split: -0.02%, +0.00%
Fill count: 265342 -> 265159 (-0.07%); split: -0.11%, +0.04%
Max live registers: 32597829 -> 32597986 (+0.00%); split: -0.00%, +0.00%
Max dispatch width: 5536776 -> 5537048 (+0.00%)
Totals from 1590 (0.25% of 631423) affected shaders:
Instrs: 1146532 -> 1143292 (-0.28%); split: -0.44%, +0.16%
Cycle count: 1230843330 -> 1221263361 (-0.78%); split: -0.83%, +0.05%
Spill count: 15832 -> 15809 (-0.15%); split: -0.19%, +0.04%
Fill count: 36071 -> 35888 (-0.51%); split: -0.79%, +0.29%
Max live registers: 93529 -> 93686 (+0.17%); split: -0.00%, +0.17%
Max dispatch width: 15168 -> 15440 (+1.79%)
Tiger Lake, Ice Lake, and Skylake had similar results. (Tiger Lake shown)
Totals:
Instrs: 149564084 -> 149562467 (-0.00%); split: -0.00%, +0.00%
Cycle count: 15151701515 -> 15158290114 (+0.04%); split: -0.00%, +0.04%
Max live registers: 32249443 -> 32249620 (+0.00%); split: -0.00%, +0.00%
Max dispatch width: 5540536 -> 5540488 (-0.00%)
Totals from 1605 (0.25% of 630303) affected shaders:
Instrs: 584950 -> 583333 (-0.28%); split: -0.49%, +0.21%
Cycle count: 160926321 -> 167514920 (+4.09%); split: -0.05%, +4.14%
Max live registers: 90851 -> 91028 (+0.19%); split: -0.00%, +0.20%
Max dispatch width: 15440 -> 15392 (-0.31%)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095 >
2024-05-14 01:28:20 +00:00
Ian Romanick
864268ff0d
intel/brw: Algebraic optimizations for CSEL
...
No shader-db or fossil-db changes on any Intel platform. In this MR, the
only benefit of these changes is to convert some "-a > 0" CSEL
comparisons to "a < 0" for improved readability.
v2: Add integer CSEL support
v3: Use fs_inst::resize_sources and brw_type_is_sint. Both suggested by
Ken.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095 >
2024-05-14 01:28:20 +00:00
Ian Romanick
033405cd4b
intel/brw: Combine constants and constant propagation for CSEL
...
No shader-db or fossil-db changes on any Intel platform. This ends up
begin helpful in "intel/brw: Use range analysis to optimize fsign."
v2: Add integer CSEL support
v3: Massive simplification (-20 lines!) of constant propagation
logic. Suggested by Ken. Add missing CSEL case in supports_src_as_imm.
Noticed by Ken.
v4: While MAD can mix F and HF sources on some platforms, CSEL
cannot. Found by skqp on TGL.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org > [v3]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095 >
2024-05-14 01:28:20 +00:00
Ian Romanick
504b742b83
intel/brw: Update CSEL source type validation
...
Gfx9 can only have F, but newer GPUs can have F, HF, *D, or *W. The
source and destination types must still match in size.
v2: Simplify the float vs integer logic. Suggested by Ken.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095 >
2024-05-14 01:28:20 +00:00
Ian Romanick
3f151c03af
intel/brw: Handle fsign optimization in a NIR algebraic pass
...
This is a lot less code, and it makes it easier to experiment with other
pattern-based optimizations in the future.
The results here are nearly identical to the results I got from Ken's
"intel/brw: Make fsign (for 16/32-bit) in SSA form"... which are not
particularly good.
In this commit and in Ken's, all of the shader-db shaders hurt for
spills and fills are from Deus Ex Mankind Divided. Each shader has a
bunch of texture instructions with a single fsign between the
blocks. With the dependency on the flag removed, the scheduler puts all
of the texture instructions at the start... and there are a LOT of them.
shader-db:
All Intel platforms had similar results. (Meteor Lake shown)
total instructions in shared programs: 19647060 -> 19650207 (0.02%)
instructions in affected programs: 734718 -> 737865 (0.43%)
helped: 382 / HURT: 1984
total cycles in shared programs: 823238442 -> 822785913 (-0.05%)
cycles in affected programs: 426901157 -> 426448628 (-0.11%)
helped: 3408 / HURT: 3671
total spills in shared programs: 3887 -> 3891 (0.10%)
spills in affected programs: 256 -> 260 (1.56%)
helped: 0 / HURT: 4
total fills in shared programs: 3236 -> 3306 (2.16%)
fills in affected programs: 882 -> 952 (7.94%)
helped: 0 / HURT: 12
LOST: 37
GAINED: 34
fossil-db:
DG2 and Meteor Lake had similar results. (Meteor Lake shown)
Totals:
Instrs: 154005469 -> 154008294 (+0.00%); split: -0.00%, +0.00%
Cycle count: 17551859277 -> 17554293955 (+0.01%); split: -0.02%, +0.04%
Spill count: 142078 -> 142090 (+0.01%)
Fill count: 266761 -> 266729 (-0.01%); split: -0.02%, +0.01%
Max live registers: 32593578 -> 32593858 (+0.00%)
Max dispatch width: 5535944 -> 5536816 (+0.02%); split: +0.02%, -0.01%
Totals from 5867 (0.93% of 631350) affected shaders:
Instrs: 5475544 -> 5478369 (+0.05%); split: -0.04%, +0.09%
Cycle count: 1649032029 -> 1651466707 (+0.15%); split: -0.24%, +0.39%
Spill count: 26411 -> 26423 (+0.05%)
Fill count: 57364 -> 57332 (-0.06%); split: -0.10%, +0.04%
Max live registers: 431561 -> 431841 (+0.06%)
Max dispatch width: 49784 -> 50656 (+1.75%); split: +2.38%, -0.63%
Tiger Lake
Totals:
Instrs: 149530671 -> 149533588 (+0.00%); split: -0.00%, +0.00%
Cycle count: 15261418953 -> 15264764921 (+0.02%); split: -0.00%, +0.03%
Spill count: 60317 -> 60316 (-0.00%); split: -0.02%, +0.01%
Max live registers: 32249201 -> 32249464 (+0.00%)
Max dispatch width: 5540608 -> 5540584 (-0.00%)
Totals from 5862 (0.93% of 630309) affected shaders:
Instrs: 4740800 -> 4743717 (+0.06%); split: -0.04%, +0.10%
Cycle count: 566531248 -> 569877216 (+0.59%); split: -0.13%, +0.72%
Spill count: 11709 -> 11708 (-0.01%); split: -0.09%, +0.08%
Max live registers: 424560 -> 424823 (+0.06%)
Max dispatch width: 50304 -> 50280 (-0.05%)
Ice Lake
Totals:
Instrs: 150499705 -> 150502608 (+0.00%); split: -0.00%, +0.00%
Cycle count: 15105629116 -> 15105425880 (-0.00%); split: -0.00%, +0.00%
Spill count: 60087 -> 60090 (+0.00%)
Fill count: 100542 -> 100541 (-0.00%); split: -0.00%, +0.00%
Max live registers: 32605215 -> 32605495 (+0.00%)
Max dispatch width: 5617752 -> 5617792 (+0.00%); split: +0.00%, -0.00%
Totals from 5882 (0.93% of 634934) affected shaders:
Instrs: 4737206 -> 4740109 (+0.06%); split: -0.04%, +0.10%
Cycle count: 598882104 -> 598678868 (-0.03%); split: -0.08%, +0.05%
Spill count: 10278 -> 10281 (+0.03%)
Fill count: 22504 -> 22503 (-0.00%); split: -0.01%, +0.01%
Max live registers: 424184 -> 424464 (+0.07%)
Max dispatch width: 50216 -> 50256 (+0.08%); split: +0.25%, -0.18%
Skylake
Totals:
Instrs: 139092612 -> 139095257 (+0.00%); split: -0.00%, +0.00%
Cycle count: 14533550285 -> 14533544716 (-0.00%); split: -0.00%, +0.00%
Spill count: 58176 -> 58172 (-0.01%)
Fill count: 95877 -> 95796 (-0.08%)
Max live registers: 31924594 -> 31924874 (+0.00%)
Max dispatch width: 5484568 -> 5484552 (-0.00%); split: +0.00%, -0.00%
Totals from 5789 (0.93% of 625512) affected shaders:
Instrs: 4481987 -> 4484632 (+0.06%); split: -0.04%, +0.10%
Cycle count: 578310124 -> 578304555 (-0.00%); split: -0.05%, +0.05%
Spill count: 9248 -> 9244 (-0.04%)
Fill count: 19677 -> 19596 (-0.41%)
Max live registers: 415340 -> 415620 (+0.07%)
Max dispatch width: 49720 -> 49704 (-0.03%); split: +0.10%, -0.13%
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095 >
2024-05-14 01:28:20 +00:00
Ian Romanick
cd343fb9ac
intel/brw: Add support for fcsel opcodes
...
Don't enable nir_opt_algebraic to generate these opcodes yet.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095 >
2024-05-14 01:28:20 +00:00
Ian Romanick
d51ad9f4e0
intel/brw: Use fs_inst::resize_sources in brw_fs_opt_algebraic
...
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095 >
2024-05-14 01:28:20 +00:00
Ian Romanick
11c6b6c102
intel/elk: Remove dsign optimization
...
This bit from the comment should have been a big red flag:
There are currently zero instances of fsign(double(x))*IMM in
shader-db or any test suite, so it is hard to care at this time.
The implementation of that path was incorrect. The XOR instructions
should be predicated like the OR instruction in the non-multiplication
path. As a result, dsign(zero_value) * x will not produce the correct
result.
Instead of fixing this code that is never exercised by anything, replace
it with the simple lowering in NIR.
Ironically, the vec4 implementation is correct. The odds of encountering
an application that is performace limited by dsign performance in vertex
processing stages on Ivy Bridge or Haswell is infinitesimal.
No shader-db changes on any Intel platform.
v2: Delete 's' in emit_fsign as it is now unused.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org > [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095 >
2024-05-14 01:28:20 +00:00
Ian Romanick
ded8690336
intel/brw: Remove dsign optimization
...
This bit from the comment should have been a big red flag:
There are currently zero instances of fsign(double(x))*IMM in
shader-db or any test suite, so it is hard to care at this time.
The implementation of that path was incorrect. The XOR instructions
should be predicated like the OR instruction in the non-multiplication
path. As a result, dsign(zero_value) * x will not produce the correct
result.
Instead of fixing this code that is never exercised by anything, replace
it with the simple lowering in NIR.
No shader-db or fossil-db changes on any Intel platform.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095 >
2024-05-14 01:28:20 +00:00
Mary Guillemard
fa9fb239b7
docs/features: Add EXT_conservative_rasterization for NVK
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28937 >
2024-05-14 00:03:36 +00:00
Mary Guillemard
db2f2ee078
nvk, nak: Wire up conservative rasterization underestimate
...
bit 611 in SPH actually control underestimate, let's wire that and
expose it.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28937 >
2024-05-14 00:03:36 +00:00
Arthur Huillet
715f2f1425
nvk: implement VK_EXT_conservative_rasterization
...
This change is built on top of work originally done by Benjamin Lee.
Implement conservative rasterization on GPUs that support it. This is done
through a MME method on pre-Volta, and through SET_CONSERVATIVE_RASTER* (newly
published) on more recent GPUs.
primitiveUnderestimation and fullyCoveredFragmentShaderInputVariable will be
supported later as they require SPH and compiler work.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9627
Signed-off-by: Arthur Huillet <ahuillet@nvidia.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28937 >
2024-05-14 00:03:36 +00:00
Benjamin Lee
4dd97b1d72
vk/graphics_state: Add last bits for extraPrimitiveOverestimationSize
...
A couple pieces were missed when this was originally added in
b172fd62f5 . Without this, NVK doesn't
pick up the value of extraPrimitiveOverestimationSize in 'dyn->rs'.
Signed-off-by: Benjamin Lee <benjamin@computer.surgery >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28937 >
2024-05-14 00:03:36 +00:00
Arthur Huillet
a875598d9e
nvk: update 3d classes for conservative raster
...
Signed-off-by: Arthur Huillet <ahuillet@nvidia.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28937 >
2024-05-14 00:03:36 +00:00
Mike Blumenkrantz
11448823b9
ci: bump VVL to snapshot-2024wk19
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29166 >
2024-05-13 23:23:24 +00:00
David Heidelberg
891730ac0b
ci/panfrost: disable G52 until machines gets fixed
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29181 >
2024-05-13 22:59:30 +00:00
Valentine Burley
04f945d6c3
docs: Update VK_EXT_legacy_vertex_attributes entries
...
VK_EXT_legacy_vertex_attributes was enabled for both Anv and Turnip
but this never fully made its way to the docs.
Fixes: 8c1cc405d3 ("anv: VK_EXT_legacy_vertex_attributes")
Fixes: 660a47ecbf ("tu: support VK_EXT_legacy_vertex_attributes")
Signed-off-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29176 >
2024-05-13 22:51:41 +00:00
David Heidelberg
3d5ad071bf
freedreno/ci: re-enable a306_piglit
...
Updated fails list.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29155 >
2024-05-13 22:21:55 +00:00
David Heidelberg
fed2c9df01
freedreno/ci: switch a306 to weston
...
Haven't noted any functional difference.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29155 >
2024-05-13 22:21:55 +00:00
David Heidelberg
f6652d55da
freedreno/ci: do not depend on single job rules for another jobs
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29155 >
2024-05-13 22:21:55 +00:00
David Heidelberg
8cf60b4da7
freedreno/ci: Switch a306_* to deqp-runner
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29155 >
2024-05-13 22:21:55 +00:00
David Heidelberg
d9a0373a65
freedreno/ci: move the disabled jobs from include to the main file
...
Accidentally moved.
Fixes: 9442571664 ("ci: separate hiden jobs to -inc.yml files")
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29155 >
2024-05-13 22:21:55 +00:00
David Heidelberg
e0f44f817d
freedreno/ci: move platform to the deqp toml file for a530
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29155 >
2024-05-13 22:21:55 +00:00
Rob Clark
312150f524
freedreno/ci: Switch a618_piglit to deqp-runner
...
Better match a630_piglit, and lets us share a common skips file in
follow-up commit.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29155 >
2024-05-13 22:21:55 +00:00
Yiwei Zhang
758b639d1b
venus: drop the workaround for excessive dma-buf import oom on turnip
...
This reverts commit fdc21a95aa .
No longer needed per prior commit.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29173 >
2024-05-13 21:58:37 +00:00
Yiwei Zhang
a1392394ba
turnip: msm: fix racy gem close for re-imported dma-buf
...
For dma-buf, if the import and finish occur back-2-back for the same
dma-buf, zombie vma cleanup will unexpectedly close the re-imported
dma-buf gem handle. This change fixes it by trying to resurrect from
zombie vmas on the dma-buf import path.
Fixes: 63904240f2 ("tu: Re-enable bufferDeviceAddressCaptureReplay")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29173 >
2024-05-13 21:58:37 +00:00
Yiwei Zhang
3909803849
turnip: msm: clean up iova on error path
...
Fixes: e23c4fbd9b ("tu: Switch to userspace iova allocations if kernel supports it")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29173 >
2024-05-13 21:58:37 +00:00
Georg Lehmann
80b8bbf0c5
aco/gfx11: use v_swap_b16
...
I tested that v_swap_b16 can be encoded as VOP3, because the ISA doc doesn't list
it as a possible VOP3 opcode. VOP3 is nessecary to access v128+.
Foz-DB Navi31:
Totals from 32 (0.04% of 79395) affected shaders:
Instrs: 201865 -> 195168 (-3.32%)
CodeSize: 1082220 -> 1031228 (-4.71%); split: -4.71%, +0.00%
Latency: 2258198 -> 2238586 (-0.87%)
InvThroughput: 796731 -> 788934 (-0.98%)
Copies: 34514 -> 29220 (-15.34%)
VALU: 122457 -> 117163 (-4.32%)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29143 >
2024-05-13 18:42:19 +00:00
Eric Engestrom
5803a40e2f
radeonsi/ci: document new crash (assert)
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29168 >
2024-05-13 18:23:35 +00:00
Rhys Perry
38cbc3c605
radv: advertise VK_EXT_legacy_vertex_attributes
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11094
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29071 >
2024-05-13 17:22:27 +00:00
Rhys Perry
6ddd675168
aco/util: improve small_vec assertion
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29071 >
2024-05-13 17:22:26 +00:00
Rhys Perry
869253b66c
aco: support VS prologs with unaligned access
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29071 >
2024-05-13 17:22:26 +00:00
Rhys Perry
9ec2fa392f
aco: copy VS prolog constants after loads
...
This way, the loads start earlier.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29071 >
2024-05-13 17:22:26 +00:00
Rhys Perry
46b8ba8154
aco: form hard clauses in VS prologs
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29071 >
2024-05-13 17:22:26 +00:00
Rhys Perry
d48c8905f1
radv: keep track of unaligned dynamic vertex access
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29071 >
2024-05-13 17:22:26 +00:00
Samuel Pitoiset
62b4e9a779
radv: simplify radv_emit_hw_gs() slightly
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29132 >
2024-05-13 16:10:20 +00:00
Samuel Pitoiset
bdefab362c
radv: simplify radv_emit_hw_vs() slightly
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29132 >
2024-05-13 16:10:20 +00:00
Samuel Pitoiset
5572a83b00
radv: simplify radv_emit_hw_ngg() slightly
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29132 >
2024-05-13 16:10:20 +00:00
Samuel Pitoiset
dd3ae170a7
radv: do not emit VGT_GS_OUT_PRIM_TYPE to ctx_cs on GFX11
...
Missed that one but it doesn't cause any context rolls.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29132 >
2024-05-13 16:10:20 +00:00
Samuel Pitoiset
f228e7ed2d
radv: remove gfx10_emit_ge_pc_alloc()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29132 >
2024-05-13 16:10:20 +00:00
Patrick Lerda
df39994d51
clover: fix memory leak related to optimize
...
Indeed, the object returned by LLVMCreatePassBuilderOptions()
was not freed.
For instance, this issue is triggered with "piglit/bin/cl-api-build-program":
Direct leak of 32 byte(s) in 1 object(s) allocated from:
#0 0x7f6b15abdf57 in operator new(unsigned long) (/usr/lib64/libasan.so.6+0xb2f57)
#1 0x7f6afff6529e in LLVMCreatePassBuilderOptions llvm-18.1.5/lib/Passes/PassBuilderBindings.cpp:83
#2 0x7f6b1186ee41 in optimize ../src/gallium/frontends/clover/llvm/invocation.cpp:521
#3 0x7f6b1186ee41 in clover::llvm::link_program(std::vector<clover::binary, std::allocator<clover::binary> > const&, clover::device const&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> > const&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >&) ../src/gallium/frontends/clover/llvm/invocation.cpp:554
#4 0x7f6b1150ce67 in link_program ../src/gallium/frontends/clover/core/compiler.hpp:78
#5 0x7f6b1150ce67 in clover::program::link(clover::ref_vector<clover::device> const&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> > const&, clover::ref_vector<clover::program> const&) ../src/gallium/frontends/clover/core/program.cpp:78
#6 0x7f6b11401a2b in clBuildProgram ../src/gallium/frontends/clover/api/program.cpp:283
Fixes: 2d4fe5f229 ("clover/llvm: move to modern pass manager.")
Signed-off-by: Patrick Lerda <patrick9876@free.fr >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29164 >
2024-05-13 15:47:55 +00:00
Juan A. Suarez Romero
28eb1b1eaf
vc4: use IO semantics for location
...
Use IO semantics to find the locations instead of more complex ways.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29133 >
2024-05-13 14:35:46 +00:00
Juan A. Suarez Romero
aefe237e47
.gitignore: add .cache folder
...
This is created with Emacs + LSP.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29100 >
2024-05-13 14:32:12 +00:00
Danylo Piliaiev
7eb6123e98
tu/a750: Disable HW binning when there is GS
...
Blob doesn't use hw binning with GS on all a6xx and a7xx, however
in Turnip it worked without issues until a750. On a750 there are CTS
failures when e.g. dEQP-VK.subgroups.arithmetic.framebuffer.* in
parallel with "forcebin". It is exacerbated by using "syncdraw".
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29074 >
2024-05-13 13:50:53 +00:00
Sergi Blanch Torne
1ed874b5ef
Revert "ci: disable Collabora's farm due to maintance"
...
This reverts commit e154f90aa9 .
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29157 >
2024-05-13 15:02:49 +02:00
Samuel Pitoiset
8b85c58429
radeonsi: remove the _unused parameter in all radeon_xxx macros
...
I plan to re-use all these macros in RADV, mostly for GFX11 paired
packets and for GFX12.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29130 >
2024-05-13 12:24:18 +00:00
Juan A. Suarez Romero
5272a813f2
vc4: use tlb_color_brcm intrinsic
...
Instead of hacking the load_input to read the TLB color, let's use the
intrinsic created for originally for V3D.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29119 >
2024-05-13 10:44:17 +00:00
Juan A. Suarez Romero
87cd11ecd2
nir,v3d: rename tlb_color_v3d intrinsic
...
As this is intended to be used also by VC4, change the suffix to
something more convenient, like tlb_color_brcm.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29119 >
2024-05-13 10:44:17 +00:00
Eric Engestrom
3ab023edee
Revert "ci: fail pipeline for users who got access to restricted traces"
...
Both new rules turn out to be causing issues, effectively making
every pipeline run everything, which is causing job failures and
pipeline timeouts when trying to merge MRs.
This reverts commit 754ad73b8b .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29159 >
2024-05-13 10:03:42 +00:00
Corentin Noël
985ee5441a
ci: Allow to override the virglrenderer render server
...
Allows this script to be used in virglrenderer CI with the actual server from
virglrenderer built from top of tree.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29158 >
2024-05-13 09:15:37 +00:00
Romain Naour
02ab51a61e
glxext: don't try zink if not enabled in mesa
...
Commit 7d9ea77b45 ("glx: add automatic zink fallback loading between hw and sw drivers")
added an automatic zink fallback even when the zink gallium is not
enabled at build time.
It leads to unexpected error log while loading drisw driver and
zink is not installed on the rootfs:
MESA-LOADER: failed to open zink: /usr/lib/dri/zink_dri.so
Fixes: 7d9ea77b45 ("glx: add automatic zink fallback loading between hw and sw drivers")
Signed-off-by: Romain Naour <romain.naour@smile.fr >
Reviewed-by: Antoine Coutant <antoine.coutant@smile.fr >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27478 >
2024-05-13 08:34:57 +00:00
Antoine Coutant
3163b65ba7
drisw: fix build without dri3
...
commit 1887368df4 ("glx/sw: check for modifier support in the kopper path")
added dri3_priv.h header and dri3_check_multibuffer() function in drisw that
can be build without dri3.
Commit 4477139ec2 added a guard around dri3_check_multibuffer()
function but not around dri3_priv.h header.
Add HAVE_DRI3 guard around dri3_priv.h header.
Fixes: 1887368df4 ("glx/sw: check for modifier support in the kopper path")
v2: Remove the guard around dri3_check_multibuffer() function.
Signed-off-by: Romain Naour <romain.naour@smile.fr >
Signed-off-by: Antoine Coutant <antoine.coutant@smile.fr >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27478 >
2024-05-13 08:34:57 +00:00
Sergi Blanch Torne
e154f90aa9
ci: disable Collabora's farm due to maintance
...
Planned downtime in the farm:
* Start: 2024-05-13 07:00 UTC
* End: 2024-05-13 13:00 UTC
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29015 >
2024-05-13 09:14:10 +02:00
Mike Blumenkrantz
63e17ccc0a
zink: rework sparse semaphore waits
...
previously this reused the swapchain acquire array to add wait
semaphores, but doing so failed to synchronize between successive
API commits
instead, track a single wait semaphore on the batch which can be
updated/reused across all sparse operations, though this has the
unfortunate side effect of synchronizing sparse binds for unrelated
resources
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10137
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29152 >
2024-05-13 00:07:51 +00:00
Mike Blumenkrantz
f339f1e7ad
zink: stop leaking sparse semaphores
...
when a single API commit yields multiple internal commits, the intermediate
semaphores were getting leaked
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29152 >
2024-05-13 00:07:51 +00:00
Mike Blumenkrantz
723ac0cb59
zink: add a batch array for tracked semaphores
...
these are semaphores which are not submitted for any reason but must
be tracked for lifetime management
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29152 >
2024-05-13 00:07:51 +00:00
Mike Blumenkrantz
604573cf0a
zink: clean up semaphore arrays on batch state destroy
...
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29152 >
2024-05-13 00:07:51 +00:00
Mike Blumenkrantz
5c8a7e3ca5
zink: refcount miptails
...
according to spec, the miptail should only be uncommited if there are
no remaining commited regions
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10139
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29152 >
2024-05-13 00:07:51 +00:00
Mike Blumenkrantz
3a728bed23
zink: always commit full miptails
...
while the non-SINGLE_MIPTAIL case allows commiting separate layers for
a miptail, the GL spec always treats the miptail as a single unit, so
utilizing this functionality just leads to desync when trying to follow
the GL spec
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29152 >
2024-05-13 00:07:51 +00:00
Mike Blumenkrantz
920e2a5219
zink: use u_minify for sparse calcs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29152 >
2024-05-13 00:07:50 +00:00
David Heidelberg
1232bcc470
etnaviv: migrate from piglit include to generic deqp and toml spec
...
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29150 >
2024-05-12 16:12:52 -07:00
Konstantin Seurer
406dda70e7
radv: Zero initialize capture replay group handles
...
radv_serialized_shader_arena_block is not tightly packed and using an
initializer list leaves the gaps uninitialized.
cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28961 >
2024-05-12 10:28:27 +00:00
Konstantin Seurer
df82221bb3
radv: Remove arenas from capture_replay_arena_vas
...
Avoids an use after free when looking up an arena.
cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28961 >
2024-05-12 10:28:27 +00:00
Konstantin Seurer
e050abc961
radv: Fix radv_shader_arena_block list corruption
...
Remove it from the previous list befor adding it to a new one.
cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28961 >
2024-05-12 10:28:27 +00:00
Tatsuyuki Ishi
e21ea25de9
radv: Remove radv_queue::device again
...
It was mistakenly revived.
Fixes: 0fb19b8331 ("radv: add radv_queue.h")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29151 >
2024-05-12 09:58:22 +00:00
Bas Nieuwenhuizen
79cb884275
radv: Use zerovram for Enshrouded.
...
Two users now reporting that zerovram fixes hangs.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10500
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29149 >
2024-05-12 09:13:01 +00:00
Ruijing Dong
e28195bf4b
radeonsi/vcn: enable decoding in vcn5.
...
Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
OA#
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Ruijing Dong
f9441cdb8e
radeonsi/vcn: add hevc support for vcn5
...
adding hevc encoding support for vcn5.
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Ruijing Dong
04d6b46d2d
radeonsi/vcn: add vcn5.0 for h264 enc only
...
add h264 encoding for vcn5.0
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com >
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Ruijing Dong
52f0d5b96d
radeonsi/vcn: add vcn5 encoding interface change
...
add vcn5 encoding interface change and correct some
variable name typo in vcn4.
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
f703dfd1bb
radeonsi: add gfx12
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
c8ad0f0715
ac/surface/tests: add gfx12 tests
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
d22564d29c
ac/surface: add gfx12
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
686e5a03f5
ac/llvm: add a workaround for nir_intrinsic_load_constant for LLVM on gfx12
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
546465e1ba
ac/llvm: implement nir_intrinsic_ordered_xfb_counter_add_gfx12_amd
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
5d94ec9ec4
ac/llvm: handle nir_atomic_op_ordered_add_gfx12_amd
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
2a7302f601
ac/nir: add gfx12 streamout NIR code
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
542c7ee75f
ac/nir: add ac_nir_sleep and handle the intrinsics
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
af9f04ad59
ac/llvm: update inline assembly for buffer_load_format_xyzw with TFE for gfx12
...
Only the scope and the temporal hint are new.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
9d33e66ad6
ac/llvm: add CS SGPR changes for gfx12
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
0356209543
ac/llvm: add new cache flags for gfx12
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:06 -04:00
Marek Olšák
a6c46509cc
ac/llvm: use new s_wait instructions and split the existing ones for gfx12
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:05 -04:00
Marek Olšák
12bca6123a
ac/nir,llvm: add GS VGPR changes for gfx12
...
See the big comment.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:05 -04:00
Marek Olšák
4e1abe5d8c
ac/nir: update ac_nir_lower_resinfo for gfx12
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:05 -04:00
Marek Olšák
2adc66e586
amd: add initial common code for gfx12
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:05 -04:00
Marek Olšák
58a5de5c34
amd: add gfx12 register definitions into the register header generator
...
The generator renamed some definitions to resolve conflicts.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:05 -04:00
Marek Olšák
724b6d667c
amd: add gfx12 register definitions
...
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:05 -04:00
Marek Olšák
ff47395757
amd: import gfx12 addrlib
...
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:05 -04:00
Marek Olšák
3d8addb073
drm-uapi: update amdgpu_drm.h and drm_fourcc.h for gfx12
...
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:05 -04:00
David Heidelberg
74ea0d006e
mailmap: add Freya Gentz entry
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9989 >
2024-05-11 19:43:47 +00:00
Robert Mader
8a02ca1b2e
egl/x11: Allow all RGB visuals to match 32-bit RGBA EGLConfigs
...
Drop the limitation to 24 or 30 bit configs. It was an abritrary
compromise to usually give apps what they wanted, but now we are about
to get a clean solution for alpha-blending on X11.
Based on a patch by Freya Gentz <zegentzy@protonmail.com >, see
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2376
Signed-off-by: Robert Mader <robert.mader@posteo.de >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9989 >
2024-05-11 19:43:47 +00:00
Robert Mader
9bdab38424
egl: Implement EGL_MESA_x11_native_visual_id
...
EGL 1.5 specification requires to not match on EGL_NATIVE_VISUAL_ID.
EGL_MESA_x11_native_visual_id extension allows us to remove this
restriction for X11, where we need to match EGL_NATIVE_VISUAL_ID to find
visuals which allow blending.
The reasoning is that on X11, compositors use the visual as "magic bit"
to decide whether to alpha-blend surface contents.
Unlike on most (all?) other windowing systems, requesting an alpha channel
for the config alone does not already imply blending on the compositor
level.
Thus, in order to allow clients to explicitly request configs with
"magic bit" and, similar to GLX, to order configs in a way so clients
not requesting alpha-blending do not get it by accident, do match
visual ids.
Note that one consequence of this is that more configs get
reported to clients.
Based on a patch by Freya Gentz <zegentzy@protonmail.com >, see
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2376
Signed-off-by: Robert Mader <robert.mader@posteo.de >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9989 >
2024-05-11 19:43:47 +00:00
David Heidelberg
3736c9997c
egl/x11: Move RGBA visuals in the second config selection group
...
This ensures that alpha-blended windows are at the bottom of the visuals
list, so they don't get picked up accidentally.
Based on: "egl-X11: Put RGBA visuals in the second config selection group"
Suggested-by: Freya Gentz <zegentzy@protonmail.com > # original concept
Co-authored-by: Robert Mader <robert.mader@posteo.de >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9989 >
2024-05-11 19:43:47 +00:00
Robert Mader
0d90415625
egl: Implement EGL_EXT_config_select_group
...
It allows us to influence the order of EGL configs for arbitrary
reasons, which will be used in the following commit.
Based on a patch by Freya Gentz <zegentzy@protonmail.com >, see
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2376
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Adam Jackson <ajax@redhat.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Signed-off-by: Robert Mader <robert.mader@posteo.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9989 >
2024-05-11 19:43:47 +00:00
Dr. David Alan Gilbert
8b6b327d1b
treewide: Cleanup unused structs
...
vk/wsi: Remove unused struct 'wsi_headless_format'
'wsi_headless_format' appears unused, and seems
to have been since initial commit.
radv: Remove unused struct 'blit_region'
'blit_region' appears unused, I think since initial commit.
r600: Remove unused structs
'eg_interp' and 'r600_shader_src' are unused.
I think they are just leftovers from the cleanup
in 20e6c31ba6 .
i915: Remove unused struct 'i915_tracked_hw_state'
'i915_tracked_hw_state' appears unused. I think it's just
a leftover from 179cb58795 .
llvmpipe: Remove unused struct 'linear_interp'
'linear_interp' doesn't ever seem to have been used.
radeonsi: Remove unused struct 'texture_orig_info'
'texture_orig_info' seems unused, I think since 46b2b3bda8 .
svga: Remove unused struct 'svga_3d_invalidate_gb_image'
'svga_3d_invalidate_gb_image' appears unused since 1942c06f9c .
Remove it.
nir: Remove unused struct 'split_struct_state'
'split_struct_state' looks unused since the original commit.
Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29105 >
2024-05-11 17:30:59 +00:00
David Heidelberg
9f42a34625
ci/deqp: correct EGL_EXT_config_select_group detection
...
It's now a display extension, not an client one.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29145 >
2024-05-11 16:39:57 +00:00
Jordan Petridis
671c646a0d
Revert "ci: mark microsoft farm as offline"
...
This reverts commit 45edd99b6b .
Issues should be resolved now
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29134 >
2024-05-11 04:51:41 +00:00
Faith Ekstrand
4842bbb200
nouveau/headers: Add a bool for whether or not to dump offsets
...
It's occasionally useful to shut them off.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29147 >
2024-05-11 04:34:15 +00:00
Faith Ekstrand
99b0117243
nvk: Don't rely on push_dirty for which push sets exist
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29147 >
2024-05-11 04:34:15 +00:00
Faith Ekstrand
53737b9d5b
nvk: Get rid of sets_dirty
...
We're not using it for anything
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29147 >
2024-05-11 04:34:15 +00:00
Faith Ekstrand
c834644c4e
nvk/meta: Restore set_sizes[0]
...
Fixes: af3e7ba105 ("nvk: Stash descriptor set sizes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29147 >
2024-05-11 04:34:15 +00:00
Faith Ekstrand
a160c2a14e
nvk: Re-emit sample locations when rasterization samples changes
...
We need them for the case where explicit sample locations are not
enabled. While we're at it, fix the case where rasterization_samples=0.
This can happen when rasterizer discard is enabled. This fixes MSAA
resolves with NVK+Zink. In particular, it fixes MSAA for the Unigine
Heaven and Valley benchmark.
This also fixes all of the spec@arb_texture_float@multisample-formats
piglit tests.
Fixes: 41d094c2cc ("nvk: Support dynamic state for enabling sample locations")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10786
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29147 >
2024-05-11 04:34:15 +00:00
Mike Blumenkrantz
bc15c95c7a
frontends/dri: always init opencl_func_mutex in InitScreen hooks
...
this otherwise leads to a mismatch where some types of screen may have
the mutex initialized while others don't, in which case dri_release_screen()
will attempt to destroy an uninitialized mutex
cc: mesa-stable
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29021 >
2024-05-11 02:40:54 +00:00
Mike Blumenkrantz
a1225e81c9
frontends/dri: only release pipe when screen init fails
...
the caller (driCreateNewScreen3) will always call dri_destroy_screen()
when these functions return failure, so releasing the screen
is always wrong
cc: mesa-stable
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29021 >
2024-05-11 02:40:54 +00:00
Caio Oliveira
b8dbd64267
intel/brw: Fix commas when dumping instructions
...
Some commas were being skipped, according to history as an attempt
to elide BAD_FILEs, but we still print them, so be consistent. Also
for instructions without any sources, the trailing comma was always
being printed. Fix that too.
Example of instruction output before the change
halt_target(8) (null):UD,
send(8) (mlen: 1) (EOT) (null):UD, 0u, 0u, g126:UD(null):UD NoMask
and after it
halt_target(8) (null):UD
send(8) (mlen: 1) (EOT) (null):UD, 0u, 0u, g126:UD, (null):UD NoMask
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29114 >
2024-05-11 02:17:57 +00:00
Caio Oliveira
c9fe20fdf1
intel/brw: Use vNN instead of vgrfNN when printing instructions
...
Reduce the noise in the shader dump output.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29114 >
2024-05-11 02:17:56 +00:00
Caio Oliveira
3a081106b0
intel/brw: Hide register pressure information in dumps
...
It was the default to show register pressure for each instruction,
but it gets in the way of cleaner diffs before/after an optimization pass.
Add INTEL_DEBUG=reg-pressure option to show it again.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29114 >
2024-05-11 02:17:56 +00:00
Caio Oliveira
866b1245e9
intel/brw: Don't print IP as part of the dump
...
The sequential IP cause noise when diffing before/after a pass that
either add or remove instructions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29114 >
2024-05-11 02:17:56 +00:00
Lionel Landwerlin
fd47f90d37
brw: drop dependency on libintel_common
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11136
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29128 >
2024-05-11 01:52:01 +00:00
Lionel Landwerlin
36c043e2eb
intel: move debug identifier out of libintel_dev
...
The debug identifier is put into the captured buffers for error
capture. This helps us figure out what version of the driver people
are running when encountering a GPU hang. This identifier has the
git-sha1 + driver name.
libintel_dev is also a dependency of the compiler so any change to the
git-sha1 also triggers recompile which we want to avoid.
This changes moves the debug identifier to src/intel/common which
drivers already depend on, so the compiler is not affected anymore.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11136
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29128 >
2024-05-11 01:52:01 +00:00
Mike Blumenkrantz
4882f49e6b
zink: don't submit main cmdbuf if has_work is not set
...
this should avoid submitting empty cmdbufs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
0a24b8f9a3
zink: stop flagging has_work on batch tracking
...
this used to be a lazy workaround, but now it can actually mean something
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
74f572b28f
zink: flag has_work in a few more places
...
it's unlikely that any of these would be hit without first triggering
a has_work elsewhere, but this makes it more obvious
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
8f687f2a46
zink: rely on zink_get_cmdbuf() to set has_work flags
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
b9ec12d439
zink: check all has_work flags for flushes
...
not sure this actually changes anything right now
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
06abe4399d
zink: reset all the has_work flags in the same place
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
e4c516bece
zink: zink_batch_state::has_barriers -> has_reordered_work
...
and add a note
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
ac07fefdda
zink: delete zink_batch
...
this makes the code a bit more ergonomic
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
40f595b30c
zink: remove all zink_batch usage from zink_context.c
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
91969dfa5a
zink: remove all zink_batch usage from zink_render_pass.c
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
05ba13ed18
zink: remove all zink_batch usage from zink_draw.cpp
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
bdb4860c10
zink: remove all zink_batch usage from zink_resource.h
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
0d8d90d577
zink: remove all uses of zink_batch from zink_batch.c
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
4adfb03f5b
zink: remove zink_batch usage from zink_clear.c
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
efa8ce29a4
zink: delete all zink_batch uses from zink_query.c
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
e27018dc79
zink: rename zink_batch::state -> zink_batch::bs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
107bf9ec7c
zink: move swapchain from zink_batch to zink_context
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
2837cf9dde
zink: move work_count from zink_batch to zink_context
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
8eacafaccc
zink: move last_work_was_compute from zink_batch to zink_context
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
fb6828a9a1
zink: rename last_was_compute -> last_work_was_compute
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
d157b89bee
zink: move has_work from zink_batch to zink_batch_state
...
no functional state
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
c8026f01bc
zink: move ref_lock from zink_batch to zink_batch_state
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
f8876a0533
zink: move in_rp to zink_context
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
c85fc875d9
zink: delete unused zink_batch struct member
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29108 >
2024-05-11 01:29:44 +00:00
Mike Blumenkrantz
ae8fbe220a
freedreno/replay: use inttypes format string for 64bit
...
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29142 >
2024-05-11 01:09:25 +00:00
Eric Engestrom
654ef35635
zink: avoid designated initializers as they are not supported in C++ < 20
...
error C7555: use of designated initializers requires at least '/std:c++20'
Fixes: 7bdaf6e95f ("zink: use zink_shader_key_optimal unions for pipeline state asserts")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29139 >
2024-05-11 00:08:47 +00:00
Eric Engestrom
320c0b44f4
radv/ci: add navi21 flakes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29141 >
2024-05-10 22:52:35 +00:00
Eric Engestrom
32f2b5d245
llvmpipe: wrap the push/pull in the ifdef as well
...
Fixes: c7634c25e4 ("llvmpipe: Fix build error with clang-18")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29138 >
2024-05-10 21:14:08 +00:00
Eric Engestrom
860b262f44
microsoft/clc: fix incorrect changes that got through while the Windows CI was down
...
Fixes: e80d52223e ("microsoft: Use spirv_capabilities for spirv_to_dxil")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29137 >
2024-05-10 20:52:21 +00:00
José Expósito
18c5315731
meson: Update proc_macro2 meson.build patch
...
Update the proc-macro2/meson.build to include the changes from v1.0.81.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11071
Signed-off-by: José Expósito <jexposit@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28923 >
2024-05-10 20:07:01 +00:00
Lionel Landwerlin
d1c01e256d
brw: add more condition for reducing sampler simdness
...
Running
KHR-GL46.sparse_texture_clamp_tests.SparseTextureClampLookupColor test
with Zink on Anv we run into an assert :
assert(inst->mlen <= MAX_SAMPLER_MESSAGE_SIZE * reg_unit(devinfo));
Turns out we've not covered all the cases in the SIMD lowering.
It's a bit of a shame to have both files reproduce the same logic.
Will try to think of a better way to extract the layout of the a send
message but that'll be a much bigger rework.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29118 >
2024-05-10 19:40:00 +00:00
Alyssa Rosenzweig
e0aa70bd55
dzn: use common stype debug
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29009 >
2024-05-10 18:49:38 +00:00
Alyssa Rosenzweig
90866bc58c
anv,hasvk: use common stype debug
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29009 >
2024-05-10 18:49:38 +00:00
Alyssa Rosenzweig
4c7c80e047
pvr: use common stype debug
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29009 >
2024-05-10 18:49:38 +00:00
Alyssa Rosenzweig
edac80d8a7
broadcom: use common stype debug
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29009 >
2024-05-10 18:49:38 +00:00
Alyssa Rosenzweig
cd6dfd6c2d
nvk: use common stype debug
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29009 >
2024-05-10 18:49:38 +00:00
Alyssa Rosenzweig
9d34c0f705
vulkan: add vk_debug_ignored_stype helper
...
from nvk.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29009 >
2024-05-10 18:49:38 +00:00
Alyssa Rosenzweig
9d5f15abb0
docs: add header-stub for vk_enum_to_str
...
Suppresses fail from test-docs-mr. from the next commit.
Trivial.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29009 >
2024-05-10 18:49:38 +00:00
Alyssa Rosenzweig
3ccf7208a2
nir/lower_robust_access: also handle image derefs
...
for unlowered image intrinsics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28681 >
2024-05-10 17:49:13 +00:00
Alyssa Rosenzweig
fb187c9c89
nir/lower_subgroups: relax ballot_type_to_uint
...
we can generate 32-bit scalar inverse_ballots from the boolean reduce lowering
which will blow up when trying to lower the resulting inverse_ballot with the
common lowering. but the assert can be quieted just fine.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28993 >
2024-05-10 17:00:54 +00:00
Alyssa Rosenzweig
b9a0c8dc6d
nir/lower_subgroups: add generic scan/reduce lower
...
this is the lowering from NAK, fixed up for common code. the existing code is
used for boolean scan/reduce. I make no guarantee that this works for subgroup
sizes other than 32.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28993 >
2024-05-10 17:00:54 +00:00
Alyssa Rosenzweig
8b070c36ec
nir/lower_subgroups: add filter
...
this will be useful for AGX, which has many reductions (but not all) in
hardware with the logic too backend-specific to encode with bitflags.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28993 >
2024-05-10 17:00:54 +00:00
Juan A. Suarez Romero
3990463c48
v3d/vc4/ci: set full renderer version check
...
Include the full expected renderer name, with the version.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27449 >
2024-05-10 15:00:44 +00:00
Eric Engestrom
c0e6a72b00
rpi5/ci: use deqp-runner suite for vk job
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27449 >
2024-05-10 15:00:44 +00:00
Eric Engestrom
993dd0832f
rpi4/ci: use deqp-runner suite for vk job as well
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27449 >
2024-05-10 15:00:44 +00:00
Luc Ma
3825e24085
loader: silence implicit-load zink error by the loader
...
Since commit 7d9ea77b45 ("glx: add automatic zink fallback loading between hw
and sw drivers"), zink could be tried as a fallback. It'd better silence
if the zink loading is implicit and on fail as what commit 4cc975c6e9 ("glx: silence
more implicit-load zink errors") has done. But there seems to be one
left bebind, which is spit when building swrast but no zink with -Dglx=dri.
v2: plumb the flag through from egl/glx to the loader (zmike)
Signed-off-by: Luc Ma <luc@sietium.com >
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28970 >
2024-05-10 14:19:59 +00:00
Eric Engestrom
dc7e80ce85
ci/shader-db: drop extra nesting section
...
`.gitlab-ci/run-shader-db.sh` already prints sections, having an extra one
here just means that nothing is visible by default.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29113 >
2024-05-10 13:02:15 +00:00
Eric Engestrom
d428cc1116
ci/debian-build-testing: drop extra nesting section
...
`.gitlab-ci/meson/build.sh` already prints sections, having an extra one
here just means that nothing is visible by default.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29113 >
2024-05-10 13:02:15 +00:00
Rhys Perry
75532d8687
aco: add wait_imm::unpack and wait_imm::max
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981 >
2024-05-10 11:53:08 +00:00
Rhys Perry
c894c9ab1b
aco/stats: refactor for indexable wait_imm
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981 >
2024-05-10 11:53:08 +00:00
Rhys Perry
f3e461d643
aco/waitcnt: refactor for indexable wait_imm
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981 >
2024-05-10 11:53:08 +00:00
Rhys Perry
ff2e3ef5eb
aco/waitcnt: add target_info
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981 >
2024-05-10 11:53:08 +00:00
Rhys Perry
20b4e30e25
aco: make wait_imm indexable
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981 >
2024-05-10 11:53:08 +00:00
Rhys Perry
5b1b09ad42
aco/waitcnt: fix DS/VMEM ordered writes when mixed
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981 >
2024-05-10 11:53:08 +00:00
Rhys Perry
16eae62f0d
aco/stats: don't use VS counter pre-GFX10
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981 >
2024-05-10 11:53:08 +00:00
Rhys Perry
16a9f6e2a4
aco/stats: fix s_waitcnt parsing
...
This was broken for GFX11 (s_waitcnt encoding changed) and s_waitcnt_vscnt
(waited for vm/lgkm/exp to be 0).
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981 >
2024-05-10 11:53:07 +00:00
Mike Blumenkrantz
cd004defd4
u_blitter: stop leaking saved blitter states on no-op blits
...
drivers expect blitter to clean up after itself
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29122 >
2024-05-10 11:10:55 +00:00
Timothy Arceri
c44e76676b
glsl: use hash table when serializing resource data
...
This helps us avoid a potential huge number of string compares.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11128
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29116 >
2024-05-10 00:47:17 +00:00
Ian Romanick
f6e038fd0f
spirv: Use fp16 fp_fast_math settings when lowering fp16 asin and acos
...
v2: Save and restore fp_fast_math. Suggested by Georg and Ivan.
v3: Add a message to the static_assert.
Fixes: 750bd9757e ("spirv: gather some float controls bits per instruction")
Reviewed-by: Ivan Briano <ivan.briano@intel.com > [v2]
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org > [v2]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29091 >
2024-05-10 00:05:34 +00:00
Mike Blumenkrantz
67a356742f
zink: add a batch ref for committed sparse resources
...
this ensures that the sparse commit will complete before the resource
is destroyed
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29123 >
2024-05-09 23:20:30 +00:00
Alexandre Marquet
ee9809c889
pan/mdg: quirk to disable auto32
...
For some reason, flat shading on T604 does not work when using auto32 varyings
type.
This commit introduces a quirk for T60x, and some plumbing in pan_nir, allowing to
explicitely use appropriate types, rather than always using .u32 for flat shading.
Backport-to: 24.1
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10632
Signed-off-by: Alexandre Marquet <tb@a-marquet.fr >
Reviewed-by: Eric R. Smith <eric.smith@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28146 >
2024-05-09 21:21:32 +00:00
Sathishkumar S
7246f25677
radeonsi/vcn: enable yuv440 jpeg decode
...
jpeg version 2 and higher support yuv440 decode
v2: fix ci error to handle PIPE_VIDEO_CHROMA_FORMAT_440 in switch statement
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28866 >
2024-05-09 20:43:02 +00:00
Sathishkumar S
906f207f9c
frontends/va,gallium/vl: add support for yuv440 format
...
define image and video buffer parameters corresponding to yuv440 format
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28866 >
2024-05-09 20:43:02 +00:00
Sathishkumar S
afd15f481b
util/format: add planar3 y8_u8_v8_440 pipe format
...
add pipe format to represent yuv440 surface
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28866 >
2024-05-09 20:43:02 +00:00
Saroj Kumar
221371e903
mesa: replace shader_info::source_sha1
...
Replace shader_info::source_sha1 with shader_info::source_blake3 in compiler, mesa and radeonsi.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Acked-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28156 >
2024-05-09 20:08:18 +00:00
Saroj Kumar
7c0b0e660a
mesa: Add functions to print blake3
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Acked-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28156 >
2024-05-09 20:08:17 +00:00
Sagar Ghuge
69fc7ee622
intel/disasm: Fix cache load/store disassembly for URB messages
...
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28868 >
2024-05-09 19:45:18 +00:00
Georg Lehmann
925fff229f
zink: use bitcasts instead of pack/unpack double opcodes
...
The pack/unpack double opcodes may flush denorms, and the nir ops are pure
bitcasts.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29125 >
2024-05-09 18:47:33 +02:00
Karol Herbst
146ac5169d
rusticl/icd: remove CLObject
...
I have no idea why I've added it in the first place, but it's causing dead
code warnings to appear with newer rustc versions, so remove it.
Fixes: 7f77f91929 ("rusticl/icd: split Arc part out of CLObject into new trait")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29120 >
2024-05-09 12:37:11 +00:00
Rhys Perry
9d2711fcb8
nir/dead_cf: stop reindexing blocks for each non-block cf node
...
This is faster, especially for large shaders.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29085 >
2024-05-09 09:57:10 +00:00
Daniel Stone
e86a2b0db1
Revert "ci: disable g52"
...
This reverts commit f02310934c .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29117 >
2024-05-09 09:59:11 +01:00
Samuel Pitoiset
43fbbc0732
radv: track and bind more VRS states from the graphics pipeline
...
This doesn't change anything but this will allow us to emit all
graphics shaders from the cmdbuf.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103 >
2024-05-09 08:15:56 +00:00
Samuel Pitoiset
8c17b05615
radv: do not emit non-context registers to radv_pipeline::ctx_cs
...
These registers don't cause context rolls.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103 >
2024-05-09 08:15:56 +00:00
Samuel Pitoiset
24814be08a
radv: stop recomputing the last VGT API stage when emitting graphics shaders
...
The last VGT shader is already set correctly.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103 >
2024-05-09 08:15:56 +00:00
Samuel Pitoiset
6753f981b6
radv: remove unused parameter to radv_pipeline_emit_pm4()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103 >
2024-05-09 08:15:56 +00:00
Juan A. Suarez Romero
920025533e
broadcom/compiler: do not run lowering I/O for FS
...
This lowering is applied only for vertex and geometry shaders. So detect
earlier this situation and do not go ahead with other shader.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29102 >
2024-05-09 07:55:00 +00:00
Iago Toral Quiroga
1545dc94b4
broadcom/compiler: simplify v3d_vir_emit_tex
...
In the past where backends had to deal with nir_register we needed
a specific path for them here because nir_def_components_read only
worked on ssa defs, but now that we got rid of nir_register we
only have nir_def and we don't need to go out of our way to do this
and we can just always use nir_def_components_read.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28978 >
2024-05-09 09:29:44 +02:00
Iago Toral Quiroga
c24a149d2d
broadcom/compiler: don't read excess channels on image loads
...
This is similar to what we do for textures where we program a number
of channels matching the number of componentes actually read by the
shader.
Makes tests like dEQP-VK.image.load_store.with_format.2d.r32_uint
drop from 18 instructions to 14 by emitting a single ldtmu instead
of 4.
From dEQP-VK.image.load_store.*:
total instructions in shared programs: 12681 -> 12093 (-4.64%)
instructions in affected programs: 4866 -> 4278 (-12.08%)
helped: 256
HURT: 0
helped stats (abs) min: 1 max: 4 x̄: 2.30 x̃: 2
helped stats (rel) min: 4.76% max: 25.00% x̄: 12.35% x̃: 11.11%
95% mean confidence interval for instructions value: -2.40 -2.19
95% mean confidence interval for instructions %-change: -12.99% -11.71%
Instructions are helped.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28978 >
2024-05-09 09:29:44 +02:00
Iago Toral Quiroga
cd094f7dbb
broadcom/compiler: fix num_textures for precompiled shaders
...
Some shaders use N textures but not bind these in consecutive
slots, so then we find texture accesses to indices that exceed the
number of textures and we assert crash. This happens with various
shaders from shader-db.
Fix that by looking at the largest binding used in the shader
and using that as the number of textures used.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28978 >
2024-05-09 09:29:44 +02:00
Iago Toral Quiroga
989cfb6035
v3d: fix array_len when precompiling outputs for shader-db
...
Since 68c54c994a glsl_get_length returns the number of
vector elements for vectors, which is not what we want here.
This was causing us to blow up the number of output variables
during shader-db runs, causing all kinds of problems.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28978 >
2024-05-09 09:29:44 +02:00
Iago Toral Quiroga
ae7f20d8d4
broadcom/compiler: assert on array overflow
...
If a shader has too may outputs overflowing the array may
overwrite other pieces of state, which can then be tricky to
debug.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28978 >
2024-05-09 09:29:44 +02:00
Samuel Pitoiset
c6a22dd05c
radv: precompute NGG register values
...
To make emission faster.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29031 >
2024-05-09 06:29:29 +00:00
Samuel Pitoiset
751e5d8bd7
radv: move common registers between VS/GS and NGG
...
For more clarity.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29031 >
2024-05-09 06:29:29 +00:00
Faith Ekstrand
69b0ee7b6c
spirv: Get rid of the old caps struct
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:23 +00:00
Faith Ekstrand
e80d52223e
microsoft: Use spirv_capabilities for spirv_to_dxil
...
Note: This change doesn't actually affect dozen a it uses
vk_shader_module_to_nir() so caps will be exposed based on Vulkan
features rather than the manual table.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:23 +00:00
Faith Ekstrand
3672702be2
ir3: Use spirv_capabilities in ir3_cmdline
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:23 +00:00
Faith Ekstrand
91b62e9868
anv: Use spirv_capabilities for the float64 shader
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:23 +00:00
Faith Ekstrand
25dfaf5ff4
zink: Use the new spirv_capabilities struct
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:23 +00:00
Faith Ekstrand
6dca6809b2
asahi/clc: Use the new spirv_capabilities struct
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:23 +00:00
Faith Ekstrand
9d5b4a4ffd
intel/kernel: Use the new capabilities struct
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:23 +00:00
Faith Ekstrand
ac500495ac
radv: Use vk_physical_device_get_spirv_capabilities()
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:23 +00:00
Faith Ekstrand
ce2946ae0f
vulkan: Set SPIR-V caps from supported features
...
Any drivers which use vk_spirv_to_nir() now no longer need to build a
caps table manually.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:23 +00:00
Alyssa Rosenzweig
1759c0eba7
vulkan: add helper to fill out spirv caps automatically
...
The Vulkan XML tells us exactly which caps are implied by which API versions,
features, extensions, and properties. We just need to parse that and
autogenerate some glue code, that way drivers don't need to track this manually.
This reduces the boilerplate needed when bringing up new features.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
ba11b12a82
rusticl: Use the new spirv_capabilities struct
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
30f209c017
clover: Use the new spirv_capabilities struct
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
22171d16f8
mesa: Use the new spirv_capabilities struct
...
Also, re-organize a bit to match the spec better. There are now
capabilities which need to be set to constant true which we didn't have
to se in the old caps struct and this makes it all more obvious.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
4203d7339c
mesa: Flip the script on SPIR-V extension enabling
...
Instead of populating SPIR-V capabilities from st_extensions.c and then
deriving extensios from caps, we populate SPIR-V extensions from
st_extensions.c and populate caps from a combination of GL extensions,
SPIR-V extensions, and GL limits. This means that the stuff we store in
the context is the actual stuff exposed to the client. This is also
more like how we do things in Vulkan.
Most importantly, however, this means we're no longer storing a struct
spirv_supported_capabilities in the context. Since we're about to
replace it with the auto-generated spirv_capabilities struct, that would
mean mtypes.h is dependent on codegen and mtypes.h is included
everywhere.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
d5f3233a06
spirv: Use spirv_capabilities in tests
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
3d7a465ad4
spirv: Add support for specifying caps through the new struct
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
a7f8555b96
spirv: Check capabilities using the supported_capabilities table
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
5836e2430c
spirv: Add a table of all implemented capabilities
...
This is everything that the SPIR-V parser knows how to handle, not what
the driver supports.
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
c1eaa03904
spirv: Drop the SubgroupUniformControlFlow check
...
It's just a vtn_fail_if() and there's no actual cap for it. It's not
really gaining us much to have the check.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
9ae61a152d
spirv: Use supported_capabilities for various checks
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
29aa6cefcc
spirv: Add supported_capabilities to vtn_builder
...
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
4b3561b14d
spirv: Move the printf enable out of capabilities
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
eed3b56402
spirv: Move the old AMD extensions out of capabilities
...
These aren't real capabilities. They control whether or not we turn on
the extended instruction sets for these instruction types.
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
18df453add
mesa: Stop pretending to support SPV_AMD_gcn_shader in OpenGL
...
Nothing ever sets the cap except RADV so there's no way we'll ever see
it inside OpenGL drivers.
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
1d574dcf19
spirv: Record capabilities rather than ad-hoc bools
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
c07cf9c395
spirv: Generate a spirv_capabilities struct
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
74b17b8d25
spirv: Better handle duplicated enums in the JSON parser
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
182877342f
spirv: Update the JSON and headers
...
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Faith Ekstrand
a09c5d55ed
spirv: Auto-generate spirv_info.h
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iván Briano <ivan.briano@intel.com >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905 >
2024-05-09 01:14:22 +00:00
Rob Clark
c7634c25e4
llvmpipe: Fix build error with clang-18
...
We don't actually care about the truncation, so tell clang to stfu.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10973
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29110 >
2024-05-08 23:54:09 +00:00
Mike Blumenkrantz
568807cf88
egl/x11: disable dri3 with LIBGL_KOPPER_DRI2=1 as expected
...
cc: mesa-stable
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29106 >
2024-05-08 23:24:45 +00:00
Lionel Landwerlin
28a0f98123
intel/tools: add README file
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27594 >
2024-05-08 22:50:47 +00:00
Tvrtko Ursulin
bab52763f4
intel/hang_replay: fix batch address
...
Also capture all buffers so that we can compare replay run with the
original error state.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27594 >
2024-05-08 22:50:47 +00:00
Lionel Landwerlin
a9f1151de2
intel/hang_replay: use hw image param
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27594 >
2024-05-08 22:50:47 +00:00
Lionel Landwerlin
4d69870071
intel/hang_replay: use newer API of i915 execbuffer
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27594 >
2024-05-08 22:50:47 +00:00
Karol Herbst
a45f199086
rusticl/event: use Weak refs for dependencies
...
This fixes a potential stack overflow when the dep chain of events gets
too long and droped all at the same time.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29089 >
2024-05-08 22:15:54 +00:00
Lionel Landwerlin
665cad6408
anv: fix ycbcr plane indexing with indirect descriptors
...
We need to add the plane index to compute the address from which to
load the descriptor (anv_sampled_image_descriptor in this case).
This was likely broken before we added direct descriptor support so
that gets a stable backport.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11125
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29111 >
2024-05-08 21:51:49 +00:00
David Heidelberg
ce5863bee4
ci/traces: majanes has no longer access to the restricted traces
...
Remove him from the list of users with access in the MesaCI.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23674 >
2024-05-08 21:10:30 +00:00
David Heidelberg
754ad73b8b
ci: fail pipeline for users who got access to restricted traces
...
Broken trace is easier to ignore. Make it a bit harder.
Acked-by: Rob Clark <robdclark@chromium.org >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23674 >
2024-05-08 21:10:30 +00:00
Eric Engestrom
92cac2fe5d
docs: update calendar for 24.1.0-rc3
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29112 >
2024-05-08 20:57:03 +00:00
Yiwei Zhang
423ba5d1c7
meson: disallow Venus debug + LTO build via GCC
...
This is likely a GCC issue per below (always succeed with clang):
|with gcc |optimization |-Db_lto=true|
|- |- |- |
|-Dbuildtype=plain |plain (default)|fail |
|-Dbuildtype=debug |0 (default) |fail |
|-Dbuildtype=debugoptimized|2 (default) |succeed |
|-Dbuildtype=release |3 (default) |succeed |
|-Dbuildtype=minsize |s (default) |succeed |
|-Dbuildtype=custom |plain |fail |
|-Dbuildtype=custom |0 |fail |
|-Dbuildtype=custom |g |succeed |
|-Dbuildtype=custom |1 |succeed |
|-Dbuildtype=custom |2 |succeed |
|-Dbuildtype=custom |3 |succeed |
|-Dbuildtype=custom |s |succeed |
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Acked-by: David Heidelberg <david.heidelberg@collabora.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28729 >
2024-05-08 19:58:24 +00:00
Georg Lehmann
be7c137229
aco/gfx11+: optimize v_fma_mix throughput
...
Foz-DB Navi31:
Totals from 18677 (23.58% of 79206) affected shaders:
Latency: 83613889 -> 83558801 (-0.07%)
InvThroughput: 12696661 -> 12635199 (-0.48%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29047 >
2024-05-08 19:36:07 +00:00
Mike Blumenkrantz
f02310934c
ci: disable g52
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29109 >
2024-05-08 19:01:29 +00:00
Eric Engestrom
76725c2fac
docs: add sha256sum for 24.0.7
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29107 >
2024-05-08 17:43:55 +00:00
Eric Engestrom
a2218002ad
docs: update calendar for 24.0.7
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29107 >
2024-05-08 17:43:55 +00:00
Eric Engestrom
bd725681e4
docs: add release notes for 24.0.7
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29107 >
2024-05-08 17:43:55 +00:00
Tapani Pälli
c225f89d34
anv: skip gfx push constants alloc optimization on gfx9/11
...
Always reallocate in cmd_buffer_flush_gfx_push_constants like was done
before the the optimization got introduced.
Fixes: 62d96a6546 ("anv: add dirty tracking for push constant data")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11064
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Tested-by: Mark Janes <markjanes@swizzler.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28999 >
2024-05-08 17:21:26 +00:00
Rob Clark
065b3b04d2
freedreno/ir3: Skip DAG validation on release builds
...
Was triggering a stack overflow in android CTS with
dEQP-VK.spirv_assembly.instruction.compute.spirv_ids_abuse.lots_ids and
friends, presumably due to smaller stack size with bionic. But there
isn't really any point to doing this validation in release builds so
lets limit it to debug builds (which will cover mesa-CI).
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29088 >
2024-05-08 16:46:46 +00:00
Rob Clark
a3e5c15664
tu: Fix a6xx lineWidthGranularity
...
Fixes dEQP-VK.info.device_properties.
Fixes: 48da361eb7 ("tu: wideLines support for a7xx.")
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29088 >
2024-05-08 16:46:46 +00:00
Rob Clark
5c7f5362c0
tu: Add missing error path cleanup
...
Fixes dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic
with virtgpu (virtio_device_finish() needs to vk_free()).
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29088 >
2024-05-08 16:46:46 +00:00
Juan A. Suarez Romero
9f72e22230
broadcom/compiler: remove unused parameters in vpm read
...
A few of the parameters are not actually used at all. So let's clean
them.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29101 >
2024-05-08 14:13:07 +00:00
Eric Engestrom
b8e79d2769
mr-label-maker: fix yaml syntax
...
Only whitespace changes, and the parser was lenient enough to not raise
an error, but let's fix it anyway.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29104 >
2024-05-08 12:25:29 +00:00
Samuel Pitoiset
1173058002
radv: add a new mechanism for tracking registers per cmdbuf
...
We already track a couple of registers per cmdbuf and this introduces
a generic mechanism, instead of having a bunch of last_xxx fields.
Loosely based on RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28644 >
2024-05-08 11:45:52 +00:00
Alejandro Piñeiro
39a9f68685
v3dv: enable VK_EXT_extended_dynamic_state2
...
Note that we don't support (and clarify on code why) two of the
features of this extension:
* extendedDynamicState2PatchControlPoints: as we don't support
Tessellation Shaders
* extendedDynamicState2LogicOp: as supporting it would need to allow
compile shader variants after pipeline creation, that we try to
avoid as much as possible (and it is not supported right now)
Note that those two features are not mandatory for Vulkan 1.3. From
spec:
"Promotion to Vulkan 1.3
This extension has been partially promoted. The dynamic state
enumerants VK_DYNAMIC_STATE_DEPTH_BIAS_ENABLE_EXT,
VK_DYNAMIC_STATE_PRIMITIVE_RESTART_ENABLE_EXT, and
VK_DYNAMIC_STATE_RASTERIZER_DISCARD_ENABLE_EXT; and the
corresponding entry points in this extension are included in core
Vulkan 1.3, with the EXT suffix omitted. The enumerants and entry
points for dynamic logic operation and patch control points are not
promoted, nor is the feature structure. Extension interfaces that
were promoted remain available as aliases of the core functionality."
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28980 >
2024-05-08 11:18:28 +00:00
Alejandro Piñeiro
8a2d7e3830
v3dv: SetRasterizerDiscardEnable is dynamic now
...
Note that when it is dynamic, it goes to the codepath of having
enabled raster_enabled at the pipeline, even if at the end it will be
disabled. The fragment shader compilation, and the stage keys, depends
on rasterization being enabled or not. As mentioned, if the state is
dynamic, it assumes that the rasterization is enabled.
That would work, as then the rasterization could be discarded at the
CFG_BITS package, by the command buffer at draw time. We just have a
(discarded) shader slightly more complex that it would have been with
rasterization enabled.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28980 >
2024-05-08 11:18:28 +00:00
Alejandro Piñeiro
6b59e1d8e4
v3dv: DepthBiasEnable is dynamic now
...
Since VK_EXT_extended_dynamic_state2
We just move all related with depth bias to the command buffer. There
is not good reason to compute and save it at the pipeline.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28980 >
2024-05-08 11:18:28 +00:00
Alejandro Piñeiro
8ab0c55a53
v3dv: PrimitiveRestartEnable is now dynamic.
...
Since VK_EXT_extended_dynamic_state2
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28980 >
2024-05-08 11:18:28 +00:00
Alejandro Piñeiro
ebbb824240
v3dv: fixes StencilTestEnable handling
...
While working on VK_EXT_extended_dynamic_state2 we found two issues
the stencil emission code, after the update for StencilTestEnable
being dynamic.
Specifically:
* pack_stencil_cfg: if we don't have a ds_info, we need to return,
as pack_single_stencil_cfg uses it to fill it up. Also the check
for MESA_VK_DYNAMIC_DS_STENCIL_TEST_ENABLE was not needed. That
state doesn't affect the content of the STENCIL_CFG
packet. Stencil is enabled/disabled at the CFG_BITS packet.
* cmd_buffer_emit_stencil: we can't use pipeline->emit_stencil_cfg
to filter if it is needed to emit that as since
stencil_test_enable and stencil_op become dynamic.
We also update which states we check that are dynamic. As
mentioned STENCIL_TEST_ENABLE doesn't affect here.
Fixes: 60e9237e81 ("v3dv: StencilOp and StencilTestEnable are now dynamic")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28980 >
2024-05-08 11:18:28 +00:00
Alejandro Piñeiro
ef5697a884
v3dv/cmd_buffer: missing updates due PrimitiveTopology being dynamic now
...
There were some pending places to update after PrimitiveTopology
become dynamic. FWIW, this was not catched by any CTS test.
As we are here we add a comment to explain why we still use the
topology on the pipeline.
Fixes: 2526f74ade ("v3dv: PrimitiveTopology is now dynamic")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28980 >
2024-05-08 11:18:28 +00:00
Karol Herbst
6bcc300e00
rusticl: add RUSTICL_MAX_WORK_GROUPS
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27666 >
2024-05-08 09:00:18 +00:00
Karol Herbst
91552bb4ec
rusticl: lower huge grids
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27666 >
2024-05-08 09:00:18 +00:00
Karol Herbst
204c287327
rusticl/kernel: properly handle grid and offsets being usize
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27666 >
2024-05-08 09:00:18 +00:00
Karol Herbst
8da8c6c2d8
rusticl: use stream uploader for cb0 if prefered
...
Using the same buffer without a barrier actually can lead to data races as
drivers might not properly synchronize the content. Using the stream
uploader is a neat fix which prevents us from having to use a barrier but
still keep high throughput when launching kernels back-to-back.
Fixes: 5ff33f9905 ("rusticl: use real buffer for cb0 for drivers prefering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27666 >
2024-05-08 09:00:18 +00:00
Maíra Canal
56f7b0297e
v3dv: Use errno when logging an error to stderr
...
When logging a failed IOCTL, an errno is more useful than the output of
`drmIoctl()`. When the IOCTL fails, the return is usually -1 and this
value isn't very useful. On the other hand, the errno can help us to
debug the reason why the IOCTL failed.
Signed-off-by: Maíra Canal <mcanal@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29067 >
2024-05-08 05:42:21 +00:00
Mike Blumenkrantz
e2b9c5a9e3
zink: move blocking gfx program init functions to thread
...
this should unblock the main thread
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:27 +00:00
Mike Blumenkrantz
66dc759d0f
zink: precompile_job() -> gfx_program_precompile_job()
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:27 +00:00
Mike Blumenkrantz
54db502053
zink: split gfx program creation into 2-stage functions
...
the wrapper function should ensure that this commit has no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:27 +00:00
Mike Blumenkrantz
da04a316f7
zink: reorder fencing in zink_create_gfx_program()
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:27 +00:00
Mike Blumenkrantz
7d849da0fd
zink: reorder some code in zink_create_gfx_program()
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:27 +00:00
Mike Blumenkrantz
921fbac6a3
zink: move gfx shader init to thread
...
zink_shader_init is a long function, and making it async unblocks
the main app thread to improve startup/load times
this also eliminates a deserialize from separate shader compile by
linking up the lifetime of the nir_shader with the shader compilation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:27 +00:00
Mike Blumenkrantz
450447257b
zink: split generated tcs creation into 2-stage functions
...
same as gfx
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:27 +00:00
Mike Blumenkrantz
68eaba7e87
zink: reorder precompile_separate_shader_job() in file
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:27 +00:00
Mike Blumenkrantz
ca51c5a9da
zink: split shader create into 2-stage functions
...
this allows for a 2-stage creation of shaders with a quick create()
and a longer init()
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:26 +00:00
Mike Blumenkrantz
8b54012941
zink: use zink_shader type directly in zink_create_gfx_shader_state()
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:26 +00:00
Mike Blumenkrantz
b6b91a3ed9
zink: more effectively synchronize separate shader program precompiles
...
this avoids a race condition that could occur if a shader used by a
precompile was destroyed between creating the full_prog and the full_prog's
shader generation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:26 +00:00
Mike Blumenkrantz
27fe924cf0
zink: always block the precompile threads when pruning shaders
...
this will avoid desync with separate shader program compiles
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:26 +00:00
Mike Blumenkrantz
ac1d003d37
zink: break out shadow sampler scanning
...
this is now a pre/post pass which is split between scanning and rewrites
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:26 +00:00
Mike Blumenkrantz
de6139027c
zink: rename zink_shader variable in create functions
...
this matches the canonical variable name everywhere else
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:26 +00:00
Mike Blumenkrantz
3849f367cc
zink: simplify flagging legacy shadow samplers
...
the binding is generated from the driver_location anyway
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:26 +00:00
Mike Blumenkrantz
95e4a2b37e
zink: simplify confusing return in rewrite_tex_dest
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:26 +00:00
Mike Blumenkrantz
21a61d75b7
zink: use info.fs.uses_sample_qualifier instead of manual scan
...
this should be a superset of the previous case, so at least it won't
be wrong
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:26 +00:00
Mike Blumenkrantz
7bdaf6e95f
zink: use zink_shader_key_optimal unions for pipeline state asserts
...
no functional changes, just easier to debug fails
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:26 +00:00
Mike Blumenkrantz
8432876614
zink: delete GS conditional in update_so_info
...
I'm not exactly sure when, but at some point this became no longer necessary
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28955 >
2024-05-08 01:14:26 +00:00
Mike Blumenkrantz
d77a1762bd
zink: clamp buffer_indices_hashlist resets to used region
...
memsetting 65k of memory after every batch submit is costly, but the
memset region can be greatly reduced by tracking a min/max hash used
and memsetting that region
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29041 >
2024-05-07 23:09:03 +00:00
Sergi Blanch Torne
72b3c2e4ba
ci: identify and label S3 buckets
...
As for the S3 bucket where the kernel image is stored has been identified and
labeled, the other buckets in use can also be identified and labeled.
cc: mesa-stable
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Co-developed-by: Guilherme Gallo <guilherme.gallo@collabora.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28979 >
2024-05-07 22:08:07 +00:00
Sergi Blanch Torne
cc6bd04dd7
ci: kernel stored in a different s3 bucket
...
Due to the expiration time in `mesa-lava` (1m), the kernel used in mesa is now
using `mesa-rootfs` (1y). Due to this change, a fresh kernel image has been
prepared and mesa has also a few changes to adapt to this redirection.
cc: mesa-stable
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Co-developed-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28979 >
2024-05-07 22:08:07 +00:00
José Roberto de Souza
73188a4590
intel/perf: Add function to open perf stream
...
This will make easy to add Xe KMD support and reduce code duplication.
No changes in behavior are expected here.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29077 >
2024-05-07 21:44:34 +00:00
José Roberto de Souza
d27dcb815e
intel/perf: Add and use a function to return platform OA format
...
The platform version check to return the OA format was duplicated
in a few places, so adding a function and dropping this duplication.
While at it, already making it future proof for Xe KMD support and
split i915 specific code to its own file.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29077 >
2024-05-07 21:44:34 +00:00
José Roberto de Souza
b98538d54c
crocus: Free intel_perf_config and intel_perf_context
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29077 >
2024-05-07 21:44:34 +00:00
José Roberto de Souza
eb97d813c2
iris: Free intel_perf_config and intel_perf_context
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29077 >
2024-05-07 21:44:34 +00:00
José Roberto de Souza
137021fbe0
hasvk: Free intel_perf_config when destroying physical device
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29077 >
2024-05-07 21:44:34 +00:00
José Roberto de Souza
a941ce746a
anv: Free intel_perf_config when destroying physical device
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29077 >
2024-05-07 21:44:34 +00:00
José Roberto de Souza
4b179e7bea
intel/ds: Nuke ralloc_ctx and ralloc_cfg
...
Now that perf config and context are freed we don't need this rallocs
contexts.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29077 >
2024-05-07 21:44:34 +00:00
José Roberto de Souza
6c3ebff569
intel/ds: Free perf config and context
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29077 >
2024-05-07 21:44:34 +00:00
José Roberto de Souza
2cecf3e8a8
intel/perf: Add intel_perf_free_context()
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29077 >
2024-05-07 21:44:34 +00:00
José Roberto de Souza
ebe8d2f9ea
intel/perf: Add intel_perf_free()
...
There was no function to free resources allocated in intel_perf_config
or it self.
Other callers will be added in separated patches.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29077 >
2024-05-07 21:44:34 +00:00
José Roberto de Souza
a9a53c914d
intel/perf: Store pointer intel_device_info to in intel_perf_config
...
This will reduce host memory usage a bit.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29077 >
2024-05-07 21:44:34 +00:00
chiachih
da45594c5e
amd/vpelib: Bypass de/regam on HLG
...
- Bypass de/regam on HLG
Reviewed-by: Jesse Agate <jesse.agate@amd.com >
Acked-by: Jack Chih <chiachih@amd.com >
Signed-off-by: Navid Assadian <navid.assadian@amd.com >
---
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28972 >
2024-05-07 20:43:02 +00:00
chiachih
88b43f7174
amd/vpelib: Fix blndgam bypass flag assignment
...
- Fix blndgam bypass flag assignment
Reviewed-by: Tiberiu Visan <Tiberiu.Visan@amd.com >
Acked-by: Jack Chih <chiachih@amd.com >
Signed-off-by: Navid Assadian <navid.assadian@amd.com >
---
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28972 >
2024-05-07 20:43:02 +00:00
chiachih
921f0afe42
amd/vpelib: Fix Color Adjustment Failing Test Cases
...
[Why]
test cases are failing
[How]
Fixed hue range calclation error and add brightness limit like in shader
---------
Co-authored-by: Tiberiu Visan <tiberiu.visan@amd.com >
Reviewed-by: Tiberiu Visan <Tiberiu.Visan@amd.com >
Acked-by: Jack Chih <chiachih@amd.com >
Signed-off-by: Ali <nawwar.ali@amd.com >
---
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28972 >
2024-05-07 20:43:02 +00:00
chiachih
5027ba64a1
amd/vpelib: Remove checks for pitch alignment
...
[Why]
Pitch alignment checks are inaccurate, alignment is based on elements
instead of bytes, and byte alignment is assured by addrlib. Results in
failed checks that should pass.
[How]
Remove checks.
Reviewed-by: Roy Chan <Roy.Chan@amd.com >
Acked-by: Jack Chih <chiachih@amd.com >
Signed-off-by: Brendan Leder <breleder@amd.com >
---
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28972 >
2024-05-07 20:43:02 +00:00
chiachih
0df1054d06
amd/vpelib: adding blend gamma bypass
...
- added bypass blend
- bypass blnd
Reviewed-by: Jesse Agate <jesse.agate@amd.com >
Acked-by: Jack Chih <chiachih@amd.com >
Signed-off-by: Tiberiu Visan <tvisan@amd.com >
---
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28972 >
2024-05-07 20:43:02 +00:00
chiachih
0e6df4d458
amd/vpelib: Remove support for non-linear FP16
...
- Remove support for non-linear FP16
Reviewed-by: Roy Chan <Roy.Chan@amd.com >
Acked-by: Jack Chih <chiachih@amd.com >
Signed-off-by: Navid Assadian <navid.assadian@amd.com >
---
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28972 >
2024-05-07 20:43:02 +00:00
chiachih
acad1328a1
amd/vpelib: Remove gamma cached table
...
- Remove degam/regam cached tables
- Calculate degam/regam parameters on the fly
- Remove force_tf_calculation debug flag
Reviewed-by: Roy Chan <Roy.Chan@amd.com >
Acked-by: Jack Chih <chiachih@amd.com >
Signed-off-by: Navid Assadian <navid.assadian@amd.com >
---
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28972 >
2024-05-07 20:43:02 +00:00
chiachih
7a41fb59d3
amd/vpelib: Remove linear_0_125 TF
...
- Remove TRANSFER_FUNC_LINEAR_0_125 transfer function
- Rename TRANSFER_FUNC_LINEAR_0_1 to TRANSFER_FUNC_LINEAR
Reviewed-by: Roy Chan <Roy.Chan@amd.com >
Acked-by: Jack Chih <chiachih@amd.com >
Signed-off-by: Navid Assadian <navid.assadian@amd.com >
---
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28972 >
2024-05-07 20:43:02 +00:00
chiachih
39b08da80a
amd/vpelib: Resolve mismatch with shader
...
Shader in SDR mode with NV12 input bypasses both primary and gamma
conversions. Since in this case for RGB output p601 primary can be
set for the output primary, vpe should be able to set that primary for
output as well.
Reviewed-by: Roy Chan <Roy.Chan@amd.com >
Acked-by: Jack Chih <chiachih@amd.com >
Signed-off-by: Navid Assadian <navid.assadian@amd.com >
---
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28972 >
2024-05-07 20:43:02 +00:00
Mike Blumenkrantz
383c3a417f
lavapipe: VK_EXT_legacy_vertex_attributes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29068 >
2024-05-07 19:46:21 +00:00
Mike Blumenkrantz
d93211bde0
ci: disable lavapipe-vk-asan job
...
this is somehow broken
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29068 >
2024-05-07 19:46:21 +00:00
Eric Engestrom
6342903f56
lavapipe/ci: move a few skips out from under the "llvm jit" comment
...
They are probably unrelated to that.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29082 >
2024-05-07 19:25:58 +00:00
Mike Blumenkrantz
3a56040940
llvmpipe: add KHR-Single-GL45.arrays_of_arrays_gl.AtomicUsage skip
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29082 >
2024-05-07 19:25:58 +00:00
Mike Blumenkrantz
660a47ecbf
tu: support VK_EXT_legacy_vertex_attributes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29086 >
2024-05-07 18:59:33 +00:00
Danylo Piliaiev
2890a0615e
tu/a7xx: Don't set FLUSH_PER_OVERLAP_AND_OVERWRITE for feedback loops
...
A7XX doesn't have the same issue with UBWC flag buffer coherency
as A6XX has.
Though for VK_EXT_rasterization_order_attachment_access we still have
to set prim mode to flushing since it allows not to explicitly synchronize
between writes and reads. Though we could use FLUSH_PER_OVERLAP in sysmem.
Passes:
dEQP-VK.pipeline.*feedback_loop*
dEQP-GLES31.functional.blend_equation_advanced.* (with Zink)
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28597 >
2024-05-07 18:27:40 +00:00
Vignesh Raman
26417211ae
virtio/ci: separate hiden jobs to -inc.yml files
...
make it easier to re-use the hidden jobs by other project (e.g. linux)
without enabling the executable jobs.
Inspired on 9442571664 ("ci: separate hiden jobs to -inc.yml files").
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29084 >
2024-05-07 18:01:51 +00:00
Echo J
928dd386fa
nvk: Add sha1_h as a dependency
...
This should make the NVK build process more reliable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29080 >
2024-05-07 16:29:57 +00:00
Mike Blumenkrantz
2efa1ae0d5
dri: rename 'implicit' param from earlier series
...
I accidentally merged the wrong version of this, and this was supposed
to be the correct and more informative name
Acked-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29066 >
2024-05-07 15:19:23 +00:00
Danylo Piliaiev
9666756f60
tu: Handle non-overlapping WaW hazard with buffer copy/fill/update
...
Copies/fills/updates for buffers are happening through CCU but need
additional synchronization when write range is not aligned to 64 bytes.
Because dst buffer access uses either R8_UNORM or R32_UINT and they are not
coherent between each other in CCU since format seem to be a part of a
cache key.
See: https://gitlab.khronos.org/vulkan/vulkan/-/issues/3306
The synchronization with writes from UCHE (e.g. with SSBO stores) are
solved by the fact that UCHE has byte level dirtiness tracking and that CCU
flush would happen always before UCHE flush for such case (e.g. both
renderpass and dispatch would flush pending CCU write).
Additionally see:
https://gitlab.khronos.org/vulkan/vulkan/-/issues/3398#note_400111
Fixes geometry corruption and potentially hangs in Resident Evil 3.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28469 >
2024-05-07 12:43:27 +00:00
Connor Abbott
4cefb5ece8
docs/android: Fix example meson cross file again
...
I copied it over wrong, it should be cpu_family that's changed to
aarch64 to avoid "error: undefined symbol: blake3_hash_many_neon".
Fixes: 57abef5af1 ("docs/android: Fix example meson cross file")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29081 >
2024-05-07 12:34:07 +00:00
Connor Abbott
59192b851f
freedreno: Update HLSQ_*_CMD registers for a7xx
...
These are used when reading CP_MEMPOOL contents in devcoredumps and in
SQE source.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27266 >
2024-05-07 12:05:11 +00:00
Connor Abbott
13fdde0c7d
freedreno/crashdec: Initial a7xx support
...
There are more things to do, e.g. BV mempool dumping and estimating the
BV location. However this is a good start.
The expanded register size is because the reglist includes registers
from other cores and these are read the same as any other GPU register.
Note that this is also the actual range of type4 packets, even though
registers higher than 0xffff are all protected. Right now these are
skipped on page faults but still read with the crashdumper for hangs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27266 >
2024-05-07 12:05:11 +00:00
Constantine Shablia
81f42d82ed
panfrost: report correct MAX_VARYINGS
...
Fixes packing-varying piglit failures
Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29017 >
2024-05-07 11:37:18 +00:00
Boris Brezillon
4c74d14730
pan/kmod: Make default allocator thread-safe
...
Allocations targeting a pan_kmod_dev can happen concurrently, so we
need the pan_kmod_dev allocator to be thread-safe.
ralloc() is not thread-safe, and we don't really need a hierarchical
allocator in this context anyway, so let's just switch to calloc/free
instead.
Fixes: d95ec56f8c ("panfrost: Abstract kernel driver operations")
Reported-by: Eric Smith <eric.smith@collabora.com >
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Tested-by: Eric Smith <eric.smith@collabora.com >
Reviewed-by: Eric Smith <eric.smith@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28926 >
2024-05-07 11:11:28 +00:00
Boris Brezillon
068d111884
pan/kmod: Fix a syncobj leak in the panthor backend
...
Make sure we release the syncobj attached to the BO if the object is
sharable.
Fixes: 97f6a62f7e ("pan/kmod: Add a backend for panthor")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Acked-by: Constantine Shablia <constantine.shablya@collabora.com >
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28926 >
2024-05-07 11:11:28 +00:00
Boris Brezillon
2cc317763c
panfrost: Add the BO containing fragment program descriptor to the batch
...
On pre-Valhall HW, the fragment shader metadata was part of the RSD
(renderer state descriptor), which was emitted at draw time, but
Valhall introduces a shader program descriptor containing only the
shader information, and this one is emitted at shader preparation
time.
If we don't add the FS state BO to batch, we might end up with a batch
being executed after the shader object has been destroyed, leading to
page faults when the GPU tries to access the shader program descriptor.
We make the panfrost_batch_add_bo() unconditional since it gracefully
handles the NULL case (which will happen on v7-).
Fixes: 087b63cb07 ("panfrost: Allow uploading fragment SPDs")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28926 >
2024-05-07 11:11:28 +00:00
Samuel Pitoiset
31b039d8b7
radv: advertise VK_KHR_dynamic_rendering_local_read
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27263 >
2024-05-07 10:35:04 +00:00
Samuel Pitoiset
c533a79878
radv: implement VK_KHR_dynamic_rendering_local_read
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27263 >
2024-05-07 10:35:04 +00:00
Samuel Pitoiset
53a142ad23
aco: add support for remapping color attachments
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27263 >
2024-05-07 10:35:04 +00:00
Sergi Blanch Torne
39379e30db
mr-label-maker: specialize CI labels
...
Some CI people proposed to split the label for the expectation files in
issue #10965 . The proposal also thought to label as `trace` changes on the
configuration files for those tests.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29016 >
2024-05-07 10:28:08 +00:00
Eric Engestrom
a30e6b9afc
ci: backport fix for gl_PointSize bug in CTS
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29076 >
2024-05-07 09:43:57 +00:00
Tapani Pälli
cbe2630f19
iris: change stream uploader default size to 2MB
...
Patch bumps up the size to the 2MB alignment, this fixes rendering
issues with Star Wars KOTOR when VBO's are not used (which is the
default setting).
Fixes: 0b6693a3a1 ("iris: Align fresh BO allocations to 2MB in size")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10863
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28974 >
2024-05-07 09:20:06 +00:00
Oskar Viljasaar
2d575034f2
hasvk: switch to use runtime physical device properties infrastructure
...
Remove the GPDP and GPDP2 entrypoints, and fill the properties
at device initialization time instead.
Move DRM master major/minor gathering before get_properties() and WSI
init, as the latter uses the results gathered by the former.
Reviewed-by: Julia Tatz <tatz.j@northeastern.edu >
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27717 >
2024-05-07 08:45:18 +00:00
Oskar Viljasaar
55967a411d
anv: Move completely over to common runtime GetPhysicalDeviceProperties2
...
The runtime grew support for VkPhysicalDevicePresentationPropertiesANDROID,
so we can use that now and get rid of anv_GetPhysicalDeviceProperties2.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27717 >
2024-05-07 08:45:17 +00:00
Lionel Landwerlin
c0fcc0a2fd
docs: update anv features
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29070 >
2024-05-07 08:16:22 +03:00
Lionel Landwerlin
8c1cc405d3
anv: VK_EXT_legacy_vertex_attributes
...
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29070 >
2024-05-07 08:16:20 +03:00
Timothy Arceri
3d20245f43
glsl: wrap nir_opt_loop in NIR_PASS()
...
Otherwise we miss the debugging benefits.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29079 >
2024-05-07 04:11:36 +00:00
Faith Ekstrand
d2e5ff0585
nouveau/headers: Clean up the meson a bit
...
The classes don't need the _push prefix and the depend files is
pointless since we already include the python script as an input file to
the custom_target().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29028 >
2024-05-07 03:15:02 +00:00
Yusuf Khan
a6036033f0
nouveau/headers: Make nvk_cl**** turn to nv_push_cl****
...
Signed-off-by: Yusuf Khan <yusisamerican@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29028 >
2024-05-07 03:15:02 +00:00
Faith Ekstrand
8a0afd1276
nvk: Advertise VK_EXT_pipeline_robustness
...
The common pipeline cache implementaiton gives us this for free.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9643
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28655 >
2024-05-06 22:59:54 +00:00
Faith Ekstrand
cda0d6331b
nouveau/class_parser.py: Fix the docs for --out-rs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28655 >
2024-05-06 22:59:54 +00:00
Sagar Ghuge
e32828f5fc
intel/compiler: Fix destination type for CMP/CMPN
...
For CMP/CMPN, use src0 type if destination is null otherwise get the
src0 type register with destination register size.
This fixes dEQP-VK.glsl.builtin_var.frontfacing.* tests cases on Xe2+.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Francisco Jerez <currojerez@riseup.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28679 >
2024-05-06 21:46:18 +00:00
Christian Gmeiner
6c5acc6db7
etnaviv: Zero init all srcs passed to etna_emit_alu(..)
...
During etna_assemble(..) we check if the uniform usage is valid for
the target GPU. As we do not fully init the srcs, it can happen that
we look at random data during the uniform check. This generates
false positive "generating instruction that accesses two different uniforms"
errors.
Fixes: 5aede1a157 ("etnaviv: isa: Do src swizzle with isaspec")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: Lucas Stach <l.stach@pengutronix.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29048 >
2024-05-06 21:27:49 +00:00
Mykhailo Skorokhodov
1cc4812398
ci/lima: expect fail of window_8888_colorspace_srgb on wayland
...
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29052 >
2024-05-06 20:55:59 +00:00
Mykhailo Skorokhodov
066fc39f45
egl/wayland: Fix sRGB format look up for config
...
That check should help with situations when
the dri2_wl_visual_idx_from_pipe_format function
can't recognize pipe_format as before.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10829
Fixes: 6a084e2b("egl/wayland: Use pipe_format to look up configs")
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29052 >
2024-05-06 20:55:59 +00:00
Eric Engestrom
c26fc237bb
lavapipe/ci: skip two more timing out ray query tests
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29078 >
2024-05-06 20:36:52 +00:00
Zan Dobersek
d17e9994e4
freedreno: add a7xx perfcounter support
...
Add performance counting support for a7xx in Freedreno, providing the
available performance counter groups along with the lists of countables
that can be counted through related counters.
All the collected countable names and values are provided in enum
definitions, even when the names indicate some countables being reserved.
The perfcounter groups don't include those reserved values.
The countable selection command stream in fdperf is enabled for a7xx,
sharing the same command stream created for 5th- and 6th-gen devices.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27483 >
2024-05-06 19:56:43 +00:00
Zan Dobersek
5fb8ab62d2
fdperf: simplify counter value output
...
Instead of the ratio of counter value change in a certain sampling window,
display the raw integer change of that counter value. Counters counting
countables with names indicating cycle values still have that ratio
computed and printed alongside the raw value.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27483 >
2024-05-06 19:56:43 +00:00
Zan Dobersek
bc6cee935e
fdperf: improve reads of counter values
...
The counter values on Adreno are 64-bit values, but only their lower
32 bits have been read until now.
This change switches to reading the complete 64-bit value, storing that
value and the delta against the previous value for each counter. Similar is
done for time values, namely storing the time value and the delta against
the previous value (in microseconds) for each counter. The deltas are then
used to compute the counter change per second, as was done before.
In curses UI, an early sampling is done during setup in order to avoid
artificially-large values popping up in the first update due to the deltas
being calculated to initially-zero values.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27483 >
2024-05-06 19:56:43 +00:00
Zan Dobersek
9a45487708
fdperf: prettify logic around the reserved CP counter
...
fdperf reserves the first CP counter for measuring the GPU frequency.
A new flag is added to the fdperf's counter struct type, the flag being
enabled for the first CP counter during counter setup.
Different tests on group and counter indices are replaced by testing for
this flag's value. Only exception is the restore_counter_groups()
functionality, where now this reserved CP counter is also reselected with
the persistent CP_ALWAYS_COUNT countable value, in case some other program
overrides it.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27483 >
2024-05-06 19:56:43 +00:00
Zan Dobersek
547f20773c
fdperf: select_counter() should work with a countable value
...
Right now select_counter() is called with values of specific countables
that should be tracked in the given counter, but it treats those values
as indices into the array of all available countables for a given counter
group. This works right now since all countable values for any counter
group are sequential, but that won't be the case on a7xx.
To address that, select_counter() is adjusted to find the index of the
specified countable value, and use that to store the label pointer that
should be displayed for the desired counter.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27483 >
2024-05-06 19:56:42 +00:00
Zan Dobersek
704cceab30
fdperf: use snprintf instead of asprintf
...
Use on-stack string buffers and snprintf to compose formatted output in
fdperf. This removes a couple of current compiler warnings due to unused
asprintf return values.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27483 >
2024-05-06 19:56:42 +00:00
Samuel Pitoiset
17fcb86a26
vulkan: Update XML and headers to 1.3.284
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29056 >
2024-05-06 19:14:57 +00:00
Samuel Pitoiset
c9162034bc
radv: precompute DB_SHADER_CONTROL for fragment shaders later
...
To regroup all precomputed register values.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022 >
2024-05-06 18:00:02 +00:00
Samuel Pitoiset
c658ed5136
radv: precompute vertex shader register values
...
To make emission faster.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022 >
2024-05-06 18:00:02 +00:00
Samuel Pitoiset
4b53d36f0d
radv: precompute legacy GS register values
...
To make emission faster.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022 >
2024-05-06 18:00:02 +00:00
Samuel Pitoiset
fa9b0ee86c
radv: precompute mesh shader register values
...
To make emission faster.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022 >
2024-05-06 18:00:02 +00:00
Samuel Pitoiset
7f7ef10bea
radv: precompute fragment shader register values
...
To make emission faster.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022 >
2024-05-06 18:00:02 +00:00
Samuel Pitoiset
e5bc4d85bb
radv: precompute existing legacy GS register values later
...
To precompute all registers at the same place.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022 >
2024-05-06 18:00:02 +00:00
David Rosca
88dfe04b08
Revert "radeonsi/vcn: AV1 skip the redundant bs resize"
...
Currently ffmpeg has a bug in VAAPI AV1 decode that in some cases
it submits the same slice data buffer as many times as there is tiles.
However, in other cases it behaves correctly and all slice data buffers
contain different parts of bitstream to decode which this change breaks.
Now that the va frontend is passing correct offsets, this fixes decoding
AV1-TEST-VECTORS/av1-1-b8-22-svc-L1T2 with ffmpeg.
This reverts commit e6701f7231 .
Cc: mesa-stable
Reviewed-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28960 >
2024-05-06 17:23:09 +00:00
David Rosca
6746d4df6e
frontends/va: Fix AV1 slice_data_offset with multiple slice data buffers
...
The slice parameter data offset refers to offset in the submitted data buffer.
When multiple slice data buffers are submitted, the offsets of all slices needs
to be adjusted to be based from the start of the first data buffer.
Cc: mesa-stable
Reviewed-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28960 >
2024-05-06 17:23:09 +00:00
Karol Herbst
569c2fcf95
nir: fix nir_shader_get_function_for_name for functions without names.
...
It's legal in SPIRV for functions to not have names, we have to take this
into account when calling into strcmp here.
Fixes: 2aa9eb497d ("nir: Add a helper for finding a function by name")
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29063 >
2024-05-06 16:45:51 +00:00
Mike Blumenkrantz
13bd413860
zink: clean up accidental debug print
...
Fixes: 19e8df39b6 ("zink: slightly better swapinterval failure handling")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29065 >
2024-05-06 16:11:32 +00:00
Patrick Lerda
f848921148
clover: fix pipe_box update regression
...
Indeed, clover was processing the pipe_box elements with a hardcoded
order. The update of the pipe_box object broke clover.
Fixes: 651191801a ("gallium: increase the size of pipe_box y, height fields to allow bigger textures")
Signed-off-by: Patrick Lerda <patrick9876@free.fr >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29060 >
2024-05-06 14:30:38 +00:00
Georg Lehmann
e7b942393a
aco/tests: simplify small constant copy test
...
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29045 >
2024-05-06 13:38:14 +00:00
Georg Lehmann
44cc0d31b8
aco/gfx10: use v_add_u16 with literal for constant copies
...
This also means the v_perm_b32 path is now unused.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29045 >
2024-05-06 13:38:14 +00:00
Georg Lehmann
7823065f64
aco/gfx11+: use v_cvt_pk_u8_f32 for 8bit constant copies
...
Foz-DB Navi31:
Totals from 201 (0.25% of 79395) affected shaders:
Instrs: 186869 -> 186857 (-0.01%)
CodeSize: 1026760 -> 1026700 (-0.01%); split: -0.01%, +0.00%
Latency: 2302050 -> 2301969 (-0.00%)
InvThroughput: 739466 -> 739431 (-0.00%)
Copies: 26467 -> 26454 (-0.05%)
VALU: 93529 -> 93516 (-0.01%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29045 >
2024-05-06 13:38:14 +00:00
Juan A. Suarez Romero
23368f8c0c
vc4: set src type on storing sample mask
...
Otherwise NIR validation will fail.
Fixes: 1632948a76 ("nir: validate src_type of store_output intrinsics, require bit_size >= 16")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29038 >
2024-05-06 13:16:45 +00:00
Juan A. Suarez Romero
9e0978cd76
vc4/v3d/ci: update expected list
...
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29061 >
2024-05-06 12:30:02 +00:00
Karol Herbst
d163498dbe
nouveau: fix potential double-free in nouveau_drm_screen_create
...
Fixes: 821f4c8d99 ("nouveau: import libdrm_nouveau")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29000 >
2024-05-06 12:04:18 +00:00
Oskar Viljasaar
3e2df67874
vulkan/properties: Document RENAMED_PROPERTIES in the property generator
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26386 >
2024-05-06 11:16:48 +00:00
Oskar Viljasaar
a5d59a50a9
v3dv: Use common runtime vk_properties
...
Remove the v3dv_GetPhysicalDeviceProperties and the
v3dv_GetPhysicalDeviceProperties2 functions, replace them
by a private get_device_properties() called at device initialization
time.
(given the diff, the change is best viewed with --diff-algorithm=histogram)
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Tested-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26386 >
2024-05-06 11:16:48 +00:00
Oskar Viljasaar
18c9b64e65
v3dv: constify arguments of vendor/device id getters
...
These functions do not modify their arguments in any way, so might as
well make the arguments const.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26386 >
2024-05-06 11:16:48 +00:00
Oskar Viljasaar
1afbf0ba4a
vulkan/properties: support Android in the property generator
...
get_property_structs() now checks if a property struct is
in ANDROID_PROPERTIES and marks it as such.
The header file now includes vk_android_native_buffer.h and the
Android properties in vk_properties..
For the C file, also generate case statements for respective Android
property structs.
All of the Android-specific code is #ifdeffed behind ANDROID.
That being said, we only support PresentationPropertiesANDROID for now.
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Tested-by: Roman Stratiienko <r.stratiienko@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26386 >
2024-05-06 11:16:48 +00:00
Lionel Landwerlin
610a7c84c3
anv: move empty_vs_input to physical device
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29057 >
2024-05-06 09:20:01 +00:00
Lionel Landwerlin
725397759a
anv: move device initialization as the last step of vkCreateDevice
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29057 >
2024-05-06 09:20:01 +00:00
Lionel Landwerlin
63c4d24f7d
anv: avoid requirement to put flush_data as first field
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29057 >
2024-05-06 09:20:01 +00:00
Lionel Landwerlin
ae6d20815a
anv: fix leak of custom border colors
...
Inside a HAVE_VALGRIND section.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 4dad2a4a6f ("anv: enable shader border color capture/replay")
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29057 >
2024-05-06 09:20:01 +00:00
Lionel Landwerlin
e260b16b11
anv: fixup alloc failure handling in reserved_array_pool
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 806281f61f ("anv: add a new reserved pool for capture/release")
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29057 >
2024-05-06 09:20:01 +00:00
Samuel Pitoiset
92337aff03
radv: split cmdbuf dirty flags into dirty/dirty_dynamic
...
We are out of bits.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29039 >
2024-05-06 08:33:37 +02:00
Christian Gmeiner
db7bfe85ae
clc: Always use spir for 32 bit
...
Fixes unknown target triple
'unknown-unknown-unknown-spirv-unknown-unknown' problem with llvm 17 on
a 32 bit system.
Fixes: 22fa315ee0 ("clc: use spirv triple starting with llvm-17")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29049 >
2024-05-05 23:26:14 +00:00
Roman Stratiienko
8732a619f1
vulkan/android: Add common vkGetAndroidHardwareBufferPropertiesANDROID
...
Change-Id: I1a7542c6eed7ebf00241bce7fd69840a9007ed27
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Tested-by: tarsin <yuanqingxiang233@163.com >
Reviewed-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25360 >
2024-05-05 22:02:17 +00:00
Roman Stratiienko
e8f7e7582a
vulkan/android: Add common helpers for the AHB extension
...
Change-Id: I0d88ebf6b14b6425a7ecbdbb1c17df62e4ca103a
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Tested-by: tarsin <yuanqingxiang233@163.com >
Reviewed-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25360 >
2024-05-05 22:02:17 +00:00
Roman Stratiienko
d0996d1a30
vulkan/android: Add common helpers for the ANB extension
...
Change-Id: I999121edfc7163cecc83897eb7be73896de36d89
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Tested-by: tarsin <yuanqingxiang233@163.com >
Acked-by: David Heidelberg <david.heidelberg@collabora.com >
Reviewed-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25360 >
2024-05-05 22:02:17 +00:00
Roman Stratiienko
3b0f0b0ab9
vulkan/android: Add android buffer classification to vk_image
...
Helps clients distinguish between non-android, Android native,
and Android hardware buffers.
Change-Id: Idc7838ead211048140128c1729241280e8ff9e59
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Tested-by: tarsin <yuanqingxiang233@163.com >
Acked-by: David Heidelberg <david.heidelberg@collabora.com >
Reviewed-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25360 >
2024-05-05 22:02:17 +00:00
Roman Stratiienko
c406d53858
vulkan/android: Add common vkGetSwapchainGrallocUsage{2}ANDROID
...
Change-Id: I6db52b8950a075cfbcd8f4a3b66fd13b032d9a5e
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Tested-by: tarsin <yuanqingxiang233@163.com >
Acked-by: David Heidelberg <david.heidelberg@collabora.com >
Reviewed-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25360 >
2024-05-05 22:02:17 +00:00
Roman Stratiienko
dd9a426e3e
vulkan/android: Add basic u_gralloc support
...
We want to move more Android-related functions into common code.
Many of which require interactions with the gralloc. Therefore,
struct u_gralloc must be kept in a common code.
vk_android_get_ugralloc() must be used for gralloc API calls.
vk_android_{init|destroy}_ugralloc() must be used in Vulkan HAL
initialization code, e.g.:
- In XXXX_hal_open() to initialize the gralloc
- In XXXX_hal_close() to destroy the gralloc
We do not put gralloc initialization into the generic code because we want
it to be initialized by Zygote's Vulkan preloader, which may sometimes
preload gralloc shared libraries, thus speeding up the initialization
of user applications.
Change-Id: I2af643bd132e6cdbfed043c8c18836501764952f
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Tested-by: tarsin <yuanqingxiang233@163.com >
Acked-by: David Heidelberg <david.heidelberg@collabora.com >
Reviewed-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25360 >
2024-05-05 22:02:17 +00:00
Mark Collins
cd3871e7a4
docs/features: Add VK_EXT_map_memory_placed
...
This extension has been implemented in quite a few mesa drivers over
time but never added to `features.txt`.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28928 >
2024-05-05 14:38:42 +00:00
Mark Collins
220dae5870
tu: Implement VK_EXT_map_memory_placed
...
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28928 >
2024-05-05 14:38:39 +00:00
Mark Collins
6d2de5b5b0
tu: Handle VkDeviceMemory BO unmapping in VkUnmapMemory
...
Unmapping the BO associated with a VkDeviceMemory object was
previously handled when destroying the object, this behavior
isn't problematic when the mapping is driver-controlled but
with VK_EXT_map_memory_placed, the user may want control over
the allocation and reuse the mapping after calling unmap.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28928 >
2024-05-05 14:38:33 +00:00
Mark Collins
854640ea26
vdrm: Add fixed VA parameter for mapping memory
...
This is necessary for implementing VK_EXT_map_memory_placed in Turnip.
Signed-off-by: Mark Collins <mark@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28928 >
2024-05-05 14:38:27 +00:00
Georg Lehmann
603982ea80
nir/opt_16bit_tex_image: optimize packed conversions too
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730 >
2024-05-04 15:01:45 +00:00
Georg Lehmann
eeed928111
nir/opt_16bit_tex_image: pass options to opt_16bit_dest
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730 >
2024-05-04 15:01:45 +00:00
Georg Lehmann
e63afdc681
radv: always run nir_opt_16bit_tex_image
...
The pass can optimize pack_half and constants sources even when
no 16bit instructions exist.
Foz-DB Navi21:
Totals from 3042 (3.83% of 79395) affected shaders:
MaxWaves: 69039 -> 69031 (-0.01%); split: +0.01%, -0.02%
Instrs: 2292054 -> 2291874 (-0.01%); split: -0.03%, +0.02%
CodeSize: 12567868 -> 12544888 (-0.18%); split: -0.23%, +0.05%
VGPRs: 145384 -> 145352 (-0.02%); split: -0.06%, +0.04%
SpillSGPRs: 451 -> 452 (+0.22%)
Latency: 23546543 -> 23536416 (-0.04%); split: -0.07%, +0.03%
InvThroughput: 5180446 -> 5164437 (-0.31%); split: -0.35%, +0.04%
VClause: 50537 -> 50535 (-0.00%); split: -0.05%, +0.04%
SClause: 84726 -> 84750 (+0.03%); split: -0.04%, +0.06%
Copies: 140384 -> 140421 (+0.03%); split: -0.34%, +0.37%
Branches: 40412 -> 40413 (+0.00%)
PreVGPRs: 120213 -> 120262 (+0.04%); split: -0.03%, +0.07%
VALU: 1607545 -> 1607593 (+0.00%); split: -0.03%, +0.03%
SALU: 215846 -> 215837 (-0.00%); split: -0.03%, +0.02%
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730 >
2024-05-04 15:01:44 +00:00
Georg Lehmann
3a35522c8a
radv, radeonsi: don't use D16 for f2f16_rtz
...
D16 rounds towards zero for fp32 -> fp16, but for fixed point it rounds to
nearest even in fp16. MIMG without D16 also rounds to nearest even, but in fp32.
This means D16 and f2f16_rtz(tex@32) can produce different results.
Sadly this also means we can never use d16 if fp16 rounding isn't undefined.
Cc: mesa-stable
Acked-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730 >
2024-05-04 15:01:44 +00:00
Georg Lehmann
4287358f59
ac/nir: explicitly use pack_half_2x16_rtz
...
rtz matters for constant folding.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730 >
2024-05-04 15:01:44 +00:00
Ian Romanick
1b8cf06fc7
nir/algebraic: Optimize some extract_* expressions
...
v2: Add missing '!options->lower_extract_byte' to the last two
patterns. Every driver except Asahi sets both or neither.
shader-db:
All Intel platforms had similar results. (DG2 shown)
total instructions in shared programs: 19659360 -> 19659356 (<.01%)
instructions in affected programs: 44 -> 40 (-9.09%)
helped: 2 / HURT: 0
total cycles in shared programs: 823432524 -> 823432520 (<.01%)
cycles in affected programs: 1722 -> 1718 (-0.23%)
helped: 2 / HURT: 0
fossil-db:
All Intel platforms had similar results. (DG2 shown)
Totals:
Instrs: 153989787 -> 153989617 (-0.00%)
Cycle count: 17562079230 -> 17562079493 (+0.00%); split: -0.00%, +0.00%
Totals from 24 (0.00% of 631369) affected shaders:
Instrs: 13733 -> 13563 (-1.24%)
Cycle count: 341392 -> 341655 (+0.08%); split: -0.25%, +0.33%
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com > [v1]
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27891 >
2024-05-03 15:01:43 -07:00
Ian Romanick
0fa17962d6
intel/elk: Fix optimize_extract_to_float for i2f of unsigned extract
...
Fixes fs-uint-to-float-of-extract-int8.shader_test and
fs-uint-to-float-of-extract-int16.shader_test added by piglit!883.
v2: Expand the comment explaining the potential problem. Suggested by
Caio.
Fixes: e6022281f2 ("intel/elk: Rename files to use elk prefix")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27891 >
2024-05-03 15:01:43 -07:00
Ian Romanick
fc2360167c
intel/brw: Avoid optimize_extract_to_float when it will just be undone later
...
v2: Add bspec quotation. Suggested by Caio. With better understand of
the restriction, only apply on DG2 and newer platforms.
shader-db:
DG2 and Meteor Lake had similar results. (DG2 shown)
total instructions in shared programs: 19659363 -> 19659360 (<.01%)
instructions in affected programs: 2484 -> 2481 (-0.12%)
helped: 6 / HURT: 1
total cycles in shared programs: 823445738 -> 823432524 (<.01%)
cycles in affected programs: 2619836 -> 2606622 (-0.50%)
helped: 48 / HURT: 63
fossil-db:
DG2 and Meteor Lake had similar results. (DG2 shown)
Totals:
Instrs: 154015863 -> 153987806 (-0.02%); split: -0.02%, +0.00%
Cycle count: 17552172994 -> 17562047866 (+0.06%); split: -0.13%, +0.19%
Spill count: 142124 -> 141544 (-0.41%); split: -0.54%, +0.13%
Fill count: 266803 -> 266046 (-0.28%); split: -0.38%, +0.09%
Scratch Memory Size: 10266624 -> 10271744 (+0.05%); split: -0.02%, +0.07%
Max live registers: 32592428 -> 32592393 (-0.00%); split: -0.00%, +0.00%
Max dispatch width: 5535944 -> 5535912 (-0.00%); split: +0.00%, -0.00%
Totals from 41887 (6.63% of 631367) affected shaders:
Instrs: 32971032 -> 32942975 (-0.09%); split: -0.10%, +0.01%
Cycle count: 3892086217 -> 3901961089 (+0.25%); split: -0.60%, +0.85%
Spill count: 105669 -> 105089 (-0.55%); split: -0.72%, +0.18%
Fill count: 206459 -> 205702 (-0.37%); split: -0.49%, +0.12%
Scratch Memory Size: 7766016 -> 7771136 (+0.07%); split: -0.03%, +0.09%
Max live registers: 3230515 -> 3230480 (-0.00%); split: -0.00%, +0.00%
Max dispatch width: 337232 -> 337200 (-0.01%); split: +0.00%, -0.01%
No shader-db or fossil-db changes on any earlier Intel platforms.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27891 >
2024-05-03 15:01:43 -07:00
Ian Romanick
bf5d82654a
intel/brw: Fix optimize_extract_to_float for i2f of unsigned extract
...
Fixes fs-uint-to-float-of-extract-int8.shader_test and
fs-uint-to-float-of-extract-int16.shader_test added by piglit!883.
No shader-db or fossil-db changes on any Intel platform.
v2: Expand the comment explaining the potential problem. Suggested by
Caio.
Fixes: 29ce110be6 ("i965/fs: Remove extract virtual opcodes.")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27891 >
2024-05-03 15:01:43 -07:00
Eric Engestrom
82dab8691e
ci: uprev mold to 2.31.0
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29043 >
2024-05-03 19:24:03 +00:00
Gert Wollny
7de8a01087
mesa/st: don't use base shader serialization when uniforms are not packed
...
When loading the base shader serialization there is a discrepancy
between the state parameters that may already have been optimized,
because after storing the serialization the shader went through
st_finalize_nir, and _mesa_optimize_state_parameters was run, so
that original state parameters may have been optimized and replaced
by new parameters.
After get_nir_shader is called, the original state parameters are
re-added - in addition to the optimized parameters. This lead to
an bug with the uniform offsets when lowering uniforms to UBOs.
Therefore, as a hotfix for drivers that don't support packed
uniforms, ignore the base serialization and use the
serialization obtained after st_finalize_nir was run. With that
the problem can be avoided.
Fixes: 5eb0136a3c
mesa/st: when creating draw shader variants,
use the base nir and skip driver opts
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10881
v2: reorder conditional evaluation for better readability (zmike)
v3: revert c72bb8de7 ("r300: mark new fails") (Pavel Ondračka)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28994 >
2024-05-03 18:41:36 +00:00
Dmitry Osipenko
087e9a96d1
venus: make cross-device optional
...
Cross-device is a virtio-gpu feature that enables sharing host blob
dma-bufs with other virtio devices, like virtio-wl or virtio-video.
This feature is mainly used by ChromeOS and not required if there is
no dma-buf sharing. Venus has a hard requirement for the cross-device
feature.
Qemu doesn't support cross-device. Relax cross-device feature requirement
by making it optional, allowing Venus to work on Qemu.
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29040 >
2024-05-03 17:54:33 +00:00
Gert Wollny
811ed62865
zink/kopper: Wait for last QueuePresentKHR to finish before acquiring for readback
...
When a job is submitted to the flush_queue the resource dt_idx is reset,
and if a readback is requested then we have to make sure that the
corresponding kopper_preset has finished before we can acquire the image
for readback, so wait for the according fence in this case.
This fixes the validation error UNASSIGNED-Threading-MultipleThreads-Write
triggered by piglit "read-front" lavapipe.
Fixes: 8ade5588e3
zink: add kopper api
Signed-off-by: Gert Wollny <gert.wollny@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28127 >
2024-05-03 15:19:11 +00:00
Collabora's Gfx CI Team
fd392745c2
Uprev Piglit to 7aa7bc1b01d57b4b091c4fc82a94a6ff47f38ebf
...
f7ece74a10...7aa7bc1b01
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28835 >
2024-05-03 13:56:10 +00:00
Daniel Schürmann
6b4b044739
nir/opt_loop: add loop peeling optimization
...
This optimization turns:
loop {
do_work_1();
if (cond) {
break;
} else {
}
do_work_2();
}
into:
do_work_1();
if (cond) {
} else {
loop {
do_work_2();
do_work_1();
if (cond) {
break;
} else {
}
}
}
RADV GFX11:
Totals from 925 (1.17% of 79395) affected shaders:
MaxWaves: 20583 -> 20455 (-0.62%)
Instrs: 5260489 -> 5361418 (+1.92%); split: -0.63%, +2.55%
CodeSize: 26965388 -> 27501104 (+1.99%); split: -0.48%, +2.47%
VGPRs: 70304 -> 70712 (+0.58%)
SpillSGPRs: 2163 -> 2159 (-0.18%)
Scratch: 51200 -> 69632 (+36.00%)
Latency: 36404844 -> 34542213 (-5.12%); split: -5.51%, +0.39%
InvThroughput: 6628474 -> 6384249 (-3.68%); split: -4.19%, +0.50%
VClause: 124997 -> 127008 (+1.61%); split: -0.43%, +2.04%
SClause: 121774 -> 120799 (-0.80%); split: -3.21%, +2.40%
Copies: 357048 -> 360850 (+1.06%); split: -0.62%, +1.68%
Branches: 171985 -> 168082 (-2.27%); split: -3.61%, +1.34%
PreSGPRs: 59812 -> 60088 (+0.46%); split: -0.20%, +0.66%
PreVGPRs: 60325 -> 60586 (+0.43%); split: -0.29%, +0.72%
VALU: 2882263 -> 2951373 (+2.40%); split: -0.37%, +2.77%
SALU: 636373 -> 640091 (+0.58%); split: -0.87%, +1.46%
VMEM: 200059 -> 204612 (+2.28%); split: -0.09%, +2.36%
SMEM: 173328 -> 174343 (+0.59%); split: -2.34%, +2.92%
VOPD: 1064 -> 898 (-15.60%); split: +0.09%, -15.70%
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150 >
2024-05-03 13:01:29 +00:00
Daniel Schürmann
3a2226be47
nir/opt_if: don't split ALU of phi into otherwise empty blocks
...
RADV GFX11:
Totals from 1566 (1.97% of 79395) affected shaders:
Instrs: 5663011 -> 5638219 (-0.44%); split: -0.45%, +0.01%
CodeSize: 29760844 -> 29639756 (-0.41%); split: -0.42%, +0.01%
SpillSGPRs: 1750 -> 1603 (-8.40%)
Latency: 62963520 -> 62831280 (-0.21%); split: -0.22%, +0.01%
InvThroughput: 10501171 -> 10490116 (-0.11%); split: -0.11%, +0.00%
VClause: 127928 -> 128054 (+0.10%); split: -0.01%, +0.11%
SClause: 152635 -> 152956 (+0.21%); split: -0.08%, +0.29%
Copies: 476865 -> 461288 (-3.27%); split: -3.28%, +0.02%
Branches: 169038 -> 168104 (-0.55%); split: -0.56%, +0.00%
PreSGPRs: 88851 -> 88356 (-0.56%); split: -0.58%, +0.02%
PreVGPRs: 114565 -> 114559 (-0.01%); split: -0.01%, +0.01%
VALU: 3158023 -> 3157387 (-0.02%); split: -0.03%, +0.01%
SALU: 615028 -> 595360 (-3.20%); split: -3.21%, +0.01%
VMEM: 219891 -> 218287 (-0.73%); split: -0.74%, +0.01%
SMEM: 206956 -> 206484 (-0.23%)
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150 >
2024-05-03 13:01:29 +00:00
Daniel Schürmann
e74f5b16e3
nir/loop_analyze: adjust negative (or huge) iteration count check for bit size
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150 >
2024-05-03 13:01:29 +00:00
Daniel Schürmann
52efb6cc83
panfrost: skip gles-3.0-transform-feedback-uniform-buffer-object on Mali G52 and G57
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150 >
2024-05-03 13:01:29 +00:00
Daniel Schürmann
ce51e48cb6
radv: move nir_opt_dead_cf() before nir_opt_loop()
...
This can avoid unnecessary CF transformations.
Totals from 557 (0.70% of 79395) affected shaders: (GFX11)
MaxWaves: 12020 -> 12028 (+0.07%)
Instrs: 4237096 -> 4234110 (-0.07%); split: -0.08%, +0.01%
CodeSize: 21731952 -> 21719556 (-0.06%); split: -0.06%, +0.00%
VGPRs: 40492 -> 40480 (-0.03%)
SpillSGPRs: 467 -> 416 (-10.92%)
Latency: 25704891 -> 25684156 (-0.08%); split: -0.10%, +0.02%
InvThroughput: 5545224 -> 5542998 (-0.04%); split: -0.06%, +0.02%
VClause: 107850 -> 107838 (-0.01%); split: -0.02%, +0.01%
SClause: 90450 -> 90440 (-0.01%); split: -0.05%, +0.04%
Copies: 292714 -> 291354 (-0.46%); split: -0.50%, +0.03%
Branches: 133630 -> 133617 (-0.01%); split: -0.01%, +0.00%
PreSGPRs: 42299 -> 42104 (-0.46%); split: -0.48%, +0.02%
PreVGPRs: 36396 -> 36393 (-0.01%); split: -0.02%, +0.01%
VALU: 2321811 -> 2321192 (-0.03%); split: -0.03%, +0.01%
SALU: 505001 -> 503289 (-0.34%); split: -0.35%, +0.01%
SMEM: 132622 -> 132640 (+0.01%)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150 >
2024-05-03 13:01:29 +00:00
Daniel Schürmann
4453971fbb
radv: mark nir_opt_loop() as not idempotent
...
This pass misses opportunities because foreach_list_typed_safe()
might point to disconnected cf_nodes after some optimization got
applied. No fossil-db changes.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150 >
2024-05-03 13:01:29 +00:00
Samuel Pitoiset
2e38cc06f8
radv/ci: document a recent regression on GFX6-8
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29037 >
2024-05-03 10:11:24 +00:00
Eric Engestrom
dd171d21dd
vc4/ci: add fails seen overnight
...
Fixes: 03474500b5 ("vc4/ci: update results")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29033 >
2024-05-03 08:47:21 +00:00
Pavel Ondračka
0c96b03fcf
r300: better packing for immediates
...
How this works? First we check which immediates are used as vectors,
i.e., have any reads that are using 2 or more channels. Such immdeiates
will be places in a free slots (but only the specific channels that are
used in the vector). This way we don't have to worry about swizzling
restrictions. The remaining scalar immediates will be checked for
duplicates and placed in free slots, including any empty slots in
previously places vector immediates (any swizzle is valid for scalars).
RV410:
total instructions in shared programs: 98883 -> 98905 (0.02%)
instructions in affected programs: 15414 -> 15436 (0.14%)
helped: 100
HURT: 102
total presub in shared programs: 2235 -> 2235 (0.00%)
presub in affected programs: 608 -> 608 (0.00%)
helped: 51
HURT: 72
total omod in shared programs: 419 -> 418 (-0.24%)
omod in affected programs: 15 -> 14 (-6.67%)
helped: 3
HURT: 3
total temps in shared programs: 15698 -> 15692 (-0.04%)
temps in affected programs: 952 -> 946 (-0.63%)
helped: 46
HURT: 37
total consts in shared programs: 84458 -> 83856 (-0.71%)
consts in affected programs: 14648 -> 14046 (-4.11%)
helped: 499
HURT: 0
total cycles in shared programs: 156476 -> 156493 (0.01%)
cycles in affected programs: 22532 -> 22549 (0.08%)
helped: 100
HURT: 102
LOST: shaders/ck2/157.shader_test FS
GAINED: shaders/ck2/160.shader_test FS
GAINED: shaders/tesseract/395.shader_test FS
RV530:
total instructions in shared programs: 119543 -> 119612 (0.06%)
instructions in affected programs: 27435 -> 27504 (0.25%)
helped: 118
HURT: 183
total presub in shared programs: 7257 -> 7111 (-2.01%)
presub in affected programs: 1856 -> 1710 (-7.87%)
helped: 121
HURT: 48
total omod in shared programs: 426 -> 427 (0.23%)
omod in affected programs: 5 -> 6 (20.00%)
helped: 1
HURT: 2
total temps in shared programs: 16784 -> 16779 (-0.03%)
temps in affected programs: 392 -> 387 (-1.28%)
helped: 29
HURT: 17
total consts in shared programs: 93198 -> 92667 (-0.57%)
consts in affected programs: 14577 -> 14046 (-3.64%)
helped: 451
HURT: 0
total cycles in shared programs: 186649 -> 186590 (-0.03%)
cycles in affected programs: 26306 -> 26247 (-0.22%)
helped: 125
HURT: 111
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Reviewed-by: Filip Gawin <filip.gawin@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28630 >
2024-05-03 09:28:56 +02:00
Pavel Ondračka
11ad056ee9
r300: compact scalar uniforms into empty slots
...
We are not doing this on R5xx unless we have more than 200 constants,
because emitting constants one by one will add extra overhead at emit
time which we want to avoid if possible.
RV410:
total instructions in shared programs: 98778 -> 98703 (-0.08%)
instructions in affected programs: 7106 -> 7031 (-1.06%)
helped: 80
HURT: 25
total presub in shared programs: 2266 -> 2227 (-1.72%)
presub in affected programs: 134 -> 95 (-29.10%)
helped: 22
HURT: 10
total temps in shared programs: 15662 -> 15660 (-0.01%)
temps in affected programs: 330 -> 328 (-0.61%)
helped: 16
HURT: 13
total consts in shared programs: 85632 -> 84400 (-1.44%)
consts in affected programs: 6646 -> 5414 (-18.54%)
helped: 617
HURT: 0
total cycles in shared programs: 156305 -> 156234 (-0.05%)
cycles in affected programs: 14167 -> 14096 (-0.50%)
helped: 79
HURT: 28
LOST: shaders/ck2/160.shader_test FS
GAINED: shaders/ck2/157.shader_test FS
GAINED: shaders/tropics/249.shader_test FS
GAINED: shaders/tropics/252.shader_test FS
RV530:
total consts in shared programs: 93209 -> 93198 (-0.01%)
consts in affected programs: 72 -> 61 (-15.28%)
helped: 6
HURT: 0
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.comm >
Reviewed-by: Filip Gawin <filip.gawin@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28630 >
2024-05-03 09:28:56 +02:00
Pavel Ondračka
5d3483bfe4
r300: switch to a new constant remap table format
...
Instead of just moving around constants as full vec4, we will now have
the flexibility to shuffle scalars around. However, this commit just
prepares the infrestructure and converts to it, while the constant
elimination logiic reamins the same, i.e., we only remove constant if it
is fully unused and there is no constant compaction whatsoever.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Reviewed-by: Filip Gawin <filip.gawin@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28630 >
2024-05-03 09:28:56 +02:00
Pavel Ondračka
71761e2117
r300: move dead constants pass earlier for vertex shaders
...
We need to put it before source conflict resolve because we will be
shuffling immediates around, so we can introduce new conflicts (albeit
in general there should be less conflicts instead).
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Reviewed-by: Filip Gawin <filip.gawin@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28630 >
2024-05-03 09:28:55 +02:00
Pavel Ondračka
a0ee1ac2b7
r300: replace constant size field with usemask
...
To have more flexibility in case there are some empty slots (e.g., if
the specific slot was converted to inline constant or constant swizzle).
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Reviewed-by: Filip Gawin <filip.gawin@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28630 >
2024-05-03 09:28:55 +02:00
Samuel Pitoiset
d71d189790
radv: add a new dirty state for emitting the color output state
...
SPI_SHADER_COL_FORMAT/CB_SHADER_MASK are used slightly differently
for PS epilogs, shader objects and monolithic graphics pipelines.
This introduces a new state that will allow us to emit these two
registers in only place. The main motivation is for depth-only RB+
support and for tracking context registers in the cmdbuf.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976 >
2024-05-03 06:29:05 +00:00
Samuel Pitoiset
66d4188ec5
radv: store cb_shader_mask for fragment shaders and epilogs
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976 >
2024-05-03 06:29:05 +00:00
Samuel Pitoiset
0ce1bfc040
radv: rename col_format_non_compacted to spi_shader_col_format
...
This is always the non-compacted format because it's compacted right
before it's emitted. This looks much cleaner to me.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976 >
2024-05-03 06:29:05 +00:00
Samuel Pitoiset
199f521804
radv: compact SPI_SHADER_COL_FORMAT as late as possible
...
This will allow us to do more cleanups because this thing is a complete
mess.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976 >
2024-05-03 06:29:05 +00:00
Samuel Pitoiset
e1483d022b
radv: clear unwritten color attachments for monolithic PS earlier
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976 >
2024-05-03 06:29:04 +00:00
Samuel Pitoiset
3b41fbd4b8
radv: precompute compute/task shader register values
...
To make emission faster.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29014 >
2024-05-03 06:07:46 +00:00
Alyssa Rosenzweig
0549649bcf
vulkan: optimize vk_dynamic_graphics_state_any_dirty
...
For drivers using the new state tracking, __bitset_test_range can be
surprisingly hot because we have a lot of dirty bits and __bitset_test_range has
to handle lots of special cases. __bitset_is_empty does not have to worry about
those special cases so can be much faster.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29008 >
2024-05-03 02:22:28 +00:00
Colin Marc
602c62a273
vulkan/video: correctly set sub-layer ordering in H.265 VPS/SPS
...
The relevant sections here are F.7.3.2.1 and F.7.3.2.2.1. The code was
incorrectly assuming sub_layer_ordering_info_present_flag is always 1.
Reviewed-by: Hyunjun Ko <zzoon@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29001 >
2024-05-02 23:51:56 +00:00
Colin Marc
b613566faf
vulkan/video: generate profile_tier_level structure correctly
...
Per section 7.7.3, the structure includes additional optional layer-specific
information, which is padded if left unset, based on the value of
max_sub_layers_minus1. The vulkan input structs have no way to specify this
per-layer information, so we just need the padding.
Reviewed-by: Hyunjun Ko <zzoon@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29001 >
2024-05-02 23:51:56 +00:00
Kenneth Graunke
8d983b3425
intel/nir: Set src_type on TCS quads workaround store_output
...
We weren't setting this and now it's validated, causing assert failures.
Fixes: 1632948a76 ("nir: validate src_type of store_output intrinsics, require bit_size >= 16")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11107
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29027 >
2024-05-02 13:58:21 -07:00
Thomas H.P. Andersen
42ed28a726
nvk: advertise EXT_depth_range_unrestricted
...
This enables EXT_depth_range_unrestricted from VOLTA_A
Test of dEQP-VK.*depth_range_unrestricted* on TU104 shows:
Test run totals:
Passed: 14212/14212 (100.0%)
Failed: 0/14212 (0.0%)
Not supported: 0/14212 (0.0%)
Warnings: 0/14212 (0.0%)
Waived: 0/14212 (0.0%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28958 >
2024-05-02 20:21:00 +00:00
Faith Ekstrand
5d37a5c7b6
nvk: Only clip Z with the guardband
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28958 >
2024-05-02 20:21:00 +00:00
Faith Ekstrand
14d749f13d
nak: Don't saturate depth writes
...
This is unnecessary in Vulkan and prevents unrestricted depth.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28958 >
2024-05-02 20:21:00 +00:00
Derek Foreman
c6dc61775f
wsi/wayland: Add tracepoint in wsi_wl_swapchain_wait_for_present
...
We can spend a lot of time in wait_for_present, making it an interesting
trace point.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:27 +00:00
Derek Foreman
c4b432f83e
wsi/wayland: Add a perfetto track for image presentation
...
Now that we have flows, custom tracks, and timestamps, we can have a track
for wayland buffer presentation times, tagged with appropriate flow ids
so we can follow when a buffer was acquired through to the time it was
displayed.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:26 +00:00
Derek Foreman
e9596149cf
perfetto: Add some functions for timestamped events
...
This can be useful if we know when an event happened, but our code isn't
running at that time (such as reporting when an image was presented in
the wayland wsi).
We can't really mix these with events that we log at the current time,
because there could be overlap, so also add a function for creating
custom tracks.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:26 +00:00
Derek Foreman
57c03fe49c
wsi/wayland: Add latency information to perfetto profiling
...
When using presentation feedback, we know when an image is presented. Use
this and the time we submit the image to calculate the delay in ms
between submission and display.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:26 +00:00
Derek Foreman
60eb27591f
perfetto: Add simple support for counters
...
Perfetto can report time varying numberic values (counters) in tracks.
Add some simple functions to use this.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:26 +00:00
Derek Foreman
34273bc4ed
wsi/wayland: Add timing debugging
...
If perfetto is tracing, always send presentation feedback requests
for image presentations.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:26 +00:00
Derek Foreman
23b4fb2b4c
wsi/wayland: Add flow id to presentation feedback
...
When we use waitforpresent we use presentation feedback. We can plumb
the flow ids into this to have slightly more expressive flows.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:26 +00:00
Derek Foreman
5ba7b3f40c
wsi/wayland: Add perfetto flows to image acquisition and presentation
...
Generate flow ids for slightly more informative swapchain profiling.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:26 +00:00
Derek Foreman
16b8dbedfa
perfetto: Add flows
...
Perfetto can assign flow ids to events, which can be used to connect
related events in tracks when they share the same id.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:26 +00:00
Derek Foreman
8b460cf9b5
egl/wayland: Use loader_wayland_dispatch
...
This is just to get event tracing in perfetto, as the wrapper calls
MESA_TRACE_FUNC().
It can be useful to see how long and when we stall in wayland dispatch.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:26 +00:00
Derek Foreman
90effcceab
wsi/wayland: refactor wayland dispatch
...
Add a thin wrapper around the wayland dispatch code for no reason other
than to add MESA_TRACE_FUNC so we can see where wayland dispatch delays
are.
Move this to loader so we can use it in the wayland egl code later.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:26 +00:00
Sebastian Wick
1062b3e813
vulkan/wsi/wayland: refactor wsi_wl_swapchain_wait_for_present
...
Split it into a part that dispatches and a part that waits for the
requested id.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28634 >
2024-05-02 19:37:26 +00:00
Philipp Zabel
0554d11f1e
etnaviv/nn: Pipe through input/accumulation buffer depth from hwdb
...
Stop hard coding accumulation buffer depth and input buffer depth to the
values for VIPNano-QI. This is allows to calculate correct tile sizes
for other cores.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de >
Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28956 >
2024-05-02 19:17:58 +00:00
Connor Abbott
e82d70d472
freedreno/a7xx: Add A7XX_HLSQ_DP_STR location from kgsl
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29025 >
2024-05-02 18:48:24 +00:00
Connor Abbott
37f9a7a9c2
freedreno/a7xx: Add AQE-related registers from kgsl
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29025 >
2024-05-02 18:48:23 +00:00
Amber
bed4ad26ad
tu: Disable depth and stencil tests when attachment state requires it
...
The depth and stencil tests should be disabled in case the respective
attachments are null in VkRenderingInfo or their format is undefined in
VkPipelineRenderingCreateInfo, additionally the stencil test should be
disabled in case the depth/stencil attachment has no stencil component.
Fixes:
dEQP-VK.pipeline.*.stencil.no_stencil_att.*.d24_unorm_s8_uint
dEQP-VK.pipeline.*.stencil.no_stencil_att.*.x8_d24_unorm_pack32
Signed-off-by: Amber Harmonia <amber@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28556 >
2024-05-02 18:18:52 +00:00
Juan A. Suarez Romero
03474500b5
vc4/ci: update results
...
Add new crashes caused by 1632948a76 ("nir: validate src_type of
store_output intrinsics, require bit_size >= 16").
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29024 >
2024-05-02 16:45:07 +00:00
Sviatoslav Peleshko
39c4de7e42
anv: Fix descriptor sampler offsets assignment
...
This seems to be a simple copy-paste mistake. It makes sense to or-assign
surface offsets because we clear the actual offset part with a mask first,
but sampler offsets should be just assigned instead.
Fixes: 7c76125d ("anv: use 2 different buffers for surfaces/samplers in descriptor sets")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10790
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29019 >
2024-05-02 14:49:37 +00:00
José Roberto de Souza
be518657b9
intel/perf: Change oa_format to uint64_t
...
Xe KMD will not provide a enum with formats, instead UMD needs set
a uint64_t with type, counter_sel, counter_size and bc_report for the
format.
So here changing from int to uint64_t, it do not causes any issues for
i915 and makes it ready for Xe KMD.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28997 >
2024-05-02 14:25:41 +00:00
José Roberto de Souza
9cb4ff9b0e
intel/perf: Fix the error check of i915_add_config()
...
i915_add_config() returns 0 for error or a positive integer for success
but callers were checking for a negative number for errors.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28997 >
2024-05-02 14:25:41 +00:00
José Roberto de Souza
a56dc30ba6
intel/perf: Remove i915_drm.h include from gen_perf.py
...
The generated file don't use any symbol in i915_drm.h
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28997 >
2024-05-02 14:25:40 +00:00
José Roberto de Souza
14b890c797
intel/perf: Nuke platform_supported
...
Only set, never used.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28997 >
2024-05-02 14:25:40 +00:00
Karmjit Mahil
ad4c24b797
zink: Add missing currentExtent special value handling
...
Fixes: 0217a7c007 ("zink: handle swapchain currentExtent special value")
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29020 >
2024-05-02 13:06:48 +01:00
Corentin Noël
b69189a279
zink: Always call deinit_multi_pool_overflow when destroying zink_descriptor_pool_multi
...
Make sure to never leak any vkDescriptorPool as the zink_descriptor_pool_multi might
get released before the overflow array get emptied.
Found with the validation layer and piglit
`spec@glsl-1.30 @execution@tex-miplevel-selection texturegradoffset 1darray`
Signed-off-by: Corentin Noël <corentin.noel@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29018 >
2024-05-02 11:33:44 +00:00
Georg Lehmann
d4084f7f09
aco/lower_to_hw: remove gfx6/7 subdword paths
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836 >
2024-05-02 11:09:36 +00:00
Georg Lehmann
6ecbda83f8
aco/ra: remove gfx6/7 subdword paths
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836 >
2024-05-02 11:09:35 +00:00
Georg Lehmann
d914ff3aa5
aco: add tests for lower_subdword
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836 >
2024-05-02 11:09:35 +00:00
Georg Lehmann
47566d0df3
aco: add a subdword lowering pass
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836 >
2024-05-02 11:09:35 +00:00
Georg Lehmann
6b35de971c
aco/lower_to_hw: don't use regClass to identify subdword reductions
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836 >
2024-05-02 11:09:35 +00:00
Samuel Pitoiset
8c4d0b287f
radv: emit compute pipelines directly from the cmdbuf
...
Using this intermediate CS isn't really useful and it prevents us to
optimize register writes in the near future. This will also be removed
for graphics pipelines.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28977 >
2024-05-02 10:39:03 +00:00
Timur Kristóf
72a73a6f8a
ac/nir/legacy: Use new pre-rasterization output info helper.
...
For legacy VS/TES and GS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936 >
2024-05-02 12:05:52 +02:00
Timur Kristóf
4ac0727f87
ac/nir/ngg: Use new pre-rasterization output info helper.
...
For NGG VS/TES and GS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936 >
2024-05-02 12:05:39 +02:00
Timur Kristóf
b1819d60ea
ac/nir: Add helper for pre-rasterization output info.
...
This is made to unify the handling of outputs in all
different pre-rasterization lowerings.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936 >
2024-05-02 12:05:08 +02:00
Timur Kristóf
039e739eea
ac/nir: Move some helpers to new file.
...
Also remove nir_builder include from ac_nir.h.
This is done so that driver code doesn't need to be recompiled
when some internal parts of ac/nir in the new helper header
is changed.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936 >
2024-05-02 12:04:53 +02:00
Timur Kristóf
cd66b77af0
aco: Add missing nir_builder include.
...
We would like to avoid including it in ac_nir.h
so ACO will need to include nir_builder.h on its own.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936 >
2024-05-02 12:04:04 +02:00
Rohan Garg
e50234de86
anv: allocate space for generated indirect draw id's using the temporary allocation helper
...
Generated Indirect Draw's need a small temporary allocate to store draw
id's. Use the new temporary allocation helper to allocate that space.
Fixes: 82d772fa9b ("anv: create new helper for small allocations")
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28989 >
2024-05-02 08:32:09 +00:00
Yusuf Khan
482d9fcbf3
nouveau: Fix crash when destination or source screen fences are null
...
Fixes: dEQP-EGL.functional.sharing.gles2.multithread.random_egl_sync.*,
one of them, its quite finiky, one may say random
Signed-off-by: Yusuf Khan <yusisamerican@gmail.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28618 >
2024-05-02 08:07:49 +00:00
Christian Gmeiner
5aede1a157
etnaviv: isa: Do src swizzle with isaspec
...
Remove this logic from the gallium driver and just use the src's as
provided by nir. The special cases, where there is no 1:1 mapping, do
still exist.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28922 >
2024-05-02 07:44:00 +00:00
Jesse Natalie
894f7f4387
nir_opt_algebraic: Add a couple optimizations for lowered unpack(pack())
...
I noticed some unnecessary 64-bit ints in shaders that were using doubles.
Perhaps there's a different missing optimization that should run on the
actual pack/unpack instructions before they're lowered, or maybe I'm just
lowering them too early, but these seem simple enough that we might want
them even for hand-rolled pack/unpack pairs.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27314 >
2024-05-01 21:55:20 +00:00
Iván Briano
a24ed1146d
anv: consolidate DestroyPipeline for graphics and graphics_lib
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29011 >
2024-05-01 21:07:28 +00:00
Iván Briano
6223388c73
anv: fix casting to graphics_pipeline_base
...
The macro takes the type of the pipeline to check for, but the cast to
base checks for a full graphics pipeline, so if used on a library one it
fails.
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29011 >
2024-05-01 21:07:28 +00:00
Marek Olšák
d802aca523
nir/lower_image: support FMASK loads with a 16-bit sample index
...
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845 >
2024-05-01 19:41:35 +00:00
Marek Olšák
a01712874d
nir/lower_tex: support FMASK loads with a 16-bit sample index
...
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845 >
2024-05-01 19:41:35 +00:00
Marek Olšák
8f1ae6c7b1
nir: add shader_info::use_aco_amd
...
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845 >
2024-05-01 19:41:35 +00:00
Marek Olšák
fcb627945b
nir: add more build helpers
...
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845 >
2024-05-01 19:41:35 +00:00
Marek Olšák
1632948a76
nir: validate src_type of store_output intrinsics, require bit_size >= 16
...
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845 >
2024-05-01 19:41:35 +00:00
Mike Blumenkrantz
0217a7c007
zink: handle swapchain currentExtent special value
...
according to spec this is somehow legal
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29003 >
2024-05-01 15:47:53 +00:00
Eric Engestrom
2827ec97f8
lavapipe/ci: skip ray tracing tests that sometimes time out
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29002 >
2024-05-01 15:27:27 +00:00
Eric Engestrom
3369ec9ade
lavapipe/ci: generalize flakes list to all formats for these flaky tests
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29002 >
2024-05-01 15:27:27 +00:00
Eric Engestrom
71dded5f25
lavapipe/ci: add flakes seen lately
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29002 >
2024-05-01 15:27:27 +00:00
Eric Engestrom
165e21a5f8
lavapipe/ci: trigger jobs on draw & gallivm changes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29006 >
2024-05-01 16:50:13 +02:00
Eric Engestrom
7586d4fd5c
llvmpipe/ci: trigger jobs on draw & gallivm changes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29006 >
2024-05-01 16:50:06 +02:00
Eric Engestrom
e0dae5a322
docs: update calendar for 24.1.0-rc2
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29005 >
2024-05-01 14:30:59 +00:00
Eric Engestrom
8654809dda
lavapipe/ci: only run jobs when their corresponding files are changed
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29004 >
2024-05-01 15:19:36 +02:00
Eric Engestrom
e2b6828981
lavapipe/ci: avoid running all lavapipe jobs when llvmpipe ci is changed
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29004 >
2024-05-01 15:19:36 +02:00
Eric Engestrom
e4feeacf59
lavapipe/ci: fix indentation
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29004 >
2024-05-01 15:19:36 +02:00
Eric Engestrom
b38f52482b
llvmpipe/ci: only run jobs when their corresponding files are changed
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29004 >
2024-05-01 15:19:36 +02:00
Eric Engestrom
d9fafdad06
llvmpipe/ci: fix indentation
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29004 >
2024-05-01 15:19:36 +02:00
Eric Engestrom
47f6e24ad5
meson: move tsan-blacklist.txt to build-support with the other build support files
...
Fixes: 0d46e0e88b ("meson: Add blacklist when compiling with tsan")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28996 >
2024-05-01 07:05:12 +00:00
Kenneth Graunke
84139470a5
intel/brw: Use VEC for emit_unzip()
...
Helps make SIMD-split code more SSA-friendly.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:54 -07:00
Kenneth Graunke
1b54b4fad5
intel/brw: Use VEC for NIR vec*() sources
...
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:50 -07:00
Kenneth Graunke
d4563747d9
intel/brw: Use VEC for output stores
...
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:49 -07:00
Kenneth Graunke
f0c29c9b71
intel/brw: Use VEC for FS outputs
...
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:49 -07:00
Kenneth Graunke
cbe7a13f2b
intel/brw: Use VEC for TCS/TES/GS input/output loads
...
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:48 -07:00
Kenneth Graunke
a94e1bd0ac
intel/brw: Use VEC for gl_FragCoord
...
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:47 -07:00
Kenneth Graunke
d0a24496fd
intel/brw: Use VEC for load_const
...
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:45 -07:00
Kenneth Graunke
3c867bf2c7
intel/brw: Add a new VEC() helper.
...
This gathers a number of sources into a contiguous vector register.
Eventually, the plan is that it will use a MOV for a single source,
or LOAD_PAYLOAD for multiple sources. For now, it emits a series of
MOVs to allow us to rewrite a bunch of existing code to use the new
helper, then change them all over at once later.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:42 -07:00
Kenneth Graunke
c194df565a
intel/brw: Don't include unnecessary undefined values in texture results
...
When emitting a sampler message, we allocate a temporary destination
large enough to hold 4 values (or 5 for sparse). This is the maximum
size needed to hold any result. However, we shrink the size written by
the sampler message to skip writing any trailing components that NIR
tells us are never read. So we may not write the entire temporary.
The NIR texture instruction has a destination VGRF which is sized
assuming that all components are present. We issue a LOAD_PAYLOAD
instruction to copy our sampler result temporary to the NIR destination.
When we reduce the response length of the sampler messages, then some of
these temporary components have undefined values. The correct way to
indicate that is by using a BAD_FILE source. Unfortunately, we were
naively reading offsets of the temporary that were never written, but
are still part of a larger VGRF. This complicates things.
For example, sampling and only using RGB (not RGBA) was producing this:
txl_logical(8) (written: 3) vgrf3+0.0:F, ...
undef(8) (written: 4) vgrf4:UD
load_payload(8) (written: 4) vgrf4:F, vgrf3+0.0:F, vgrf3+1.0:F, vgrf3+2.0:F, vgrf3+3.0:F
The last source, vgrf3+3.0:F, is undefined, and should be BAD_FILE.
Doing so allows VGRF splitting and other optimizations to work better.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:41 -07:00
Kenneth Graunke
e42914529a
intel/brw: Support CSE on more ops
...
This has no changes in shader-db or fossil-db, surprisingly, but at
least CSEL will be useful shortly. Presumably the others may matter
somewhere.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:40 -07:00
Kenneth Graunke
ed3e4c16dc
intel/brw: Do not create empty basic blocks when removing instructions
...
If there's only a single instruction in a basic block, then removing it
would create an empty block. We seem to have trouble representing those
as there are no instructions with an IP inside the block; several places
mess up connections. While most blocks end in control flow instructions
(which are rarely eliminated), ones preceding a DO instruction may end
in an ordinary instruction. This makes such blocks tricky to merge with
adjacent blocks - they may be between loops. Any optimization pass may
may find such an instruction and want to eliminate it, and most of them
are unprepared to perform such CFG link surgery. Nor do we want to make
every pass aware of this issue.
To work around this, we simply replace an instruction with a NOP when
removing it from a block containing only that instruction, leaving the
block in place.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:39 -07:00
Kenneth Graunke
391da3610c
intel/brw: Print W/UW immediates correctly
...
We were printing 24w as 0x180018d which not only scarily shows the
wrong type, but also the replicated format of the word.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971 >
2024-04-30 17:16:33 -07:00
Simon Ser
72ed71877c
glapi: fix param type in TexGenxOES
...
The spec [1] and _mesa_TexGenxOES both agree that it's GLfixed
instead of GLint.
[1]: https://registry.khronos.org/OpenGL/extensions/OES/OES_texture_cube_map.txt
Signed-off-by: Simon Ser <contact@emersion.fr >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28825 >
2024-05-01 00:47:59 +02:00
Eric Engestrom
54258c1ee1
lavapipe/ci: skip another test that goes over the timeout
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28995 >
2024-04-30 22:51:03 +02:00
Eric Engestrom
0b739f7db8
lavapipe/ci: add the rest of the failures introduced by the 1.3.8.2 uprev
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28995 >
2024-04-30 22:51:03 +02:00
Eric Engestrom
c7d4b7a59c
lavapipe/ci: drop fixed test from failures
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28995 >
2024-04-30 22:51:03 +02:00
Eric Engestrom
a963c67298
meson: use bool.to_int() instead of manually converting
...
Suggested-by: @dbaker
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28990 >
2024-04-30 18:34:08 +00:00
Marek Olšák
f9d78f110c
nir: add sleep intrinsics for AMD
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-By: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889 >
2024-04-30 17:17:25 +00:00
Marek Olšák
b06a71b3cd
nir: add streamout intrinsics for AMD GFX12
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-By: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889 >
2024-04-30 17:17:25 +00:00
Marek Olšák
1a791c1303
nir: add nir_atomic_op_ordered_add_gfx12_amd
...
for streamout
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-By: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889 >
2024-04-30 17:17:25 +00:00
Marek Olšák
d4cfcbdde8
nir: add ACCESS_CP_GE_COHERENT_AMD
...
required by amd gfx12
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-By: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889 >
2024-04-30 17:17:25 +00:00
Eric Engestrom
7187373ec2
meson: always set USE_LIBGLVND
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28947 >
2024-04-30 16:22:50 +00:00
Eric Engestrom
21b527632e
egl+glx: fix two #ifdef that should be #if like the rest
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28947 >
2024-04-30 16:22:50 +00:00
Eric Engestrom
11b060f41a
meson: simplify -gsplit-dwarf compiler argument check
...
Fixes: 44b080af07 ("meson: implement split-debug")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28898 >
2024-04-30 15:30:59 +00:00
Erik Faye-Lund
dd3ee08b05
docs/panfrost: link to conformant products
...
Let's link to the conformant products page on the Khronos' website, in
case someone wants to look at some of the details of the submissions.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28968 >
2024-04-30 13:19:49 +00:00
Connor Abbott
fe4ebace79
ir3: Don't manually scalarize SSBO loads
...
We call nir_lower_io_to_scalar already, so this should be dead code.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28949 >
2024-04-30 12:01:52 +00:00
Connor Abbott
cd15dec66e
ir3: Don't scalarize all SSBO instructions
...
Use the newly-introduced filter to only scalarize the instructions we
need to scalarize.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28949 >
2024-04-30 12:01:52 +00:00
Samuel Pitoiset
86281ef15f
radv: add shaders BO to the cmdbuf BO list at bind time
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965 >
2024-04-30 07:18:08 +00:00
Samuel Pitoiset
42554e81b9
radv: add RT prolog BO to the cmdbuf BO list at bind time
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965 >
2024-04-30 07:18:08 +00:00
Samuel Pitoiset
42dc4b463b
radv: add GS copy shader BO to the cmdbuf BO list at bind time
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965 >
2024-04-30 07:18:08 +00:00
Samuel Pitoiset
2664e058de
radv: use the bound GS copy shader when emitting shader objects
...
Similar but doesn't rely on shader_objs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965 >
2024-04-30 07:18:08 +00:00
Samuel Pitoiset
be98fe2724
radv: pre-compute VGT_TF_PARAM.DISTRIBUTION_MODE
...
For less CPU overhead.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965 >
2024-04-30 07:18:08 +00:00
Samuel Pitoiset
d7679c0370
radv: remove useless DB_Z_INFO.NUM_SAMPLES when emitting the MSAA state
...
DB_Z_INFO.NUM_SAMPLES is now correctly set when a null framebuffer is
emitted and this is redundant.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965 >
2024-04-30 07:18:08 +00:00
Samuel Pitoiset
4dd682e227
radv: inline radv_get_pa_su_sc_mode_cntl() in radv_emit_culling()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965 >
2024-04-30 07:18:08 +00:00
Samuel Pitoiset
e651a2c856
radv: simplify radv_emit_primitive_restart_enable()
...
Move emitting VGT_MULTI_PRIM_IB_RESET_INDX into the GFX6-8 branch.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965 >
2024-04-30 07:18:08 +00:00
Christian Gmeiner
d1e5b13359
mr-label-maker: Add teflon marker
...
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28959 >
2024-04-30 07:13:18 +00:00
Marek Olšák
8416ba9c25
amd/ci: 17 piglit failures are fixed for raven
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846 >
2024-04-30 06:47:21 +00:00
Marek Olšák
98e976dcdb
radeonsi: check for FMASK correctly in gfx10_get_bin_sizes
...
so that this code is skipped on gfx11+
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846 >
2024-04-30 06:47:21 +00:00
Marek Olšák
1a3c5cf17b
radeonsi: enable DCC for MSAA on gfx10-10.3
...
It improves performance of the MSAA resolving tests.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846 >
2024-04-30 06:47:21 +00:00
Marek Olšák
eb7d747651
radeonsi: add workarounds for DCC MSAA for gfx9-10
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846 >
2024-04-30 06:47:21 +00:00
Marek Olšák
1929bb0d8d
radeonsi: validate IO semantics in scan_io_usage
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846 >
2024-04-30 06:47:21 +00:00
Marek Olšák
cfe197e61c
radeonsi: fix KHR-GL46.texture_lod_bias.texture_lod_bias_all on gfx10-11
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846 >
2024-04-30 06:47:20 +00:00
Marek Olšák
6f09751548
radeonsi: don't invalidate L2 for internal compute without DCC stores
...
When internal compute shaders are used, existing shader images are not
fully unbound, which means any image can be bound, even if the internal
shader doesn't use images.
This strengthens the code by applying it only to images used by internal
compute shaders.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846 >
2024-04-30 06:47:20 +00:00
Marek Olšák
c87ce78d10
ac/surface: enable thick tiling for 3D textures for better perf on gfx6-8
...
This increases performance 2.5x for Viewperf/Energy on Tonga.
The value of thick_tiling is also fixed.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846 >
2024-04-30 06:47:20 +00:00
Marek Olšák
33f642aa09
ac/surface: disable DCC for 3D textures on gfx9 to improve performance
...
This improves Viewperf/Energy perf by 60% on Vega10.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846 >
2024-04-30 06:47:20 +00:00
Marek Olšák
e05aec3fcd
ac/gpu_info: set tcc_rb_non_coherent only if number of TCCs != number of RBs
...
This sets it to false for Navi31 to eliminate unnecessary L2 cache
invalidations.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846 >
2024-04-30 06:47:20 +00:00
Iago Toral Quiroga
027c01bd8f
v3d,v3dv: stop hard-coding max attrib divisor
...
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28964 >
2024-04-30 06:27:21 +00:00
Iago Toral Quiroga
e8f96dd0b0
v3dv: fix VK_KHR_vertex_attribute_divisor
...
When this was promoted to EXT it expanded its properties struct to add a new
supportsNonZeroFirstInstance field.
Fixes: d38ff02c03 ("v3dv: mark some promoted extensions as supported")
Fixes: dEQP-VK.api.info.vulkan1p2_limits_validation.khr_vertex_attribute_divisor
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28964 >
2024-04-30 06:27:21 +00:00
Patrick Lerda
fe8fdc58db
gallium/auxiliary/vl: fix typo which negatively impacts the src_stride initialization
...
Note: As a matter of fact, this change by itself makes vdpau on r600 works again.
Indeed, r600 sets the stride value with vertex_buffer_index as the r600 index;
vertex_buffer_index was set to zero at the vl_compositor/init_buffers() stage on
the three elements. As a consequence of this typo the stride value was overwritten
to zero. This was breaking vdpau.
Fixes: 76725452 ("gallium: move vertex stride to CSO")
Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10468
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10267
Signed-off-by: Patrick Lerda <patrick9876@free.fr >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28966 >
2024-04-30 05:45:21 +00:00
Martin Krastev
3daee9b677
svga: update timespan in copyright message
...
Update copyright timespans to include 2024.
Signed-off-by: Martin Krastev <martin.krastev@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28647 >
2024-04-30 03:36:16 +00:00
Martin Krastev
901269955d
svga: convert license block to SPDX
...
* adopt a simplified SPDX scheme -- drop inline licenses
* switch copyright from VMware to Broadcom
Signed-off-by: Martin Krastev <martin.krastev@broadcom.com >
Reviewed-by: Jose Fonseca <jose.fonseca@broadcom.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28647 >
2024-04-30 03:36:16 +00:00
Mike Blumenkrantz
ad39355e83
kopper: don't set drawable buffer age
...
this is broken
Fixes: 2a8c6cf7ac ("kopper: set drawable buffer age")
Acked-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28904 >
2024-04-29 23:08:11 +00:00
Mike Blumenkrantz
19e8df39b6
zink: slightly better swapinterval failure handling
...
retain the old mode and print an error
cc: mesa-stable
Acked-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28904 >
2024-04-29 23:08:11 +00:00
Mike Blumenkrantz
a50c17802a
kopper: fix bufferage/swapinterval handling for non-window swapchains
...
if swapchain creation fails (e.g., insane cts swapchain configs), the
swapchain gets demoted to a non-window image that is still accessed by
the frontend. this image should not ever hit corresponding zink entrypoints
for swapchain-only images, which requires a flag to test swapchain-edness
cc: mesa-stable
Acked-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28904 >
2024-04-29 23:08:11 +00:00
JCWasmx86
7352f948be
meson: Fix invalid kwarg name
...
Introduced in !28576
Fixes: 44b080af ("meson: implement split-debug")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28924 >
2024-04-29 20:52:12 +00:00
Erik Faye-Lund
8248cc0bf4
docs/panfrost: move details to separate articles
...
The front-page of the docs is currently fairly intimidating, by diving
into details rather abruptly. Let's try to make it a bit easier to
navigate t by moving the details to their own articles, but linking them
from the front-page.
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28953 >
2024-04-29 13:24:51 +00:00
Erik Faye-Lund
da2cc20714
docs/panfrost: compact gpu-table
...
This table is getting long and terse, let's compact it a bit.
Acked-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28953 >
2024-04-29 13:24:51 +00:00
Christian Gmeiner
2cb8e9a856
etnaviv: isa: Add name for full writemask
...
Is needed to generate a nicer code.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28929 >
2024-04-29 13:02:28 +00:00
Christian Gmeiner
cb69595037
etnaviv: isa: Rework modeling of left shift for store/load
...
This makes is easier for the parser to process.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28929 >
2024-04-29 13:02:27 +00:00
Christian Gmeiner
f8c38ec648
etnaviv: isa: Add more flags to etna_inst
...
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28929 >
2024-04-29 13:02:27 +00:00
Christian Gmeiner
a0dad2e705
etnaviv: isa: Switch to enum isa_thread
...
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28929 >
2024-04-29 13:02:27 +00:00
Christian Gmeiner
87e5ad3930
etnaviv: isa: Print dst_full for ALU
...
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28929 >
2024-04-29 13:02:27 +00:00
Christian Gmeiner
0c70dcd6f7
etnaviv: isa: Add clang-format special comments
...
We want to keep the defines as formated as they are.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28929 >
2024-04-29 13:02:27 +00:00
David Rosca
bc72126cb4
radeonsi/vcn: Only enable VBAQ with rate control mode
...
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10020
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28945 >
2024-04-29 12:38:33 +00:00
David Rosca
b144f50190
radeonsi/vcn: Fix 10bit HEVC VPS general_profile_compatibility_flags
...
Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28945 >
2024-04-29 12:38:33 +00:00
David Rosca
cc0df497f0
radeonsi/vcn: Allocate session buffer in VRAM
...
It's never mapped so there's no reason for PIPE_USAGE_STAGING.
Improves encoding performance on dGPUs.
Tested with 7900XTX (before 1900fps => after 2100fps):
ffmpeg -hide_banner -hwaccel vaapi -hwaccel_device /dev/dri/renderD128 \
-f lavfi -i testsrc=size=640x640,format=nv12 -vf hwupload -c:v av1_vaapi \
-f null -
Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28945 >
2024-04-29 12:38:33 +00:00
Samuel Pitoiset
0b51868193
radv: remove bogus VkShaderCreateInfoEXT::flags being 0 assert for compute
...
This was a leftover. Flags can be different than 0, like for required
subgroup size and it should already be correctly supported.
Fixes recent dEQP-VK.shader_object.performance.dispatch_base.
Fixes: 37d7c2172b ("radv: add support for creating/destroying shader objects")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28946 >
2024-04-29 11:45:03 +00:00
Christian Gmeiner
8c2a749f67
etnaviv: isa: Drop capturing of python output
...
Is nicer for meson.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: Dylan Baker <dylan@pnwbakers.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28875 >
2024-04-29 11:26:03 +00:00
Samuel Pitoiset
85deb9f706
radv: simplify DB_Z_INFO.NUM_SAMPLES with null ds target on GFX11
...
According to PAL, the hw uses the smaller value of
DB_Z_INFO.NUM_SAMPLES and PA_SC_AA_CONFIG.MSAA_EXPOSED_SAMPLES when
there is no bound depth/stencil buffer, and it uses 8x to make sure
the used value is MSAA_EXPOSED_SAMPLES.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28952 >
2024-04-29 11:02:02 +00:00
Eric Engestrom
45edd99b6b
ci: mark microsoft farm as offline
...
It's having issues right now.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28967 >
2024-04-29 12:53:51 +02:00
Kenneth Graunke
674e89953f
intel/brw: Use new builder helpers that allocate a VGRF destination
...
With the previous commit, we now have new builder helpers that will
allocate a temporary destination for us. So we can eliminate a lot
of the temporary naming and declarations, and build up expressions.
In a number of cases here, the code was confusingly mixing D-type
addresses with UD-immediates, or expecting a UD destination. But the
underlying values should always be positive anyway. To accomodate the
type inference restriction that the base types much match, we switch
these over to be purely UD calculations. It's cleaner to do so anyway.
Compared to the old code, this may in some cases allocate additional
temporary registers for subexpressions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28957 >
2024-04-29 07:51:45 +00:00
Kenneth Graunke
4c2c49f7bc
intel/brw: Add builder helpers that allocate temporary destinations
...
In many cases, we calculate an expression by generating a series of
instructions. We'd either overwrite the same register repeatedly,
or call vgrf(BRW_TYPE_X) repeatedly to allocate temporaries for each
intermediate step. In many cases, we overwrote the same register simply
because allocating and naming temporaries for each step was annoying.
This commit adds new builder helpers that will allocate a temporary
destination for you, using simple type interference: unary operations
use the source type, and binary operations require a matching base type
and return the largest of the two types.
The helpers return the destination register, allowing us to write in an
expression-tree style, chaining together builder operations to produce
whole values. Sort of like nir_builder. We still optionally will write
out the fs_inst pointer in case the caller wants to do things like set
predicates or saturation.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28957 >
2024-04-29 07:51:45 +00:00
Kenneth Graunke
319ba85e10
intel/brw: Add builder helpers for math functions
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28957 >
2024-04-29 07:51:45 +00:00
Kenneth Graunke
cf8ed9925f
intel/brw: Make a helper for finding the largest of two types
...
Some instructions can operate on mixed types. Typically this is
something like a binary operation with UD and UW sources resulting
in a UD destination. In order to make it easier to find the result
type of such operations, let's make a type helper that returns the
larger of the two types (but requires the base type to match).
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28957 >
2024-04-29 07:51:45 +00:00
Kenneth Graunke
f5473e6edd
intel/brw: Don't use inst return value when it isn't needed
...
We just want to emit an instruction, but we don't need to do anything
further with it, so we don't need to store the resulting inst pointer
anywhere.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28957 >
2024-04-29 07:51:45 +00:00
Samuel Pitoiset
dfe5e56671
radv/ci: add more flakes
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28963 >
2024-04-29 08:34:45 +02:00
David Heidelberg
42b992cfab
turnip: rename tu_queue_submit struct to follow ODR
...
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28728 >
2024-04-28 20:06:33 -07:00
Konstantin Seurer
ea863c0c1c
nir/print: Do not access invalid indices of load_uniform
...
load_uniform does not have io_semantics and component.
Fixes: a83fd26 ("nir/print: stop trying to match i/o vars using base/driver_location")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28962 >
2024-04-28 16:06:46 +02:00
Karol Herbst
cc9141f044
rust/program: remove Program::kernels
...
This was a terrible method as it cloned the entire list on each call.
Instead consumers should just take the lock and operate on a slice instead
to lower CPU overhead.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28872 >
2024-04-27 18:19:53 +00:00
Karol Herbst
d8ed73b5f6
rusticl/program: Arc the stored KernelInfo
...
This way we don't have to constantly copy the full thing at kernel
creation time lowering CPU overhead significantly.
With the previous changes clCreateKernel is basically for free.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28872 >
2024-04-27 18:19:53 +00:00
Karol Herbst
672de78d66
core/kernel: skip validating unique kernel signatures
...
We do not support it at runtime anyway and assert on them to be unique
across devices at build time. This significantly reduces overhead of
clCreateKernel as this is something applications actually rely on being
fast.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28872 >
2024-04-27 18:19:52 +00:00
Georg Lehmann
6ab4b2d7a0
spirv: preserve signed zero in modf
...
fsign's result can be +0.0 or -0.0 for -0.0. We already calculate
the signed zero, it's even faster to replace the fmul(fsign(x), ...) with ior.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28938 >
2024-04-26 21:31:53 +00:00
Philipp Zabel
c2053c5363
etnaviv: Allow collecing both GPU and NPU specs
...
If the primary core is a GPU, but a separate NPU exists, collect
NPU specs in addition to GPU specs.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28921 >
2024-04-26 19:30:08 +00:00
Philipp Zabel
a4653587cc
etnaviv: Add a separate NPU pipe
...
Add a separate pipe for the NPU device when the primary device is a GPU.
In case of compute-only contexts, prefer to use the separate NPU pipe.
This allows to create a compute-only context that uses the NPU pipe on
a screen that has a 3D GPU as primary device.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28921 >
2024-04-26 19:30:08 +00:00
Philipp Zabel
108d2103ea
etnaviv: Pass npu to etna_screen_create in a separate parameter
...
Allow to pass both gpu and npu to etna_screen_create() separately,
in preparetion for devices with both 3D GPU and NPU.
Iterate over all cores or until both GPU and NPU are found.
If no 3D GPU was found, screen->gpu will be set to the npu as well,
so nothing changes for NPU-only devices.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28921 >
2024-04-26 19:30:08 +00:00
Philipp Zabel
06683288e0
etnaviv: drm: Stop after model query failure
...
Calling etna_gpu_new() with a nonexisting core can happen when iterating
all cores. Bail immediately if querying the model failed, there is no
use in also failing to query the revision.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28921 >
2024-04-26 19:30:08 +00:00
Philipp Zabel
ba59882212
etnaviv: drm: Suppress get-param error message for non-existent core
...
The -ENXIO return value isn't necessarily an error condition.
When iterating over cores, this signals that there are no more
cores to be found.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28921 >
2024-04-26 19:30:08 +00:00
Yiwei Zhang
4ec84adbed
venus: fix to destroy all pipeline handles on early error paths
...
For early error returns, all pipeline handles have to be destroyed.
Otherwise the caller will treat those valid handles as successfully
created pipeline objects.
Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28944 >
2024-04-26 17:35:29 +00:00
Michel Dänzer
c3be21f177
wsi/wayland: Dispatch event queue in wsi_wl_swapchain_queue_present
...
With explicit sync, only if it wasn't done earlier for FIFO.
Prevents potentially unbounded memory usage for (wl_buffer.release
events in) the queue, since we don't dispatch the queue anywhere else
with explicit sync.
v2:
* Use wl_display_dispatch_queue_pending instead of
wl_display_dispatch_queue_timeout. (Sebastian Wick)
* Call it from wsi_wl_swapchain_queue_present instead of
wsi_wl_swapchain_acquire_next_image_explicit. (Joshua Ashton)
Fixes: 5f7a5a27ef ("wsi: Implement linux-drm-syncobj-v1")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28874 >
2024-04-26 15:11:00 +00:00
Matt Turner
2a417e3fc1
intel: Build float64 shader only for Vulkan
...
It's only used by anv and it requires glslang, which isn't otherwise
required for building iris.
Fixes: b52e25d3a8 ("anv: rewrite internal shaders using OpenCL")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28943 >
2024-04-26 14:08:32 +00:00
Eric Engestrom
bdbcba5269
v3dv/ci: add rpi5 failure
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28950 >
2024-04-26 13:47:37 +00:00
Connor Abbott
b4874aa5cf
ir3: Use scalar ALU instructions when possible
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:14 +00:00
Connor Abbott
32308fe9f1
ir3/nir: Fix imadsh_mix16 definition
...
The constant-folding definition and comments say that it takes the high
16 bits of the first source and low 16 bits of the second source, but
actually it's the opposite. The algebraic optimization, which actually
happens and needs to be correct, was correct but the comment above it
was wrong.
Note that in the way we use it when lowering multiplications, the
ordering doesn't matter.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:14 +00:00
Connor Abbott
17cb1c78bd
ir3: Directly use shared registers when possible
...
Avoid unnecessary copies.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:14 +00:00
Connor Abbott
3bec9e684d
ir3: Rewrite shared reg handling when translating from NIR
...
In the future we will have many ALU instructions passing shared
registers to each other, and surrounding them each with moves to/from
shared registers will severely bloat the IR size coming out of NIR and
make more pointless work for copy propagation. Instead, do something
more like the ACO approach and allow values stored in the hash table to
be shared, and move the burden of emitting a mov to non-shared to
ir3_get_src(). We will then use ir3_get_src_shared() or
ir3_get_src_maybe_shared() as appropriate in cases where we can handle
shared registers or where we can handle both.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:14 +00:00
Connor Abbott
4828942d0c
ir3: Get sources before emitting scan_clusters.macro
...
We will emit conversion move when getting sources and shared-ness
doesn't match, so it needs to be before emitting the instruction.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:14 +00:00
Connor Abbott
ce6c4f0320
ir3: Add scalar ALU-specific passes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
4c4234501f
ir3: Support scalar ALU in the builder
...
Propagate shared-ness to the the source, and when creating an ALU
instruction with all scalar sources and the instruction is supported on
the scalar ALU, automatically make the destination scalar. This includes
MOV/COV.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
823e034db2
ir3: Make type_flags() return a bitmask enum
...
So that it can further be operated on.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
ac132b3f62
ir3: Create reduce identity directly
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
497fcd26b5
ir3: Add builder support for shared immediates
...
In addition to replacing existing no-longer-needed usage of the
readfirst macro, we will use this for other NIR ALU instructions that
need to materialize constants when they use the shared ALU.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
736570b74d
ir3: Add support for ldc.u
...
This will be important for using shared registers as much as possible.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
94c1ff415b
ir3: Distinguish lowered shared->normal moves
...
When we use the scalar ALU we will start inserting moves with different
API-level semantics from readInvocation() or readFirstInvocation(). We
need to distinguish between these moves and lowered readInvocation()
moves, to avoid unnecessarily keeping helper invocations alive when
inserting (eq).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
a64dd98e55
ir3/cf: Don't fold shared conversions
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
0f62203edf
ir3/cp: Support swapping mad srcs for shared regs
...
This was missed when adding shared reg constraints, and helps with
eliminating extra moves caused by uniform (but not const) mad sources.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
ef75ea18cd
ir3: Don't emit single-source collects
...
This will help us propagate shared-ness through to stc when it has a
single component.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
4ffef73bf5
ir3: Immediate source for stc is invalid
...
For some reason some CTS tests are hitting this after removing the
single-source collect.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
37748bbe78
ir3: Validate scalar ALU sources
...
This is a HW restriction that leads to a hang if violated.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
06cf178ede
ir3: Implement source restrictions for shared ALU
...
cat1-cat4 instructions executed on the shared ALU can use shared
registers in an unlimited capacity, as opposed to the vector ALU which
apparently treats shared registers and consts the same. However they
cannot use "normal" sources (which must be "uniformized" via a mov).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
876c5396a7
ir3: Add support for "scalar ALU"
...
On a650 and later, there is a "scalar ALU" capable of executing cat2
instructions, a subset of cat3 instructions (csel but *not* mad), and
cat4 instructions. There is also another copy of the scalar ALU embedded
in HLSQ, which is responsible for executing preambles with the "early
preamble" bit set. The two new features are closely intertwined, because
the scalar ALU makes it possible to make most preambles only use shared
registers, letting us optimistically use shared registers and only fall
back to normal preambles if we ran out of shared registers. But the
scalar ALU is also generally useful for moving calculations of uniform
values like loop indices to the scalar ALU to reduce normal register
pressure and increase parallelism, because like SFU/EFU and texture
units different waves can execute ALU and scalar ALU instructions in
parallel.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
f8ac16b4b9
ir3: Use correct category for OPC_PUSH_CONSTS_LOAD_MACRO
...
This prevents is_scalar_alu() from crashing, and seems like the right
thing to do to prevent other "surprises." Make it have the category of
the instructions it expands to.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
507b51e7ae
ir3/legalize: any/all/getone are non-prefetch helper users
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
4ac1b13f1a
ir3/legalize: Remove bad (eq) micro-optimization
...
At some point I added extra handling for shpe to the initial loop
calculating which blocks need helpers, but forgot to remove the break
above.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
a56de0774b
ir3/legalize: Take (ss) into account in WaR hazards
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
ae2db62aab
ir3: Moves with shared destination are always legal
...
I got this wrong before because I missed the need for (ss), once that
was fixed then a move from anything to a shared register is legal,
include non-shared registers, as long as all active channels have the
same value.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
4ee0f6d1fb
ir3: Allow propagation of normal->shared copies
...
Copies from normal to shared registers are only allowed architecturally
if all of the active threads have the same value for the normal
register, which means that they can normally be propagated into e.g. ALU
instructions or other copies. However, there are a few instruction types
where this is not (currently) allowed, namely the scan macro where the
source is tied to a shared destination and the collect/split macros
where the lowering doesn't currently allow differently-typed sources and
destinations (although we may want to allow that in the future), so we
need to clean up ir3_valid_flags() to catch that.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
b309418380
ir3: Validate that shared registers are in-bound
...
This would've caught some bugs with copy lowering.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
468f070a91
ir3: Reset num when creating parallel copies
...
It may have been overwritten when folding in constants.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
c00e06bc62
ir3: Use INVALID_REG in array store
...
We now use INVALID_REG to mean that a source or destination does not
have a preassigned register. We ignore this for anything but inputs and
outputs for now, but don't make it look like we're preassigning the
array to r0.x. This also will allow us to assert that preassigned
registers are in the correct range.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
b2cf2dfd78
ir3/ra: Use ra_reg_get_num() for validating num
...
This is what the rest of ra validation uses, because it returns the
correct thing for arrays (i.e. the base of the array, instead of the
actual register accessed). num is sometimes not set, so it was causing
spurious assertion failures.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
81015b2620
ir3/lower_copies: Fix "inaccessible" half reg lowering with shared regs
...
With shared phi nodes we may start needing this lowering for the same
reason normal parallel copies need it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
fec5b9397f
ir3/lower_copies: Handle HW bug with shared half-floats
...
In the past we avoided emitting pure 16-bit subgroup macros because of
this bug, but because we're going to start emitting the special moves
they expand to directly, we also have to handle the bug directly.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
100096394f
ir3: Don't use swz with shared registers
...
It seems the two moves it decomposes into aren't always atomically
executed on the scalar ALU, which means that it randomly doesn't work.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
ec036fe51e
ir3: Fix shared parallel copy validation
...
It's legal to have copies from immediate/const to shared, which was
asserting.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
ca91b58457
ir3/lower_pcopy: Fix immed/const flags for copy from shared
...
We were accidentally setting IR3_REG_SHARED on the source for
immediate/const sources.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
90dabe5a18
ir3: Fix lowering shared parallel copies with immed src
...
We need to look at the destination to determine whether the copy should
be classed as shared, because the source may be an immediate.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
4937172534
ir3/ra: Prepare for shared phis
...
Correctly copy the shared-ness to the parallel copy when the destination
is shared.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
a7cae84078
ir3/ra: Fix printing shared reg file
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
478cd71308
ir3/ra: Prepare for shared half-regs
...
Keep track of shared half-reg pressure and make RA aware of the
limitations on shared half-regs, similar to normal half-regs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
f8632862d0
ir3: Rewrite regmask implementation
...
Use ir3_reg_file_offset() in order to properly handle shared half-regs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
90067425a6
ir3/legalize: Use define for register size
...
This was introduced in a previous commit
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
750e6843c0
ir3: Rewrite postsched dependency handling
...
Split up the dependencies into multiple files, similar to RA, and
calculate the file + index. This lets us remove the previous hack we had
and lets us handle half shared registers correctly.
The actual calculation of the file is moved into a shared
ir3_reg_file_offset() function so that it can be reused in other places
which have to check for overlapping registers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
dbeeec2570
ir3/ra: Don't demote movmsk instructions to non-shared
...
It only supports shared register destinations.
Fixes: fa22b0901a ("ir3/ra: Add specialized shared register RA/spilling")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
79c89a3670
ir3: Validate tied sources better
...
Catch when we try to propagate an immediate or const, which can happen
if we forget to specify the valid flags for the instruction, and make
sure that it's the same size and type.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
3c71667dda
ir3: Add scan_clusters.macro to is_subgroup_cond_mov_macro()
...
Fixes: 60413e1 ("ir3: optimize subgroup operations using brcst.active")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Connor Abbott
031b612449
ir3: Add scan_clusters_macro to ir3_valid_flags()
...
Fixes: 60413e1 ("ir3: optimize subgroup operations using brcst.active")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075 >
2024-04-26 12:55:13 +00:00
Alejandro Piñeiro
063ef2254b
v3dv: enable VK_EXT_extended_dynamic_state
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609 >
2024-04-26 12:34:44 +00:00
Alejandro Piñeiro
499d5cb18d
v3dv/ci: update expected list due VK_EXT_extended_dynamic_state
...
Those crashes are gone if VK_EXT_extended_dynamic_state is supported.
It is worth to note that the previous entry mentioned Ricardo's patch
as tentative. That is already on vk-gl-cts main (not still on the tag
used by the CI), and the code at this point has been tested with and
without that patch.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609 >
2024-04-26 12:34:44 +00:00
Alejandro Piñeiro
60e9237e81
v3dv: StencilOp and StencilTestEnable are now dynamic
...
This commit introduces a significant change when we emit STENCIL_CFG,
with any dynamic state: we stop to use cl_emit_with_prepacked, and use
directly cl_emit. The reason is that now most of the STENCIL_CFG
parameters are dynamic, any improvement of using
cl_emit_with_prepacked is minimized. Also gets the code simpler, and
avoid the need to be extra careful with the fact that
cl_emit_with_prepaked doesn't override values.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609 >
2024-04-26 12:34:44 +00:00
Alejandro Piñeiro
2526f74ade
v3dv: PrimitiveTopology is now dynamic
...
Note that although the topology affects the final shader, and it is
part of the v3d_fs_key (through is_points and is_lines), changing
dynamically the topology would not trigger a shader recompilation as
that would only needed if there was a topology class change. From
spec:
"VUID-vkCmdDraw-dynamicPrimitiveTopologyUnrestricted-07500
If the bound graphics pipeline state was created with the
VK_DYNAMIC_STATE_PRIMITIVE_TOPOLOGY dynamic state enabled and the
dynamicPrimitiveTopologyUnrestricted is VK_FALSE, then the
primitiveTopology parameter of vkCmdSetPrimitiveTopology must be of
the same topology class as the pipeline
VkPipelineInputAssemblyStateCreateInfo::topology state"
dynamicPrimitiveTopologyUnrestricted is defined at
VK_EXT_extended_dynamic_state3, so for now it is false. And even if in
the future we support that extension, it is really likely that we
would return False there.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609 >
2024-04-26 12:34:44 +00:00
Alejandro Piñeiro
fbfb99cbc3
v3dv: ez_state/incompatible_ez_test could be recomputed at cmd_buffer
...
As the values depends on several values that can be dynamic too.
Note that the current approach of this commit is keeping this info
duplicated on the pipeline and the cmd_buffer. The alternative would
be to just track it at the cmd_buffer, like we did recently with
z_updates_enable, but getting the values for ez_state/incompatible_ez
were more complex, so this commit still computes it when the pipeline
is created, and uses it as default value.
This is debatable though, and the alternative would be to just keep
ez_state/incompatible_ez_state at the command buffer.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609 >
2024-04-26 12:34:44 +00:00
Alejandro Piñeiro
b6e473cd58
v3dv: move depth CFG bits setting to cmd buffer emission
...
As it depends on values that could be dynamic now. Technically we
could try to keep pre-emitting, just in case that info is provided
statically.
But for the dynamic case, we would still need to compute that bits,
and we would need to discard all the pre-emitted CFG set, and
recompute it completely (as right now cl_emit_with_prepacked doesn't
allow to override values).
It is also gets a simpler code by setting those flags in only one
codepath.
As we are here, we also move z_updates_enable from the pipeline to the
cmd_buffer. This values doesn't require a complex compute, so it is
easier to just keep it on one place.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609 >
2024-04-26 12:34:44 +00:00
Alejandro Piñeiro
9fa023f111
v3dv: DepthBoundsTestEnable is dynamic now
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609 >
2024-04-26 12:34:44 +00:00
Alejandro Piñeiro
29c8aca881
v3dv: CullMode and FrontFace are dynamic now
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609 >
2024-04-26 12:34:44 +00:00
Alejandro Piñeiro
e3061e6281
v3dv: provide implementation for CmdSetViewportWithCount
...
As with CmdSetViewport, we need to provide a custom implementation
because we want to call and save the outcome of viewport_compute_xform
when the viewport is set, not during emission.
We can just call v3dv_CmdSetViewport, as that one is already calling
vk_common_SetViewportWithCount.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609 >
2024-04-26 12:34:44 +00:00
Alejandro Piñeiro
f4d426fae6
v3dv: provide implementation for vkCmdBindVertexBuffers2
...
Mostly equal to vkCmdBindVertexBuffers, but adding strides, that with
VK_EXT_extended_dynamic_state become dynamic, and setting pSizes.
It is worth to note that at this moment we don't use
CmdBindVertexBuffers2 pSizes.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609 >
2024-04-26 12:34:44 +00:00
Alejandro Piñeiro
f2236065b7
v3dv: port dynamic state tracking to use Mesa Vulkan
...
Specifically to use the common vk_dynamic_graphics_state.
The advantage of using the common struct is not only reducing the size
of our custom one, but also using common helpers (like all those cmd
buffer setters), and a lot of the logic that in the future will be
used for other extensions.
Some notes:
* We still keep dirty flags, for things like PIPELINE,
DESCRIPTOR_SETS, etc. Other driver do the same. FWIW, this is also
an improvement, as before we were mixing those with the per-spec
Vulkan dynamic info.
* For the port viewport/scissor we still keep some data on a custom
structure, as we cache the translate/scale info that is derived
from scissor/viewport, but used in three different places.
For that we also maintain a custom implementation of
CmdSetViewport, that computes translate/scale, and call the common
implementation.
* We make the same for color_write_enables. The vulkan runtime saves
it as a 8-bit bitset, with a bit per attachment. But when combining
with color_write_mask you need a 32bit with 4 bits set per
attachment. To avoid recompute it during emission, we also cache
the color_write_enables, using the runtime just to track the dirty
status.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609 >
2024-04-26 12:34:44 +00:00
Karmjit Mahil
858154b84e
ir3: Don't set saturation on flat.b
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10999
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com >
Reviewed-by: Job Noorman <jnoorman@igalia.com >
Reviewed-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28935 >
2024-04-26 11:39:26 +00:00
Erik Faye-Lund
3b3df7b8a9
panvk: avoid dereferencing a null-pointer
...
If we're passed a memory-info, but no memory-prop, we'd end up
dereferencing a null-pointer here. Let's use a fallback struct instead,
similar to what RADV does.
Fixes: d970fe2e9d ("panfrost: Add a Vulkan driver for Midgard/Bifrost GPUs")
CID: 1496060
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28856 >
2024-04-26 11:18:18 +00:00
Erik Faye-Lund
8456588b1f
panvk: drop needless null-checks
...
iview can't be null here, so let's drop these checks.
CID: 1596487
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28856 >
2024-04-26 11:18:18 +00:00
Erik Faye-Lund
5df20cac22
panvk: do not leak bindings
...
There were nothing here cleaning this up.
CID: 1596490
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28856 >
2024-04-26 11:18:17 +00:00
Erik Faye-Lund
8fd171b02d
panvk: drop needless null-check
...
This argument is never null, and we already dereference it earlier.
Let's remove the needless check here.
CID: 1503115
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28856 >
2024-04-26 11:18:17 +00:00
Erik Faye-Lund
9058d5ff62
panfrost: correct first-tracking for signature
...
If we unconditionally assign false to first *before* we use it, it's
never true when used. Instead, let's assign it *both* at the end *and*
when continuing.
Fixes: 4da88060d0 ("panfrost: Skip blit shader labelling if the buffer has no space")
CID: 1476270
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28856 >
2024-04-26 11:18:17 +00:00
Erik Faye-Lund
f852f86a31
panfrost: check return-code of drmSyncobjWait
...
Realistically, this isn't going to fail. But let's return an error here
in case it does, just for good measure.
CID: 1558596
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28856 >
2024-04-26 11:18:17 +00:00
Erik Faye-Lund
70dcdb3130
panfrost: assert that drmSyncobjWait returns 0
...
This is really just a small band-aid, and instead we should start
reporting errors from this function. But for now, let's just assert that
no error occurrecd, as that's slightly better than ignoring it.
CID: 1592892
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28856 >
2024-04-26 11:18:17 +00:00
Erik Faye-Lund
f59e5ee5fb
panfrost: check return-value from u_trim_pipe_prim
...
This is slightly cleaner than what we currently do. It shouldn't matter
in difference, though.
CID: 1515978
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28856 >
2024-04-26 11:18:17 +00:00
Erik Faye-Lund
8deaf37047
panfrost: do not deref potentially null pointer
...
We need to check for failure to import *before* we dereference here.
Fixes: f94889d079 ("panfrost: Make pan_texture.{c,h} panfrost_bo agnostic")
CID: 1587376
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28856 >
2024-04-26 11:18:17 +00:00
Boris Brezillon
186f7fa915
panfrost: do not write outside num_wg_sysval
...
This array has 3 components, because it's meant to hold the X, Y and Z
components of the work-group size sysval. However, mir_pick_ubo assumes
vec4 for the push-uniforms, which ends up promoting this to 4
components.
So let's make sure we don't write that last component. It's not going to
do anything good.
In practice, this leads to the viewport descriptor being smashed, which
doesn't actually do any real-world harm, because this only happens in
compute batches where that descriptor is unused. However, writing
outside of arrays is undefined behavior, so we should fix it regardless.
Fixes: 5006167061 ("panfrost: Hook-up indirect dispatch support")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28856 >
2024-04-26 11:18:17 +00:00
Erik Faye-Lund
39f919707a
panfrost: remove nonsensical assert
...
This checks against all valid targets, which is kinda confusing to read.
Let's just drop this.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28856 >
2024-04-26 11:18:17 +00:00
Eric Engestrom
71fd7836f6
spirv: deduplicate default debug log level
...
`level` is already set to WARNING by default, so return it normally
instead of hard-coding WARNING again in the other code path.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28799 >
2024-04-26 10:38:12 +00:00
Eric Engestrom
378bed6fa6
v3dv/ci: skip all the WSI tests, they are way too flaky to be worth it
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28934 >
2024-04-26 10:16:11 +00:00
Eric Engestrom
1dadf950c3
rpi3/ci: drop duplicate comment without any corresponding actual skip line
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28934 >
2024-04-26 10:16:11 +00:00
Alejandro Piñeiro
42183a9f2b
v3dv/ci: dEQP-VK.dynamic_state.*.double_static_bind are fixed now
...
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28897 >
2024-04-26 09:52:09 +00:00
Alejandro Piñeiro
e14f5252fa
v3dv/cmd_buffer: always bind pipeline static state
...
Even if the pipeline is the same.
The followin sequence, used on
dEQP-VK.dynamic_state.*.double_static_bind tests, is valid:
1. Bind pipeline with some static state.
2. Set state command for that static state (to a bad value).
3. Bind the same pipeline again.
4. Draw.
So on 3 we need to ensure to load again the pipeline static state.
Fixes: dEQP-VK.dynamic_state.*.double_static_bind
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28897 >
2024-04-26 09:52:09 +00:00
David Rosca
1f07f5a79b
radv/video: Report maxBitrate in encode capabilities
...
Some cards can do higher bitrate, but 1000 Mbit/s should be high enough
for any practical use. It's also the value that AMF reports as max bitrate.
Fixes: 54d499818c ("radv/video: add initial support for encoding with h264.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28736 >
2024-04-26 09:18:29 +00:00
David Rosca
c210bb7952
radv/video: Check encode profiles and bit depth in capabilities query
...
Fixes: 967e4e09de ("radv/video: add h265 encode support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28736 >
2024-04-26 09:18:29 +00:00
David Rosca
2d0282f576
radv/video: Set correct bit depth and format for 10bit input
...
Fixes: 967e4e09de ("radv/video: add h265 encode support")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11011
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28736 >
2024-04-26 09:18:29 +00:00
Rhys Perry
ae866966e6
aco/tests: add tests for divergent merge phi with undef
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661 >
2024-04-26 08:39:01 +00:00
Rhys Perry
0f61e0c27e
aco/tests: add tests for hidden breaks/continues
...
ACO might add breaks/continues which didn't exist in the NIR.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661 >
2024-04-26 08:39:01 +00:00
Daniel Schürmann
6b3e14ba83
aco/optimizer: remove p_linear_phi handling from optimizer
...
We remove trivial phis during value numbering, now.
And the undef optimization seems to have no positive effect.
Totals from 22 (0.03% of 79206) affected shaders: (GFX10.3)
Instrs: 168529 -> 168260 (-0.16%)
CodeSize: 912692 -> 911704 (-0.11%)
Latency: 2607549 -> 2607335 (-0.01%)
InvThroughput: 1124171 -> 1124109 (-0.01%)
SClause: 5694 -> 5698 (+0.07%)
Copies: 23503 -> 23364 (-0.59%)
Branches: 8185 -> 8058 (-1.55%)
PreSGPRs: 1536 -> 1531 (-0.33%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661 >
2024-04-26 08:39:01 +00:00
Daniel Schürmann
2d0c6647f0
aco: use SGPR phi lowering for all scalar phis
...
No fossil-db changes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661 >
2024-04-26 08:39:01 +00:00
Daniel Schürmann
6ec6899bff
aco: use SGPR phi lowering for all loop header phis
...
No fossil-db changes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661 >
2024-04-26 08:39:01 +00:00
Daniel Schürmann
7c01193299
aco: use SGPR phi lowering for uniform phis in divergent merge blocks
...
The fossil changes are due to a slightly different register allocation
from a reversed order of phi instructions.
Totals from 1620 (2.04% of 79395) affected shaders: (GFX10.3)
Instrs: 730683 -> 732621 (+0.27%); split: -0.02%, +0.28%
CodeSize: 3888464 -> 3898488 (+0.26%); split: -0.00%, +0.26%
Latency: 3274291 -> 3275549 (+0.04%); split: -0.02%, +0.06%
InvThroughput: 606625 -> 606661 (+0.01%); split: -0.00%, +0.01%
VClause: 9541 -> 9538 (-0.03%)
SClause: 17296 -> 17272 (-0.14%); split: -0.16%, +0.02%
Copies: 81392 -> 83231 (+2.26%); split: -0.17%, +2.43%
Branches: 27023 -> 27020 (-0.01%); split: -0.03%, +0.02%
VALU: 383380 -> 382749 (-0.16%)
SALU: 160895 -> 163369 (+1.54%); split: -0.03%, +1.57%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661 >
2024-04-26 08:39:01 +00:00
Daniel Schürmann
9ab5e7fe5d
aco/lower_phis: implement SGPR phi lowering
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661 >
2024-04-26 08:39:01 +00:00
Daniel Schürmann
f2d32e1c13
aco/lower_phis: generalize init_state() so that it works with any scalar phis
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661 >
2024-04-26 08:39:01 +00:00
Daniel Schürmann
55130069b8
aco/vn: copy-propagate trivial phis
...
Totals from 154 (0.19% of 79395) affected shaders: (GFX11)
Instrs: 102420 -> 101702 (-0.70%); split: -0.71%, +0.01%
CodeSize: 534060 -> 530620 (-0.64%); split: -0.65%, +0.01%
Latency: 560180 -> 559723 (-0.08%); split: -0.10%, +0.01%
InvThroughput: 62769 -> 61708 (-1.69%); split: -1.72%, +0.03%
Copies: 6929 -> 6260 (-9.66%); split: -9.68%, +0.03%
Branches: 1636 -> 1609 (-1.65%)
PreVGPRs: 5913 -> 5906 (-0.12%)
VALU: 52681 -> 52012 (-1.27%); split: -1.27%, +0.00%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661 >
2024-04-26 08:39:01 +00:00
Daniel Schürmann
6e3446422f
aco: introduce aco_opcode::p_boolean_phi
...
This opcode is only used during instruction selection and
immediately lowered to linear phis afterwards.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661 >
2024-04-26 08:39:01 +00:00
Daniel Schürmann
3b832fe2ab
aco/lower_phis: simplify check for uniform predecessors
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661 >
2024-04-26 08:39:01 +00:00
Konstantin Seurer
d6c9b1d03f
radv: Handle all dependencies of CmdWaitEvents2
...
The spec describes pDependencyInfos as an array with eventCount elements.
cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10579
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28896 >
2024-04-26 08:09:22 +00:00
Samuel Pitoiset
7c0b73e0aa
radv/rt: rework the helper that hashes a ray tracing pipeline
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28860 >
2024-04-26 07:40:09 +00:00
Samuel Pitoiset
58fb6db649
radv/rt: pass radv_ray_tracing_state_key to radv_rt_pipeline_compile()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28860 >
2024-04-26 07:40:09 +00:00
Samuel Pitoiset
7be635719c
radv/rt: add radv_ray_tracing_state_key
...
This struct contains all information for compiling a pipeline
(stages, stage keys and groups). It will be used to generate a unique
pipeline hash.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28860 >
2024-04-26 07:40:09 +00:00
Colin Marc
ec78cbce4c
radv/video: don't truncate frame_num and POC to 32
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28719 >
2024-04-26 06:38:44 +00:00
Ryan Neph
ee7e0168a1
venus: reclaim signal semaphore feedback resources for wasteful clients
...
Pending feedback resources (cmds, buffers, slots) for timeline semaphores are
generally reclaimed for re-use during subsequent semaphore waits/queries or any
queue submission containing at least one "wait" semaphore.
They are never reclaimed in the unexpected case when all submissions only
contain "signal" timeline semaphores, which consume such resources but
are never subsequently queried or waited upon.
This strange behavior is observed in several Valve games (Portal 2,
L4D2, CS2), which all run natively on linux with their own internal
distributions of DXVK v2.0 (at time of this MR submission). A Cursory
analysis of recent DXVK history indicates that it may be gone by v2.1.
The consequence is rapid guest memory leak and host Vk resource leak,
resulting in a crash within 1-2 minutes.
Fix that leak by running the reclaimation procedure for submissions with
_any_ accompanying semaphores.
Fixes: d63432012d ("venus: refactor semaphore feedback")
Signed-off-by: Ryan Neph <ryanneph@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28915 >
2024-04-26 06:17:37 +00:00
Yiwei Zhang
fdc21a95aa
venus: workaround excessive dma-buf import failure on turnip
...
Workaround dEQP-VK.wsi.android.swapchain.simulate_oom.* test failures on
turnip where excessive imports can fail, and venus has to propagate oom.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28941 >
2024-04-26 05:56:42 +00:00
Yiwei Zhang
824a8542d7
venus: silence a stack array false alarm
...
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28914 >
2024-04-26 05:37:02 +00:00
Yiwei Zhang
3e16d25d1a
venus: avoid client allocators for ring internals
...
There're many cases in which the ring submissions must succeed. We don't
worry about real oom since things would fail earlier. For simulated oom
from random intentional allocs, there isn't robust way to fail those
must succeeds. e.g. the commands that don't have return codes or valid
error return struct defaults. So real oom propagation is still at best
effort.
Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28914 >
2024-04-26 05:37:02 +00:00
Lionel Landwerlin
9926aedc96
anv: enable EDS3 AlphaToCoverageEnable & RasterizationSamples
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10647
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:03 +00:00
Lionel Landwerlin
ada806baa3
anv: remove fs_msaa_flags from the graphics pipeline
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:03 +00:00
Lionel Landwerlin
ddf31d2f40
anv: move 3DSTATE_MULTISAMPLE to partial emission
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:03 +00:00
Lionel Landwerlin
815d2e3e8b
anv: move 3DSTATE_PS to partial packing
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:03 +00:00
Lionel Landwerlin
3a336a98e9
anv: move more PS_EXTRA programming to runtime
...
All the stuff related to fs_msaa_flags.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:03 +00:00
Lionel Landwerlin
355549e7b0
anv: move 3DSTATE_WM::BarycentricInterpolationMode programming to runtime
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:03 +00:00
Lionel Landwerlin
11b348a1c5
anv: add dirty tracking of fs_msaa_flags in runtime
...
At the moment this is useless as the pipeline already holds the same
value. But in the next changes we'll stop building this value on the
pipeline to allow for more dynamic states.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:03 +00:00
Lionel Landwerlin
25b57a6a75
anv: track sample shading enable & min sample shading
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:03 +00:00
Lionel Landwerlin
b80dd22d57
intel/brw: add min_sample_shading value in wm_prog_data
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:03 +00:00
Lionel Landwerlin
bdfa25dc77
intel/fs: decouple alphaToCoverage from per sample dispatch
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:03 +00:00
Lionel Landwerlin
1bbe2d9833
intel/brw: fixup wm_prog_data_barycentric_modes()
...
Always select sample barycentric when persample dispatch is unknown at
compile time and let the payload adjustments feed the expected value
based on dispatch.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:02 +00:00
Lionel Landwerlin
48bf95ba96
anv: factor out wm_prog_data get in runtime flush
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:02 +00:00
Lionel Landwerlin
e302825fef
anv: fixup indentation
...
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:02 +00:00
Lionel Landwerlin
2f0c2d2ed7
anv: simplify multisampling check
...
We've already checked that ms != NULL in the if condition.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27803 >
2024-04-26 05:13:02 +00:00
Mike Blumenkrantz
bd1a3921d1
zink: fully wait on all program fences during ctx destroy
...
optimized pipeline compile jobs may still be ongoing during ctx
destroy, and these must complete too or else crashes will occur
fixes shutdown crash with dEQP-EGL.functional.sharing.gles2.multithread.simple.images.texture_source.teximage2d_render
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28900 >
2024-04-26 04:50:31 +00:00
Mike Blumenkrantz
f18a1d3a31
zink: prune zink_shader::programs under lock
...
it's possible for a shader to be precompiling its separate shader variants
during destruction, which requires that the programs set be iterated
under lock in order to prune every new variant as it is created without
crashing
fixes crashes in spec@arb_separate_shader_objects@400 combinations.*
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28900 >
2024-04-26 04:50:30 +00:00
Mary Guillemard
866dc85d67
panfrost: Skip new failure from VKCTS 1.3.8.x
...
Mark "dEQP-VK.pipeline.monolithic.vertex_input.misc.stride_change_vert_frag"
as failing.
Reason for failure is unknown for now, will need investigation at a
later time.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28939 >
2024-04-26 04:23:44 +00:00
Mary Guillemard
fc15041255
panvk: Ensure we lower load_base_workgroup_id to 0
...
This pass options to nir_lower_compute_system_values to ensure that
load_base_workgroup_id is lowered to 0 instead of NULL.
Fix VKCTS failures related to it.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Fixes: d22f936019 ("nir: remove workgroup_id_zero_base")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28939 >
2024-04-26 04:23:44 +00:00
Christian Gmeiner
33db56e784
isaspec: Improve 'meta' handling
...
As a meta line could become quite long, make it possible to have
multiple meta tags.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Acked-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28920 >
2024-04-26 03:35:13 +00:00
Christian Gmeiner
1747fed633
isaspec: Add method to get the displayname of BitSetEnumValue
...
This is needed for an assembler use case.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Acked-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28920 >
2024-04-26 03:35:12 +00:00
Iván Briano
8ebf07eccd
anv: check requirements for VK_IMAGE_USAGE_FRAGMENT_SHADING_RATE
...
Somehow I missed this one in 164c0951a0
If the format the image is being created with doesn't have the FSR
format feature, report it as unsupported.
Also fixes future CTS tests: dEQP-VK.api.info.unsupported_image_usage.*
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28913 >
2024-04-26 03:01:07 +00:00
Eric Engestrom
497672ac74
ci: pass MESA_VK_ABORT_ON_DEVICE_LOSS through to the DUT
...
Fixes: 9bbbe90f06 ("ci: enable MESA_VK_ABORT_ON_DEVICE_LOSS globally")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28940 >
2024-04-26 01:18:08 +00:00
Chia-I Wu
ae68fa51a4
radeonsi: respect pipe_picture_desc::flush_flags
...
It is not always possible to assume PIPE_FLUSH_ASYNC.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28771 >
2024-04-26 00:45:05 +00:00
Chia-I Wu
08d3b93ce7
radeonsi: prep for pipe_picture_desc::flush_flags
...
Make sure video codecs support flush flags.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28771 >
2024-04-26 00:45:05 +00:00
Chia-I Wu
7ed3874996
frontends/va: set PIPE_FLUSH_ASYNC when possible
...
When there are external handles, flush cannot be async.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28771 >
2024-04-26 00:45:05 +00:00
Chia-I Wu
a90075e772
frontends/va: track whether there are imported/exported surfaces
...
Add vlVaDriver::has_external_handles and set it to true when external
handles are imported via VASurfaceAttribMemoryType or exported via
vaExportSurfaceHandle.
It will serve the same purpose as
gl_shared_state::HasExternallySharedImages does, but for va.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28771 >
2024-04-26 00:45:04 +00:00
Chia-I Wu
893797eb32
gallium: add pipe_picture_desc::flush_flags
...
It specifies the flush flags for pipe_video_codec::end_frame.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28771 >
2024-04-26 00:45:04 +00:00
Sil Vilerino
b2c0c83be1
d3d12: Fix static analysis issues due to bad parenthesis closing
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28933 >
2024-04-26 00:15:16 +00:00
Timur Kristóf
7809c5f222
ac/nir/tess: Implement packed 16-bit HS->TES I/O using helper macros.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28768 >
2024-04-25 23:45:05 +00:00
Timur Kristóf
e92e0bab93
ac/nir/tess: Implement packed 16-bit LS->HS I/O using helper macros.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28768 >
2024-04-25 23:45:05 +00:00
Timur Kristóf
67c2016dd5
ac/nir/esgs: Implement packed 16-bit ES->GS I/O using helper macros.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28768 >
2024-04-25 23:45:05 +00:00
Timur Kristóf
7bfbff7440
ac/nir: Add helper macros for emitting IO code.
...
These are implemented as macros because C doesn't
have templates. They are meant for implementing
properly split packed 16-bit IO stores and loads,
to avoid repetition in the code.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28768 >
2024-04-25 23:45:05 +00:00
Timur Kristóf
feb2ba9e9b
ac/nir/tess: Slightly refactor emitting LS outputs.
...
No functional changes, just reorganize the code a little bit
in preparation for the next commits.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28768 >
2024-04-25 23:45:05 +00:00
Timur Kristóf
55757ce03b
ac/nir/esgs: Slightly refactor emitting IO loads and stores.
...
No functional changes, just reorganize the code a little bit
in preparation for the next commits.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28768 >
2024-04-25 23:45:05 +00:00
Erik Faye-Lund
86cce0e677
panfrost: clamp buffer-size to max-size
...
When texture-buffers are created from buffers that are larger than the
max-size, the correct thing to do is to clamp the size. Let's do that.
This fixes these piglits:
- spec/arb_texture_buffer_object/texture-buffer-size-clamp/r8ui_texture_buffer_size_via_sampler
- spec/arb_texture_buffer_object/texture-buffer-size-clamp/rg8ui_texture_buffer_size_via_sampler
- spec/arb_texture_buffer_object/texture-buffer-size-clamp/rgba8ui_texture_buffer_size_via_sampler
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28908 >
2024-04-25 23:22:16 +00:00
Erik Faye-Lund
19aa0b9473
panfrost: add PAN_MAX_TEXEL_BUFFER_ELEMENTS define
...
We're going to be repeating this value a few places, so let's use a
single define to keep thing simple.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28908 >
2024-04-25 23:22:16 +00:00
Tomeu Vizoso
1277f58d8a
etnaviv/nn: Make parallel jobs disabled by default
...
It doesn't work for all models, with the same happening to the
proprietary driver. There may be some hardware limitation on at least
the HW that is currently supported in Mesa.
So match what the proprietary driver is doing and disable by default.
Fixes: d6473ce28e ("etnaviv: Use NN cores to accelerate convolutions")
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28918 >
2024-04-25 21:59:40 +00:00
Rohan Garg
b406759479
anv: formatting fix when printing pipe controls
...
Fixes: abc4111 ('anv: pass steam output as argument for anv_dump_pipe_bits')
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28931 >
2024-04-25 21:38:30 +00:00
Guilherme Gallo
7101aecc53
ci: Use id_tokens for JWT auth
...
Fixes : #9180
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28916 >
2024-04-25 20:45:53 +00:00
Guilherme Gallo
2639c91052
ci: Add S3 id_token for all jobs
...
id_tokens will replace $CI_JOB_TOKEN predefined variable in GitLab 18.0
See:
https://docs.gitlab.com/ee/update/deprecations.html#default-cicd-job-token-ci_job_token-scope-changed
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28916 >
2024-04-25 20:45:53 +00:00
David (Ming Qiang) Wu
87fa1fdcb2
radeonsi/vcn: set accurate size for dec header and index_codec
...
Each codec has its own size in the dec message,
for example: AVC has sizeof(rvcn_dec_message_avc_t) and
AV1 has sizeof(rvcn_dec_message_av1_t)
This patch will set the correct size for index_codec section
and set the total_size properly for the dec message header.
Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28886 >
2024-04-25 20:18:30 +00:00
Mike Blumenkrantz
2c180c47f7
zink: reconstruct features pnext after determining extension support
...
for extensions that require features/properties to enable support, this
avoids adding the feature struct to the device createinfo
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11067
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28925 >
2024-04-25 19:33:13 +00:00
Daniel Schürmann
e1c9b2a455
aco/ra: assert that the register file is empty after register allocation completed
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28876 >
2024-04-25 19:10:44 +00:00
Daniel Schürmann
be1e68b4ee
aco/ra: fix kill flags after renaming fixed Operands
...
Suggested-by: Rhys Perry <pendingchaos02@gmail.com >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28876 >
2024-04-25 19:10:44 +00:00
Eric Engestrom
548763709b
lavapipe/ci: add flakes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28932 >
2024-04-25 18:50:57 +00:00
Eric Engestrom
908d62be1d
freedreno/ci: add flake
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28930 >
2024-04-25 18:26:38 +00:00
Lionel Landwerlin
4b0362637b
anv: reuse embedded samplers across shaders
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10804
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28865 >
2024-04-25 17:53:31 +00:00
Boris Brezillon
78558de8a6
panvk: Kill panvk_sysval_vec4
...
We access sysvals as if they were declared as a big struct containing
all the sysvals for all the stages in a pipeline. Declaring fields
as panvk_sysval_vec4 when we don't use all the components doesn't make
sense, so let's drop panvk_sysval_vec4 and declare exactly what we
need.
We also take this as an opportunity to split the graphics and compute
sysval structs.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28399 >
2024-04-25 17:13:21 +00:00
Boris Brezillon
6d4b376a9b
panvk: Lower sysvals to push uniforms
...
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28399 >
2024-04-25 17:13:21 +00:00
Boris Brezillon
9c553bda9c
panvk: Prepare dynamic buffer descriptors at bind time
...
We don't need to stop the panvk_buffer_desc objects to then emit the
UBOs/SSBOs descriptors at draw/dispatch time. We can simply prepare
them at bind time and cache the result, to make the
draw/dispatch preparation a simple memcpy.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28399 >
2024-04-25 17:13:20 +00:00
Boris Brezillon
a603c66659
panvk: Move the dynamic SSBO descriptors to their own UBO
...
We are about to put our sysvals in the push uniforms array, but before
we can do that, we need to store our dynamic storage buffers in a
dedicated UBO. We put this dynamic descriptor UBO after the dynamic
UBOs.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28399 >
2024-04-25 17:13:20 +00:00
Boris Brezillon
cfe2254149
panvk: Put dynamic uniform buffers at the end of the UBO array
...
It's easier to reason about if dynamic uniform buffers (which have
a per-pipeline limit, and are cached at the command buffer level) are
placed at the end of the UBO array. It will also allow us to do a memcpy
instead of iterating over all sets to collect these dynamic UBOs.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28399 >
2024-04-25 17:13:20 +00:00
Boris Brezillon
6672135748
panvk: Prepare things so we can push sysvals to our push uniform buffer
...
s/push_constant/push_uniform/ in a few places to prepare for sysval
transition to push uniforms.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28399 >
2024-04-25 17:13:20 +00:00
Eric Engestrom
0bafa94f9a
lavapipe/ci: add WSI testing to all the deqp-vk jobs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27545 >
2024-04-25 15:24:08 +00:00
Eric Engestrom
5497c3e75a
panvk/ci: add WSI testing to all the deqp-vk jobs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27544 >
2024-04-25 14:44:19 +00:00
Christopher Michael
84632dce93
v3d: Move spec@!opengl 1.1@getteximage-formats, Fail in broadcom-rpi4-fails
...
The V3D driver does not support blending for GL_R{GBA}32F formats
which is why this test is failing. Add a comment noting the above and
move the test to a separate section
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28862 >
2024-04-25 14:20:55 +00:00
Christopher Michael
d202953639
v3d: Move spec@arb_texture_view@rendering-formats, Crash in
...
broadcom-rpi4-fails
The arb_texture_view@rendering-formats test crash is caused by V3D not
supporting PIPE_FORMAT_{R16,R16G16,R16G16B16A16}_UNORM for rendering
so move the rendering-formats test to the appropriate section
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28862 >
2024-04-25 14:20:55 +00:00
Mike Blumenkrantz
4660ee1dea
glthread: check for invalid primitive modes in DrawElementsBaseVertex
...
fixes KHR-GLESEXT.draw_elements_base_vertex_tests.invalid_mode_argument
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28903 >
2024-04-25 13:41:29 +00:00
Constantine Shablia
f153f945fc
pan/bi: clean up tex coord lowering
...
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28899 >
2024-04-25 13:01:31 +00:00
Constantine Shablia
3139f8f623
pan/bi: fix 1D array tex coord lowering
...
We were erroneously specifying Y for 1D arrays
Cc: mesa-stable
Suggested-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28899 >
2024-04-25 13:01:30 +00:00
Iván Briano
0fbaf8703a
anv: enable VK_KHR_shader_float_controls2
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281 >
2024-04-25 12:13:41 +00:00
Iván Briano
22fa29ac2f
vtn: support float controls2
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281 >
2024-04-25 12:13:41 +00:00
Iván Briano
7f97fa6df0
nir/algebraic: move float control conditions to be per instruction
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281 >
2024-04-25 12:13:41 +00:00
Iván Briano
8c4cd3e74e
nir/algebraic: support float controls conditions per instruction
...
v?:
- Make the Python not awful (Dylan)
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281 >
2024-04-25 12:13:41 +00:00
Iván Briano
08df0c7dde
nir: check inf/nan/sz preserve per-instruction
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281 >
2024-04-25 12:13:41 +00:00
Iván Briano
750bd9757e
spirv: gather some float controls bits per instruction
...
v2: add static_assert to ensure values fit in bitfield (Alyssa)
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281 >
2024-04-25 12:13:41 +00:00
Iván Briano
666647acae
nir: track some float controls bits per instruction
...
With float_controls2, shaders can decide on the behavior of
NaN/Inf/SignedZero preservation by decorating specific instructions, on
top of having a default for the whole program.
Add where to track these to nir_alu_instr and propagate them to new
instructions everywhere that exact is being done already.
v2: use less bits for fp_fast_math in nir_alu_instr (Alyssa)
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281 >
2024-04-25 12:13:41 +00:00
Iván Briano
829ea35714
compiler: reorder FLOAT_CONTROLS enums
...
So we can use less bits to store some of them in nir_alu_instr.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281 >
2024-04-25 12:13:41 +00:00
Kenneth Graunke
df6cfb4dd0
intel/brw: Rename brw_reg_type_to_hw_type to brw_type_encode
...
And similarly brw_hw_type_to_reg_type to brw_type_decode.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847 >
2024-04-25 11:41:48 +00:00
Kenneth Graunke
9205f6ff51
intel/brw: Combine a1/a16 3src type decoding functions
...
Align16 is only used on Gfx9, while Align1 is used on Gfx11+. We can
decode both kinds of encodings in the same function with a simple
devinfo check. One snag is that the align16 encodings didn't have a
separate exec_type field, but we can just pass 0.
This lets us have a single function named brw_type_decode_for_3src,
which is much less of a mouthful.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847 >
2024-04-25 11:41:48 +00:00
Kenneth Graunke
28034aac34
intel/brw: Combine a1/a16 3src type encoding functions
...
Align16 is only used on Gfx9, while Align1 is used on Gfx11+. We can
handle both encodings in the same function with a simple devinfo check,
and give that function a simple name like brw_type_encode_for_3src.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847 >
2024-04-25 11:41:48 +00:00
Kenneth Graunke
545bb8fb6f
intel/brw: Replace type_sz and brw_reg_type_to_size with brw_type_size_*
...
Both of these helpers do the same thing. We now have brw_type_size_bits
and brw_type_size_bytes and can use whichever makes sense in that place.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847 >
2024-04-25 11:41:48 +00:00
Kenneth Graunke
c22f44ff07
intel/brw: Replace brw_reg_type_from_bit_size by brw_type_with_size
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847 >
2024-04-25 11:41:48 +00:00
Kenneth Graunke
007d891239
intel/brw: Use newer brw_type_is_* shorter names
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847 >
2024-04-25 11:41:48 +00:00
Kenneth Graunke
f523bfcf90
intel/brw: Reindent after shortening BRW_REGISTER_TYPE_* to BRW_TYPE_*
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847 >
2024-04-25 11:41:48 +00:00
Kenneth Graunke
873fcdff38
intel/brw: Stop using long BRW_REGISTER_TYPE enum names
...
s/BRW_REGISTER_TYPE/BRW_TYPE/g
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847 >
2024-04-25 11:41:48 +00:00
Kenneth Graunke
9d8f2c4421
intel/brw: Rework BRW_REGISTER_TYPE's representation semantics
...
In ancient days, we directly used the hardware register type encodings
throughout the compiler. As more GPU generations came out, encodings
shifted, and we moved to an abstract enum that we could encode/decode
to a particular GPU's hardware encoding. But there was no particular
meaning behind any particular value.
One downside to this approach is that we end up with switch statements
galore. Want to know a type's size? Switch. Convert a unsigned type
to a signed one? Switch. Get a type with the same base type, but
different bit size? Switch. This is both inefficient and inconvenient.
In contrast, nir_alu_type takes a nicer approach - the type encoding has
certain bits representing the base type, and others encoding the size of
the type. Switching base types or sizes is a simple matter of masking
out the relevant field and substituting a different one.
Tigerlake's encoding adopts a similar approach: two bits represent the
size as a 2-bit unsigned number n, where the bit size is (8 * 2^n).
Two more bits represent the base type. Past encodings were a bit ad hoc
as new data types were added over time, but Gfx12 is organized (mostly).
This patch converts our brw_reg_type enum over to a new system that's
patterned after the Tigerlake style (for easy conversion) while
deviating in a few ways that make our vector immediate type size
handling simpler. Should we add additional base types, we're likely
to continue deviating. Still, converting is much simpler.
Type size calculations (which are performed all the time) are now a
simple mask and shift, instead of a switch.
We also adopt the name BRW_TYPE_* instead of BRW_REGISTER_TYPE_* because
it's much shorter and easier to type. Similarly, we create new helper
functions named brw_type_* for working with these types, with a cleaner
naming convention. Legacy names still exist but will we dropped over
the next few patches as pieces get cleaned up.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847 >
2024-04-25 11:41:48 +00:00
Kenneth Graunke
c45e235df5
intel/brw: Drop NF type support
...
Icelake removed the PLN instruction for interpolating fragment shader
inputs, instead adding a special "Native Float" (NF) data type which
was a 66-bit floating point data type that could only be used with the
accumulator. On Tigerlake, they dropped NF support in favor of just
doing the interpolation with MAD instructions.
We stopped using NF years ago (commit 9ea90aae1e ),
instead just using the fs_visitor::lower_linterp() pass to emit MADs.
Since this existed only for a short time, and had very limited utility,
we drop it from the compiler. One downside is that we can no longer
disassemble Icelake shaders containing NF types properly, but I doubt
anyone really minds.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847 >
2024-04-25 11:41:48 +00:00
Kenneth Graunke
1c6f863fc7
intel/brw: Delete gfx10 table for align1 3src type encoding
...
align1 three-source instructions do not exist on gfx9, and this
compiler does not support gfx10. So the oldest case is gfx11.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847 >
2024-04-25 11:41:48 +00:00
Mary Guillemard
40422927dc
nak: Pass has_mod to all form of src2 requiring it
...
This was missing from the original changes and was causing HFMA2 to
misbehave with an immediate value.
Also fix inverted value passed around for cbuf and ureg forms.
Fixes: bad23ddb48 ("nak: Add F16 and F16v2 sources")
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28828 >
2024-04-25 11:19:00 +00:00
Konstantin
46598758e7
radv: Trace indirect dispatch sizes
...
For figuring out hanging indirect dispatches.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28838 >
2024-04-25 10:20:03 +00:00
Konstantin
2b2f67aa2b
radv: Use a struct for the trace_bo layout
...
Now we can use the members on the CPU side and offsetof on the GPU side
instead of magic offsets.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28838 >
2024-04-25 10:20:03 +00:00
Konstantin
575565af58
ac/debug,radv: Read UMR wave dumps into memory before parsing
...
Allows RADV to reuse the wave dump, which leads to more consistency
between pipeline.log and umr_waves.log.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28838 >
2024-04-25 10:20:03 +00:00
Samuel Pitoiset
9a43987780
docs: Add an alternative way to debug GPU hangs with RADV
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28849 >
2024-04-25 10:10:22 +00:00
Konstantin
bb719640b5
docs: Add documentation about debugging GPU hangs on RADV
...
There are a couple of things that need to be done that aren't documented
anywhere.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28849 >
2024-04-25 10:10:22 +00:00
Georg Lehmann
f6143d3f48
aco/tests: validate before and after post-ra tests
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28881 >
2024-04-25 09:47:19 +00:00
Georg Lehmann
47d824a644
aco/lower_to_hw: fix 16bit p_insert on gfx8
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28881 >
2024-04-25 09:47:19 +00:00
Georg Lehmann
bb80ac7a70
aco/lower_to_hw: fix v_cvt_pk_u16_u32 instruction format
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28881 >
2024-04-25 09:47:18 +00:00
Georg Lehmann
619470732f
aco/tests/post_ra: fix various validation errors
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28881 >
2024-04-25 09:47:18 +00:00
Georg Lehmann
f85e6c82a6
aco/tests: don't use undef for descriptors
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28881 >
2024-04-25 09:47:18 +00:00
Lionel Landwerlin
68dfe17abc
anv: disable dual source blending state if not used in shader
...
Fixing some simulation issues on Gfx9/11 with zink on anv running dual
source blending piglit tests like :
./bin/arb_blend_func_extended-dual-src-blending-discard-without-src1 -auto -fbo
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28901 >
2024-04-25 09:03:30 +00:00
Kenneth Graunke
e6fb3ba037
isl: Set MOCS to uncached for Gfx12.0 blitter sources/destinations
...
We were accidentally leaving XY_BLOCK_COPY_BLT's Source and Destination
MOCS fields set to 0 (Error: Reserved for Non-Use) on Gfx12.0 systems.
This was causing assert fails in debug builds, since we try to ensure
that we don't do that. In theory, MOCS 0 is supposed to be equivalent
to MOCS 2 (all the caching), but...we probably ought to use MOCS 3
(uncached). Every Gfx12.5+ platform requires it, so although there
isn't a note about Gfx12.0 needing that, it's possible that it does.
We're currently only using the blitter for DRI PRIME blits on Gfx12.0,
anyway, and I think we're flushing all the caches regardless.
This bug was somewhat obscure to hit:
- You need a hybrid graphics system with Gfx12.0 and some other GPU
- You have to be using "reverse PRIME", i.e. rendering on the integrated
GPU and displaying on the discrete one. This is not the common case.
- You have to be using a debug build.
No observable performance delta in GfxBench5 Car Chase (an arbitrary
program) when rendering on Alderlake GT1 and displaying on an Arc A770.
Fixes: 194afe8416 ("anv/iris/blorp: use the right MOCS values for each engine")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28894 >
2024-04-25 08:05:48 +00:00
Eric Engestrom
0666a715c7
ci: fix container rules on release branches and tags
...
Fixes: 2487e18d4e ("ci: bare-metal: poe: Create strutured logs")
Fixes: 7c0b19a607 ("ci: run python-test automatically only in merge pipelines")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28911 >
2024-04-25 07:08:33 +00:00
Samuel Pitoiset
e8d94536d2
radv: fix image format properties with fragment shading rate usage
...
This was missing and this caused test failures for formats different
than VK_FORMAT_R8_UINT which is the only one supported for FSR.
Fixes recent
dEQP-VK.api.info.unsupported_image_usage.*.fragment_shading_rate_attachment.*.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28893 >
2024-04-25 06:33:39 +00:00
Juston Li
ce1bbd241e
venus: extend image cache to vkGetDeviceImageMemoryRequirements
...
Signed-off-by: Juston Li <justonli@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28887 >
2024-04-25 02:48:50 +00:00
Juston Li
f4f8f2ecbb
venus: refactor out image requirements helpers
...
Signed-off-by: Juston Li <justonli@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28887 >
2024-04-25 02:48:50 +00:00
Eric Engestrom
b06e2108eb
docs: update calendar for 24.1.0-rc1
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28912 >
2024-04-24 23:29:08 +02:00
Eric Engestrom
d95248ee0b
docs: add sha256sum for 24.0.6
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28907 >
2024-04-24 21:14:39 +00:00
Eric Engestrom
d4f23331bd
docs: add an extra 24.0.x release
...
To make up for the 2 weeks delay with the 24.1 branchpoint
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28907 >
2024-04-24 21:14:39 +00:00
Eric Engestrom
c6ff1f0ca5
docs: update calendar for 24.0.6
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28907 >
2024-04-24 21:14:39 +00:00
Eric Engestrom
5ee4523a75
docs: add release notes for 24.0.6
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28907 >
2024-04-24 21:14:39 +00:00
Karol Herbst
5e1a988003
nir: document base_global_invocation_id and base_workgroup_id
...
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800 >
2024-04-24 20:18:49 +00:00
Karol Herbst
d22f936019
nir: remove workgroup_id_zero_base
...
This removes the need for drivers to handle both versions. The base will
get added once in nir_lower_system_values when converting from deref to
intrinsic and will be replaced by a zero for users not supporting it.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800 >
2024-04-24 20:18:49 +00:00
Karol Herbst
3217838fef
nir: remove global_invocation_id_zero_base
...
This removes the need for drivers to handle both versions. The base will
get added once in nir_lower_system_values when converting from deref to
intrinsic and will be replaced by a zero for users not supporting it.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800 >
2024-04-24 20:18:49 +00:00
Karol Herbst
a2c96b8e7f
mesa/st: lower base invoc and workgroup id
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800 >
2024-04-24 20:18:49 +00:00
Karol Herbst
e040a08e5e
lavapipe: lower base_workgroup_id to zero
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800 >
2024-04-24 20:18:49 +00:00
Karol Herbst
a62fb368d6
v3d: call nir_lower_compute_system_values to get rid of base intrinsics
...
OpenGL doesn't have them and rusticl handles them for CL already.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800 >
2024-04-24 20:18:49 +00:00
Karol Herbst
51f54cdec4
intel/compiler: lower workgoup id to index only for mesh shaders
...
The compiler supports those intrinsics only for task/mesh shaders and it
never caused any issues, because the way `nir_lower_compute_system_values`
is doing its lowering.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800 >
2024-04-24 20:18:48 +00:00
Karol Herbst
3625a44dcc
nir/divergence_analysis: handle load_base_global_invocation_id
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800 >
2024-04-24 20:18:48 +00:00
Karol Herbst
25d697ef25
nir: add SYSTEM_VALUE_BASE_WORKGROUP_ID
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800 >
2024-04-24 20:18:48 +00:00
Eric Engestrom
07685ea89b
docs: reset new_features.txt
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28906 >
2024-04-24 19:51:59 +00:00
Eric Engestrom
8fff01e9d0
VERSION: bump to 20.2
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28906 >
2024-04-24 19:51:59 +00:00