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73 Commits
rgb10_a2ui
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core-conte
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f96405f254 |
20
configure.ac
20
configure.ac
@@ -389,7 +389,6 @@ fi
|
||||
AC_SUBST([GL_LIB])
|
||||
AC_SUBST([GLU_LIB])
|
||||
AC_SUBST([OSMESA_LIB])
|
||||
AM_CONDITIONAL(HAVE_MANGLED_GL, test "x${enable_mangling}" = "xyes")
|
||||
|
||||
dnl
|
||||
dnl potentially-infringing-but-nobody-knows-for-sure stuff
|
||||
@@ -1829,6 +1828,13 @@ AC_ARG_WITH([llvm-shared-libs],
|
||||
[with_llvm_shared_libs=yes],
|
||||
[with_llvm_shared_libs=no])
|
||||
|
||||
AC_ARG_WITH([llvm-prefix],
|
||||
[AS_HELP_STRING([--with-llvm-prefix],
|
||||
[Prefix for LLVM installations in non-standard locations])],
|
||||
[llvm_prefix="$withval"],
|
||||
[llvm_prefix=""])
|
||||
|
||||
|
||||
if test "x$with_gallium_drivers" = x; then
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enable_gallium_llvm=no
|
||||
fi
|
||||
@@ -1838,7 +1844,11 @@ if test "x$enable_gallium_llvm" = xauto; then
|
||||
esac
|
||||
fi
|
||||
if test "x$enable_gallium_llvm" = xyes; then
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||||
AC_PATH_PROG([LLVM_CONFIG], [llvm-config], [no])
|
||||
if test "x$llvm_prefix" != x; then
|
||||
AC_PATH_PROG([LLVM_CONFIG], [llvm-config], [no], ["$llvm_prefix/bin"])
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||||
else
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||||
AC_PATH_PROG([LLVM_CONFIG], [llvm-config], [no])
|
||||
fi
|
||||
|
||||
if test "x$LLVM_CONFIG" != xno; then
|
||||
LLVM_VERSION=`$LLVM_CONFIG --version | sed 's/svn.*//g'`
|
||||
@@ -2077,6 +2087,12 @@ if test "x$enable_gallium_loader" = xyes; then
|
||||
|
||||
if test "x$enable_gallium_drm_loader" = xyes; then
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||||
GALLIUM_PIPE_LOADER_DEFINES="$GALLIUM_PIPE_LOADER_DEFINES -DHAVE_PIPE_LOADER_DRM"
|
||||
PKG_CHECK_MODULES([GALLIUM_PIPE_LOADER_XCB], [xcb xcb-dri2],
|
||||
pipe_loader_have_xcb=yes, pipe_loader_have_xcb=no)
|
||||
if test "x$pipe_loader_have_xcb" = xyes; then
|
||||
GALLIUM_PIPE_LOADER_DEFINES="$GALLIUM_PIPE_LOADER_DEFINES -DPIPE_LOADER_HAVE_XCB"
|
||||
GALLIUM_PIPE_LOADER_LIBS="$GALLIUM_PIPE_LOADER_LIBS $GALLIUM_PIPE_LOADER_XCB_LIBS $LIBDRM_LIBS"
|
||||
fi
|
||||
fi
|
||||
|
||||
AC_SUBST([GALLIUM_PIPE_LOADER_DEFINES])
|
||||
|
@@ -78,7 +78,7 @@ GL_ARB_explicit_attrib_location DONE (i915, i965, r300, r6
|
||||
GL_ARB_occlusion_query2 DONE (r300, r600, swrast)
|
||||
GL_ARB_sampler_objects DONE (i965, r300, r600)
|
||||
GL_ARB_shader_bit_encoding DONE
|
||||
GL_ARB_texture_rgb10_a2ui DONE (i965, r600)
|
||||
GL_ARB_texture_rgb10_a2ui DONE (r600)
|
||||
GL_ARB_texture_swizzle DONE (same as EXT version) (i965, r300, r600, swrast)
|
||||
GL_ARB_timer_query DONE
|
||||
GL_ARB_instanced_arrays DONE (i965, r300, r600)
|
||||
|
@@ -53,8 +53,10 @@ Note: some of the new features are only available with certain drivers.
|
||||
|
||||
<h2>Changes</h2>
|
||||
|
||||
<p>TBD</p>
|
||||
|
||||
<p>
|
||||
The legacy/static Makefile system (ex: 'make linux-dri') has been removed.
|
||||
The two supported build methods are now autoconf/automake and SCons.
|
||||
</p>
|
||||
|
||||
|
||||
</body>
|
||||
|
@@ -49,12 +49,12 @@
|
||||
* - MC-JIT supports limited OSes (MacOSX and Linux)
|
||||
* - standard JIT in LLVM 3.1, with backports
|
||||
*/
|
||||
#if HAVE_LLVM >= 0x0301 && (defined(PIPE_OS_LINUX) || defined(PIPE_OS_APPLE))
|
||||
# define USE_MCJIT 1
|
||||
# define HAVE_AVX 1
|
||||
#elif HAVE_LLVM >= 0x0302 || (HAVE_LLVM == 0x0301 && defined(HAVE_JIT_AVX_SUPPORT))
|
||||
#if HAVE_LLVM >= 0x0302 || (HAVE_LLVM == 0x0301 && defined(HAVE_JIT_AVX_SUPPORT))
|
||||
# define USE_MCJIT 0
|
||||
# define HAVE_AVX 1
|
||||
#elif HAVE_LLVM == 0x0301 && (defined(PIPE_OS_LINUX) || defined(PIPE_OS_APPLE))
|
||||
# define USE_MCJIT 1
|
||||
# define HAVE_AVX 1
|
||||
#else
|
||||
# define USE_MCJIT 0
|
||||
# define HAVE_AVX 0
|
||||
|
@@ -35,6 +35,12 @@
|
||||
#include <libudev.h>
|
||||
#include <xf86drm.h>
|
||||
|
||||
#ifdef PIPE_LOADER_HAVE_XCB
|
||||
|
||||
#include <xcb/dri2.h>
|
||||
|
||||
#endif
|
||||
|
||||
#include "state_tracker/drm_driver.h"
|
||||
#include "pipe_loader_priv.h"
|
||||
|
||||
@@ -127,6 +133,59 @@ find_drm_driver_name(struct pipe_loader_drm_device *ddev)
|
||||
|
||||
static struct pipe_loader_ops pipe_loader_drm_ops;
|
||||
|
||||
static void
|
||||
pipe_loader_drm_x_auth(int fd)
|
||||
{
|
||||
#if PIPE_LOADER_HAVE_XCB
|
||||
/* Try authenticate with the X server to give us access to devices that X
|
||||
* is running on. */
|
||||
xcb_connection_t *xcb_conn;
|
||||
const xcb_setup_t *xcb_setup;
|
||||
xcb_screen_iterator_t s;
|
||||
xcb_dri2_connect_cookie_t connect_cookie;
|
||||
xcb_dri2_connect_reply_t *connect;
|
||||
drm_magic_t magic;
|
||||
xcb_dri2_authenticate_cookie_t authenticate_cookie;
|
||||
xcb_dri2_authenticate_reply_t *authenticate;
|
||||
|
||||
xcb_conn = xcb_connect(NULL, NULL);
|
||||
|
||||
if(!xcb_conn)
|
||||
return;
|
||||
|
||||
xcb_setup = xcb_get_setup(xcb_conn);
|
||||
|
||||
if (!xcb_setup)
|
||||
goto disconnect;
|
||||
|
||||
s = xcb_setup_roots_iterator(xcb_setup);
|
||||
connect_cookie = xcb_dri2_connect_unchecked(xcb_conn, s.data->root,
|
||||
XCB_DRI2_DRIVER_TYPE_DRI);
|
||||
connect = xcb_dri2_connect_reply(xcb_conn, connect_cookie, NULL);
|
||||
|
||||
if (!connect || connect->driver_name_length
|
||||
+ connect->device_name_length == 0) {
|
||||
|
||||
goto disconnect;
|
||||
}
|
||||
|
||||
if (drmGetMagic(fd, &magic))
|
||||
goto disconnect;
|
||||
|
||||
authenticate_cookie = xcb_dri2_authenticate_unchecked(xcb_conn,
|
||||
s.data->root,
|
||||
magic);
|
||||
authenticate = xcb_dri2_authenticate_reply(xcb_conn,
|
||||
authenticate_cookie,
|
||||
NULL);
|
||||
FREE(authenticate);
|
||||
|
||||
disconnect:
|
||||
xcb_disconnect(xcb_conn);
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
boolean
|
||||
pipe_loader_drm_probe_fd(struct pipe_loader_device **dev, int fd)
|
||||
{
|
||||
@@ -136,6 +195,8 @@ pipe_loader_drm_probe_fd(struct pipe_loader_device **dev, int fd)
|
||||
ddev->base.ops = &pipe_loader_drm_ops;
|
||||
ddev->fd = fd;
|
||||
|
||||
pipe_loader_drm_x_auth(fd);
|
||||
|
||||
if (!find_drm_pci_id(ddev))
|
||||
goto fail;
|
||||
|
||||
|
@@ -152,7 +152,9 @@ debug_symbol_name_dbghelp(const void *addr, char* buf, unsigned size)
|
||||
#endif
|
||||
|
||||
#ifdef __GLIBC__
|
||||
#ifndef __UCLIBC__
|
||||
#include <execinfo.h>
|
||||
#endif
|
||||
|
||||
/* This can only provide dynamic symbols, or binary offsets into a file.
|
||||
*
|
||||
|
@@ -2107,7 +2107,9 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx)
|
||||
|
||||
r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf));
|
||||
r600_store_context_reg(cb, R_028800_DB_DEPTH_CONTROL, 0);
|
||||
r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
|
||||
if (rctx->screen->has_streamout) {
|
||||
r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
|
||||
}
|
||||
|
||||
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0, 0x01000FFF);
|
||||
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF);
|
||||
@@ -2593,7 +2595,9 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
|
||||
|
||||
r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf));
|
||||
r600_store_context_reg(cb, R_028800_DB_DEPTH_CONTROL, 0);
|
||||
r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
|
||||
if (rctx->screen->has_streamout) {
|
||||
r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
|
||||
}
|
||||
|
||||
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0, 0x01000FFF);
|
||||
eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF);
|
||||
|
@@ -902,7 +902,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
|
||||
switch (rscreen->chip_class) {
|
||||
case R600:
|
||||
case EVERGREEN:
|
||||
rscreen->has_streamout = rscreen->info.drm_minor >= 13;
|
||||
rscreen->has_streamout = rscreen->info.drm_minor >= 14;
|
||||
break;
|
||||
case R700:
|
||||
rscreen->has_streamout = rscreen->info.drm_minor >= 17;
|
||||
|
@@ -372,26 +372,30 @@ static unsigned r600_fc_from_byte_stream(struct r600_shader_ctx *ctx,
|
||||
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE));
|
||||
break;
|
||||
case 1:
|
||||
tgsi_else(ctx);
|
||||
llvm_if(ctx, &alu,
|
||||
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT));
|
||||
break;
|
||||
case 2:
|
||||
tgsi_endif(ctx);
|
||||
tgsi_else(ctx);
|
||||
break;
|
||||
case 3:
|
||||
tgsi_bgnloop(ctx);
|
||||
tgsi_endif(ctx);
|
||||
break;
|
||||
case 4:
|
||||
tgsi_endloop(ctx);
|
||||
tgsi_bgnloop(ctx);
|
||||
break;
|
||||
case 5:
|
||||
r600_break_from_byte_stream(ctx, &alu,
|
||||
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE));
|
||||
tgsi_endloop(ctx);
|
||||
break;
|
||||
case 6:
|
||||
r600_break_from_byte_stream(ctx, &alu,
|
||||
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT));
|
||||
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT));
|
||||
break;
|
||||
case 7:
|
||||
r600_break_from_byte_stream(ctx, &alu,
|
||||
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE));
|
||||
break;
|
||||
case 8:
|
||||
{
|
||||
unsigned opcode = TGSI_OPCODE_CONT;
|
||||
if (ctx->bc->chip_class == CAYMAN) {
|
||||
@@ -407,7 +411,7 @@ static unsigned r600_fc_from_byte_stream(struct r600_shader_ctx *ctx,
|
||||
tgsi_loop_brk_cont(ctx);
|
||||
}
|
||||
break;
|
||||
case 8:
|
||||
case 9:
|
||||
r600_break_from_byte_stream(ctx, &alu,
|
||||
CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT));
|
||||
break;
|
||||
|
@@ -2258,7 +2258,9 @@ void r600_init_atom_start_cs(struct r600_context *rctx)
|
||||
if (rctx->chip_class == R700 && rctx->screen->has_streamout)
|
||||
r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf));
|
||||
r600_store_context_reg(cb, R_028800_DB_DEPTH_CONTROL, 0);
|
||||
r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
|
||||
if (rctx->screen->has_streamout) {
|
||||
r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
|
||||
}
|
||||
|
||||
r600_store_loop_const(cb, R_03E200_SQ_LOOP_CONST_0, 0x1000FFF);
|
||||
r600_store_loop_const(cb, R_03E200_SQ_LOOP_CONST_0 + (32 * 4), 0x1000FFF);
|
||||
|
@@ -1378,7 +1378,7 @@ AMDILTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const
|
||||
Cond = DAG.getNode(
|
||||
ISD::SELECT_CC,
|
||||
Op.getDebugLoc(),
|
||||
LHS.getValueType(),
|
||||
MVT::i32,
|
||||
LHS, RHS,
|
||||
DAG.getConstant(-1, MVT::i32),
|
||||
DAG.getConstant(0, MVT::i32),
|
||||
@@ -1496,7 +1496,7 @@ AMDILTargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const
|
||||
CmpValue = DAG.getNode(
|
||||
ISD::SELECT_CC,
|
||||
Op.getDebugLoc(),
|
||||
LHS.getValueType(),
|
||||
MVT::i32,
|
||||
LHS, RHS,
|
||||
DAG.getConstant(-1, MVT::i32),
|
||||
DAG.getConstant(0, MVT::i32),
|
||||
|
@@ -110,6 +110,7 @@ enum InstrTypes {
|
||||
|
||||
enum FCInstr {
|
||||
FC_IF = 0,
|
||||
FC_IF_INT,
|
||||
FC_ELSE,
|
||||
FC_ENDIF,
|
||||
FC_BGNLOOP,
|
||||
@@ -535,8 +536,9 @@ void R600CodeEmitter::EmitFCInstr(MachineInstr &MI)
|
||||
instr = FC_CONTINUE;
|
||||
break;
|
||||
case AMDGPU::IF_LOGICALNZ_f32:
|
||||
case AMDGPU::IF_LOGICALNZ_i32:
|
||||
instr = FC_IF;
|
||||
case AMDGPU::IF_LOGICALNZ_i32:
|
||||
instr = FC_IF_INT;
|
||||
break;
|
||||
case AMDGPU::IF_LOGICALZ_f32:
|
||||
abort();
|
||||
|
@@ -8,6 +8,8 @@ C_SOURCES := \
|
||||
radeonsi_shader.c \
|
||||
r600_texture.c \
|
||||
evergreen_hw_context.c \
|
||||
evergreen_state.c \
|
||||
r600_translate.c \
|
||||
r600_state_common.c
|
||||
r600_state_common.c \
|
||||
radeonsi_pm4.c \
|
||||
si_state.c \
|
||||
si_state_draw.c
|
||||
|
@@ -30,428 +30,17 @@
|
||||
#include "util/u_memory.h"
|
||||
#include <errno.h>
|
||||
|
||||
#define GROUP_FORCE_NEW_BLOCK 0
|
||||
|
||||
static const struct r600_reg si_config_reg_list[] = {
|
||||
{R_0088B0_VGT_VTX_VECT_EJECT_REG, REG_FLAG_FLUSH_CHANGE},
|
||||
{R_0088C8_VGT_ESGS_RING_SIZE, REG_FLAG_FLUSH_CHANGE},
|
||||
{R_0088CC_VGT_GSVS_RING_SIZE, REG_FLAG_FLUSH_CHANGE},
|
||||
{R_008958_VGT_PRIMITIVE_TYPE, 0},
|
||||
{R_008A14_PA_CL_ENHANCE, REG_FLAG_FLUSH_CHANGE},
|
||||
{R_009100_SPI_CONFIG_CNTL, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE},
|
||||
{R_00913C_SPI_CONFIG_CNTL_1, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE},
|
||||
};
|
||||
|
||||
static const struct r600_reg si_context_reg_list[] = {
|
||||
{R_028000_DB_RENDER_CONTROL, 0},
|
||||
{R_028004_DB_COUNT_CONTROL, 0},
|
||||
{R_028008_DB_DEPTH_VIEW, 0},
|
||||
{R_02800C_DB_RENDER_OVERRIDE, 0},
|
||||
{R_028010_DB_RENDER_OVERRIDE2, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028014_DB_HTILE_DATA_BASE, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028020_DB_DEPTH_BOUNDS_MIN, 0},
|
||||
{R_028024_DB_DEPTH_BOUNDS_MAX, 0},
|
||||
{R_028028_DB_STENCIL_CLEAR, 0},
|
||||
{R_02802C_DB_DEPTH_CLEAR, 0},
|
||||
{R_028030_PA_SC_SCREEN_SCISSOR_TL, 0},
|
||||
{R_028034_PA_SC_SCREEN_SCISSOR_BR, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_02803C_DB_DEPTH_INFO, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028040_DB_Z_INFO, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028044_DB_STENCIL_INFO, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028048_DB_Z_READ_BASE, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_02804C_DB_STENCIL_READ_BASE, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028050_DB_Z_WRITE_BASE, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028054_DB_STENCIL_WRITE_BASE, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028058_DB_DEPTH_SIZE, 0},
|
||||
{R_02805C_DB_DEPTH_SLICE, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028080_TA_BC_BASE_ADDR, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028200_PA_SC_WINDOW_OFFSET, 0},
|
||||
{R_028204_PA_SC_WINDOW_SCISSOR_TL, 0},
|
||||
{R_028208_PA_SC_WINDOW_SCISSOR_BR, 0},
|
||||
{R_02820C_PA_SC_CLIPRECT_RULE, 0},
|
||||
{R_028210_PA_SC_CLIPRECT_0_TL, 0},
|
||||
{R_028214_PA_SC_CLIPRECT_0_BR, 0},
|
||||
{R_028218_PA_SC_CLIPRECT_1_TL, 0},
|
||||
{R_02821C_PA_SC_CLIPRECT_1_BR, 0},
|
||||
{R_028220_PA_SC_CLIPRECT_2_TL, 0},
|
||||
{R_028224_PA_SC_CLIPRECT_2_BR, 0},
|
||||
{R_028228_PA_SC_CLIPRECT_3_TL, 0},
|
||||
{R_02822C_PA_SC_CLIPRECT_3_BR, 0},
|
||||
{R_028230_PA_SC_EDGERULE, 0},
|
||||
{R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0},
|
||||
{R_028238_CB_TARGET_MASK, 0},
|
||||
{R_02823C_CB_SHADER_MASK, 0},
|
||||
{R_028240_PA_SC_GENERIC_SCISSOR_TL, 0},
|
||||
{R_028244_PA_SC_GENERIC_SCISSOR_BR, 0},
|
||||
{R_028250_PA_SC_VPORT_SCISSOR_0_TL, 0},
|
||||
{R_028254_PA_SC_VPORT_SCISSOR_0_BR, 0},
|
||||
{R_0282D0_PA_SC_VPORT_ZMIN_0, 0},
|
||||
{R_0282D4_PA_SC_VPORT_ZMAX_0, 0},
|
||||
{R_028350_PA_SC_RASTER_CONFIG, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028400_VGT_MAX_VTX_INDX, 0},
|
||||
{R_028404_VGT_MIN_VTX_INDX, 0},
|
||||
{R_028408_VGT_INDX_OFFSET, 0},
|
||||
{R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0},
|
||||
{R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028414_CB_BLEND_RED, 0},
|
||||
{R_028418_CB_BLEND_GREEN, 0},
|
||||
{R_02841C_CB_BLEND_BLUE, 0},
|
||||
{R_028420_CB_BLEND_ALPHA, 0},
|
||||
{R_028430_DB_STENCILREFMASK, 0},
|
||||
{R_028434_DB_STENCILREFMASK_BF, 0},
|
||||
{R_02843C_PA_CL_VPORT_XSCALE_0, 0},
|
||||
{R_028440_PA_CL_VPORT_XOFFSET_0, 0},
|
||||
{R_028444_PA_CL_VPORT_YSCALE_0, 0},
|
||||
{R_028448_PA_CL_VPORT_YOFFSET_0, 0},
|
||||
{R_02844C_PA_CL_VPORT_ZSCALE_0, 0},
|
||||
{R_028450_PA_CL_VPORT_ZOFFSET_0, 0},
|
||||
{R_0285BC_PA_CL_UCP_0_X, 0},
|
||||
{R_0285C0_PA_CL_UCP_0_Y, 0},
|
||||
{R_0285C4_PA_CL_UCP_0_Z, 0},
|
||||
{R_0285C8_PA_CL_UCP_0_W, 0},
|
||||
{R_0285CC_PA_CL_UCP_1_X, 0},
|
||||
{R_0285D0_PA_CL_UCP_1_Y, 0},
|
||||
{R_0285D4_PA_CL_UCP_1_Z, 0},
|
||||
{R_0285D8_PA_CL_UCP_1_W, 0},
|
||||
{R_0285DC_PA_CL_UCP_2_X, 0},
|
||||
{R_0285E0_PA_CL_UCP_2_Y, 0},
|
||||
{R_0285E4_PA_CL_UCP_2_Z, 0},
|
||||
{R_0285E8_PA_CL_UCP_2_W, 0},
|
||||
{R_0285EC_PA_CL_UCP_3_X, 0},
|
||||
{R_0285F0_PA_CL_UCP_3_Y, 0},
|
||||
{R_0285F4_PA_CL_UCP_3_Z, 0},
|
||||
{R_0285F8_PA_CL_UCP_3_W, 0},
|
||||
{R_0285FC_PA_CL_UCP_4_X, 0},
|
||||
{R_028600_PA_CL_UCP_4_Y, 0},
|
||||
{R_028604_PA_CL_UCP_4_Z, 0},
|
||||
{R_028608_PA_CL_UCP_4_W, 0},
|
||||
{R_02860C_PA_CL_UCP_5_X, 0},
|
||||
{R_028610_PA_CL_UCP_5_Y, 0},
|
||||
{R_028614_PA_CL_UCP_5_Z, 0},
|
||||
{R_028618_PA_CL_UCP_5_W, 0},
|
||||
{R_028644_SPI_PS_INPUT_CNTL_0, 0},
|
||||
{R_028648_SPI_PS_INPUT_CNTL_1, 0},
|
||||
{R_02864C_SPI_PS_INPUT_CNTL_2, 0},
|
||||
{R_028650_SPI_PS_INPUT_CNTL_3, 0},
|
||||
{R_028654_SPI_PS_INPUT_CNTL_4, 0},
|
||||
{R_028658_SPI_PS_INPUT_CNTL_5, 0},
|
||||
{R_02865C_SPI_PS_INPUT_CNTL_6, 0},
|
||||
{R_028660_SPI_PS_INPUT_CNTL_7, 0},
|
||||
{R_028664_SPI_PS_INPUT_CNTL_8, 0},
|
||||
{R_028668_SPI_PS_INPUT_CNTL_9, 0},
|
||||
{R_02866C_SPI_PS_INPUT_CNTL_10, 0},
|
||||
{R_028670_SPI_PS_INPUT_CNTL_11, 0},
|
||||
{R_028674_SPI_PS_INPUT_CNTL_12, 0},
|
||||
{R_028678_SPI_PS_INPUT_CNTL_13, 0},
|
||||
{R_02867C_SPI_PS_INPUT_CNTL_14, 0},
|
||||
{R_028680_SPI_PS_INPUT_CNTL_15, 0},
|
||||
{R_028684_SPI_PS_INPUT_CNTL_16, 0},
|
||||
{R_028688_SPI_PS_INPUT_CNTL_17, 0},
|
||||
{R_02868C_SPI_PS_INPUT_CNTL_18, 0},
|
||||
{R_028690_SPI_PS_INPUT_CNTL_19, 0},
|
||||
{R_028694_SPI_PS_INPUT_CNTL_20, 0},
|
||||
{R_028698_SPI_PS_INPUT_CNTL_21, 0},
|
||||
{R_02869C_SPI_PS_INPUT_CNTL_22, 0},
|
||||
{R_0286A0_SPI_PS_INPUT_CNTL_23, 0},
|
||||
{R_0286A4_SPI_PS_INPUT_CNTL_24, 0},
|
||||
{R_0286A8_SPI_PS_INPUT_CNTL_25, 0},
|
||||
{R_0286AC_SPI_PS_INPUT_CNTL_26, 0},
|
||||
{R_0286B0_SPI_PS_INPUT_CNTL_27, 0},
|
||||
{R_0286B4_SPI_PS_INPUT_CNTL_28, 0},
|
||||
{R_0286B8_SPI_PS_INPUT_CNTL_29, 0},
|
||||
{R_0286BC_SPI_PS_INPUT_CNTL_30, 0},
|
||||
{R_0286C0_SPI_PS_INPUT_CNTL_31, 0},
|
||||
{R_0286C4_SPI_VS_OUT_CONFIG, 0},
|
||||
{R_0286CC_SPI_PS_INPUT_ENA, 0},
|
||||
{R_0286D0_SPI_PS_INPUT_ADDR, 0},
|
||||
{R_0286D4_SPI_INTERP_CONTROL_0, 0},
|
||||
{R_0286D8_SPI_PS_IN_CONTROL, 0},
|
||||
{R_0286E0_SPI_BARYC_CNTL, 0},
|
||||
{R_02870C_SPI_SHADER_POS_FORMAT, 0},
|
||||
{R_028710_SPI_SHADER_Z_FORMAT, 0},
|
||||
{R_028714_SPI_SHADER_COL_FORMAT, 0},
|
||||
{R_028780_CB_BLEND0_CONTROL, 0},
|
||||
{R_028784_CB_BLEND1_CONTROL, 0},
|
||||
{R_028788_CB_BLEND2_CONTROL, 0},
|
||||
{R_02878C_CB_BLEND3_CONTROL, 0},
|
||||
{R_028790_CB_BLEND4_CONTROL, 0},
|
||||
{R_028794_CB_BLEND5_CONTROL, 0},
|
||||
{R_028798_CB_BLEND6_CONTROL, 0},
|
||||
{R_02879C_CB_BLEND7_CONTROL, 0},
|
||||
{R_0287D4_PA_CL_POINT_X_RAD, 0},
|
||||
{R_0287D8_PA_CL_POINT_Y_RAD, 0},
|
||||
{R_0287DC_PA_CL_POINT_SIZE, 0},
|
||||
{R_0287E0_PA_CL_POINT_CULL_RAD, 0},
|
||||
{R_028800_DB_DEPTH_CONTROL, 0},
|
||||
{R_028804_DB_EQAA, 0},
|
||||
{R_028808_CB_COLOR_CONTROL, 0},
|
||||
{R_02880C_DB_SHADER_CONTROL, 0},
|
||||
{R_028810_PA_CL_CLIP_CNTL, 0},
|
||||
{R_028814_PA_SU_SC_MODE_CNTL, 0},
|
||||
{R_028818_PA_CL_VTE_CNTL, 0},
|
||||
{R_02881C_PA_CL_VS_OUT_CNTL, 0},
|
||||
{R_028820_PA_CL_NANINF_CNTL, 0},
|
||||
{R_028824_PA_SU_LINE_STIPPLE_CNTL, 0},
|
||||
{R_028828_PA_SU_LINE_STIPPLE_SCALE, 0},
|
||||
{R_02882C_PA_SU_PRIM_FILTER_CNTL, 0},
|
||||
{R_028A00_PA_SU_POINT_SIZE, 0},
|
||||
{R_028A04_PA_SU_POINT_MINMAX, 0},
|
||||
{R_028A08_PA_SU_LINE_CNTL, 0},
|
||||
{R_028A0C_PA_SC_LINE_STIPPLE, 0},
|
||||
{R_028A10_VGT_OUTPUT_PATH_CNTL, 0},
|
||||
{R_028A14_VGT_HOS_CNTL, 0},
|
||||
{R_028A18_VGT_HOS_MAX_TESS_LEVEL, 0},
|
||||
{R_028A1C_VGT_HOS_MIN_TESS_LEVEL, 0},
|
||||
{R_028A20_VGT_HOS_REUSE_DEPTH, 0},
|
||||
{R_028A24_VGT_GROUP_PRIM_TYPE, 0},
|
||||
{R_028A28_VGT_GROUP_FIRST_DECR, 0},
|
||||
{R_028A2C_VGT_GROUP_DECR, 0},
|
||||
{R_028A30_VGT_GROUP_VECT_0_CNTL, 0},
|
||||
{R_028A34_VGT_GROUP_VECT_1_CNTL, 0},
|
||||
{R_028A38_VGT_GROUP_VECT_0_FMT_CNTL, 0},
|
||||
{R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL, 0},
|
||||
{R_028A40_VGT_GS_MODE, 0},
|
||||
{R_028A48_PA_SC_MODE_CNTL_0, 0},
|
||||
{R_028A4C_PA_SC_MODE_CNTL_1, 0},
|
||||
{R_028A50_VGT_ENHANCE, 0},
|
||||
{R_028A54_VGT_GS_PER_ES, 0},
|
||||
{R_028A58_VGT_ES_PER_GS, 0},
|
||||
{R_028A5C_VGT_GS_PER_VS, 0},
|
||||
{R_028A60_VGT_GSVS_RING_OFFSET_1, 0},
|
||||
{R_028A64_VGT_GSVS_RING_OFFSET_2, 0},
|
||||
{R_028A68_VGT_GSVS_RING_OFFSET_3, 0},
|
||||
{R_028A6C_VGT_GS_OUT_PRIM_TYPE, 0},
|
||||
{R_028A70_IA_ENHANCE, 0},
|
||||
{R_028A84_VGT_PRIMITIVEID_EN, 0},
|
||||
{R_028A8C_VGT_PRIMITIVEID_RESET, 0},
|
||||
{R_028AA0_VGT_INSTANCE_STEP_RATE_0, 0},
|
||||
{R_028AA4_VGT_INSTANCE_STEP_RATE_1, 0},
|
||||
{R_028AA8_IA_MULTI_VGT_PARAM, 0},
|
||||
{R_028AAC_VGT_ESGS_RING_ITEMSIZE, 0},
|
||||
{R_028AB0_VGT_GSVS_RING_ITEMSIZE, 0},
|
||||
{R_028AB4_VGT_REUSE_OFF, 0},
|
||||
{R_028AB8_VGT_VTX_CNT_EN, 0},
|
||||
{R_028ABC_DB_HTILE_SURFACE, 0},
|
||||
{R_028AC0_DB_SRESULTS_COMPARE_STATE0, 0},
|
||||
{R_028AC4_DB_SRESULTS_COMPARE_STATE1, 0},
|
||||
{R_028AC8_DB_PRELOAD_CONTROL, 0},
|
||||
{R_028B54_VGT_SHADER_STAGES_EN, 0},
|
||||
{R_028B70_DB_ALPHA_TO_MASK, 0},
|
||||
{R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, 0},
|
||||
{R_028B7C_PA_SU_POLY_OFFSET_CLAMP, 0},
|
||||
{R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE, 0},
|
||||
{R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET, 0},
|
||||
{R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE, 0},
|
||||
{R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET, 0},
|
||||
{R_028B94_VGT_STRMOUT_CONFIG, 0},
|
||||
{R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 0},
|
||||
{R_028BD4_PA_SC_CENTROID_PRIORITY_0, 0},
|
||||
{R_028BD8_PA_SC_CENTROID_PRIORITY_1, 0},
|
||||
{R_028BDC_PA_SC_LINE_CNTL, 0},
|
||||
{R_028BE0_PA_SC_AA_CONFIG, 0},
|
||||
{R_028BE4_PA_SU_VTX_CNTL, 0},
|
||||
{R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 0},
|
||||
{R_028BEC_PA_CL_GB_VERT_DISC_ADJ, 0},
|
||||
{R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ, 0},
|
||||
{R_028BF4_PA_CL_GB_HORZ_DISC_ADJ, 0},
|
||||
{R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0},
|
||||
{R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1, 0},
|
||||
{R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2, 0},
|
||||
{R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3, 0},
|
||||
{R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0},
|
||||
{R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1, 0},
|
||||
{R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2, 0},
|
||||
{R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3, 0},
|
||||
{R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0},
|
||||
{R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1, 0},
|
||||
{R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2, 0},
|
||||
{R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3, 0},
|
||||
{R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0},
|
||||
{R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1, 0},
|
||||
{R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2, 0},
|
||||
{R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3, 0},
|
||||
{R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, 0},
|
||||
{R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028C60_CB_COLOR0_BASE, REG_FLAG_NEED_BO},
|
||||
{R_028C64_CB_COLOR0_PITCH, 0},
|
||||
{R_028C68_CB_COLOR0_SLICE, 0},
|
||||
{R_028C6C_CB_COLOR0_VIEW, 0},
|
||||
{R_028C70_CB_COLOR0_INFO, REG_FLAG_NEED_BO},
|
||||
{R_028C74_CB_COLOR0_ATTRIB, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028C9C_CB_COLOR1_BASE, REG_FLAG_NEED_BO},
|
||||
{R_028CA0_CB_COLOR1_PITCH, 0},
|
||||
{R_028CA4_CB_COLOR1_SLICE, 0},
|
||||
{R_028CA8_CB_COLOR1_VIEW, 0},
|
||||
{R_028CAC_CB_COLOR1_INFO, REG_FLAG_NEED_BO},
|
||||
{R_028CB0_CB_COLOR1_ATTRIB, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028CD8_CB_COLOR2_BASE, REG_FLAG_NEED_BO},
|
||||
{R_028CDC_CB_COLOR2_PITCH, 0},
|
||||
{R_028CE0_CB_COLOR2_SLICE, 0},
|
||||
{R_028CE4_CB_COLOR2_VIEW, 0},
|
||||
{R_028CE8_CB_COLOR2_INFO, REG_FLAG_NEED_BO},
|
||||
{R_028CEC_CB_COLOR2_ATTRIB, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028D14_CB_COLOR3_BASE, REG_FLAG_NEED_BO},
|
||||
{R_028D18_CB_COLOR3_PITCH, 0},
|
||||
{R_028D1C_CB_COLOR3_SLICE, 0},
|
||||
{R_028D20_CB_COLOR3_VIEW, 0},
|
||||
{R_028D24_CB_COLOR3_INFO, REG_FLAG_NEED_BO},
|
||||
{R_028D28_CB_COLOR3_ATTRIB, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028D50_CB_COLOR4_BASE, REG_FLAG_NEED_BO},
|
||||
{R_028D54_CB_COLOR4_PITCH, 0},
|
||||
{R_028D58_CB_COLOR4_SLICE, 0},
|
||||
{R_028D5C_CB_COLOR4_VIEW, 0},
|
||||
{R_028D60_CB_COLOR4_INFO, REG_FLAG_NEED_BO},
|
||||
{R_028D64_CB_COLOR4_ATTRIB, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028D8C_CB_COLOR5_BASE, REG_FLAG_NEED_BO},
|
||||
{R_028D90_CB_COLOR5_PITCH, 0},
|
||||
{R_028D94_CB_COLOR5_SLICE, 0},
|
||||
{R_028D98_CB_COLOR5_VIEW, 0},
|
||||
{R_028D9C_CB_COLOR5_INFO, REG_FLAG_NEED_BO},
|
||||
{R_028DA0_CB_COLOR5_ATTRIB, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028DC8_CB_COLOR6_BASE, REG_FLAG_NEED_BO},
|
||||
{R_028DCC_CB_COLOR6_PITCH, 0},
|
||||
{R_028DD0_CB_COLOR6_SLICE, 0},
|
||||
{R_028DD4_CB_COLOR6_VIEW, 0},
|
||||
{R_028DD8_CB_COLOR6_INFO, REG_FLAG_NEED_BO},
|
||||
{R_028DDC_CB_COLOR6_ATTRIB, REG_FLAG_NEED_BO},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_028E04_CB_COLOR7_BASE, REG_FLAG_NEED_BO},
|
||||
{R_028E08_CB_COLOR7_PITCH, 0},
|
||||
{R_028E0C_CB_COLOR7_SLICE, 0},
|
||||
{R_028E10_CB_COLOR7_VIEW, 0},
|
||||
{R_028E14_CB_COLOR7_INFO, REG_FLAG_NEED_BO},
|
||||
{R_028E18_CB_COLOR7_ATTRIB, REG_FLAG_NEED_BO},
|
||||
};
|
||||
|
||||
static const struct r600_reg si_sh_reg_list[] = {
|
||||
{R_00B020_SPI_SHADER_PGM_LO_PS, REG_FLAG_NEED_BO},
|
||||
{R_00B024_SPI_SHADER_PGM_HI_PS, REG_FLAG_NEED_BO},
|
||||
{R_00B028_SPI_SHADER_PGM_RSRC1_PS, 0},
|
||||
{R_00B02C_SPI_SHADER_PGM_RSRC2_PS, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B030_SPI_SHADER_USER_DATA_PS_0, REG_FLAG_NEED_BO},
|
||||
{R_00B034_SPI_SHADER_USER_DATA_PS_1, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B038_SPI_SHADER_USER_DATA_PS_2, REG_FLAG_NEED_BO},
|
||||
{R_00B03C_SPI_SHADER_USER_DATA_PS_3, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B040_SPI_SHADER_USER_DATA_PS_4, REG_FLAG_NEED_BO},
|
||||
{R_00B044_SPI_SHADER_USER_DATA_PS_5, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B048_SPI_SHADER_USER_DATA_PS_6, REG_FLAG_NEED_BO},
|
||||
{R_00B04C_SPI_SHADER_USER_DATA_PS_7, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B050_SPI_SHADER_USER_DATA_PS_8, REG_FLAG_NEED_BO},
|
||||
{R_00B054_SPI_SHADER_USER_DATA_PS_9, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B058_SPI_SHADER_USER_DATA_PS_10, REG_FLAG_NEED_BO},
|
||||
{R_00B05C_SPI_SHADER_USER_DATA_PS_11, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B060_SPI_SHADER_USER_DATA_PS_12, REG_FLAG_NEED_BO},
|
||||
{R_00B064_SPI_SHADER_USER_DATA_PS_13, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B068_SPI_SHADER_USER_DATA_PS_14, REG_FLAG_NEED_BO},
|
||||
{R_00B06C_SPI_SHADER_USER_DATA_PS_15, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B120_SPI_SHADER_PGM_LO_VS, REG_FLAG_NEED_BO},
|
||||
{R_00B124_SPI_SHADER_PGM_HI_VS, REG_FLAG_NEED_BO},
|
||||
{R_00B128_SPI_SHADER_PGM_RSRC1_VS, 0},
|
||||
{R_00B12C_SPI_SHADER_PGM_RSRC2_VS, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B130_SPI_SHADER_USER_DATA_VS_0, REG_FLAG_NEED_BO},
|
||||
{R_00B134_SPI_SHADER_USER_DATA_VS_1, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B138_SPI_SHADER_USER_DATA_VS_2, REG_FLAG_NEED_BO},
|
||||
{R_00B13C_SPI_SHADER_USER_DATA_VS_3, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B140_SPI_SHADER_USER_DATA_VS_4, REG_FLAG_NEED_BO},
|
||||
{R_00B144_SPI_SHADER_USER_DATA_VS_5, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B148_SPI_SHADER_USER_DATA_VS_6, REG_FLAG_NEED_BO},
|
||||
{R_00B14C_SPI_SHADER_USER_DATA_VS_7, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B150_SPI_SHADER_USER_DATA_VS_8, REG_FLAG_NEED_BO},
|
||||
{R_00B154_SPI_SHADER_USER_DATA_VS_9, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B158_SPI_SHADER_USER_DATA_VS_10, REG_FLAG_NEED_BO},
|
||||
{R_00B15C_SPI_SHADER_USER_DATA_VS_11, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B160_SPI_SHADER_USER_DATA_VS_12, REG_FLAG_NEED_BO},
|
||||
{R_00B164_SPI_SHADER_USER_DATA_VS_13, 0},
|
||||
{GROUP_FORCE_NEW_BLOCK, 0},
|
||||
{R_00B168_SPI_SHADER_USER_DATA_VS_14, REG_FLAG_NEED_BO},
|
||||
{R_00B16C_SPI_SHADER_USER_DATA_VS_15, 0},
|
||||
};
|
||||
|
||||
int si_context_init(struct r600_context *ctx)
|
||||
{
|
||||
int r;
|
||||
|
||||
LIST_INITHEAD(&ctx->active_query_list);
|
||||
|
||||
/* init dirty list */
|
||||
LIST_INITHEAD(&ctx->dirty);
|
||||
LIST_INITHEAD(&ctx->enable_list);
|
||||
|
||||
ctx->range = calloc(NUM_RANGES, sizeof(struct r600_range));
|
||||
if (!ctx->range) {
|
||||
r = -ENOMEM;
|
||||
goto out_err;
|
||||
}
|
||||
|
||||
/* add blocks */
|
||||
r = r600_context_add_block(ctx, si_config_reg_list,
|
||||
Elements(si_config_reg_list), PKT3_SET_CONFIG_REG, SI_CONFIG_REG_OFFSET);
|
||||
if (r)
|
||||
goto out_err;
|
||||
r = r600_context_add_block(ctx, si_context_reg_list,
|
||||
Elements(si_context_reg_list), PKT3_SET_CONTEXT_REG, SI_CONTEXT_REG_OFFSET);
|
||||
if (r)
|
||||
goto out_err;
|
||||
r = r600_context_add_block(ctx, si_sh_reg_list,
|
||||
Elements(si_sh_reg_list), PKT3_SET_SH_REG, SI_SH_REG_OFFSET);
|
||||
if (r)
|
||||
goto out_err;
|
||||
|
||||
|
||||
/* PS SAMPLER */
|
||||
/* VS SAMPLER */
|
||||
|
||||
/* PS SAMPLER BORDER */
|
||||
/* VS SAMPLER BORDER */
|
||||
|
||||
/* PS RESOURCES */
|
||||
/* VS RESOURCES */
|
||||
|
||||
ctx->cs = ctx->ws->cs_create(ctx->ws);
|
||||
|
||||
r600_init_cs(ctx);
|
||||
ctx->max_db = 8;
|
||||
return 0;
|
||||
out_err:
|
||||
r600_context_fini(ctx);
|
||||
return r;
|
||||
}
|
||||
|
||||
static inline void evergreen_context_ps_partial_flush(struct r600_context *ctx)
|
||||
|
@@ -67,64 +67,6 @@ struct r600_resource {
|
||||
};
|
||||
|
||||
/* R600/R700 STATES */
|
||||
#define R600_GROUP_MAX 16
|
||||
#define R600_BLOCK_MAX_BO 32
|
||||
#define R600_BLOCK_MAX_REG 128
|
||||
|
||||
/* each range covers 9 bits of dword space = 512 dwords = 2k bytes */
|
||||
/* there is a block entry for each register so 512 blocks */
|
||||
/* we have no registers to read/write below 0x8000 (0x2000 in dw space) */
|
||||
/* we use some fake offsets at 0x40000 to do evergreen sampler borders so take 0x42000 as a max bound*/
|
||||
#define RANGE_OFFSET_START 0x8000
|
||||
#define HASH_SHIFT 9
|
||||
#define NUM_RANGES (0x42000 - RANGE_OFFSET_START) / (4 << HASH_SHIFT) /* 128 << 9 = 64k */
|
||||
|
||||
#define CTX_RANGE_ID(offset) ((((offset - RANGE_OFFSET_START) >> 2) >> HASH_SHIFT) & 255)
|
||||
#define CTX_BLOCK_ID(offset) (((offset - RANGE_OFFSET_START) >> 2) & ((1 << HASH_SHIFT) - 1))
|
||||
|
||||
struct r600_pipe_reg {
|
||||
uint32_t value;
|
||||
struct r600_block *block;
|
||||
struct r600_resource *bo;
|
||||
enum radeon_bo_usage bo_usage;
|
||||
uint32_t id;
|
||||
};
|
||||
|
||||
struct r600_pipe_state {
|
||||
unsigned id;
|
||||
unsigned nregs;
|
||||
struct r600_pipe_reg regs[R600_BLOCK_MAX_REG];
|
||||
};
|
||||
|
||||
#define R600_BLOCK_STATUS_ENABLED (1 << 0)
|
||||
#define R600_BLOCK_STATUS_DIRTY (1 << 1)
|
||||
|
||||
struct r600_block_reloc {
|
||||
struct r600_resource *bo;
|
||||
enum radeon_bo_usage bo_usage;
|
||||
unsigned bo_pm4_index;
|
||||
};
|
||||
|
||||
struct r600_block {
|
||||
struct list_head list;
|
||||
struct list_head enable_list;
|
||||
unsigned status;
|
||||
unsigned flags;
|
||||
unsigned start_offset;
|
||||
unsigned pm4_ndwords;
|
||||
unsigned nbo;
|
||||
uint16_t nreg;
|
||||
uint16_t nreg_dirty;
|
||||
uint32_t *reg;
|
||||
uint32_t pm4[R600_BLOCK_MAX_REG];
|
||||
unsigned pm4_bo_index[R600_BLOCK_MAX_REG];
|
||||
struct r600_block_reloc reloc[R600_BLOCK_MAX_BO];
|
||||
};
|
||||
|
||||
struct r600_range {
|
||||
struct r600_block **blocks;
|
||||
};
|
||||
|
||||
struct r600_query {
|
||||
union {
|
||||
uint64_t u64;
|
||||
@@ -178,8 +120,6 @@ struct r600_context;
|
||||
struct r600_screen;
|
||||
|
||||
void r600_get_backend_mask(struct r600_context *ctx);
|
||||
void r600_context_fini(struct r600_context *ctx);
|
||||
void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_state *state);
|
||||
void r600_context_flush(struct r600_context *ctx, unsigned flags);
|
||||
|
||||
struct r600_query *r600_context_query_create(struct r600_context *ctx, unsigned query_type);
|
||||
@@ -195,50 +135,13 @@ void r600_query_predication(struct r600_context *ctx, struct r600_query *query,
|
||||
int flag_wait);
|
||||
void r600_context_emit_fence(struct r600_context *ctx, struct r600_resource *fence,
|
||||
unsigned offset, unsigned value);
|
||||
void r600_inval_shader_cache(struct r600_context *ctx);
|
||||
void r600_inval_texture_cache(struct r600_context *ctx);
|
||||
void r600_inval_vertex_cache(struct r600_context *ctx);
|
||||
void r600_flush_framebuffer(struct r600_context *ctx, bool flush_now);
|
||||
|
||||
void r600_context_streamout_begin(struct r600_context *ctx);
|
||||
void r600_context_streamout_end(struct r600_context *ctx);
|
||||
void r600_context_draw_opaque_count(struct r600_context *ctx, struct r600_so_target *t);
|
||||
void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw, boolean count_draw_in);
|
||||
void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block);
|
||||
void r600_context_block_resource_emit_dirty(struct r600_context *ctx, struct r600_block *block);
|
||||
|
||||
int si_context_init(struct r600_context *ctx);
|
||||
void si_context_draw(struct r600_context *ctx, const struct r600_draw *draw);
|
||||
|
||||
void _r600_pipe_state_add_reg(struct r600_context *ctx,
|
||||
struct r600_pipe_state *state,
|
||||
uint32_t offset, uint32_t value,
|
||||
uint32_t range_id, uint32_t block_id,
|
||||
struct r600_resource *bo,
|
||||
enum radeon_bo_usage usage);
|
||||
|
||||
void r600_pipe_state_add_reg_noblock(struct r600_pipe_state *state,
|
||||
uint32_t offset, uint32_t value,
|
||||
struct r600_resource *bo,
|
||||
enum radeon_bo_usage usage);
|
||||
|
||||
#define r600_pipe_state_add_reg(state, offset, value, bo, usage) _r600_pipe_state_add_reg(rctx, state, offset, value, CTX_RANGE_ID(offset), CTX_BLOCK_ID(offset), bo, usage)
|
||||
|
||||
static inline void r600_pipe_state_mod_reg(struct r600_pipe_state *state,
|
||||
uint32_t value)
|
||||
{
|
||||
state->regs[state->nregs].value = value;
|
||||
state->nregs++;
|
||||
}
|
||||
|
||||
static inline void r600_pipe_state_mod_reg_bo(struct r600_pipe_state *state,
|
||||
uint32_t value, struct r600_resource *bo,
|
||||
enum radeon_bo_usage usage)
|
||||
{
|
||||
state->regs[state->nregs].value = value;
|
||||
state->regs[state->nregs].bo = bo;
|
||||
state->regs[state->nregs].bo_usage = usage;
|
||||
state->nregs++;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@@ -24,6 +24,7 @@
|
||||
#include "util/u_blitter.h"
|
||||
#include "util/u_format.h"
|
||||
#include "radeonsi_pipe.h"
|
||||
#include "si_state.h"
|
||||
|
||||
enum r600_blitter_op /* bitmask */
|
||||
{
|
||||
@@ -47,17 +48,15 @@ static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op
|
||||
|
||||
r600_context_queries_suspend(rctx);
|
||||
|
||||
util_blitter_save_blend(rctx->blitter, rctx->states[R600_PIPE_STATE_BLEND]);
|
||||
util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->states[R600_PIPE_STATE_DSA]);
|
||||
if (rctx->states[R600_PIPE_STATE_STENCIL_REF]) {
|
||||
util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref);
|
||||
}
|
||||
util_blitter_save_rasterizer(rctx->blitter, rctx->states[R600_PIPE_STATE_RASTERIZER]);
|
||||
util_blitter_save_blend(rctx->blitter, rctx->queued.named.blend);
|
||||
util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->queued.named.dsa);
|
||||
util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref);
|
||||
util_blitter_save_rasterizer(rctx->blitter, rctx->queued.named.rasterizer);
|
||||
util_blitter_save_fragment_shader(rctx->blitter, rctx->ps_shader);
|
||||
util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader);
|
||||
util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_elements);
|
||||
if (rctx->states[R600_PIPE_STATE_VIEWPORT]) {
|
||||
util_blitter_save_viewport(rctx->blitter, &rctx->viewport);
|
||||
if (rctx->queued.named.viewport) {
|
||||
util_blitter_save_viewport(rctx->blitter, &rctx->queued.named.viewport->viewport);
|
||||
}
|
||||
util_blitter_save_vertex_buffers(rctx->blitter,
|
||||
rctx->nr_vertex_buffers,
|
||||
|
@@ -24,6 +24,7 @@
|
||||
* Jerome Glisse
|
||||
*/
|
||||
#include "r600_hw_context_priv.h"
|
||||
#include "radeonsi_pm4.h"
|
||||
#include "radeonsi_pipe.h"
|
||||
#include "sid.h"
|
||||
#include "util/u_memory.h"
|
||||
@@ -139,167 +140,7 @@ void r600_init_cs(struct r600_context *ctx)
|
||||
ctx->init_dwords = cs->cdw;
|
||||
}
|
||||
|
||||
static void r600_init_block(struct r600_context *ctx,
|
||||
struct r600_block *block,
|
||||
const struct r600_reg *reg, int index, int nreg,
|
||||
unsigned opcode, unsigned offset_base)
|
||||
{
|
||||
int i = index;
|
||||
int j, n = nreg;
|
||||
|
||||
/* initialize block */
|
||||
block->flags = 0;
|
||||
block->status |= R600_BLOCK_STATUS_DIRTY; /* dirty all blocks at start */
|
||||
block->start_offset = reg[i].offset;
|
||||
block->pm4[block->pm4_ndwords++] = PKT3(opcode, n, 0);
|
||||
block->pm4[block->pm4_ndwords++] = (block->start_offset - offset_base) >> 2;
|
||||
block->reg = &block->pm4[block->pm4_ndwords];
|
||||
block->pm4_ndwords += n;
|
||||
block->nreg = n;
|
||||
block->nreg_dirty = n;
|
||||
LIST_INITHEAD(&block->list);
|
||||
LIST_INITHEAD(&block->enable_list);
|
||||
|
||||
for (j = 0; j < n; j++) {
|
||||
if (reg[i+j].flags & REG_FLAG_DIRTY_ALWAYS) {
|
||||
block->flags |= REG_FLAG_DIRTY_ALWAYS;
|
||||
}
|
||||
if (reg[i+j].flags & REG_FLAG_ENABLE_ALWAYS) {
|
||||
if (!(block->status & R600_BLOCK_STATUS_ENABLED)) {
|
||||
block->status |= R600_BLOCK_STATUS_ENABLED;
|
||||
LIST_ADDTAIL(&block->enable_list, &ctx->enable_list);
|
||||
LIST_ADDTAIL(&block->list,&ctx->dirty);
|
||||
}
|
||||
}
|
||||
if (reg[i+j].flags & REG_FLAG_FLUSH_CHANGE) {
|
||||
block->flags |= REG_FLAG_FLUSH_CHANGE;
|
||||
}
|
||||
|
||||
if (reg[i+j].flags & REG_FLAG_NEED_BO) {
|
||||
block->nbo++;
|
||||
assert(block->nbo < R600_BLOCK_MAX_BO);
|
||||
block->pm4_bo_index[j] = block->nbo;
|
||||
block->pm4[block->pm4_ndwords++] = PKT3(PKT3_NOP, 0, 0);
|
||||
block->pm4[block->pm4_ndwords++] = 0x00000000;
|
||||
block->reloc[block->nbo].bo_pm4_index = block->pm4_ndwords - 1;
|
||||
}
|
||||
}
|
||||
/* check that we stay in limit */
|
||||
assert(block->pm4_ndwords < R600_BLOCK_MAX_REG);
|
||||
}
|
||||
|
||||
int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg,
|
||||
unsigned opcode, unsigned offset_base)
|
||||
{
|
||||
struct r600_block *block;
|
||||
struct r600_range *range;
|
||||
int offset;
|
||||
|
||||
for (unsigned i = 0, n = 0; i < nreg; i += n) {
|
||||
/* ignore new block balise */
|
||||
if (reg[i].offset == GROUP_FORCE_NEW_BLOCK) {
|
||||
n = 1;
|
||||
continue;
|
||||
}
|
||||
|
||||
/* register that need relocation are in their own group */
|
||||
/* find number of consecutive registers */
|
||||
n = 0;
|
||||
offset = reg[i].offset;
|
||||
while (reg[i + n].offset == offset) {
|
||||
n++;
|
||||
offset += 4;
|
||||
if ((n + i) >= nreg)
|
||||
break;
|
||||
if (n >= (R600_BLOCK_MAX_REG - 2))
|
||||
break;
|
||||
}
|
||||
|
||||
/* allocate new block */
|
||||
block = calloc(1, sizeof(struct r600_block));
|
||||
if (block == NULL) {
|
||||
return -ENOMEM;
|
||||
}
|
||||
ctx->nblocks++;
|
||||
for (int j = 0; j < n; j++) {
|
||||
range = &ctx->range[CTX_RANGE_ID(reg[i + j].offset)];
|
||||
/* create block table if it doesn't exist */
|
||||
if (!range->blocks)
|
||||
range->blocks = calloc(1 << HASH_SHIFT, sizeof(void *));
|
||||
if (!range->blocks)
|
||||
return -1;
|
||||
|
||||
range->blocks[CTX_BLOCK_ID(reg[i + j].offset)] = block;
|
||||
}
|
||||
|
||||
r600_init_block(ctx, block, reg, i, n, opcode, offset_base);
|
||||
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/* initialize */
|
||||
void r600_context_fini(struct r600_context *ctx)
|
||||
{
|
||||
struct r600_block *block;
|
||||
struct r600_range *range;
|
||||
|
||||
for (int i = 0; i < NUM_RANGES; i++) {
|
||||
if (!ctx->range[i].blocks)
|
||||
continue;
|
||||
for (int j = 0; j < (1 << HASH_SHIFT); j++) {
|
||||
block = ctx->range[i].blocks[j];
|
||||
if (block) {
|
||||
for (int k = 0, offset = block->start_offset; k < block->nreg; k++, offset += 4) {
|
||||
range = &ctx->range[CTX_RANGE_ID(offset)];
|
||||
range->blocks[CTX_BLOCK_ID(offset)] = NULL;
|
||||
}
|
||||
for (int k = 1; k <= block->nbo; k++) {
|
||||
pipe_resource_reference((struct pipe_resource**)&block->reloc[k].bo, NULL);
|
||||
}
|
||||
free(block);
|
||||
}
|
||||
}
|
||||
free(ctx->range[i].blocks);
|
||||
}
|
||||
free(ctx->range);
|
||||
free(ctx->blocks);
|
||||
ctx->ws->cs_destroy(ctx->cs);
|
||||
}
|
||||
|
||||
int r600_setup_block_table(struct r600_context *ctx)
|
||||
{
|
||||
/* setup block table */
|
||||
int c = 0;
|
||||
ctx->blocks = calloc(ctx->nblocks, sizeof(void*));
|
||||
if (!ctx->blocks)
|
||||
return -ENOMEM;
|
||||
for (int i = 0; i < NUM_RANGES; i++) {
|
||||
if (!ctx->range[i].blocks)
|
||||
continue;
|
||||
for (int j = 0, add; j < (1 << HASH_SHIFT); j++) {
|
||||
if (!ctx->range[i].blocks[j])
|
||||
continue;
|
||||
|
||||
add = 1;
|
||||
for (int k = 0; k < c; k++) {
|
||||
if (ctx->blocks[k] == ctx->range[i].blocks[j]) {
|
||||
add = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (add) {
|
||||
assert(c < ctx->nblocks);
|
||||
ctx->blocks[c++] = ctx->range[i].blocks[j];
|
||||
j += (ctx->range[i].blocks[j]->nreg) - 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
|
||||
boolean count_draw_in)
|
||||
{
|
||||
@@ -343,150 +184,7 @@ void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
|
||||
}
|
||||
}
|
||||
|
||||
void r600_context_dirty_block(struct r600_context *ctx,
|
||||
struct r600_block *block,
|
||||
int dirty, int index)
|
||||
{
|
||||
if ((index + 1) > block->nreg_dirty)
|
||||
block->nreg_dirty = index + 1;
|
||||
|
||||
if ((dirty != (block->status & R600_BLOCK_STATUS_DIRTY)) || !(block->status & R600_BLOCK_STATUS_ENABLED)) {
|
||||
block->status |= R600_BLOCK_STATUS_DIRTY;
|
||||
ctx->pm4_dirty_cdwords += block->pm4_ndwords;
|
||||
if (!(block->status & R600_BLOCK_STATUS_ENABLED)) {
|
||||
block->status |= R600_BLOCK_STATUS_ENABLED;
|
||||
LIST_ADDTAIL(&block->enable_list, &ctx->enable_list);
|
||||
}
|
||||
LIST_ADDTAIL(&block->list,&ctx->dirty);
|
||||
|
||||
if (block->flags & REG_FLAG_FLUSH_CHANGE) {
|
||||
r600_context_ps_partial_flush(ctx);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_state *state)
|
||||
{
|
||||
struct r600_block *block;
|
||||
int dirty;
|
||||
for (int i = 0; i < state->nregs; i++) {
|
||||
unsigned id, reloc_id;
|
||||
struct r600_pipe_reg *reg = &state->regs[i];
|
||||
|
||||
block = reg->block;
|
||||
id = reg->id;
|
||||
|
||||
dirty = block->status & R600_BLOCK_STATUS_DIRTY;
|
||||
|
||||
if (reg->value != block->reg[id]) {
|
||||
block->reg[id] = reg->value;
|
||||
dirty |= R600_BLOCK_STATUS_DIRTY;
|
||||
}
|
||||
if (block->flags & REG_FLAG_DIRTY_ALWAYS)
|
||||
dirty |= R600_BLOCK_STATUS_DIRTY;
|
||||
if (block->pm4_bo_index[id]) {
|
||||
/* find relocation */
|
||||
reloc_id = block->pm4_bo_index[id];
|
||||
pipe_resource_reference((struct pipe_resource**)&block->reloc[reloc_id].bo, ®->bo->b.b);
|
||||
block->reloc[reloc_id].bo_usage = reg->bo_usage;
|
||||
/* always force dirty for relocs for now */
|
||||
dirty |= R600_BLOCK_STATUS_DIRTY;
|
||||
}
|
||||
|
||||
if (dirty)
|
||||
r600_context_dirty_block(ctx, block, dirty, id);
|
||||
}
|
||||
}
|
||||
|
||||
struct r600_resource *r600_context_reg_bo(struct r600_context *ctx, unsigned offset)
|
||||
{
|
||||
struct r600_range *range;
|
||||
struct r600_block *block;
|
||||
unsigned id;
|
||||
|
||||
range = &ctx->range[CTX_RANGE_ID(offset)];
|
||||
block = range->blocks[CTX_BLOCK_ID(offset)];
|
||||
offset -= block->start_offset;
|
||||
id = block->pm4_bo_index[offset >> 2];
|
||||
if (block->reloc[id].bo) {
|
||||
return block->reloc[id].bo;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block)
|
||||
{
|
||||
struct radeon_winsys_cs *cs = ctx->cs;
|
||||
int optional = block->nbo == 0 && !(block->flags & REG_FLAG_DIRTY_ALWAYS);
|
||||
int cp_dwords = block->pm4_ndwords, start_dword = 0;
|
||||
int new_dwords = 0;
|
||||
int nbo = block->nbo;
|
||||
|
||||
if (block->nreg_dirty == 0 && optional) {
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (nbo) {
|
||||
ctx->flags |= R600_CONTEXT_CHECK_EVENT_FLUSH;
|
||||
|
||||
for (int j = 0; j < block->nreg; j++) {
|
||||
if (block->pm4_bo_index[j]) {
|
||||
/* find relocation */
|
||||
struct r600_block_reloc *reloc = &block->reloc[block->pm4_bo_index[j]];
|
||||
block->pm4[reloc->bo_pm4_index] =
|
||||
r600_context_bo_reloc(ctx, reloc->bo, reloc->bo_usage);
|
||||
nbo--;
|
||||
if (nbo == 0)
|
||||
break;
|
||||
}
|
||||
}
|
||||
ctx->flags &= ~R600_CONTEXT_CHECK_EVENT_FLUSH;
|
||||
}
|
||||
|
||||
optional &= (block->nreg_dirty != block->nreg);
|
||||
if (optional) {
|
||||
new_dwords = block->nreg_dirty;
|
||||
start_dword = cs->cdw;
|
||||
cp_dwords = new_dwords + 2;
|
||||
}
|
||||
memcpy(&cs->buf[cs->cdw], block->pm4, cp_dwords * 4);
|
||||
cs->cdw += cp_dwords;
|
||||
|
||||
if (optional) {
|
||||
uint32_t newword;
|
||||
|
||||
newword = cs->buf[start_dword];
|
||||
newword &= PKT_COUNT_C;
|
||||
newword |= PKT_COUNT_S(new_dwords);
|
||||
cs->buf[start_dword] = newword;
|
||||
}
|
||||
out:
|
||||
block->status ^= R600_BLOCK_STATUS_DIRTY;
|
||||
block->nreg_dirty = 0;
|
||||
LIST_DELINIT(&block->list);
|
||||
}
|
||||
|
||||
void r600_inval_shader_cache(struct r600_context *ctx)
|
||||
{
|
||||
ctx->atom_surface_sync.flush_flags |= S_0085F0_SH_ICACHE_ACTION_ENA(1);
|
||||
ctx->atom_surface_sync.flush_flags |= S_0085F0_SH_KCACHE_ACTION_ENA(1);
|
||||
r600_atom_dirty(ctx, &ctx->atom_surface_sync.atom);
|
||||
}
|
||||
|
||||
void r600_inval_texture_cache(struct r600_context *ctx)
|
||||
{
|
||||
ctx->atom_surface_sync.flush_flags |= S_0085F0_TC_ACTION_ENA(1);
|
||||
r600_atom_dirty(ctx, &ctx->atom_surface_sync.atom);
|
||||
}
|
||||
|
||||
void r600_inval_vertex_cache(struct r600_context *ctx)
|
||||
{
|
||||
/* Some GPUs don't have the vertex cache and must use the texture cache instead. */
|
||||
ctx->atom_surface_sync.flush_flags |= S_0085F0_TC_ACTION_ENA(1);
|
||||
r600_atom_dirty(ctx, &ctx->atom_surface_sync.atom);
|
||||
}
|
||||
|
||||
void r600_flush_framebuffer(struct r600_context *ctx, bool flush_now)
|
||||
static void r600_flush_framebuffer(struct r600_context *ctx, bool flush_now)
|
||||
{
|
||||
if (!(ctx->flags & R600_CONTEXT_DST_CACHES_DIRTY))
|
||||
return;
|
||||
@@ -555,14 +253,7 @@ void r600_context_flush(struct r600_context *ctx, unsigned flags)
|
||||
/* set all valid group as dirty so they get reemited on
|
||||
* next draw command
|
||||
*/
|
||||
LIST_FOR_EACH_ENTRY(enable_block, &ctx->enable_list, enable_list) {
|
||||
if(!(enable_block->status & R600_BLOCK_STATUS_DIRTY)) {
|
||||
LIST_ADDTAIL(&enable_block->list,&ctx->dirty);
|
||||
enable_block->status |= R600_BLOCK_STATUS_DIRTY;
|
||||
}
|
||||
ctx->pm4_dirty_cdwords += enable_block->pm4_ndwords;
|
||||
enable_block->nreg_dirty = enable_block->nreg;
|
||||
}
|
||||
si_pm4_reset_emitted(ctx);
|
||||
}
|
||||
|
||||
void r600_context_emit_fence(struct r600_context *ctx, struct r600_resource *fence_bo, unsigned offset, unsigned value)
|
||||
|
@@ -35,28 +35,9 @@
|
||||
#define PKT_COUNT_C 0xC000FFFF
|
||||
#define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16)
|
||||
|
||||
/* these flags are used in register flags and added into block flags */
|
||||
#define REG_FLAG_NEED_BO 1
|
||||
#define REG_FLAG_DIRTY_ALWAYS 2
|
||||
#define REG_FLAG_RV6XX_SBU 4
|
||||
#define REG_FLAG_NOT_R600 8
|
||||
#define REG_FLAG_ENABLE_ALWAYS 16
|
||||
#define REG_FLAG_FLUSH_CHANGE 64
|
||||
|
||||
struct r600_reg {
|
||||
unsigned offset;
|
||||
unsigned flags;
|
||||
};
|
||||
|
||||
/*
|
||||
* r600_hw_context.c
|
||||
*/
|
||||
struct r600_resource *r600_context_reg_bo(struct r600_context *ctx, unsigned offset);
|
||||
int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg,
|
||||
unsigned opcode, unsigned offset_base);
|
||||
void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block,
|
||||
int dirty, int index);
|
||||
int r600_setup_block_table(struct r600_context *ctx);
|
||||
void r600_init_cs(struct r600_context *ctx);
|
||||
|
||||
/*
|
||||
|
@@ -33,6 +33,7 @@
|
||||
#include "r600_hw_context_priv.h"
|
||||
#include "radeonsi_pipe.h"
|
||||
#include "sid.h"
|
||||
#include "si_state.h"
|
||||
|
||||
static void r600_emit_surface_sync(struct r600_context *rctx, struct r600_atom *atom)
|
||||
{
|
||||
@@ -82,799 +83,3 @@ unsigned r600_get_cb_flush_flags(struct r600_context *rctx)
|
||||
|
||||
return flags;
|
||||
}
|
||||
|
||||
void r600_texture_barrier(struct pipe_context *ctx)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
|
||||
rctx->atom_surface_sync.flush_flags |= S_0085F0_TC_ACTION_ENA(1) | r600_get_cb_flush_flags(rctx);
|
||||
r600_atom_dirty(rctx, &rctx->atom_surface_sync.atom);
|
||||
}
|
||||
|
||||
static bool r600_conv_pipe_prim(unsigned pprim, unsigned *prim)
|
||||
{
|
||||
static const int prim_conv[] = {
|
||||
V_008958_DI_PT_POINTLIST,
|
||||
V_008958_DI_PT_LINELIST,
|
||||
V_008958_DI_PT_LINELOOP,
|
||||
V_008958_DI_PT_LINESTRIP,
|
||||
V_008958_DI_PT_TRILIST,
|
||||
V_008958_DI_PT_TRISTRIP,
|
||||
V_008958_DI_PT_TRIFAN,
|
||||
V_008958_DI_PT_QUADLIST,
|
||||
V_008958_DI_PT_QUADSTRIP,
|
||||
V_008958_DI_PT_POLYGON,
|
||||
-1,
|
||||
-1,
|
||||
-1,
|
||||
-1
|
||||
};
|
||||
|
||||
*prim = prim_conv[pprim];
|
||||
if (*prim == -1) {
|
||||
fprintf(stderr, "%s:%d unsupported %d\n", __func__, __LINE__, pprim);
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
/* common state between evergreen and r600 */
|
||||
void r600_bind_blend_state(struct pipe_context *ctx, void *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_pipe_blend *blend = (struct r600_pipe_blend *)state;
|
||||
struct r600_pipe_state *rstate;
|
||||
|
||||
if (state == NULL)
|
||||
return;
|
||||
rstate = &blend->rstate;
|
||||
rctx->states[rstate->id] = rstate;
|
||||
rctx->cb_target_mask = blend->cb_target_mask;
|
||||
rctx->cb_color_control = blend->cb_color_control;
|
||||
|
||||
r600_context_pipe_state_set(rctx, rstate);
|
||||
}
|
||||
|
||||
static void r600_set_stencil_ref(struct pipe_context *ctx,
|
||||
const struct r600_stencil_ref *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
|
||||
|
||||
if (rstate == NULL)
|
||||
return;
|
||||
|
||||
rstate->id = R600_PIPE_STATE_STENCIL_REF;
|
||||
r600_pipe_state_add_reg(rstate,
|
||||
R_028430_DB_STENCILREFMASK,
|
||||
S_028430_STENCILTESTVAL(state->ref_value[0]) |
|
||||
S_028430_STENCILMASK(state->valuemask[0]) |
|
||||
S_028430_STENCILWRITEMASK(state->writemask[0]),
|
||||
NULL, 0);
|
||||
r600_pipe_state_add_reg(rstate,
|
||||
R_028434_DB_STENCILREFMASK_BF,
|
||||
S_028434_STENCILTESTVAL_BF(state->ref_value[1]) |
|
||||
S_028434_STENCILMASK_BF(state->valuemask[1]) |
|
||||
S_028434_STENCILWRITEMASK_BF(state->writemask[1]),
|
||||
NULL, 0);
|
||||
|
||||
free(rctx->states[R600_PIPE_STATE_STENCIL_REF]);
|
||||
rctx->states[R600_PIPE_STATE_STENCIL_REF] = rstate;
|
||||
r600_context_pipe_state_set(rctx, rstate);
|
||||
}
|
||||
|
||||
void r600_set_pipe_stencil_ref(struct pipe_context *ctx,
|
||||
const struct pipe_stencil_ref *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_pipe_dsa *dsa = (struct r600_pipe_dsa*)rctx->states[R600_PIPE_STATE_DSA];
|
||||
struct r600_stencil_ref ref;
|
||||
|
||||
rctx->stencil_ref = *state;
|
||||
|
||||
if (!dsa)
|
||||
return;
|
||||
|
||||
ref.ref_value[0] = state->ref_value[0];
|
||||
ref.ref_value[1] = state->ref_value[1];
|
||||
ref.valuemask[0] = dsa->valuemask[0];
|
||||
ref.valuemask[1] = dsa->valuemask[1];
|
||||
ref.writemask[0] = dsa->writemask[0];
|
||||
ref.writemask[1] = dsa->writemask[1];
|
||||
|
||||
r600_set_stencil_ref(ctx, &ref);
|
||||
}
|
||||
|
||||
void r600_bind_dsa_state(struct pipe_context *ctx, void *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_pipe_dsa *dsa = state;
|
||||
struct r600_pipe_state *rstate;
|
||||
struct r600_stencil_ref ref;
|
||||
|
||||
if (state == NULL)
|
||||
return;
|
||||
rstate = &dsa->rstate;
|
||||
rctx->states[rstate->id] = rstate;
|
||||
rctx->alpha_ref = dsa->alpha_ref;
|
||||
rctx->alpha_ref_dirty = true;
|
||||
r600_context_pipe_state_set(rctx, rstate);
|
||||
|
||||
ref.ref_value[0] = rctx->stencil_ref.ref_value[0];
|
||||
ref.ref_value[1] = rctx->stencil_ref.ref_value[1];
|
||||
ref.valuemask[0] = dsa->valuemask[0];
|
||||
ref.valuemask[1] = dsa->valuemask[1];
|
||||
ref.writemask[0] = dsa->writemask[0];
|
||||
ref.writemask[1] = dsa->writemask[1];
|
||||
|
||||
r600_set_stencil_ref(ctx, &ref);
|
||||
}
|
||||
|
||||
void r600_bind_rs_state(struct pipe_context *ctx, void *state)
|
||||
{
|
||||
struct r600_pipe_rasterizer *rs = (struct r600_pipe_rasterizer *)state;
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
|
||||
if (state == NULL)
|
||||
return;
|
||||
|
||||
rctx->sprite_coord_enable = rs->sprite_coord_enable;
|
||||
rctx->pa_sc_line_stipple = rs->pa_sc_line_stipple;
|
||||
rctx->pa_su_sc_mode_cntl = rs->pa_su_sc_mode_cntl;
|
||||
rctx->pa_cl_clip_cntl = rs->pa_cl_clip_cntl;
|
||||
rctx->pa_cl_vs_out_cntl = rs->pa_cl_vs_out_cntl;
|
||||
|
||||
rctx->rasterizer = rs;
|
||||
|
||||
rctx->states[rs->rstate.id] = &rs->rstate;
|
||||
r600_context_pipe_state_set(rctx, &rs->rstate);
|
||||
|
||||
if (rctx->chip_class >= CAYMAN) {
|
||||
cayman_polygon_offset_update(rctx);
|
||||
}
|
||||
}
|
||||
|
||||
void r600_delete_rs_state(struct pipe_context *ctx, void *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_pipe_rasterizer *rs = (struct r600_pipe_rasterizer *)state;
|
||||
|
||||
if (rctx->rasterizer == rs) {
|
||||
rctx->rasterizer = NULL;
|
||||
}
|
||||
if (rctx->states[rs->rstate.id] == &rs->rstate) {
|
||||
rctx->states[rs->rstate.id] = NULL;
|
||||
}
|
||||
free(rs);
|
||||
}
|
||||
|
||||
void r600_sampler_view_destroy(struct pipe_context *ctx,
|
||||
struct pipe_sampler_view *state)
|
||||
{
|
||||
struct r600_pipe_sampler_view *resource = (struct r600_pipe_sampler_view *)state;
|
||||
|
||||
pipe_resource_reference(&state->texture, NULL);
|
||||
FREE(resource);
|
||||
}
|
||||
|
||||
void r600_delete_state(struct pipe_context *ctx, void *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_pipe_state *rstate = (struct r600_pipe_state *)state;
|
||||
|
||||
if (rctx->states[rstate->id] == rstate) {
|
||||
rctx->states[rstate->id] = NULL;
|
||||
}
|
||||
for (int i = 0; i < rstate->nregs; i++) {
|
||||
pipe_resource_reference((struct pipe_resource**)&rstate->regs[i].bo, NULL);
|
||||
}
|
||||
free(rstate);
|
||||
}
|
||||
|
||||
void r600_bind_vertex_elements(struct pipe_context *ctx, void *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_vertex_element *v = (struct r600_vertex_element*)state;
|
||||
|
||||
rctx->vertex_elements = v;
|
||||
if (v) {
|
||||
r600_inval_shader_cache(rctx);
|
||||
}
|
||||
}
|
||||
|
||||
void r600_delete_vertex_element(struct pipe_context *ctx, void *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_vertex_element *v = (struct r600_vertex_element*)state;
|
||||
|
||||
if (rctx->vertex_elements == state)
|
||||
rctx->vertex_elements = NULL;
|
||||
FREE(state);
|
||||
}
|
||||
|
||||
|
||||
void r600_set_index_buffer(struct pipe_context *ctx,
|
||||
const struct pipe_index_buffer *ib)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
|
||||
if (ib) {
|
||||
pipe_resource_reference(&rctx->index_buffer.buffer, ib->buffer);
|
||||
memcpy(&rctx->index_buffer, ib, sizeof(*ib));
|
||||
} else {
|
||||
pipe_resource_reference(&rctx->index_buffer.buffer, NULL);
|
||||
}
|
||||
}
|
||||
|
||||
void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
|
||||
const struct pipe_vertex_buffer *buffers)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
|
||||
util_copy_vertex_buffers(rctx->vertex_buffer, &rctx->nr_vertex_buffers, buffers, count);
|
||||
}
|
||||
|
||||
void *si_create_vertex_elements(struct pipe_context *ctx,
|
||||
unsigned count,
|
||||
const struct pipe_vertex_element *elements)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_vertex_element *v = CALLOC_STRUCT(r600_vertex_element);
|
||||
|
||||
assert(count < 32);
|
||||
if (!v)
|
||||
return NULL;
|
||||
|
||||
v->count = count;
|
||||
memcpy(v->elements, elements, sizeof(struct pipe_vertex_element) * count);
|
||||
|
||||
return v;
|
||||
}
|
||||
|
||||
void *si_create_shader_state(struct pipe_context *ctx,
|
||||
const struct pipe_shader_state *state)
|
||||
{
|
||||
struct si_pipe_shader *shader = CALLOC_STRUCT(si_pipe_shader);
|
||||
|
||||
shader->tokens = tgsi_dup_tokens(state->tokens);
|
||||
shader->so = state->stream_output;
|
||||
|
||||
return shader;
|
||||
}
|
||||
|
||||
void r600_bind_ps_shader(struct pipe_context *ctx, void *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
|
||||
if (rctx->ps_shader != state)
|
||||
rctx->shader_dirty = true;
|
||||
|
||||
/* TODO delete old shader */
|
||||
rctx->ps_shader = (struct si_pipe_shader *)state;
|
||||
if (state) {
|
||||
r600_inval_shader_cache(rctx);
|
||||
r600_context_pipe_state_set(rctx, &rctx->ps_shader->rstate);
|
||||
}
|
||||
}
|
||||
|
||||
void r600_bind_vs_shader(struct pipe_context *ctx, void *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
|
||||
if (rctx->vs_shader != state)
|
||||
rctx->shader_dirty = true;
|
||||
|
||||
/* TODO delete old shader */
|
||||
rctx->vs_shader = (struct si_pipe_shader *)state;
|
||||
if (state) {
|
||||
r600_inval_shader_cache(rctx);
|
||||
r600_context_pipe_state_set(rctx, &rctx->vs_shader->rstate);
|
||||
}
|
||||
}
|
||||
|
||||
void r600_delete_ps_shader(struct pipe_context *ctx, void *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct si_pipe_shader *shader = (struct si_pipe_shader *)state;
|
||||
|
||||
if (rctx->ps_shader == shader) {
|
||||
rctx->ps_shader = NULL;
|
||||
}
|
||||
|
||||
free(shader->tokens);
|
||||
si_pipe_shader_destroy(ctx, shader);
|
||||
free(shader);
|
||||
}
|
||||
|
||||
void r600_delete_vs_shader(struct pipe_context *ctx, void *state)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct si_pipe_shader *shader = (struct si_pipe_shader *)state;
|
||||
|
||||
if (rctx->vs_shader == shader) {
|
||||
rctx->vs_shader = NULL;
|
||||
}
|
||||
|
||||
free(shader->tokens);
|
||||
si_pipe_shader_destroy(ctx, shader);
|
||||
free(shader);
|
||||
}
|
||||
|
||||
static void r600_update_alpha_ref(struct r600_context *rctx)
|
||||
{
|
||||
#if 0
|
||||
unsigned alpha_ref;
|
||||
struct r600_pipe_state rstate;
|
||||
|
||||
alpha_ref = rctx->alpha_ref;
|
||||
rstate.nregs = 0;
|
||||
if (rctx->export_16bpc)
|
||||
alpha_ref &= ~0x1FFF;
|
||||
r600_pipe_state_add_reg(&rstate, R_028438_SX_ALPHA_REF, alpha_ref, NULL, 0);
|
||||
|
||||
r600_context_pipe_state_set(rctx, &rstate);
|
||||
rctx->alpha_ref_dirty = false;
|
||||
#endif
|
||||
}
|
||||
|
||||
void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
|
||||
struct pipe_constant_buffer *cb)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_resource *rbuffer = cb ? r600_resource(cb->buffer) : NULL;
|
||||
struct r600_pipe_state *rstate;
|
||||
uint64_t va_offset;
|
||||
uint32_t offset;
|
||||
|
||||
/* Note that the state tracker can unbind constant buffers by
|
||||
* passing NULL here.
|
||||
*/
|
||||
if (cb == NULL) {
|
||||
return;
|
||||
}
|
||||
|
||||
r600_inval_shader_cache(rctx);
|
||||
|
||||
if (cb->user_buffer)
|
||||
r600_upload_const_buffer(rctx, &rbuffer, cb->user_buffer, cb->buffer_size, &offset);
|
||||
else
|
||||
offset = 0;
|
||||
va_offset = r600_resource_va(ctx->screen, (void*)rbuffer);
|
||||
va_offset += offset;
|
||||
//va_offset >>= 8;
|
||||
|
||||
switch (shader) {
|
||||
case PIPE_SHADER_VERTEX:
|
||||
rstate = &rctx->vs_const_buffer;
|
||||
rstate->nregs = 0;
|
||||
r600_pipe_state_add_reg(rstate,
|
||||
R_00B130_SPI_SHADER_USER_DATA_VS_0,
|
||||
va_offset, rbuffer, RADEON_USAGE_READ);
|
||||
r600_pipe_state_add_reg(rstate,
|
||||
R_00B134_SPI_SHADER_USER_DATA_VS_1,
|
||||
va_offset >> 32, NULL, 0);
|
||||
break;
|
||||
case PIPE_SHADER_FRAGMENT:
|
||||
rstate = &rctx->ps_const_buffer;
|
||||
rstate->nregs = 0;
|
||||
r600_pipe_state_add_reg(rstate,
|
||||
R_00B030_SPI_SHADER_USER_DATA_PS_0,
|
||||
va_offset, rbuffer, RADEON_USAGE_READ);
|
||||
r600_pipe_state_add_reg(rstate,
|
||||
R_00B034_SPI_SHADER_USER_DATA_PS_1,
|
||||
va_offset >> 32, NULL, 0);
|
||||
break;
|
||||
default:
|
||||
R600_ERR("unsupported %d\n", shader);
|
||||
return;
|
||||
}
|
||||
|
||||
r600_context_pipe_state_set(rctx, rstate);
|
||||
|
||||
if (cb->buffer != &rbuffer->b.b)
|
||||
pipe_resource_reference((struct pipe_resource**)&rbuffer, NULL);
|
||||
}
|
||||
|
||||
struct pipe_stream_output_target *
|
||||
r600_create_so_target(struct pipe_context *ctx,
|
||||
struct pipe_resource *buffer,
|
||||
unsigned buffer_offset,
|
||||
unsigned buffer_size)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_so_target *t;
|
||||
void *ptr;
|
||||
|
||||
t = CALLOC_STRUCT(r600_so_target);
|
||||
if (!t) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
t->b.reference.count = 1;
|
||||
t->b.context = ctx;
|
||||
pipe_resource_reference(&t->b.buffer, buffer);
|
||||
t->b.buffer_offset = buffer_offset;
|
||||
t->b.buffer_size = buffer_size;
|
||||
|
||||
t->filled_size = (struct r600_resource*)
|
||||
pipe_buffer_create(ctx->screen, PIPE_BIND_CUSTOM, PIPE_USAGE_STATIC, 4);
|
||||
ptr = rctx->ws->buffer_map(t->filled_size->cs_buf, rctx->cs, PIPE_TRANSFER_WRITE);
|
||||
memset(ptr, 0, t->filled_size->buf->size);
|
||||
rctx->ws->buffer_unmap(t->filled_size->cs_buf);
|
||||
|
||||
return &t->b;
|
||||
}
|
||||
|
||||
void r600_so_target_destroy(struct pipe_context *ctx,
|
||||
struct pipe_stream_output_target *target)
|
||||
{
|
||||
struct r600_so_target *t = (struct r600_so_target*)target;
|
||||
pipe_resource_reference(&t->b.buffer, NULL);
|
||||
pipe_resource_reference((struct pipe_resource**)&t->filled_size, NULL);
|
||||
FREE(t);
|
||||
}
|
||||
|
||||
void r600_set_so_targets(struct pipe_context *ctx,
|
||||
unsigned num_targets,
|
||||
struct pipe_stream_output_target **targets,
|
||||
unsigned append_bitmask)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
unsigned i;
|
||||
|
||||
/* Stop streamout. */
|
||||
if (rctx->num_so_targets) {
|
||||
r600_context_streamout_end(rctx);
|
||||
}
|
||||
|
||||
/* Set the new targets. */
|
||||
for (i = 0; i < num_targets; i++) {
|
||||
pipe_so_target_reference((struct pipe_stream_output_target**)&rctx->so_targets[i], targets[i]);
|
||||
}
|
||||
for (; i < rctx->num_so_targets; i++) {
|
||||
pipe_so_target_reference((struct pipe_stream_output_target**)&rctx->so_targets[i], NULL);
|
||||
}
|
||||
|
||||
rctx->num_so_targets = num_targets;
|
||||
rctx->streamout_start = num_targets != 0;
|
||||
rctx->streamout_append_bitmask = append_bitmask;
|
||||
}
|
||||
|
||||
static void r600_vertex_buffer_update(struct r600_context *rctx)
|
||||
{
|
||||
struct pipe_context *ctx = &rctx->context;
|
||||
struct r600_pipe_state *rstate = &rctx->vs_user_data;
|
||||
struct r600_resource *rbuffer, *t_list_buffer;
|
||||
struct pipe_vertex_buffer *vertex_buffer;
|
||||
unsigned i, count, offset;
|
||||
uint32_t *ptr;
|
||||
uint64_t va;
|
||||
|
||||
r600_inval_vertex_cache(rctx);
|
||||
|
||||
/* bind vertex buffer once */
|
||||
count = rctx->nr_vertex_buffers;
|
||||
assert(count <= 256 / 4);
|
||||
|
||||
t_list_buffer = (struct r600_resource*)
|
||||
pipe_buffer_create(ctx->screen, PIPE_BIND_CUSTOM,
|
||||
PIPE_USAGE_IMMUTABLE, 4 * 4 * count);
|
||||
if (t_list_buffer == NULL)
|
||||
return;
|
||||
|
||||
ptr = (uint32_t*)rctx->ws->buffer_map(t_list_buffer->cs_buf,
|
||||
rctx->cs,
|
||||
PIPE_TRANSFER_WRITE);
|
||||
|
||||
for (i = 0 ; i < count; i++, ptr += 4) {
|
||||
struct pipe_vertex_element *velem = &rctx->vertex_elements->elements[i];
|
||||
const struct util_format_description *desc;
|
||||
unsigned data_format, num_format;
|
||||
int first_non_void;
|
||||
|
||||
/* bind vertex buffer once */
|
||||
vertex_buffer = &rctx->vertex_buffer[i];
|
||||
rbuffer = (struct r600_resource*)vertex_buffer->buffer;
|
||||
offset = 0;
|
||||
if (vertex_buffer == NULL || rbuffer == NULL)
|
||||
continue;
|
||||
offset += vertex_buffer->buffer_offset;
|
||||
|
||||
va = r600_resource_va(ctx->screen, (void*)rbuffer);
|
||||
va += offset;
|
||||
|
||||
desc = util_format_description(velem->src_format);
|
||||
first_non_void = util_format_get_first_non_void_channel(velem->src_format);
|
||||
data_format = si_translate_vertexformat(ctx->screen,
|
||||
velem->src_format,
|
||||
desc, first_non_void);
|
||||
|
||||
switch (desc->channel[first_non_void].type) {
|
||||
case UTIL_FORMAT_TYPE_FIXED:
|
||||
num_format = V_008F0C_BUF_NUM_FORMAT_USCALED; /* XXX */
|
||||
break;
|
||||
case UTIL_FORMAT_TYPE_SIGNED:
|
||||
num_format = V_008F0C_BUF_NUM_FORMAT_SNORM;
|
||||
break;
|
||||
case UTIL_FORMAT_TYPE_UNSIGNED:
|
||||
num_format = V_008F0C_BUF_NUM_FORMAT_UNORM;
|
||||
break;
|
||||
case UTIL_FORMAT_TYPE_FLOAT:
|
||||
default:
|
||||
num_format = V_008F14_IMG_NUM_FORMAT_FLOAT;
|
||||
}
|
||||
|
||||
/* Fill in T# buffer resource description */
|
||||
ptr[0] = va & 0xFFFFFFFF;
|
||||
ptr[1] = (S_008F04_BASE_ADDRESS_HI(va >> 32) |
|
||||
S_008F04_STRIDE(vertex_buffer->stride));
|
||||
if (vertex_buffer->stride > 0)
|
||||
ptr[2] = ((vertex_buffer->buffer->width0 - offset) /
|
||||
vertex_buffer->stride);
|
||||
else
|
||||
ptr[2] = vertex_buffer->buffer->width0 - offset;
|
||||
ptr[3] = (S_008F0C_DST_SEL_X(si_map_swizzle(desc->swizzle[0])) |
|
||||
S_008F0C_DST_SEL_Y(si_map_swizzle(desc->swizzle[1])) |
|
||||
S_008F0C_DST_SEL_Z(si_map_swizzle(desc->swizzle[2])) |
|
||||
S_008F0C_DST_SEL_W(si_map_swizzle(desc->swizzle[3])) |
|
||||
S_008F0C_NUM_FORMAT(num_format) |
|
||||
S_008F0C_DATA_FORMAT(data_format));
|
||||
|
||||
r600_context_bo_reloc(rctx, rbuffer, RADEON_USAGE_READ);
|
||||
}
|
||||
|
||||
rstate->nregs = 0;
|
||||
|
||||
va = r600_resource_va(ctx->screen, (void*)t_list_buffer);
|
||||
r600_pipe_state_add_reg(rstate,
|
||||
R_00B148_SPI_SHADER_USER_DATA_VS_6,
|
||||
va, t_list_buffer, RADEON_USAGE_READ);
|
||||
r600_pipe_state_add_reg(rstate,
|
||||
R_00B14C_SPI_SHADER_USER_DATA_VS_7,
|
||||
va >> 32,
|
||||
NULL, 0);
|
||||
|
||||
r600_context_pipe_state_set(rctx, rstate);
|
||||
}
|
||||
|
||||
static void si_update_derived_state(struct r600_context *rctx)
|
||||
{
|
||||
struct pipe_context * ctx = (struct pipe_context*)rctx;
|
||||
|
||||
if (!rctx->blitter->running) {
|
||||
if (rctx->have_depth_fb || rctx->have_depth_texture)
|
||||
r600_flush_depth_textures(rctx);
|
||||
}
|
||||
|
||||
if ((rctx->ps_shader->shader.fs_write_all &&
|
||||
(rctx->ps_shader->shader.nr_cbufs != rctx->nr_cbufs)) ||
|
||||
(rctx->sprite_coord_enable &&
|
||||
(rctx->ps_shader->sprite_coord_enable != rctx->sprite_coord_enable))) {
|
||||
si_pipe_shader_destroy(&rctx->context, rctx->ps_shader);
|
||||
}
|
||||
|
||||
if (rctx->alpha_ref_dirty) {
|
||||
r600_update_alpha_ref(rctx);
|
||||
}
|
||||
|
||||
if (!rctx->vs_shader->bo) {
|
||||
si_pipe_shader_vs(ctx, rctx->vs_shader);
|
||||
|
||||
r600_context_pipe_state_set(rctx, &rctx->vs_shader->rstate);
|
||||
}
|
||||
|
||||
if (!rctx->ps_shader->bo) {
|
||||
si_pipe_shader_ps(ctx, rctx->ps_shader);
|
||||
|
||||
r600_context_pipe_state_set(rctx, &rctx->ps_shader->rstate);
|
||||
}
|
||||
|
||||
if (rctx->shader_dirty) {
|
||||
si_update_spi_map(rctx);
|
||||
rctx->shader_dirty = false;
|
||||
}
|
||||
}
|
||||
|
||||
void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct r600_pipe_dsa *dsa = (struct r600_pipe_dsa*)rctx->states[R600_PIPE_STATE_DSA];
|
||||
struct pipe_draw_info info = *dinfo;
|
||||
struct r600_draw rdraw = {};
|
||||
struct pipe_index_buffer ib = {};
|
||||
unsigned prim, mask, ls_mask = 0;
|
||||
struct r600_block *dirty_block = NULL, *next_block = NULL;
|
||||
struct r600_atom *state = NULL, *next_state = NULL;
|
||||
int i;
|
||||
|
||||
if ((!info.count && (info.indexed || !info.count_from_stream_output)) ||
|
||||
(info.indexed && !rctx->index_buffer.buffer) ||
|
||||
!r600_conv_pipe_prim(info.mode, &prim)) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (!rctx->ps_shader || !rctx->vs_shader)
|
||||
return;
|
||||
|
||||
si_update_derived_state(rctx);
|
||||
|
||||
r600_vertex_buffer_update(rctx);
|
||||
|
||||
rdraw.vgt_num_indices = info.count;
|
||||
rdraw.vgt_num_instances = info.instance_count;
|
||||
|
||||
if (info.indexed) {
|
||||
/* Initialize the index buffer struct. */
|
||||
pipe_resource_reference(&ib.buffer, rctx->index_buffer.buffer);
|
||||
ib.index_size = rctx->index_buffer.index_size;
|
||||
ib.offset = rctx->index_buffer.offset + info.start * ib.index_size;
|
||||
|
||||
/* Translate or upload, if needed. */
|
||||
r600_translate_index_buffer(rctx, &ib, info.count);
|
||||
|
||||
if (ib.user_buffer) {
|
||||
r600_upload_index_buffer(rctx, &ib, info.count);
|
||||
}
|
||||
|
||||
/* Initialize the r600_draw struct with index buffer info. */
|
||||
if (ib.index_size == 4) {
|
||||
rdraw.vgt_index_type = V_028A7C_VGT_INDEX_32 |
|
||||
(R600_BIG_ENDIAN ? V_028A7C_VGT_DMA_SWAP_32_BIT : 0);
|
||||
} else {
|
||||
rdraw.vgt_index_type = V_028A7C_VGT_INDEX_16 |
|
||||
(R600_BIG_ENDIAN ? V_028A7C_VGT_DMA_SWAP_16_BIT : 0);
|
||||
}
|
||||
rdraw.indices = (struct r600_resource*)ib.buffer;
|
||||
rdraw.indices_bo_offset = ib.offset;
|
||||
rdraw.vgt_draw_initiator = V_0287F0_DI_SRC_SEL_DMA;
|
||||
} else {
|
||||
info.index_bias = info.start;
|
||||
rdraw.vgt_draw_initiator = V_0287F0_DI_SRC_SEL_AUTO_INDEX;
|
||||
if (info.count_from_stream_output) {
|
||||
rdraw.vgt_draw_initiator |= S_0287F0_USE_OPAQUE(1);
|
||||
|
||||
r600_context_draw_opaque_count(rctx, (struct r600_so_target*)info.count_from_stream_output);
|
||||
}
|
||||
}
|
||||
|
||||
rctx->vs_shader_so_strides = rctx->vs_shader->so_strides;
|
||||
|
||||
mask = (1ULL << ((unsigned)rctx->framebuffer.nr_cbufs * 4)) - 1;
|
||||
|
||||
if (rctx->vgt.id != R600_PIPE_STATE_VGT) {
|
||||
rctx->vgt.id = R600_PIPE_STATE_VGT;
|
||||
rctx->vgt.nregs = 0;
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_008958_VGT_PRIMITIVE_TYPE, prim, NULL, 0);
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, NULL, 0);
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_028400_VGT_MAX_VTX_INDX, ~0, NULL, 0);
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_028404_VGT_MIN_VTX_INDX, 0, NULL, 0);
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_028408_VGT_INDX_OFFSET, info.index_bias, NULL, 0);
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, info.restart_index, NULL, 0);
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, info.primitive_restart, NULL, 0);
|
||||
#if 0
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, NULL, 0);
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_03CFF4_SQ_VTX_START_INST_LOC, info.start_instance, NULL, 0);
|
||||
#endif
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_028A0C_PA_SC_LINE_STIPPLE, 0, NULL, 0);
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_028814_PA_SU_SC_MODE_CNTL, 0, NULL, 0);
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_02881C_PA_CL_VS_OUT_CNTL, 0, NULL, 0);
|
||||
r600_pipe_state_add_reg(&rctx->vgt, R_028810_PA_CL_CLIP_CNTL, 0x0, NULL, 0);
|
||||
}
|
||||
|
||||
rctx->vgt.nregs = 0;
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, prim);
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, rctx->cb_target_mask & mask);
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, ~0);
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, 0);
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, info.index_bias);
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, info.restart_index);
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, info.primitive_restart);
|
||||
#if 0
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, 0);
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, info.start_instance);
|
||||
#endif
|
||||
|
||||
if (prim == V_008958_DI_PT_LINELIST)
|
||||
ls_mask = 1;
|
||||
else if (prim == V_008958_DI_PT_LINESTRIP)
|
||||
ls_mask = 2;
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, S_028A0C_AUTO_RESET_CNTL(ls_mask) | rctx->pa_sc_line_stipple);
|
||||
|
||||
if (info.mode == PIPE_PRIM_QUADS || info.mode == PIPE_PRIM_QUAD_STRIP || info.mode == PIPE_PRIM_POLYGON) {
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, S_028814_PROVOKING_VTX_LAST(1) | rctx->pa_su_sc_mode_cntl);
|
||||
} else {
|
||||
r600_pipe_state_mod_reg(&rctx->vgt, rctx->pa_su_sc_mode_cntl);
|
||||
}
|
||||
r600_pipe_state_mod_reg(&rctx->vgt,
|
||||
prim == PIPE_PRIM_POINTS ? rctx->pa_cl_vs_out_cntl : 0
|
||||
/*| (rctx->rasterizer->clip_plane_enable &
|
||||
rctx->vs_shader->shader.clip_dist_write)*/);
|
||||
r600_pipe_state_mod_reg(&rctx->vgt,
|
||||
rctx->pa_cl_clip_cntl /*|
|
||||
(rctx->vs_shader->shader.clip_dist_write ||
|
||||
rctx->vs_shader->shader.vs_prohibit_ucps ?
|
||||
0 : rctx->rasterizer->clip_plane_enable & 0x3F)*/);
|
||||
|
||||
r600_context_pipe_state_set(rctx, &rctx->vgt);
|
||||
|
||||
rdraw.db_render_override = dsa->db_render_override;
|
||||
rdraw.db_render_control = dsa->db_render_control;
|
||||
|
||||
/* Emit states. */
|
||||
r600_need_cs_space(rctx, 0, TRUE);
|
||||
|
||||
LIST_FOR_EACH_ENTRY_SAFE(state, next_state, &rctx->dirty_states, head) {
|
||||
r600_emit_atom(rctx, state);
|
||||
}
|
||||
LIST_FOR_EACH_ENTRY_SAFE(dirty_block, next_block, &rctx->dirty,list) {
|
||||
r600_context_block_emit_dirty(rctx, dirty_block);
|
||||
}
|
||||
rctx->pm4_dirty_cdwords = 0;
|
||||
|
||||
/* Enable stream out if needed. */
|
||||
if (rctx->streamout_start) {
|
||||
r600_context_streamout_begin(rctx);
|
||||
rctx->streamout_start = FALSE;
|
||||
}
|
||||
|
||||
for (i = 0; i < NUM_TEX_UNITS; i++) {
|
||||
if (rctx->ps_samplers.views[i])
|
||||
r600_context_bo_reloc(rctx,
|
||||
(struct r600_resource*)rctx->ps_samplers.views[i]->base.texture,
|
||||
RADEON_USAGE_READ);
|
||||
}
|
||||
|
||||
si_context_draw(rctx, &rdraw);
|
||||
|
||||
rctx->flags |= R600_CONTEXT_DST_CACHES_DIRTY | R600_CONTEXT_DRAW_PENDING;
|
||||
|
||||
if (rctx->framebuffer.zsbuf)
|
||||
{
|
||||
struct pipe_resource *tex = rctx->framebuffer.zsbuf->texture;
|
||||
((struct r600_resource_texture *)tex)->dirty_db = TRUE;
|
||||
}
|
||||
|
||||
pipe_resource_reference(&ib.buffer, NULL);
|
||||
}
|
||||
|
||||
void _r600_pipe_state_add_reg(struct r600_context *ctx,
|
||||
struct r600_pipe_state *state,
|
||||
uint32_t offset, uint32_t value,
|
||||
uint32_t range_id, uint32_t block_id,
|
||||
struct r600_resource *bo,
|
||||
enum radeon_bo_usage usage)
|
||||
{
|
||||
struct r600_range *range;
|
||||
struct r600_block *block;
|
||||
|
||||
if (bo) assert(usage);
|
||||
|
||||
range = &ctx->range[range_id];
|
||||
block = range->blocks[block_id];
|
||||
state->regs[state->nregs].block = block;
|
||||
state->regs[state->nregs].id = (offset - block->start_offset) >> 2;
|
||||
|
||||
state->regs[state->nregs].value = value;
|
||||
state->regs[state->nregs].bo = bo;
|
||||
state->regs[state->nregs].bo_usage = usage;
|
||||
|
||||
state->nregs++;
|
||||
assert(state->nregs < R600_BLOCK_MAX_REG);
|
||||
}
|
||||
|
||||
void r600_pipe_state_add_reg_noblock(struct r600_pipe_state *state,
|
||||
uint32_t offset, uint32_t value,
|
||||
struct r600_resource *bo,
|
||||
enum radeon_bo_usage usage)
|
||||
{
|
||||
if (bo) assert(usage);
|
||||
|
||||
state->regs[state->nregs].id = offset;
|
||||
state->regs[state->nregs].block = NULL;
|
||||
state->regs[state->nregs].value = value;
|
||||
state->regs[state->nregs].bo = bo;
|
||||
state->regs[state->nregs].bo_usage = usage;
|
||||
|
||||
state->nregs++;
|
||||
assert(state->nregs < R600_BLOCK_MAX_REG);
|
||||
}
|
||||
|
@@ -47,6 +47,7 @@
|
||||
#include "r600_resource.h"
|
||||
#include "radeonsi_pipe.h"
|
||||
#include "r600_hw_context_priv.h"
|
||||
#include "si_state.h"
|
||||
|
||||
/*
|
||||
* pipe_context
|
||||
@@ -174,14 +175,8 @@ static void r600_destroy_context(struct pipe_context *context)
|
||||
rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
|
||||
util_unreference_framebuffer_state(&rctx->framebuffer);
|
||||
|
||||
r600_context_fini(rctx);
|
||||
|
||||
util_blitter_destroy(rctx->blitter);
|
||||
|
||||
for (int i = 0; i < R600_PIPE_NSTATES; i++) {
|
||||
free(rctx->states[i]);
|
||||
}
|
||||
|
||||
if (rctx->uploader) {
|
||||
u_upload_destroy(rctx->uploader);
|
||||
}
|
||||
@@ -212,7 +207,6 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
|
||||
r600_init_query_functions(rctx);
|
||||
r600_init_context_resource_functions(rctx);
|
||||
r600_init_surface_functions(rctx);
|
||||
rctx->context.draw_vbo = r600_draw_vbo;
|
||||
|
||||
rctx->context.create_video_decoder = vl_create_decoder;
|
||||
rctx->context.create_video_buffer = vl_video_buffer_create;
|
||||
@@ -221,13 +215,12 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
|
||||
|
||||
switch (rctx->chip_class) {
|
||||
case TAHITI:
|
||||
cayman_init_state_functions(rctx);
|
||||
si_init_state_functions(rctx);
|
||||
if (si_context_init(rctx)) {
|
||||
r600_destroy_context(&rctx->context);
|
||||
return NULL;
|
||||
}
|
||||
si_init_config(rctx);
|
||||
rctx->custom_dsa_flush = cayman_create_db_flush_dsa(rctx);
|
||||
break;
|
||||
default:
|
||||
R600_ERR("Unsupported chip class %d.\n", rctx->chip_class);
|
||||
|
@@ -36,6 +36,8 @@
|
||||
#include "util/u_slab.h"
|
||||
#include "r600.h"
|
||||
#include "radeonsi_public.h"
|
||||
#include "radeonsi_pm4.h"
|
||||
#include "si_state.h"
|
||||
#include "r600_resource.h"
|
||||
#include "sid.h"
|
||||
|
||||
@@ -72,28 +74,6 @@ struct r600_atom_surface_sync {
|
||||
unsigned flush_flags; /* CP_COHER_CNTL */
|
||||
};
|
||||
|
||||
enum r600_pipe_state_id {
|
||||
R600_PIPE_STATE_BLEND = 0,
|
||||
R600_PIPE_STATE_BLEND_COLOR,
|
||||
R600_PIPE_STATE_CONFIG,
|
||||
R600_PIPE_STATE_SEAMLESS_CUBEMAP,
|
||||
R600_PIPE_STATE_CLIP,
|
||||
R600_PIPE_STATE_SCISSOR,
|
||||
R600_PIPE_STATE_VIEWPORT,
|
||||
R600_PIPE_STATE_RASTERIZER,
|
||||
R600_PIPE_STATE_VGT,
|
||||
R600_PIPE_STATE_FRAMEBUFFER,
|
||||
R600_PIPE_STATE_DSA,
|
||||
R600_PIPE_STATE_STENCIL_REF,
|
||||
R600_PIPE_STATE_PS_SHADER,
|
||||
R600_PIPE_STATE_VS_SHADER,
|
||||
R600_PIPE_STATE_CONSTANT,
|
||||
R600_PIPE_STATE_SAMPLER,
|
||||
R600_PIPE_STATE_RESOURCE,
|
||||
R600_PIPE_STATE_POLYGON_OFFSET,
|
||||
R600_PIPE_NSTATES
|
||||
};
|
||||
|
||||
struct r600_pipe_fences {
|
||||
struct r600_resource *bo;
|
||||
unsigned *data;
|
||||
@@ -125,79 +105,10 @@ struct si_pipe_sampler_state {
|
||||
uint32_t val[4];
|
||||
};
|
||||
|
||||
struct r600_pipe_rasterizer {
|
||||
struct r600_pipe_state rstate;
|
||||
boolean flatshade;
|
||||
unsigned sprite_coord_enable;
|
||||
unsigned pa_sc_line_stipple;
|
||||
unsigned pa_su_sc_mode_cntl;
|
||||
unsigned pa_cl_clip_cntl;
|
||||
unsigned pa_cl_vs_out_cntl;
|
||||
float offset_units;
|
||||
float offset_scale;
|
||||
};
|
||||
|
||||
struct r600_pipe_blend {
|
||||
struct r600_pipe_state rstate;
|
||||
unsigned cb_target_mask;
|
||||
unsigned cb_color_control;
|
||||
};
|
||||
|
||||
struct r600_pipe_dsa {
|
||||
struct r600_pipe_state rstate;
|
||||
unsigned alpha_ref;
|
||||
unsigned db_render_override;
|
||||
unsigned db_render_control;
|
||||
ubyte valuemask[2];
|
||||
ubyte writemask[2];
|
||||
};
|
||||
|
||||
struct r600_vertex_element
|
||||
{
|
||||
unsigned count;
|
||||
struct pipe_vertex_element elements[PIPE_MAX_ATTRIBS];
|
||||
};
|
||||
|
||||
struct r600_shader_io {
|
||||
unsigned name;
|
||||
unsigned gpr;
|
||||
unsigned done;
|
||||
int sid;
|
||||
unsigned param_offset;
|
||||
unsigned interpolate;
|
||||
boolean centroid;
|
||||
};
|
||||
|
||||
struct r600_shader {
|
||||
unsigned ninput;
|
||||
unsigned noutput;
|
||||
struct r600_shader_io input[32];
|
||||
struct r600_shader_io output[32];
|
||||
boolean uses_kill;
|
||||
boolean fs_write_all;
|
||||
unsigned nr_cbufs;
|
||||
};
|
||||
|
||||
struct si_pipe_shader {
|
||||
struct r600_shader shader;
|
||||
struct r600_pipe_state rstate;
|
||||
struct r600_resource *bo;
|
||||
struct r600_vertex_element vertex_elements;
|
||||
struct tgsi_token *tokens;
|
||||
unsigned num_sgprs;
|
||||
unsigned num_vgprs;
|
||||
unsigned spi_ps_input_ena;
|
||||
unsigned sprite_coord_enable;
|
||||
struct pipe_stream_output_info so;
|
||||
unsigned so_strides[4];
|
||||
};
|
||||
|
||||
/* needed for blitter save */
|
||||
#define NUM_TEX_UNITS 16
|
||||
|
||||
struct r600_textures_info {
|
||||
struct r600_pipe_state views_state;
|
||||
struct r600_pipe_state samplers_state;
|
||||
struct si_pipe_sampler_view *views[NUM_TEX_UNITS];
|
||||
struct si_pipe_sampler_state *samplers[NUM_TEX_UNITS];
|
||||
unsigned n_views;
|
||||
@@ -223,13 +134,6 @@ struct r600_fence_block {
|
||||
#define R600_CONSTANT_ARRAY_SIZE 256
|
||||
#define R600_RESOURCE_ARRAY_SIZE 160
|
||||
|
||||
struct r600_stencil_ref
|
||||
{
|
||||
ubyte ref_value[2];
|
||||
ubyte valuemask[2];
|
||||
ubyte writemask[2];
|
||||
};
|
||||
|
||||
struct r600_context {
|
||||
struct pipe_context context;
|
||||
struct blitter_context *blitter;
|
||||
@@ -238,28 +142,16 @@ struct r600_context {
|
||||
void *custom_dsa_flush;
|
||||
struct r600_screen *screen;
|
||||
struct radeon_winsys *ws;
|
||||
struct r600_pipe_state *states[R600_PIPE_NSTATES];
|
||||
struct r600_vertex_element *vertex_elements;
|
||||
struct si_vertex_element *vertex_elements;
|
||||
struct pipe_framebuffer_state framebuffer;
|
||||
unsigned cb_target_mask;
|
||||
unsigned cb_color_control;
|
||||
unsigned pa_sc_line_stipple;
|
||||
unsigned pa_su_sc_mode_cntl;
|
||||
unsigned pa_cl_clip_cntl;
|
||||
unsigned pa_cl_vs_out_cntl;
|
||||
/* for saving when using blitter */
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
struct pipe_viewport_state viewport;
|
||||
struct pipe_clip_state clip;
|
||||
struct r600_pipe_state config;
|
||||
struct si_pipe_shader *ps_shader;
|
||||
struct si_pipe_shader *vs_shader;
|
||||
struct r600_pipe_state vs_const_buffer;
|
||||
struct r600_pipe_state vs_user_data;
|
||||
struct r600_pipe_state ps_const_buffer;
|
||||
struct r600_pipe_rasterizer *rasterizer;
|
||||
struct r600_pipe_state vgt;
|
||||
struct r600_pipe_state spi;
|
||||
struct si_pipe_shader *ps_shader;
|
||||
struct si_pipe_shader *vs_shader;
|
||||
struct pipe_query *current_render_cond;
|
||||
unsigned current_render_cond_mode;
|
||||
struct pipe_query *saved_render_cond;
|
||||
@@ -269,7 +161,6 @@ struct r600_context {
|
||||
boolean export_16bpc;
|
||||
unsigned alpha_ref;
|
||||
boolean alpha_ref_dirty;
|
||||
unsigned nr_cbufs;
|
||||
struct r600_textures_info vs_samplers;
|
||||
struct r600_textures_info ps_samplers;
|
||||
boolean shader_dirty;
|
||||
@@ -289,13 +180,7 @@ struct r600_context {
|
||||
*/
|
||||
struct radeon_winsys_cs *cs;
|
||||
|
||||
struct r600_range *range;
|
||||
unsigned nblocks;
|
||||
struct r600_block **blocks;
|
||||
struct list_head dirty;
|
||||
struct list_head enable_list;
|
||||
unsigned pm4_dirty_cdwords;
|
||||
unsigned ctx_pm4_ndwords;
|
||||
unsigned init_dwords;
|
||||
|
||||
/* The list of active queries. Only one query of each type can be active. */
|
||||
@@ -320,6 +205,10 @@ struct r600_context {
|
||||
struct pipe_index_buffer index_buffer;
|
||||
struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
|
||||
unsigned nr_vertex_buffers;
|
||||
|
||||
/* SI state handling */
|
||||
union si_state queued;
|
||||
union si_state emitted;
|
||||
};
|
||||
|
||||
static INLINE void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom)
|
||||
@@ -342,24 +231,6 @@ static INLINE void r600_atom_dirty(struct r600_context *rctx, struct r600_atom *
|
||||
}
|
||||
}
|
||||
|
||||
/* evergreen_state.c */
|
||||
void cayman_init_state_functions(struct r600_context *rctx);
|
||||
void si_init_config(struct r600_context *rctx);
|
||||
void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *shader);
|
||||
void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *shader);
|
||||
void si_update_spi_map(struct r600_context *rctx);
|
||||
void *cayman_create_db_flush_dsa(struct r600_context *rctx);
|
||||
void cayman_polygon_offset_update(struct r600_context *rctx);
|
||||
uint32_t si_translate_vertexformat(struct pipe_screen *screen,
|
||||
enum pipe_format format,
|
||||
const struct util_format_description *desc,
|
||||
int first_non_void);
|
||||
boolean si_is_format_supported(struct pipe_screen *screen,
|
||||
enum pipe_format format,
|
||||
enum pipe_texture_target target,
|
||||
unsigned sample_count,
|
||||
unsigned usage);
|
||||
|
||||
/* r600_blit.c */
|
||||
void r600_init_blit_functions(struct r600_context *rctx);
|
||||
void r600_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
|
||||
@@ -405,45 +276,6 @@ void r600_translate_index_buffer(struct r600_context *r600,
|
||||
/* r600_state_common.c */
|
||||
void r600_init_common_atoms(struct r600_context *rctx);
|
||||
unsigned r600_get_cb_flush_flags(struct r600_context *rctx);
|
||||
void r600_texture_barrier(struct pipe_context *ctx);
|
||||
void r600_set_index_buffer(struct pipe_context *ctx,
|
||||
const struct pipe_index_buffer *ib);
|
||||
void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
|
||||
const struct pipe_vertex_buffer *buffers);
|
||||
void *si_create_vertex_elements(struct pipe_context *ctx,
|
||||
unsigned count,
|
||||
const struct pipe_vertex_element *elements);
|
||||
void r600_delete_vertex_element(struct pipe_context *ctx, void *state);
|
||||
void r600_bind_blend_state(struct pipe_context *ctx, void *state);
|
||||
void r600_bind_dsa_state(struct pipe_context *ctx, void *state);
|
||||
void r600_bind_rs_state(struct pipe_context *ctx, void *state);
|
||||
void r600_delete_rs_state(struct pipe_context *ctx, void *state);
|
||||
void r600_sampler_view_destroy(struct pipe_context *ctx,
|
||||
struct pipe_sampler_view *state);
|
||||
void r600_delete_state(struct pipe_context *ctx, void *state);
|
||||
void r600_bind_vertex_elements(struct pipe_context *ctx, void *state);
|
||||
void *si_create_shader_state(struct pipe_context *ctx,
|
||||
const struct pipe_shader_state *state);
|
||||
void r600_bind_ps_shader(struct pipe_context *ctx, void *state);
|
||||
void r600_bind_vs_shader(struct pipe_context *ctx, void *state);
|
||||
void r600_delete_ps_shader(struct pipe_context *ctx, void *state);
|
||||
void r600_delete_vs_shader(struct pipe_context *ctx, void *state);
|
||||
void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
|
||||
struct pipe_constant_buffer *cb);
|
||||
struct pipe_stream_output_target *
|
||||
r600_create_so_target(struct pipe_context *ctx,
|
||||
struct pipe_resource *buffer,
|
||||
unsigned buffer_offset,
|
||||
unsigned buffer_size);
|
||||
void r600_so_target_destroy(struct pipe_context *ctx,
|
||||
struct pipe_stream_output_target *target);
|
||||
void r600_set_so_targets(struct pipe_context *ctx,
|
||||
unsigned num_targets,
|
||||
struct pipe_stream_output_target **targets,
|
||||
unsigned append_bitmask);
|
||||
void r600_set_pipe_stencil_ref(struct pipe_context *ctx,
|
||||
const struct pipe_stencil_ref *state);
|
||||
void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info);
|
||||
|
||||
/*
|
||||
* common helpers
|
||||
|
175
src/gallium/drivers/radeonsi/radeonsi_pm4.c
Normal file
175
src/gallium/drivers/radeonsi/radeonsi_pm4.c
Normal file
@@ -0,0 +1,175 @@
|
||||
/*
|
||||
* Copyright 2012 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* on the rights to use, copy, modify, merge, publish, distribute, sub
|
||||
* license, and/or sell copies of the Software, and to permit persons to whom
|
||||
* the Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Christian König <christian.koenig@amd.com>
|
||||
*/
|
||||
|
||||
#include "util/u_memory.h"
|
||||
#include "radeonsi_pipe.h"
|
||||
#include "radeonsi_pm4.h"
|
||||
#include "sid.h"
|
||||
#include "r600_hw_context_priv.h"
|
||||
|
||||
#define NUMBER_OF_STATES (sizeof(union si_state) / sizeof(struct si_pm4_state *))
|
||||
|
||||
void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val)
|
||||
{
|
||||
unsigned opcode, count;
|
||||
|
||||
if (reg >= SI_CONFIG_REG_OFFSET && reg <= SI_CONFIG_REG_END) {
|
||||
opcode = PKT3_SET_CONFIG_REG;
|
||||
reg -= SI_CONFIG_REG_OFFSET;
|
||||
|
||||
} else if (reg >= SI_SH_REG_OFFSET && reg <= SI_SH_REG_END) {
|
||||
opcode = PKT3_SET_SH_REG;
|
||||
reg -= SI_SH_REG_OFFSET;
|
||||
|
||||
} else if (reg >= SI_CONTEXT_REG_OFFSET && reg <= SI_CONTEXT_REG_END) {
|
||||
opcode = PKT3_SET_CONTEXT_REG;
|
||||
reg -= SI_CONTEXT_REG_OFFSET;
|
||||
} else {
|
||||
R600_ERR("Invalid register offset %08x!\n", reg);
|
||||
return;
|
||||
}
|
||||
|
||||
reg >>= 2;
|
||||
|
||||
if (opcode != state->last_opcode || reg != (state->last_reg + 1)) {
|
||||
state->last_opcode = opcode;
|
||||
state->last_pm4 = state->ndw++;
|
||||
state->pm4[state->ndw++] = reg;
|
||||
}
|
||||
|
||||
state->last_reg = reg;
|
||||
count = state->ndw - state->last_pm4 - 1;
|
||||
state->pm4[state->last_pm4] = PKT3(opcode, count, 0);
|
||||
state->pm4[state->ndw++] = val;
|
||||
|
||||
assert(state->ndw <= SI_PM4_MAX_DW);
|
||||
}
|
||||
|
||||
void si_pm4_add_bo(struct si_pm4_state *state,
|
||||
struct r600_resource *bo,
|
||||
enum radeon_bo_usage usage)
|
||||
{
|
||||
unsigned idx = state->nbo++;
|
||||
assert(idx < SI_PM4_MAX_BO);
|
||||
|
||||
pipe_resource_reference((struct pipe_resource**)&state->bo[idx],
|
||||
(struct pipe_resource*)bo);
|
||||
state->bo_usage[idx] = usage;
|
||||
}
|
||||
|
||||
void si_pm4_inval_shader_cache(struct si_pm4_state *state)
|
||||
{
|
||||
state->cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1);
|
||||
state->cp_coher_cntl |= S_0085F0_SH_KCACHE_ACTION_ENA(1);
|
||||
}
|
||||
|
||||
void si_pm4_inval_texture_cache(struct si_pm4_state *state)
|
||||
{
|
||||
state->cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1);
|
||||
}
|
||||
|
||||
void si_pm4_inval_vertex_cache(struct si_pm4_state *state)
|
||||
{
|
||||
/* Some GPUs don't have the vertex cache and must use the texture cache instead. */
|
||||
state->cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1);
|
||||
}
|
||||
|
||||
void si_pm4_inval_fb_cache(struct si_pm4_state *state, unsigned nr_cbufs)
|
||||
{
|
||||
state->cp_coher_cntl |= S_0085F0_CB_ACTION_ENA(1);
|
||||
state->cp_coher_cntl |= ((1 << nr_cbufs) - 1) << S_0085F0_CB0_DEST_BASE_ENA_SHIFT;
|
||||
}
|
||||
|
||||
void si_pm4_inval_zsbuf_cache(struct si_pm4_state *state)
|
||||
{
|
||||
state->cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) | S_0085F0_DB_DEST_BASE_ENA(1);
|
||||
}
|
||||
|
||||
void si_pm4_free_state(struct r600_context *rctx,
|
||||
struct si_pm4_state *state,
|
||||
unsigned idx)
|
||||
{
|
||||
if (state == NULL)
|
||||
return;
|
||||
|
||||
if (rctx->emitted.array[idx] == state) {
|
||||
rctx->emitted.array[idx] = NULL;
|
||||
}
|
||||
|
||||
for (int i = 0; i < state->nbo; ++i) {
|
||||
pipe_resource_reference((struct pipe_resource**)&state->bo[idx],
|
||||
NULL);
|
||||
}
|
||||
FREE(state);
|
||||
}
|
||||
|
||||
unsigned si_pm4_dirty_dw(struct r600_context *rctx)
|
||||
{
|
||||
unsigned count = 0;
|
||||
uint32_t cp_coher_cntl = 0;
|
||||
|
||||
for (int i = 0; i < NUMBER_OF_STATES; ++i) {
|
||||
struct si_pm4_state *state = rctx->queued.array[i];
|
||||
|
||||
if (!state || rctx->emitted.array[i] == state)
|
||||
continue;
|
||||
|
||||
count += state->ndw;
|
||||
cp_coher_cntl |= state->cp_coher_cntl;
|
||||
}
|
||||
|
||||
//TODO
|
||||
rctx->atom_surface_sync.flush_flags |= cp_coher_cntl;
|
||||
r600_atom_dirty(rctx, &rctx->atom_surface_sync.atom);
|
||||
return count;
|
||||
}
|
||||
|
||||
void si_pm4_emit_dirty(struct r600_context *rctx)
|
||||
{
|
||||
struct radeon_winsys_cs *cs = rctx->cs;
|
||||
|
||||
for (int i = 0; i < NUMBER_OF_STATES; ++i) {
|
||||
struct si_pm4_state *state = rctx->queued.array[i];
|
||||
|
||||
if (!state || rctx->emitted.array[i] == state)
|
||||
continue;
|
||||
|
||||
for (int j = 0; j < state->nbo; ++j) {
|
||||
r600_context_bo_reloc(rctx, state->bo[j],
|
||||
state->bo_usage[j]);
|
||||
}
|
||||
|
||||
memcpy(&cs->buf[cs->cdw], state->pm4, state->ndw * 4);
|
||||
cs->cdw += state->ndw;
|
||||
|
||||
rctx->emitted.array[i] = state;
|
||||
}
|
||||
}
|
||||
|
||||
void si_pm4_reset_emitted(struct r600_context *rctx)
|
||||
{
|
||||
memset(&rctx->emitted, 0, sizeof(rctx->emitted));
|
||||
}
|
76
src/gallium/drivers/radeonsi/radeonsi_pm4.h
Normal file
76
src/gallium/drivers/radeonsi/radeonsi_pm4.h
Normal file
@@ -0,0 +1,76 @@
|
||||
/*
|
||||
* Copyright 2012 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* on the rights to use, copy, modify, merge, publish, distribute, sub
|
||||
* license, and/or sell copies of the Software, and to permit persons to whom
|
||||
* the Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Christian König <christian.koenig@amd.com>
|
||||
*/
|
||||
|
||||
#ifndef RADEONSI_PM4_H
|
||||
#define RADEONSI_PM4_H
|
||||
|
||||
#include "../../winsys/radeon/drm/radeon_winsys.h"
|
||||
|
||||
#define SI_PM4_MAX_DW 128
|
||||
#define SI_PM4_MAX_BO 32
|
||||
|
||||
// forward defines
|
||||
struct r600_context;
|
||||
|
||||
struct si_pm4_state
|
||||
{
|
||||
/* PKT3_SET_*_REG handling */
|
||||
unsigned last_opcode;
|
||||
unsigned last_reg;
|
||||
unsigned last_pm4;
|
||||
|
||||
/* flush flags for SURFACE_SYNC */
|
||||
uint32_t cp_coher_cntl;
|
||||
|
||||
/* commands for the DE */
|
||||
unsigned ndw;
|
||||
uint32_t pm4[SI_PM4_MAX_DW];
|
||||
|
||||
/* BO's referenced by this state */
|
||||
unsigned nbo;
|
||||
struct r600_resource *bo[SI_PM4_MAX_BO];
|
||||
enum radeon_bo_usage bo_usage[SI_PM4_MAX_BO];
|
||||
};
|
||||
|
||||
void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val);
|
||||
void si_pm4_add_bo(struct si_pm4_state *state,
|
||||
struct r600_resource *bo,
|
||||
enum radeon_bo_usage usage);
|
||||
|
||||
void si_pm4_inval_shader_cache(struct si_pm4_state *state);
|
||||
void si_pm4_inval_texture_cache(struct si_pm4_state *state);
|
||||
void si_pm4_inval_vertex_cache(struct si_pm4_state *state);
|
||||
void si_pm4_inval_fb_cache(struct si_pm4_state *state, unsigned nr_cbufs);
|
||||
void si_pm4_inval_zsbuf_cache(struct si_pm4_state *state);
|
||||
|
||||
void si_pm4_free_state(struct r600_context *rctx,
|
||||
struct si_pm4_state *state,
|
||||
unsigned idx);
|
||||
unsigned si_pm4_dirty_dw(struct r600_context *rctx);
|
||||
void si_pm4_emit_dirty(struct r600_context *rctx);
|
||||
void si_pm4_reset_emitted(struct r600_context *rctx);
|
||||
|
||||
#endif
|
@@ -12,6 +12,7 @@
|
||||
|
||||
#include "radeonsi_pipe.h"
|
||||
#include "radeonsi_shader.h"
|
||||
#include "si_state.h"
|
||||
#include "sid.h"
|
||||
|
||||
#include <assert.h>
|
||||
@@ -251,7 +252,7 @@ static void declare_input_fs(
|
||||
switch (decl->Interp.Interpolate) {
|
||||
case TGSI_INTERPOLATE_COLOR:
|
||||
/* XXX: Flat shading hangs the GPU */
|
||||
if (si_shader_ctx->rctx->rasterizer->flatshade) {
|
||||
if (si_shader_ctx->rctx->queued.named.rasterizer->flatshade) {
|
||||
#if 0
|
||||
intr_name = "llvm.SI.fs.interp.constant";
|
||||
#else
|
||||
@@ -346,7 +347,7 @@ static LLVMValueRef fetch_constant(
|
||||
static void si_llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
|
||||
{
|
||||
struct si_shader_context * si_shader_ctx = si_shader_context(bld_base);
|
||||
struct r600_shader * shader = &si_shader_ctx->shader->shader;
|
||||
struct si_shader * shader = &si_shader_ctx->shader->shader;
|
||||
struct lp_build_context * base = &bld_base->base;
|
||||
struct lp_build_context * uint =
|
||||
&si_shader_ctx->radeon_bld.soa.bld_base.uint_bld;
|
||||
@@ -572,7 +573,7 @@ int si_pipe_shader_create(
|
||||
si_shader_ctx.type = si_shader_ctx.parse.FullHeader.Processor.Processor;
|
||||
si_shader_ctx.rctx = rctx;
|
||||
|
||||
shader->shader.nr_cbufs = rctx->nr_cbufs;
|
||||
shader->shader.nr_cbufs = rctx->framebuffer.nr_cbufs;
|
||||
|
||||
/* Dump TGSI code before doing TGSI->LLVM conversion in case the
|
||||
* conversion fails. */
|
||||
@@ -633,5 +634,5 @@ void si_pipe_shader_destroy(struct pipe_context *ctx, struct si_pipe_shader *sha
|
||||
{
|
||||
pipe_resource_reference((struct pipe_resource**)&shader->bo, NULL);
|
||||
|
||||
memset(&shader->shader,0,sizeof(struct r600_shader));
|
||||
memset(&shader->shader,0,sizeof(struct si_shader));
|
||||
}
|
||||
|
File diff suppressed because it is too large
Load Diff
175
src/gallium/drivers/radeonsi/si_state.h
Normal file
175
src/gallium/drivers/radeonsi/si_state.h
Normal file
@@ -0,0 +1,175 @@
|
||||
/*
|
||||
* Copyright 2012 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* on the rights to use, copy, modify, merge, publish, distribute, sub
|
||||
* license, and/or sell copies of the Software, and to permit persons to whom
|
||||
* the Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Christian König <christian.koenig@amd.com>
|
||||
*/
|
||||
|
||||
#ifndef SI_STATE_H
|
||||
#define SI_STATE_H
|
||||
|
||||
#include "radeonsi_pm4.h"
|
||||
|
||||
struct si_state_blend {
|
||||
struct si_pm4_state pm4;
|
||||
uint32_t cb_target_mask;
|
||||
uint32_t cb_color_control;
|
||||
};
|
||||
|
||||
struct si_state_viewport {
|
||||
struct si_pm4_state pm4;
|
||||
struct pipe_viewport_state viewport;
|
||||
};
|
||||
|
||||
struct si_state_rasterizer {
|
||||
struct si_pm4_state pm4;
|
||||
bool flatshade;
|
||||
unsigned sprite_coord_enable;
|
||||
unsigned pa_sc_line_stipple;
|
||||
unsigned pa_su_sc_mode_cntl;
|
||||
unsigned pa_cl_clip_cntl;
|
||||
unsigned pa_cl_vs_out_cntl;
|
||||
float offset_units;
|
||||
float offset_scale;
|
||||
};
|
||||
|
||||
struct si_state_dsa {
|
||||
struct si_pm4_state pm4;
|
||||
unsigned alpha_ref;
|
||||
unsigned db_render_override;
|
||||
unsigned db_render_control;
|
||||
uint8_t valuemask[2];
|
||||
uint8_t writemask[2];
|
||||
};
|
||||
|
||||
struct si_vertex_element
|
||||
{
|
||||
unsigned count;
|
||||
struct pipe_vertex_element elements[PIPE_MAX_ATTRIBS];
|
||||
};
|
||||
|
||||
struct si_shader_io {
|
||||
unsigned name;
|
||||
unsigned gpr;
|
||||
unsigned done;
|
||||
int sid;
|
||||
unsigned param_offset;
|
||||
unsigned interpolate;
|
||||
bool centroid;
|
||||
};
|
||||
|
||||
struct si_shader {
|
||||
unsigned ninput;
|
||||
unsigned noutput;
|
||||
struct si_shader_io input[32];
|
||||
struct si_shader_io output[32];
|
||||
bool uses_kill;
|
||||
bool fs_write_all;
|
||||
unsigned nr_cbufs;
|
||||
};
|
||||
|
||||
struct si_pipe_shader {
|
||||
struct si_shader shader;
|
||||
struct si_pm4_state *pm4;
|
||||
struct r600_resource *bo;
|
||||
struct si_vertex_element vertex_elements;
|
||||
struct tgsi_token *tokens;
|
||||
unsigned num_sgprs;
|
||||
unsigned num_vgprs;
|
||||
unsigned spi_ps_input_ena;
|
||||
unsigned sprite_coord_enable;
|
||||
struct pipe_stream_output_info so;
|
||||
unsigned so_strides[4];
|
||||
};
|
||||
|
||||
union si_state {
|
||||
struct {
|
||||
struct si_pm4_state *init;
|
||||
struct si_state_blend *blend;
|
||||
struct si_pm4_state *blend_color;
|
||||
struct si_pm4_state *clip;
|
||||
struct si_pm4_state *scissor;
|
||||
struct si_state_viewport *viewport;
|
||||
struct si_pm4_state *framebuffer;
|
||||
struct si_state_rasterizer *rasterizer;
|
||||
struct si_state_dsa *dsa;
|
||||
struct si_pm4_state *fb_rs;
|
||||
struct si_pm4_state *fb_blend;
|
||||
struct si_pm4_state *dsa_stencil_ref;
|
||||
struct si_pm4_state *vs;
|
||||
struct si_pm4_state *vs_const;
|
||||
struct si_pm4_state *ps;
|
||||
struct si_pm4_state *ps_sampler_views;
|
||||
struct si_pm4_state *ps_sampler;
|
||||
struct si_pm4_state *ps_const;
|
||||
struct si_pm4_state *spi;
|
||||
struct si_pm4_state *vertex_buffers;
|
||||
struct si_pm4_state *texture_barrier;
|
||||
struct si_pm4_state *draw_info;
|
||||
} named;
|
||||
struct si_pm4_state *array[0];
|
||||
};
|
||||
|
||||
#define si_pm4_block_idx(member) \
|
||||
(offsetof(union si_state, named.member) / sizeof(struct si_pm4_state *))
|
||||
|
||||
#define si_pm4_bind_state(rctx, member, value) \
|
||||
do { \
|
||||
(rctx)->queued.named.member = (value); \
|
||||
} while(0);
|
||||
|
||||
#define si_pm4_delete_state(rctx, member, value) \
|
||||
do { \
|
||||
if ((rctx)->queued.named.member == (value)) { \
|
||||
(rctx)->queued.named.member = NULL; \
|
||||
} \
|
||||
si_pm4_free_state(rctx, (struct si_pm4_state *)(value), \
|
||||
si_pm4_block_idx(member)); \
|
||||
} while(0);
|
||||
|
||||
#define si_pm4_set_state(rctx, member, value) \
|
||||
do { \
|
||||
if ((rctx)->queued.named.member != (value)) { \
|
||||
si_pm4_free_state(rctx, \
|
||||
(struct si_pm4_state *)(rctx)->queued.named.member, \
|
||||
si_pm4_block_idx(member)); \
|
||||
(rctx)->queued.named.member = (value); \
|
||||
} \
|
||||
} while(0);
|
||||
|
||||
/* si_state.c */
|
||||
uint32_t si_translate_vertexformat(struct pipe_screen *screen,
|
||||
enum pipe_format format,
|
||||
const struct util_format_description *desc,
|
||||
int first_non_void);
|
||||
bool si_is_format_supported(struct pipe_screen *screen,
|
||||
enum pipe_format format,
|
||||
enum pipe_texture_target target,
|
||||
unsigned sample_count,
|
||||
unsigned usage);
|
||||
void si_init_state_functions(struct r600_context *rctx);
|
||||
void si_init_config(struct r600_context *rctx);
|
||||
|
||||
/* si_state_draw.c */
|
||||
void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo);
|
||||
|
||||
#endif
|
568
src/gallium/drivers/radeonsi/si_state_draw.c
Normal file
568
src/gallium/drivers/radeonsi/si_state_draw.c
Normal file
@@ -0,0 +1,568 @@
|
||||
/*
|
||||
* Copyright 2012 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* on the rights to use, copy, modify, merge, publish, distribute, sub
|
||||
* license, and/or sell copies of the Software, and to permit persons to whom
|
||||
* the Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Christian König <christian.koenig@amd.com>
|
||||
*/
|
||||
|
||||
#include "util/u_memory.h"
|
||||
#include "util/u_framebuffer.h"
|
||||
#include "util/u_blitter.h"
|
||||
#include "tgsi/tgsi_parse.h"
|
||||
#include "radeonsi_pipe.h"
|
||||
#include "si_state.h"
|
||||
#include "sid.h"
|
||||
|
||||
/*
|
||||
* Shaders
|
||||
*/
|
||||
|
||||
static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *shader)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct si_pm4_state *pm4;
|
||||
unsigned num_sgprs, num_user_sgprs;
|
||||
unsigned nparams, i;
|
||||
uint64_t va;
|
||||
|
||||
if (si_pipe_shader_create(ctx, shader))
|
||||
return;
|
||||
|
||||
si_pm4_delete_state(rctx, vs, shader->pm4);
|
||||
pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state);
|
||||
|
||||
si_pm4_inval_shader_cache(pm4);
|
||||
|
||||
/* Certain attributes (position, psize, etc.) don't count as params.
|
||||
* VS is required to export at least one param and r600_shader_from_tgsi()
|
||||
* takes care of adding a dummy export.
|
||||
*/
|
||||
for (nparams = 0, i = 0 ; i < shader->shader.noutput; i++) {
|
||||
if (shader->shader.output[i].name != TGSI_SEMANTIC_POSITION)
|
||||
nparams++;
|
||||
}
|
||||
if (nparams < 1)
|
||||
nparams = 1;
|
||||
|
||||
si_pm4_set_reg(pm4, R_0286C4_SPI_VS_OUT_CONFIG,
|
||||
S_0286C4_VS_EXPORT_COUNT(nparams - 1));
|
||||
|
||||
si_pm4_set_reg(pm4, R_02870C_SPI_SHADER_POS_FORMAT,
|
||||
S_02870C_POS0_EXPORT_FORMAT(V_02870C_SPI_SHADER_4COMP) |
|
||||
S_02870C_POS1_EXPORT_FORMAT(V_02870C_SPI_SHADER_NONE) |
|
||||
S_02870C_POS2_EXPORT_FORMAT(V_02870C_SPI_SHADER_NONE) |
|
||||
S_02870C_POS3_EXPORT_FORMAT(V_02870C_SPI_SHADER_NONE));
|
||||
|
||||
va = r600_resource_va(ctx->screen, (void *)shader->bo);
|
||||
si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ);
|
||||
si_pm4_set_reg(pm4, R_00B120_SPI_SHADER_PGM_LO_VS, va >> 8);
|
||||
si_pm4_set_reg(pm4, R_00B124_SPI_SHADER_PGM_HI_VS, va >> 40);
|
||||
|
||||
num_user_sgprs = 8;
|
||||
num_sgprs = shader->num_sgprs;
|
||||
if (num_user_sgprs > num_sgprs)
|
||||
num_sgprs = num_user_sgprs;
|
||||
/* Last 2 reserved SGPRs are used for VCC */
|
||||
num_sgprs += 2;
|
||||
assert(num_sgprs <= 104);
|
||||
|
||||
si_pm4_set_reg(pm4, R_00B128_SPI_SHADER_PGM_RSRC1_VS,
|
||||
S_00B128_VGPRS((shader->num_vgprs - 1) / 4) |
|
||||
S_00B128_SGPRS((num_sgprs - 1) / 8));
|
||||
si_pm4_set_reg(pm4, R_00B12C_SPI_SHADER_PGM_RSRC2_VS,
|
||||
S_00B12C_USER_SGPR(num_user_sgprs));
|
||||
|
||||
si_pm4_bind_state(rctx, vs, shader->pm4);
|
||||
}
|
||||
|
||||
static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *shader)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct si_pm4_state *pm4;
|
||||
unsigned i, exports_ps, num_cout, spi_ps_in_control, db_shader_control;
|
||||
unsigned num_sgprs, num_user_sgprs;
|
||||
int ninterp = 0;
|
||||
boolean have_linear = FALSE, have_centroid = FALSE, have_perspective = FALSE;
|
||||
unsigned spi_baryc_cntl;
|
||||
uint64_t va;
|
||||
|
||||
if (si_pipe_shader_create(ctx, shader))
|
||||
return;
|
||||
|
||||
si_pm4_delete_state(rctx, ps, shader->pm4);
|
||||
pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state);
|
||||
|
||||
si_pm4_inval_shader_cache(pm4);
|
||||
|
||||
db_shader_control = S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z);
|
||||
for (i = 0; i < shader->shader.ninput; i++) {
|
||||
ninterp++;
|
||||
/* XXX: Flat shading hangs the GPU */
|
||||
if (shader->shader.input[i].interpolate == TGSI_INTERPOLATE_CONSTANT ||
|
||||
(shader->shader.input[i].interpolate == TGSI_INTERPOLATE_COLOR &&
|
||||
rctx->queued.named.rasterizer->flatshade))
|
||||
have_linear = TRUE;
|
||||
if (shader->shader.input[i].interpolate == TGSI_INTERPOLATE_LINEAR)
|
||||
have_linear = TRUE;
|
||||
if (shader->shader.input[i].interpolate == TGSI_INTERPOLATE_PERSPECTIVE)
|
||||
have_perspective = TRUE;
|
||||
if (shader->shader.input[i].centroid)
|
||||
have_centroid = TRUE;
|
||||
}
|
||||
|
||||
for (i = 0; i < shader->shader.noutput; i++) {
|
||||
if (shader->shader.output[i].name == TGSI_SEMANTIC_POSITION)
|
||||
db_shader_control |= S_02880C_Z_EXPORT_ENABLE(1);
|
||||
if (shader->shader.output[i].name == TGSI_SEMANTIC_STENCIL)
|
||||
db_shader_control |= 0; // XXX OP_VAL or TEST_VAL?
|
||||
}
|
||||
if (shader->shader.uses_kill)
|
||||
db_shader_control |= S_02880C_KILL_ENABLE(1);
|
||||
|
||||
exports_ps = 0;
|
||||
num_cout = 0;
|
||||
for (i = 0; i < shader->shader.noutput; i++) {
|
||||
if (shader->shader.output[i].name == TGSI_SEMANTIC_POSITION ||
|
||||
shader->shader.output[i].name == TGSI_SEMANTIC_STENCIL)
|
||||
exports_ps |= 1;
|
||||
else if (shader->shader.output[i].name == TGSI_SEMANTIC_COLOR) {
|
||||
if (shader->shader.fs_write_all)
|
||||
num_cout = shader->shader.nr_cbufs;
|
||||
else
|
||||
num_cout++;
|
||||
}
|
||||
}
|
||||
if (!exports_ps) {
|
||||
/* always at least export 1 component per pixel */
|
||||
exports_ps = 2;
|
||||
}
|
||||
|
||||
spi_ps_in_control = S_0286D8_NUM_INTERP(ninterp);
|
||||
|
||||
spi_baryc_cntl = 0;
|
||||
if (have_perspective)
|
||||
spi_baryc_cntl |= have_centroid ?
|
||||
S_0286E0_PERSP_CENTROID_CNTL(1) : S_0286E0_PERSP_CENTER_CNTL(1);
|
||||
if (have_linear)
|
||||
spi_baryc_cntl |= have_centroid ?
|
||||
S_0286E0_LINEAR_CENTROID_CNTL(1) : S_0286E0_LINEAR_CENTER_CNTL(1);
|
||||
|
||||
si_pm4_set_reg(pm4, R_0286E0_SPI_BARYC_CNTL, spi_baryc_cntl);
|
||||
si_pm4_set_reg(pm4, R_0286CC_SPI_PS_INPUT_ENA, shader->spi_ps_input_ena);
|
||||
si_pm4_set_reg(pm4, R_0286D0_SPI_PS_INPUT_ADDR, shader->spi_ps_input_ena);
|
||||
si_pm4_set_reg(pm4, R_0286D8_SPI_PS_IN_CONTROL, spi_ps_in_control);
|
||||
|
||||
/* XXX: Depends on Z buffer format? */
|
||||
si_pm4_set_reg(pm4, R_028710_SPI_SHADER_Z_FORMAT, 0);
|
||||
|
||||
/* XXX: Depends on color buffer format? */
|
||||
si_pm4_set_reg(pm4, R_028714_SPI_SHADER_COL_FORMAT,
|
||||
S_028714_COL0_EXPORT_FORMAT(V_028714_SPI_SHADER_32_ABGR));
|
||||
|
||||
va = r600_resource_va(ctx->screen, (void *)shader->bo);
|
||||
si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ);
|
||||
si_pm4_set_reg(pm4, R_00B020_SPI_SHADER_PGM_LO_PS, va >> 8);
|
||||
si_pm4_set_reg(pm4, R_00B024_SPI_SHADER_PGM_HI_PS, va >> 40);
|
||||
|
||||
num_user_sgprs = 6;
|
||||
num_sgprs = shader->num_sgprs;
|
||||
if (num_user_sgprs > num_sgprs)
|
||||
num_sgprs = num_user_sgprs;
|
||||
/* Last 2 reserved SGPRs are used for VCC */
|
||||
num_sgprs += 2;
|
||||
assert(num_sgprs <= 104);
|
||||
|
||||
si_pm4_set_reg(pm4, R_00B028_SPI_SHADER_PGM_RSRC1_PS,
|
||||
S_00B028_VGPRS((shader->num_vgprs - 1) / 4) |
|
||||
S_00B028_SGPRS((num_sgprs - 1) / 8));
|
||||
si_pm4_set_reg(pm4, R_00B02C_SPI_SHADER_PGM_RSRC2_PS,
|
||||
S_00B02C_USER_SGPR(num_user_sgprs));
|
||||
|
||||
si_pm4_set_reg(pm4, R_02880C_DB_SHADER_CONTROL, db_shader_control);
|
||||
|
||||
shader->sprite_coord_enable = rctx->sprite_coord_enable;
|
||||
si_pm4_bind_state(rctx, ps, shader->pm4);
|
||||
}
|
||||
|
||||
/*
|
||||
* Drawing
|
||||
*/
|
||||
|
||||
static unsigned si_conv_pipe_prim(unsigned pprim)
|
||||
{
|
||||
static const unsigned prim_conv[] = {
|
||||
[PIPE_PRIM_POINTS] = V_008958_DI_PT_POINTLIST,
|
||||
[PIPE_PRIM_LINES] = V_008958_DI_PT_LINELIST,
|
||||
[PIPE_PRIM_LINE_LOOP] = V_008958_DI_PT_LINELOOP,
|
||||
[PIPE_PRIM_LINE_STRIP] = V_008958_DI_PT_LINESTRIP,
|
||||
[PIPE_PRIM_TRIANGLES] = V_008958_DI_PT_TRILIST,
|
||||
[PIPE_PRIM_TRIANGLE_STRIP] = V_008958_DI_PT_TRISTRIP,
|
||||
[PIPE_PRIM_TRIANGLE_FAN] = V_008958_DI_PT_TRIFAN,
|
||||
[PIPE_PRIM_QUADS] = V_008958_DI_PT_QUADLIST,
|
||||
[PIPE_PRIM_QUAD_STRIP] = V_008958_DI_PT_QUADSTRIP,
|
||||
[PIPE_PRIM_POLYGON] = V_008958_DI_PT_POLYGON,
|
||||
[PIPE_PRIM_LINES_ADJACENCY] = ~0,
|
||||
[PIPE_PRIM_LINE_STRIP_ADJACENCY] = ~0,
|
||||
[PIPE_PRIM_TRIANGLES_ADJACENCY] = ~0,
|
||||
[PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY] = ~0
|
||||
};
|
||||
unsigned result = prim_conv[pprim];
|
||||
if (result == ~0) {
|
||||
R600_ERR("unsupported primitive type %d\n", pprim);
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
static bool si_update_draw_info_state(struct r600_context *rctx,
|
||||
const struct pipe_draw_info *info)
|
||||
{
|
||||
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
|
||||
unsigned prim = si_conv_pipe_prim(info->mode);
|
||||
unsigned ls_mask = 0;
|
||||
|
||||
if (pm4 == NULL)
|
||||
return false;
|
||||
|
||||
if (prim == ~0) {
|
||||
FREE(pm4);
|
||||
return false;
|
||||
}
|
||||
|
||||
si_pm4_set_reg(pm4, R_008958_VGT_PRIMITIVE_TYPE, prim);
|
||||
si_pm4_set_reg(pm4, R_028400_VGT_MAX_VTX_INDX, ~0);
|
||||
si_pm4_set_reg(pm4, R_028404_VGT_MIN_VTX_INDX, 0);
|
||||
si_pm4_set_reg(pm4, R_028408_VGT_INDX_OFFSET, info->index_bias);
|
||||
si_pm4_set_reg(pm4, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, info->restart_index);
|
||||
si_pm4_set_reg(pm4, R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, info->primitive_restart);
|
||||
#if 0
|
||||
si_pm4_set_reg(pm4, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0);
|
||||
si_pm4_set_reg(pm4, R_03CFF4_SQ_VTX_START_INST_LOC, info->start_instance);
|
||||
#endif
|
||||
|
||||
if (prim == V_008958_DI_PT_LINELIST)
|
||||
ls_mask = 1;
|
||||
else if (prim == V_008958_DI_PT_LINESTRIP)
|
||||
ls_mask = 2;
|
||||
si_pm4_set_reg(pm4, R_028A0C_PA_SC_LINE_STIPPLE,
|
||||
S_028A0C_AUTO_RESET_CNTL(ls_mask) |
|
||||
rctx->pa_sc_line_stipple);
|
||||
|
||||
if (info->mode == PIPE_PRIM_QUADS || info->mode == PIPE_PRIM_QUAD_STRIP || info->mode == PIPE_PRIM_POLYGON) {
|
||||
si_pm4_set_reg(pm4, R_028814_PA_SU_SC_MODE_CNTL,
|
||||
S_028814_PROVOKING_VTX_LAST(1) | rctx->pa_su_sc_mode_cntl);
|
||||
} else {
|
||||
si_pm4_set_reg(pm4, R_028814_PA_SU_SC_MODE_CNTL, rctx->pa_su_sc_mode_cntl);
|
||||
}
|
||||
si_pm4_set_reg(pm4, R_02881C_PA_CL_VS_OUT_CNTL,
|
||||
prim == PIPE_PRIM_POINTS ? rctx->pa_cl_vs_out_cntl : 0
|
||||
/*| (rctx->rasterizer->clip_plane_enable &
|
||||
rctx->vs_shader->shader.clip_dist_write)*/);
|
||||
si_pm4_set_reg(pm4, R_028810_PA_CL_CLIP_CNTL, rctx->pa_cl_clip_cntl
|
||||
/*| (rctx->vs_shader->shader.clip_dist_write ||
|
||||
rctx->vs_shader->shader.vs_prohibit_ucps ?
|
||||
0 : rctx->rasterizer->clip_plane_enable & 0x3F)*/);
|
||||
|
||||
si_pm4_set_state(rctx, draw_info, pm4);
|
||||
return true;
|
||||
}
|
||||
|
||||
static void si_update_alpha_ref(struct r600_context *rctx)
|
||||
{
|
||||
#if 0
|
||||
unsigned alpha_ref;
|
||||
struct r600_pipe_state rstate;
|
||||
|
||||
alpha_ref = rctx->alpha_ref;
|
||||
rstate.nregs = 0;
|
||||
if (rctx->export_16bpc)
|
||||
alpha_ref &= ~0x1FFF;
|
||||
si_pm4_set_reg(&rstate, R_028438_SX_ALPHA_REF, alpha_ref);
|
||||
|
||||
si_pm4_set_state(rctx, TODO, pm4);
|
||||
rctx->alpha_ref_dirty = false;
|
||||
#endif
|
||||
}
|
||||
|
||||
static void si_update_spi_map(struct r600_context *rctx)
|
||||
{
|
||||
struct si_shader *ps = &rctx->ps_shader->shader;
|
||||
struct si_shader *vs = &rctx->vs_shader->shader;
|
||||
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
|
||||
unsigned i, j, tmp;
|
||||
|
||||
for (i = 0; i < ps->ninput; i++) {
|
||||
tmp = 0;
|
||||
|
||||
#if 0
|
||||
/* XXX: Flat shading hangs the GPU */
|
||||
if (ps->input[i].name == TGSI_SEMANTIC_POSITION ||
|
||||
ps->input[i].interpolate == TGSI_INTERPOLATE_CONSTANT ||
|
||||
(ps->input[i].interpolate == TGSI_INTERPOLATE_COLOR &&
|
||||
rctx->rasterizer && rctx->rasterizer->flatshade)) {
|
||||
tmp |= S_028644_FLAT_SHADE(1);
|
||||
}
|
||||
#endif
|
||||
|
||||
if (ps->input[i].name == TGSI_SEMANTIC_GENERIC &&
|
||||
rctx->sprite_coord_enable & (1 << ps->input[i].sid)) {
|
||||
tmp |= S_028644_PT_SPRITE_TEX(1);
|
||||
}
|
||||
|
||||
for (j = 0; j < vs->noutput; j++) {
|
||||
if (ps->input[i].name == vs->output[j].name &&
|
||||
ps->input[i].sid == vs->output[j].sid) {
|
||||
tmp |= S_028644_OFFSET(vs->output[j].param_offset);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (j == vs->noutput) {
|
||||
/* No corresponding output found, load defaults into input */
|
||||
tmp |= S_028644_OFFSET(0x20);
|
||||
}
|
||||
|
||||
si_pm4_set_reg(pm4, R_028644_SPI_PS_INPUT_CNTL_0 + i * 4, tmp);
|
||||
}
|
||||
|
||||
si_pm4_set_state(rctx, spi, pm4);
|
||||
}
|
||||
|
||||
static void si_update_derived_state(struct r600_context *rctx)
|
||||
{
|
||||
struct pipe_context * ctx = (struct pipe_context*)rctx;
|
||||
|
||||
if (!rctx->blitter->running) {
|
||||
if (rctx->have_depth_fb || rctx->have_depth_texture)
|
||||
r600_flush_depth_textures(rctx);
|
||||
}
|
||||
|
||||
if ((rctx->ps_shader->shader.fs_write_all &&
|
||||
(rctx->ps_shader->shader.nr_cbufs != rctx->framebuffer.nr_cbufs)) ||
|
||||
(rctx->sprite_coord_enable &&
|
||||
(rctx->ps_shader->sprite_coord_enable != rctx->sprite_coord_enable))) {
|
||||
si_pipe_shader_destroy(&rctx->context, rctx->ps_shader);
|
||||
}
|
||||
|
||||
if (rctx->alpha_ref_dirty) {
|
||||
si_update_alpha_ref(rctx);
|
||||
}
|
||||
|
||||
if (!rctx->vs_shader->bo) {
|
||||
si_pipe_shader_vs(ctx, rctx->vs_shader);
|
||||
}
|
||||
|
||||
if (!rctx->ps_shader->bo) {
|
||||
si_pipe_shader_ps(ctx, rctx->ps_shader);
|
||||
}
|
||||
|
||||
if (rctx->shader_dirty) {
|
||||
si_update_spi_map(rctx);
|
||||
rctx->shader_dirty = false;
|
||||
}
|
||||
}
|
||||
|
||||
static void si_vertex_buffer_update(struct r600_context *rctx)
|
||||
{
|
||||
struct pipe_context *ctx = &rctx->context;
|
||||
struct r600_resource *rbuffer, *t_list_buffer;
|
||||
struct pipe_vertex_buffer *vertex_buffer;
|
||||
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
|
||||
unsigned i, count, offset;
|
||||
uint32_t *ptr;
|
||||
uint64_t va;
|
||||
|
||||
si_pm4_inval_vertex_cache(pm4);
|
||||
|
||||
/* bind vertex buffer once */
|
||||
count = rctx->nr_vertex_buffers;
|
||||
assert(count <= 256 / 4);
|
||||
|
||||
t_list_buffer = (struct r600_resource*)
|
||||
pipe_buffer_create(ctx->screen, PIPE_BIND_CUSTOM,
|
||||
PIPE_USAGE_IMMUTABLE, 4 * 4 * count);
|
||||
if (t_list_buffer == NULL) {
|
||||
FREE(pm4);
|
||||
return;
|
||||
}
|
||||
|
||||
ptr = (uint32_t*)rctx->ws->buffer_map(t_list_buffer->cs_buf,
|
||||
rctx->cs,
|
||||
PIPE_TRANSFER_WRITE);
|
||||
|
||||
for (i = 0 ; i < count; i++, ptr += 4) {
|
||||
struct pipe_vertex_element *velem = &rctx->vertex_elements->elements[i];
|
||||
const struct util_format_description *desc;
|
||||
unsigned data_format, num_format;
|
||||
int first_non_void;
|
||||
|
||||
/* bind vertex buffer once */
|
||||
vertex_buffer = &rctx->vertex_buffer[i];
|
||||
rbuffer = (struct r600_resource*)vertex_buffer->buffer;
|
||||
offset = 0;
|
||||
if (vertex_buffer == NULL || rbuffer == NULL)
|
||||
continue;
|
||||
offset += vertex_buffer->buffer_offset;
|
||||
|
||||
va = r600_resource_va(ctx->screen, (void*)rbuffer);
|
||||
va += offset;
|
||||
|
||||
desc = util_format_description(velem->src_format);
|
||||
first_non_void = util_format_get_first_non_void_channel(velem->src_format);
|
||||
data_format = si_translate_vertexformat(ctx->screen,
|
||||
velem->src_format,
|
||||
desc, first_non_void);
|
||||
|
||||
switch (desc->channel[first_non_void].type) {
|
||||
case UTIL_FORMAT_TYPE_FIXED:
|
||||
num_format = V_008F0C_BUF_NUM_FORMAT_USCALED; /* XXX */
|
||||
break;
|
||||
case UTIL_FORMAT_TYPE_SIGNED:
|
||||
num_format = V_008F0C_BUF_NUM_FORMAT_SNORM;
|
||||
break;
|
||||
case UTIL_FORMAT_TYPE_UNSIGNED:
|
||||
num_format = V_008F0C_BUF_NUM_FORMAT_UNORM;
|
||||
break;
|
||||
case UTIL_FORMAT_TYPE_FLOAT:
|
||||
default:
|
||||
num_format = V_008F14_IMG_NUM_FORMAT_FLOAT;
|
||||
}
|
||||
|
||||
/* Fill in T# buffer resource description */
|
||||
ptr[0] = va & 0xFFFFFFFF;
|
||||
ptr[1] = (S_008F04_BASE_ADDRESS_HI(va >> 32) |
|
||||
S_008F04_STRIDE(vertex_buffer->stride));
|
||||
if (vertex_buffer->stride > 0)
|
||||
ptr[2] = ((vertex_buffer->buffer->width0 - offset) /
|
||||
vertex_buffer->stride);
|
||||
else
|
||||
ptr[2] = vertex_buffer->buffer->width0 - offset;
|
||||
ptr[3] = (S_008F0C_DST_SEL_X(si_map_swizzle(desc->swizzle[0])) |
|
||||
S_008F0C_DST_SEL_Y(si_map_swizzle(desc->swizzle[1])) |
|
||||
S_008F0C_DST_SEL_Z(si_map_swizzle(desc->swizzle[2])) |
|
||||
S_008F0C_DST_SEL_W(si_map_swizzle(desc->swizzle[3])) |
|
||||
S_008F0C_NUM_FORMAT(num_format) |
|
||||
S_008F0C_DATA_FORMAT(data_format));
|
||||
|
||||
si_pm4_add_bo(pm4, rbuffer, RADEON_USAGE_READ);
|
||||
}
|
||||
|
||||
va = r600_resource_va(ctx->screen, (void*)t_list_buffer);
|
||||
si_pm4_add_bo(pm4, t_list_buffer, RADEON_USAGE_READ);
|
||||
si_pm4_set_reg(pm4, R_00B148_SPI_SHADER_USER_DATA_VS_6, va);
|
||||
si_pm4_set_reg(pm4, R_00B14C_SPI_SHADER_USER_DATA_VS_7, va >> 32);
|
||||
si_pm4_set_state(rctx, vertex_buffers, pm4);
|
||||
}
|
||||
|
||||
void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
struct si_state_dsa *dsa = rctx->queued.named.dsa;
|
||||
struct pipe_draw_info info = *dinfo;
|
||||
struct r600_draw rdraw = {};
|
||||
struct pipe_index_buffer ib = {};
|
||||
struct r600_atom *state = NULL, *next_state = NULL;
|
||||
|
||||
if ((!info.count && (info.indexed || !info.count_from_stream_output)) ||
|
||||
(info.indexed && !rctx->index_buffer.buffer)) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (!rctx->ps_shader || !rctx->vs_shader)
|
||||
return;
|
||||
|
||||
si_update_derived_state(rctx);
|
||||
si_vertex_buffer_update(rctx);
|
||||
|
||||
rdraw.vgt_num_indices = info.count;
|
||||
rdraw.vgt_num_instances = info.instance_count;
|
||||
|
||||
if (info.indexed) {
|
||||
/* Initialize the index buffer struct. */
|
||||
pipe_resource_reference(&ib.buffer, rctx->index_buffer.buffer);
|
||||
ib.index_size = rctx->index_buffer.index_size;
|
||||
ib.offset = rctx->index_buffer.offset + info.start * ib.index_size;
|
||||
|
||||
/* Translate or upload, if needed. */
|
||||
r600_translate_index_buffer(rctx, &ib, info.count);
|
||||
|
||||
if (ib.user_buffer) {
|
||||
r600_upload_index_buffer(rctx, &ib, info.count);
|
||||
}
|
||||
|
||||
/* Initialize the r600_draw struct with index buffer info. */
|
||||
if (ib.index_size == 4) {
|
||||
rdraw.vgt_index_type = V_028A7C_VGT_INDEX_32 |
|
||||
(R600_BIG_ENDIAN ? V_028A7C_VGT_DMA_SWAP_32_BIT : 0);
|
||||
} else {
|
||||
rdraw.vgt_index_type = V_028A7C_VGT_INDEX_16 |
|
||||
(R600_BIG_ENDIAN ? V_028A7C_VGT_DMA_SWAP_16_BIT : 0);
|
||||
}
|
||||
rdraw.indices = (struct r600_resource*)ib.buffer;
|
||||
rdraw.indices_bo_offset = ib.offset;
|
||||
rdraw.vgt_draw_initiator = V_0287F0_DI_SRC_SEL_DMA;
|
||||
} else {
|
||||
info.index_bias = info.start;
|
||||
rdraw.vgt_draw_initiator = V_0287F0_DI_SRC_SEL_AUTO_INDEX;
|
||||
if (info.count_from_stream_output) {
|
||||
rdraw.vgt_draw_initiator |= S_0287F0_USE_OPAQUE(1);
|
||||
|
||||
r600_context_draw_opaque_count(rctx, (struct r600_so_target*)info.count_from_stream_output);
|
||||
}
|
||||
}
|
||||
|
||||
rctx->vs_shader_so_strides = rctx->vs_shader->so_strides;
|
||||
|
||||
if (!si_update_draw_info_state(rctx, &info))
|
||||
return;
|
||||
|
||||
rdraw.db_render_override = dsa->db_render_override;
|
||||
rdraw.db_render_control = dsa->db_render_control;
|
||||
|
||||
/* Emit states. */
|
||||
rctx->pm4_dirty_cdwords += si_pm4_dirty_dw(rctx);
|
||||
|
||||
r600_need_cs_space(rctx, 0, TRUE);
|
||||
|
||||
LIST_FOR_EACH_ENTRY_SAFE(state, next_state, &rctx->dirty_states, head) {
|
||||
r600_emit_atom(rctx, state);
|
||||
}
|
||||
si_pm4_emit_dirty(rctx);
|
||||
rctx->pm4_dirty_cdwords = 0;
|
||||
|
||||
/* Enable stream out if needed. */
|
||||
if (rctx->streamout_start) {
|
||||
r600_context_streamout_begin(rctx);
|
||||
rctx->streamout_start = FALSE;
|
||||
}
|
||||
|
||||
si_context_draw(rctx, &rdraw);
|
||||
|
||||
rctx->flags |= R600_CONTEXT_DST_CACHES_DIRTY | R600_CONTEXT_DRAW_PENDING;
|
||||
|
||||
if (rctx->framebuffer.zsbuf)
|
||||
{
|
||||
struct pipe_resource *tex = rctx->framebuffer.zsbuf->texture;
|
||||
((struct r600_resource_texture *)tex)->dirty_db = TRUE;
|
||||
}
|
||||
|
||||
pipe_resource_reference(&ib.buffer, NULL);
|
||||
}
|
@@ -90,19 +90,17 @@ _mesa_glsl_parse_state::_mesa_glsl_parse_state(struct gl_context *_ctx,
|
||||
*/
|
||||
this->Const.GLSL_100ES = (ctx->API == API_OPENGLES2)
|
||||
|| ctx->Extensions.ARB_ES2_compatibility;
|
||||
this->Const.GLSL_110 = (ctx->API == API_OPENGL);
|
||||
this->Const.GLSL_120 = (ctx->API == API_OPENGL)
|
||||
&& (ctx->Const.GLSLVersion >= 120);
|
||||
this->Const.GLSL_130 = (ctx->API == API_OPENGL)
|
||||
&& (ctx->Const.GLSLVersion >= 130);
|
||||
this->Const.GLSL_140 = (ctx->API == API_OPENGL)
|
||||
&& (ctx->Const.GLSLVersion >= 140);
|
||||
bool is_desktop_gl = IS_CTX_DESKTOP_GL(ctx);
|
||||
this->Const.GLSL_110 = is_desktop_gl;
|
||||
this->Const.GLSL_120 = is_desktop_gl && (ctx->Const.GLSLVersion >= 120);
|
||||
this->Const.GLSL_130 = is_desktop_gl && (ctx->Const.GLSLVersion >= 130);
|
||||
this->Const.GLSL_140 = is_desktop_gl && (ctx->Const.GLSLVersion >= 140);
|
||||
|
||||
const unsigned lowest_version =
|
||||
(ctx->API == API_OPENGLES2) || ctx->Extensions.ARB_ES2_compatibility
|
||||
? 100 : 110;
|
||||
const unsigned highest_version =
|
||||
(ctx->API == API_OPENGL) ? ctx->Const.GLSLVersion : 100;
|
||||
is_desktop_gl ? ctx->Const.GLSLVersion : 100;
|
||||
char *supported = ralloc_strdup(this, "");
|
||||
|
||||
for (unsigned ver = lowest_version; ver <= highest_version; ver += 10) {
|
||||
|
@@ -45,7 +45,7 @@ double
|
||||
glsl_strtod(const char *s, char **end)
|
||||
{
|
||||
#if defined(_GNU_SOURCE) && !defined(__CYGWIN__) && !defined(__FreeBSD__) && \
|
||||
!defined(__HAIKU__)
|
||||
!defined(__HAIKU__) && !defined(__UCLIBC__)
|
||||
static locale_t loc = NULL;
|
||||
if (!loc) {
|
||||
loc = newlocale(LC_CTYPE_MASK, "C", NULL);
|
||||
|
@@ -47,15 +47,7 @@ AM_CFLAGS = \
|
||||
$(GLPROTO_CFLAGS) \
|
||||
$(X11_INCLUDES)
|
||||
|
||||
if HAVE_MANGLED_GL
|
||||
MANGLED_GL_LIB = libMangledGL.la
|
||||
else
|
||||
NORMAL_GL_LIB = libGL.la
|
||||
endif
|
||||
|
||||
lib_LTLIBRARIES = \
|
||||
$(NORMAL_GL_LIB) \
|
||||
$(MANGLED_GL_LIB)
|
||||
lib_LTLIBRARIES = lib@GL_LIB@.la
|
||||
|
||||
noinst_LTLIBRARIES = libglx.la
|
||||
|
||||
@@ -109,21 +101,16 @@ GL_LDFLAGS = \
|
||||
-Wl,-Bsymbolic \
|
||||
-version-number 1:2 -no-undefined
|
||||
|
||||
libGL_la_SOURCES =
|
||||
libMangledGL_la_SOURCES =
|
||||
libGL_la_LIBADD = $(GL_LIBS)
|
||||
libMangledGL_la_LIBADD = $(GL_LIBS)
|
||||
libGL_la_LDFLAGS = $(GL_LDFLAGS)
|
||||
libMangledGL_la_LDFLAGS = $(GL_LDFLAGS)
|
||||
lib@GL_LIB@_la_SOURCES =
|
||||
lib@GL_LIB@_la_LIBADD = $(GL_LIBS)
|
||||
lib@GL_LIB@_la_LDFLAGS = $(GL_LDFLAGS)
|
||||
|
||||
# Provide compatibility with scripts for the old Mesa build system for
|
||||
# a while by putting a link to the driver into /lib of the build tree.
|
||||
if !HAVE_MANGLED_GL
|
||||
all-local: $(NORMAL_GL_LIB) $(MANGLED_GL_LIB)
|
||||
all-local: lib@GL_LIB@.la
|
||||
$(MKDIR_P) $(top_builddir)/$(LIB_DIR);
|
||||
ln -f .libs/libGL.so.1.2.0 $(top_builddir)/$(LIB_DIR)/libGL.so.1
|
||||
ln -sf libGL.so.1 $(top_builddir)/$(LIB_DIR)/libGL.so
|
||||
endif
|
||||
ln -f .libs/lib@GL_LIB@.so.1.2.0 $(top_builddir)/$(LIB_DIR)/lib@GL_LIB@.so.1
|
||||
ln -sf lib@GL_LIB@.so.1 $(top_builddir)/$(LIB_DIR)/lib@GL_LIB@.so
|
||||
|
||||
$(GLAPI_LIB):
|
||||
@$(MAKE) -C $(TOP)/src/mapi/glapi
|
||||
|
@@ -46,6 +46,7 @@
|
||||
#include "main/fbobject.h"
|
||||
#include "main/feedback.h"
|
||||
#include "main/formats.h"
|
||||
#include "main/glformats.h"
|
||||
#include "main/image.h"
|
||||
#include "main/macros.h"
|
||||
#include "main/matrix.h"
|
||||
@@ -72,8 +73,6 @@
|
||||
#include "program/program.h"
|
||||
#include "swrast/swrast.h"
|
||||
#include "drivers/common/meta.h"
|
||||
#include "main/enums.h"
|
||||
#include "main/glformats.h"
|
||||
|
||||
|
||||
/** Return offset in bytes of the field within a vertex struct */
|
||||
@@ -1849,7 +1848,7 @@ meta_glsl_clear_init(struct gl_context *ctx, struct clear_state *clear)
|
||||
clear->ColorLocation = _mesa_GetUniformLocationARB(clear->ShaderProg,
|
||||
"color");
|
||||
|
||||
if (ctx->API == API_OPENGL && ctx->Const.GLSLVersion >= 130) {
|
||||
if (IS_CTX_DESKTOP_GL(ctx) && ctx->Const.GLSLVersion >= 130) {
|
||||
vs = compile_shader_with_debug(ctx, GL_VERTEX_SHADER, vs_int_source);
|
||||
fs = compile_shader_with_debug(ctx, GL_FRAGMENT_SHADER, fs_int_source);
|
||||
|
||||
@@ -3160,12 +3159,8 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum target,
|
||||
* ReadPixels() and passed to Tex[Sub]Image().
|
||||
*/
|
||||
static GLenum
|
||||
get_temp_image_type(struct gl_context *ctx, gl_format format)
|
||||
get_temp_image_type(struct gl_context *ctx, GLenum baseFormat)
|
||||
{
|
||||
GLenum baseFormat, type;
|
||||
|
||||
baseFormat = _mesa_get_format_base_format(format);
|
||||
|
||||
switch (baseFormat) {
|
||||
case GL_RGBA:
|
||||
case GL_RGB:
|
||||
@@ -3180,7 +3175,7 @@ get_temp_image_type(struct gl_context *ctx, gl_format format)
|
||||
else if (ctx->DrawBuffer->Visual.redBits <= 16)
|
||||
return GL_UNSIGNED_SHORT;
|
||||
else
|
||||
return _mesa_get_format_datatype(format);
|
||||
return GL_FLOAT;
|
||||
case GL_DEPTH_COMPONENT:
|
||||
return GL_UNSIGNED_INT;
|
||||
case GL_DEPTH_STENCIL:
|
||||
@@ -3222,10 +3217,12 @@ _mesa_meta_CopyTexSubImage(struct gl_context *ctx, GLuint dims,
|
||||
format = GL_RGBA;
|
||||
}
|
||||
|
||||
type = get_temp_image_type(ctx, texImage->TexFormat);
|
||||
if (_mesa_is_format_integer_color(texImage->TexFormat)) {
|
||||
format = _mesa_base_format_to_integer_format(format);
|
||||
_mesa_problem(ctx, "unsupported integer color copyteximage");
|
||||
return;
|
||||
}
|
||||
|
||||
type = get_temp_image_type(ctx, format);
|
||||
bpp = _mesa_bytes_per_pixel(format, type);
|
||||
if (bpp <= 0) {
|
||||
_mesa_problem(ctx, "Bad bpp in _mesa_meta_CopyTexSubImage()");
|
||||
|
@@ -110,6 +110,61 @@ clip_or_scissor(bool mirror, GLint &src_x0, GLint &src_x1, GLint &dst_x0,
|
||||
}
|
||||
|
||||
|
||||
static struct intel_mipmap_tree *
|
||||
find_miptree(GLbitfield buffer_bit, struct gl_renderbuffer *rb)
|
||||
{
|
||||
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
|
||||
struct intel_mipmap_tree *mt = irb->mt;
|
||||
if (buffer_bit == GL_STENCIL_BUFFER_BIT && mt->stencil_mt)
|
||||
mt = mt->stencil_mt;
|
||||
return mt;
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
do_blorp_blit(struct intel_context *intel, GLbitfield buffer_bit,
|
||||
struct gl_renderbuffer *src_rb, struct gl_renderbuffer *dst_rb,
|
||||
GLint srcX0, GLint srcY0,
|
||||
GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
|
||||
bool mirror_x, bool mirror_y)
|
||||
{
|
||||
struct gl_context *ctx = &intel->ctx;
|
||||
|
||||
/* Find source/dst miptrees */
|
||||
struct intel_mipmap_tree *src_mt = find_miptree(buffer_bit, src_rb);
|
||||
struct intel_mipmap_tree *dst_mt = find_miptree(buffer_bit, dst_rb);
|
||||
|
||||
/* Get ready to blit. This includes depth resolving the src and dst
|
||||
* buffers if necessary.
|
||||
*/
|
||||
intel_renderbuffer_resolve_depth(intel, intel_renderbuffer(src_rb));
|
||||
intel_renderbuffer_resolve_depth(intel, intel_renderbuffer(dst_rb));
|
||||
|
||||
/* Do the blit */
|
||||
brw_blorp_blit_params params(brw_context(ctx), src_mt, dst_mt,
|
||||
srcX0, srcY0, dstX0, dstY0, dstX1, dstY1,
|
||||
mirror_x, mirror_y);
|
||||
brw_blorp_exec(intel, ¶ms);
|
||||
|
||||
/* Mark the dst buffer as needing a HiZ resolve if necessary. */
|
||||
intel_renderbuffer_set_needs_hiz_resolve(intel_renderbuffer(dst_rb));
|
||||
}
|
||||
|
||||
|
||||
static bool
|
||||
formats_match(GLbitfield buffer_bit, struct gl_renderbuffer *src_rb,
|
||||
struct gl_renderbuffer *dst_rb)
|
||||
{
|
||||
/* Note: don't just check gl_renderbuffer::Format, because in some cases
|
||||
* multiple gl_formats resolve to the same native type in the miptree (for
|
||||
* example MESA_FORMAT_X8_Z24 and MESA_FORMAT_S8_Z24), and we can blit
|
||||
* between those formats.
|
||||
*/
|
||||
return find_miptree(buffer_bit, src_rb)->format ==
|
||||
find_miptree(buffer_bit, dst_rb)->format;
|
||||
}
|
||||
|
||||
|
||||
static bool
|
||||
try_blorp_blit(struct intel_context *intel,
|
||||
GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
|
||||
@@ -123,65 +178,8 @@ try_blorp_blit(struct intel_context *intel,
|
||||
*/
|
||||
intel_prepare_render(intel);
|
||||
|
||||
/* Find buffers */
|
||||
const struct gl_framebuffer *read_fb = ctx->ReadBuffer;
|
||||
const struct gl_framebuffer *draw_fb = ctx->DrawBuffer;
|
||||
struct gl_renderbuffer *src_rb;
|
||||
struct gl_renderbuffer *dst_rb;
|
||||
switch (buffer_bit) {
|
||||
case GL_COLOR_BUFFER_BIT:
|
||||
src_rb = read_fb->_ColorReadBuffer;
|
||||
dst_rb =
|
||||
draw_fb->Attachment[
|
||||
draw_fb->_ColorDrawBufferIndexes[0]].Renderbuffer;
|
||||
break;
|
||||
case GL_DEPTH_BUFFER_BIT:
|
||||
src_rb = read_fb->Attachment[BUFFER_DEPTH].Renderbuffer;
|
||||
dst_rb = draw_fb->Attachment[BUFFER_DEPTH].Renderbuffer;
|
||||
break;
|
||||
case GL_STENCIL_BUFFER_BIT:
|
||||
src_rb = read_fb->Attachment[BUFFER_STENCIL].Renderbuffer;
|
||||
dst_rb = draw_fb->Attachment[BUFFER_STENCIL].Renderbuffer;
|
||||
break;
|
||||
default:
|
||||
assert(false);
|
||||
}
|
||||
|
||||
/* Validate source */
|
||||
if (!src_rb) return false;
|
||||
struct intel_renderbuffer *src_irb = intel_renderbuffer(src_rb);
|
||||
struct intel_mipmap_tree *src_mt = src_irb->mt;
|
||||
if (!src_mt) return false;
|
||||
if (buffer_bit == GL_STENCIL_BUFFER_BIT && src_mt->stencil_mt)
|
||||
src_mt = src_mt->stencil_mt;
|
||||
|
||||
/* Validate destination */
|
||||
if (!dst_rb) return false;
|
||||
struct intel_renderbuffer *dst_irb = intel_renderbuffer(dst_rb);
|
||||
struct intel_mipmap_tree *dst_mt = dst_irb->mt;
|
||||
if (!dst_mt) return false;
|
||||
if (buffer_bit == GL_STENCIL_BUFFER_BIT && dst_mt->stencil_mt)
|
||||
dst_mt = dst_mt->stencil_mt;
|
||||
|
||||
/* Blorp blits can't translate from one format to another. For that we'll
|
||||
* have to fall back to the meta-op blit. Note: the meta-op blit doesn't
|
||||
* support multisampled blits, but fortunately this is ok because
|
||||
* multisampled blits require identical source and destination formats.
|
||||
*/
|
||||
if (src_mt->format != dst_mt->format)
|
||||
return false;
|
||||
|
||||
/* Account for the fact that in the system framebuffer, the origin is at
|
||||
* the lower left.
|
||||
*/
|
||||
if (read_fb->Name == 0) {
|
||||
srcY0 = read_fb->Height - srcY0;
|
||||
srcY1 = read_fb->Height - srcY1;
|
||||
}
|
||||
if (draw_fb->Name == 0) {
|
||||
dstY0 = draw_fb->Height - dstY0;
|
||||
dstY1 = draw_fb->Height - dstY1;
|
||||
}
|
||||
|
||||
/* Detect if the blit needs to be mirrored */
|
||||
bool mirror_x = false, mirror_y = false;
|
||||
@@ -191,10 +189,8 @@ try_blorp_blit(struct intel_context *intel,
|
||||
fixup_mirroring(mirror_y, dstY0, dstY1);
|
||||
|
||||
/* Make sure width and height match */
|
||||
GLsizei width = srcX1 - srcX0;
|
||||
GLsizei height = srcY1 - srcY0;
|
||||
if (width != dstX1 - dstX0) return false;
|
||||
if (height != dstY1 - dstY0) return false;
|
||||
if (srcX1 - srcX0 != dstX1 - dstX0) return false;
|
||||
if (srcY1 - srcY0 != dstY1 - dstY0) return false;
|
||||
|
||||
/* If the destination rectangle needs to be clipped or scissored, do so.
|
||||
*/
|
||||
@@ -215,20 +211,58 @@ try_blorp_blit(struct intel_context *intel,
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Get ready to blit. This includes depth resolving the src and dst
|
||||
* buffers if necessary.
|
||||
/* Account for the fact that in the system framebuffer, the origin is at
|
||||
* the lower left.
|
||||
*/
|
||||
intel_renderbuffer_resolve_depth(intel, src_irb);
|
||||
intel_renderbuffer_resolve_depth(intel, dst_irb);
|
||||
if (read_fb->Name == 0) {
|
||||
GLint tmp = read_fb->Height - srcY0;
|
||||
srcY0 = read_fb->Height - srcY1;
|
||||
srcY1 = tmp;
|
||||
mirror_y = !mirror_y;
|
||||
}
|
||||
if (draw_fb->Name == 0) {
|
||||
GLint tmp = draw_fb->Height - dstY0;
|
||||
dstY0 = draw_fb->Height - dstY1;
|
||||
dstY1 = tmp;
|
||||
mirror_y = !mirror_y;
|
||||
}
|
||||
|
||||
/* Do the blit */
|
||||
brw_blorp_blit_params params(brw_context(ctx), src_mt, dst_mt,
|
||||
srcX0, srcY0, dstX0, dstY0, dstX1, dstY1,
|
||||
mirror_x, mirror_y);
|
||||
brw_blorp_exec(intel, ¶ms);
|
||||
|
||||
/* Mark the dst buffer as needing a HiZ resolve if necessary. */
|
||||
intel_renderbuffer_set_needs_hiz_resolve(dst_irb);
|
||||
/* Find buffers */
|
||||
struct gl_renderbuffer *src_rb;
|
||||
struct gl_renderbuffer *dst_rb;
|
||||
switch (buffer_bit) {
|
||||
case GL_COLOR_BUFFER_BIT:
|
||||
src_rb = read_fb->_ColorReadBuffer;
|
||||
for (unsigned i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; ++i) {
|
||||
dst_rb = ctx->DrawBuffer->_ColorDrawBuffers[i];
|
||||
if (dst_rb && !formats_match(buffer_bit, src_rb, dst_rb))
|
||||
return false;
|
||||
}
|
||||
for (unsigned i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; ++i) {
|
||||
dst_rb = ctx->DrawBuffer->_ColorDrawBuffers[i];
|
||||
do_blorp_blit(intel, buffer_bit, src_rb, dst_rb, srcX0, srcY0,
|
||||
dstX0, dstY0, dstX1, dstY1, mirror_x, mirror_y);
|
||||
}
|
||||
break;
|
||||
case GL_DEPTH_BUFFER_BIT:
|
||||
src_rb = read_fb->Attachment[BUFFER_DEPTH].Renderbuffer;
|
||||
dst_rb = draw_fb->Attachment[BUFFER_DEPTH].Renderbuffer;
|
||||
if (!formats_match(buffer_bit, src_rb, dst_rb))
|
||||
return false;
|
||||
do_blorp_blit(intel, buffer_bit, src_rb, dst_rb, srcX0, srcY0,
|
||||
dstX0, dstY0, dstX1, dstY1, mirror_x, mirror_y);
|
||||
break;
|
||||
case GL_STENCIL_BUFFER_BIT:
|
||||
src_rb = read_fb->Attachment[BUFFER_STENCIL].Renderbuffer;
|
||||
dst_rb = draw_fb->Attachment[BUFFER_STENCIL].Renderbuffer;
|
||||
if (!formats_match(buffer_bit, src_rb, dst_rb))
|
||||
return false;
|
||||
do_blorp_blit(intel, buffer_bit, src_rb, dst_rb, srcX0, srcY0,
|
||||
dstX0, dstY0, dstX1, dstY1, mirror_x, mirror_y);
|
||||
break;
|
||||
default:
|
||||
assert(false);
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
@@ -309,6 +343,18 @@ enum sampler_message_arg
|
||||
* Y' = (Y & ~0b11) >> 1 | (Y & 0b1)
|
||||
* S = (Y & 0b10) | (X & 0b10) >> 1
|
||||
*
|
||||
* For an 8x multisampled surface using INTEL_MSAA_LAYOUT_IMS, encode_msaa()
|
||||
* embeds the sample number into bits 1 and 2 of the X coordinate and bit 1 of
|
||||
* the Y coordinate:
|
||||
*
|
||||
* encode_msaa(8, IMS, X, Y, S) = (X', Y', 0)
|
||||
* where X' = (X & ~0b1) << 2 | (S & 0b100) | (S & 0b1) << 1 | (X & 0b1)
|
||||
* Y' = (Y & ~0b1) << 1 | (S & 0b10) | (Y & 0b1)
|
||||
* decode_msaa(8, IMS, X, Y, 0) = (X', Y', S)
|
||||
* where X' = (X & ~0b111) >> 2 | (X & 0b1)
|
||||
* Y' = (Y & ~0b11) >> 1 | (Y & 0b1)
|
||||
* S = (X & 0b100) | (Y & 0b10) | (X & 0b10) >> 1
|
||||
*
|
||||
* For X tiling, tile() combines together the low-order bits of the X and Y
|
||||
* coordinates in the pattern 0byyyxxxxxxxxx, creating 4k tiles that are 512
|
||||
* bytes wide and 8 rows high:
|
||||
@@ -425,7 +471,7 @@ private:
|
||||
void kill_if_outside_dst_rect();
|
||||
void translate_dst_to_src();
|
||||
void single_to_blend();
|
||||
void manual_blend();
|
||||
void manual_blend(unsigned num_samples);
|
||||
void sample(struct brw_reg dst);
|
||||
void texel_fetch(struct brw_reg dst);
|
||||
void mcs_fetch();
|
||||
@@ -437,7 +483,7 @@ private:
|
||||
/**
|
||||
* Base-2 logarithm of the maximum number of samples that can be blended.
|
||||
*/
|
||||
static const unsigned LOG2_MAX_BLEND_SAMPLES = 2;
|
||||
static const unsigned LOG2_MAX_BLEND_SAMPLES = 3;
|
||||
|
||||
void *mem_ctx;
|
||||
struct brw_context *brw;
|
||||
@@ -625,7 +671,7 @@ brw_blorp_blit_program::compile(struct brw_context *brw,
|
||||
sample(texture_data[0]);
|
||||
} else {
|
||||
/* Gen7+ hardware doesn't automaticaly blend. */
|
||||
manual_blend();
|
||||
manual_blend(key->src_samples);
|
||||
}
|
||||
} else {
|
||||
/* We aren't blending, which means we just want to fetch a single sample
|
||||
@@ -782,19 +828,48 @@ brw_blorp_blit_program::compute_frag_coords()
|
||||
brw_ADD(&func, Y, stride(suboffset(R1, 5), 2, 4, 0), brw_imm_v(0x11001100));
|
||||
|
||||
if (key->persample_msaa_dispatch) {
|
||||
/* The WM will be run in MSDISPMODE_PERSAMPLE with num_samples > 0.
|
||||
* Therefore, subspan 0 will represent sample 0, subspan 1 will
|
||||
* represent sample 1, and so on.
|
||||
*
|
||||
* So we need to populate S with the sequence (0, 0, 0, 0, 1, 1, 1, 1,
|
||||
* 2, 2, 2, 2, 3, 3, 3, 3). The easiest way to do this is to populate a
|
||||
* temporary variable with the sequence (0, 1, 2, 3), and then copy from
|
||||
* it using vstride=1, width=4, hstride=0.
|
||||
*
|
||||
* TODO: implement the necessary calculation for 8x multisampling.
|
||||
*/
|
||||
brw_MOV(&func, t1, brw_imm_v(0x3210));
|
||||
brw_MOV(&func, S, stride(t1, 1, 4, 0));
|
||||
switch (key->rt_samples) {
|
||||
case 4:
|
||||
/* The WM will be run in MSDISPMODE_PERSAMPLE with num_samples == 4.
|
||||
* Therefore, subspan 0 will represent sample 0, subspan 1 will
|
||||
* represent sample 1, and so on.
|
||||
*
|
||||
* So we need to populate S with the sequence (0, 0, 0, 0, 1, 1, 1,
|
||||
* 1, 2, 2, 2, 2, 3, 3, 3, 3). The easiest way to do this is to
|
||||
* populate a temporary variable with the sequence (0, 1, 2, 3), and
|
||||
* then copy from it using vstride=1, width=4, hstride=0.
|
||||
*/
|
||||
brw_MOV(&func, t1, brw_imm_v(0x3210));
|
||||
brw_MOV(&func, S, stride(t1, 1, 4, 0));
|
||||
break;
|
||||
case 8: {
|
||||
/* The WM will be run in MSDISPMODE_PERSAMPLE with num_samples == 8.
|
||||
* Therefore, subspan 0 will represent sample N (where N is 0 or 4),
|
||||
* subspan 1 will represent sample 1, and so on. We can find the
|
||||
* value of N by looking at R0.0 bits 7:6 ("Starting Sample Pair
|
||||
* Index") and multiplying by two (since samples are always delivered
|
||||
* in pairs). That is, we compute 2*((R0.0 & 0xc0) >> 6) == (R0.0 &
|
||||
* 0xc0) >> 5.
|
||||
*
|
||||
* Then we need to add N to the sequence (0, 0, 0, 0, 1, 1, 1, 1, 2,
|
||||
* 2, 2, 2, 3, 3, 3, 3), which we compute by populating a temporary
|
||||
* variable with the sequence (0, 1, 2, 3), and then reading from it
|
||||
* using vstride=1, width=4, hstride=0.
|
||||
*/
|
||||
struct brw_reg t1_ud1 = vec1(retype(t1, BRW_REGISTER_TYPE_UD));
|
||||
struct brw_reg r0_ud1 = vec1(retype(R0, BRW_REGISTER_TYPE_UD));
|
||||
brw_AND(&func, t1_ud1, r0_ud1, brw_imm_ud(0xc0));
|
||||
brw_SHR(&func, t1_ud1, t1_ud1, brw_imm_ud(5));
|
||||
brw_MOV(&func, t2, brw_imm_v(0x3210));
|
||||
brw_ADD(&func, S, retype(t1_ud1, BRW_REGISTER_TYPE_UW),
|
||||
stride(t2, 1, 4, 0));
|
||||
break;
|
||||
}
|
||||
default:
|
||||
assert(!"Unrecognized sample count in "
|
||||
"brw_blorp_blit_program::compute_frag_coords()");
|
||||
break;
|
||||
}
|
||||
s_is_zero = false;
|
||||
} else {
|
||||
/* Either the destination surface is single-sampled, or the WM will be
|
||||
@@ -906,7 +981,7 @@ brw_blorp_blit_program::translate_tiling(bool old_tiled_w, bool new_tiled_w)
|
||||
*
|
||||
* This code modifies the X and Y coordinates according to the formula:
|
||||
*
|
||||
* (X', Y', S') = encode_msaa_4x(X, Y, S)
|
||||
* (X', Y', S') = encode_msaa(num_samples, IMS, X, Y, S)
|
||||
*
|
||||
* (See brw_blorp_blit_program).
|
||||
*/
|
||||
@@ -929,27 +1004,58 @@ brw_blorp_blit_program::encode_msaa(unsigned num_samples,
|
||||
/* No translation necessary. */
|
||||
break;
|
||||
case INTEL_MSAA_LAYOUT_IMS:
|
||||
/* encode_msaa(4, IMS, X, Y, S) = (X', Y', 0)
|
||||
* where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1)
|
||||
* Y' = (Y & ~0b1 ) << 1 | (S & 0b10) | (Y & 0b1)
|
||||
*/
|
||||
brw_AND(&func, t1, X, brw_imm_uw(0xfffe)); /* X & ~0b1 */
|
||||
if (!s_is_zero) {
|
||||
brw_AND(&func, t2, S, brw_imm_uw(1)); /* S & 0b1 */
|
||||
brw_OR(&func, t1, t1, t2); /* (X & ~0b1) | (S & 0b1) */
|
||||
switch (num_samples) {
|
||||
case 4:
|
||||
/* encode_msaa(4, IMS, X, Y, S) = (X', Y', 0)
|
||||
* where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1)
|
||||
* Y' = (Y & ~0b1) << 1 | (S & 0b10) | (Y & 0b1)
|
||||
*/
|
||||
brw_AND(&func, t1, X, brw_imm_uw(0xfffe)); /* X & ~0b1 */
|
||||
if (!s_is_zero) {
|
||||
brw_AND(&func, t2, S, brw_imm_uw(1)); /* S & 0b1 */
|
||||
brw_OR(&func, t1, t1, t2); /* (X & ~0b1) | (S & 0b1) */
|
||||
}
|
||||
brw_SHL(&func, t1, t1, brw_imm_uw(1)); /* (X & ~0b1) << 1
|
||||
| (S & 0b1) << 1 */
|
||||
brw_AND(&func, t2, X, brw_imm_uw(1)); /* X & 0b1 */
|
||||
brw_OR(&func, Xp, t1, t2);
|
||||
brw_AND(&func, t1, Y, brw_imm_uw(0xfffe)); /* Y & ~0b1 */
|
||||
brw_SHL(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b1) << 1 */
|
||||
if (!s_is_zero) {
|
||||
brw_AND(&func, t2, S, brw_imm_uw(2)); /* S & 0b10 */
|
||||
brw_OR(&func, t1, t1, t2); /* (Y & ~0b1) << 1 | (S & 0b10) */
|
||||
}
|
||||
brw_AND(&func, t2, Y, brw_imm_uw(1)); /* Y & 0b1 */
|
||||
brw_OR(&func, Yp, t1, t2);
|
||||
break;
|
||||
case 8:
|
||||
/* encode_msaa(8, IMS, X, Y, S) = (X', Y', 0)
|
||||
* where X' = (X & ~0b1) << 2 | (S & 0b100) | (S & 0b1) << 1
|
||||
* | (X & 0b1)
|
||||
* Y' = (Y & ~0b1) << 1 | (S & 0b10) | (Y & 0b1)
|
||||
*/
|
||||
brw_AND(&func, t1, X, brw_imm_uw(0xfffe)); /* X & ~0b1 */
|
||||
brw_SHL(&func, t1, t1, brw_imm_uw(2)); /* (X & ~0b1) << 2 */
|
||||
if (!s_is_zero) {
|
||||
brw_AND(&func, t2, S, brw_imm_uw(4)); /* S & 0b100 */
|
||||
brw_OR(&func, t1, t1, t2); /* (X & ~0b1) << 2 | (S & 0b100) */
|
||||
brw_AND(&func, t2, S, brw_imm_uw(1)); /* S & 0b1 */
|
||||
brw_SHL(&func, t2, t2, brw_imm_uw(1)); /* (S & 0b1) << 1 */
|
||||
brw_OR(&func, t1, t1, t2); /* (X & ~0b1) << 2 | (S & 0b100)
|
||||
| (S & 0b1) << 1 */
|
||||
}
|
||||
brw_AND(&func, t2, X, brw_imm_uw(1)); /* X & 0b1 */
|
||||
brw_OR(&func, Xp, t1, t2);
|
||||
brw_AND(&func, t1, Y, brw_imm_uw(0xfffe)); /* Y & ~0b1 */
|
||||
brw_SHL(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b1) << 1 */
|
||||
if (!s_is_zero) {
|
||||
brw_AND(&func, t2, S, brw_imm_uw(2)); /* S & 0b10 */
|
||||
brw_OR(&func, t1, t1, t2); /* (Y & ~0b1) << 1 | (S & 0b10) */
|
||||
}
|
||||
brw_AND(&func, t2, Y, brw_imm_uw(1)); /* Y & 0b1 */
|
||||
brw_OR(&func, Yp, t1, t2);
|
||||
break;
|
||||
}
|
||||
brw_SHL(&func, t1, t1, brw_imm_uw(1)); /* (X & ~0b1) << 1
|
||||
| (S & 0b1) << 1 */
|
||||
brw_AND(&func, t2, X, brw_imm_uw(1)); /* X & 0b1 */
|
||||
brw_OR(&func, Xp, t1, t2);
|
||||
brw_AND(&func, t1, Y, brw_imm_uw(0xfffe)); /* Y & ~0b1 */
|
||||
brw_SHL(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b1) << 1 */
|
||||
if (!s_is_zero) {
|
||||
brw_AND(&func, t2, S, brw_imm_uw(2)); /* S & 0b10 */
|
||||
brw_OR(&func, t1, t1, t2); /* (Y & ~0b1) << 1 | (S & 0b10) */
|
||||
}
|
||||
brw_AND(&func, t2, Y, brw_imm_uw(1));
|
||||
brw_OR(&func, Yp, t1, t2);
|
||||
SWAP_XY_AND_XPYP();
|
||||
s_is_zero = true;
|
||||
break;
|
||||
@@ -962,7 +1068,7 @@ brw_blorp_blit_program::encode_msaa(unsigned num_samples,
|
||||
*
|
||||
* This code modifies the X and Y coordinates according to the formula:
|
||||
*
|
||||
* (X', Y', S) = decode_msaa(num_samples, X, Y, S)
|
||||
* (X', Y', S) = decode_msaa(num_samples, IMS, X, Y, S)
|
||||
*
|
||||
* (See brw_blorp_blit_program).
|
||||
*/
|
||||
@@ -985,24 +1091,49 @@ brw_blorp_blit_program::decode_msaa(unsigned num_samples,
|
||||
/* No translation necessary. */
|
||||
break;
|
||||
case INTEL_MSAA_LAYOUT_IMS:
|
||||
/* decode_msaa(4, IMS, X, Y, 0) = (X', Y', S)
|
||||
* where X' = (X & ~0b11) >> 1 | (X & 0b1)
|
||||
* Y' = (Y & ~0b11) >> 1 | (Y & 0b1)
|
||||
* S = (Y & 0b10) | (X & 0b10) >> 1
|
||||
*/
|
||||
assert(s_is_zero);
|
||||
brw_AND(&func, t1, X, brw_imm_uw(0xfffc)); /* X & ~0b11 */
|
||||
brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (X & ~0b11) >> 1 */
|
||||
brw_AND(&func, t2, X, brw_imm_uw(1)); /* X & 0b1 */
|
||||
brw_OR(&func, Xp, t1, t2);
|
||||
brw_AND(&func, t1, Y, brw_imm_uw(0xfffc)); /* Y & ~0b11 */
|
||||
brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
|
||||
brw_AND(&func, t2, Y, brw_imm_uw(1)); /* Y & 0b1 */
|
||||
brw_OR(&func, Yp, t1, t2);
|
||||
brw_AND(&func, t1, Y, brw_imm_uw(2)); /* Y & 0b10 */
|
||||
brw_AND(&func, t2, X, brw_imm_uw(2)); /* X & 0b10 */
|
||||
brw_SHR(&func, t2, t2, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
|
||||
brw_OR(&func, S, t1, t2);
|
||||
switch (num_samples) {
|
||||
case 4:
|
||||
/* decode_msaa(4, IMS, X, Y, 0) = (X', Y', S)
|
||||
* where X' = (X & ~0b11) >> 1 | (X & 0b1)
|
||||
* Y' = (Y & ~0b11) >> 1 | (Y & 0b1)
|
||||
* S = (Y & 0b10) | (X & 0b10) >> 1
|
||||
*/
|
||||
brw_AND(&func, t1, X, brw_imm_uw(0xfffc)); /* X & ~0b11 */
|
||||
brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (X & ~0b11) >> 1 */
|
||||
brw_AND(&func, t2, X, brw_imm_uw(1)); /* X & 0b1 */
|
||||
brw_OR(&func, Xp, t1, t2);
|
||||
brw_AND(&func, t1, Y, brw_imm_uw(0xfffc)); /* Y & ~0b11 */
|
||||
brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
|
||||
brw_AND(&func, t2, Y, brw_imm_uw(1)); /* Y & 0b1 */
|
||||
brw_OR(&func, Yp, t1, t2);
|
||||
brw_AND(&func, t1, Y, brw_imm_uw(2)); /* Y & 0b10 */
|
||||
brw_AND(&func, t2, X, brw_imm_uw(2)); /* X & 0b10 */
|
||||
brw_SHR(&func, t2, t2, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
|
||||
brw_OR(&func, S, t1, t2);
|
||||
break;
|
||||
case 8:
|
||||
/* decode_msaa(8, IMS, X, Y, 0) = (X', Y', S)
|
||||
* where X' = (X & ~0b111) >> 2 | (X & 0b1)
|
||||
* Y' = (Y & ~0b11) >> 1 | (Y & 0b1)
|
||||
* S = (X & 0b100) | (Y & 0b10) | (X & 0b10) >> 1
|
||||
*/
|
||||
brw_AND(&func, t1, X, brw_imm_uw(0xfff8)); /* X & ~0b111 */
|
||||
brw_SHR(&func, t1, t1, brw_imm_uw(2)); /* (X & ~0b111) >> 2 */
|
||||
brw_AND(&func, t2, X, brw_imm_uw(1)); /* X & 0b1 */
|
||||
brw_OR(&func, Xp, t1, t2);
|
||||
brw_AND(&func, t1, Y, brw_imm_uw(0xfffc)); /* Y & ~0b11 */
|
||||
brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
|
||||
brw_AND(&func, t2, Y, brw_imm_uw(1)); /* Y & 0b1 */
|
||||
brw_OR(&func, Yp, t1, t2);
|
||||
brw_AND(&func, t1, X, brw_imm_uw(4)); /* X & 0b100 */
|
||||
brw_AND(&func, t2, Y, brw_imm_uw(2)); /* Y & 0b10 */
|
||||
brw_OR(&func, t1, t1, t2); /* (X & 0b100) | (Y & 0b10) */
|
||||
brw_AND(&func, t2, X, brw_imm_uw(2)); /* X & 0b10 */
|
||||
brw_SHR(&func, t2, t2, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
|
||||
brw_OR(&func, S, t1, t2);
|
||||
break;
|
||||
}
|
||||
s_is_zero = false;
|
||||
SWAP_XY_AND_XPYP();
|
||||
break;
|
||||
@@ -1086,11 +1217,8 @@ inline int count_trailing_one_bits(unsigned value)
|
||||
|
||||
|
||||
void
|
||||
brw_blorp_blit_program::manual_blend()
|
||||
brw_blorp_blit_program::manual_blend(unsigned num_samples)
|
||||
{
|
||||
/* TODO: support num_samples != 4 */
|
||||
const int num_samples = 4;
|
||||
|
||||
if (key->tex_layout == INTEL_MSAA_LAYOUT_CMS)
|
||||
mcs_fetch();
|
||||
|
||||
@@ -1130,7 +1258,7 @@ brw_blorp_blit_program::manual_blend()
|
||||
brw_op2_ptr combine_op =
|
||||
key->texture_data_type == BRW_REGISTER_TYPE_F ? brw_ADD : brw_AVG;
|
||||
unsigned stack_depth = 0;
|
||||
for (int i = 0; i < num_samples; ++i) {
|
||||
for (unsigned i = 0; i < num_samples; ++i) {
|
||||
assert(stack_depth == _mesa_bitcount(i)); /* Loop invariant */
|
||||
|
||||
/* Push sample i onto the stack */
|
||||
@@ -1602,10 +1730,23 @@ brw_blorp_blit_params::brw_blorp_blit_params(struct brw_context *brw,
|
||||
* pipeline as multisampled.
|
||||
*/
|
||||
assert(dst_mt->msaa_layout == INTEL_MSAA_LAYOUT_IMS);
|
||||
x0 = (x0 * 2) & ~3;
|
||||
y0 = (y0 * 2) & ~3;
|
||||
x1 = ALIGN(x1 * 2, 4);
|
||||
y1 = ALIGN(y1 * 2, 4);
|
||||
switch (dst_mt->num_samples) {
|
||||
case 4:
|
||||
x0 = (x0 * 2) & ~3;
|
||||
y0 = (y0 * 2) & ~3;
|
||||
x1 = ALIGN(x1 * 2, 4);
|
||||
y1 = ALIGN(y1 * 2, 4);
|
||||
break;
|
||||
case 8:
|
||||
x0 = (x0 * 4) & ~7;
|
||||
y0 = (y0 * 2) & ~3;
|
||||
x1 = ALIGN(x1 * 4, 8);
|
||||
y1 = ALIGN(y1 * 2, 4);
|
||||
break;
|
||||
default:
|
||||
assert(!"Unrecognized sample count in brw_blorp_blit_params ctor");
|
||||
break;
|
||||
}
|
||||
wm_prog_key.use_kill = true;
|
||||
}
|
||||
|
||||
|
@@ -154,13 +154,10 @@ brwCreateContext(int api,
|
||||
ctx->Const.MaxTransformFeedbackSeparateComponents =
|
||||
BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
|
||||
|
||||
/* Claim to support 4 multisamples, even though we don't. This is a
|
||||
* requirement for GL 3.0 that we missed until the last minute. Go ahead and
|
||||
* claim the limit, so that usage of the 4 multisample-based API that is
|
||||
* guaranteed in 3.0 succeeds, even though we only rasterize a single sample.
|
||||
*/
|
||||
if (intel->gen >= 6)
|
||||
if (intel->gen == 6)
|
||||
ctx->Const.MaxSamples = 4;
|
||||
else if (intel->gen >= 7)
|
||||
ctx->Const.MaxSamples = 8;
|
||||
|
||||
/* if conformance mode is set, swrast can handle any size AA point */
|
||||
ctx->Const.MaxPointSizeAA = 255.0;
|
||||
|
@@ -971,6 +971,12 @@ struct brw_context
|
||||
|
||||
drm_intel_bo *scratch_bo;
|
||||
|
||||
/**
|
||||
* Buffer object used in place of multisampled null render targets on
|
||||
* Gen6. See brw_update_null_renderbuffer_surface().
|
||||
*/
|
||||
drm_intel_bo *multisampled_null_render_target_bo;
|
||||
|
||||
/** Offset in the program cache to the WM program */
|
||||
uint32_t prog_offset;
|
||||
|
||||
|
@@ -325,7 +325,6 @@ brw_format_for_mesa_format(gl_format mesa_format)
|
||||
[MESA_FORMAT_RG1616] = BRW_SURFACEFORMAT_R16G16_UNORM,
|
||||
[MESA_FORMAT_RG1616_REV] = 0,
|
||||
[MESA_FORMAT_ARGB2101010] = BRW_SURFACEFORMAT_B10G10R10A2_UNORM,
|
||||
[MESA_FORMAT_ABGR2101010_UINT] = BRW_SURFACEFORMAT_R10G10B10A2_UINT,
|
||||
[MESA_FORMAT_Z24_S8] = 0,
|
||||
[MESA_FORMAT_S8_Z24] = 0,
|
||||
[MESA_FORMAT_Z16] = 0,
|
||||
@@ -962,13 +961,66 @@ const struct brw_tracked_state brw_wm_pull_constants = {
|
||||
static void
|
||||
brw_update_null_renderbuffer_surface(struct brw_context *brw, unsigned int unit)
|
||||
{
|
||||
/* From the Sandy bridge PRM, Vol4 Part1 p71 (Surface Type: Programming
|
||||
* Notes):
|
||||
*
|
||||
* A null surface will be used in instances where an actual surface is
|
||||
* not bound. When a write message is generated to a null surface, no
|
||||
* actual surface is written to. When a read message (including any
|
||||
* sampling engine message) is generated to a null surface, the result
|
||||
* is all zeros. Note that a null surface type is allowed to be used
|
||||
* with all messages, even if it is not specificially indicated as
|
||||
* supported. All of the remaining fields in surface state are ignored
|
||||
* for null surfaces, with the following exceptions:
|
||||
*
|
||||
* - [DevSNB+]: Width, Height, Depth, and LOD fields must match the
|
||||
* depth buffer’s corresponding state for all render target surfaces,
|
||||
* including null.
|
||||
*
|
||||
* - Surface Format must be R8G8B8A8_UNORM.
|
||||
*/
|
||||
struct intel_context *intel = &brw->intel;
|
||||
struct gl_context *ctx = &intel->ctx;
|
||||
uint32_t *surf;
|
||||
unsigned surface_type = BRW_SURFACE_NULL;
|
||||
drm_intel_bo *bo = NULL;
|
||||
unsigned pitch_minus_1 = 0;
|
||||
uint32_t multisampling_state = 0;
|
||||
|
||||
/* _NEW_BUFFERS */
|
||||
const struct gl_framebuffer *fb = ctx->DrawBuffer;
|
||||
|
||||
surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
|
||||
6 * 4, 32, &brw->wm.surf_offset[unit]);
|
||||
|
||||
surf[0] = (BRW_SURFACE_NULL << BRW_SURFACE_TYPE_SHIFT |
|
||||
if (fb->Visual.samples > 0) {
|
||||
/* On Gen6, null render targets seem to cause GPU hangs when
|
||||
* multisampling. So work around this problem by rendering into dummy
|
||||
* color buffer.
|
||||
*
|
||||
* To decrease the amount of memory needed by the workaround buffer, we
|
||||
* set its pitch to 128 bytes (the width of a Y tile). This means that
|
||||
* the amount of memory needed for the workaround buffer is
|
||||
* (width_in_tiles + height_in_tiles - 1) tiles.
|
||||
*
|
||||
* Note that since the workaround buffer will be interpreted by the
|
||||
* hardware as an interleaved multisampled buffer, we need to compute
|
||||
* width_in_tiles and height_in_tiles by dividing the width and height
|
||||
* by 16 rather than the normal Y-tile size of 32.
|
||||
*/
|
||||
unsigned width_in_tiles = ALIGN(fb->Width, 16) / 16;
|
||||
unsigned height_in_tiles = ALIGN(fb->Height, 16) / 16;
|
||||
unsigned size_needed = (width_in_tiles + height_in_tiles - 1) * 4096;
|
||||
brw_get_scratch_bo(intel, &brw->wm.multisampled_null_render_target_bo,
|
||||
size_needed);
|
||||
bo = brw->wm.multisampled_null_render_target_bo;
|
||||
surface_type = BRW_SURFACE_2D;
|
||||
pitch_minus_1 = 127;
|
||||
multisampling_state =
|
||||
brw_get_surface_num_multisamples(fb->Visual.samples);
|
||||
}
|
||||
|
||||
surf[0] = (surface_type << BRW_SURFACE_TYPE_SHIFT |
|
||||
BRW_SURFACEFORMAT_B8G8R8A8_UNORM << BRW_SURFACE_FORMAT_SHIFT);
|
||||
if (intel->gen < 6) {
|
||||
surf[0] |= (1 << BRW_SURFACE_WRITEDISABLE_R_SHIFT |
|
||||
@@ -976,11 +1028,26 @@ brw_update_null_renderbuffer_surface(struct brw_context *brw, unsigned int unit)
|
||||
1 << BRW_SURFACE_WRITEDISABLE_B_SHIFT |
|
||||
1 << BRW_SURFACE_WRITEDISABLE_A_SHIFT);
|
||||
}
|
||||
surf[1] = 0;
|
||||
surf[2] = 0;
|
||||
surf[3] = 0;
|
||||
surf[4] = 0;
|
||||
surf[1] = bo ? bo->offset : 0;
|
||||
surf[2] = ((fb->Width - 1) << BRW_SURFACE_WIDTH_SHIFT |
|
||||
(fb->Height - 1) << BRW_SURFACE_HEIGHT_SHIFT);
|
||||
|
||||
/* From Sandy bridge PRM, Vol4 Part1 p82 (Tiled Surface: Programming
|
||||
* Notes):
|
||||
*
|
||||
* If Surface Type is SURFTYPE_NULL, this field must be TRUE
|
||||
*/
|
||||
surf[3] = (BRW_SURFACE_TILED | BRW_SURFACE_TILED_Y |
|
||||
pitch_minus_1 << BRW_SURFACE_PITCH_SHIFT);
|
||||
surf[4] = multisampling_state;
|
||||
surf[5] = 0;
|
||||
|
||||
if (bo) {
|
||||
drm_intel_bo_emit_reloc(brw->intel.batch.bo,
|
||||
brw->wm.surf_offset[unit] + 4,
|
||||
bo, 0,
|
||||
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
@@ -36,17 +36,75 @@ gen6_emit_3dstate_multisample(struct brw_context *brw,
|
||||
{
|
||||
struct intel_context *intel = &brw->intel;
|
||||
|
||||
/* TODO: 8x MSAA not implemented */
|
||||
assert(num_samples <= 4);
|
||||
uint32_t number_of_multisamples = 0;
|
||||
uint32_t sample_positions_3210 = 0;
|
||||
uint32_t sample_positions_7654 = 0;
|
||||
|
||||
switch (num_samples) {
|
||||
case 0:
|
||||
number_of_multisamples = MS_NUMSAMPLES_1;
|
||||
break;
|
||||
case 4:
|
||||
number_of_multisamples = MS_NUMSAMPLES_4;
|
||||
/* Sample positions:
|
||||
* 2 6 a e
|
||||
* 2 0
|
||||
* 6 1
|
||||
* a 2
|
||||
* e 3
|
||||
*/
|
||||
sample_positions_3210 = 0xae2ae662;
|
||||
break;
|
||||
case 8:
|
||||
number_of_multisamples = MS_NUMSAMPLES_8;
|
||||
/* Sample positions are based on a solution to the "8 queens" puzzle.
|
||||
* Rationale: in a solution to the 8 queens puzzle, no two queens share
|
||||
* a row, column, or diagonal. This is a desirable property for samples
|
||||
* in a multisampling pattern, because it ensures that the samples are
|
||||
* relatively uniformly distributed through the pixel.
|
||||
*
|
||||
* There are several solutions to the 8 queens puzzle (see
|
||||
* http://en.wikipedia.org/wiki/Eight_queens_puzzle). This solution was
|
||||
* chosen because it has a queen close to the center; this should
|
||||
* improve the accuracy of centroid interpolation, since the hardware
|
||||
* implements centroid interpolation by choosing the centermost sample
|
||||
* that overlaps with the primitive being drawn.
|
||||
*
|
||||
* Note: from the Ivy Bridge PRM, Vol2 Part1 p304 (3DSTATE_MULTISAMPLE:
|
||||
* Programming Notes):
|
||||
*
|
||||
* "When programming the sample offsets (for NUMSAMPLES_4 or _8 and
|
||||
* MSRASTMODE_xxx_PATTERN), the order of the samples 0 to 3 (or 7
|
||||
* for 8X) must have monotonically increasing distance from the
|
||||
* pixel center. This is required to get the correct centroid
|
||||
* computation in the device."
|
||||
*
|
||||
* Sample positions:
|
||||
* 1 3 5 7 9 b d f
|
||||
* 1 5
|
||||
* 3 2
|
||||
* 5 6
|
||||
* 7 4
|
||||
* 9 0
|
||||
* b 3
|
||||
* d 1
|
||||
* f 7
|
||||
*/
|
||||
sample_positions_3210 = 0xdbb39d79;
|
||||
sample_positions_7654 = 0x3ff55117;
|
||||
break;
|
||||
default:
|
||||
assert(!"Unrecognized num_samples in gen6_emit_3dstate_multisample");
|
||||
break;
|
||||
}
|
||||
|
||||
int len = intel->gen >= 7 ? 4 : 3;
|
||||
BEGIN_BATCH(len);
|
||||
OUT_BATCH(_3DSTATE_MULTISAMPLE << 16 | (len - 2));
|
||||
OUT_BATCH(MS_PIXEL_LOCATION_CENTER |
|
||||
(num_samples > 0 ? MS_NUMSAMPLES_4 : MS_NUMSAMPLES_1));
|
||||
OUT_BATCH(num_samples > 0 ? 0xae2ae662 : 0); /* positions for 4/8-sample */
|
||||
OUT_BATCH(MS_PIXEL_LOCATION_CENTER | number_of_multisamples);
|
||||
OUT_BATCH(sample_positions_3210);
|
||||
if (intel->gen >= 7)
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(sample_positions_7654);
|
||||
ADVANCE_BATCH();
|
||||
}
|
||||
|
||||
@@ -61,9 +119,6 @@ gen6_emit_3dstate_sample_mask(struct brw_context *brw,
|
||||
{
|
||||
struct intel_context *intel = &brw->intel;
|
||||
|
||||
/* TODO: 8x MSAA not implemented */
|
||||
assert(num_samples <= 4);
|
||||
|
||||
BEGIN_BATCH(2);
|
||||
OUT_BATCH(_3DSTATE_SAMPLE_MASK << 16 | (2 - 2));
|
||||
if (num_samples > 0) {
|
||||
@@ -83,20 +138,18 @@ static void upload_multisample_state(struct brw_context *brw)
|
||||
{
|
||||
struct intel_context *intel = &brw->intel;
|
||||
struct gl_context *ctx = &intel->ctx;
|
||||
unsigned num_samples = 0;
|
||||
float coverage = 1.0;
|
||||
float coverage_invert = false;
|
||||
|
||||
/* _NEW_BUFFERS */
|
||||
unsigned num_samples = ctx->DrawBuffer->Visual.samples;
|
||||
|
||||
/* _NEW_MULTISAMPLE */
|
||||
if (ctx->Multisample._Enabled && ctx->Multisample.SampleCoverage) {
|
||||
coverage = ctx->Multisample.SampleCoverageValue;
|
||||
coverage_invert = ctx->Multisample.SampleCoverageInvert;
|
||||
}
|
||||
|
||||
/* _NEW_BUFFERS */
|
||||
if (ctx->DrawBuffer->_ColorDrawBuffers[0])
|
||||
num_samples = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples;
|
||||
|
||||
/* 3DSTATE_MULTISAMPLE is nonpipelined. */
|
||||
intel_emit_post_sync_nonzero_flush(intel);
|
||||
|
||||
|
@@ -122,9 +122,7 @@ upload_sf_state(struct brw_context *brw)
|
||||
int i;
|
||||
/* _NEW_BUFFER */
|
||||
bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);
|
||||
bool multisampled_fbo = false;
|
||||
if (ctx->DrawBuffer->_ColorDrawBuffers[0])
|
||||
multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
|
||||
bool multisampled_fbo = ctx->DrawBuffer->Visual.sampleBuffers;
|
||||
|
||||
int attr = 0, input_index = 0;
|
||||
int urb_entry_read_offset = 1;
|
||||
|
@@ -98,11 +98,9 @@ upload_wm_state(struct brw_context *brw)
|
||||
const struct brw_fragment_program *fp =
|
||||
brw_fragment_program_const(brw->fragment_program);
|
||||
uint32_t dw2, dw4, dw5, dw6;
|
||||
bool multisampled_fbo = false;
|
||||
|
||||
/* _NEW_BUFFERS */
|
||||
if (ctx->DrawBuffer->_ColorDrawBuffers[0])
|
||||
multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
|
||||
bool multisampled_fbo = ctx->DrawBuffer->Visual.sampleBuffers;
|
||||
|
||||
/* CACHE_NEW_WM_PROG */
|
||||
if (brw->wm.prog_data->nr_params == 0) {
|
||||
|
@@ -161,9 +161,7 @@ upload_sf_state(struct brw_context *brw)
|
||||
float point_size;
|
||||
/* _NEW_BUFFERS */
|
||||
bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);
|
||||
bool multisampled_fbo = false;
|
||||
if (ctx->DrawBuffer->_ColorDrawBuffers[0])
|
||||
multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
|
||||
bool multisampled_fbo = ctx->DrawBuffer->Visual.sampleBuffers;
|
||||
|
||||
dw1 = GEN6_SF_STATISTICS_ENABLE |
|
||||
GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
|
||||
|
@@ -39,12 +39,10 @@ upload_wm_state(struct brw_context *brw)
|
||||
const struct brw_fragment_program *fp =
|
||||
brw_fragment_program_const(brw->fragment_program);
|
||||
bool writes_depth = false;
|
||||
bool multisampled_fbo = false;
|
||||
uint32_t dw1, dw2;
|
||||
|
||||
/* _NEW_BUFFERS */
|
||||
if (ctx->DrawBuffer->_ColorDrawBuffers[0])
|
||||
multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
|
||||
bool multisampled_fbo = ctx->DrawBuffer->Visual.sampleBuffers;
|
||||
|
||||
dw1 = dw2 = 0;
|
||||
dw1 |= GEN7_WM_STATISTICS_ENABLE;
|
||||
|
@@ -409,8 +409,28 @@ gen7_create_constant_surface(struct brw_context *brw,
|
||||
static void
|
||||
gen7_update_null_renderbuffer_surface(struct brw_context *brw, unsigned unit)
|
||||
{
|
||||
/* From the Ivy bridge PRM, Vol4 Part1 p62 (Surface Type: Programming
|
||||
* Notes):
|
||||
*
|
||||
* A null surface is used in instances where an actual surface is not
|
||||
* bound. When a write message is generated to a null surface, no
|
||||
* actual surface is written to. When a read message (including any
|
||||
* sampling engine message) is generated to a null surface, the result
|
||||
* is all zeros. Note that a null surface type is allowed to be used
|
||||
* with all messages, even if it is not specificially indicated as
|
||||
* supported. All of the remaining fields in surface state are ignored
|
||||
* for null surfaces, with the following exceptions: Width, Height,
|
||||
* Depth, LOD, and Render Target View Extent fields must match the
|
||||
* depth buffer’s corresponding state for all render target surfaces,
|
||||
* including null.
|
||||
*/
|
||||
struct intel_context *intel = &brw->intel;
|
||||
struct gl_context *ctx = &intel->ctx;
|
||||
struct gen7_surface_state *surf;
|
||||
|
||||
/* _NEW_BUFFERS */
|
||||
const struct gl_framebuffer *fb = ctx->DrawBuffer;
|
||||
|
||||
surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
|
||||
sizeof(*surf), 32, &brw->wm.surf_offset[unit]);
|
||||
memset(surf, 0, sizeof(*surf));
|
||||
@@ -418,6 +438,15 @@ gen7_update_null_renderbuffer_surface(struct brw_context *brw, unsigned unit)
|
||||
surf->ss0.surface_type = BRW_SURFACE_NULL;
|
||||
surf->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
|
||||
|
||||
surf->ss2.width = fb->Width - 1;
|
||||
surf->ss2.height = fb->Height - 1;
|
||||
|
||||
/* From the Ivy bridge PRM, Vol4 Part1 p65 (Tiled Surface: Programming Notes):
|
||||
*
|
||||
* If Surface Type is SURFTYPE_NULL, this field must be TRUE.
|
||||
*/
|
||||
gen7_set_surface_tiling(surf, I915_TILING_Y);
|
||||
|
||||
gen7_check_surface_setup(surf, true /* is_render_target */);
|
||||
}
|
||||
|
||||
|
@@ -44,7 +44,7 @@ intelInitExtensions(struct gl_context *ctx)
|
||||
|
||||
ctx->Extensions.ARB_draw_elements_base_vertex = true;
|
||||
ctx->Extensions.ARB_explicit_attrib_location = true;
|
||||
if (ctx->API == API_OPENGL)
|
||||
if (IS_CTX_DESKTOP_GL(ctx))
|
||||
ctx->Extensions.ARB_framebuffer_object = true;
|
||||
ctx->Extensions.ARB_half_float_pixel = true;
|
||||
ctx->Extensions.ARB_map_buffer_range = true;
|
||||
@@ -92,7 +92,6 @@ intelInitExtensions(struct gl_context *ctx)
|
||||
#endif
|
||||
ctx->Extensions.OES_draw_texture = true;
|
||||
ctx->Extensions.OES_compressed_ETC1_RGB8_texture = true;
|
||||
ctx->Extensions.ARB_texture_rgb10_a2ui = true;
|
||||
|
||||
if (intel->gen >= 6)
|
||||
ctx->Const.GLSLVersion = 130;
|
||||
|
@@ -193,8 +193,10 @@ quantize_num_samples(struct intel_context *intel, unsigned num_samples)
|
||||
else
|
||||
return 0;
|
||||
case 7:
|
||||
/* TODO: Gen7 supports only 4x multisampling at the moment. */
|
||||
if (num_samples > 0)
|
||||
/* Gen7 supports 4x and 8x multisampling. */
|
||||
if (num_samples > 4)
|
||||
return 8;
|
||||
else if (num_samples > 0)
|
||||
return 4;
|
||||
else
|
||||
return 0;
|
||||
|
@@ -37,7 +37,7 @@
|
||||
|
||||
#include "main/enums.h"
|
||||
#include "main/formats.h"
|
||||
#include "main/image.h"
|
||||
#include "main/glformats.h"
|
||||
#include "main/texcompress_etc.h"
|
||||
#include "main/teximage.h"
|
||||
|
||||
@@ -672,7 +672,30 @@ intel_miptree_alloc_mcs(struct intel_context *intel,
|
||||
{
|
||||
assert(mt->mcs_mt == NULL);
|
||||
assert(intel->gen >= 7); /* MCS only used on Gen7+ */
|
||||
assert(num_samples == 4); /* TODO: support 8x MSAA */
|
||||
|
||||
/* Choose the correct format for the MCS buffer. All that really matters
|
||||
* is that we allocate the right buffer size, since we'll always be
|
||||
* accessing this miptree using MCS-specific hardware mechanisms, which
|
||||
* infer the correct format based on num_samples.
|
||||
*/
|
||||
gl_format format;
|
||||
switch (num_samples) {
|
||||
case 4:
|
||||
/* 8 bits/pixel are required for MCS data when using 4x MSAA (2 bits for
|
||||
* each sample).
|
||||
*/
|
||||
format = MESA_FORMAT_A8;
|
||||
break;
|
||||
case 8:
|
||||
/* 32 bits/pixel are required for MCS data when using 8x MSAA (3 bits
|
||||
* for each sample, plus 8 padding bits).
|
||||
*/
|
||||
format = MESA_FORMAT_R_UINT32;
|
||||
break;
|
||||
default:
|
||||
assert(!"Unrecognized sample count in intel_miptree_alloc_mcs");
|
||||
break;
|
||||
};
|
||||
|
||||
/* From the Ivy Bridge PRM, Vol4 Part1 p76, "MCS Base Address":
|
||||
*
|
||||
@@ -684,7 +707,7 @@ intel_miptree_alloc_mcs(struct intel_context *intel,
|
||||
*/
|
||||
mt->mcs_mt = intel_miptree_create(intel,
|
||||
mt->target,
|
||||
MESA_FORMAT_A8,
|
||||
format,
|
||||
mt->first_level,
|
||||
mt->last_level,
|
||||
mt->width0,
|
||||
|
@@ -696,10 +696,10 @@ intelCreateContext(gl_api api,
|
||||
if (ctx->VersionMajor > major_version
|
||||
|| (ctx->VersionMajor == major_version
|
||||
&& ctx->VersionMinor >= minor_version)) {
|
||||
*error = __DRI_CTX_ERROR_BAD_VERSION;
|
||||
return true;
|
||||
}
|
||||
|
||||
*error = __DRI_CTX_ERROR_BAD_VERSION;
|
||||
intelDestroyContext(driContextPriv);
|
||||
} else {
|
||||
*error = __DRI_CTX_ERROR_NO_MEMORY;
|
||||
|
@@ -29,6 +29,7 @@
|
||||
#include "nouveau_util.h"
|
||||
|
||||
#include "main/bufferobj.h"
|
||||
#include "main/glformats.h"
|
||||
#include "main/image.h"
|
||||
|
||||
/* Arbitrary pushbuf length we can assume we can get with a single
|
||||
|
@@ -33,10 +33,10 @@ AM_CPPFLAGS = \
|
||||
$(DEFINES)
|
||||
|
||||
if HAVE_X11_DRIVER
|
||||
lib_LTLIBRARIES = libGL.la
|
||||
lib_LTLIBRARIES = lib@GL_LIB@.la
|
||||
endif
|
||||
|
||||
libGL_la_SOURCES = \
|
||||
lib@GL_LIB@_la_SOURCES = \
|
||||
glxapi.h \
|
||||
glxheader.h \
|
||||
xfonts.h \
|
||||
@@ -55,20 +55,20 @@ GL_MAJOR = 1
|
||||
GL_MINOR = 6
|
||||
GL_PATCH = 0
|
||||
|
||||
libGL_la_LIBADD = \
|
||||
lib@GL_LIB@_la_LIBADD = \
|
||||
$(top_builddir)/src/mesa/libmesa.la \
|
||||
$(top_builddir)/src/mapi/glapi/libglapi.la
|
||||
libGL_la_LDFLAGS = \
|
||||
lib@GL_LIB@_la_LDFLAGS = \
|
||||
-version-number $(GL_MAJOR):$(GL_MINOR):$(GL_PATCH) \
|
||||
$(GL_LIB_DEPS)
|
||||
|
||||
if HAVE_SHARED_GLAPI
|
||||
libGL_la_LDFLAGS += -L$(top_builddir)/$(LIB_DIR) -l$(GLAPI_LIB)
|
||||
lib@GL_LIB@_la_LDFLAGS += -L$(top_builddir)/$(LIB_DIR) -l$(GLAPI_LIB)
|
||||
endif
|
||||
|
||||
# Provide compatibility with scripts for the old Mesa build system for
|
||||
# a while by putting a link to the driver into /lib of the build tree.
|
||||
all-local: libGL.la
|
||||
all-local: lib@GL_LIB@.la
|
||||
$(MKDIR_P) $(top_builddir)/$(LIB_DIR);
|
||||
ln -f .libs/libGL.so.$(GL_MAJOR).$(GL_MINOR).$(GL_PATCH) $(top_builddir)/$(LIB_DIR)/libGL.so.1
|
||||
ln -sf libGL.so.1 $(top_builddir)/$(LIB_DIR)/libGL.so
|
||||
ln -f .libs/lib@GL_LIB@.so.$(GL_MAJOR).$(GL_MINOR).$(GL_PATCH) $(top_builddir)/$(LIB_DIR)/lib@GL_LIB@.so.$(GL_MAJOR)
|
||||
ln -sf lib@GL_LIB@.so.$(GL_MAJOR) $(top_builddir)/$(LIB_DIR)/lib@GL_LIB@.so
|
||||
|
@@ -120,7 +120,7 @@
|
||||
* \param exec dispatch table.
|
||||
*/
|
||||
struct _glapi_table *
|
||||
_mesa_create_exec_table(void)
|
||||
_mesa_create_exec_table(struct gl_context *ctx)
|
||||
{
|
||||
struct _glapi_table *exec;
|
||||
|
||||
@@ -133,7 +133,10 @@ _mesa_create_exec_table(void)
|
||||
#endif
|
||||
|
||||
/* load the dispatch slots we understand */
|
||||
SET_AlphaFunc(exec, _mesa_AlphaFunc);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_AlphaFunc(exec, _mesa_AlphaFunc);
|
||||
}
|
||||
|
||||
SET_BlendFunc(exec, _mesa_BlendFunc);
|
||||
SET_Clear(exec, _mesa_Clear);
|
||||
SET_ClearColor(exec, _mesa_ClearColor);
|
||||
@@ -149,42 +152,62 @@ _mesa_create_exec_table(void)
|
||||
SET_Finish(exec, _mesa_Finish);
|
||||
SET_Flush(exec, _mesa_Flush);
|
||||
SET_FrontFace(exec, _mesa_FrontFace);
|
||||
SET_Frustum(exec, _mesa_Frustum);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_Frustum(exec, _mesa_Frustum);
|
||||
}
|
||||
SET_GetError(exec, _mesa_GetError);
|
||||
SET_GetFloatv(exec, _mesa_GetFloatv);
|
||||
SET_GetString(exec, _mesa_GetString);
|
||||
SET_LineStipple(exec, _mesa_LineStipple);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_LineStipple(exec, _mesa_LineStipple);
|
||||
}
|
||||
SET_LineWidth(exec, _mesa_LineWidth);
|
||||
SET_LoadIdentity(exec, _mesa_LoadIdentity);
|
||||
SET_LoadMatrixf(exec, _mesa_LoadMatrixf);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_LoadIdentity(exec, _mesa_LoadIdentity);
|
||||
SET_LoadMatrixf(exec, _mesa_LoadMatrixf);
|
||||
}
|
||||
SET_LogicOp(exec, _mesa_LogicOp);
|
||||
SET_MatrixMode(exec, _mesa_MatrixMode);
|
||||
SET_MultMatrixf(exec, _mesa_MultMatrixf);
|
||||
SET_Ortho(exec, _mesa_Ortho);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_MatrixMode(exec, _mesa_MatrixMode);
|
||||
SET_MultMatrixf(exec, _mesa_MultMatrixf);
|
||||
SET_Ortho(exec, _mesa_Ortho);
|
||||
}
|
||||
SET_PixelStorei(exec, _mesa_PixelStorei);
|
||||
SET_PopMatrix(exec, _mesa_PopMatrix);
|
||||
SET_PushMatrix(exec, _mesa_PushMatrix);
|
||||
SET_Rotatef(exec, _mesa_Rotatef);
|
||||
SET_Scalef(exec, _mesa_Scalef);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_PopMatrix(exec, _mesa_PopMatrix);
|
||||
SET_PushMatrix(exec, _mesa_PushMatrix);
|
||||
SET_Rotatef(exec, _mesa_Rotatef);
|
||||
SET_Scalef(exec, _mesa_Scalef);
|
||||
}
|
||||
SET_Scissor(exec, _mesa_Scissor);
|
||||
SET_ShadeModel(exec, _mesa_ShadeModel);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_ShadeModel(exec, _mesa_ShadeModel);
|
||||
}
|
||||
SET_StencilFunc(exec, _mesa_StencilFunc);
|
||||
SET_StencilMask(exec, _mesa_StencilMask);
|
||||
SET_StencilOp(exec, _mesa_StencilOp);
|
||||
SET_TexEnvfv(exec, _mesa_TexEnvfv);
|
||||
SET_TexEnvi(exec, _mesa_TexEnvi);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_TexEnvfv(exec, _mesa_TexEnvfv);
|
||||
SET_TexEnvi(exec, _mesa_TexEnvi);
|
||||
}
|
||||
SET_TexImage2D(exec, _mesa_TexImage2D);
|
||||
SET_TexParameteri(exec, _mesa_TexParameteri);
|
||||
SET_Translatef(exec, _mesa_Translatef);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_Translatef(exec, _mesa_Translatef);
|
||||
}
|
||||
SET_Viewport(exec, _mesa_Viewport);
|
||||
|
||||
_mesa_init_accum_dispatch(exec);
|
||||
_mesa_init_dlist_dispatch(exec);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
_mesa_init_accum_dispatch(exec);
|
||||
_mesa_init_dlist_dispatch(exec);
|
||||
}
|
||||
|
||||
SET_ClearDepth(exec, _mesa_ClearDepth);
|
||||
SET_ClearIndex(exec, _mesa_ClearIndex);
|
||||
SET_ClipPlane(exec, _mesa_ClipPlane);
|
||||
SET_ColorMaterial(exec, _mesa_ColorMaterial);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_ClearIndex(exec, _mesa_ClearIndex);
|
||||
SET_ClipPlane(exec, _mesa_ClipPlane);
|
||||
SET_ColorMaterial(exec, _mesa_ColorMaterial);
|
||||
}
|
||||
SET_DepthFunc(exec, _mesa_DepthFunc);
|
||||
SET_DepthMask(exec, _mesa_DepthMask);
|
||||
SET_DepthRange(exec, _mesa_DepthRange);
|
||||
@@ -192,43 +215,53 @@ _mesa_create_exec_table(void)
|
||||
_mesa_init_drawpix_dispatch(exec);
|
||||
_mesa_init_feedback_dispatch(exec);
|
||||
|
||||
SET_FogCoordPointerEXT(exec, _mesa_FogCoordPointerEXT);
|
||||
SET_Fogf(exec, _mesa_Fogf);
|
||||
SET_Fogfv(exec, _mesa_Fogfv);
|
||||
SET_Fogi(exec, _mesa_Fogi);
|
||||
SET_Fogiv(exec, _mesa_Fogiv);
|
||||
SET_GetClipPlane(exec, _mesa_GetClipPlane);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_FogCoordPointerEXT(exec, _mesa_FogCoordPointerEXT);
|
||||
SET_Fogf(exec, _mesa_Fogf);
|
||||
SET_Fogfv(exec, _mesa_Fogfv);
|
||||
SET_Fogi(exec, _mesa_Fogi);
|
||||
SET_Fogiv(exec, _mesa_Fogiv);
|
||||
SET_GetClipPlane(exec, _mesa_GetClipPlane);
|
||||
}
|
||||
SET_GetBooleanv(exec, _mesa_GetBooleanv);
|
||||
SET_GetDoublev(exec, _mesa_GetDoublev);
|
||||
SET_GetIntegerv(exec, _mesa_GetIntegerv);
|
||||
SET_GetLightfv(exec, _mesa_GetLightfv);
|
||||
SET_GetLightiv(exec, _mesa_GetLightiv);
|
||||
SET_GetMaterialfv(exec, _mesa_GetMaterialfv);
|
||||
SET_GetMaterialiv(exec, _mesa_GetMaterialiv);
|
||||
SET_GetPolygonStipple(exec, _mesa_GetPolygonStipple);
|
||||
SET_GetTexEnvfv(exec, _mesa_GetTexEnvfv);
|
||||
SET_GetTexEnviv(exec, _mesa_GetTexEnviv);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_GetLightfv(exec, _mesa_GetLightfv);
|
||||
SET_GetLightiv(exec, _mesa_GetLightiv);
|
||||
SET_GetMaterialfv(exec, _mesa_GetMaterialfv);
|
||||
SET_GetMaterialiv(exec, _mesa_GetMaterialiv);
|
||||
SET_GetPolygonStipple(exec, _mesa_GetPolygonStipple);
|
||||
SET_GetTexEnvfv(exec, _mesa_GetTexEnvfv);
|
||||
SET_GetTexEnviv(exec, _mesa_GetTexEnviv);
|
||||
}
|
||||
SET_GetTexLevelParameterfv(exec, _mesa_GetTexLevelParameterfv);
|
||||
SET_GetTexLevelParameteriv(exec, _mesa_GetTexLevelParameteriv);
|
||||
SET_GetTexParameterfv(exec, _mesa_GetTexParameterfv);
|
||||
SET_GetTexParameteriv(exec, _mesa_GetTexParameteriv);
|
||||
SET_GetTexImage(exec, _mesa_GetTexImage);
|
||||
SET_Hint(exec, _mesa_Hint);
|
||||
SET_IndexMask(exec, _mesa_IndexMask);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_IndexMask(exec, _mesa_IndexMask);
|
||||
}
|
||||
SET_IsEnabled(exec, _mesa_IsEnabled);
|
||||
SET_LightModelf(exec, _mesa_LightModelf);
|
||||
SET_LightModelfv(exec, _mesa_LightModelfv);
|
||||
SET_LightModeli(exec, _mesa_LightModeli);
|
||||
SET_LightModeliv(exec, _mesa_LightModeliv);
|
||||
SET_Lightf(exec, _mesa_Lightf);
|
||||
SET_Lightfv(exec, _mesa_Lightfv);
|
||||
SET_Lighti(exec, _mesa_Lighti);
|
||||
SET_Lightiv(exec, _mesa_Lightiv);
|
||||
SET_LoadMatrixd(exec, _mesa_LoadMatrixd);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_LightModelf(exec, _mesa_LightModelf);
|
||||
SET_LightModelfv(exec, _mesa_LightModelfv);
|
||||
SET_LightModeli(exec, _mesa_LightModeli);
|
||||
SET_LightModeliv(exec, _mesa_LightModeliv);
|
||||
SET_Lightf(exec, _mesa_Lightf);
|
||||
SET_Lightfv(exec, _mesa_Lightfv);
|
||||
SET_Lighti(exec, _mesa_Lighti);
|
||||
SET_Lightiv(exec, _mesa_Lightiv);
|
||||
SET_LoadMatrixd(exec, _mesa_LoadMatrixd);
|
||||
}
|
||||
|
||||
_mesa_init_eval_dispatch(exec);
|
||||
|
||||
SET_MultMatrixd(exec, _mesa_MultMatrixd);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_MultMatrixd(exec, _mesa_MultMatrixd);
|
||||
}
|
||||
|
||||
_mesa_init_pixel_dispatch(exec);
|
||||
|
||||
@@ -236,17 +269,21 @@ _mesa_create_exec_table(void)
|
||||
SET_PointSize(exec, _mesa_PointSize);
|
||||
SET_PolygonMode(exec, _mesa_PolygonMode);
|
||||
SET_PolygonOffset(exec, _mesa_PolygonOffset);
|
||||
SET_PolygonStipple(exec, _mesa_PolygonStipple);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_PolygonStipple(exec, _mesa_PolygonStipple);
|
||||
}
|
||||
|
||||
_mesa_init_attrib_dispatch(exec);
|
||||
_mesa_init_rastpos_dispatch(exec);
|
||||
|
||||
SET_ReadPixels(exec, _mesa_ReadPixels);
|
||||
SET_Rotated(exec, _mesa_Rotated);
|
||||
SET_Scaled(exec, _mesa_Scaled);
|
||||
SET_SecondaryColorPointerEXT(exec, _mesa_SecondaryColorPointerEXT);
|
||||
SET_TexEnvf(exec, _mesa_TexEnvf);
|
||||
SET_TexEnviv(exec, _mesa_TexEnviv);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_Rotated(exec, _mesa_Rotated);
|
||||
SET_Scaled(exec, _mesa_Scaled);
|
||||
SET_SecondaryColorPointerEXT(exec, _mesa_SecondaryColorPointerEXT);
|
||||
SET_TexEnvf(exec, _mesa_TexEnvf);
|
||||
SET_TexEnviv(exec, _mesa_TexEnviv);
|
||||
}
|
||||
|
||||
_mesa_init_texgen_dispatch(exec);
|
||||
|
||||
@@ -254,32 +291,42 @@ _mesa_create_exec_table(void)
|
||||
SET_TexParameterf(exec, _mesa_TexParameterf);
|
||||
SET_TexParameterfv(exec, _mesa_TexParameterfv);
|
||||
SET_TexParameteriv(exec, _mesa_TexParameteriv);
|
||||
SET_Translated(exec, _mesa_Translated);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_Translated(exec, _mesa_Translated);
|
||||
}
|
||||
|
||||
/* 1.1 */
|
||||
SET_BindTexture(exec, _mesa_BindTexture);
|
||||
SET_DeleteTextures(exec, _mesa_DeleteTextures);
|
||||
SET_GenTextures(exec, _mesa_GenTextures);
|
||||
#if _HAVE_FULL_GL
|
||||
SET_AreTexturesResident(exec, _mesa_AreTexturesResident);
|
||||
SET_ColorPointer(exec, _mesa_ColorPointer);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_AreTexturesResident(exec, _mesa_AreTexturesResident);
|
||||
SET_ColorPointer(exec, _mesa_ColorPointer);
|
||||
}
|
||||
SET_CopyTexImage1D(exec, _mesa_CopyTexImage1D);
|
||||
SET_CopyTexImage2D(exec, _mesa_CopyTexImage2D);
|
||||
SET_CopyTexSubImage1D(exec, _mesa_CopyTexSubImage1D);
|
||||
SET_CopyTexSubImage2D(exec, _mesa_CopyTexSubImage2D);
|
||||
SET_DisableClientState(exec, _mesa_DisableClientState);
|
||||
SET_EdgeFlagPointer(exec, _mesa_EdgeFlagPointer);
|
||||
SET_EnableClientState(exec, _mesa_EnableClientState);
|
||||
SET_GetPointerv(exec, _mesa_GetPointerv);
|
||||
SET_IndexPointer(exec, _mesa_IndexPointer);
|
||||
SET_InterleavedArrays(exec, _mesa_InterleavedArrays);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_DisableClientState(exec, _mesa_DisableClientState);
|
||||
SET_EdgeFlagPointer(exec, _mesa_EdgeFlagPointer);
|
||||
SET_EnableClientState(exec, _mesa_EnableClientState);
|
||||
SET_GetPointerv(exec, _mesa_GetPointerv);
|
||||
SET_IndexPointer(exec, _mesa_IndexPointer);
|
||||
SET_InterleavedArrays(exec, _mesa_InterleavedArrays);
|
||||
}
|
||||
SET_IsTexture(exec, _mesa_IsTexture);
|
||||
SET_NormalPointer(exec, _mesa_NormalPointer);
|
||||
SET_PrioritizeTextures(exec, _mesa_PrioritizeTextures);
|
||||
SET_TexCoordPointer(exec, _mesa_TexCoordPointer);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_NormalPointer(exec, _mesa_NormalPointer);
|
||||
SET_PrioritizeTextures(exec, _mesa_PrioritizeTextures);
|
||||
SET_TexCoordPointer(exec, _mesa_TexCoordPointer);
|
||||
}
|
||||
SET_TexSubImage1D(exec, _mesa_TexSubImage1D);
|
||||
SET_TexSubImage2D(exec, _mesa_TexSubImage2D);
|
||||
SET_VertexPointer(exec, _mesa_VertexPointer);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_VertexPointer(exec, _mesa_VertexPointer);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* 1.2 */
|
||||
@@ -327,31 +374,37 @@ _mesa_create_exec_table(void)
|
||||
|
||||
/* 11. GL_EXT_histogram */
|
||||
#if 0
|
||||
SET_GetHistogramEXT(exec, _mesa_GetHistogram);
|
||||
SET_GetHistogramParameterfvEXT(exec, _mesa_GetHistogramParameterfv);
|
||||
SET_GetHistogramParameterivEXT(exec, _mesa_GetHistogramParameteriv);
|
||||
SET_GetMinmaxEXT(exec, _mesa_GetMinmax);
|
||||
SET_GetMinmaxParameterfvEXT(exec, _mesa_GetMinmaxParameterfv);
|
||||
SET_GetMinmaxParameterivEXT(exec, _mesa_GetMinmaxParameteriv);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_GetHistogramEXT(exec, _mesa_GetHistogram);
|
||||
SET_GetHistogramParameterfvEXT(exec, _mesa_GetHistogramParameterfv);
|
||||
SET_GetHistogramParameterivEXT(exec, _mesa_GetHistogramParameteriv);
|
||||
SET_GetMinmaxEXT(exec, _mesa_GetMinmax);
|
||||
SET_GetMinmaxParameterfvEXT(exec, _mesa_GetMinmaxParameterfv);
|
||||
SET_GetMinmaxParameterivEXT(exec, _mesa_GetMinmaxParameteriv);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* 14. SGI_color_table */
|
||||
#if 0
|
||||
SET_ColorTableSGI(exec, _mesa_ColorTable);
|
||||
SET_ColorSubTableSGI(exec, _mesa_ColorSubTable);
|
||||
SET_GetColorTableSGI(exec, _mesa_GetColorTable);
|
||||
SET_GetColorTableParameterfvSGI(exec, _mesa_GetColorTableParameterfv);
|
||||
SET_GetColorTableParameterivSGI(exec, _mesa_GetColorTableParameteriv);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_ColorTableSGI(exec, _mesa_ColorTable);
|
||||
SET_ColorSubTableSGI(exec, _mesa_ColorSubTable);
|
||||
SET_GetColorTableSGI(exec, _mesa_GetColorTable);
|
||||
SET_GetColorTableParameterfvSGI(exec, _mesa_GetColorTableParameterfv);
|
||||
SET_GetColorTableParameterivSGI(exec, _mesa_GetColorTableParameteriv);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* 30. GL_EXT_vertex_array */
|
||||
#if _HAVE_FULL_GL
|
||||
SET_ColorPointerEXT(exec, _mesa_ColorPointerEXT);
|
||||
SET_EdgeFlagPointerEXT(exec, _mesa_EdgeFlagPointerEXT);
|
||||
SET_IndexPointerEXT(exec, _mesa_IndexPointerEXT);
|
||||
SET_NormalPointerEXT(exec, _mesa_NormalPointerEXT);
|
||||
SET_TexCoordPointerEXT(exec, _mesa_TexCoordPointerEXT);
|
||||
SET_VertexPointerEXT(exec, _mesa_VertexPointerEXT);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_ColorPointerEXT(exec, _mesa_ColorPointerEXT);
|
||||
SET_EdgeFlagPointerEXT(exec, _mesa_EdgeFlagPointerEXT);
|
||||
SET_IndexPointerEXT(exec, _mesa_IndexPointerEXT);
|
||||
SET_NormalPointerEXT(exec, _mesa_NormalPointerEXT);
|
||||
SET_TexCoordPointerEXT(exec, _mesa_TexCoordPointerEXT);
|
||||
SET_VertexPointerEXT(exec, _mesa_VertexPointerEXT);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* 37. GL_EXT_blend_minmax */
|
||||
@@ -483,10 +536,12 @@ _mesa_create_exec_table(void)
|
||||
|
||||
/* ARB 3. GL_ARB_transpose_matrix */
|
||||
#if _HAVE_FULL_GL
|
||||
SET_LoadTransposeMatrixdARB(exec, _mesa_LoadTransposeMatrixdARB);
|
||||
SET_LoadTransposeMatrixfARB(exec, _mesa_LoadTransposeMatrixfARB);
|
||||
SET_MultTransposeMatrixdARB(exec, _mesa_MultTransposeMatrixdARB);
|
||||
SET_MultTransposeMatrixfARB(exec, _mesa_MultTransposeMatrixfARB);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_LoadTransposeMatrixdARB(exec, _mesa_LoadTransposeMatrixdARB);
|
||||
SET_LoadTransposeMatrixfARB(exec, _mesa_LoadTransposeMatrixfARB);
|
||||
SET_MultTransposeMatrixdARB(exec, _mesa_MultTransposeMatrixdARB);
|
||||
SET_MultTransposeMatrixfARB(exec, _mesa_MultTransposeMatrixfARB);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* ARB 5. GL_ARB_multisample */
|
||||
|
@@ -28,12 +28,13 @@
|
||||
|
||||
|
||||
struct _glapi_table;
|
||||
struct gl_context;
|
||||
|
||||
extern struct _glapi_table *
|
||||
_mesa_alloc_dispatch_table(int size);
|
||||
|
||||
extern struct _glapi_table *
|
||||
_mesa_create_exec_table(void);
|
||||
_mesa_create_exec_table(struct gl_context *ctx);
|
||||
|
||||
extern struct _glapi_table *
|
||||
_mesa_create_exec_table_es1(void);
|
||||
|
@@ -128,6 +128,7 @@ check_valid_to_render(struct gl_context *ctx, const char *function)
|
||||
|
||||
#if FEATURE_GL
|
||||
case API_OPENGL:
|
||||
case API_OPENGL_CORE:
|
||||
{
|
||||
const struct gl_shader_program *vsProg =
|
||||
ctx->Shader.CurrentVertexProgram;
|
||||
|
@@ -30,6 +30,7 @@
|
||||
|
||||
#include "glheader.h"
|
||||
#include "mtypes.h"
|
||||
#include "glformats.h"
|
||||
|
||||
struct gl_context;
|
||||
|
||||
|
@@ -431,7 +431,7 @@ one_time_init( struct gl_context *ctx )
|
||||
* when an app is linked to libGLES*, there are not enough dynamic
|
||||
* entries.
|
||||
*/
|
||||
if (ctx->API == API_OPENGL)
|
||||
if (IS_CTX_DESKTOP_GL(ctx))
|
||||
_mesa_init_remap_table();
|
||||
}
|
||||
|
||||
@@ -626,7 +626,7 @@ _mesa_init_constants(struct gl_context *ctx)
|
||||
#endif
|
||||
|
||||
/* Shading language version */
|
||||
if (ctx->API == API_OPENGL) {
|
||||
if (IS_CTX_DESKTOP_GL(ctx)) {
|
||||
ctx->Const.GLSLVersion = 120;
|
||||
_mesa_override_glsl_version(ctx);
|
||||
}
|
||||
@@ -842,7 +842,10 @@ update_default_objects(struct gl_context *ctx)
|
||||
static int
|
||||
generic_nop(void)
|
||||
{
|
||||
_mesa_warning(NULL, "User called no-op dispatch function (an unsupported extension function?)");
|
||||
GET_CURRENT_CONTEXT(ctx);
|
||||
_mesa_error(ctx, GL_INVALID_OPERATION,
|
||||
"unsupported function called "
|
||||
"(unsupported extension or deprecated function?)");
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -959,7 +962,8 @@ _mesa_initialize_context(struct gl_context *ctx,
|
||||
switch (ctx->API) {
|
||||
#if FEATURE_GL
|
||||
case API_OPENGL:
|
||||
ctx->Exec = _mesa_create_exec_table();
|
||||
case API_OPENGL_CORE:
|
||||
ctx->Exec = _mesa_create_exec_table(ctx);
|
||||
break;
|
||||
#endif
|
||||
#if FEATURE_ES1
|
||||
@@ -1004,6 +1008,7 @@ _mesa_initialize_context(struct gl_context *ctx,
|
||||
|
||||
switch (ctx->API) {
|
||||
case API_OPENGL:
|
||||
case API_OPENGL_CORE:
|
||||
#if FEATURE_dlist
|
||||
ctx->Save = _mesa_create_save_table();
|
||||
if (!ctx->Save) {
|
||||
|
@@ -51,6 +51,7 @@
|
||||
#endif
|
||||
#include "framebuffer.h"
|
||||
#include "glapi/glapi.h"
|
||||
#include "glformats.h"
|
||||
#include "hash.h"
|
||||
#include "image.h"
|
||||
#include "light.h"
|
||||
|
@@ -41,7 +41,9 @@
|
||||
|
||||
enum {
|
||||
DISABLE = 0,
|
||||
GL = 1 << API_OPENGL,
|
||||
GLL = 1 << API_OPENGL,
|
||||
GLC = 1 << API_OPENGL_CORE,
|
||||
GL = (1 << API_OPENGL) | (1 << API_OPENGL_CORE),
|
||||
ES1 = 1 << API_OPENGLES,
|
||||
ES2 = 1 << API_OPENGLES2,
|
||||
};
|
||||
|
@@ -38,8 +38,8 @@
|
||||
#include "fbobject.h"
|
||||
#include "formats.h"
|
||||
#include "framebuffer.h"
|
||||
#include "glformats.h"
|
||||
#include "hash.h"
|
||||
#include "image.h"
|
||||
#include "macros.h"
|
||||
#include "mfeatures.h"
|
||||
#include "mtypes.h"
|
||||
@@ -164,10 +164,10 @@ get_framebuffer_target(struct gl_context *ctx, GLenum target)
|
||||
{
|
||||
switch (target) {
|
||||
case GL_DRAW_FRAMEBUFFER:
|
||||
return ctx->Extensions.EXT_framebuffer_blit && ctx->API == API_OPENGL
|
||||
return ctx->Extensions.EXT_framebuffer_blit && IS_CTX_DESKTOP_GL(ctx)
|
||||
? ctx->DrawBuffer : NULL;
|
||||
case GL_READ_FRAMEBUFFER:
|
||||
return ctx->Extensions.EXT_framebuffer_blit && ctx->API == API_OPENGL
|
||||
return ctx->Extensions.EXT_framebuffer_blit && IS_CTX_DESKTOP_GL(ctx)
|
||||
? ctx->ReadBuffer : NULL;
|
||||
case GL_FRAMEBUFFER_EXT:
|
||||
return ctx->DrawBuffer;
|
||||
@@ -221,7 +221,7 @@ _mesa_get_attachment(struct gl_context *ctx, struct gl_framebuffer *fb,
|
||||
}
|
||||
return &fb->Attachment[BUFFER_COLOR0 + i];
|
||||
case GL_DEPTH_STENCIL_ATTACHMENT:
|
||||
if (ctx->API != API_OPENGL)
|
||||
if (!IS_CTX_DESKTOP_GL(ctx))
|
||||
return NULL;
|
||||
/* fall-through */
|
||||
case GL_DEPTH_ATTACHMENT_EXT:
|
||||
@@ -817,7 +817,7 @@ _mesa_test_framebuffer_completeness(struct gl_context *ctx,
|
||||
}
|
||||
|
||||
#if FEATURE_GL
|
||||
if (ctx->API == API_OPENGL && !ctx->Extensions.ARB_ES2_compatibility) {
|
||||
if (IS_CTX_DESKTOP_GL(ctx) && !ctx->Extensions.ARB_ES2_compatibility) {
|
||||
/* Check that all DrawBuffers are present */
|
||||
for (j = 0; j < ctx->Const.MaxDrawBuffers; j++) {
|
||||
if (fb->ColorDrawBuffer[j] != GL_NONE) {
|
||||
@@ -2289,7 +2289,7 @@ _mesa_GetFramebufferAttachmentParameterivEXT(GLenum target, GLenum attachment,
|
||||
ASSERT_OUTSIDE_BEGIN_END(ctx);
|
||||
|
||||
/* The error differs in GL and GLES. */
|
||||
err = ctx->API == API_OPENGL ? GL_INVALID_OPERATION : GL_INVALID_ENUM;
|
||||
err = IS_CTX_DESKTOP_GL(ctx) ? GL_INVALID_OPERATION : GL_INVALID_ENUM;
|
||||
|
||||
buffer = get_framebuffer_target(ctx, target);
|
||||
if (!buffer) {
|
||||
@@ -2309,7 +2309,7 @@ _mesa_GetFramebufferAttachmentParameterivEXT(GLenum target, GLenum attachment,
|
||||
* OES_framebuffer_object spec refers to the EXT_framebuffer_object
|
||||
* spec.
|
||||
*/
|
||||
if (ctx->API != API_OPENGL || !ctx->Extensions.ARB_framebuffer_object) {
|
||||
if (!IS_CTX_DESKTOP_GL(ctx) || !ctx->Extensions.ARB_framebuffer_object) {
|
||||
_mesa_error(ctx, GL_INVALID_OPERATION,
|
||||
"glGetFramebufferAttachmentParameteriv(bound FBO = 0)");
|
||||
return;
|
||||
@@ -2357,7 +2357,7 @@ _mesa_GetFramebufferAttachmentParameterivEXT(GLenum target, GLenum attachment,
|
||||
}
|
||||
else {
|
||||
assert(att->Type == GL_NONE);
|
||||
if (ctx->API == API_OPENGL) {
|
||||
if (IS_CTX_DESKTOP_GL(ctx)) {
|
||||
*params = 0;
|
||||
} else {
|
||||
_mesa_error(ctx, GL_INVALID_ENUM,
|
||||
@@ -2632,6 +2632,116 @@ compatible_color_datatypes(gl_format srcFormat, gl_format dstFormat)
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Return the equivalent non-generic internal format.
|
||||
* This is useful for comparing whether two internal formats are semantically
|
||||
* equivalent.
|
||||
*/
|
||||
static GLenum
|
||||
get_nongeneric_internalformat(GLenum format)
|
||||
{
|
||||
switch (format) {
|
||||
/* GL 1.1 formats. */
|
||||
case 4:
|
||||
case GL_RGBA:
|
||||
return GL_RGBA8;
|
||||
|
||||
case 3:
|
||||
case GL_RGB:
|
||||
return GL_RGB8;
|
||||
|
||||
case 2:
|
||||
case GL_LUMINANCE_ALPHA:
|
||||
return GL_LUMINANCE8_ALPHA8;
|
||||
|
||||
case 1:
|
||||
case GL_LUMINANCE:
|
||||
return GL_LUMINANCE8;
|
||||
|
||||
case GL_ALPHA:
|
||||
return GL_ALPHA8;
|
||||
|
||||
case GL_INTENSITY:
|
||||
return GL_INTENSITY8;
|
||||
|
||||
/* GL_ARB_texture_rg */
|
||||
case GL_RED:
|
||||
return GL_R8;
|
||||
|
||||
case GL_RG:
|
||||
return GL_RG8;
|
||||
|
||||
/* GL_EXT_texture_sRGB */
|
||||
case GL_SRGB:
|
||||
return GL_SRGB8;
|
||||
|
||||
case GL_SRGB_ALPHA:
|
||||
return GL_SRGB8_ALPHA8;
|
||||
|
||||
case GL_SLUMINANCE:
|
||||
return GL_SLUMINANCE8;
|
||||
|
||||
case GL_SLUMINANCE_ALPHA:
|
||||
return GL_SLUMINANCE8_ALPHA8;
|
||||
|
||||
/* GL_EXT_texture_snorm */
|
||||
case GL_RGBA_SNORM:
|
||||
return GL_RGBA8_SNORM;
|
||||
|
||||
case GL_RGB_SNORM:
|
||||
return GL_RGB8_SNORM;
|
||||
|
||||
case GL_RG_SNORM:
|
||||
return GL_RG8_SNORM;
|
||||
|
||||
case GL_RED_SNORM:
|
||||
return GL_R8_SNORM;
|
||||
|
||||
case GL_LUMINANCE_ALPHA_SNORM:
|
||||
return GL_LUMINANCE8_ALPHA8_SNORM;
|
||||
|
||||
case GL_LUMINANCE_SNORM:
|
||||
return GL_LUMINANCE8_SNORM;
|
||||
|
||||
case GL_ALPHA_SNORM:
|
||||
return GL_ALPHA8_SNORM;
|
||||
|
||||
case GL_INTENSITY_SNORM:
|
||||
return GL_INTENSITY8_SNORM;
|
||||
|
||||
default:
|
||||
return format;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static GLboolean
|
||||
compatible_resolve_formats(const struct gl_renderbuffer *colorReadRb,
|
||||
const struct gl_renderbuffer *colorDrawRb)
|
||||
{
|
||||
/* The simple case where we know the backing formats are the same.
|
||||
*/
|
||||
if (colorReadRb->Format == colorDrawRb->Format) {
|
||||
return GL_TRUE;
|
||||
}
|
||||
|
||||
/* The Mesa formats are different, so we must check whether the internal
|
||||
* formats are compatible.
|
||||
*
|
||||
* Under some circumstances, the user may request e.g. two GL_RGBA8
|
||||
* textures and get two entirely different Mesa formats like RGBA8888 and
|
||||
* ARGB8888. Drivers behaving like that should be able to cope with
|
||||
* non-matching formats by themselves, because it's not the user's fault.
|
||||
*/
|
||||
if (get_nongeneric_internalformat(colorReadRb->InternalFormat) ==
|
||||
get_nongeneric_internalformat(colorDrawRb->InternalFormat)) {
|
||||
return GL_TRUE;
|
||||
}
|
||||
|
||||
return GL_FALSE;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Blit rectangular region, optionally from one framebuffer to another.
|
||||
*
|
||||
@@ -2798,7 +2908,7 @@ _mesa_BlitFramebufferEXT(GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
|
||||
/* color formats must match */
|
||||
if (colorReadRb &&
|
||||
colorDrawRb &&
|
||||
colorReadRb->Format != colorDrawRb->Format) {
|
||||
!compatible_resolve_formats(colorReadRb, colorDrawRb)) {
|
||||
_mesa_error(ctx, GL_INVALID_OPERATION,
|
||||
"glBlitFramebufferEXT(bad src/dst multisample pixel formats)");
|
||||
return;
|
||||
|
@@ -1572,7 +1572,7 @@ static void build_array_pointsize( struct tnl_program *p )
|
||||
|
||||
static void build_tnl_program( struct tnl_program *p )
|
||||
{
|
||||
/* Emit the program, starting with modelviewproject:
|
||||
/* Emit the program, starting with the modelview, projection transforms:
|
||||
*/
|
||||
build_hpos(p);
|
||||
|
||||
|
@@ -1604,11 +1604,6 @@ get_unpack_rgba_function(gl_format format)
|
||||
initialized = GL_TRUE;
|
||||
}
|
||||
|
||||
if (table[format] == NULL) {
|
||||
_mesa_problem(NULL, "unsupported unpack for format %s",
|
||||
_mesa_get_format_name(format));
|
||||
}
|
||||
|
||||
return table[format];
|
||||
}
|
||||
|
||||
|
@@ -517,6 +517,13 @@ _mesa_update_framebuffer_visual(struct gl_context *ctx,
|
||||
const GLenum baseFormat = _mesa_get_format_base_format(rb->Format);
|
||||
const gl_format fmt = rb->Format;
|
||||
|
||||
/* Grab samples and sampleBuffers from any attachment point (assuming
|
||||
* the framebuffer is complete, we'll get the same answer from all
|
||||
* attachments).
|
||||
*/
|
||||
fb->Visual.samples = rb->NumSamples;
|
||||
fb->Visual.sampleBuffers = rb->NumSamples > 0 ? 1 : 0;
|
||||
|
||||
if (_mesa_is_legal_color_format(ctx, baseFormat)) {
|
||||
fb->Visual.redBits = _mesa_get_format_bits(fmt, GL_RED_BITS);
|
||||
fb->Visual.greenBits = _mesa_get_format_bits(fmt, GL_GREEN_BITS);
|
||||
@@ -524,8 +531,6 @@ _mesa_update_framebuffer_visual(struct gl_context *ctx,
|
||||
fb->Visual.alphaBits = _mesa_get_format_bits(fmt, GL_ALPHA_BITS);
|
||||
fb->Visual.rgbBits = fb->Visual.redBits
|
||||
+ fb->Visual.greenBits + fb->Visual.blueBits;
|
||||
fb->Visual.samples = rb->NumSamples;
|
||||
fb->Visual.sampleBuffers = rb->NumSamples > 0 ? 1 : 0;
|
||||
if (_mesa_get_format_color_encoding(fmt) == GL_SRGB)
|
||||
fb->Visual.sRGBCapable = ctx->Extensions.EXT_framebuffer_sRGB;
|
||||
break;
|
||||
|
@@ -391,6 +391,7 @@ extra_NV_read_buffer_api_gl[] = {
|
||||
#define API_OPENGL_BIT (1 << API_OPENGL)
|
||||
#define API_OPENGLES_BIT (1 << API_OPENGLES)
|
||||
#define API_OPENGLES2_BIT (1 << API_OPENGLES2)
|
||||
#define API_OPENGL_CORE_BIT (1 << API_OPENGL_CORE)
|
||||
|
||||
/* This is the big table describing all the enums we accept in
|
||||
* glGet*v(). The table is partitioned into six parts: enums
|
||||
@@ -405,7 +406,9 @@ extra_NV_read_buffer_api_gl[] = {
|
||||
static const struct value_desc values[] = {
|
||||
/* Enums shared between OpenGL, GLES1 and GLES2 */
|
||||
{ 0, 0, TYPE_API_MASK,
|
||||
API_OPENGL_BIT | API_OPENGLES_BIT | API_OPENGLES2_BIT, NO_EXTRA},
|
||||
API_OPENGL_BIT | API_OPENGLES_BIT |API_OPENGLES2_BIT |
|
||||
API_OPENGL_CORE_BIT,
|
||||
NO_EXTRA},
|
||||
{ GL_ALPHA_BITS, BUFFER_INT(Visual.alphaBits), extra_new_buffers },
|
||||
{ GL_BLEND, CONTEXT_BIT0(Color.BlendEnabled), NO_EXTRA },
|
||||
{ GL_BLEND_SRC, CONTEXT_ENUM(Color.Blend[0].SrcRGB), NO_EXTRA },
|
||||
@@ -534,7 +537,7 @@ static const struct value_desc values[] = {
|
||||
|
||||
#if FEATURE_GL || FEATURE_ES1
|
||||
/* Enums in OpenGL and GLES1 */
|
||||
{ 0, 0, TYPE_API_MASK, API_OPENGL_BIT | API_OPENGLES_BIT, NO_EXTRA },
|
||||
{ 0, 0, TYPE_API_MASK, API_OPENGL_BIT | API_OPENGLES_BIT | API_OPENGL_CORE_BIT, NO_EXTRA },
|
||||
{ GL_MAX_LIGHTS, CONTEXT_INT(Const.MaxLights), NO_EXTRA },
|
||||
{ GL_LIGHT0, CONTEXT_BOOL(Light.Light[0].Enabled), NO_EXTRA },
|
||||
{ GL_LIGHT1, CONTEXT_BOOL(Light.Light[1].Enabled), NO_EXTRA },
|
||||
@@ -796,7 +799,7 @@ static const struct value_desc values[] = {
|
||||
|
||||
#if FEATURE_GL
|
||||
/* Remaining enums are only in OpenGL */
|
||||
{ 0, 0, TYPE_API_MASK, API_OPENGL_BIT, NO_EXTRA },
|
||||
{ 0, 0, TYPE_API_MASK, API_OPENGL_BIT | API_OPENGL_CORE_BIT, NO_EXTRA },
|
||||
{ GL_ACCUM_RED_BITS, BUFFER_INT(Visual.accumRedBits), NO_EXTRA },
|
||||
{ GL_ACCUM_GREEN_BITS, BUFFER_INT(Visual.accumGreenBits), NO_EXTRA },
|
||||
{ GL_ACCUM_BLUE_BITS, BUFFER_INT(Visual.accumBlueBits), NO_EXTRA },
|
||||
@@ -1887,7 +1890,7 @@ check_extra(struct gl_context *ctx, const char *func, const struct value_desc *d
|
||||
}
|
||||
break;
|
||||
case EXTRA_API_GL:
|
||||
if (ctx->API == API_OPENGL) {
|
||||
if (IS_CTX_DESKTOP_GL(ctx)) {
|
||||
total++;
|
||||
enabled++;
|
||||
}
|
||||
|
@@ -41,6 +41,7 @@ shading_language_version(struct gl_context *ctx)
|
||||
{
|
||||
switch (ctx->API) {
|
||||
case API_OPENGL:
|
||||
case API_OPENGL_CORE:
|
||||
if (!ctx->Extensions.ARB_shader_objects) {
|
||||
_mesa_error(ctx, GL_INVALID_ENUM, "glGetString");
|
||||
return (const GLubyte *) 0;
|
||||
|
File diff suppressed because it is too large
Load Diff
@@ -34,6 +34,21 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern GLboolean
|
||||
_mesa_type_is_packed(GLenum type);
|
||||
|
||||
extern GLint
|
||||
_mesa_sizeof_type( GLenum type );
|
||||
|
||||
extern GLint
|
||||
_mesa_sizeof_packed_type( GLenum type );
|
||||
|
||||
extern GLint
|
||||
_mesa_components_in_format( GLenum format );
|
||||
|
||||
extern GLint
|
||||
_mesa_bytes_per_pixel( GLenum format, GLenum type );
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_type_integer(GLenum type);
|
||||
|
||||
@@ -46,12 +61,43 @@ _mesa_is_enum_format_integer(GLenum format);
|
||||
extern GLboolean
|
||||
_mesa_is_enum_format_or_type_integer(GLenum format, GLenum type);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_color_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_depth_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_stencil_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_ycbcr_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_depthstencil_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_depth_or_stencil_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_dudv_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_compressed_format(struct gl_context *ctx, GLenum format);
|
||||
|
||||
extern GLenum
|
||||
_mesa_base_format_to_integer_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_base_format_has_channel(GLenum base_format, GLenum pname);
|
||||
|
||||
extern GLenum
|
||||
_mesa_error_check_format_and_type(const struct gl_context *ctx,
|
||||
GLenum format, GLenum type);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* GLFORMATS_H */
|
||||
|
||||
|
File diff suppressed because it is too large
Load Diff
@@ -38,52 +38,6 @@ _mesa_swap2( GLushort *p, GLuint n );
|
||||
extern void
|
||||
_mesa_swap4( GLuint *p, GLuint n );
|
||||
|
||||
extern GLboolean
|
||||
_mesa_type_is_packed(GLenum type);
|
||||
|
||||
extern GLint
|
||||
_mesa_sizeof_type( GLenum type );
|
||||
|
||||
extern GLint
|
||||
_mesa_sizeof_packed_type( GLenum type );
|
||||
|
||||
extern GLint
|
||||
_mesa_components_in_format( GLenum format );
|
||||
|
||||
extern GLint
|
||||
_mesa_bytes_per_pixel( GLenum format, GLenum type );
|
||||
|
||||
extern GLenum
|
||||
_mesa_error_check_format_and_type(const struct gl_context *ctx,
|
||||
GLenum format, GLenum type);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_color_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_depth_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_stencil_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_ycbcr_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_depthstencil_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_depth_or_stencil_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_dudv_format(GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_is_compressed_format(struct gl_context *ctx, GLenum format);
|
||||
|
||||
extern GLboolean
|
||||
_mesa_base_format_has_channel(GLenum base_format, GLenum pname);
|
||||
|
||||
extern GLintptr
|
||||
_mesa_image_offset( GLuint dimensions,
|
||||
const struct gl_pixelstore_attrib *packing,
|
||||
|
@@ -542,7 +542,7 @@ float
|
||||
_mesa_strtof( const char *s, char **end )
|
||||
{
|
||||
#if defined(_GNU_SOURCE) && !defined(__CYGWIN__) && !defined(__FreeBSD__) && \
|
||||
!defined(ANDROID) && !defined(__HAIKU__)
|
||||
!defined(ANDROID) && !defined(__HAIKU__) && !defined(__UCLIBC__)
|
||||
static locale_t loc = NULL;
|
||||
if (!loc) {
|
||||
loc = newlocale(LC_CTYPE_MASK, "C", NULL);
|
||||
|
@@ -119,7 +119,7 @@ typedef union { GLfloat f; GLint i; } fi_type;
|
||||
#define asinf(f) ((float) asin(f))
|
||||
#define atan2f(x,y) ((float) atan2(x,y))
|
||||
#define atanf(f) ((float) atan(f))
|
||||
#define cielf(f) ((float) ciel(f))
|
||||
#define ceilf(f) ((float) ceil(f))
|
||||
#define cosf(f) ((float) cos(f))
|
||||
#define coshf(f) ((float) cosh(f))
|
||||
#define expf(f) ((float) exp(f))
|
||||
|
@@ -29,6 +29,7 @@
|
||||
|
||||
#include "imports.h"
|
||||
#include "formats.h"
|
||||
#include "glformats.h"
|
||||
#include "mipmap.h"
|
||||
#include "mtypes.h"
|
||||
#include "teximage.h"
|
||||
|
@@ -3336,9 +3336,14 @@ typedef enum
|
||||
{
|
||||
API_OPENGL,
|
||||
API_OPENGLES,
|
||||
API_OPENGLES2
|
||||
API_OPENGLES2,
|
||||
API_OPENGL_CORE,
|
||||
} gl_api;
|
||||
|
||||
#define IS_CTX_IN2(ctx, api1, api2) ((ctx->API == api1) || (ctx->API == api2))
|
||||
#define IS_CTX_DESKTOP_GL(ctx) IS_CTX_IN2(ctx, API_OPENGL, API_OPENGL_CORE)
|
||||
#define IS_CTX_GLES(ctx) IS_CTX_IN2(ctx, API_OPENGLES, API_OPENGLES2)
|
||||
|
||||
/**
|
||||
* Driver-specific state flags.
|
||||
*
|
||||
|
@@ -462,7 +462,8 @@ get_type_min_max(GLenum type, GLfloat *min, GLfloat *max)
|
||||
}
|
||||
}
|
||||
|
||||
/* Customization of unsigned integer packing.
|
||||
/* Customization of integer packing. We always treat src as uint, and can pack dst
|
||||
* as any integer type/format combo.
|
||||
*/
|
||||
#define SRC_TYPE GLuint
|
||||
|
||||
@@ -474,14 +475,6 @@ get_type_min_max(GLenum type, GLfloat *min, GLfloat *max)
|
||||
#undef SRC_CONVERT
|
||||
#undef FN_NAME
|
||||
|
||||
#define DST_TYPE GLint
|
||||
#define SRC_CONVERT(x) MIN2(x, 0x7fffffff)
|
||||
#define FN_NAME pack_int_from_uint_rgba
|
||||
#include "pack_tmp.h"
|
||||
#undef DST_TYPE
|
||||
#undef SRC_CONVERT
|
||||
#undef FN_NAME
|
||||
|
||||
#define DST_TYPE GLushort
|
||||
#define SRC_CONVERT(x) MIN2(x, 0xffff)
|
||||
#define FN_NAME pack_ushort_from_uint_rgba
|
||||
@@ -514,21 +507,18 @@ get_type_min_max(GLenum type, GLfloat *min, GLfloat *max)
|
||||
#undef SRC_CONVERT
|
||||
#undef FN_NAME
|
||||
|
||||
#undef SRC_TYPE
|
||||
|
||||
void
|
||||
_mesa_pack_rgba_span_from_uints(struct gl_context *ctx, GLuint n, GLuint rgba[][4],
|
||||
GLenum dstFormat, GLenum dstType,
|
||||
GLvoid *dstAddr)
|
||||
_mesa_pack_rgba_span_int(struct gl_context *ctx, GLuint n, GLuint rgba[][4],
|
||||
GLenum dstFormat, GLenum dstType,
|
||||
GLvoid *dstAddr)
|
||||
{
|
||||
GLuint i;
|
||||
|
||||
switch(dstType) {
|
||||
case GL_UNSIGNED_INT:
|
||||
pack_uint_from_uint_rgba(ctx, dstAddr, dstFormat, rgba, n);
|
||||
break;
|
||||
case GL_INT:
|
||||
pack_int_from_uint_rgba(ctx, dstAddr, dstFormat, rgba, n);
|
||||
/* No conversion necessary. */
|
||||
pack_uint_from_uint_rgba(ctx, dstAddr, dstFormat, rgba, n);
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT:
|
||||
pack_ushort_from_uint_rgba(ctx, dstAddr, dstFormat, rgba, n);
|
||||
@@ -542,633 +532,6 @@ _mesa_pack_rgba_span_from_uints(struct gl_context *ctx, GLuint n, GLuint rgba[][
|
||||
case GL_BYTE:
|
||||
pack_byte_from_uint_rgba(ctx, dstAddr, dstFormat, rgba, n);
|
||||
break;
|
||||
case GL_UNSIGNED_BYTE_3_3_2:
|
||||
if ((dstFormat == GL_RGB) || (dstFormat == GL_RGB_INTEGER)) {
|
||||
GLubyte *dst = (GLubyte *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 7) << 5)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 7) << 2)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 3) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_BYTE_2_3_3_REV:
|
||||
if ((dstFormat == GL_RGB) || (dstFormat == GL_RGB_INTEGER)) {
|
||||
GLubyte *dst = (GLubyte *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 7) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 7) << 3)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 3) << 6);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_5_6_5:
|
||||
if ((dstFormat == GL_RGB) || (dstFormat == GL_RGB_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 31) << 11)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 63) << 5)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_5_6_5_REV:
|
||||
if ((dstFormat == GL_RGB) || (dstFormat == GL_RGB_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 31) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 63) << 5)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) << 11);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_4_4_4_4:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 15) << 12)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 15) );
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 15) << 12)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 15) );
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 15) << 12)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 15) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_4_4_4_4_REV:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 15) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 15) << 12);
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 15) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 15) << 12);
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 15) )
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 15) << 12);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_5_5_5_1:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 31) << 11)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 6)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) << 1)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 1) );
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 31) << 11)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 6)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 31) << 1)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 1) );
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 31) << 11)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) << 6)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 1)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 1) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_1_5_5_5_REV:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 31) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 5)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) << 10)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 1) << 15);
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 31) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 5)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 31) << 10)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 1) << 15);
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 31) )
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) << 5)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 10)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 1) << 15);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_INT_8_8_8_8:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 255) << 24)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 255) );
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 255) << 24)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 255) );
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 255) << 24)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 255) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_INT_8_8_8_8_REV:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 255) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 255) << 24);
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 255) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 255) << 24);
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 255) )
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 255) << 24);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_INT_10_10_10_2:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 1023) << 22)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 12)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 1023) << 2)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 3) );
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 1023) << 22)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 12)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 1023) << 2)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 3) );
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 1023) << 22)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 1023) << 12)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 2)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 3) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_INT_2_10_10_10_REV:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 1023) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 10)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 1023) << 20)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 3) << 30);
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 1023) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 10)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 1023) << 20)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 3) << 30);
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 1023) )
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 1023) << 10)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 20)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 3) << 30);
|
||||
}
|
||||
}
|
||||
break;
|
||||
default:
|
||||
_mesa_problem(ctx,
|
||||
"Unsupported type (%s) for format (%s)",
|
||||
_mesa_lookup_enum_by_nr(dstType),
|
||||
_mesa_lookup_enum_by_nr(dstFormat));
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Customization of signed integer packing.
|
||||
*/
|
||||
#define SRC_TYPE GLint
|
||||
|
||||
#define DST_TYPE GLuint
|
||||
#define SRC_CONVERT(x) MAX2(x, 0)
|
||||
#define FN_NAME pack_uint_from_int_rgba
|
||||
#include "pack_tmp.h"
|
||||
#undef DST_TYPE
|
||||
#undef SRC_CONVERT
|
||||
#undef FN_NAME
|
||||
|
||||
#define DST_TYPE GLushort
|
||||
#define SRC_CONVERT(x) MAX2(x, 0)
|
||||
#define FN_NAME pack_ushort_from_int_rgba
|
||||
#include "pack_tmp.h"
|
||||
#undef DST_TYPE
|
||||
#undef SRC_CONVERT
|
||||
#undef FN_NAME
|
||||
|
||||
#define DST_TYPE GLshort
|
||||
#define SRC_CONVERT(x) CLAMP(x, -0x8000, 0x7fff)
|
||||
#define FN_NAME pack_short_from_int_rgba
|
||||
#include "pack_tmp.h"
|
||||
#undef DST_TYPE
|
||||
#undef SRC_CONVERT
|
||||
#undef FN_NAME
|
||||
|
||||
#define DST_TYPE GLubyte
|
||||
#define SRC_CONVERT(x) MAX2(x, 0)
|
||||
#define FN_NAME pack_ubyte_from_int_rgba
|
||||
#include "pack_tmp.h"
|
||||
#undef DST_TYPE
|
||||
#undef SRC_CONVERT
|
||||
#undef FN_NAME
|
||||
|
||||
#define DST_TYPE GLbyte
|
||||
#define SRC_CONVERT(x) CLAMP(x, -0x80, 0x7f)
|
||||
#define FN_NAME pack_byte_from_int_rgba
|
||||
#include "pack_tmp.h"
|
||||
#undef DST_TYPE
|
||||
#undef SRC_CONVERT
|
||||
#undef FN_NAME
|
||||
|
||||
#undef SRC_TYPE
|
||||
|
||||
void
|
||||
_mesa_pack_rgba_span_from_ints(struct gl_context *ctx, GLuint n, GLint rgba[][4],
|
||||
GLenum dstFormat, GLenum dstType,
|
||||
GLvoid *dstAddr)
|
||||
{
|
||||
GLuint i;
|
||||
|
||||
switch(dstType) {
|
||||
case GL_UNSIGNED_INT:
|
||||
pack_uint_from_int_rgba(ctx, dstAddr, dstFormat, rgba, n);
|
||||
break;
|
||||
case GL_INT:
|
||||
/* No conversion necessary. */
|
||||
pack_uint_from_uint_rgba(ctx, dstAddr, dstFormat, rgba, n);
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT:
|
||||
pack_ushort_from_int_rgba(ctx, dstAddr, dstFormat, rgba, n);
|
||||
break;
|
||||
case GL_SHORT:
|
||||
pack_short_from_int_rgba(ctx, dstAddr, dstFormat, rgba, n);
|
||||
break;
|
||||
case GL_UNSIGNED_BYTE:
|
||||
pack_ubyte_from_int_rgba(ctx, dstAddr, dstFormat, rgba, n);
|
||||
break;
|
||||
case GL_BYTE:
|
||||
pack_byte_from_int_rgba(ctx, dstAddr, dstFormat, rgba, n);
|
||||
break;
|
||||
case GL_UNSIGNED_BYTE_3_3_2:
|
||||
if ((dstFormat == GL_RGB) || (dstFormat == GL_RGB_INTEGER)) {
|
||||
GLubyte *dst = (GLubyte *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 7) << 5)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 7) << 2)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 3) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_BYTE_2_3_3_REV:
|
||||
if ((dstFormat == GL_RGB) || (dstFormat == GL_RGB_INTEGER)) {
|
||||
GLubyte *dst = (GLubyte *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 7) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 7) << 3)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 3) << 6);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_5_6_5:
|
||||
if ((dstFormat == GL_RGB) || (dstFormat == GL_RGB_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 31) << 11)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 63) << 5)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_5_6_5_REV:
|
||||
if ((dstFormat == GL_RGB) || (dstFormat == GL_RGB_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 31) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 63) << 5)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) << 11);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_4_4_4_4:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 15) << 12)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 15) );
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 15) << 12)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 15) );
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 15) << 12)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 15) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_4_4_4_4_REV:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 15) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 15) << 12);
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 15) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 15) << 12);
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 15) )
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 15) << 4)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 15) << 8)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 15) << 12);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_5_5_5_1:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 31) << 11)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 6)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) << 1)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 1) );
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 31) << 11)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 6)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 31) << 1)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 1) );
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 31) << 11)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) << 6)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 1)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 1) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_SHORT_1_5_5_5_REV:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 31) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 5)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) << 10)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 1) << 15);
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 31) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 5)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 31) << 10)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 1) << 15);
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLushort *dst = (GLushort *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 31) )
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 31) << 5)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 31) << 10)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 1) << 15);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_INT_8_8_8_8:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 255) << 24)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 255) );
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 255) << 24)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 255) );
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 255) << 24)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 255) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_INT_8_8_8_8_REV:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 255) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 255) << 24);
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 255) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 255) << 24);
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 255) )
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 255) << 8)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 255) << 16)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 255) << 24);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_INT_10_10_10_2:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 1023) << 22)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 12)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 1023) << 2)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 3) );
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 1023) << 22)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 12)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 1023) << 2)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 3) );
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 1023) << 22)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 1023) << 12)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 2)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 3) );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case GL_UNSIGNED_INT_2_10_10_10_REV:
|
||||
if ((dstFormat == GL_RGBA) || (dstFormat == GL_RGBA_INTEGER_EXT)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][RCOMP], 0, 1023) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 10)
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 1023) << 20)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 3) << 30);
|
||||
}
|
||||
}
|
||||
else if ((dstFormat == GL_BGRA) || (dstFormat == GL_BGRA_INTEGER)) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][BCOMP], 0, 1023) )
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 10)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 1023) << 20)
|
||||
| (CLAMP(rgba[i][ACOMP], 0, 3) << 30);
|
||||
}
|
||||
}
|
||||
else if (dstFormat == GL_ABGR_EXT) {
|
||||
GLuint *dst = (GLuint *) dstAddr;
|
||||
for (i=0;i<n;i++) {
|
||||
dst[i] = (CLAMP(rgba[i][ACOMP], 0, 1023) )
|
||||
| (CLAMP(rgba[i][BCOMP], 0, 1023) << 10)
|
||||
| (CLAMP(rgba[i][GCOMP], 0, 1023) << 20)
|
||||
| (CLAMP(rgba[i][RCOMP], 0, 3) << 30);
|
||||
}
|
||||
}
|
||||
break;
|
||||
default:
|
||||
_mesa_problem(ctx,
|
||||
"Unsupported type (%s) for format (%s)",
|
||||
|
@@ -145,15 +145,9 @@ _mesa_unpack_image(GLuint dimensions,
|
||||
|
||||
|
||||
void
|
||||
_mesa_pack_rgba_span_from_uints(struct gl_context *ctx, GLuint n, GLuint rgba[][4],
|
||||
GLenum dstFormat, GLenum dstType,
|
||||
GLvoid *dstAddr);
|
||||
|
||||
|
||||
void
|
||||
_mesa_pack_rgba_span_from_ints(struct gl_context *ctx, GLuint n, GLint rgba[][4],
|
||||
GLenum dstFormat, GLenum dstType,
|
||||
GLvoid *dstAddr);
|
||||
_mesa_pack_rgba_span_int(struct gl_context *ctx, GLuint n, GLuint rgba[][4],
|
||||
GLenum dstFormat, GLenum dstType,
|
||||
GLvoid *dstAddr);
|
||||
|
||||
|
||||
extern void
|
||||
|
@@ -32,6 +32,7 @@
|
||||
|
||||
#include "glheader.h"
|
||||
#include "bufferobj.h"
|
||||
#include "glformats.h"
|
||||
#include "image.h"
|
||||
#include "imports.h"
|
||||
#include "mtypes.h"
|
||||
|
@@ -321,8 +321,6 @@ slow_read_rgba_pixels( struct gl_context *ctx,
|
||||
void *rgba;
|
||||
GLubyte *dst, *map;
|
||||
int dstStride, stride, j;
|
||||
GLboolean is_integer = _mesa_is_enum_format_integer(format);
|
||||
GLboolean is_unsiged_integer = _mesa_is_format_unsigned(rbFormat);
|
||||
|
||||
dstStride = _mesa_image_row_stride(packing, width, format, type);
|
||||
dst = (GLubyte *) _mesa_image_address2d(packing, pixels, width, height,
|
||||
@@ -340,17 +338,12 @@ slow_read_rgba_pixels( struct gl_context *ctx,
|
||||
goto done;
|
||||
|
||||
for (j = 0; j < height; j++) {
|
||||
if (is_integer) {
|
||||
if (_mesa_is_enum_format_integer(format)) {
|
||||
_mesa_unpack_uint_rgba_row(rbFormat, width, map, (GLuint (*)[4]) rgba);
|
||||
_mesa_rebase_rgba_uint(width, (GLuint (*)[4]) rgba,
|
||||
rb->_BaseFormat);
|
||||
if (is_unsiged_integer) {
|
||||
_mesa_pack_rgba_span_from_uints(ctx, width, (GLuint (*)[4]) rgba, format,
|
||||
type, dst);
|
||||
} else {
|
||||
_mesa_pack_rgba_span_from_ints(ctx, width, (GLint (*)[4]) rgba, format,
|
||||
type, dst);
|
||||
}
|
||||
_mesa_pack_rgba_span_int(ctx, width, (GLuint (*)[4]) rgba, format,
|
||||
type, dst);
|
||||
} else {
|
||||
_mesa_unpack_rgba_row(rbFormat, width, map, (GLfloat (*)[4]) rgba);
|
||||
_mesa_rebase_rgba_float(width, (GLfloat (*)[4]) rgba,
|
||||
|
@@ -346,10 +346,12 @@ delete_shader(struct gl_context *ctx, GLuint shader)
|
||||
if (!sh)
|
||||
return;
|
||||
|
||||
sh->DeletePending = GL_TRUE;
|
||||
if (!sh->DeletePending) {
|
||||
sh->DeletePending = GL_TRUE;
|
||||
|
||||
/* effectively, decr sh's refcount */
|
||||
_mesa_reference_shader(ctx, &sh, NULL);
|
||||
/* effectively, decr sh's refcount */
|
||||
_mesa_reference_shader(ctx, &sh, NULL);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
@@ -895,7 +895,7 @@ _mesa_choose_tex_format( struct gl_context *ctx, GLint internalFormat,
|
||||
}
|
||||
/* GL_BGRA can be an internal format *only* in OpenGL ES (1.x or 2.0).
|
||||
*/
|
||||
if (ctx->API != API_OPENGL) {
|
||||
if (IS_CTX_GLES(ctx)) {
|
||||
switch (internalFormat) {
|
||||
case GL_BGRA:
|
||||
RETURN_IF_SUPPORTED(MESA_FORMAT_ARGB8888);
|
||||
|
@@ -35,6 +35,7 @@
|
||||
#include "context.h"
|
||||
#include "formats.h"
|
||||
#include "format_unpack.h"
|
||||
#include "glformats.h"
|
||||
#include "image.h"
|
||||
#include "mfeatures.h"
|
||||
#include "mtypes.h"
|
||||
@@ -306,7 +307,6 @@ get_tex_rgba_uncompressed(struct gl_context *ctx, GLuint dimensions,
|
||||
GLfloat (*rgba)[4];
|
||||
GLuint (*rgba_uint)[4];
|
||||
GLboolean is_integer = _mesa_is_format_integer_color(texImage->TexFormat);
|
||||
GLboolean is_unsiged_integer = _mesa_is_format_unsigned(texImage->TexFormat);
|
||||
|
||||
/* Allocate buffer for one row of texels */
|
||||
rgba = (GLfloat (*)[4]) malloc(4 * width * sizeof(GLfloat));
|
||||
@@ -362,15 +362,8 @@ get_tex_rgba_uncompressed(struct gl_context *ctx, GLuint dimensions,
|
||||
_mesa_unpack_uint_rgba_row(texFormat, width, src, rgba_uint);
|
||||
if (rebaseFormat)
|
||||
_mesa_rebase_rgba_uint(width, rgba_uint, rebaseFormat);
|
||||
if (is_unsiged_integer) {
|
||||
_mesa_pack_rgba_span_from_uints(ctx, width,
|
||||
(GLuint (*)[4]) rgba_uint,
|
||||
format, type, dest);
|
||||
} else {
|
||||
_mesa_pack_rgba_span_from_ints(ctx, width,
|
||||
(GLint (*)[4]) rgba_uint,
|
||||
format, type, dest);
|
||||
}
|
||||
_mesa_pack_rgba_span_int(ctx, width, rgba_uint,
|
||||
format, type, dest);
|
||||
} else {
|
||||
_mesa_unpack_rgba_row(texFormat, width, src, rgba);
|
||||
if (rebaseFormat)
|
||||
|
@@ -130,7 +130,7 @@ _mesa_base_tex_format( struct gl_context *ctx, GLint internalFormat )
|
||||
|
||||
/* GL_BGRA can be an internal format *only* in OpenGL ES (1.x or 2.0).
|
||||
*/
|
||||
if (ctx->API != API_OPENGL) {
|
||||
if (IS_CTX_GLES(ctx)) {
|
||||
switch (internalFormat) {
|
||||
case GL_BGRA:
|
||||
return GL_RGBA;
|
||||
|
@@ -35,7 +35,7 @@
|
||||
#include "main/context.h"
|
||||
#include "main/enums.h"
|
||||
#include "main/formats.h"
|
||||
#include "main/image.h"
|
||||
#include "main/glformats.h"
|
||||
#include "main/macros.h"
|
||||
#include "main/mfeatures.h"
|
||||
#include "main/mtypes.h"
|
||||
|
@@ -3200,7 +3200,6 @@ _mesa_texstore_rgba_int8(TEXSTORE_PARAMS)
|
||||
srcPacking);
|
||||
const GLuint *src = tempImage;
|
||||
GLint img, row;
|
||||
GLboolean is_unsigned = _mesa_is_type_unsigned(srcType);
|
||||
if (!tempImage)
|
||||
return GL_FALSE;
|
||||
for (img = 0; img < srcDepth; img++) {
|
||||
@@ -3208,14 +3207,8 @@ _mesa_texstore_rgba_int8(TEXSTORE_PARAMS)
|
||||
for (row = 0; row < srcHeight; row++) {
|
||||
GLbyte *dstTexel = (GLbyte *) dstRow;
|
||||
GLint i;
|
||||
if (is_unsigned) {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLbyte) MIN2(src[i], 0x7f);
|
||||
}
|
||||
} else {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLbyte) CLAMP((GLint) src[i], -0x80, 0x7f);
|
||||
}
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLbyte) src[i];
|
||||
}
|
||||
dstRow += dstRowStride;
|
||||
src += srcWidth * components;
|
||||
@@ -3277,7 +3270,6 @@ _mesa_texstore_rgba_int16(TEXSTORE_PARAMS)
|
||||
srcPacking);
|
||||
const GLuint *src = tempImage;
|
||||
GLint img, row;
|
||||
GLboolean is_unsigned = _mesa_is_type_unsigned(srcType);
|
||||
if (!tempImage)
|
||||
return GL_FALSE;
|
||||
for (img = 0; img < srcDepth; img++) {
|
||||
@@ -3285,14 +3277,8 @@ _mesa_texstore_rgba_int16(TEXSTORE_PARAMS)
|
||||
for (row = 0; row < srcHeight; row++) {
|
||||
GLshort *dstTexel = (GLshort *) dstRow;
|
||||
GLint i;
|
||||
if (is_unsigned) {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLshort) MIN2(src[i], 0x7fff);
|
||||
}
|
||||
} else {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLshort)CLAMP((GLint) src[i], -0x8000, 0x7fff);
|
||||
}
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLint) src[i];
|
||||
}
|
||||
dstRow += dstRowStride;
|
||||
src += srcWidth * components;
|
||||
@@ -3354,7 +3340,6 @@ _mesa_texstore_rgba_int32(TEXSTORE_PARAMS)
|
||||
srcPacking);
|
||||
const GLuint *src = tempImage;
|
||||
GLint img, row;
|
||||
GLboolean is_unsigned = _mesa_is_type_unsigned(srcType);
|
||||
if (!tempImage)
|
||||
return GL_FALSE;
|
||||
for (img = 0; img < srcDepth; img++) {
|
||||
@@ -3362,14 +3347,8 @@ _mesa_texstore_rgba_int32(TEXSTORE_PARAMS)
|
||||
for (row = 0; row < srcHeight; row++) {
|
||||
GLint *dstTexel = (GLint *) dstRow;
|
||||
GLint i;
|
||||
if (is_unsigned) {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLint) MIN2(src[i], 0x7fffffff);
|
||||
}
|
||||
} else {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLint) src[i];
|
||||
}
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLint) src[i];
|
||||
}
|
||||
dstRow += dstRowStride;
|
||||
src += srcWidth * components;
|
||||
@@ -3428,7 +3407,6 @@ _mesa_texstore_rgba_uint8(TEXSTORE_PARAMS)
|
||||
srcFormat, srcType, srcAddr, srcPacking);
|
||||
const GLuint *src = tempImage;
|
||||
GLint img, row;
|
||||
GLboolean is_unsigned = _mesa_is_type_unsigned(srcType);
|
||||
if (!tempImage)
|
||||
return GL_FALSE;
|
||||
for (img = 0; img < srcDepth; img++) {
|
||||
@@ -3436,14 +3414,8 @@ _mesa_texstore_rgba_uint8(TEXSTORE_PARAMS)
|
||||
for (row = 0; row < srcHeight; row++) {
|
||||
GLubyte *dstTexel = (GLubyte *) dstRow;
|
||||
GLint i;
|
||||
if (is_unsigned) {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLubyte) MIN2(src[i], 0xff);
|
||||
}
|
||||
} else {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLubyte) CLAMP((GLint) src[i], 0, 0xff);
|
||||
}
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLubyte) CLAMP(src[i], 0, 0xff);
|
||||
}
|
||||
dstRow += dstRowStride;
|
||||
src += srcWidth * components;
|
||||
@@ -3502,7 +3474,6 @@ _mesa_texstore_rgba_uint16(TEXSTORE_PARAMS)
|
||||
srcFormat, srcType, srcAddr, srcPacking);
|
||||
const GLuint *src = tempImage;
|
||||
GLint img, row;
|
||||
GLboolean is_unsigned = _mesa_is_type_unsigned(srcType);
|
||||
if (!tempImage)
|
||||
return GL_FALSE;
|
||||
for (img = 0; img < srcDepth; img++) {
|
||||
@@ -3510,14 +3481,8 @@ _mesa_texstore_rgba_uint16(TEXSTORE_PARAMS)
|
||||
for (row = 0; row < srcHeight; row++) {
|
||||
GLushort *dstTexel = (GLushort *) dstRow;
|
||||
GLint i;
|
||||
if (is_unsigned) {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLushort) MIN2(src[i], 0xffff);
|
||||
}
|
||||
} else {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLushort) CLAMP((GLint) src[i], 0, 0xffff);
|
||||
}
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = (GLushort) CLAMP(src[i], 0, 0xffff);
|
||||
}
|
||||
dstRow += dstRowStride;
|
||||
src += srcWidth * components;
|
||||
@@ -3575,7 +3540,6 @@ _mesa_texstore_rgba_uint32(TEXSTORE_PARAMS)
|
||||
srcWidth, srcHeight, srcDepth,
|
||||
srcFormat, srcType, srcAddr, srcPacking);
|
||||
const GLuint *src = tempImage;
|
||||
GLboolean is_unsigned = _mesa_is_type_unsigned(srcType);
|
||||
GLint img, row;
|
||||
if (!tempImage)
|
||||
return GL_FALSE;
|
||||
@@ -3584,14 +3548,8 @@ _mesa_texstore_rgba_uint32(TEXSTORE_PARAMS)
|
||||
for (row = 0; row < srcHeight; row++) {
|
||||
GLuint *dstTexel = (GLuint *) dstRow;
|
||||
GLint i;
|
||||
if (is_unsigned) {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = src[i];
|
||||
}
|
||||
} else {
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = MAX2((GLint) src[i], 0);
|
||||
}
|
||||
for (i = 0; i < srcWidth * components; i++) {
|
||||
dstTexel[i] = src[i];
|
||||
}
|
||||
dstRow += dstRowStride;
|
||||
src += srcWidth * components;
|
||||
@@ -3909,7 +3867,6 @@ _mesa_texstore_argb2101010_uint(TEXSTORE_PARAMS)
|
||||
srcPacking);
|
||||
const GLuint *src = tempImage;
|
||||
GLint img, row, col;
|
||||
GLboolean is_unsigned = _mesa_is_type_unsigned(srcType);
|
||||
if (!tempImage)
|
||||
return GL_FALSE;
|
||||
for (img = 0; img < srcDepth; img++) {
|
||||
@@ -3917,26 +3874,14 @@ _mesa_texstore_argb2101010_uint(TEXSTORE_PARAMS)
|
||||
|
||||
for (row = 0; row < srcHeight; row++) {
|
||||
GLuint *dstUI = (GLuint *) dstRow;
|
||||
if (is_unsigned) {
|
||||
for (col = 0; col < srcWidth; col++) {
|
||||
GLushort a,r,g,b;
|
||||
r = MIN2(src[RCOMP], 0x3ff);
|
||||
g = MIN2(src[GCOMP], 0x3ff);
|
||||
b = MIN2(src[BCOMP], 0x3ff);
|
||||
a = MIN2(src[ACOMP], 0x003);
|
||||
dstUI[col] = (a << 30) | (r << 20) | (g << 10) | (b);
|
||||
src += 4;
|
||||
}
|
||||
} else {
|
||||
for (col = 0; col < srcWidth; col++) {
|
||||
GLushort a,r,g,b;
|
||||
r = CLAMP((GLint) src[RCOMP], 0, 0x3ff);
|
||||
g = CLAMP((GLint) src[GCOMP], 0, 0x3ff);
|
||||
b = CLAMP((GLint) src[BCOMP], 0, 0x3ff);
|
||||
a = CLAMP((GLint) src[ACOMP], 0, 0x003);
|
||||
dstUI[col] = (a << 30) | (r << 20) | (g << 10) | (b);
|
||||
src += 4;
|
||||
}
|
||||
for (col = 0; col < srcWidth; col++) {
|
||||
GLushort a,r,g,b;
|
||||
r = src[RCOMP];
|
||||
g = src[GCOMP];
|
||||
b = src[BCOMP];
|
||||
a = src[ACOMP];
|
||||
dstUI[col] = (a << 30) | (r << 20) | (g << 10) | (b);
|
||||
src += 4;
|
||||
}
|
||||
dstRow += dstRowStride;
|
||||
}
|
||||
|
@@ -92,7 +92,7 @@ type_to_bit(const struct gl_context *ctx, GLenum type)
|
||||
case GL_DOUBLE:
|
||||
return DOUBLE_BIT;
|
||||
case GL_FIXED:
|
||||
return ctx->API == API_OPENGL ? FIXED_GL_BIT : FIXED_ES_BIT;
|
||||
return (IS_CTX_DESKTOP_GL(ctx)) ? FIXED_GL_BIT : FIXED_ES_BIT;
|
||||
case GL_UNSIGNED_INT_2_10_10_10_REV:
|
||||
return UNSIGNED_INT_2_10_10_10_REV_BIT;
|
||||
case GL_INT_2_10_10_10_REV:
|
||||
|
@@ -315,6 +315,7 @@ _mesa_compute_version(struct gl_context *ctx)
|
||||
|
||||
switch (ctx->API) {
|
||||
case API_OPENGL:
|
||||
case API_OPENGL_CORE:
|
||||
compute_version(ctx);
|
||||
break;
|
||||
case API_OPENGLES:
|
||||
|
@@ -45,57 +45,64 @@
|
||||
* API dispatch table.
|
||||
*/
|
||||
static void
|
||||
install_vtxfmt( struct _glapi_table *tab, const GLvertexformat *vfmt )
|
||||
install_vtxfmt(struct gl_context *ctx, struct _glapi_table *tab,
|
||||
const GLvertexformat *vfmt)
|
||||
{
|
||||
_mesa_install_arrayelt_vtxfmt(tab, vfmt);
|
||||
|
||||
SET_Color3f(tab, vfmt->Color3f);
|
||||
SET_Color3fv(tab, vfmt->Color3fv);
|
||||
SET_Color4f(tab, vfmt->Color4f);
|
||||
SET_Color4fv(tab, vfmt->Color4fv);
|
||||
SET_EdgeFlag(tab, vfmt->EdgeFlag);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_Color3f(tab, vfmt->Color3f);
|
||||
SET_Color3fv(tab, vfmt->Color3fv);
|
||||
SET_Color4f(tab, vfmt->Color4f);
|
||||
SET_Color4fv(tab, vfmt->Color4fv);
|
||||
SET_EdgeFlag(tab, vfmt->EdgeFlag);
|
||||
}
|
||||
|
||||
_mesa_install_eval_vtxfmt(tab, vfmt);
|
||||
|
||||
SET_FogCoordfEXT(tab, vfmt->FogCoordfEXT);
|
||||
SET_FogCoordfvEXT(tab, vfmt->FogCoordfvEXT);
|
||||
SET_Indexf(tab, vfmt->Indexf);
|
||||
SET_Indexfv(tab, vfmt->Indexfv);
|
||||
SET_Materialfv(tab, vfmt->Materialfv);
|
||||
SET_MultiTexCoord1fARB(tab, vfmt->MultiTexCoord1fARB);
|
||||
SET_MultiTexCoord1fvARB(tab, vfmt->MultiTexCoord1fvARB);
|
||||
SET_MultiTexCoord2fARB(tab, vfmt->MultiTexCoord2fARB);
|
||||
SET_MultiTexCoord2fvARB(tab, vfmt->MultiTexCoord2fvARB);
|
||||
SET_MultiTexCoord3fARB(tab, vfmt->MultiTexCoord3fARB);
|
||||
SET_MultiTexCoord3fvARB(tab, vfmt->MultiTexCoord3fvARB);
|
||||
SET_MultiTexCoord4fARB(tab, vfmt->MultiTexCoord4fARB);
|
||||
SET_MultiTexCoord4fvARB(tab, vfmt->MultiTexCoord4fvARB);
|
||||
SET_Normal3f(tab, vfmt->Normal3f);
|
||||
SET_Normal3fv(tab, vfmt->Normal3fv);
|
||||
SET_SecondaryColor3fEXT(tab, vfmt->SecondaryColor3fEXT);
|
||||
SET_SecondaryColor3fvEXT(tab, vfmt->SecondaryColor3fvEXT);
|
||||
SET_TexCoord1f(tab, vfmt->TexCoord1f);
|
||||
SET_TexCoord1fv(tab, vfmt->TexCoord1fv);
|
||||
SET_TexCoord2f(tab, vfmt->TexCoord2f);
|
||||
SET_TexCoord2fv(tab, vfmt->TexCoord2fv);
|
||||
SET_TexCoord3f(tab, vfmt->TexCoord3f);
|
||||
SET_TexCoord3fv(tab, vfmt->TexCoord3fv);
|
||||
SET_TexCoord4f(tab, vfmt->TexCoord4f);
|
||||
SET_TexCoord4fv(tab, vfmt->TexCoord4fv);
|
||||
SET_Vertex2f(tab, vfmt->Vertex2f);
|
||||
SET_Vertex2fv(tab, vfmt->Vertex2fv);
|
||||
SET_Vertex3f(tab, vfmt->Vertex3f);
|
||||
SET_Vertex3fv(tab, vfmt->Vertex3fv);
|
||||
SET_Vertex4f(tab, vfmt->Vertex4f);
|
||||
SET_Vertex4fv(tab, vfmt->Vertex4fv);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_FogCoordfEXT(tab, vfmt->FogCoordfEXT);
|
||||
SET_FogCoordfvEXT(tab, vfmt->FogCoordfvEXT);
|
||||
SET_Indexf(tab, vfmt->Indexf);
|
||||
SET_Indexfv(tab, vfmt->Indexfv);
|
||||
SET_Materialfv(tab, vfmt->Materialfv);
|
||||
SET_MultiTexCoord1fARB(tab, vfmt->MultiTexCoord1fARB);
|
||||
SET_MultiTexCoord1fvARB(tab, vfmt->MultiTexCoord1fvARB);
|
||||
SET_MultiTexCoord2fARB(tab, vfmt->MultiTexCoord2fARB);
|
||||
SET_MultiTexCoord2fvARB(tab, vfmt->MultiTexCoord2fvARB);
|
||||
SET_MultiTexCoord3fARB(tab, vfmt->MultiTexCoord3fARB);
|
||||
SET_MultiTexCoord3fvARB(tab, vfmt->MultiTexCoord3fvARB);
|
||||
SET_MultiTexCoord4fARB(tab, vfmt->MultiTexCoord4fARB);
|
||||
SET_MultiTexCoord4fvARB(tab, vfmt->MultiTexCoord4fvARB);
|
||||
SET_Normal3f(tab, vfmt->Normal3f);
|
||||
SET_Normal3fv(tab, vfmt->Normal3fv);
|
||||
SET_SecondaryColor3fEXT(tab, vfmt->SecondaryColor3fEXT);
|
||||
SET_SecondaryColor3fvEXT(tab, vfmt->SecondaryColor3fvEXT);
|
||||
SET_TexCoord1f(tab, vfmt->TexCoord1f);
|
||||
SET_TexCoord1fv(tab, vfmt->TexCoord1fv);
|
||||
SET_TexCoord2f(tab, vfmt->TexCoord2f);
|
||||
SET_TexCoord2fv(tab, vfmt->TexCoord2fv);
|
||||
SET_TexCoord3f(tab, vfmt->TexCoord3f);
|
||||
SET_TexCoord3fv(tab, vfmt->TexCoord3fv);
|
||||
SET_TexCoord4f(tab, vfmt->TexCoord4f);
|
||||
SET_TexCoord4fv(tab, vfmt->TexCoord4fv);
|
||||
SET_Vertex2f(tab, vfmt->Vertex2f);
|
||||
SET_Vertex2fv(tab, vfmt->Vertex2fv);
|
||||
SET_Vertex3f(tab, vfmt->Vertex3f);
|
||||
SET_Vertex3fv(tab, vfmt->Vertex3fv);
|
||||
SET_Vertex4f(tab, vfmt->Vertex4f);
|
||||
SET_Vertex4fv(tab, vfmt->Vertex4fv);
|
||||
}
|
||||
|
||||
_mesa_install_dlist_vtxfmt(tab, vfmt); /* glCallList / glCallLists */
|
||||
|
||||
SET_Begin(tab, vfmt->Begin);
|
||||
SET_End(tab, vfmt->End);
|
||||
SET_PrimitiveRestartNV(tab, vfmt->PrimitiveRestartNV);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
SET_Begin(tab, vfmt->Begin);
|
||||
SET_End(tab, vfmt->End);
|
||||
SET_PrimitiveRestartNV(tab, vfmt->PrimitiveRestartNV);
|
||||
|
||||
SET_Rectf(tab, vfmt->Rectf);
|
||||
SET_Rectf(tab, vfmt->Rectf);
|
||||
}
|
||||
|
||||
SET_DrawArrays(tab, vfmt->DrawArrays);
|
||||
SET_DrawElements(tab, vfmt->DrawElements);
|
||||
@@ -154,42 +161,44 @@ install_vtxfmt( struct _glapi_table *tab, const GLvertexformat *vfmt )
|
||||
SET_VertexAttribI3uivEXT(tab, vfmt->VertexAttribI3uiv);
|
||||
SET_VertexAttribI4uivEXT(tab, vfmt->VertexAttribI4uiv);
|
||||
|
||||
/* GL_ARB_vertex_type_10_10_10_2_rev / GL 3.3 */
|
||||
SET_VertexP2ui(tab, vfmt->VertexP2ui);
|
||||
SET_VertexP2uiv(tab, vfmt->VertexP2uiv);
|
||||
SET_VertexP3ui(tab, vfmt->VertexP3ui);
|
||||
SET_VertexP3uiv(tab, vfmt->VertexP3uiv);
|
||||
SET_VertexP4ui(tab, vfmt->VertexP4ui);
|
||||
SET_VertexP4uiv(tab, vfmt->VertexP4uiv);
|
||||
if (ctx->API != API_OPENGL_CORE) {
|
||||
/* GL_ARB_vertex_type_10_10_10_2_rev / GL 3.3 */
|
||||
SET_VertexP2ui(tab, vfmt->VertexP2ui);
|
||||
SET_VertexP2uiv(tab, vfmt->VertexP2uiv);
|
||||
SET_VertexP3ui(tab, vfmt->VertexP3ui);
|
||||
SET_VertexP3uiv(tab, vfmt->VertexP3uiv);
|
||||
SET_VertexP4ui(tab, vfmt->VertexP4ui);
|
||||
SET_VertexP4uiv(tab, vfmt->VertexP4uiv);
|
||||
|
||||
SET_TexCoordP1ui(tab, vfmt->TexCoordP1ui);
|
||||
SET_TexCoordP1uiv(tab, vfmt->TexCoordP1uiv);
|
||||
SET_TexCoordP2ui(tab, vfmt->TexCoordP2ui);
|
||||
SET_TexCoordP2uiv(tab, vfmt->TexCoordP2uiv);
|
||||
SET_TexCoordP3ui(tab, vfmt->TexCoordP3ui);
|
||||
SET_TexCoordP3uiv(tab, vfmt->TexCoordP3uiv);
|
||||
SET_TexCoordP4ui(tab, vfmt->TexCoordP4ui);
|
||||
SET_TexCoordP4uiv(tab, vfmt->TexCoordP4uiv);
|
||||
SET_TexCoordP1ui(tab, vfmt->TexCoordP1ui);
|
||||
SET_TexCoordP1uiv(tab, vfmt->TexCoordP1uiv);
|
||||
SET_TexCoordP2ui(tab, vfmt->TexCoordP2ui);
|
||||
SET_TexCoordP2uiv(tab, vfmt->TexCoordP2uiv);
|
||||
SET_TexCoordP3ui(tab, vfmt->TexCoordP3ui);
|
||||
SET_TexCoordP3uiv(tab, vfmt->TexCoordP3uiv);
|
||||
SET_TexCoordP4ui(tab, vfmt->TexCoordP4ui);
|
||||
SET_TexCoordP4uiv(tab, vfmt->TexCoordP4uiv);
|
||||
|
||||
SET_MultiTexCoordP1ui(tab, vfmt->MultiTexCoordP1ui);
|
||||
SET_MultiTexCoordP2ui(tab, vfmt->MultiTexCoordP2ui);
|
||||
SET_MultiTexCoordP3ui(tab, vfmt->MultiTexCoordP3ui);
|
||||
SET_MultiTexCoordP4ui(tab, vfmt->MultiTexCoordP4ui);
|
||||
SET_MultiTexCoordP1uiv(tab, vfmt->MultiTexCoordP1uiv);
|
||||
SET_MultiTexCoordP2uiv(tab, vfmt->MultiTexCoordP2uiv);
|
||||
SET_MultiTexCoordP3uiv(tab, vfmt->MultiTexCoordP3uiv);
|
||||
SET_MultiTexCoordP4uiv(tab, vfmt->MultiTexCoordP4uiv);
|
||||
SET_MultiTexCoordP1ui(tab, vfmt->MultiTexCoordP1ui);
|
||||
SET_MultiTexCoordP2ui(tab, vfmt->MultiTexCoordP2ui);
|
||||
SET_MultiTexCoordP3ui(tab, vfmt->MultiTexCoordP3ui);
|
||||
SET_MultiTexCoordP4ui(tab, vfmt->MultiTexCoordP4ui);
|
||||
SET_MultiTexCoordP1uiv(tab, vfmt->MultiTexCoordP1uiv);
|
||||
SET_MultiTexCoordP2uiv(tab, vfmt->MultiTexCoordP2uiv);
|
||||
SET_MultiTexCoordP3uiv(tab, vfmt->MultiTexCoordP3uiv);
|
||||
SET_MultiTexCoordP4uiv(tab, vfmt->MultiTexCoordP4uiv);
|
||||
|
||||
SET_NormalP3ui(tab, vfmt->NormalP3ui);
|
||||
SET_NormalP3uiv(tab, vfmt->NormalP3uiv);
|
||||
SET_NormalP3ui(tab, vfmt->NormalP3ui);
|
||||
SET_NormalP3uiv(tab, vfmt->NormalP3uiv);
|
||||
|
||||
SET_ColorP3ui(tab, vfmt->ColorP3ui);
|
||||
SET_ColorP4ui(tab, vfmt->ColorP4ui);
|
||||
SET_ColorP3uiv(tab, vfmt->ColorP3uiv);
|
||||
SET_ColorP4uiv(tab, vfmt->ColorP4uiv);
|
||||
SET_ColorP3ui(tab, vfmt->ColorP3ui);
|
||||
SET_ColorP4ui(tab, vfmt->ColorP4ui);
|
||||
SET_ColorP3uiv(tab, vfmt->ColorP3uiv);
|
||||
SET_ColorP4uiv(tab, vfmt->ColorP4uiv);
|
||||
|
||||
SET_SecondaryColorP3ui(tab, vfmt->SecondaryColorP3ui);
|
||||
SET_SecondaryColorP3uiv(tab, vfmt->SecondaryColorP3uiv);
|
||||
SET_SecondaryColorP3ui(tab, vfmt->SecondaryColorP3ui);
|
||||
SET_SecondaryColorP3uiv(tab, vfmt->SecondaryColorP3uiv);
|
||||
}
|
||||
|
||||
SET_VertexAttribP1ui(tab, vfmt->VertexAttribP1ui);
|
||||
SET_VertexAttribP2ui(tab, vfmt->VertexAttribP2ui);
|
||||
@@ -209,8 +218,8 @@ install_vtxfmt( struct _glapi_table *tab, const GLvertexformat *vfmt )
|
||||
void
|
||||
_mesa_install_exec_vtxfmt(struct gl_context *ctx, const GLvertexformat *vfmt)
|
||||
{
|
||||
if (ctx->API == API_OPENGL)
|
||||
install_vtxfmt( ctx->Exec, vfmt );
|
||||
if (IS_CTX_DESKTOP_GL(ctx))
|
||||
install_vtxfmt( ctx, ctx->Exec, vfmt );
|
||||
}
|
||||
|
||||
|
||||
@@ -221,8 +230,8 @@ _mesa_install_exec_vtxfmt(struct gl_context *ctx, const GLvertexformat *vfmt)
|
||||
void
|
||||
_mesa_install_save_vtxfmt(struct gl_context *ctx, const GLvertexformat *vfmt)
|
||||
{
|
||||
if (ctx->API == API_OPENGL)
|
||||
install_vtxfmt( ctx->Save, vfmt );
|
||||
if (IS_CTX_DESKTOP_GL(ctx))
|
||||
install_vtxfmt( ctx, ctx->Save, vfmt );
|
||||
}
|
||||
|
||||
|
||||
|
@@ -1,3 +1,4 @@
|
||||
|
||||
/**************************************************************************
|
||||
*
|
||||
* Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
|
||||
@@ -45,7 +46,7 @@
|
||||
#include "util/u_math.h"
|
||||
|
||||
#include "main/bufferobj.h"
|
||||
#include "main/image.h"
|
||||
#include "main/glformats.h"
|
||||
|
||||
|
||||
static GLuint double_types[4] = {
|
||||
|
@@ -33,6 +33,7 @@
|
||||
|
||||
#include "st_context.h"
|
||||
#include "st_atom.h"
|
||||
#include "st_cb_bitmap.h"
|
||||
#include "st_cb_fbo.h"
|
||||
#include "st_texture.h"
|
||||
#include "pipe/p_context.h"
|
||||
@@ -103,6 +104,9 @@ update_framebuffer_state( struct st_context *st )
|
||||
struct st_renderbuffer *strb;
|
||||
GLuint i;
|
||||
|
||||
st_flush_bitmap_cache(st);
|
||||
|
||||
st->state.fb_orientation = st_fb_orientation(fb);
|
||||
framebuffer->width = fb->Width;
|
||||
framebuffer->height = fb->Height;
|
||||
|
||||
|
@@ -335,9 +335,8 @@ setup_bitmap_vertex_data(struct st_context *st, bool normalized,
|
||||
struct pipe_resource **vbuf,
|
||||
unsigned *vbuf_offset)
|
||||
{
|
||||
const struct gl_framebuffer *fb = st->ctx->DrawBuffer;
|
||||
const GLfloat fb_width = (GLfloat)fb->Width;
|
||||
const GLfloat fb_height = (GLfloat)fb->Height;
|
||||
const GLfloat fb_width = (GLfloat)st->state.framebuffer.width;
|
||||
const GLfloat fb_height = (GLfloat)st->state.framebuffer.height;
|
||||
const GLfloat x0 = (GLfloat)x;
|
||||
const GLfloat x1 = (GLfloat)(x + width);
|
||||
const GLfloat y0 = (GLfloat)y;
|
||||
@@ -502,10 +501,9 @@ draw_bitmap_quad(struct gl_context *ctx, GLint x, GLint y, GLfloat z,
|
||||
|
||||
/* viewport state: viewport matching window dims */
|
||||
{
|
||||
const struct gl_framebuffer *fb = st->ctx->DrawBuffer;
|
||||
const GLboolean invert = (st_fb_orientation(fb) == Y_0_TOP);
|
||||
const GLfloat width = (GLfloat)fb->Width;
|
||||
const GLfloat height = (GLfloat)fb->Height;
|
||||
const GLboolean invert = st->state.fb_orientation == Y_0_TOP;
|
||||
const GLfloat width = (GLfloat)st->state.framebuffer.width;
|
||||
const GLfloat height = (GLfloat)st->state.framebuffer.height;
|
||||
struct pipe_viewport_state vp;
|
||||
vp.scale[0] = 0.5f * width;
|
||||
vp.scale[1] = height * (invert ? -0.5f : 0.5f);
|
||||
@@ -636,43 +634,41 @@ st_flush_bitmap_cache(struct st_context *st)
|
||||
if (!st->bitmap.cache->empty) {
|
||||
struct bitmap_cache *cache = st->bitmap.cache;
|
||||
|
||||
if (st->ctx->DrawBuffer) {
|
||||
struct pipe_context *pipe = st->pipe;
|
||||
struct pipe_sampler_view *sv;
|
||||
struct pipe_context *pipe = st->pipe;
|
||||
struct pipe_sampler_view *sv;
|
||||
|
||||
assert(cache->xmin <= cache->xmax);
|
||||
|
||||
/* printf("flush size %d x %d at %d, %d\n",
|
||||
cache->xmax - cache->xmin,
|
||||
cache->ymax - cache->ymin,
|
||||
cache->xpos, cache->ypos);
|
||||
assert(cache->xmin <= cache->xmax);
|
||||
|
||||
/* printf("flush size %d x %d at %d, %d\n",
|
||||
cache->xmax - cache->xmin,
|
||||
cache->ymax - cache->ymin,
|
||||
cache->xpos, cache->ypos);
|
||||
*/
|
||||
|
||||
/* The texture transfer has been mapped until now.
|
||||
/* The texture transfer has been mapped until now.
|
||||
* So unmap and release the texture transfer before drawing.
|
||||
*/
|
||||
if (cache->trans) {
|
||||
if (0)
|
||||
print_cache(cache);
|
||||
pipe_transfer_unmap(pipe, cache->trans);
|
||||
cache->buffer = NULL;
|
||||
if (cache->trans) {
|
||||
if (0)
|
||||
print_cache(cache);
|
||||
pipe_transfer_unmap(pipe, cache->trans);
|
||||
cache->buffer = NULL;
|
||||
|
||||
pipe->transfer_destroy(pipe, cache->trans);
|
||||
cache->trans = NULL;
|
||||
}
|
||||
pipe->transfer_destroy(pipe, cache->trans);
|
||||
cache->trans = NULL;
|
||||
}
|
||||
|
||||
sv = st_create_texture_sampler_view(st->pipe, cache->texture);
|
||||
if (sv) {
|
||||
draw_bitmap_quad(st->ctx,
|
||||
cache->xpos,
|
||||
cache->ypos,
|
||||
cache->zpos,
|
||||
BITMAP_CACHE_WIDTH, BITMAP_CACHE_HEIGHT,
|
||||
sv,
|
||||
cache->color);
|
||||
sv = st_create_texture_sampler_view(st->pipe, cache->texture);
|
||||
if (sv) {
|
||||
draw_bitmap_quad(st->ctx,
|
||||
cache->xpos,
|
||||
cache->ypos,
|
||||
cache->zpos,
|
||||
BITMAP_CACHE_WIDTH, BITMAP_CACHE_HEIGHT,
|
||||
sv,
|
||||
cache->color);
|
||||
|
||||
pipe_sampler_view_reference(&sv, NULL);
|
||||
}
|
||||
pipe_sampler_view_reference(&sv, NULL);
|
||||
}
|
||||
|
||||
/* release/free the texture */
|
||||
@@ -683,16 +679,6 @@ st_flush_bitmap_cache(struct st_context *st)
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Flush bitmap cache.
|
||||
*/
|
||||
void
|
||||
st_flush_bitmap( struct st_context *st )
|
||||
{
|
||||
st_flush_bitmap_cache(st);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Try to accumulate this glBitmap call in the bitmap cache.
|
||||
* \return GL_TRUE for success, GL_FALSE if bitmap is too large, etc.
|
||||
|
@@ -58,12 +58,6 @@ st_make_bitmap_fragment_program(struct st_context *st,
|
||||
extern void
|
||||
st_flush_bitmap_cache(struct st_context *st);
|
||||
|
||||
/* Flush bitmap cache and release vertex buffer. Needed at end of
|
||||
* frame to avoid synchronous rendering.
|
||||
*/
|
||||
extern void
|
||||
st_flush_bitmap(struct st_context *st);
|
||||
|
||||
#else
|
||||
|
||||
static INLINE void
|
||||
|
@@ -291,13 +291,21 @@ st_new_renderbuffer_fb(enum pipe_format format, int samples, boolean sw)
|
||||
case PIPE_FORMAT_R8G8B8A8_UNORM:
|
||||
case PIPE_FORMAT_B8G8R8A8_UNORM:
|
||||
case PIPE_FORMAT_A8R8G8B8_UNORM:
|
||||
strb->Base.InternalFormat = GL_RGBA8;
|
||||
break;
|
||||
case PIPE_FORMAT_R8G8B8X8_UNORM:
|
||||
case PIPE_FORMAT_B8G8R8X8_UNORM:
|
||||
case PIPE_FORMAT_X8R8G8B8_UNORM:
|
||||
strb->Base.InternalFormat = GL_RGB8;
|
||||
break;
|
||||
case PIPE_FORMAT_B5G5R5A1_UNORM:
|
||||
strb->Base.InternalFormat = GL_RGB5_A1;
|
||||
break;
|
||||
case PIPE_FORMAT_B4G4R4A4_UNORM:
|
||||
strb->Base.InternalFormat = GL_RGBA4;
|
||||
break;
|
||||
case PIPE_FORMAT_B5G6R5_UNORM:
|
||||
strb->Base.InternalFormat = GL_RGBA;
|
||||
strb->Base.InternalFormat = GL_RGB565;
|
||||
break;
|
||||
case PIPE_FORMAT_Z16_UNORM:
|
||||
strb->Base.InternalFormat = GL_DEPTH_COMPONENT16;
|
||||
|
@@ -81,7 +81,7 @@ void st_flush( struct st_context *st,
|
||||
{
|
||||
FLUSH_CURRENT(st->ctx, 0);
|
||||
|
||||
st_flush_bitmap(st);
|
||||
st_flush_bitmap_cache(st);
|
||||
|
||||
st->pipe->flush( st->pipe, fence );
|
||||
}
|
||||
|
@@ -117,6 +117,8 @@ struct st_context
|
||||
GLuint num_vertex_textures;
|
||||
|
||||
GLuint poly_stipple[32]; /**< In OpenGL's bottom-to-top order */
|
||||
|
||||
GLuint fb_orientation;
|
||||
} state;
|
||||
|
||||
char vendor[100];
|
||||
|
@@ -34,6 +34,7 @@
|
||||
|
||||
#include "main/imports.h"
|
||||
#include "main/context.h"
|
||||
#include "main/glformats.h"
|
||||
#include "main/texstore.h"
|
||||
#include "main/image.h"
|
||||
#include "main/macros.h"
|
||||
|
@@ -1448,9 +1448,29 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir)
|
||||
emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
|
||||
break;
|
||||
case ir_unop_dFdy:
|
||||
op[0].negate = ~op[0].negate;
|
||||
emit(ir, TGSI_OPCODE_DDY, result_dst, op[0]);
|
||||
{
|
||||
/* The X component contains 1 or -1 depending on whether the framebuffer
|
||||
* is a FBO or the window system buffer, respectively.
|
||||
* It is then multiplied with the source operand of DDY.
|
||||
*/
|
||||
static const gl_state_index transform_y_state[STATE_LENGTH]
|
||||
= { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
|
||||
|
||||
unsigned transform_y_index =
|
||||
_mesa_add_state_reference(this->prog->Parameters,
|
||||
transform_y_state);
|
||||
|
||||
st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
|
||||
transform_y_index,
|
||||
glsl_type::vec4_type);
|
||||
transform_y.swizzle = SWIZZLE_XXXX;
|
||||
|
||||
st_src_reg temp = get_temp(glsl_type::vec4_type);
|
||||
|
||||
emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
|
||||
emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
|
||||
break;
|
||||
}
|
||||
|
||||
case ir_unop_noise: {
|
||||
/* At some point, a motivated person could add a better
|
||||
@@ -4481,6 +4501,7 @@ st_translate_program(
|
||||
const ubyte inputSemanticName[],
|
||||
const ubyte inputSemanticIndex[],
|
||||
const GLuint interpMode[],
|
||||
const GLboolean is_centroid[],
|
||||
GLuint numOutputs,
|
||||
const GLuint outputMapping[],
|
||||
const ubyte outputSemanticName[],
|
||||
@@ -4522,10 +4543,11 @@ st_translate_program(
|
||||
*/
|
||||
if (procType == TGSI_PROCESSOR_FRAGMENT) {
|
||||
for (i = 0; i < numInputs; i++) {
|
||||
t->inputs[i] = ureg_DECL_fs_input(ureg,
|
||||
inputSemanticName[i],
|
||||
inputSemanticIndex[i],
|
||||
interpMode[i]);
|
||||
t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
|
||||
inputSemanticName[i],
|
||||
inputSemanticIndex[i],
|
||||
interpMode[i], 0,
|
||||
is_centroid[i]);
|
||||
}
|
||||
|
||||
if (proginfo->InputsRead & FRAG_BIT_WPOS) {
|
||||
|
@@ -45,6 +45,7 @@ enum pipe_error st_translate_program(
|
||||
const ubyte inputSemanticName[],
|
||||
const ubyte inputSemanticIndex[],
|
||||
const GLuint interpMode[],
|
||||
const GLboolean is_centroid[],
|
||||
GLuint numOutputs,
|
||||
const GLuint outputMapping[],
|
||||
const ubyte outputSemanticName[],
|
||||
|
@@ -347,6 +347,7 @@ st_translate_vertex_program(struct st_context *st,
|
||||
NULL, /* input semantic name */
|
||||
NULL, /* input semantic index */
|
||||
NULL, /* interp mode */
|
||||
NULL, /* is centroid */
|
||||
/* outputs */
|
||||
stvp->num_outputs,
|
||||
stvp->result_to_output,
|
||||
@@ -484,6 +485,7 @@ st_translate_fragment_program(struct st_context *st,
|
||||
|
||||
ubyte input_semantic_name[PIPE_MAX_SHADER_INPUTS];
|
||||
ubyte input_semantic_index[PIPE_MAX_SHADER_INPUTS];
|
||||
GLboolean is_centroid[PIPE_MAX_SHADER_INPUTS];
|
||||
uint fs_num_inputs = 0;
|
||||
|
||||
ubyte fs_output_semantic_name[PIPE_MAX_SHADER_OUTPUTS];
|
||||
@@ -537,6 +539,7 @@ st_translate_fragment_program(struct st_context *st,
|
||||
const GLuint slot = fs_num_inputs++;
|
||||
|
||||
inputMapping[attr] = slot;
|
||||
is_centroid[slot] = (stfp->Base.IsCentroid & BITFIELD64_BIT(attr)) != 0;
|
||||
|
||||
switch (attr) {
|
||||
case FRAG_ATTRIB_WPOS:
|
||||
@@ -716,6 +719,7 @@ st_translate_fragment_program(struct st_context *st,
|
||||
input_semantic_name,
|
||||
input_semantic_index,
|
||||
interpMode,
|
||||
is_centroid,
|
||||
/* outputs */
|
||||
fs_num_outputs,
|
||||
outputMapping,
|
||||
|
@@ -32,7 +32,7 @@
|
||||
#include "main/glheader.h"
|
||||
#include "main/bufferobj.h"
|
||||
#include "main/imports.h"
|
||||
#include "main/image.h"
|
||||
#include "main/glformats.h"
|
||||
#include "main/macros.h"
|
||||
#include "main/mtypes.h"
|
||||
|
||||
|
@@ -30,7 +30,7 @@
|
||||
#include "main/mtypes.h"
|
||||
#include "main/macros.h"
|
||||
#include "main/enums.h"
|
||||
#include "main/image.h"
|
||||
#include "main/glformats.h"
|
||||
#include "vbo_split.h"
|
||||
|
||||
|
||||
|
Reference in New Issue
Block a user