Update version to 13.0.0-rc2

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Makefile.am

@@ -62,6 +62,7 @@ noinst_HEADERS = \
 	include/c99_math.h \
 	include/c11 \
 	include/D3D9 \
+	include/GL/wglext.h \
 	include/HaikuGL \
 	include/no_extern_c.h \
 	include/pci_ids

VERSION

@@ -1 +1 @@
-12.1.0-devel
+13.0.0-rc2

configure.ac

@@ -1667,13 +1667,6 @@ AC_ARG_WITH([vulkan-icddir],
     [VULKAN_ICD_INSTALL_DIR='${datarootdir}/vulkan/icd.d'])
 AC_SUBST([VULKAN_ICD_INSTALL_DIR])
 
-AC_ARG_ENABLE([vulkan-icd-full-driver-path],
-   [AS_HELP_STRING([--disable-vulkan-icd-full-driver-path],
-                   [create Vulkan ICD files with just a .so name and no path])],
-   [vulkan_icd_driver_path="$enableval"],
-   [vulkan_icd_driver_path="yes"])
-AM_CONDITIONAL(VULKAN_ICD_DRIVER_PATH, test "x$vulkan_icd_driver_path" = xyes)
-
 if test -n "$with_vulkan_drivers"; then
     VULKAN_DRIVERS=`IFS=', '; echo $with_vulkan_drivers`
     for driver in $VULKAN_DRIVERS; do

src/amd/common/ac_nir_to_llvm.c

@@ -3412,7 +3412,7 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
 		result = build_tex_intrinsic(ctx, instr, &txf_info);
 
 		result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, "");
-		result = LLVMBuildICmp(ctx->builder, LLVMIntEQ, result, ctx->i32zero, "");
+		result = emit_int_cmp(ctx, LLVMIntEQ, result, ctx->i32zero);
 		goto write_result;
 	}
 

src/amd/vulkan/radv_cmd_buffer.c

@@ -2163,9 +2163,6 @@ static void radv_handle_cmask_image_transition(struct radv_cmd_buffer *cmd_buffe
 			radv_initialise_cmask(cmd_buffer, image, 0xffffffffu);
 	} else if (radv_layout_has_cmask(image, src_layout) &&
 		   !radv_layout_has_cmask(image, dst_layout)) {
-
-		if (!cmd_buffer->device->allow_fast_clears)
-			return;
 		radv_fast_clear_flush_image_inplace(cmd_buffer, image);
 	}
 }

src/egl/drivers/dri2/platform_wayland.c

@@ -118,6 +118,13 @@ resize_callback(struct wl_egl_window *wl_win, void *data)
    (*dri2_dpy->flush->invalidate)(dri2_surf->dri_drawable);
 }
 
+static void
+destroy_window_callback(void *data)
+{
+   struct dri2_egl_surface *dri2_surf = data;
+   dri2_surf->wl_win = NULL;
+}
+
 /**
  * Called via eglCreateWindowSurface(), drv->API.CreateWindowSurface().
  */
@@ -159,6 +166,7 @@ dri2_wl_create_surface(_EGLDriver *drv, _EGLDisplay *disp,
 
    dri2_surf->wl_win->private = dri2_surf;
    dri2_surf->wl_win->resize_callback = resize_callback;
+   dri2_surf->wl_win->destroy_window_callback = destroy_window_callback;
 
    dri2_surf->base.Width =  -1;
    dri2_surf->base.Height = -1;
@@ -254,8 +262,11 @@ dri2_wl_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
    if (dri2_surf->throttle_callback)
       wl_callback_destroy(dri2_surf->throttle_callback);
 
-   dri2_surf->wl_win->private = NULL;
+   if (dri2_surf->wl_win) {
-   dri2_surf->wl_win->resize_callback = NULL;
+      dri2_surf->wl_win->private = NULL;
+      dri2_surf->wl_win->resize_callback = NULL;
+      dri2_surf->wl_win->destroy_window_callback = NULL;
+   }
 
    free(surf);
 

src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp

@@ -182,6 +182,7 @@ public:
 
    // mask of used components of source s
    unsigned int srcMask(unsigned int s) const;
+   unsigned int texOffsetMask() const;
 
    SrcRegister getSrc(unsigned int s) const
    {
@@ -234,6 +235,35 @@ private:
    const struct tgsi_full_instruction *insn;
 };
 
+unsigned int Instruction::texOffsetMask() const
+{
+   const struct tgsi_instruction_texture *tex = &insn->Texture;
+   assert(insn->Instruction.Texture);
+
+   switch (tex->Texture) {
+   case TGSI_TEXTURE_BUFFER:
+   case TGSI_TEXTURE_1D:
+   case TGSI_TEXTURE_SHADOW1D:
+   case TGSI_TEXTURE_1D_ARRAY:
+   case TGSI_TEXTURE_SHADOW1D_ARRAY:
+      return 0x1;
+   case TGSI_TEXTURE_2D:
+   case TGSI_TEXTURE_SHADOW2D:
+   case TGSI_TEXTURE_2D_ARRAY:
+   case TGSI_TEXTURE_SHADOW2D_ARRAY:
+   case TGSI_TEXTURE_RECT:
+   case TGSI_TEXTURE_SHADOWRECT:
+   case TGSI_TEXTURE_2D_MSAA:
+   case TGSI_TEXTURE_2D_ARRAY_MSAA:
+      return 0x3;
+   case TGSI_TEXTURE_3D:
+      return 0x7;
+   default:
+      assert(!"Unexpected texture target");
+      return 0xf;
+   }
+}
+
 unsigned int Instruction::srcMask(unsigned int s) const
 {
    unsigned int mask = insn->Dst[0].Register.WriteMask;
@@ -955,6 +985,9 @@ private:
    int inferSysValDirection(unsigned sn) const;
    bool scanDeclaration(const struct tgsi_full_declaration *);
    bool scanInstruction(const struct tgsi_full_instruction *);
+   void scanInstructionSrc(const Instruction& insn,
+                           const Instruction::SrcRegister& src,
+                           unsigned mask);
    void scanProperty(const struct tgsi_full_property *);
    void scanImmediate(const struct tgsi_full_immediate *);
 
@@ -1364,6 +1397,61 @@ inline bool Source::isEdgeFlagPassthrough(const Instruction& insn) const
       insn.getSrc(0).getFile() == TGSI_FILE_INPUT;
 }
 
+void Source::scanInstructionSrc(const Instruction& insn,
+                                const Instruction::SrcRegister& src,
+                                unsigned mask)
+{
+   if (src.getFile() == TGSI_FILE_TEMPORARY) {
+      if (src.isIndirect(0))
+         indirectTempArrays.insert(src.getArrayId());
+   } else
+   if (src.getFile() == TGSI_FILE_BUFFER ||
+       src.getFile() == TGSI_FILE_IMAGE ||
+       (src.getFile() == TGSI_FILE_MEMORY &&
+        memoryFiles[src.getIndex(0)].mem_type == TGSI_MEMORY_TYPE_GLOBAL)) {
+      info->io.globalAccess |= (insn.getOpcode() == TGSI_OPCODE_LOAD) ?
+         0x1 : 0x2;
+   } else
+   if (src.getFile() == TGSI_FILE_OUTPUT) {
+      if (src.isIndirect(0)) {
+         // We don't know which one is accessed, just mark everything for
+         // reading. This is an extremely unlikely occurrence.
+         for (unsigned i = 0; i < info->numOutputs; ++i)
+            info->out[i].oread = 1;
+      } else {
+         info->out[src.getIndex(0)].oread = 1;
+      }
+   }
+   if (src.getFile() != TGSI_FILE_INPUT)
+      return;
+
+   if (src.isIndirect(0)) {
+      for (unsigned i = 0; i < info->numInputs; ++i)
+         info->in[i].mask = 0xf;
+   } else {
+      const int i = src.getIndex(0);
+      for (unsigned c = 0; c < 4; ++c) {
+         if (!(mask & (1 << c)))
+            continue;
+         int k = src.getSwizzle(c);
+         if (k <= TGSI_SWIZZLE_W)
+            info->in[i].mask |= 1 << k;
+      }
+      switch (info->in[i].sn) {
+      case TGSI_SEMANTIC_PSIZE:
+      case TGSI_SEMANTIC_PRIMID:
+      case TGSI_SEMANTIC_FOG:
+         info->in[i].mask &= 0x1;
+         break;
+      case TGSI_SEMANTIC_PCOORD:
+         info->in[i].mask &= 0x3;
+         break;
+      default:
+         break;
+      }
+   }
+}
+
 bool Source::scanInstruction(const struct tgsi_full_instruction *inst)
 {
    Instruction insn(inst);
@@ -1396,66 +1484,19 @@ bool Source::scanInstruction(const struct tgsi_full_instruction *inst)
             indirectTempArrays.insert(dst.getArrayId());
       } else
       if (dst.getFile() == TGSI_FILE_BUFFER ||
-          dst.getFile() == TGSI_FILE_IMAGE || 
+          dst.getFile() == TGSI_FILE_IMAGE ||
           (dst.getFile() == TGSI_FILE_MEMORY &&
            memoryFiles[dst.getIndex(0)].mem_type == TGSI_MEMORY_TYPE_GLOBAL)) {
          info->io.globalAccess |= 0x2;
       }
    }
 
-   for (unsigned s = 0; s < insn.srcCount(); ++s) {
+   for (unsigned s = 0; s < insn.srcCount(); ++s)
-      Instruction::SrcRegister src = insn.getSrc(s);
+      scanInstructionSrc(insn, insn.getSrc(s), insn.srcMask(s));
-      if (src.getFile() == TGSI_FILE_TEMPORARY) {
+
-         if (src.isIndirect(0))
+   for (unsigned s = 0; s < insn.getNumTexOffsets(); ++s)
-            indirectTempArrays.insert(src.getArrayId());
+      scanInstructionSrc(insn, insn.getTexOffset(s), insn.texOffsetMask());
-      } else
-      if (src.getFile() == TGSI_FILE_BUFFER ||
-          src.getFile() == TGSI_FILE_IMAGE ||
-          (src.getFile() == TGSI_FILE_MEMORY &&
-           memoryFiles[src.getIndex(0)].mem_type == TGSI_MEMORY_TYPE_GLOBAL)) {
-         info->io.globalAccess |= (insn.getOpcode() == TGSI_OPCODE_LOAD) ?
-               0x1 : 0x2;
-      } else
-      if (src.getFile() == TGSI_FILE_OUTPUT) {
-         if (src.isIndirect(0)) {
-            // We don't know which one is accessed, just mark everything for
-            // reading. This is an extremely unlikely occurrence.
-            for (unsigned i = 0; i < info->numOutputs; ++i)
-               info->out[i].oread = 1;
-         } else {
-            info->out[src.getIndex(0)].oread = 1;
-         }
-      }
-      if (src.getFile() != TGSI_FILE_INPUT)
-         continue;
-      unsigned mask = insn.srcMask(s);
 
-      if (src.isIndirect(0)) {
-         for (unsigned i = 0; i < info->numInputs; ++i)
-            info->in[i].mask = 0xf;
-      } else {
-         const int i = src.getIndex(0);
-         for (unsigned c = 0; c < 4; ++c) {
-            if (!(mask & (1 << c)))
-               continue;
-            int k = src.getSwizzle(c);
-            if (k <= TGSI_SWIZZLE_W)
-               info->in[i].mask |= 1 << k;
-         }
-         switch (info->in[i].sn) {
-         case TGSI_SEMANTIC_PSIZE:
-         case TGSI_SEMANTIC_PRIMID:
-         case TGSI_SEMANTIC_FOG:
-            info->in[i].mask &= 0x1;
-            break;
-         case TGSI_SEMANTIC_PCOORD:
-            info->in[i].mask &= 0x3;
-            break;
-         default:
-            break;
-         }
-      }
-   }
    return true;
 }
 

src/gallium/drivers/nouveau/nv50/nv50_program.c

@@ -307,6 +307,9 @@ nv50_program_create_strmout_state(const struct nv50_ir_prog_info *info,
       const unsigned r = pso->output[i].register_index;
       b = pso->output[i].output_buffer;
 
+      if (r >= info->numOutputs)
+         continue;
+
       for (c = 0; c < pso->output[i].num_components; ++c)
          so->map[base[b] + p + c] = info->out[r].slot[s + c];
    }

src/gallium/drivers/nouveau/nvc0/nvc0_program.c

@@ -509,11 +509,14 @@ nvc0_program_create_tfb_state(const struct nv50_ir_prog_info *info,
    for (i = 0; i < pso->num_outputs; ++i) {
       unsigned s = pso->output[i].start_component;
       unsigned p = pso->output[i].dst_offset;
+      const unsigned r = pso->output[i].register_index;
       b = pso->output[i].output_buffer;
 
+      if (r >= info->numOutputs)
+         continue;
+
       for (c = 0; c < pso->output[i].num_components; ++c)
-         tfb->varying_index[b][p++] =
+         tfb->varying_index[b][p++] = info->out[r].slot[s + c];
-            info->out[pso->output[i].register_index].slot[s + c];
 
       tfb->varying_count[b] = MAX2(tfb->varying_count[b], p);
       tfb->stream[b] = pso->output[i].stream;

src/gallium/drivers/nouveau/nvc0/nvc0_screen.c

@@ -1002,49 +1002,6 @@ nvc0_screen_create(struct nouveau_device *dev)
 
    PUSH_REFN (push, screen->uniform_bo, NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_WR);
 
-   for (i = 0; i < 5; ++i) {
-      /* TIC and TSC entries for each unit (nve4+ only) */
-      /* auxiliary constants (6 user clip planes, base instance id) */
-      BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
-      PUSH_DATA (push, NVC0_CB_AUX_SIZE);
-      PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i));
-      PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i));
-      BEGIN_NVC0(push, NVC0_3D(CB_BIND(i)), 1);
-      PUSH_DATA (push, (15 << 4) | 1);
-      if (screen->eng3d->oclass >= NVE4_3D_CLASS) {
-         unsigned j;
-         BEGIN_1IC0(push, NVC0_3D(CB_POS), 9);
-         PUSH_DATA (push, NVC0_CB_AUX_UNK_INFO);
-         for (j = 0; j < 8; ++j)
-            PUSH_DATA(push, j);
-      } else {
-         BEGIN_NVC0(push, NVC0_3D(TEX_LIMITS(i)), 1);
-         PUSH_DATA (push, 0x54);
-      }
-
-      /* MS sample coordinate offsets: these do not work with _ALT modes ! */
-      BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 2 * 8);
-      PUSH_DATA (push, NVC0_CB_AUX_MS_INFO);
-      PUSH_DATA (push, 0); /* 0 */
-      PUSH_DATA (push, 0);
-      PUSH_DATA (push, 1); /* 1 */
-      PUSH_DATA (push, 0);
-      PUSH_DATA (push, 0); /* 2 */
-      PUSH_DATA (push, 1);
-      PUSH_DATA (push, 1); /* 3 */
-      PUSH_DATA (push, 1);
-      PUSH_DATA (push, 2); /* 4 */
-      PUSH_DATA (push, 0);
-      PUSH_DATA (push, 3); /* 5 */
-      PUSH_DATA (push, 0);
-      PUSH_DATA (push, 2); /* 6 */
-      PUSH_DATA (push, 1);
-      PUSH_DATA (push, 3); /* 7 */
-      PUSH_DATA (push, 1);
-   }
-   BEGIN_NVC0(push, NVC0_3D(LINKED_TSC), 1);
-   PUSH_DATA (push, 0);
-
    /* return { 0.0, 0.0, 0.0, 0.0 } for out-of-bounds vtxbuf access */
    BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
    PUSH_DATA (push, 256);
@@ -1214,6 +1171,50 @@ nvc0_screen_create(struct nouveau_device *dev)
    if (nvc0_screen_init_compute(screen))
       goto fail;
 
+   /* XXX: Compute and 3D are somehow aliased on Fermi. */
+   for (i = 0; i < 5; ++i) {
+      /* TIC and TSC entries for each unit (nve4+ only) */
+      /* auxiliary constants (6 user clip planes, base instance id) */
+      BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
+      PUSH_DATA (push, NVC0_CB_AUX_SIZE);
+      PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i));
+      PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i));
+      BEGIN_NVC0(push, NVC0_3D(CB_BIND(i)), 1);
+      PUSH_DATA (push, (15 << 4) | 1);
+      if (screen->eng3d->oclass >= NVE4_3D_CLASS) {
+         unsigned j;
+         BEGIN_1IC0(push, NVC0_3D(CB_POS), 9);
+         PUSH_DATA (push, NVC0_CB_AUX_UNK_INFO);
+         for (j = 0; j < 8; ++j)
+            PUSH_DATA(push, j);
+      } else {
+         BEGIN_NVC0(push, NVC0_3D(TEX_LIMITS(i)), 1);
+         PUSH_DATA (push, 0x54);
+      }
+
+      /* MS sample coordinate offsets: these do not work with _ALT modes ! */
+      BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 2 * 8);
+      PUSH_DATA (push, NVC0_CB_AUX_MS_INFO);
+      PUSH_DATA (push, 0); /* 0 */
+      PUSH_DATA (push, 0);
+      PUSH_DATA (push, 1); /* 1 */
+      PUSH_DATA (push, 0);
+      PUSH_DATA (push, 0); /* 2 */
+      PUSH_DATA (push, 1);
+      PUSH_DATA (push, 1); /* 3 */
+      PUSH_DATA (push, 1);
+      PUSH_DATA (push, 2); /* 4 */
+      PUSH_DATA (push, 0);
+      PUSH_DATA (push, 3); /* 5 */
+      PUSH_DATA (push, 0);
+      PUSH_DATA (push, 2); /* 6 */
+      PUSH_DATA (push, 1);
+      PUSH_DATA (push, 3); /* 7 */
+      PUSH_DATA (push, 1);
+   }
+   BEGIN_NVC0(push, NVC0_3D(LINKED_TSC), 1);
+   PUSH_DATA (push, 0);
+
    PUSH_KICK (push);
 
    screen->tic.entries = CALLOC(4096, sizeof(void *));

src/gallium/drivers/radeonsi/si_shader.c

@@ -911,7 +911,7 @@ static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
 	if (tgsi_type_is_64bit(type)) {
 		LLVMValueRef value2;
 		dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
-				       lp_build_const_int32(gallivm, swizzle + 1));
+				       lp_build_const_int32(gallivm, 1));
 		value2 = build_indexed_load(ctx, ctx->lds, dw_addr, false);
 		return si_llvm_emit_fetch_64bit(bld_base, type, value, value2);
 	}

src/intel/vulkan/.gitignore

@@ -3,4 +3,4 @@
 /anv_entrypoints.h
 /anv_timestamp.h
 /dev_icd.json
-/intel_icd.json
+/intel_icd.*.json

src/intel/vulkan/Makefile.am

@@ -147,13 +147,12 @@ anv_timestamp.h:
 	$(AM_V_GEN) echo "#define ANV_TIMESTAMP \"$(TIMESTAMP_CMD)\"" > $@
 
 BUILT_SOURCES = $(VULKAN_GENERATED_FILES)
-CLEANFILES = $(BUILT_SOURCES) dev_icd.json intel_icd.json
+CLEANFILES = $(BUILT_SOURCES) dev_icd.json intel_icd.@host_cpu@.json
 EXTRA_DIST = \
 	$(top_srcdir)/include/vulkan/vk_icd.h \
 	anv_entrypoints_gen.py \
 	dev_icd.json.in \
-	intel_icd.json.in \
+	intel_icd.json.in
-	intel_icd.json
 
 libvulkan_intel_la_LIBADD = $(VULKAN_LIB_DEPS)
 
@@ -168,7 +167,7 @@ libvulkan_intel_la_LDFLAGS = \
 
 
 icdconfdir = @VULKAN_ICD_INSTALL_DIR@
-icdconf_DATA = intel_icd.json
+icdconf_DATA = intel_icd.@host_cpu@.json
 # The following is used for development purposes, by setting VK_ICD_FILENAMES.
 noinst_DATA = dev_icd.json
 
@@ -177,15 +176,9 @@ dev_icd.json : dev_icd.json.in
 		-e "s#@build_libdir@#${abs_top_builddir}/${LIB_DIR}#" \
 		< $(srcdir)/dev_icd.json.in > $@
 
-if VULKAN_ICD_DRIVER_PATH
+intel_icd.@host_cpu@.json : intel_icd.json.in
-ICD_DRIVER_PATH="${libdir}/libvulkan_intel.so"
-else
-ICD_DRIVER_PATH="libvulkan_intel.so"
-endif
-
-intel_icd.json : intel_icd.json.in
 	$(AM_V_GEN) $(SED) \
-		-e "s#@ICD_DRIVER_PATH@#${ICD_DRIVER_PATH}#" \
+		-e "s#@install_libdir@#${libdir}#" \
 		< $(srcdir)/intel_icd.json.in > $@
 
 # Libvulkan with dummy gem. Used for unit tests.

src/intel/vulkan/intel_icd.json.in

@@ -1,7 +1,7 @@
 {
     "file_format_version": "1.0.0",
     "ICD": {
-        "library_path": "@ICD_DRIVER_PATH@",
+        "library_path": "@install_libdir@/libvulkan_intel.so",
         "abi_versions": "1.0.3"
     }
 }

src/mapi/Makefile.am

@@ -64,6 +64,9 @@ BUILT_SOURCES += shared-glapi/glapi_mapi_tmp.h
 
 lib_LTLIBRARIES += shared-glapi/libglapi.la
 shared_glapi_libglapi_la_SOURCES = $(MAPI_GLAPI_FILES) shared-glapi/glapi_mapi_tmp.h
+shared_glapi_libglapi_la_CFLAGS = \
+	$(AM_CFLAGS) \
+	$(VISIBILITY_CFLAGS)
 shared_glapi_libglapi_la_CPPFLAGS = \
 	$(AM_CPPFLAGS) \
 	-DMAPI_MODE_GLAPI \

src/mapi/glapi/gen/gl_API.xml

@@ -8296,6 +8296,23 @@
 <!-- ARB extension 171 -->
 <xi:include href="ARB_pipeline_statistics_query.xml" xmlns:xi="http://www.w3.org/2001/XInclude"/>
 
+<category name="es3.2">
+    <!-- This should be in es_EXT, but this file is included first and
+         the alias doesn't work otherwise. -->
+    <function name="PrimitiveBoundingBox" es2="3.2" desktop="false">
+        <param name="minX" type="GLfloat"/>
+        <param name="minY" type="GLfloat"/>
+        <param name="minZ" type="GLfloat"/>
+        <param name="minW" type="GLfloat"/>
+        <param name="maxX" type="GLfloat"/>
+        <param name="maxY" type="GLfloat"/>
+        <param name="maxZ" type="GLfloat"/>
+        <param name="maxW" type="GLfloat"/>
+    </function>
+
+    <function name="BlendBarrier" es2="3.2"/>
+</category>
+
 <category name="KHR_blend_equation_advanced" number="174">
     <enum name="BLEND_ADVANCED_COHERENT_KHR"              value="0x9285"/>
 
@@ -8316,7 +8333,6 @@
     <enum name="HSL_COLOR_KHR"                            value="0x92AF"/>
     <enum name="HSL_LUMINOSITY_KHR"                       value="0x92B0"/>
 
-    <function name="BlendBarrier" es2="3.2"/>
     <function name="BlendBarrierKHR" alias="BlendBarrier" es2="2.0"/>
 </category>
 
@@ -8332,18 +8348,6 @@
         <size name="Get" mode="get"/>
     </enum>
 
-    <!-- This should be in es_EXT, but this file is included first and
-         the alias doesn't work otherwise. -->
-    <function name="PrimitiveBoundingBox" es2="3.2" desktop="false">
-        <param name="minX" type="GLfloat"/>
-        <param name="minY" type="GLfloat"/>
-        <param name="minZ" type="GLfloat"/>
-        <param name="minW" type="GLfloat"/>
-        <param name="maxX" type="GLfloat"/>
-        <param name="maxY" type="GLfloat"/>
-        <param name="maxZ" type="GLfloat"/>
-        <param name="maxW" type="GLfloat"/>
-    </function>
     <function name="PrimitiveBoundingBoxARB" alias="PrimitiveBoundingBox">
         <param name="minX" type="GLfloat"/>
         <param name="minY" type="GLfloat"/>

src/mapi/glapi/gen/static_data.py

@@ -484,17 +484,22 @@ functions = [
     "BindVertexBuffer",
     "BindVertexBuffers",
     "Bitmap",
+    "BlendBarrier",
     "BlendColor",
     "BlendColorEXT",
     "BlendEquation",
     "BlendEquationEXT",
+    "BlendEquationi",
     "BlendEquationiARB",
     "BlendEquationSeparate",
+    "BlendEquationSeparatei",
     "BlendEquationSeparateiARB",
     "BlendFunc",
+    "BlendFunci",
     "BlendFunciARB",
     "BlendFuncSeparate",
     "BlendFuncSeparateEXT",
+    "BlendFuncSeparatei",
     "BlendFuncSeparateiARB",
     "BlitFramebuffer",
     "BufferData",
@@ -825,6 +830,7 @@ functions = [
     "GetFramebufferAttachmentParameteriv",
     "GetFramebufferAttachmentParameterivEXT",
     "GetFramebufferParameteriv",
+    "GetGraphicsResetStatus",
     "GetGraphicsResetStatusARB",
     "GetHandleARB",
     "GetHistogram",
@@ -864,8 +870,11 @@ functions = [
     "GetnSeparableFilterARB",
     "GetnTexImageARB",
     "GetnUniformdvARB",
+    "GetnUniformfv",
     "GetnUniformfvARB",
+    "GetnUniformiv",
     "GetnUniformivARB",
+    "GetnUniformuiv",
     "GetnUniformuivARB",
     "GetObjectLabel",
     "GetObjectParameterfvARB",
@@ -1160,6 +1169,7 @@ functions = [
     "Orthof",
     "Orthox",
     "PassThrough",
+    "PatchParameteri",
     "PauseTransformFeedback",
     "PixelMapfv",
     "PixelMapuiv",
@@ -1191,6 +1201,7 @@ functions = [
     "PopDebugGroup",
     "PopMatrix",
     "PopName",
+    "PrimitiveBoundingBox",
     "PrimitiveRestartIndex",
     "PrimitiveRestartIndexNV",
     "PrimitiveRestartNV",
@@ -1273,6 +1284,7 @@ functions = [
     "RasterPos4s",
     "RasterPos4sv",
     "ReadBuffer",
+    "ReadnPixels",
     "ReadnPixelsARB",
     "ReadPixels",
     "Rectd",

src/mesa/state_tracker/st_draw.c

@@ -205,8 +205,19 @@ st_draw_vbo(struct gl_context *ctx,
       /* The VBO module handles restart for the non-indexed GLDrawArrays
        * so we only set these fields for indexed drawing:
        */
-      info.primitive_restart = ctx->Array._PrimitiveRestart;
+      if (ctx->Array._PrimitiveRestart) {
-      info.restart_index = _mesa_primitive_restart_index(ctx, ib->type);
+         info.restart_index = _mesa_primitive_restart_index(ctx, ib->type);
+
+         /* Enable primitive restart only when the restart index can have an
+          * effect. This is required for correctness in radeonsi VI support,
+          * though other hardware may also benefit from taking a faster,
+          * non-restart path when possible.
+          */
+         if ((ibuffer.index_size >= 4) ||
+             (ibuffer.index_size >= 2 && info.restart_index <= 0xffff) ||
+             (info.restart_index <= 0xff))
+            info.primitive_restart = true;
+      }
    }
    else {
       /* Transform feedback drawing is always non-indexed. */

src/mesa/state_tracker/st_glsl_to_tgsi.cpp

@@ -55,6 +55,7 @@
 #include "st_glsl_types.h"
 #include "st_nir.h"
 
+#include <algorithm>
 
 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) |    \
                            (1 << PROGRAM_CONSTANT) |     \
@@ -2880,6 +2881,7 @@ glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *
 
    assert(type->is_scalar() || type->is_vector());
 
+   l->type = type->base_type;
    r->type = type->base_type;
    if (cond) {
       st_src_reg l_src = st_src_reg(*l);
@@ -2940,10 +2942,12 @@ glsl_to_tgsi_visitor::visit(ir_assignment *ir)
       } else if (ir->write_mask == 0) {
          assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
 
-         if (ir->lhs->type->is_array() || ir->lhs->type->is_matrix()) {
+         unsigned num_elements = ir->lhs->type->without_array()->vector_elements;
-            unsigned num_elements = ir->lhs->type->without_array()->vector_elements;
+
+         if (num_elements) {
             l.writemask = u_bit_consecutive(0, num_elements);
          } else {
+            /* The type is a struct or an array of (array of) structs. */
             l.writemask = WRITEMASK_XYZW;
          }
       } else {
@@ -5870,6 +5874,29 @@ emit_compute_block_size(const struct gl_program *program,
                        cp->LocalSize[2]);
 }
 
+struct sort_inout_decls {
+   bool operator()(const struct inout_decl &a, const struct inout_decl &b) const {
+      return mapping[a.mesa_index] < mapping[b.mesa_index];
+   }
+
+   const GLuint *mapping;
+};
+
+/* Sort the given array of decls by the corresponding slot (TGSI file index).
+ *
+ * This is for the benefit of older drivers which are broken when the
+ * declarations aren't sorted in this way.
+ */
+static void
+sort_inout_decls_by_slot(struct inout_decl *decls,
+                         unsigned count,
+                         const GLuint mapping[])
+{
+   sort_inout_decls sorter;
+   sorter.mapping = mapping;
+   std::sort(decls, decls + count, sorter);
+}
+
 /**
  * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
  * \param program  the program to translate
@@ -5942,6 +5969,8 @@ st_translate_program(
    case PIPE_SHADER_GEOMETRY:
    case PIPE_SHADER_TESS_EVAL:
    case PIPE_SHADER_TESS_CTRL:
+      sort_inout_decls_by_slot(program->inputs, program->num_inputs, inputMapping);
+
       for (i = 0; i < program->num_inputs; ++i) {
          struct inout_decl *decl = &program->inputs[i];
          unsigned slot = inputMapping[decl->mesa_index];
@@ -5994,6 +6023,8 @@ st_translate_program(
    case PIPE_SHADER_TESS_EVAL:
    case PIPE_SHADER_TESS_CTRL:
    case PIPE_SHADER_VERTEX:
+      sort_inout_decls_by_slot(program->outputs, program->num_outputs, outputMapping);
+
       for (i = 0; i < program->num_outputs; ++i) {
          struct inout_decl *decl = &program->outputs[i];
          unsigned slot = outputMapping[decl->mesa_index];

src/vulkan/wsi/wsi_common_wayland.c

@@ -635,11 +635,15 @@ wsi_wl_image_init(struct wsi_wl_swapchain *chain,
    wl_display_roundtrip(chain->display->display);
    close(fd);
 
+   if (!image->buffer)
+      goto fail_image;
+
    wl_proxy_set_queue((struct wl_proxy *)image->buffer, chain->queue);
    wl_buffer_add_listener(image->buffer, &buffer_listener, image);
 
    return VK_SUCCESS;
 
+fail_image:
    chain->base.image_fns->free_wsi_image(vk_device, pAllocator,
                                          image->image, image->memory);