Compare commits

..

198 Commits

Author SHA1 Message Date
Emil Velikov
bdfd5658e7 docs: add sha256 checksums for 17.0.7
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-01 11:41:56 +01:00
Emil Velikov
46cc7a1746 docs: add release notes for 17.0.7
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-01 11:34:38 +01:00
Emil Velikov
10be0edc8c Update version to 17.0.7
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-01 11:30:44 +01:00
Bartosz Tomczyk
4242dfa330 mesa: Avoid leaking surface in st_renderbuffer_delete
v2: add comment in code

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100741
Fixes: a5e733c6b5 mesa: drop current draw/read buffer when ctx is released
Reviewed-by: Rob Clark <robdclark@gmail.com> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit fd6c2a3f3e)
[Emil Velikov: s/CurrentClientDispatch/CurrentDispatch/]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/mesa/main/context.c
2017-05-31 01:46:21 +01:00
Emil Velikov
4c3b89a45f egl/wayland: select the format based on the interface used
Rather than misleadingly depending on DRI2 for the WL_DRM vs WL_SHM
formats, use the wl_drm and wl_shm interface respectively.

Fixes: a1727aa75e ("egl/wayland: Don't use DRM format codes for SHM")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 6ef0fc400c)
2017-05-31 01:43:36 +01:00
Emil Velikov
360c0e74cc radv: automake: list shared libraries after the static ones
Analogous to previous commit - the compiler can discard xcb + wayland
libs, since there is no user (the static libraries) before it on the
command line.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
(cherry picked from commit 2b6ad89d86)
2017-05-31 01:42:22 +01:00
Emil Velikov
b196e01edc anv: automake: list shared libraries after the static ones
The compiler can discard the shared ones from the link chain, since
there is no user (the static libraries) before it on the command line.

Cc: mesa-stable@lists.freedesktop.org
Reported-by: Laurent Carlier <lordheavym@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
(cherry picked from commit 3e8790bff0)
2017-05-31 01:40:02 +01:00
Jason Ekstrand
8e614856e3 i965: Round copy size to the nearest block in intel_miptree_copy
The width and height of the copy don't have to be aligned to the block
size if they specify the right or bottom edges of the image.  (See also
the comment and asserts right above).  We need to round them up when we
do the division in order to get it 100% right.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 0901d0bc4c)
2017-05-31 01:38:17 +01:00
Jason Ekstrand
6bc8491252 i965/blorp: Do and end-of-pipe sync on both sides of fast-clear ops
We've discovered in the Vulkan driver that simply doing the end-of-pipe
sync afterwards is insufficient.  The specific requirement stated in the
PRM is that you have to do one every time you transition between the
tree modes of "clear", "render", and "resolve".  This is GL, so we could
track it but any attempt to do so would most likely get it wrong.  For
now, it's easier to just assume that every fast-clear op is an island
and do the sync both before and after.

This also removes the unneeded flush and stall after slow-clear
operations.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 441cd7a81d)
2017-05-31 01:38:12 +01:00
Daniel Stone
8008bc8cba egl/wayland: Ensure we get a back buffer
Commit 9ca6711faa changed the Wayland winsys to only block for the
frame callback inside SwapBuffers, rather than get_back_bo. get_back_bo
would perform a single non-blocking Wayland event dispatch, to try to
find any release events which we had pulled off the wire but not
actually processed. The blocking dispatch was moved to SwapBuffers.

This removed a guarantee that we would've processed all events inside
get_back_bo(), and introduced a failure whereby the server could've sent
a buffer release event, but we wouldn't have read it. In clients
unconstrained by SwapInterval (rendering ~as fast as possible), which
were being displayed directly without composition (buffer release delayed),
this could lead to get_back_bo() failing because there were no free
buffers available to it.

The drawing rightly failed, but this was papered over because of the
path in eglSwapBuffers() which attempts to guarantee a BO, in order to
support calling SwapBuffers twice in a row with no rendering actually
having been performed.

Since eglSwapBuffers will perform a blocking dispatch of Wayland
events, a buffer release would have arrived by that point, and we
could then choose a buffer to post to the server. The effect was that
frames were displayed out-of-order, since we grabbed a frame with random
past content to display to the compositor.

Ideally get_back_bo() failing should store a failure flag inside the
surface and cause the next SwapBuffers to fail, but for the meantime,
restore the correct behaviour such that get_back_bo() no longer fails.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reported-by: Eero Tamminen <eero.t.tamminen@intel.com>
Acked-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98833
Fixes: 9ca6711faa ("Revert "wayland: Block for the frame callback in get_back_bo not dri2_swap_buffers"")
(cherry picked from commit 1f2d0093bf)
2017-05-26 10:58:09 +01:00
Daniel Stone
ff3aa6a877 egl/wayland: Use per-surface event queues
During display initialisation, we need a separate event queue to handle
the registry events, which is correctly handled. But we also need
separate per-surface event queues to handle swapchain-related events,
such as surface frame events and buffer release events. This avoids two
surfaces from the same EGLDisplay, both current on separate threads,
dispatching each other's events.

Create separate per-surface event queues, create wl_surface and wl_drm
proxy wrapper objects per surface, so we eliminate the race around
sending events to the wrong queue. swrast buffers do not need a
dedicated proxy wrapper, as the wl_shm_pool used to create the
wl_buffers, being transient, can itself be assigned to a queue.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 36b9976e1f ("egl/wayland: Avoid race conditions when on non-main thread")
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 03dd9a88b0)

Squashed with:

egl/wayland: verify event queue was allocated

We're already verified that 'window' wasn't NULL, I'm guessing this
allocation error is about the newly created queue.

CID: 1409754
Fixes: 03dd9a88b0 ("egl/wayland: Use per-surface event queues")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 30dc56bb5b)
2017-05-26 10:55:09 +01:00
Daniel Stone
701a10b56e egl/wayland: Don't open-code roundtrip
wl_display_roundtrip_queue() exists and can replace roundtrip(). The
API was introduced with wayland 1.6, while we currently require 1.11.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 8118bc269f)
2017-05-26 10:55:09 +01:00
Daniel Stone
afbe5bf434 vulkan/wsi/wayland: Use proxy wrappers for swapchain
Though most swapchain operations used a queue, they were racy in that
the object was created with the queue only set later, meaning that its
event could potentially be dispatched from the default queue in between
these two steps.

Use proxy wrappers to avoid this race, also assigning wl_buffers created
for the swapchain to the event queue.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 5034c61558)
[Emil Velikov: wsi_wl_swapchain is missing surface_version, move image_count]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/vulkan/wsi/wsi_common_wayland.c

Squahed with:

vulkan/wsi/wayland: Fix proxy wrappers for swapchain recreation

Before the swapchain event queue is destroyed, all proxy objects that reference
it must be dropped. Otherwise we risk a use-after-free if a frame callback event
or buffer release events are received afterwards.
This happens when an application destroys and recreates a swapchain in FIFO
mode between two frames without using the VkSwapchainCreateInfoKHR::oldSwapchain
mechanism to keep the old swapchain until after the next redraw.

Fixes: 5034c61558 ("vulkan/wsi/wayland: Use proxy wrappers for swapchain")
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 1586768e74)
[Emil Velikov: image_count is not in base]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/vulkan/wsi/wsi_common_wayland.c
2017-05-26 10:54:56 +01:00
Daniel Stone
55e66999fc vulkan/wsi/wayland: Use per-display event queue
Calling random callbacks on the display's event queue is hostile, as
we may call into client code when it least expects it. Create our own
event queue, one per wsi_wl_display, and use that for the registry.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit c902a1957d)
2017-05-26 10:31:13 +01:00
Daniel Stone
f7cc55dce2 vulkan/wsi/wayland: Remove roundtrip when creating image
There's no need to call wl_display_roundtrip() after trying to create a
buffer through wl_drm; if it succeeds then everything is fine, and if it
fails, then we get a fatal protocol error so can't recover anyway.

Additionally, doing a roundtrip on the default / main application queue,
is destructive anyway, so would need to be its own queue.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit afe8c8a299)
2017-05-26 10:31:13 +01:00
Daniel Stone
b4a82e7f47 vulkan: Fix Wayland uninitialised registry
Untangle the exit cleanup paths so we don't try to use the registry
variable before it's been initialised.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit d9a8bba7f4)
2017-05-26 10:31:13 +01:00
Ilia Mirkin
6dd570fa57 nvc0/ir: SHLADD's middle source must be an immediate
The instruction encodings only allow for immediates. Don't try to
replace a zero (which is dumb to have in that op in any case) with RZ.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 82e77d4e44)
2017-05-26 10:31:13 +01:00
Emil Velikov
33f3ae1df2 st/va: fix misplaced closing bracket
It's been like this since the code was introduced.

Fixes: 86eb4131a9 (st/va: add headless support, i.e. VA_DISPLAY_DRM)
Cc: <mesa-stable@lists.freedesktop.org>
Cc: Julien Isorce <julien.isorce@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit aaea53c2c0)
2017-05-26 10:31:13 +01:00
Nanley Chery
87d16afa6f i965/formats: Update the three-channel DXT1 mappings
The procedure for decompressing an opaque DXT1 OpenGL format is
dependant on the comparison of two colors stored in the first 32 bits of
the compressed block. Here's the specified OpenGL behavior for
reference:

   The RGB color for a texel at location (x,y) in the block is given by:

      RGB0,              if color0 > color1 and code(x,y) == 0
      RGB1,              if color0 > color1 and code(x,y) == 1
      (2*RGB0+RGB1)/3,   if color0 > color1 and code(x,y) == 2
      (RGB0+2*RGB1)/3,   if color0 > color1 and code(x,y) == 3

      RGB0,              if color0 <= color1 and code(x,y) == 0
      RGB1,              if color0 <= color1 and code(x,y) == 1
      (RGB0+RGB1)/2,     if color0 <= color1 and code(x,y) == 2
      BLACK,             if color0 <= color1 and code(x,y) == 3

The sampling operation performed on an opaque DXT1 Intel format essentially
hard-codes the comparison result of the two colors as color0 > color1.
This means that the behavior is incompatible with OpenGL. This is stated
in the SKL PRM, Vol 5: Memory Views:

   Opaque Textures (DXT1_RGB)
      Texture format DXT1_RGB is identical to DXT1, with the exception that the
      One-bit Alpha encoding is removed. Color 0 and Color 1 are not compared, and
      the resulting texel color is derived strictly from the Opaque Color Encoding.
      The alpha channel defaults to 1.0.

      Programming Note
      Context: Opaque Textures (DXT1_RGB)
      The behavior of this format is not compliant with the OGL spec.

The opaque and non-opaque DXT1 OpenGL formats are specified to be
decoded in exactly the same way except the BLACK value must have a
transparent alpha channel in the latter. Use the four-channel BC1 Intel
formats with the alpha set to 1 to provide the behavior required by the
spec. Note that the alpha is already set to 1 for RGB formats in
brw_get_texture_swizzle().

v2: Provide a more detailed commit message (Kenneth Graunke).
v3: Ensure the alpha channel is set to 1 for DXT1 formats.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100925
Cc: <mesa-stable@lists.freedesktop.org>
Acked-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 688ddb85c8)
[Emil Velikov: attribute for BRW to ISL format rename]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/mesa/drivers/dri/i965/brw_surface_formats.c
2017-05-26 10:29:03 +01:00
Nanley Chery
cbd4721621 anv/formats: Update the three-channel BC1 mappings
The procedure for decompressing an opaque BC1 Vulkan format is dependant on the
comparison of two colors stored in the first 32 bits of the compressed block.
Here's the specified OpenGL (and Vulkan) behavior for reference:

   The RGB color for a texel at location (x,y) in the block is given by:

      RGB0,              if color0 > color1 and code(x,y) == 0
      RGB1,              if color0 > color1 and code(x,y) == 1
      (2*RGB0+RGB1)/3,   if color0 > color1 and code(x,y) == 2
      (RGB0+2*RGB1)/3,   if color0 > color1 and code(x,y) == 3

      RGB0,              if color0 <= color1 and code(x,y) == 0
      RGB1,              if color0 <= color1 and code(x,y) == 1
      (RGB0+RGB1)/2,     if color0 <= color1 and code(x,y) == 2
      BLACK,             if color0 <= color1 and code(x,y) == 3

The sampling operation performed on an opaque DXT1 Intel format essentially
hard-codes the comparison result of the two colors as color0 > color1. This
means that the behavior is incompatible with OpenGL and Vulkan. This is stated
in the SKL PRM, Vol 5: Memory Views:

   Opaque Textures (DXT1_RGB)
      Texture format DXT1_RGB is identical to DXT1, with the exception that the
      One-bit Alpha encoding is removed. Color 0 and Color 1 are not compared, and
      the resulting texel color is derived strictly from the Opaque Color Encoding.
      The alpha channel defaults to 1.0.

      Programming Note
      Context: Opaque Textures (DXT1_RGB)
      The behavior of this format is not compliant with the OGL spec.

The opaque and non-opaque BC1 Vulkan formats are specified to be decoded in
exactly the same way except the BLACK value must have a transparent alpha
channel in the latter. Use the four-channel BC1 Intel formats with the alpha
set to 1 to provide the behavior required by the spec.

v2 (Kenneth Graunke):
- Provide a more detailed commit message.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100925
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 56458cb168)
2017-05-26 10:21:32 +01:00
Tom Stellard
ca697dda60 gallivm: Make sure module has the correct data layout when pass manager runs
The datalayout for modules was purposely not being set in order to work around
the fact that the ExecutionEngine requires that the module's datalayout
matches the datalayout of the TargetMachine that the ExecutionEngine is
using.

When the pass manager runs on a module with no datalayout, it uses
the default datalayout which is little-endian.  This causes problems
on big-endian targets, because some optimizations that are legal on
little-endian or illegal on big-endian.

To resolve this, we set the datalayout prior to running the pass
manager, and then clear it before creating the ExectionEngine.

This patch fixes a lot of piglit tests on big-endian ppc64.

Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 14e525a4d7)
2017-05-26 10:21:32 +01:00
Chad Versace
b6ad01c7a2 egl: Partially revert 23c86c74, fix eglMakeCurrent
Fixes regressions in Android CtsVerifier.apk on Intel Chrome OS devices
due to incorrect error handling in eglMakeCurrent. See below on how to
confirm the regression is fixed.

This partially reverts

    commit 23c86c74cc
    Author:  Chad Versace <chadversary@chromium.org>
    Subject: egl: Emit error when EGLSurface is lost

The problem with commit 23c86c74 is that, once an EGLSurface became
lost, the app could never unbind the bad surface. Each attempt to unbind
the bad surface with eglMakeCurrent failed with EGL_BAD_CURRENT_SURFACE.

Specificaly, the bad commit added the error handling below. #2 and #3
were right, but #1 was wrong.

    1. eglMakeCurrent emits EGL_BAD_CURRENT_SURFACE if the calling
       thread has unflushed commands and either previous surface is no
       longer valid.

    2. eglMakeCurrent emits EGL_BAD_NATIVE_WINDOW if either new surface
       is no longer valid.

    3. eglSwapBuffers emits EGL_BAD_NATIVE_WINDOW if the swapped surface
       is no longer valid.

Whe I wrote the bad commit, I misunderstood the EGL spec language
for #1. The correct behavior is, if I understand correctly now, is
below. This patch doesn't implement the correct behavior, though, it
just reverts the broken behavior.

    - Assume a bound EGLSurface is no longer valid.
    - Assume the bound EGLContext has unflushed commands.
    - The app calls eglMakeCurrent. The spec requires eglMakeCurrent to
      implicitly flush. After flushing, eglMakeCurrent emits
      EGL_BAD_CURRENT_SURFACE and does *not* alter the thread's
      current bindings.
    - If the app calls eglMakeCurrent again, and the app inserts no
      commands into the GL command stream between the two eglMakeCurrent
      calls, then this second eglMakeCurrent succeeds without emitting an
      error.

How to confirm this fixes the regression:

    Download android-cts-verifier-7.1_r5-linux_x86-x86.zip from
    source.android.com, unpack, and `adb install CtsVerifier.apk`.
    Run test "Projection Cube". Click the Pass button (a
    green checkmark). Then run test "Projection Widget". Confirm that
    widgets are visible and that logcat does not complain about
    eglMakeCurrent failure.

    Then confirm there are no regressions in the cts-traded module that
    commit 263243b1 fixed:

        cts-tf > run cts --skip-preconditions --skip-device-info \
                 -m CtsCameraTestCases \
                 -t android.hardware.camera2.cts.RobustnessTest

    Tested with Chrome OS board "reef".

Fixes: 23c86c74 (egl: Emit error when EGLSurface is lost)
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Nicolas Boichat <drinkcat@chromium.org>
Cc: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 8f62d21bd7)
2017-05-26 10:21:32 +01:00
Samuel Iglesias Gonsálvez
8be7de2235 i965/vec4: load dvec3/4 uniforms first in the push constant buffer
Reorder the uniforms to load first the dvec4-aligned variables in the
push constant buffer and then push the vec4-aligned ones. It takes
into account that the relocated uniforms should be aligned to their
channel size.

This fixes a bug were the dvec3/4 might be loaded one part on a GRF and
the rest in next GRF, so the region parameters to read that could break
the HW rules.

v2:
- Fix broken logic.
- Add a comment to explain what should be needed to optimise the usage
  of the push constant buffer slots, as this patch does not pack the
  uniforms.

v3:
- Implemented the push constant buffer usage optimization.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit e69e5c7006)
2017-05-26 10:21:32 +01:00
Samuel Iglesias Gonsálvez
b79233537c i965/vec4: fix swizzle and writemask when loading an uniform with constant offset
It was setting XYWZ swizzle and writemask to all uniforms, no matter if they
were a vector or scalar, so this can lead to problems when loading them
to the push constant buffer.

Moreover, 'shift' calculation was designed to calculate the offset in
DWORDS, but it doesn't take into account DFs, so the calculated swizzle
for the later ones was wrong.

The indirect case is not changed because MOV INDIRECT will write
to all components. Added an assert to verify that these uniforms
are aligned.

v2:
- Fix 'shift' calculation (Curro)
- Set both swizzle and writemask.
- Add assert(shift == 0) for the indirect case.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 8aa6ada838)
2017-05-26 10:21:32 +01:00
Samuel Iglesias Gonsálvez
98f30c7117 i965/vec4/gs: restore the uniform values which was overwritten by failed vec4_gs_visitor execution
We are going to add a packing feature to reduce the usage of the push
constant buffer. One of the consequences is that 'nr_params' would be
modified by vec4_visitor's run call, so we need to restore it if one of
them failed before executing the fallback ones. Same thing happens to the
uniforms values that would be reordered afterwards.

Fixes GL45-CTS.arrays_of_arrays_gl.InteractionFunctionCalls2 when
the dvec4 alignment and packing patch is applied.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 354f7f2cb9)
2017-05-26 10:21:32 +01:00
Eric Anholt
b50e9022bd vc4: Don't allocate new BOs to avoid synchronization when they're shared.
If X11 did a software fallback to the entire screen, we would throw out
the BO the screen is scanning out from and allocate a new one.

Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit e8ea42d245)
2017-05-26 10:21:32 +01:00
Hans de Goede
356b0b2ba1 glxglvnddispatch: Add missing dispatch for GetDriverConfig
Together with some fixes to xdriinfo this fixes xdriinfo not working
with glvnd.

Since apps (xdriinfo) expect GetDriverConfig to work without going to
need through the dance to setup a glxcontext (which is a reasonable
expectation IMHO), the dispatch for this ends up significantly different
then any other dispatch function.

This patch gets the job done, but I'm not really happy with how this
patch turned out, suggestions for a better fix are welcome.

Cc: Kyle Brenneman <kbrenneman@nvidia.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 84f764a759)
2017-05-26 10:21:32 +01:00
Pohjolainen, Topi
968f0c6574 intel/isl/gen7: Use stencil vertical alignment of 8 instead of 4
The reasoning Chad gave in the comment for choosing a valign of 4 is
entirely bunk.  The fact that you have to multiply pitch by 2 is
completely unrelated to the halign/valign parameters used for texture
layout.  (Not completely unrelated.  W-tiling is just Y-tiling with a
bit of extra swizzling which turns 8x8 W-tiled chunks into 16x4 y-tiled
chunks so it makes everything easier if miplevels are always aligned to
8x8.)  The fact that RENDER_SURFACE_STATE::SurfaceVerticalAlignmet
doesn't have a VALIGN_8 option doesn't matter since this is gen7 and you
can't do stencil texturing anyway.

v2 (Jason Ekstrand):
 - Delete most of Chad's comment and add a more descriptive commit
   message.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit 236f17a9f7)
2017-05-26 10:21:32 +01:00
Lucas Stach
cebba270fa etnaviv: stop oversizing buffer resources
PIPE_BUFFER is a target enum, not a binding. This caused the driver to
up-align the height of buffer resources, leading to largely oversizing
those resources. This is especially bad, as the buffer resources used
by the upload manager are already 1MB in size. Height alignment meant
that those would result in 4 to 8MB big BOs.

Fixes: c9e8b49b88 ("etnaviv: gallium driver for Vivante GPUs")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit 8173d7d9e8)
2017-05-26 10:21:32 +01:00
Eric Anholt
cb8a159e22 renderonly: Initialize fields of struct winsys_handle.
vc4 was rejecting renderonly's import, because the offset field was
nonzero.

Fixes: 848b49b288 ("gallium: add renderonly library")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit c98f03c6eb)
2017-05-26 10:16:11 +01:00
Andres Gomez
6a680243fc docs: add sha256 checksums for 17.0.6
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-05-13 02:14:17 +03:00
Andres Gomez
08abf3a2a2 docs: add release notes for 17.0.6
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-05-12 23:48:47 +03:00
Andres Gomez
ef158128fd Update version to 17.0.6
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-05-12 23:39:10 +03:00
Andres Gomez
8d082a128c cherry-ignore: rejected commits
stable: rejected commits.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-05-12 22:08:00 +03:00
Andres Gomez
ca413183e3 cherry-ignore: fix regression in descriptor set freeing.
fixes: Fixes earlier commit 126d5ad which did not land in branch

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-05-12 21:54:57 +03:00
Andres Gomez
33f4dc1caf cherry-ignore: 17.1 nominations only
stable: 17.1 nominations only.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-05-12 21:54:57 +03:00
Marek Olšák
eaddabb697 radeonsi: apply the tess+GS hang workaround to Polaris12 as well
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit ee5908396e)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/gallium/drivers/radeonsi/si_state_draw.c
2017-05-12 21:54:56 +03:00
Dave Airlie
6c9734a13d radv: enable POLARIS12 support.
This just adds the chip in the right places.

We don't set the partial_vs_wave workaround, as radeonsi
doesn't, but have to confirm it's not required.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a096d8d3f7)
[Andres Gomez: dropped code that didn't make it for 17.0]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/amd/vulkan/radv_device.c
2017-05-12 21:54:56 +03:00
Nicolai Hähnle
3dea3a38bd radeonsi: fix gl_PrimitiveID in tessellation with instanced draws on SI
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit f16b755863)
2017-05-12 21:54:56 +03:00
Rob Clark
f01462c08c freedreno/a3xx: fix hang w/ large render targets and small gmem
Possibly other gen's have a similar limit.  Fixes glmark2 -b shadow
with larger resolutions on devices with small gmem (for example,
fullscreen 1080p on 8x16/db410c).

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit 6050d5bf3d)
2017-05-12 21:54:56 +03:00
Ben Boeckel
576236f3f2 scons: update for LLVM 4.0
LLVMDemangle, LLVMGlobalISel, and LLVMDebugInfoMSF are new.

Also update the comment to add irreader to the list of components.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chuck Atkins <chuck.atkins@kitware.com>
Signed-off-by: Ben Boeckel <ben.boeckel@kitware.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
(cherry picked from commit 58f51f0754)
2017-05-12 21:54:56 +03:00
Johnson Lin
dd10f220cf nir/lower_tex: Fix minor error in YUV color conversion matrix
The matrix used for YCbCr to RGB is listed in:

    https://en.wikipedia.org/wiki/YCbCr

There was an error in converting the offsets from integers to unorm
values: 0.0625=16/256 should be 16.0/255,and 0.5=128.0/256 should be
128.0/255.  With this fix, the CSC result is bit aligned with wikipedia's
conversion result and FFMPeg's result.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100854
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
(cherry picked from commit a6fb943f3e)
2017-05-12 21:54:56 +03:00
Chad Versace
d9164fd427 egl/android: Mark surface as lost when dequeueBuffer fails
This ensures that future calls to eglSwapBuffers and eglMakeCurrent emit
an error.

This patch is part of a series for fixing
android.hardware.camera2.cts.RobustnessTest#testAbandonRepeatingRequestSurface
on Chrome OS x86 devices.

Cc: mesa-stable@lists.freedesktop.org
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit e5eace5868)

Squashed with commit:

egl/android: Set EGLSurface.Lost to EGL_TRUE/EGL_FALSE

Lost is an EGLBoolean, so we should assign it to EGL_TRUE/EGL_FALSE,
not true/false.

Fixes: e5eace5868 ("egl/android: Mark surface as lost when dequeueBuffer fails")
Fixes: 0212db3504 ("egl/android: Cancel any outstanding ANativeBuffer in surface destructor")
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit 63b12b0c77)
2017-05-12 21:54:56 +03:00
Chad Versace
2548f73c0d egl/android: Cancel any outstanding ANativeBuffer in surface destructor
That is, call ANativeWindow::cancelBuffer in droid_destroy_surface().

This should prevent application deadlock when the app destroys the
EGLSurface after EGL has acquired a buffer from SurfaceFlinger
(ANativeWindow::dequeueBuffer) but before EGL has released it
(ANativeWindow::enqueueBuffer).

This patch is part of a series for fixing
android.hardware.camera2.cts.RobustnessTest#testAbandonRepeatingRequestSurface
on Chrome OS x86 devices.

Cc: mesa-stable@lists.freedesktop.org
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 0212db3504)
2017-05-12 21:54:56 +03:00
Chad Versace
d231ed73c6 egl: Emit error when EGLSurface is lost
Add a new bool, _EGLSurface::Lost, and check it in eglMakeCurrent and
eglSwapBuffers. The EGL 1.5 spec says that those functions emit errors
when the native surface is no longer valid.

This patch just updates core EGL. No driver sets _EGLSurface::Lost yet.

I discovered that Mesa failed to detect lost surfaces while debugging an
Android CTS camera test,
android.hardware.camera2.cts.RobustnessTest#testAbandonRepeatingRequestSurface.
This patch doesn't fix the test though, though, because the test expects
EGL_BAD_SURFACE when the surface becomes lost, and this patch actually
complies with the EGL spec. If I interpreted the EGL spec correctly,
EGL_BAD_NATIVE_WINDOW or EGL_BAD_CURRENT_SURFACE is the correct error.

Cc: mesa-stable@lists.freedesktop.org
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 23c86c74cc)
2017-05-12 21:54:56 +03:00
Emil Velikov
aed1f50263 glx: glX_proto_send.py: use correct compile guard GLX_INDIRECT_RENDERING
The code itself has nothing to do with shared glapi, thus having it
behind GLX_SHARED_GLAPI is misleading. Use GLX_INDIRECT_RENDERING
instead.

The latter macro is set at global scope by the Autotools and Scons build
systems.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 6177d60a37)
2017-05-12 21:54:56 +03:00
Emil Velikov
09e4f5a960 mesa/dri: always link against shared glapi
Analogous to previous commit. Check with the extensive commit
description and bug report referenced.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 51accecce7)
2017-05-12 21:54:56 +03:00
Emil Velikov
5c9a9ba983 gallium/dri: always link against shared glapi
In the early days of Xorg and Mesa we had multiple providers of the
GLAPI. All of those were the ones responsible for dlopening the DRI
module. Hence it was perfectly fine, and actually expected, for the DRI
modules to have unresolved symbols.

Since then we've moved the API to a separate shared library and no other
libraries provide the symbols.

Here comes the picky part:
It's possible that one uses old Xorg (where libglx.so provides the
GLAPI) and new Mesa (with DRI modules linking against libglapi.so).

That should still work, since the the libglx.so symbols will take
precedence over the libglapi.so ones.

I've verified this while running 1.14 series Xorg alongside this (and
next) patch.

It may seem a bit fragile, but that's of reasonably OK since all of the
affected Xorg versions have been EOL for years.

The final one being the 1.14 series, which saw its final bug fix release
1.14.7 in June 2014.

To ensure that the binaries do not have unresolved symbols add
-no-undefined and $(LD_NO_UNDEFINED), just like we do everywhere else
throughout mesa.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98428
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 79a26b663a)
2017-05-12 21:54:55 +03:00
Adam Jackson
f2d6c6308f egl/platform/drm: Don't take display ownership until gbm is initialized
If the gbm_create_device() call here actually did fail, any subsequent
eglTerminate on the display would segfault.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
(cherry picked from commit f258815c7d)
2017-05-12 21:54:55 +03:00
Samuel Iglesias Gonsálvez
a2c24ad9b5 anv: vkBindImageMemory() should return VK_ERROR_OUT_OF_{HOST,DEVICE}_MEMORY on failure
According to the spec we get VK_ERROR_OUT_OF_HOST_MEMORY or
VK_ERROR_OUT_OF_DEVICE_MEMORY on vkBindImageMemory failure.

Fixes returned value changed by b546c9d.

Fixes: b546c9d ("anv: anv_gem_mmap() returns MAP_FAILED as mapping error")
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 939b015736)
2017-05-12 21:54:55 +03:00
Samuel Iglesias Gonsálvez
ce336813f8 anv: anv_gem_mmap() returns MAP_FAILED as mapping error
Take it into account when checking if the mapping failed.

v2:
- Remove map == NULL and its related comment (Emil)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

Fixes: 6f3e3c715a ("vk/allocator: Add a BO pool")
Fixes: 9919a2d34d ("anv/image: Memset hiz surfaces to 0 when binding memory")
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit b546c9d318)

Squashed with commit:

anv: fix anv_gem_mmap comment to not mention NULL

The function cannot return NULL, update the comment accordingly.

Fixes: b546c9d ("anv: anv_gem_mmap() returns MAP_FAILED as mapping error")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
(cherry picked from commit 9d2aa6e506)
2017-05-12 21:54:55 +03:00
Christian Gmeiner
cda9c9fb48 etnaviv: add L8A8_UNORM texture format
No piglit regressions.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
(cherry picked from commit a8007ed687)
2017-05-12 21:54:55 +03:00
Dave Airlie
6351b97343 radv/wsi: report presentation error per image request
This ports
0fcb92c17d
anv: wsi: report presentation error per image request

This fixes:
dEQP-VK.wsi.xlib.incremental_present.scale_none.*

Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 09034aab64)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/amd/vulkan/radv_wsi.c
2017-05-12 21:54:55 +03:00
Jason Ekstrand
6017898ced anv/cmd_buffer: Use the device allocator for QueueSubmit
The command is really operating on a Queue not a command buffer and the
nearest object to that with an allocator is VkDevice.

Reviewed-by: Chad Versace <chadversary@chromium.org>
Cc: "17.0 17.1" <mesa-dev@lists.freedesktop.org>
(cherry picked from commit bd3a9813b9)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_batch_chain.c
2017-05-12 21:54:55 +03:00
Samuel Iglesias Gonsálvez
23833ed201 i965/vec4: don't modify regioning parameters to the sources of DF align1 instructions
The regioning parameters are now properly set by convert_to_hw_regs()
and we don't need to fix them in the generator. That latter fix
previously done in the generator was strictly speaking wrong for any
non-identity regions.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit f57e234fdd)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
2017-05-12 21:54:55 +03:00
Samuel Iglesias Gonsálvez
0b9d7ea7a3 i965/vec4: fix register width for DF VGRF and UNIFORM
On gen7, the swizzles used in DF align16 instructions works for element
size of 32 bits, so we can address only 2 consecutive DFs. As we assumed that
in the rest of the code and prepare the instructions for this (scalarize_df()),
we need to set it to two again.

However, for DF align1 instructions, a width of 2 is wrong as we are not
reading the data we want. For example, an uniform would have a region of
<0, 2, 1> so it would repeat the first 2 DFs, when we wanted to access
to the first 4.

This patch sets the default one to 4 and then modifies the width of
align16 instruction's DF sources when we translate the logical swizzle
to the physical one.

v2:
- Remove conditional (Curro).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit aaeb1c99be)
2017-05-12 21:54:55 +03:00
Samuel Iglesias Gonsálvez
a013db9d1b i965/vec4: fix vertical stride to avoid breaking region parameter rule
From IVB PRM, vol4, part3, "General Restrictions on Regioning
Parameters":

  "If ExecSize = Width and HorzStride ≠ 0, VertStride must
   be set to Width * HorzStride."

In next patch, we are going to modify the region parameter for
uniforms and vgrf. For uniforms that are the source of
DF align1 instructions, they will have <0, 4, 1> regioning and
the execsize for those instructions will be 4, so they will break
the regioning rule. This will be the same for VGRF sources where
we use the vstride == 0 exploit.

As we know we are not going to cross the GRF boundary with that
execsize and parameters (not even with the exploit), we just fix
the vstride here.

v2:
- Move is_align1_df() (Curro)
- Refactor exec_size == width calculation (Curro)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 7f728bce81)
[Andres Gomez: use original is_align1_df]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/mesa/drivers/dri/i965/brw_vec4.cpp
2017-05-12 21:54:55 +03:00
Philipp Zabel
31c66e85cc renderonly: use drmIoctl
To restart interrupted system calls, use drmIoctl.

Fixes: 848b49b288 ("gallium: add renderonly library")
CC: <mesa-stable@lists.freedesktop.org>
Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit b539335e50)
2017-05-12 21:54:55 +03:00
Philipp Zabel
9eba1e9222 renderonly: drop resources on destroy
The renderonly_scanout holds a reference on its prime pipe resource,
which should be released when it is destroyed. If it was created by
renderonly_create_kms_dumb_buffer_for_resource, the dumb BO also has
to be destroyed.

Fixes: 848b49b288 ("gallium: add renderonly library")
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit cd8ee259c8)
2017-05-12 21:54:55 +03:00
Philipp Zabel
937376e40a renderonly: close transfer prime_fd
prime_fd is only used to transfer the scanout buffer to the GPU inside
renderonly_create_kms_dumb_buffer_for_resource. It should be closed
immediately to avoid leaking the DMA-BUF file handle.

Fixes: 848b49b288 ("gallium: add renderonly library")
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit ab51cd2f26)
2017-05-12 21:54:54 +03:00
Eric Anholt
fcd3c46827 nir: Pick just the channels we want for bitmap and drawpixels lowering.
NIR now validates that SSA references use the same number of channels as
are in the SSA value.

v2: Reword commit message, since the commit didn't land before the
    validation change did.

Fixes: 370d68babc ("nir/validate: Validate that bit sizes and components always match")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v1)
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit fba6559a1e)
2017-05-12 21:54:54 +03:00
Ilia Mirkin
f9bfc55875 gallium/targets: fix bool setting on BE architectures
val_bool and val_int are in a union. val_bool gets the first byte, which
happens to work on LE when setting via the int, but breaks on BE. By
setting the value properly, we are able to use DRI3 on BE architectures.
Tested by running glxgears with a NV34 in a G5 PPC.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
[Emil Velikov: squash the vmwgfx hunk]
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

(cherry picked from commit 6af14778a3)
2017-05-12 21:54:54 +03:00
Brian Paul
645014231b st/mesa: move duplicated st_ws_framebuffer() function into header file
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit b71ef173a5)
2017-05-10 23:59:49 +03:00
Marek Olšák
6ab5c3e4ff radeonsi: adjust ESGS ring buffer size computation on VI
Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 3f2a0649ab)
2017-05-10 23:59:48 +03:00
Emil Velikov
a8b980997b travis: bump MAKEFLAGS to -j4
The instance should have 2 cores, yet bumping the jobs to 4 should give
us a minor speed improvement.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit b1d45c3366)
2017-05-03 12:32:13 +03:00
Emil Velikov
997d81e537 travis: enable wayland support
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 27a0b383b9)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	.travis.yml
2017-05-03 12:32:00 +03:00
Emil Velikov
629d623685 travis: add Gallium state-tracker targets
Split into OpenCL and others, since the former is quite time consuming.

v2:
 - explicitly enable/disable components
 - build libvdpau 1.1 requirement
 - enable st/vdpau
 - build libva 1.6.2 (API 0.38) requirement

v3: Drop ubuntu-toolchain-r-test from sources (Andres)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 0e6a36cd3f)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-05-03 12:29:47 +03:00
Emil Velikov
44e28f2db4 travis: model scons check target like the make one
Should make things a bit more consistent across the board.

Cc: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit b3f2076549)
2017-05-03 12:29:03 +03:00
Emil Velikov
79cca4bc71 travis: split the make target to three separate ones
Split the target to allow faster builds for each run.

The overall build time will be more, yet Travis runs multiple builds in
parallel so we're limited by the slowest one.

Things are split roughly as:
 - DRI loaders, classic DRI drivers, classic OSMesa, make check
 - All Gallium drivers (minus the SWR) alongside st/dri (mesa)
 - The Vulkan drivers - ANV and RADV, make check (anv)

v2:
 - rework RUN_CHECK to MAKE_CHECK_COMMAND
 - explicitly disable DRI loaders
 - generate linux/memfd.h locally and enable ANV
 - add libedit-dev

v3: Use printf to create the header (Andres).
v4: Really add the libedit + printf hunks.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 7e2af37474)
[Andres Gomez: i965 is needed for Vulkan build]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	.travis.yml
2017-05-03 12:21:03 +03:00
Emil Velikov
9e8629d520 travis: add "make swr" to the build matrix
v2: Quote OVERRIDE variables.
v3: Add missplaced libedit-dev hunk (Andres).

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 8479fd8a10)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	.travis.yml
2017-05-02 12:09:03 +03:00
Emil Velikov
8ceaec5f48 travis: add "scons swr" to the build matrix
Requires GCC 5.0 (due to the C++14 requirement) and LLVM 3.9.

v2: Enable the target, add libedit-dev, rework check target.
v3: Comment the current check target, add -j4 SCONSFLAGS, quote OVERRIDE
variables.
v4: Keep check target as-is (Andres)

Cc: Tim Rowley <timothy.o.rowley@intel.com>
Cc: George Kyriazis <george.kyriazis@intel.com>
Reviewed-by: George Kyriazis <george.kyriazis@intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit f55d98ac85)
2017-05-02 12:09:03 +03:00
Emil Velikov
5104b4614f travis: add separate "scons" and "scons llvm" targets
The former does not require any LLVM, while the latter uses LLVM 3.3.

This way we'll quickly catch any LLVM 3.3+ functionality that gets
introduced where it shouldn't.

Add the full list of addons for each build permutation.

v2: Keep libedit-dev, rework check target.
v3: Comment the current check target, add -j4 SCONSFLAGS
v4:
 - Remove llvm-toolchain-trusty-3.3 source (Andres)
 - Keep check target as-is (Andres)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 85ee2c6cfc)
2017-05-02 12:09:02 +03:00
Emil Velikov
2138f2d7e6 travis: split out matrix from env
With next commits we'll add a couple of more options.

v2: Rework check target.
v3: Comment the current check target, add -j4 SCONSFLAGS
v4: Keep check target as-is, will rework with later patch.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 56ba252e23)
2017-05-02 12:09:02 +03:00
Emil Velikov
8458839b05 travis: rework "if test" blocks in the script section
Split the "if test" blocks so that we get more sensible output in case
of a failure.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit abcfea23ad)
2017-05-02 12:09:01 +03:00
Emil Velikov
81a63f6f4a travis: remove unused -dev packages
We effectively override libdrm-dev and libxcb-dri2-0-dev since we build
and install the package locally.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit ae713a7b79)
2017-05-02 12:09:01 +03:00
Emil Velikov
77917c27f7 travis: automatically manage ccache caching
According to the manual

"If you are using ccache, use:

  language: c # or other C/C++ variants

  cache: ccache

to cache $HOME/.ccache and automatically add /usr/lib/ccache to your
$PATH."

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 6431b98c54)
2017-05-02 12:09:01 +03:00
Emil Velikov
5d02d9a1f3 travis: enable apt cache
Provides a small, but consistent improvement.
Example numbers of the jobs added later in the series.

"make loaders/classic DRI" - 1s
"scons SWR" - 6s

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 486f28ba88)
2017-05-02 12:09:00 +03:00
Andres Gomez
715f3aceba travis: add the possibility of using the txc-dxtn library
The txc-dxtn library implements the patented S3 Texture Compression
algorithm.

By default it won't be used but we add the possibility of setting the
USE_TXC_DXTN variable to yes in the travis web UI so it will be
installed and used for the scons tests.

Cc: Eric Anholt <eric@anholt.net>
Cc: Rhys Kidd <rhyskidd@gmail.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
[Emil Velikov: keep the LIB prefix, drop the LD_LIBRARY_PATH, fold URL]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

(cherry picked from commit 29322daef2)
2017-05-02 12:09:00 +03:00
Andres Gomez
ab72ef5c66 travis: replace Trusty-based LLVM toolchain apt-get with apt addon
Trusty's LLVM toochain repository was whitelisted some time ago. See:
479067c5e7

Signed-off-by: Andres Gomez <agomez@igalia.com>
[Emil Velikov]
 - set sudo to false
 - reference the Trusty change (Rhys)
 - keep libedit-dev
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

(cherry picked from commit 7819d265c7)
2017-05-02 12:09:00 +03:00
Emil Velikov
1fb2374c4a travis: explicitly LD_LIBRARY_PATH the local libraries
Some of the libraries may be dlopened, which may not always work due to
the non-standard prefix that we're using.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit cb820daa3f)
2017-05-02 12:08:59 +03:00
Rhys Kidd
3f08eaf5a4 travis: Add radeonsi to continuous integration
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 115e684792)
2017-05-02 10:41:06 +03:00
Rhys Kidd
84111b25be travis: Add radv vulkan driver to continuous integration
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 787ab42716)
2017-05-02 10:40:51 +03:00
Rhys Kidd
75cd0d10a3 travis: Support LLVM 3.8+ on Trusty-based Travis-CI via apt-get not apt addon
Per comments by Travis-CI, the apt addon is only really needed for the
container-based Precise builds, as they don't yet support Trusty on that platform.

Mesa currently uses Trusty fully-virtualized environment (due to sudo: required).

See further:
https://docs.travis-ci.com/user/trusty-ci-environment/#Fully-virtualized-via-sudo%3A-required
https://github.com/travis-ci/apt-source-whitelist/pull/205#issuecomment-216054237

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 1572d11d89)
2017-05-02 10:40:38 +03:00
Emil Velikov
886af064b3 travis: bring the scons build on par with AppVeyor
Namely, always build with LLVM and run the check target.

Cc: Rhys Kidd <rhyskidd@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit af9a4d9005)
2017-05-02 10:40:17 +03:00
Emil Velikov
6dd0fc2b90 travis: use both cores for make/make check
The instance offers 2 cores, so use them to speed things up.

v2: Set MAKEFLAGS instead [Eric]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit bef4d74047)
2017-05-02 10:40:05 +03:00
Emil Velikov
6cd60f5594 travis: add nearly all gallium drivers to the list
Note: we need the explicit --enable-freedreno for libdrm since the
latter is 'smart' and disables it if building on !arm platforms.

The radeonsi and swr are explicitly left out since they require
'too-recent' LLVM - 3.6

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 30267172c7)
2017-05-02 10:39:52 +03:00
Emil Velikov
69566981f0 travis: correct libdrm required regex to also track libdrm itself
The current regex was tracking only the libdrm_foo packages, while with
recent changed we bumped only (and rightfully so) libdrm.

Fix the regex to track any libdrm package.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 96d86b18ee)
2017-05-02 10:39:25 +03:00
Andres Gomez
6cb65ce2d3 docs: add sha256 checksums for 17.0.5
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-29 01:17:40 +03:00
Andres Gomez
61b134a862 docs: add release notes for 17.0.5
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-28 20:41:38 +03:00
Andres Gomez
314bc3f048 Update version to 17.0.5
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-28 20:33:00 +03:00
Timothy Arceri
b7916134a0 mesa: validate sampler type across the whole program
Currently we were only making sure types were the same within a
single stage. This looks to have regressed with 953a0af8e3.

Fixes: 953a0af8e3 ("mesa: validate sampler uniforms during gluniform calls")

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
https://bugs.freedesktop.org/show_bug.cgi?id=97524
(cherry picked from commit d682f8aa8e)
[Andres Gomez: there was an intermediate cleanup but this commit
basically brings everything that was missing back]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/mesa/main/uniforms.c
2017-04-26 12:34:27 +03:00
Emil Velikov
e98c9af559 st/mesa: automake: honour the vdpau header install location
If VDPAU is installed in the non-default location, we'll fail to find
the headers and error at build time.

../../src/gallium/include/state_tracker/vdpau_dmabuf.h:37:25: fatal error: vdpau/vdpau.h: No such file or directory
 #include <vdpau/vdpau.h>
                         ^

Fixes: faba96bc60 ("st/vdpau: add new interop interface")
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 51c0c213b7)
2017-04-26 12:34:27 +03:00
Emil Velikov
8d7a8711d4 configure.ac: check require_basic_egl only if egl enabled
Fixes: 1ac40173c2 ("configure.ac: simplify EGL requirements for drivers dependent on EGL")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 4516bfbd30)
2017-04-26 12:34:27 +03:00
Grazvydas Ignotas
795287c66e radv: report timestampPeriod correctly
The kernel returns frequency in kHz, so to convert to nanosecond
interval that Vulkan uses the dividend should be 1000000.0 and not
100000.0.

This fixes the GPU graph in DOOM and matches the amdgpu-pro blob.

Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 1b2fe7ce45)
2017-04-26 12:34:26 +03:00
Andres Gomez
375cc332bb cherry-ignore: provide required gem stubs for the tests
Only reported because it referes to fixes in 2 commits, but they are
not in stable.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:26 +03:00
Andres Gomez
ce03b2c40e cherry-ignore: automake: ensure that the destination directory is created
Only reported because it referes to fixes in 2 commits, but they are
not in stable.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:26 +03:00
Andres Gomez
ccdae185e8 cherry-ignore: remove i965_symbols_test reference from .gitignore
It just cleans .gitignore.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:26 +03:00
Andres Gomez
7020d316c0 cherry-ignore: remove dead brw_new_shader() declaration
Removes unused symbols but it doesn't really add nor fix anything
relevant.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:26 +03:00
Andres Gomez
b2a9b5c5d5 cherry-ignore: r600: fix libmesa_amd_common dependency
Only reported because it referes to fixes in 2 commits, but they are
not in stable.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:26 +03:00
Andres Gomez
82082aea42 cherry-ignore: vulkan: add support for libmesa_vulkan_util
Only reported because it referes to fixes in 2 commits, but they are
not in stable.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:26 +03:00
Andres Gomez
5f3a44a736 cherry-ignore: make radv_resolve_entrypoint static
It just makes a local function static.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:26 +03:00
Andres Gomez
2b4d42bb26 cherry-ignore: remove unused radv_dispatch_table dtable
Removes unused symbols but it doesn't really add nor fix anything
relevant.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:25 +03:00
Andres Gomez
270898aba9 cherry-ignore: remove unused anv_dispatch_table dtable
Removes unused symbols but it doesn't really add nor fix anything
relevant.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:25 +03:00
Andres Gomez
7c373a5990 cherry-ignore: fix typo in a2b10g10r10 fast clear calculation
The fixes script finds 2 commit references but it is really only one,
and only in master.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:25 +03:00
Andres Gomez
a93c1e0703 cherry-ignore: Revert "i965/fs: Don't emit SEL instructions for type-converting MOVs."
The commit depends on earlier commits which did not land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:25 +03:00
Rob Clark
df53e5844b util/queue: don't hang at exit
So atexit() is horrible and 4aea8fe7 is probably not a good idea.  But
add an extra layer of duct-tape to the problem.  Otherwise we hit a
situation where app using an atexit() handler that runs later than ours
doesn't hang when trying to tear down a context.

 (gdb) bt
 #0  util_queue_killall_and_wait (queue=queue@entry=0x52bc80) at ../../../src/util/u_queue.c:264
 #1  0x0000007fb6c380c0 in atexit_handler () at ../../../src/util/u_queue.c:51
 #2  0x0000007fb7730e2c in __run_exit_handlers () from /lib64/libc.so.6
 #3  0x0000007fb7730e5c in exit () from /lib64/libc.so.6
 #4  0x0000007fb7ce17dc in piglit_report_result (result=PIGLIT_PASS) at /home/robclark/src/piglit/tests/util/piglit-util.c:267
 #5  0x0000007fb7ef99f8 in process_next_event (x11_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_x11_framework.c:139
 #6  0x0000007fb7ef9a90 in enter_event_loop (winsys_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_x11_framework.c:153
 #7  0x0000007fb7ef8e50 in run_test (gl_fw=0x432c20, argc=1, argv=0x7ffffff588) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_winsys_framework.c:88
 #8  0x0000007fb7edb890 in piglit_gl_test_run (argc=1, argv=0x7ffffff588, config=0x7ffffff400) at /home/robclark/src/piglit/tests/util/piglit-framework-gl.c:203
 #9  0x0000000000401224 in main (argc=1, argv=0x7ffffff588) at /home/robclark/src/piglit/tests/bugs/drawbuffer-modes.c:46
 (gdb) c
 Continuing.
 [Thread 0x7fb67580c0 (LWP 3471) exited]
 ^C
 Thread 1 "drawbuffer-mode" received signal SIGINT, Interrupt.
 0x0000007fb72dda34 in pthread_cond_wait@@GLIBC_2.17 () from /lib64/libpthread.so.0
 (gdb) bt
 #0  0x0000007fb72dda34 in pthread_cond_wait@@GLIBC_2.17 () from /lib64/libpthread.so.0
 #1  0x0000007fb6c38304 in cnd_wait (mtx=0x5bdc90, cond=0x5bdcc0) at ../../../include/c11/threads_posix.h:159
 #2  util_queue_fence_wait (fence=0x5bdc90) at ../../../src/util/u_queue.c:106
 #3  0x0000007fb6daac70 in fd_batch_sync (batch=0x5bdc70) at ../../../../../src/gallium/drivers/freedreno/freedreno_batch.c:233
 #4  batch_reset (batch=batch@entry=0x5bdc70) at ../../../../../src/gallium/drivers/freedreno/freedreno_batch.c:183
 #5  0x0000007fb6daa5e0 in batch_flush (batch=0x5bdc70) at ../../../../../src/gallium/drivers/freedreno/freedreno_batch.c:290
 #6  fd_batch_flush (batch=0x5bdc70, sync=<optimized out>) at ../../../../../src/gallium/drivers/freedreno/freedreno_batch.c:308
 #7  0x0000007fb6daba2c in fd_bc_flush (cache=0x461220, ctx=0x52b920) at ../../../../../src/gallium/drivers/freedreno/freedreno_batch_cache.c:141
 #8  0x0000007fb6dac954 in fd_context_flush (pctx=0x52b920, fence=0x0, flags=<optimized out>) at ../../../../../src/gallium/drivers/freedreno/freedreno_context.c:54
 #9  0x0000007fb6b43294 in st_glFlush (ctx=<optimized out>) at ../../../src/mesa/state_tracker/st_cb_flush.c:121
 #10 0x0000007fb69a84e8 in _mesa_make_current (newCtx=newCtx@entry=0x0, drawBuffer=drawBuffer@entry=0x0, readBuffer=readBuffer@entry=0x0) at ../../../src/mesa/main/context.c:1654
 #11 0x0000007fb6b7ca58 in st_api_make_current (stapi=<optimized out>, stctxi=0x0, stdrawi=0x0, streadi=0x0) at ../../../src/mesa/state_tracker/st_manager.c:827
 #12 0x0000007fb6cc87e8 in dri_unbind_context (cPriv=<optimized out>) at ../../../../../src/gallium/state_trackers/dri/dri_context.c:217
 #13 0x0000007fb6cc80b0 in driUnbindContext (pcp=0x5271e0) at ../../../../../../src/mesa/drivers/dri/common/dri_util.c:591
 #14 0x0000007fb7d1da08 in MakeContextCurrent (dpy=0x433380, draw=0, read=0, gc_user=0x0) at ../../../src/glx/glxcurrent.c:214
 #15 0x0000007fb7a8d5e0 in glx_platform_make_current () from /lib64/libwaffle-1.so.0
 #16 0x0000007fb7a894e4 in waffle_make_current () from /lib64/libwaffle-1.so.0
 #17 0x0000007fb7ef8c60 in piglit_wfl_framework_teardown (wfl_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_wfl_framework.c:628
 #18 0x0000007fb7ef939c in piglit_winsys_framework_teardown (winsys_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_winsys_framework.c:238
 #19 0x0000007fb7ef9c30 in destroy (gl_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_x11_framework.c:212
 #20 0x0000007fb7edb7c4 in destroy () at /home/robclark/src/piglit/tests/util/piglit-framework-gl.c:184
 #21 0x0000007fb7730e2c in __run_exit_handlers () from /lib64/libc.so.6
 #22 0x0000007fb7730e5c in exit () from /lib64/libc.so.6
 #23 0x0000007fb7ce17dc in piglit_report_result (result=PIGLIT_PASS) at /home/robclark/src/piglit/tests/util/piglit-util.c:267
 #24 0x0000007fb7ef99f8 in process_next_event (x11_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_x11_framework.c:139
 #25 0x0000007fb7ef9a90 in enter_event_loop (winsys_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_x11_framework.c:153
 #26 0x0000007fb7ef8e50 in run_test (gl_fw=0x432c20, argc=1, argv=0x7ffffff588) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_winsys_framework.c:88
 #27 0x0000007fb7edb890 in piglit_gl_test_run (argc=1, argv=0x7ffffff588, config=0x7ffffff400) at /home/robclark/src/piglit/tests/util/piglit-framework-gl.c:203
 #28 0x0000000000401224 in main (argc=1, argv=0x7ffffff588) at /home/robclark/src/piglit/tests/bugs/drawbuffer-modes.c:46
 (gdb) r

Fixes: 4aea8fe7 ("gallium/u_queue: fix random crashes when the app calls exit()")
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 6fb7935ded)
[Andres Gomez: rename mtx_* back to pipe_mutex_*]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/gallium/auxiliary/util/u_queue.c
2017-04-26 12:34:25 +03:00
Andres Gomez
0e3fd35eb2 cherry-ignore: Revert "etnaviv: Cannot render to rb-swapped formats"
Reverts a commit in stable only because a new feature in master
replaces it.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:25 +03:00
Emil Velikov
c8f4160c40 st/clover: add space between < and ::
As pointed out by compiler

./llvm/codegen.hpp:52:22: error: ‘<::’ cannot begin a template-argument list [-fpermissive]
./llvm/codegen.hpp:52:22: note: ‘<:’ is an alternate spelling for ‘[’. Insert whitespace between ‘<’ and ‘::’

Cc: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Vedran Miletić <vedran@miletic.net>
(cherry picked from commit dd6ec78b4f)
2017-04-26 12:34:25 +03:00
Nanley Chery
313f48f030 anv/cmd_buffer: Disable CCS on BDW input attachments
The description under RENDER_SURFACE_STATE::RedClearColor says,

   For Sampling Engine Multisampled Surfaces and Render Targets:
    Specifies the clear value for the red channel.
   For Other Surfaces:
    This field is ignored.

This means that the sampler on BDW doesn't support CCS.

Cc: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit d9d793696b)
[Andres Gomez: _ccs_e renamed back to _lossless_compression]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/genX_cmd_buffer.c
2017-04-26 12:34:25 +03:00
Kenneth Graunke
de9483a6cb i965/vec4: Avoid reswizzling MACH instructions in opt_register_coalesce().
opt_register_coalesce() was optimizing sequences such as:

   mul(8) acc0:D, attr18.xyyy:D, attr19.xyyy:D
   mach(8) vgrf5.xy:D, attr18.xyyy:D, attr19.xyyy:D
   mov(8) m4.zw:F, vgrf5.xxxy:F

into:

   mul(8) acc0:D, attr18.xyyy:D, attr19.xyyy:D
   mach(8) m4.zw:D, attr18.xxxy:D, attr19.xxxy:D

This doesn't work - if we're going to reswizzle MACH, we'd need to
reswizzle the MUL as well.  Here, the MUL fills the accumulator's .zw
components with attr18.yy * attr19.yy.  But the MACH instruction expects
.z to contain attr18.x * attr19.x.  Bogus results ensue.

No change in shader-db on Haswell.  Prevents regressions in Timothy's
patches to use enhanced layouts for varying packing (which rearrange
code just enough to trigger this pre-existing bug, but were fine
themselves).

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 2faf227ec2)

Squashed with commit:

i965/vec4: Use reads_accumulator_implicitly(), not MACH checks.

Curro pointed out that I should not just check for MACH, but use
the reads_accumulator_implicitly() helper, which would also prevent
the same bug with MAC and SADA2 (if we ever decide to use them).

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 6b10c37b9c)
2017-04-26 12:34:24 +03:00
Francisco Jerez
4c2356f13c intel/fs: Take into account amount of data read in spilling cost heuristic.
Until now the spilling cost calculation was neglecting the amount of
data read from the register during the spilling cost calculation.
This caused it to make suboptimal decisions in some cases leading to
higher memory bandwidth usage than necessary.

Improves Unigine Heaven performance by ~4% on BDW, reversing an
unintended FPS regression from my previous commit
147e71242c with n=12 and statistical
significance 5%.  In addition SynMark2 OglCSDof performance is
improved by an additional ~5% on SKL, and a Kerbal Space Program
apitrace around the Moho planet I can provide on request improves by
~20%.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 58324389be)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
2017-04-26 12:34:24 +03:00
Francisco Jerez
a7c86ab750 intel/fs: Use regs_written() in spilling cost heuristic for improved accuracy.
This is what we use later on to compute the number of registers that
will actually get spilled to memory, so it's more likely to match
reality than the current open-coded approximation.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit ecc19e12dc)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
2017-04-26 12:34:24 +03:00
Andres Gomez
5403c02983 cherry-ignore: Fix typos.
Nomination in stable.

17.1 nomination only.

The commit depends on earlier commit 7748c3f5eb which did not land in
branch and the part that could be merged is not really providing
anything relevant to stable.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:24 +03:00
Marek Olšák
7ab11a9822 st/mesa: invalidate the readpix cache in st_indirect_draw_vbo
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 7cd6e2df65)
2017-04-26 12:34:24 +03:00
Emil Velikov
0022df96be winsys/sw/dri: don't use GNU void pointer arithmetic
Resolves build issues like the following:

src/gallium/winsys/sw/dri/dri_sw_winsys.c:203:31: error: pointer of type ‘void *’ used in arithmetic [-Werror=pointer-arith]
        data = dri_sw_dt->data + (dri_sw_dt->stride * box->y) + box->x * blsize;
                               ^
src/gallium/winsys/sw/dri/dri_sw_winsys.c:203:62: error: pointer of type ‘void *’ used in arithmetic [-Werror=pointer-arith]
        data = dri_sw_dt->data + (dri_sw_dt->stride * box->y) + box->x * blsize;
                                                              ^

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 309f4067a7)
2017-04-26 12:34:24 +03:00
Nicolai Hähnle
8a46da3731 vbo: fix gl_DrawID handling in glMultiDrawArrays
Fixes a bug in
KHR-GL45.shader_draw_parameters_tests.ShaderMultiDrawArraysParameters.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 51deba0eb3)
2017-04-26 12:34:24 +03:00
Nicolai Hähnle
d066714fbb mesa: move glMultiDrawArrays to vbo and fix error handling
When any count[i] is negative, we must skip all draws.

Moving to vbo makes the subsequent change easier.

v2:
- provide the function in all contexts, including GLES
- adjust validation accordingly to include the xfb check
v3:
- fix mix-up of pre- and post-xfb prim count (Nils Wallménius)

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 42d5465b9b)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/mesa/main/varray.c
2017-04-26 12:34:23 +03:00
Nicolai Hähnle
ddf884a9e3 mesa: extract need_xfb_remaining_prims_check
The same logic needs to be applied to glMultiDrawArrays.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 756e9ebbdd)
2017-04-26 12:34:23 +03:00
Nicolai Hähnle
1b4afdeb17 mesa: fix remaining xfb prims check for GLES with multiple instances
Found by inspection.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit ea9a8940ca)
2017-04-26 12:34:23 +03:00
Andres Gomez
88e5afd146 cherry-ignore: fix crash if ctx torn down with no rendering
Nomination in stable.

17.1 nomination only.

Fixes earlier commit 0b613c20 which did not land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:23 +03:00
Andres Gomez
efe50f2dde cherry-ignore: Add the pci_id into the shader cache UUID
Nomination in stable.

The commit depends on earlier commit 656e30b686 which did not land in
branch, and some other dependencies

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-26 12:34:23 +03:00
Boyan Ding
4b3efe993e nir: Destination component count of shader_clock intrinsic is 2
This fixes the following error when using ARB_shader_clock on i965:
	vec1 32 ssa_0 = intrinsic shader_clock () () ()
	intrinsic store_var (ssa_0) (clock_retval) (3) /* wrmask=xy */
error: src->ssa->num_components == num_components (nir/nir_validate.c:204)

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit ff29f488d4)
2017-04-26 12:34:23 +03:00
Jason Ekstrand
255d689dcd anv/blorp: Properly handle VK_ATTACHMENT_UNUSED
The Vulkan driver was originally written under the assumption that
VK_ATTACHMENT_UNUSED was basically just for depth-stencil attachments.
However, the way things fell together, VK_ATTACHMENT_UNUSED can be used
anywhere in the subpass description.  The blorp-based clear and resolve
code has a bunch of places where we walk lists of attachments and we
weren't handling VK_ATTACHMENT_UNUSED everywhere.  This commit should
fix all of them.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 220974b38d)
[Andres Gomez: the anv_subpass structure was not storing yet
VkAttachmentReference and recovered a hunk that was not needed in
master]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_blorp.c
2017-04-26 12:33:34 +03:00
Jason Ekstrand
af58e0dbe6 anv/cmd_buffer: Use the null surface state for ATTACHMENT_UNUSED
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 21d2ca72d8)
[Andres Gomez: the anv_subpass structure was not storing yet VkAttachmentReference]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/genX_cmd_buffer.c
2017-04-26 00:10:04 +03:00
Jason Ekstrand
9717c0aad5 anv/cmd_buffer: Always set up a null surface state
We're about to start requiring it in yet another case and calculating
exactly when one is needed is starting to get prohibitively expensive.
A single surface state doesn't take up that much space so we may as well
create one all the time.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 02eca8b6f8)
2017-04-26 00:10:04 +03:00
Jason Ekstrand
f26047871f anv/cmd_buffer: Flush the VF cache at the top of all primaries
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit e1f6fb8021)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/genX_cmd_buffer.c
2017-04-26 00:10:04 +03:00
Jason Ekstrand
c09f729d93 anv/blorp: Flush the texture cache in UpdateBuffer
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 939337e49f)
[Andres Gomez: replace anv_state_flush with anv_state_clflush]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_blorp.c

Squashed with commit:

anv: blorp: flush memory after copy

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit d71efbe5f2)
[Andres Gomez: replace anv_state_flush with anv_state_clflush]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_blorp.c
2017-04-26 00:10:04 +03:00
Boyan Ding
a6a42a84cf nvc0/ir: Properly handle a "split form" of predicate destination
GF100's ISA encoding has a weird form of predicate destination where its
3 bits are split across whole the instruction. Use a dedicated setPDSTL
function instead of original defId which is incorrect in this case.

v2: (Ilia Mirkin)
Change API of setPDSTL() to handle cases of no output
Fix setting of the highest bit in setPDSTL()

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit d941ef3829)
2017-04-26 00:10:04 +03:00
Emil Velikov
12434966eb docs: add sha256 checksums for 17.0.4
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-17 14:42:37 +01:00
Emil Velikov
367bafc7c1 docs: add release notes for 17.0.4
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-17 14:38:04 +01:00
Emil Velikov
0feeceb11c Update version to 17.0.4
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-17 14:33:57 +01:00
Fabio Estevam
0e032a434f loader: Move non-error message to debug level
Currently when running mesa on imx6 the following loader warnings
are seen:

MESA-LOADER: device is not located on the PCI bus
MESA-LOADER: device is not located on the PCI bus
MESA-LOADER: device is not located on the PCI bus
Using display 0x1920948 with EGL version 1.4

As this is not an error message, change it to debug level in
order to have a cleaner log output.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 78c5772633)
Nominated-by: Rob Clark <robdclark@gmail.com> (IRC)
2017-04-13 13:41:51 +01:00
Alex Smith
b7d3c71d64 radv: Invalidate L2 for TRANSFER_WRITE barriers
CP DMA and PKT3_WRITE_DATA (in CmdUpdateBuffer) don't (currently) write
through L2. Therefore, to make these writes visible to later accesses
we must invalidate L2 rather than just writing it back, to avoid the
possibility that stale data is read through L2.

Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
[Bas: patch is a backport for 17.0 of the cherry-pick below]
(cherry picked from commit bc5d587a80)
2017-04-12 13:30:22 +01:00
Julien Isorce
a6114f0c4e radeon_drm_bo: explicitly check return value of drmCommandWriteRead
CID 1313492

Signed-off-by: Julien Isorce <jisorce@oblong.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 521860b2a9)
Nominated-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-12 13:30:22 +01:00
Julien Isorce
0f51d37f73 radeon: initialize hole variable before calling container_of
Like in a few other places in that radeon_drm_bo.c file.

CID 715739.

Signed-off-by: Julien Isorce <jisorce@oblong.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit ce27b27c38)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99515
Nominated-by: Mauro Rossi <issor.oruam@gmail.com>
2017-04-12 13:30:22 +01:00
Julien Isorce
1b2bcb6826 winsys/radeon: check null return from radeon_cs_create_fence in cs_flush
Follow-up of patch:
"radeon_cs_create_fence: check null return from radeon_winsys_bo_create"

radeon_drm_cs_flush
  radeon_cs_create_fence
    radeon_winsys_bo_create

Signed-off-by: Julien Isorce <jisorce@oblong.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit d08c0930af)
[Emil Velikov: resolve trivial conflicts]
Nominated-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/gallium/winsys/radeon/drm/radeon_drm_cs.c
2017-04-12 13:30:22 +01:00
Julien Isorce
99468c236f winsys/radeon: check null in radeon_cs_create_fence
Fixes the following segmentation fault:

radeon_drm_cs_add_buffer (bo=0x0) at radeon_drm_cs.c
  -> if (!bo->handle)
(gdb) bt
0  radeon_drm_cs_add_buffer (bo=0x0) at radeon_drm_cs.c
1  0x00007fffe73575de in radeon_cs_create_fence radeon_drm_cs.c
2  0x00007fffe7358c48 in radeon_drm_cs_flush radeon_drm_cs.c

Signed-off-by: Julien Isorce <jisorce@oblong.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit d09edb0146)
Nominated-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-12 13:30:21 +01:00
Emil Velikov
c0a73ddda8 Revert "freedreno: fix memory leak"
This reverts commit c57a035850.

As requested by Rob Clark

"This seems to be causing a performance regression (reported by
Nicolas).. and the leak it fixes is quite hypothetical.  (Ie. hit by
apps that destroy/create context many times.)

On master, I think this can be solved by switching on 'reorder' by
default but that is probably too much of a behaviour change for
stable."
2017-04-12 13:30:21 +01:00
Jerome Duval
f3ae08bd44 haiku/winsys: fix dt prototype args
Add the missing front_private, introduced with earlier commit.

(cherry picked from commit 62e27170a7)
Fixes: 2b67657096 ("gallium/swrast: fix front buffer blitting. (v2)")
Nominated-by: Emil Velikov <emil.velikov@collabora.com>
[Emil Velikov: add commit message, fixes tag]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-12 13:30:21 +01:00
Jerome Duval
c1c39334da haiku: build fixes around debug defines
Move the os/os_misc.h include further up, since it's the one that
implicitly provides the PIPE_OS_HAIKU define.

(cherry picked from commit 40b0c8666c)
Fixes: 373f118c6c ("gallium: do not wrap header inclusion in")
Nominated-by: Emil Velikov <emil.velikov@collabora.com>
[Emil Velikov: add commit message, fixes tag]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-12 13:30:21 +01:00
Kenneth Graunke
a8e217d057 i965: Set kernel features before computing max GL version.
We check these bitfields when computing the Haswell max GL version.
We need to set them ahead of time, or they won't exist, and all our
checks will fail.  That sets the max core profile GL version to 4.2.

This introduces the bizarre situation where asking for a GL context
with version 4.3+ fails, but asking for a GL core profile context
with version <= 4.2 actually promotes you a 4.5 context.

GLX_MESA_query_renderer also reported the bogus 4.2 value.
Now it shows 4.5.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reported-and-tested-by: Rafael Ristovski <rafael.ristovski@gmail.com>
(cherry picked from commit 02ccd8f52c)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/mesa/drivers/dri/i965/intel_screen.c
2017-04-12 13:30:21 +01:00
Kenneth Graunke
05eb1c7f59 i965: Skip register write detection when possible.
Detecting register write support by trial and error introduces a
stall at screen creation time, which it would be nice to avoid.
Certain command parser versions guarantee this will work (see the
giant comment in intelInitScreen2 below, or a few commits ago):

- Ivybridge: version >= 1 (kernel v3.16)
- Baytrail:  version >= 2 (kernel v3.19)
- Haswell:   version >= 7 (kernel v4.8)

For simplicity, we don't bother with version 1 in this patch.

This assumes that the user hasn't disabled aliasing PPGTT via a kernel
command line parameter.  Don't do that - you're only breaking things.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
(cherry picked from commit 5e29af5f77)
2017-04-12 11:32:28 +01:00
Kenneth Graunke
e7f872f7b8 i965: Set screen->cmd_parser_version to 0 if we can't write registers.
If we can't write registers, then the effective command parser version
is 0 - it may exist, but it's not usefully enabling anything.

See kernel commit 1ca3712ca3429a617ed6c5f87718e4f6fe4ae0c6 (in v4.8)
where the kernel starts doing this for us.  This makes us do more or
less the same thing on older kernels.

This should preserve a bit of sanity by allowing us to perform a
screen->cmd_parser_version > N check to determine that we really can
use the features promised by command parser version N.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
(cherry picked from commit 31693a13f8)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/mesa/drivers/dri/i965/intel_screen.c
2017-04-12 11:32:28 +01:00
Kenneth Graunke
20319f5e88 i965: Document the sad story of the kernel command parser.
This should help us figure out the complexities of which kernel
versions we need to get various features on various platforms.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
(cherry picked from commit 4a2ad6b145)
2017-04-12 11:32:28 +01:00
Ilia Mirkin
a0a48b641d nouveau: when mapping a persistent buffer, synchronize on former xfers
If the buffer is being used, we should wait for those uses to be
complete before returning the map.

Fixes: GL45-CTS.direct_state_access.buffers_functional
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit d9cc58d6ec)
2017-04-12 11:32:28 +01:00
Ilia Mirkin
b6168c3b83 nvc0: increase texture buffer object alignment to 256 for pre-GM107
We currently don't pass the low byte of the address via the surface
info, so in order to work with images, these have to implicitly be
aligned to 256. The proprietary driver also doesn't go out of its way to
provide lower alignment.

Fixes GL45-CTS.texture_buffer.texture_buffer_texture_buffer_range

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 8036809799)
2017-04-12 11:32:28 +01:00
Ilia Mirkin
12d7da7717 nvc0/ir: fix overwriting of offset register with interpolateAtOffset
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 57a744025a)
2017-04-12 11:32:28 +01:00
Ilia Mirkin
4900fa3f82 nvc0/ir: fix LSB/BFE/BFI implementations
Overwriting the src register is a very bad idea - it logically maps onto
the TGSI registers, and so is effectively overwriting the source values.

Reported-by: Boyan Ding <boyan.j.ding@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 60f5766db4)
2017-04-12 11:32:27 +01:00
Jason Ekstrand
29a7d73c9c i965/blorp: Bump the batch space estimate
Commit f938354362 recently increased the
alignment on vertex buffer data from 32 to 64.  This caused us to
consume a bit more batch than we were before and we now go over the
estimate by a small amount on certain blits on gen8+.  This commit bumps
then gen8 batch estimate by a bit to compensate.  Haswell and older
still seems to be well within the limit.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100582
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit c9c39812b9)
2017-04-12 11:32:27 +01:00
Alex Deucher
ddd83c5f2a radeonsi: add new polaris10 pci id
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit d921af62f5)
2017-04-12 11:32:27 +01:00
Jason Ekstrand
04df217ac0 i965/blorp: Align vertex buffers to 64B
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f938354362)
[Emil Velikov: brw_state_batch has different signature]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/mesa/drivers/dri/i965/genX_blorp_exec.c
2017-04-12 11:32:27 +01:00
Jason Ekstrand
33a9bedc24 anv/blorp: Align vertex buffers to 64B
This fixes issues seen when adding support for full 48-bit addresses.
The 48-bit addresses themselves have nothing to do with it other than
that it caused the kernel to place buffers slightly differently so they
interacted differently with the caches.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 5d1ba2cb04)
2017-04-12 11:32:27 +01:00
Jason Ekstrand
f509c83609 anv/pipeline: Properly handle unset gl_Layer and gl_ViewportIndex
When the shader does not set one of these values, they are supposed to
get a default value of 0.  We have hardware bits in 3DSTATE_CLIP for
this but haven't been setting them.  This fixes the intermittent failure
of dEQP-VK.geometry.layered.3d.render_to_default_layer.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit c6f69eea6a)
2017-04-12 11:32:27 +01:00
Jason Ekstrand
f77cecf08c i965/fs: Always provide a default LOD of 0 for TXS and TXL
We already provide a default LOD for textureQueryLevels and texture() on
non-fragment stages.  However, there are more cases where one is needed
such as textureSize(gsampler2DMS*) in SPIR-V.  Instead of trying to list
out all of the cases one at a time, just provide the default for all TXS
and TXL operations.  This fixes a shader validation error in the new
Sascha deferredmultisampling demo which uses textureSize(gsampler2DMS).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100391
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 3503b2714b)
2017-04-12 11:32:27 +01:00
Marek Olšák
d20d8fdc1d targets: export radeon winsys_create functions to silence LLVM warning
It silences the following radeonsi LLVM warning due to a previous
commit adding an LLVM workaround:
  "mesa: for the -simplifycfg-sink-common option: may only occur zero or one
   times!"

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by; Emil Velikov <emil.velikov@collabora.com>

(cherry picked from commit 18b12bf533)
2017-04-12 11:32:27 +01:00
Michal Srb
c0e343f995 st: Add cubeMapFace parameter to st_finalize_texture.
st_finalize_texture always accesses image at face 0, but it may not be
set if we are working with cubemap that had other face set.

This fixes crash in piglit
same-attachment-glFramebufferTexture2D-GL_DEPTH_STENCIL_ATTACHMENT.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 52f9ccefcb)
2017-04-12 11:32:27 +01:00
Thomas Hellstrom
79d97bcf66 gbm/dri: Flush after unmap
Drivers may queue dma operations on the context at unmap time so we need
to flush to make sure the data gets to the bo. Ideally the application
would take care of this, but since there appears to be no exported gbm
flush functionality we need to explicitly flush at unmap time.

This fixes a problem where kmscube on vmwgfx in rgba textured mode would
render using an uninitialized texture rather than the intended
rgba pattern.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit ba8df2286a)

Squashed with commit

gbm/dri: Check dri extension version before flush after unmap

The commit mentioned below required the __DRI2FlushExtension to have
version 4 or above, for GBM functionality. That broke GBM with some
classic dri drivers. Relax that requirement so that we only flush
after unmap if we have version 4 or above. Drivers that require the flush
for correct functionality should implement the desired version.

Fixes: ba8df228 ("gbm/dri: Flush after unmap")
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 18e2aa063c)
2017-04-12 11:32:18 +01:00
Craig Stout
5094311078 anv/cmd_buffer: fix host memory leak
push_constants must be free'd.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100452
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 1da7a11de8)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/intel/vulkan/anv_cmd_buffer.c
2017-04-12 11:05:41 +01:00
Emil Velikov
a5afb7e1ee Revert "cherry-ignore: add the Flush after unmap in gbm/dri fix"
This reverts commit 3a84f6fd43.

The fix in question has been properly addressed and does not cause
regressions.
2017-04-12 10:33:36 +01:00
Andres Gomez
71d2f05a9e docs: add sha256 checksums for 17.0.3
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-01 18:47:00 +03:00
Andres Gomez
7f34ecae7f docs: add release notes for 17.0.3
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-01 17:29:34 +03:00
Andres Gomez
3a90fc5717 Update version to 17.0.3
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-04-01 15:12:39 +03:00
Andres Gomez
fd3b756abb cherry-ignore: corrected typo in the Flush after unmap in gbm/dri fix
The regression was for i915, not i965.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-03-30 23:45:49 +03:00
Andres Gomez
3a84f6fd43 cherry-ignore: add the Flush after unmap in gbm/dri fix
The commit caused a regression in i965 (and possibly others) since it
didn't implement v4 of DRI2's flush extension.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-03-30 16:49:51 +03:00
Andres Gomez
57904e481f cherry-ignore: add the Invalidate L2 for TRANSFER_WRITE barriers fix
Addressed an earlier commit [0567ab0407] which did not land in
branch. This will be backported with a stable specific patch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-03-30 16:49:51 +03:00
Jose Fonseca
3d59fd83ed c11/threads: Include thr/xtimec.h for xtime definition when building with MSVC.
MSVC has been including a xtime definition in thr/xtimec.h ever since
MSVC 2013 (which is the minimum we require for building Mesa), and
including it prevents duplicate definitions when it gets included by
LLVM.

In fact, it looks that MSVC has been including a partial C11 threads
implementation too for some time, which we should consider migrating to
once we eliminate the use of _MTX_INITIALIZER_NP in our tree.

Thanks to the anonymous helper from
https://bugs.freedesktop.org/show_bug.cgi?id=100201#c4 for spotting
this.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100201
CC: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit ecfafdcbf5)
2017-03-30 16:32:40 +03:00
Jason Ekstrand
9caf60b3a2 anv: Flush caches prior to PIPELINE_SELECT on all gens
The programming note that says we need to do this still exists in the
SkyLake PRM and, from looking at the bspec, seems like it may apply to
all hardware generations SNB+.  Unfortunately, this isn't particularly
clear cut since there is also language in the bspec that says you can
skip the flushing and stall to get better throughput.  Experimentation
with the "Car Chase" benchmark in GL seems to indicate that some form of
flushing is still needed.  This commit makes us do the full set of
flushes regardless of hardware generation.  We can always reduce the
flushing later.

Reported-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 6baae9625d)
2017-03-30 16:32:39 +03:00
Jason Ekstrand
1761f9d4b2 anv/cmd_buffer: Fix bad indentation
A bunch of code was indented in such a way that it looked like it went
with the if statement above but it definitely didn't.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 0fe3dcce4c)
2017-03-30 16:32:39 +03:00
Jason Ekstrand
9973db02a0 anv/cmd_buffer: Apply flush operations prior to executing secondaries
This fixes rendering issues in the Vulkan port of skia on some hardware.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 01a65dc43b)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/genX_cmd_buffer.c
2017-03-30 16:32:39 +03:00
Jason Ekstrand
0a9e06e5b9 anv/blorp: Use anv_get_layerCount everywhere
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 9319ef96fd)
2017-03-30 16:32:39 +03:00
Jason Ekstrand
6cabd40211 anv: Make anv_get_layerCount a macro
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 1b8fa8dd79)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_private.h
2017-03-30 16:32:39 +03:00
Timothy Arceri
4b3fddaa1a mesa: update lower_jumps tests after bug fix
This change updates the tests to reflect the IR after
the following bug fix.

Fixes: c1096b7f1d ("glsl: fix lower jumps for returns when loop is
                      inside an if")

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Bugzilla: https://bugs.freedesktop.org/100441
(cherry picked from commit e44cba540e)
2017-03-29 19:14:25 +03:00
Juan A. Suarez Romero
2f86b7398a tests/cache_test: allow crossing mount points
When using an overlayfs system (like a Docker container), rmrf_local()
fails because part of the files to be removed are in different mount
points (layouts). And thus cache-test fails.

Letting crossing mount points is not a big problem, specially because
this is just for a test, not to be used in real code.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit caa616ccc4)
2017-03-29 19:14:25 +03:00
Andres Gomez
dc01cb9c5f glsl: on UBO/SSBOs link error reset the number of active blocks to 0
While it's legal to have an active blocks count > 0 on link failure.
Unless we actually assign memory for the blocks array we can end up
segfaulting in calls such as glUniformBlockBinding().

To avoid having to NULL check these api calls we simply reset the
block count to 0 if the array was not created.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Cc: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit bf15b2b515)
2017-03-29 19:14:25 +03:00
Jason Ekstrand
fb00f22b83 anv/query: Fix the location of timestamp availability
Reviewed-By: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "17.0 13.0" <mesa-dev@lists.freedesktop.org>
(cherry picked from commit 4bbb4b95b8)
[Andres Gomez: use genX_cmd_buffer.c instead of genX_query.c]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/genX_query.c
2017-03-29 19:13:39 +03:00
Bas Nieuwenhuizen
45e133ab3b radv: flush DB cache before and after HTILE decompress.
It reads @ writes the DB cache, and we haven't flushed dst caches yet,
so DB cache may be stale. Also the user might be shader read (and probably is),
so also flush after.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
CC: <mesa-stable@lists.freedesktop.org>
Fixes: f4e499ec79 ("radv: add initial non-conformant radv vulkan driver")
(cherry picked from commit a8c51b1cd9)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/amd/vulkan/radv_cmd_buffer.c
2017-03-29 19:13:22 +03:00
Timothy Arceri
6613fba2a9 glsl: fix lower jumps for returns when loop is inside an if
Previously we would just escape the loop and move everything
following the loop inside the if to the else branch of a new if
with a return flag conditional. However everything outside the
if the loop was nested in would still get executed.

Adding a new return to the then branch of the new if fixes this
and we just let a follow pass clean it up if needed.

Fixes:
tests/spec/glsl-1.10/execution/vs-nested-return-sibling-loop.shader_test
tests/spec/glsl-1.10/execution/vs-nested-return-sibling-loop2.shader_test

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
(cherry picked from commit c1096b7f1d)
2017-03-29 19:13:18 +03:00
Matt Turner
613e6e4d5d i965/fs: Don't emit SEL instructions for type-converting MOVs.
SEL can only convert between a few integer types, which we basically
never do.

Fixes fs/vs-double-uniform-array-direct-indirect-non-uniform-control-flow
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>

(cherry picked from commit 7dccd38b40)
2017-03-29 19:13:18 +03:00
Xu Randy
8c5dfa9169 anv/blorp: Fix a crash in CmdClearColorImage
We should use anv_get_layerCount() to access layerCount of VkImageSub-
resourceRange in anv_CmdClearColorImage and anv_CmdClearDepthStencil-
Image, which handles the VK_REMAINING_ARRAY_LAYERS (~0) case.

Test: Sample multithreadcmdbuf from LunarG can run without crash

Signed-off-by: Xu Randy <randy.xu@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 004468de14)
2017-03-29 19:13:18 +03:00
Axel Davy
1fcf8231ea st/nine: Use atomics for available_texture_mem
Resource dtor can be executed in the worker thread.
Use atomic to avoid threading safety issues.

CC: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Tested-by: James Harvey <lothmordor@gmail.com>
(cherry picked from commit bdf035ea6f)
2017-03-29 19:13:18 +03:00
Axel Davy
0444ef0832 st/nine: Resolve deadlock in surface/volume dtors when using csmt
Surfaces and Volumes can be freed in the worker thread.

Without this patch, pending_uploads_counter could be non-zero
in the Surfaces or Volumes dtor, leading to deadlock.
Instead decrease properly the counter before releasing the
item.

Also avoid another potential deadlock if the item is not
properly unlocked: Do not call UnlockRect which will cause deadlock,
but free directly using the deadlock safe
nine_context_get_pipe_multithread.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99246

CC: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Tested-by: James Harvey <lothmordor@gmail.com>
(cherry picked from commit bd85bb51c7)
2017-03-29 19:13:18 +03:00
Rob Clark
c57a035850 freedreno: fix memory leak
Otherwise blitter would still hold a ref to, for example, sampler-
views.

To reproduce:

   glmark2 -b desktop:duration=2 --run-forever

Fixes: a8e6734 ("freedreno: support for using generic clear path")
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit c03f6f12bb)
2017-03-29 19:13:18 +03:00
Jan Vesely
6741256351 clover: use pipe_resource references
v2: buffers are created with one reference.
v3: add pipe_resource reference to mapping object
v4: rename to pres and drop inline initializers

CC: "17.0 13.0" <mesa-stable@lists.freedesktop.org>

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 14b543bdc9)
2017-03-29 19:13:18 +03:00
Marek Olšák
e11bf563dd radeonsi: don't hang on shader compile failure
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 518d834162)
2017-03-29 19:13:18 +03:00
Tim Rowley
c375c448bf swr: [rasterizer jitter] fix llvm >= 5.0 build break
Function::getArgumentList() doesn't exist anymore, switch to using
arg_begin() (existed back to at least llvm-3.6.0).

Reviewed-by: Vedran Miletić <vedran@miletic.net>
CC: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 08f864abd9)
2017-03-29 19:13:18 +03:00
Jason Ekstrand
afb19fd70a anv/image: Return early when unbinding an image
Found by inspection.

Reviewed-by: Chad Versace <chadversary@chromium.org>
 Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>

(cherry picked from commit c942faf8f3)
2017-03-29 19:13:17 +03:00
Nicolai Hähnle
27a3fe0008 mesa/main: fix MultiDrawElements[BaseVertex] validation of primcount
primcount must be a GLsizei as in the signature for MultiDrawElements
or bad things can happen.

Furthermore, an error should be flagged when primcount is negative.

Curiously, this code used to work somewhat correctly even when primcount
was negative, because the loop that checks count[i] would iterate out of
bounds and almost certainly hit a negative value at some point.

Found by an ASAN error in
GL45-CTS.gtf32.GL3Tests.draw_elements_base_vertex.draw_elements_base_vertex_primcount

Note that the OpenGL spec seems to have s/primcount/drawcount/ at some
point, and the code still reflects the old language.

v2: provide the correct spec quotes (pointed out by Ian)

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit c11dcfb5e9)
2017-03-29 19:13:17 +03:00
Kenneth Graunke
0ecda185de i965: Fall back to GL 4.2/4.3 on Haswell if the kernel isn't new enough.
In commit d2590eb65f I enabled GL 4.5
on Haswell...but failed to check if we could do indirect compute
shader dispatch...and query buffer objects.

Indirect compute shader dispatch requires command parser version 5
(kernel commit 7b9748cb513a6bef4af87b79f0da3ff7e8b56cd8, which is in
Linux v4.4).  On earlier kernels we would have disabled
ARB_compute_shader, which is a mandatory part of OpenGL 4.3+.

Query buffer objects currently require MI_MATH and MI_LOAD_REGISTER_REG,
which mean command parser version 7 (Linux v4.8).  On earlier kernels
we would have disabled ARB_query_buffer_object, which is a mandatory
part of OpenGL 4.4+.

The new version support looks like:

- Kernel 4.1 and older => OpenGL 3.3
- Kernel 4.2-4.3       => OpenGL 4.2
- Kernel 4.4-4.7       => OpenGL 4.3
- Kernel 4.8+          => OpenGL 4.5

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
(cherry picked from commit 9b324e4dca)
2017-03-29 19:13:17 +03:00
Nanley Chery
e504ecb6c6 intel: Correct the BDW surface state size
The PRMs state that this packet is 16 DWORDS long. Ensure that the last
three DWORDS are zeroed as required by the hardware when allocating a
null surface state.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
(cherry picked from commit 7c50f9903f)
2017-03-29 19:13:17 +03:00
Xu,Randy
d80b96f980 anv/genX: Solve the vkCreateGraphicsPipelines crash
The crash is due to NULL pColorBlendState, which is legal if the
pipeline has rasterization disabled or if the subpass of the render pass
the pipeline is created against does not use any color attachments.

Test: Sample subpasses from LunarG can run without crash

Signed-off-by: Xu,Randy <randy.xu@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 57595cb073)
2017-03-29 19:13:17 +03:00
Dave Airlie
348c8c34c3 radv: fix primitive reset index emission
This was meant to be checking the index type to get the correct
index not the last emitted one. This fixes:
dEQP-VK.pipeline.input_assembly.primitive_restart.index_type_uint32.triangle_strip_with_adjacency

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit d06e168b87)
2017-03-29 19:13:17 +03:00
Ilia Mirkin
72483b29aa st/mesa: set result writemask based on ir type
This prevents textureQueryLevels, which maps as LODQ, from ending up
with a xyzw writemask, which is illegal.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100061
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit dab88e9af7)
2017-03-29 19:13:17 +03:00
Karol Herbst
a991960ca9 nvc0/ir: treat FMA like MAD for operand propagation
Helps mainly Feral-ported games, due to their use of fma()

shader-db changes:
total instructions in shared programs : 3901147 -> 3842505 (-1.50%)
total gprs used in shared programs    : 471258 -> 467359 (-0.83%)
total local used in shared programs   : 27405 -> 27361 (-0.16%)
total bytes used in shared programs   : 35749888 -> 35214176 (-1.50%)

                local        gpr       inst      bytes
    helped          17        1829        4091        4091
      hurt           4          44           3           3

Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 09f16de7e6)
2017-03-29 19:13:17 +03:00
Alex Deucher
cbb773e7e0 radeonsi: add new polaris12 pci id
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit c2a97fb7ae)
2017-03-29 19:13:17 +03:00
Jason Ekstrand
9c6fcdfe45 anv/GetQueryPoolResults: Actually implement the spec
The Vulkan spec is fairly clear about when we should and should not
write query pool results.  We're also supposed to return VK_NOT_READY if
VK_QUERY_RESULT_PARTIAL_BIT is not set and we come across any queries
which are not yet finished.  This fixes rendering corruptions on The
Talos Principle where geometry flickers in and out due to bogus query
results being returned by the driver.  These issues are most noticable
on Sky Lake GT4 2hen running on "ultra" settings.

Reviewed-By: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100182
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 08df015b9d)
[Andres Gomez: use anv_query.c instead of genX_query.c]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/genX_query.c
2017-03-29 19:12:57 +03:00
Jason Ekstrand
6e2fb0cbcf anv/query: Invalidate the correct range
Reviewed-By: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 81840130c0)
[Andres Gomez: use anv_query.c instead of genX_query.c]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/vulkan/genX_query.c
2017-03-29 19:12:18 +03:00
Topi Pohjolainen
8a5684d1bd i965/gen8+: Do full stall when switching pipeline
just as earlier gens do.

CC: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96743
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit bd25d9670b)
2017-03-29 01:27:43 +03:00
Emil Velikov
9b66351f5b docs: add sha256 checksums for 17.0.2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-20 14:17:20 +00:00
148 changed files with 2728 additions and 712 deletions

View File

@@ -1,26 +1,11 @@
language: c
sudo: true
sudo: false
dist: trusty
cache:
directories:
- $HOME/.ccache
addons:
apt:
packages:
- libdrm-dev
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libxcb-dri2-0-dev
- libx11-xcb-dev
- llvm-3.5-dev
# llvm-config is not in the dev package?
- llvm-3.5
# LLVM packaging is broken and misses this dep.
- libedit-dev
- scons
apt: true
ccache: true
env:
global:
@@ -36,18 +21,266 @@ env:
- XCBPROTO_VERSION=xcb-proto-1.11
- LIBXCB_VERSION=libxcb-1.11
- LIBXSHMFENCE_VERSION=libxshmfence-1.2
- LIBTXC_DXTN_VERSION=libtxc_dxtn-1.0.1
- LIBVDPAU_VERSION=libvdpau-1.1
- LIBVA_VERSION=libva-1.6.2
- LIBWAYLAND_VERSION=wayland-1.11.1
- PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig
matrix:
- BUILD=make
- BUILD=scons
- LD_LIBRARY_PATH="$HOME/prefix/lib:$LD_LIBRARY_PATH"
matrix:
include:
- env:
- LABEL="make loaders/classic DRI"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="make check"
- DRI_LOADERS="--enable-glx --enable-gbm --enable-egl --with-egl-platforms=x11,drm,surfaceless,wayland --enable-osmesa"
- DRI_DRIVERS="i915,i965,radeon,r200,swrast,nouveau"
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx --disable-gallium-osmesa"
- GALLIUM_DRIVERS=""
- VULKAN_DRIVERS=""
addons:
apt:
packages:
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- env:
# NOTE: Building SWR is 2x (yes two) times slower than all the other
# gallium drivers combined.
# Start this early so that it doesn't hunder the run time.
- LABEL="make Gallium Drivers SWR"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- OVERRIDE_CC="gcc-5"
- OVERRIDE_CXX="g++-5"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx --disable-gallium-osmesa"
- GALLIUM_DRIVERS="swr"
- VULKAN_DRIVERS=""
addons:
apt:
sources:
- ubuntu-toolchain-r-test
- llvm-toolchain-trusty-3.9
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- g++-5
- llvm-3.9-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="make Gallium Drivers Other"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx --disable-gallium-osmesa"
- GALLIUM_DRIVERS="i915,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx"
- VULKAN_DRIVERS=""
addons:
apt:
sources:
- llvm-toolchain-trusty-3.9
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-3.9-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
# NOTE: Analogous to SWR above, building Clover is quite slow.
- LABEL="make Gallium ST Clover"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=3.6
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- OVERRIDE_CC=gcc-4.7
- OVERRIDE_CXX=g++-4.7
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--disable-dri --enable-opencl --enable-opencl-icd --enable-llvm --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx --disable-gallium-osmesa"
# i915 most likely doesn't work with OpenCL.
# Regardless - we're doing a quick build test here.
- GALLIUM_DRIVERS="i915"
- VULKAN_DRIVERS=""
addons:
apt:
sources:
- llvm-toolchain-trusty-3.6
packages:
- libclc-dev
# LLVM packaging is broken and misses these dependencies
- libedit-dev
- g++-4.7
# From sources above
- llvm-3.6-dev
- clang-3.6
- libclang-3.6-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="make Gallium ST Other"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --disable-opencl --enable-xa --enable-nine --enable-xvmc --enable-vdpau --enable-va --enable-omx --enable-gallium-osmesa"
# We need swrast for osmesa and nine.
# i915 most likely doesn't work with most ST.
# Regardless - we're doing a quick build test here.
- GALLIUM_DRIVERS="i915,swrast"
- VULKAN_DRIVERS=""
addons:
apt:
packages:
# Nine requires gcc 4.6... which is the one we have right ?
- libxvmc-dev
# Build locally, for now.
#- libvdpau-dev
#- libva-dev
- libomxil-bellagio-dev
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="make Vulkan"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="make -C src/gtest check && make -C src/intel check"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
# XXX: we want to test the WSI, but those are enabled via the EGL toggles
# XXX: Platform X11 dependencies are checked when --enable-glx is set
- DRI_LOADERS="--enable-glx --disable-gbm --enable-egl --with-egl-platforms=x11,wayland"
# i965 is needed for Intel's Vulkan driver (anv)
- DRI_DRIVERS="i965"
# XXX: enable DRI for EGL above
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx --disable-gallium-osmesa"
- GALLIUM_DRIVERS=""
- VULKAN_DRIVERS="intel,radeon"
addons:
apt:
sources:
- llvm-toolchain-trusty-3.9
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-3.9-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="scons"
- BUILD=scons
- SCONSFLAGS="-j4"
# Explicitly disable.
- SCONS_TARGET="llvm=0"
# Keep it symmetrical to the make build.
- SCONS_CHECK_COMMAND="scons llvm=0 check"
addons:
apt:
packages:
- scons
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="scons LLVM"
- BUILD=scons
- SCONSFLAGS="-j4"
- SCONS_TARGET="llvm=1"
# Keep it symmetrical to the make build.
- SCONS_CHECK_COMMAND="scons llvm=1 check"
- LLVM_VERSION=3.3
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
addons:
apt:
packages:
- scons
# LLVM packaging is broken and misses these dependencies
- libedit-dev
- llvm-3.3-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="scons SWR"
- BUILD=scons
- SCONSFLAGS="-j4"
- SCONS_TARGET="swr=1"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
# Keep it symmetrical to the make build. There's no actual SWR, yet.
- SCONS_CHECK_COMMAND="true"
- OVERRIDE_CC="gcc-5"
- OVERRIDE_CXX="g++-5"
addons:
apt:
sources:
- ubuntu-toolchain-r-test
- llvm-toolchain-trusty-3.9
packages:
- scons
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- g++-5
- llvm-3.9-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
install:
- export PATH="/usr/lib/ccache:$PATH"
- pip install --user mako
# Since libdrm gets updated in configure.ac regularly, try to pick up the
# latest version from there.
- for line in `grep "^LIBDRM_.*_REQUIRED=" configure.ac`; do
- for line in `grep "^LIBDRM.*_REQUIRED=" configure.ac`; do
old_ver=`echo $LIBDRM_VERSION | sed 's/libdrm-//'`;
new_ver=`echo $line | sed 's/.*REQUIRED=//'`;
if `echo "$old_ver,$new_ver" | tr ',' '\n' | sort -Vc 2> /dev/null`; then
@@ -92,21 +325,70 @@ install:
- wget http://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.bz2
- tar -jxvf $LIBDRM_VERSION.tar.bz2
- (cd $LIBDRM_VERSION && ./configure --prefix=$HOME/prefix --enable-vc4 --enable-etnaviv-experimental-api && make install)
- (cd $LIBDRM_VERSION && ./configure --prefix=$HOME/prefix --enable-vc4 --enable-freedreno --enable-etnaviv-experimental-api && make install)
- wget $XORG_RELEASES/lib/$LIBXSHMFENCE_VERSION.tar.bz2
- tar -jxvf $LIBXSHMFENCE_VERSION.tar.bz2
- (cd $LIBXSHMFENCE_VERSION && ./configure --prefix=$HOME/prefix && make install)
# libtxc-dxtn uses the patented S3 Texture Compression
# algorithm. Therefore, we don't want to use this library but it is
# still possible through setting the USE_TXC_DXTN variable to yes in
# the travis web UI.
#
# According to Wikipedia, the patent expires on October 2, 2017:
# https://en.wikipedia.org/wiki/S3_Texture_Compression#Patent
- if test "x$USE_TXC_DXTN" = xyes; then
wget https://people.freedesktop.org/~cbrill/libtxc_dxtn/$LIBTXC_DXTN_VERSION.tar.bz2;
tar -jxvf $LIBTXC_DXTN_VERSION.tar.bz2;
(cd $LIBTXC_DXTN_VERSION && ./configure --prefix=$HOME/prefix && make install);
fi
- wget http://people.freedesktop.org/~aplattner/vdpau/$LIBVDPAU_VERSION.tar.bz2
- tar -jxvf $LIBVDPAU_VERSION.tar.bz2
- (cd $LIBVDPAU_VERSION && ./configure --prefix=$HOME/prefix && make install)
- wget http://www.freedesktop.org/software/vaapi/releases/libva/$LIBVA_VERSION.tar.bz2
- tar -jxvf $LIBVA_VERSION.tar.bz2
- (cd $LIBVA_VERSION && ./configure --prefix=$HOME/prefix --disable-wayland --disable-dummy-driver && make install)
- wget http://wayland.freedesktop.org/releases/$LIBWAYLAND_VERSION.tar.xz
- tar -axvf $LIBWAYLAND_VERSION.tar.xz
- (cd $LIBWAYLAND_VERSION && ./configure --prefix=$HOME/prefix --enable-libraries --without-host-scanner --disable-documentation --disable-dtd-validation && make install)
# Generate the header since one is missing on the Travis instance
- mkdir -p linux
- printf "%s\n" \
"#ifndef _LINUX_MEMFD_H" \
"#define _LINUX_MEMFD_H" \
"" \
"#define __NR_memfd_create 319" \
"#define SYS_memfd_create __NR_memfd_create" \
"" \
"#define MFD_CLOEXEC 0x0001U" \
"#define MFD_ALLOW_SEALING 0x0002U" \
"" \
"#endif /* _LINUX_MEMFD_H */" > linux/memfd.h
script:
- if test "x$BUILD" = xmake; then
test -n "$OVERRIDE_CC" && export CC="$OVERRIDE_CC";
test -n "$OVERRIDE_CXX" && export CXX="$OVERRIDE_CXX";
export CC="$CC -isystem`pwd`";
./autogen.sh --enable-debug
--with-egl-platforms=x11,drm
--with-dri-drivers=i915,i965,radeon,r200,swrast,nouveau
--with-gallium-drivers=svga,swrast,vc4,virgl,r300,r600,etnaviv,imx
$DRI_LOADERS
--with-dri-drivers=$DRI_DRIVERS
$GALLIUM_ST
--with-gallium-drivers=$GALLIUM_DRIVERS
--with-vulkan-drivers=$VULKAN_DRIVERS
--disable-llvm-shared-libs
;
make && make check;
elif test x$BUILD = xscons; then
scons;
&&
make && eval $MAKE_CHECK_COMMAND;
fi
- if test "x$BUILD" = xscons; then
test -n "$OVERRIDE_CC" && export CC="$OVERRIDE_CC";
test -n "$OVERRIDE_CXX" && export CXX="$OVERRIDE_CXX";
scons $SCONS_TARGET && eval $SCONS_CHECK_COMMAND;
fi

View File

@@ -1 +1 @@
17.0.2
17.0.7

View File

@@ -1,2 +1,107 @@
# The commit addressed an earlier commit ccdd5b3738e which did not land in branch.
d49d275c415d60ae08dc3e52d8db11f19a44010f anv/blorp: Don't sanitize the swizzle for blorp_clear
# The commit addressed an earlier commit 0567ab0407e which did not land in branch.
# A stable specific backported patch will follow later ...
bc5d587a80b64fb3e0a5ea8067e6317fbca2bbc5 radv: Invalidate L2 for TRANSFER_WRITE barriers
# stable: the commit depends on earlier commit 656e30b6860 which did
# not land in branch, and some other dependencies.
d2d6cf6c8387ac06c8559027f57683a61b48671b anv: Add the pci_id into the shader cache UUID
# stable: 17.1 nomination only. Fixes earlier commit 0b613c20 which
# did not land in branch.
d4601b0efc7f5e24e3f39fefa8e29e79560245ce freedreno: fix crash if ctx torn down with no rendering
# stable: 17.1 nomination only. the commit depends on earlier commit
# 7748c3f5eb1 which did not land in branch and the part that
# could be merged is not really providing anything relevant to
# stable.
b81d85f1754928139f9f01474495e024946aa1b4 configure.ac: Fix typos.
# extra: this reverts a commit in stable only because a new feature in
# master replaces it.
e75001811e3b66986b4ede165a0fdde703d4f05b Revert "etnaviv: Cannot render to rb-swapped formats"
# extra: the commit depends on earlier commits which did not land in
# branch.
dee31311eb024a636466e359b43d3a67b0135f32 Revert "i965/fs: Don't emit SEL instructions for type-converting MOVs."
# fixes: finds 2 commit references but it is really only one, and only
# in master.
2b3c490e23a6cd7f4f6bb489267c2b9b4fde5b20 radv: fix typo in a2b10g10r10 fast clear calculation
# fixes: removes unused symbols but it doesn't really add nor fix
# anything relevant.
9807e9dea67a60ab8ee04741c75b748eade582ee anv: remove unused anv_dispatch_table dtable
# fixes: removes unused symbols but it doesn't really add nor fix
# anything relevant.
320561bd831b81843e732d38d2b254aa3b25f2f6 radv: remove unused radv_dispatch_table dtable
# fixes: it just makes a local function static.
8b79f0ed0812a3a80dd91e47112fd722bd2d6978 radv: make radv_resolve_entrypoint static
# fixes: reported only because referes to fixes in 2 commits, but they
# are not in stable.
3f2cb699cfe0481f214c709b5a1375caf0a9c7fe android: vulkan: add support for libmesa_vulkan_util
# fixes: reported only because referes to fixes in 2 commits, but they
# are not in stable.
61c38d14b7b1d0ccacc440340ee0b1bc4454eca2 android: r600: fix libmesa_amd_common dependency
# fixes: removes unused symbols but it doesn't really add nor fix
# anything relevant.
b69a03e12aa38ed5d8b60a056630ed445f6097dc i965: remove dead brw_new_shader() declaration
# fixes: it just cleans .gitignore.
f282ace67862c0633d0a8135e4808867740d0d39 i965: remove i965_symbols_test reference from .gitignore
# fixes: reported only because referes to fixes in 2 commits, but they
# are not in stable.
15603055fb36a630cf3023219e9dd5c4a49c0596 anv: automake: ensure that the destination directory is created
# fixes: reported only because referes to fixes in 2 commits, but they
# are not in stable.
a6840efc096bd26e92bcee1a50515d845988a2f9 anv: provide required gem stubs for the tests
# stable: 17.1 nomination only.
65e0c3fba74ee98cacadbba4bd005b930609b65e radeonsi/gfx9: fix texture buffer objects and image buffers with IDXEN==0
5c94779585e24e8bd1bd41707521584af4251de3 radeonsi/gfx9: fix most things wrong with shader images
482e6b07cc6ce4b2ceac8188be19dbf252eaecde radeonsi/gfx9: fix 1D array shader images
8e8570a9e8bae7f4d3ad623475dfadc715a828d7 radeonsi/gfx9: add a workaround for viewing a slice of 3D as a 2D image
60a20e6879e4ce0911b12848ffd9e372f096590e radeonsi/gfx9: set MAX_PRIMGRP_IN_WAVE in the correct register
80814819c28353a38c03d4cdba39983b8cf260ac radeonsi/gfx9: don't set deprecated field PARTIAL_ES_WAVE_ON
f466683cb07796fa89f96ef87a6f076218ae6db8 radeonsi/gfx9: fix gl_ViewportIndex
283a1d1e27b5456cfda848a54b9d74be0993e038 radeonsi/gfx9: make some PA & DB registers match the closed Vulkan driver
# stable: 17.1 nomination only. Fixes earlier commit 651ec926fc1 which
# did not land in branch.
c43b4bc85eddba8bc31665cfee5928bed8343516 anv: Don't place scratch buffers above the 32-bit boundary
# stable: 17.1 nomination only. Disk cache doesn't feature yet in branch.
ce412371513c90bf9156f22c3567ee57750ef264 disk_cache: reduce default cache size to 5% of filesystem
4e1f3afea9bdeddb0d21f00d25319bce580d80c3 disk_cache: use block size rather than file size
22fa3d90a92c1628215d0f5fccbe1116d4f5147f util/disk_cache: remove percentage based max cache limit
# stable: 17.1 nomination only. Fixes earlier commit 68d6d097f15 which
# did not land in branch.
69e6eab6533ff48f72223cd21ef640242c52598b winsys/amdgpu: fix Polaris12 (RX 550) breakage
# stable: 17.1 nomination only. Contributes to earlier commit
# 3f0d69af20e which did not land in branch.
2add79a73291e40621081b9a12938ac1931b9e96 radv: apply the tess+GS hang workaround to Polaris12 as well
# stable: 17.1 nomination only. Reverts earlier commit
# c5bf7cb52942cb7df9f5d73746ffbf3c102d12cc which did not land
# in branch.
1456da91c8a14f77dd347981e2bc95e0644e0fd2 Revert "mesa: Require mipmap completeness for glCopyImageSubData(), sometimes."
# stable: 17.1 nomination only. Fixes a crash triggered by earlier
# commit 7c3b8ed87859bfdfb985d21685115a729f9cd138 which did
# not land in branch.
bc074a45180eddf30ea723bbdf89895e2c7684ca i965: Don't try to unmap NULL program cache BO.
# stable: 17.1 nomination only. Fixes a regression caused by commit
# bdd644976952 which did not land in branch.
854ed47f3e1501e4cc87bf9f19c6d4a1ad2bab08 radeonsi: mark fast-cleared textures as compressed when dirtying
# stable: 17.1 nomination only. MSAA was enabled by 1832ef6cd9b which
# did not land in branch.
f52e63069a3fad23e03d42306a42bd20f0159da3 swr: move msaa resolve to generalized StoreTile
# stable: 17.1 nomination only. 17.0 doesn't support
# VK_KHR_push_descriptor, so it doesn't need this patch.
5ff48581119258214801de24a327bdd6a29e0ccc radv/meta: fix restoring a push descriptor set
# fixes: Fixes earlier commit 126d5ad which did not land in branch.
9da104593386f6e8ddec8f0d9d288aceb8908fe1 radv: fix regression in descriptor set freeing.
# stable: Fixes earlier commit 4d30024238e which did not land in
# branch.
d884d1a6540ec0f60768c30df47f0228a37ea61c vc4: Only build the NEON code on arm32.
# stable: Fixes earlier commit 6403e376511 which did not land in
# branch.
6f21b5601cc1260eac53f65c8941b3aa66d0f5e9 i965: Solve Android native fence fd double close
# stable: Depends on earlier commit 5f99c490089 which did not land in
# branch.
0549ea15ec380f3ca6df76ce53ff4c30bfc21dbf radeonsi: fix primitive ID in fragment shader when using tessellation
# stable: Depends on earlier commit 9fd9a7d0ba3 which did not land in
# branch.
b84b631c6381d9b36bca5d0e7cc67dd23af188c1 radeonsi: load patch_id for TES-as-ES when exporting for PS
# stable: The bug that they fixed is probably more benign than a
# possible assertion in the X server.
19b61799e3d06795d783b34fdbbf8474ef1e9a7c st/mesa: don't cast the incomplete framebufer to st_framebuffer
2f0450c627e5158d49aa1320eed9a5f6cb184838 radeonsi: add new vega10 pci ids

View File

@@ -2394,7 +2394,9 @@ if test -n "$with_gallium_drivers"; then
xvirgl)
HAVE_GALLIUM_VIRGL=yes
require_libdrm "virgl"
require_basic_egl "virgl"
if test "x$enable_egl" = xyes; then
require_basic_egl "virgl"
fi
;;
*)
AC_MSG_ERROR([Unknown Gallium driver: $driver])

View File

@@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
TBD
2e0f41e7974ba7a36ca32bbeaf8ebcd65c8fd4d2dc9872f04d4becbd5e7a8cb5 mesa-17.0.2.tar.gz
f8f191f909e01e65de38d5bdea5fb057f21649a3aed20948be02348e77a689d4 mesa-17.0.2.tar.xz
</pre>

189
docs/relnotes/17.0.3.html Normal file
View File

@@ -0,0 +1,189 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.0.3 Release Notes / April 1, 2017</h1>
<p>
Mesa 17.0.3 is a bug fix release which fixes bugs found since the 17.0.2 release.
</p>
<p>
Mesa 17.0.3 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
8253edf1bdd7b14ab63d5982349143a5c9ac3767f39a63257cc9d7e7d92f60f1 mesa-17.0.3.tar.gz
ca646f5075a002d60ef9123c8a4331cede155c01712ef945a65c59a5e69fe7ed mesa-17.0.3.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=96743">Bug 96743</a> - [BYT, HSW, SKL, BXT, KBL] GPU hangs with GfxBench 4.0 CarChase</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99246">Bug 99246</a> - [d3dadapter+radeonsi &amp; bisect] EVE-Online : hang on wormhole sight</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100061">Bug 100061</a> - LODQ instruction generated with invalid dst mask</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100182">Bug 100182</a> - Flickering in The Talos Principle on Sky Lake GT4.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100201">Bug 100201</a> - Windows scons build with MSVC toolchain and LLVM 4.0 fails</li>
</ul>
<h2>Changes</h2>
<p>Alex Deucher (1):</p>
<ul>
<li>radeonsi: add new polaris12 pci id</li>
</ul>
<p>Andres Gomez (5):</p>
<ul>
<li>glsl: on UBO/SSBOs link error reset the number of active blocks to 0</li>
<li>cherry-ignore: add the Invalidate L2 for TRANSFER_WRITE barriers fix</li>
<li>cherry-ignore: add the Flush after unmap in gbm/dri fix</li>
<li>cherry-ignore: corrected typo in the Flush after unmap in gbm/dri fix</li>
<li>Update version to 17.0.3</li>
</ul>
<p>Axel Davy (2):</p>
<ul>
<li>st/nine: Resolve deadlock in surface/volume dtors when using csmt</li>
<li>st/nine: Use atomics for available_texture_mem</li>
</ul>
<p>Bas Nieuwenhuizen (1):</p>
<ul>
<li>radv: flush DB cache before and after HTILE decompress.</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>radv: fix primitive reset index emission</li>
</ul>
<p>Emil Velikov (1):</p>
<ul>
<li>docs: add sha256 checksums for 17.0.2</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>st/mesa: set result writemask based on ir type</li>
</ul>
<p>Jan Vesely (1):</p>
<ul>
<li>clover: use pipe_resource references</li>
</ul>
<p>Jason Ekstrand (9):</p>
<ul>
<li>anv/query: Invalidate the correct range</li>
<li>anv/GetQueryPoolResults: Actually implement the spec</li>
<li>anv/image: Return early when unbinding an image</li>
<li>anv/query: Fix the location of timestamp availability</li>
<li>anv: Make anv_get_layerCount a macro</li>
<li>anv/blorp: Use anv_get_layerCount everywhere</li>
<li>anv/cmd_buffer: Apply flush operations prior to executing secondaries</li>
<li>anv/cmd_buffer: Fix bad indentation</li>
<li>anv: Flush caches prior to PIPELINE_SELECT on all gens</li>
</ul>
<p>José Fonseca (1):</p>
<ul>
<li>c11/threads: Include thr/xtimec.h for xtime definition when building with MSVC.</li>
</ul>
<p>Juan A. Suarez Romero (1):</p>
<ul>
<li>tests/cache_test: allow crossing mount points</li>
</ul>
<p>Karol Herbst (1):</p>
<ul>
<li>nvc0/ir: treat FMA like MAD for operand propagation</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>i965: Fall back to GL 4.2/4.3 on Haswell if the kernel isn't new enough.</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>radeonsi: don't hang on shader compile failure</li>
</ul>
<p>Matt Turner (1):</p>
<ul>
<li>i965/fs: Don't emit SEL instructions for type-converting MOVs.</li>
</ul>
<p>Nanley Chery (1):</p>
<ul>
<li>intel: Correct the BDW surface state size</li>
</ul>
<p>Nicolai Hähnle (1):</p>
<ul>
<li>mesa/main: fix MultiDrawElements[BaseVertex] validation of primcount</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>freedreno: fix memory leak</li>
</ul>
<p>Tim Rowley (1):</p>
<ul>
<li>swr: [rasterizer jitter] fix llvm &gt;= 5.0 build break</li>
</ul>
<p>Timothy Arceri (2):</p>
<ul>
<li>glsl: fix lower jumps for returns when loop is inside an if</li>
<li>mesa: update lower_jumps tests after bug fix</li>
</ul>
<p>Topi Pohjolainen (1):</p>
<ul>
<li>i965/gen8+: Do full stall when switching pipeline</li>
</ul>
<p>Xu Randy (2):</p>
<ul>
<li>anv/blorp: Fix a crash in CmdClearColorImage</li>
<li>anv/genX: Solve the vkCreateGraphicsPipelines crash</li>
</ul>
</div>
</body>
</html>

149
docs/relnotes/17.0.4.html Normal file
View File

@@ -0,0 +1,149 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.0.4 Release Notes / April 17, 2017</h1>
<p>
Mesa 17.0.4 is a bug fix release which fixes bugs found since the 17.0.3 release.
</p>
<p>
Mesa 17.0.4 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
c4c34ba05d48f76b45bc05bc4b6e9242077f403d63c4f0c355c7b07786de233e mesa-17.0.4.tar.gz
1269dc8545a193932a0779b2db5bce9be4a5f6813b98c38b93b372be8362a346 mesa-17.0.4.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99515">Bug 99515</a> - SIGSEGV MAPERR on Android nougat-x86 with mesa 17.0.0rc</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100391">Bug 100391</a> - SachaWillems deferredmultisampling asserts</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100452">Bug 100452</a> - push_constants host memory leak when resetting command buffer</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100582">Bug 100582</a> - [GEN8+] piglit.spec.arb_stencil_texturing.glblitframebuffer corrupts state.gl_texture* assertions</li>
</ul>
<h2>Changes</h2>
<p>Alex Deucher (1):</p>
<ul>
<li>radeonsi: add new polaris10 pci id</li>
</ul>
<p>Alex Smith (1):</p>
<ul>
<li>radv: Invalidate L2 for TRANSFER_WRITE barriers</li>
</ul>
<p>Andres Gomez (1):</p>
<ul>
<li>docs: add sha256 checksums for 17.0.3</li>
</ul>
<p>Craig Stout (1):</p>
<ul>
<li>anv/cmd_buffer: fix host memory leak</li>
</ul>
<p>Emil Velikov (3):</p>
<ul>
<li>Revert "cherry-ignore: add the Flush after unmap in gbm/dri fix"</li>
<li>Revert "freedreno: fix memory leak"</li>
<li>Update version to 17.0.4</li>
</ul>
<p>Fabio Estevam (1):</p>
<ul>
<li>loader: Move non-error message to debug level</li>
</ul>
<p>Ilia Mirkin (4):</p>
<ul>
<li>nvc0/ir: fix LSB/BFE/BFI implementations</li>
<li>nvc0/ir: fix overwriting of offset register with interpolateAtOffset</li>
<li>nvc0: increase texture buffer object alignment to 256 for pre-GM107</li>
<li>nouveau: when mapping a persistent buffer, synchronize on former xfers</li>
</ul>
<p>Jason Ekstrand (5):</p>
<ul>
<li>i965/fs: Always provide a default LOD of 0 for TXS and TXL</li>
<li>anv/pipeline: Properly handle unset gl_Layer and gl_ViewportIndex</li>
<li>anv/blorp: Align vertex buffers to 64B</li>
<li>i965/blorp: Align vertex buffers to 64B</li>
<li>i965/blorp: Bump the batch space estimate</li>
</ul>
<p>Jerome Duval (2):</p>
<ul>
<li>haiku: build fixes around debug defines</li>
<li>haiku/winsys: fix dt prototype args</li>
</ul>
<p>Julien Isorce (4):</p>
<ul>
<li>winsys/radeon: check null in radeon_cs_create_fence</li>
<li>winsys/radeon: check null return from radeon_cs_create_fence in cs_flush</li>
<li>radeon: initialize hole variable before calling container_of</li>
<li>radeon_drm_bo: explicitly check return value of drmCommandWriteRead</li>
</ul>
<p>Kenneth Graunke (4):</p>
<ul>
<li>i965: Document the sad story of the kernel command parser.</li>
<li>i965: Set screen-&gt;cmd_parser_version to 0 if we can't write registers.</li>
<li>i965: Skip register write detection when possible.</li>
<li>i965: Set kernel features before computing max GL version.</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>targets: export radeon winsys_create functions to silence LLVM warning</li>
</ul>
<p>Michal Srb (1):</p>
<ul>
<li>st: Add cubeMapFace parameter to st_finalize_texture.</li>
</ul>
<p>Thomas Hellstrom (1):</p>
<ul>
<li>gbm/dri: Flush after unmap</li>
</ul>
</div>
</body>
</html>

144
docs/relnotes/17.0.5.html Normal file
View File

@@ -0,0 +1,144 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.0.5 Release Notes / April 28, 2017</h1>
<p>
Mesa 17.0.5 is a bug fix release which fixes bugs found since the 17.0.4 release.
</p>
<p>
Mesa 17.0.5 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
7510eee0d0077860b250d30d73305048c2df4ba09ea8fc04e4f3eec7beece301 mesa-17.0.5.tar.gz
668efa445d2f57a26e5c096b1965a685733a3b57d9c736f9d6460263847f9bfe mesa-17.0.5.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=97524">Bug 97524</a> - Samplers referring to the same texture unit with different types should raise GL_INVALID_OPERATION</li>
</ul>
<h2>Changes</h2>
<p>Andres Gomez (16):</p>
<ul>
<li>cherry-ignore: Add the pci_id into the shader cache UUID</li>
<li>cherry-ignore: fix crash if ctx torn down with no rendering</li>
<li>cherry-ignore: Fix typos.</li>
<li>cherry-ignore: Revert "etnaviv: Cannot render to rb-swapped formats"</li>
<li>cherry-ignore: Revert "i965/fs: Don't emit SEL instructions for type-converting MOVs."</li>
<li>cherry-ignore: fix typo in a2b10g10r10 fast clear calculation</li>
<li>cherry-ignore: remove unused anv_dispatch_table dtable</li>
<li>cherry-ignore: remove unused radv_dispatch_table dtable</li>
<li>cherry-ignore: make radv_resolve_entrypoint static</li>
<li>cherry-ignore: vulkan: add support for libmesa_vulkan_util</li>
<li>cherry-ignore: r600: fix libmesa_amd_common dependency</li>
<li>cherry-ignore: remove dead brw_new_shader() declaration</li>
<li>cherry-ignore: remove i965_symbols_test reference from .gitignore</li>
<li>cherry-ignore: automake: ensure that the destination directory is created</li>
<li>cherry-ignore: provide required gem stubs for the tests</li>
<li>Update version to 17.0.5</li>
</ul>
<p>Boyan Ding (2):</p>
<ul>
<li>nvc0/ir: Properly handle a "split form" of predicate destination</li>
<li>nir: Destination component count of shader_clock intrinsic is 2</li>
</ul>
<p>Emil Velikov (5):</p>
<ul>
<li>docs: add sha256 checksums for 17.0.4</li>
<li>winsys/sw/dri: don't use GNU void pointer arithmetic</li>
<li>st/clover: add space between &lt; and ::</li>
<li>configure.ac: check require_basic_egl only if egl enabled</li>
<li>st/mesa: automake: honour the vdpau header install location</li>
</ul>
<p>Francisco Jerez (2):</p>
<ul>
<li>intel/fs: Use regs_written() in spilling cost heuristic for improved accuracy.</li>
<li>intel/fs: Take into account amount of data read in spilling cost heuristic.</li>
</ul>
<p>Grazvydas Ignotas (1):</p>
<ul>
<li>radv: report timestampPeriod correctly</li>
</ul>
<p>Jason Ekstrand (5):</p>
<ul>
<li>anv/blorp: Flush the texture cache in UpdateBuffer</li>
<li>anv/cmd_buffer: Flush the VF cache at the top of all primaries</li>
<li>anv/cmd_buffer: Always set up a null surface state</li>
<li>anv/cmd_buffer: Use the null surface state for ATTACHMENT_UNUSED</li>
<li>anv/blorp: Properly handle VK_ATTACHMENT_UNUSED</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>i965/vec4: Avoid reswizzling MACH instructions in opt_register_coalesce().</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>st/mesa: invalidate the readpix cache in st_indirect_draw_vbo</li>
</ul>
<p>Nanley Chery (1):</p>
<ul>
<li>anv/cmd_buffer: Disable CCS on BDW input attachments</li>
</ul>
<p>Nicolai Hähnle (4):</p>
<ul>
<li>mesa: fix remaining xfb prims check for GLES with multiple instances</li>
<li>mesa: extract need_xfb_remaining_prims_check</li>
<li>mesa: move glMultiDrawArrays to vbo and fix error handling</li>
<li>vbo: fix gl_DrawID handling in glMultiDrawArrays</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>util/queue: don't hang at exit</li>
</ul>
<p>Timothy Arceri (1):</p>
<ul>
<li>mesa: validate sampler type across the whole program</li>
</ul>
</div>
</body>
</html>

186
docs/relnotes/17.0.6.html Normal file
View File

@@ -0,0 +1,186 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.0.6 Release Notes / May 12, 2017</h1>
<p>
Mesa 17.0.6 is a bug fix release which fixes bugs found since the 17.0.5 release.
</p>
<p>
Mesa 17.0.6 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
f1b2497d553e9a584f0caa3a2d9d310e27ead15fb0af170da69f6e70fb5031cd mesa-17.0.6.tar.gz
89ecf3bcd0f18dcca5aaa42bf36bb52a2df33be89889f94aaaad91f7a504a69d mesa-17.0.6.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98428">Bug 98428</a> - Undefined non-weak-symbol in dri-drivers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100854">Bug 100854</a> - YUV to RGB Color Space Conversion result is not precise</li>
</ul>
<h2>Changes</h2>
<p>Adam Jackson (1):</p>
<ul>
<li>egl/platform/drm: Don't take display ownership until gbm is initialized</li>
</ul>
<p>Andres Gomez (7):</p>
<ul>
<li>docs: add sha256 checksums for 17.0.5</li>
<li>travis: replace Trusty-based LLVM toolchain apt-get with apt addon</li>
<li>travis: add the possibility of using the txc-dxtn library</li>
<li>cherry-ignore: 17.1 nominations only</li>
<li>cherry-ignore: fix regression in descriptor set freeing.</li>
<li>cherry-ignore: rejected commits</li>
<li>Update version to 17.0.6</li>
</ul>
<p>Ben Boeckel (1):</p>
<ul>
<li>scons: update for LLVM 4.0</li>
</ul>
<p>Brian Paul (1):</p>
<ul>
<li>st/mesa: move duplicated st_ws_framebuffer() function into header file</li>
</ul>
<p>Chad Versace (3):</p>
<ul>
<li>egl: Emit error when EGLSurface is lost</li>
<li>egl/android: Cancel any outstanding ANativeBuffer in surface destructor</li>
<li>egl/android: Mark surface as lost when dequeueBuffer fails</li>
</ul>
<p>Christian Gmeiner (1):</p>
<ul>
<li>etnaviv: add L8A8_UNORM texture format</li>
</ul>
<p>Dave Airlie (2):</p>
<ul>
<li>radv/wsi: report presentation error per image request</li>
<li>radv: enable POLARIS12 support.</li>
</ul>
<p>Emil Velikov (21):</p>
<ul>
<li>travis: correct libdrm required regex to also track libdrm itself</li>
<li>travis: add nearly all gallium drivers to the list</li>
<li>travis: use both cores for make/make check</li>
<li>travis: bring the scons build on par with AppVeyor</li>
<li>travis: explicitly LD_LIBRARY_PATH the local libraries</li>
<li>travis: enable apt cache</li>
<li>travis: automatically manage ccache caching</li>
<li>travis: remove unused -dev packages</li>
<li>travis: rework "if test" blocks in the script section</li>
<li>travis: split out matrix from env</li>
<li>travis: add separate "scons" and "scons llvm" targets</li>
<li>travis: add "scons swr" to the build matrix</li>
<li>travis: add "make swr" to the build matrix</li>
<li>travis: split the make target to three separate ones</li>
<li>travis: model scons check target like the make one</li>
<li>travis: add Gallium state-tracker targets</li>
<li>travis: enable wayland support</li>
<li>travis: bump MAKEFLAGS to -j4</li>
<li>gallium/dri: always link against shared glapi</li>
<li>mesa/dri: always link against shared glapi</li>
<li>glx: glX_proto_send.py: use correct compile guard GLX_INDIRECT_RENDERING</li>
</ul>
<p>Eric Anholt (1):</p>
<ul>
<li>nir: Pick just the channels we want for bitmap and drawpixels lowering.</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>gallium/targets: fix bool setting on BE architectures</li>
</ul>
<p>Jason Ekstrand (1):</p>
<ul>
<li>anv/cmd_buffer: Use the device allocator for QueueSubmit</li>
</ul>
<p>Johnson Lin (1):</p>
<ul>
<li>nir/lower_tex: Fix minor error in YUV color conversion matrix</li>
</ul>
<p>Marek Olšák (2):</p>
<ul>
<li>radeonsi: adjust ESGS ring buffer size computation on VI</li>
<li>radeonsi: apply the tess+GS hang workaround to Polaris12 as well</li>
</ul>
<p>Nicolai Hähnle (1):</p>
<ul>
<li>radeonsi: fix gl_PrimitiveID in tessellation with instanced draws on SI</li>
</ul>
<p>Philipp Zabel (3):</p>
<ul>
<li>renderonly: close transfer prime_fd</li>
<li>renderonly: drop resources on destroy</li>
<li>renderonly: use drmIoctl</li>
</ul>
<p>Rhys Kidd (3):</p>
<ul>
<li>travis: Support LLVM 3.8+ on Trusty-based Travis-CI via apt-get not apt addon</li>
<li>travis: Add radv vulkan driver to continuous integration</li>
<li>travis: Add radeonsi to continuous integration</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>freedreno/a3xx: fix hang w/ large render targets and small gmem</li>
</ul>
<p>Samuel Iglesias Gonsálvez (5):</p>
<ul>
<li>i965/vec4: fix vertical stride to avoid breaking region parameter rule</li>
<li>i965/vec4: fix register width for DF VGRF and UNIFORM</li>
<li>i965/vec4: don't modify regioning parameters to the sources of DF align1 instructions</li>
<li>anv: anv_gem_mmap() returns MAP_FAILED as mapping error</li>
<li>anv: vkBindImageMemory() should return VK_ERROR_OUT_OF_{HOST,DEVICE}_MEMORY on failure</li>
</ul>
</div>
</body>
</html>

145
docs/relnotes/17.0.7.html Normal file
View File

@@ -0,0 +1,145 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.0.7 Release Notes / June 1, 2017</h1>
<p>
Mesa 17.0.7 is a bug fix release which fixes bugs found since the 17.0.6 release.
</p>
<p>
Mesa 17.0.7 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
bc68d13c6b1a053b855ac453ebf7e62bd89511adf44bad6c613e09f7fa13390a mesa-17.0.7.tar.gz
f6d75304a229c8d10443e219d6b6c0c342567dbab5a879ebe7cfa3c9139c4492 mesa-17.0.7.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98833">Bug 98833</a> - [REGRESSION, bisected] Wayland revert commit breaks non-Vsync fullscreen frame updates</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100741">Bug 100741</a> - Chromium - Memory leak</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100925">Bug 100925</a> - [HSW/BSW/BDW/SKL] Google Earth is not resolving all the details in the map correctly</li>
</ul>
<h2>Changes</h2>
<p>Andres Gomez (1):</p>
<ul>
<li>docs: add sha256 checksums for 17.0.6</li>
</ul>
<p>Bartosz Tomczyk (1):</p>
<ul>
<li>mesa: Avoid leaking surface in st_renderbuffer_delete</li>
</ul>
<p>Chad Versace (1):</p>
<ul>
<li>egl: Partially revert 23c86c74, fix eglMakeCurrent</li>
</ul>
<p>Daniel Stone (7):</p>
<ul>
<li>vulkan: Fix Wayland uninitialised registry</li>
<li>vulkan/wsi/wayland: Remove roundtrip when creating image</li>
<li>vulkan/wsi/wayland: Use per-display event queue</li>
<li>vulkan/wsi/wayland: Use proxy wrappers for swapchain</li>
<li>egl/wayland: Don't open-code roundtrip</li>
<li>egl/wayland: Use per-surface event queues</li>
<li>egl/wayland: Ensure we get a back buffer</li>
</ul>
<p>Emil Velikov (5):</p>
<ul>
<li>st/va: fix misplaced closing bracket</li>
<li>anv: automake: list shared libraries after the static ones</li>
<li>radv: automake: list shared libraries after the static ones</li>
<li>egl/wayland: select the format based on the interface used</li>
<li>Update version to 17.0.7</li>
</ul>
<p>Eric Anholt (2):</p>
<ul>
<li>renderonly: Initialize fields of struct winsys_handle.</li>
<li>vc4: Don't allocate new BOs to avoid synchronization when they're shared.</li>
</ul>
<p>Hans de Goede (1):</p>
<ul>
<li>glxglvnddispatch: Add missing dispatch for GetDriverConfig</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>nvc0/ir: SHLADD's middle source must be an immediate</li>
</ul>
<p>Jason Ekstrand (2):</p>
<ul>
<li>i965/blorp: Do and end-of-pipe sync on both sides of fast-clear ops</li>
<li>i965: Round copy size to the nearest block in intel_miptree_copy</li>
</ul>
<p>Lucas Stach (1):</p>
<ul>
<li>etnaviv: stop oversizing buffer resources</li>
</ul>
<p>Nanley Chery (2):</p>
<ul>
<li>anv/formats: Update the three-channel BC1 mappings</li>
<li>i965/formats: Update the three-channel DXT1 mappings</li>
</ul>
<p>Pohjolainen, Topi (1):</p>
<ul>
<li>intel/isl/gen7: Use stencil vertical alignment of 8 instead of 4</li>
</ul>
<p>Samuel Iglesias Gonsálvez (3):</p>
<ul>
<li>i965/vec4/gs: restore the uniform values which was overwritten by failed vec4_gs_visitor execution</li>
<li>i965/vec4: fix swizzle and writemask when loading an uniform with constant offset</li>
<li>i965/vec4: load dvec3/4 uniforms first in the push constant buffer</li>
</ul>
<p>Tom Stellard (1):</p>
<ul>
<li>gallivm: Make sure module has the correct data layout when pass manager runs</li>
</ul>
</div>
</body>
</html>

View File

@@ -30,6 +30,9 @@
#define EMULATED_THREADS_H_INCLUDED_
#include <time.h>
#ifdef _MSC_VER
#include <thr/xtimec.h> // for xtime
#endif
#ifndef TIME_UTC
#define TIME_UTC 1
@@ -41,11 +44,13 @@
typedef void (*tss_dtor_t)(void*);
typedef int (*thrd_start_t)(void*);
#ifndef _MSC_VER
struct xtime {
time_t sec;
long nsec;
};
typedef struct xtime xtime;
#endif
/*-------------------- enumeration constants --------------------*/

View File

@@ -202,6 +202,7 @@ CHIPSET(0x67C9, POLARIS10_, POLARIS10)
CHIPSET(0x67CA, POLARIS10_, POLARIS10)
CHIPSET(0x67CC, POLARIS10_, POLARIS10)
CHIPSET(0x67CF, POLARIS10_, POLARIS10)
CHIPSET(0x67D0, POLARIS10_, POLARIS10)
CHIPSET(0x67DF, POLARIS10_, POLARIS10)
CHIPSET(0x98E4, STONEY_, STONEY)
@@ -211,4 +212,5 @@ CHIPSET(0x6981, POLARIS12_, POLARIS12)
CHIPSET(0x6985, POLARIS12_, POLARIS12)
CHIPSET(0x6986, POLARIS12_, POLARIS12)
CHIPSET(0x6987, POLARIS12_, POLARIS12)
CHIPSET(0x6995, POLARIS12_, POLARIS12)
CHIPSET(0x699F, POLARIS12_, POLARIS12)

View File

@@ -105,8 +105,26 @@ def generate(env):
'HAVE_STDINT_H',
])
env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')])
# LIBS should match the output of `llvm-config --libs engine mcjit bitwriter x86asmprinter`
if llvm_version >= distutils.version.LooseVersion('3.9'):
# LIBS should match the output of `llvm-config --libs engine mcjit bitwriter x86asmprinter irreader`
if llvm_version >= distutils.version.LooseVersion('4.0'):
env.Prepend(LIBS = [
'LLVMX86Disassembler', 'LLVMX86AsmParser',
'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter',
'LLVMDebugInfoCodeView', 'LLVMCodeGen',
'LLVMScalarOpts', 'LLVMInstCombine',
'LLVMTransformUtils',
'LLVMBitWriter', 'LLVMX86Desc',
'LLVMMCDisassembler', 'LLVMX86Info',
'LLVMX86AsmPrinter', 'LLVMX86Utils',
'LLVMMCJIT', 'LLVMExecutionEngine', 'LLVMTarget',
'LLVMAnalysis', 'LLVMProfileData',
'LLVMRuntimeDyld', 'LLVMObject', 'LLVMMCParser',
'LLVMBitReader', 'LLVMMC', 'LLVMCore',
'LLVMSupport',
'LLVMIRReader', 'LLVMAsmParser',
'LLVMDemangle', 'LLVMGlobalISel', 'LLVMDebugInfoMSF',
])
elif llvm_version >= distutils.version.LooseVersion('3.9'):
env.Prepend(LIBS = [
'LLVMX86Disassembler', 'LLVMX86AsmParser',
'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter',

View File

@@ -119,6 +119,7 @@ static const char *ac_get_llvm_processor_name(enum radeon_family family)
case CHIP_POLARIS10:
return "polaris10";
case CHIP_POLARIS11:
case CHIP_POLARIS12:
return "polaris11";
#endif
default:

View File

@@ -57,8 +57,21 @@ VULKAN_SOURCES = \
$(VULKAN_GENERATED_FILES) \
$(VULKAN_FILES)
VULKAN_LIB_DEPS =
VULKAN_LIB_DEPS = \
libvulkan_common.la \
$(top_builddir)/src/vulkan/wsi/libvulkan_wsi.la \
$(top_builddir)/src/amd/common/libamd_common.la \
$(top_builddir)/src/amd/addrlib/libamdgpu_addrlib.la \
$(top_builddir)/src/compiler/nir/libnir.la \
$(top_builddir)/src/util/libmesautil.la \
$(LLVM_LIBS) \
$(LIBELF_LIBS) \
$(PTHREAD_LIBS) \
$(AMDGPU_LIBS) \
$(LIBDRM_LIBS) \
$(PTHREAD_LIBS) \
$(DLOPEN_LIBS) \
-lm
if HAVE_PLATFORM_X11
AM_CPPFLAGS += \
@@ -90,22 +103,6 @@ endif
noinst_LTLIBRARIES = libvulkan_common.la
libvulkan_common_la_SOURCES = $(VULKAN_SOURCES)
VULKAN_LIB_DEPS += \
libvulkan_common.la \
$(top_builddir)/src/vulkan/wsi/libvulkan_wsi.la \
$(top_builddir)/src/amd/common/libamd_common.la \
$(top_builddir)/src/amd/addrlib/libamdgpu_addrlib.la \
$(top_builddir)/src/compiler/nir/libnir.la \
$(top_builddir)/src/util/libmesautil.la \
$(LLVM_LIBS) \
$(LIBELF_LIBS) \
$(PTHREAD_LIBS) \
$(AMDGPU_LIBS) \
$(LIBDRM_LIBS) \
$(PTHREAD_LIBS) \
$(DLOPEN_LIBS) \
-lm
nodist_EXTRA_libvulkan_radeon_la_SOURCES = dummy.cpp
libvulkan_radeon_la_SOURCES = $(VULKAN_GEM_FILES)

View File

@@ -1974,7 +1974,7 @@ void radv_CmdDraw(
static void radv_emit_primitive_reset_index(struct radv_cmd_buffer *cmd_buffer)
{
uint32_t primitive_reset_index = cmd_buffer->state.last_primitive_reset_index ? 0xffffffffu : 0xffffu;
uint32_t primitive_reset_index = cmd_buffer->state.index_type ? 0xffffffffu : 0xffffu;
if (cmd_buffer->state.pipeline->graphics.prim_restart_enable &&
primitive_reset_index != cmd_buffer->state.last_primitive_reset_index) {
@@ -2411,7 +2411,13 @@ static void radv_handle_depth_image_transition(struct radv_cmd_buffer *cmd_buffe
range.baseMipLevel = 0;
range.levelCount = 1;
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB |
RADV_CMD_FLAG_FLUSH_AND_INV_DB_META;
radv_decompress_depth_image_inplace(cmd_buffer, image, &range);
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB |
RADV_CMD_FLAG_FLUSH_AND_INV_DB_META;
}
}
@@ -2574,7 +2580,8 @@ void radv_CmdPipelineBarrier(
flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB;
break;
case VK_ACCESS_TRANSFER_WRITE_BIT:
flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB |
RADV_CMD_FLAG_INV_GLOBAL_L2;
break;
default:
break;

View File

@@ -570,7 +570,7 @@ void radv_GetPhysicalDeviceProperties(
.storageImageSampleCounts = VK_SAMPLE_COUNT_1_BIT,
.maxSampleMaskWords = 1,
.timestampComputeAndGraphics = false,
.timestampPeriod = 100000.0 / pdevice->rad_info.clock_crystal_freq,
.timestampPeriod = 1000000.0 / pdevice->rad_info.clock_crystal_freq,
.maxClipDistances = 8,
.maxCullDistances = 8,
.maxCombinedClipAndCullDistances = 8,

View File

@@ -94,7 +94,7 @@ struct radeon_info {
uint32_t compute_rings;
uint32_t vce_fw_version;
uint32_t vce_harvest_config;
uint32_t clock_crystal_freq;
uint32_t clock_crystal_freq; /* in kHz */
/* Kernel info. */
uint32_t drm_major; /* version */

View File

@@ -347,16 +347,20 @@ VkResult radv_QueuePresentKHR(
for (uint32_t i = 0; i < pPresentInfo->swapchainCount; i++) {
RADV_FROM_HANDLE(wsi_swapchain, swapchain, pPresentInfo->pSwapchains[i]);
VkResult item_result;
assert(radv_device_from_handle(swapchain->device) == queue->device);
if (swapchain->fences[0] == VK_NULL_HANDLE) {
result = radv_CreateFence(radv_device_to_handle(queue->device),
item_result = radv_CreateFence(radv_device_to_handle(queue->device),
&(VkFenceCreateInfo) {
.sType = VK_STRUCTURE_TYPE_FENCE_CREATE_INFO,
.flags = 0,
}, &swapchain->alloc, &swapchain->fences[0]);
if (result != VK_SUCCESS)
return result;
if (pPresentInfo->pResults != NULL)
pPresentInfo->pResults[i] = item_result;
result = result == VK_SUCCESS ? item_result : result;
if (item_result != VK_SUCCESS)
continue;
} else {
radv_ResetFences(radv_device_to_handle(queue->device),
1, &swapchain->fences[0]);
@@ -372,11 +376,14 @@ VkResult radv_QueuePresentKHR(
pPresentInfo->waitSemaphoreCount, NULL, 0, false, base_fence);
fence->submitted = true;
result = swapchain->queue_present(swapchain,
pPresentInfo->pImageIndices[i]);
item_result = swapchain->queue_present(swapchain,
pPresentInfo->pImageIndices[i]);
/* TODO: What if one of them returns OUT_OF_DATE? */
if (result != VK_SUCCESS)
return result;
if (pPresentInfo->pResults != NULL)
pPresentInfo->pResults[i] = item_result;
result = result == VK_SUCCESS ? item_result : result;
if (item_result != VK_SUCCESS)
continue;
VkFence last = swapchain->fences[2];
swapchain->fences[2] = swapchain->fences[1];

View File

@@ -291,6 +291,7 @@ void si_init_config(struct radv_physical_device *physical_device,
raster_config_1 = 0x0000002a;
break;
case CHIP_POLARIS11:
case CHIP_POLARIS12:
raster_config = 0x16000012;
raster_config_1 = 0x00000000;
break;

View File

@@ -106,6 +106,7 @@ get_chip_name(enum radeon_family family)
case CHIP_FIJI: return "AMD RADV FIJI";
case CHIP_POLARIS10: return "AMD RADV POLARIS10";
case CHIP_POLARIS11: return "AMD RADV POLARIS11";
case CHIP_POLARIS12: return "AMD RADV POLARIS12";
case CHIP_STONEY: return "AMD RADV STONEY";
default: return "AMD RADV unknown";
}
@@ -270,6 +271,10 @@ do_winsys_init(struct radv_amdgpu_winsys *ws, int fd)
ws->family = FAMILY_VI;
ws->rev_id = VI_POLARIS11_M_A0;
break;
case CHIP_POLARIS12:
ws->family = FAMILY_VI;
ws->rev_id = VI_POLARIS12_V_A0;
break;
default:
fprintf(stderr, "amdgpu: Unknown family.\n");
goto fail;

View File

@@ -927,7 +927,8 @@ nir_visitor::visit(ir_call *ir)
nir_builder_instr_insert(&b, &instr->instr);
break;
case nir_intrinsic_shader_clock:
nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
instr->num_components = 2;
nir_builder_instr_insert(&b, &instr->instr);
break;
case nir_intrinsic_store_ssbo: {

View File

@@ -1176,6 +1176,12 @@ interstage_cross_validate_uniform_blocks(struct gl_shader_program *prog,
for (unsigned k = 0; k <= i; k++) {
delete[] InterfaceBlockStageIndex[k];
}
/* Reset the block count. This will help avoid various segfaults
* from api calls that assume the array exists due to the count
* being non-zero.
*/
*num_blks = 0;
return false;
}

View File

@@ -932,14 +932,21 @@ lower_continue:
* break statement if necessary.
*/
return_if->then_instructions.push_tail(new(ir) ir_loop_jump(ir_loop_jump::jump_break));
else
/* Otherwise, all we need to do is ensure that the
* instructions that follow are only executed if the
* return flag is clear. We can do that by moving those
* instructions into the else clause of the generated if
else {
/* Otherwise, ensure that the instructions that follow are only
* executed if the return flag is clear. We can do that by moving
* those instructions into the else clause of the generated if
* statement.
*/
move_outer_block_inside(ir, &return_if->else_instructions);
/* In case the loop is embeded inside an if add a new return to
* the return flag then branch and let a future pass tidy it up.
*/
if (this->function.signature->return_type->is_void())
return_if->then_instructions.push_tail(new(ir) ir_return(NULL));
}
ir->insert_after(return_if);
}

View File

@@ -111,7 +111,7 @@ rmrf_local(const char *path)
if (path == NULL || *path == '\0' || *path != '.')
return -1;
return nftw(path, remove_entry, 64, FTW_DEPTH | FTW_PHYS | FTW_MOUNT);
return nftw(path, remove_entry, 64, FTW_DEPTH | FTW_PHYS);
}
#define CACHE_TEST_TMP "./cache-test-tmp"

View File

@@ -236,6 +236,13 @@ def if_execute_flag(statements):
check_sexp(statements)
return [['if', ['var_ref', 'execute_flag'], statements, []]]
def if_return_flag(then_statements, else_statements):
"""Wrap statements in an if test with return_flag as the condition.
"""
check_sexp(then_statements)
check_sexp(else_statements)
return [['if', ['var_ref', 'return_flag'], then_statements, else_statements]]
def if_not_return_flag(statements):
"""Wrap statements in an if test so that they will only execute if
return_flag is False.
@@ -452,7 +459,10 @@ def test_lower_pulled_out_jump():
loop(simple_if('b', simple_if('c', [], continue_()),
lowered_return_simple()) +
break_()) +
if_not_return_flag(assign_x('d', const_float(1))))
if_return_flag(assign_x('return_flag', const_bool(1)) +
assign_x('execute_flag', const_bool(0)),
assign_x('d', const_float(1))))
))
create_test_case(doc_string, input_sexp, expected_sexp, 'lower_pulled_out_jump',
lower_main_return=True, pull_out_jumps=True)
@@ -583,11 +593,14 @@ def test_lower_return_void_at_end_of_loop():
assign_x('b', const_float(2))
))
expected_sexp = make_test_case('main', 'void', (
declare_execute_flag() +
declare_return_flag() +
loop(assign_x('a', const_float(1)) +
lowered_return_simple() +
break_()) +
if_not_return_flag(assign_x('b', const_float(2)))
if_return_flag(assign_x('return_flag', const_bool(1)) +
assign_x('execute_flag', const_bool(0)),
assign_x('b', const_float(2)))
))
create_test_case(doc_string, input_sexp, input_sexp, 'return_void_at_end_of_loop_lower_nothing')
create_test_case(doc_string, input_sexp, expected_sexp, 'return_void_at_end_of_loop_lower_return',

View File

@@ -91,7 +91,7 @@ BARRIER(memory_barrier)
* The latter can be used as code motion barrier, which is currently not
* feasible with NIR.
*/
INTRINSIC(shader_clock, 0, ARR(0), true, 1, 0, 0, xx, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE)
INTRINSIC(shader_clock, 0, ARR(0), true, 2, 0, 0, xx, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE)
/*
* Memory barrier with semantics analogous to the compute shader

View File

@@ -96,7 +96,9 @@ lower_bitmap(nir_shader *shader, nir_builder *b,
tex->texture_index = options->sampler;
tex->dest_type = nir_type_float;
tex->src[0].src_type = nir_tex_src_coord;
tex->src[0].src = nir_src_for_ssa(texcoord);
tex->src[0].src =
nir_src_for_ssa(nir_channels(b, texcoord,
(1 << tex->coord_components) - 1));
nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &tex->instr);

View File

@@ -135,7 +135,9 @@ lower_color(lower_drawpixels_state *state, nir_intrinsic_instr *intr)
tex->texture_index = state->options->drawpix_sampler;
tex->dest_type = nir_type_float;
tex->src[0].src_type = nir_tex_src_coord;
tex->src[0].src = nir_src_for_ssa(texcoord);
tex->src[0].src =
nir_src_for_ssa(nir_channels(b, texcoord,
(1 << tex->coord_components) - 1));
nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &tex->instr);

View File

@@ -243,9 +243,9 @@ convert_yuv_to_rgb(nir_builder *b, nir_tex_instr *tex,
nir_ssa_def *yuv =
nir_vec4(b,
nir_fmul(b, nir_imm_float(b, 1.16438356f),
nir_fadd(b, y, nir_imm_float(b, -0.0625f))),
nir_channel(b, nir_fadd(b, u, nir_imm_float(b, -0.5f)), 0),
nir_channel(b, nir_fadd(b, v, nir_imm_float(b, -0.5f)), 0),
nir_fadd(b, y, nir_imm_float(b, -16.0f / 255.0f))),
nir_channel(b, nir_fadd(b, u, nir_imm_float(b, -128.0f / 255.0f)), 0),
nir_channel(b, nir_fadd(b, v, nir_imm_float(b, -128.0f / 255.0f)), 0),
nir_imm_float(b, 0.0));
nir_ssa_def *red = nir_fdot4(b, yuv, nir_build_imm(b, 4, 32, m[0]));

View File

@@ -264,6 +264,10 @@ struct dri2_egl_surface
struct wl_egl_window *wl_win;
int dx;
int dy;
struct wl_event_queue *wl_queue;
struct wl_surface *wl_surface_wrapper;
struct wl_display *wl_dpy_wrapper;
struct wl_drm *wl_drm_wrapper;
struct wl_callback *throttle_callback;
int format;
#endif

View File

@@ -251,10 +251,15 @@ droid_window_enqueue_buffer(_EGLDisplay *disp, struct dri2_egl_surface *dri2_sur
}
static void
droid_window_cancel_buffer(_EGLDisplay *disp, struct dri2_egl_surface *dri2_surf)
droid_window_cancel_buffer(struct dri2_egl_surface *dri2_surf)
{
/* no cancel buffer? */
droid_window_enqueue_buffer(disp, dri2_surf);
int ret;
ret = dri2_surf->window->cancelBuffer(dri2_surf->window, dri2_surf->buffer, -1);
if (ret < 0) {
_eglLog(_EGL_WARNING, "ANativeWindow::cancelBuffer failed");
dri2_surf->base.Lost = EGL_TRUE;
}
}
static __DRIbuffer *
@@ -386,7 +391,7 @@ droid_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
if (dri2_surf->base.Type == EGL_WINDOW_BIT) {
if (dri2_surf->buffer)
droid_window_cancel_buffer(disp, dri2_surf);
droid_window_cancel_buffer(dri2_surf);
dri2_surf->window->common.decRef(&dri2_surf->window->common);
}
@@ -413,12 +418,16 @@ droid_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
static int
update_buffers(struct dri2_egl_surface *dri2_surf)
{
if (dri2_surf->base.Lost)
return -1;
if (dri2_surf->base.Type != EGL_WINDOW_BIT)
return 0;
/* try to dequeue the next back buffer */
if (!dri2_surf->buffer && !droid_window_dequeue_buffer(dri2_surf)) {
_eglLog(_EGL_WARNING, "Could not dequeue buffer from native window");
dri2_surf->base.Lost = EGL_TRUE;
return -1;
}
@@ -590,6 +599,12 @@ droid_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *draw)
dri2_flush_drawable_for_swapbuffers(disp, draw);
/* dri2_surf->buffer can be null even when no error has occured. For
* example, if the user has called no GL rendering commands since the
* previous eglSwapBuffers, then the driver may have not triggered
* a callback to ANativeWindow::dequeueBuffer, in which case
* dri2_surf->buffer remains null.
*/
if (dri2_surf->buffer)
droid_window_enqueue_buffer(disp, dri2_surf);

View File

@@ -678,12 +678,12 @@ dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
fd = loader_open_device(buf);
if (fd < 0)
fd = loader_open_device("/dev/dri/card0");
dri2_dpy->own_device = 1;
gbm = gbm_create_device(fd);
if (gbm == NULL) {
err = "DRI2: failed to create gbm device";
goto cleanup;
}
dri2_dpy->own_device = 1;
} else {
fd = fcntl(gbm_device_get_fd(gbm), F_DUPFD_CLOEXEC, 3);
if (fd < 0) {

View File

@@ -55,34 +55,10 @@ static EGLBoolean
dri2_wl_swap_interval(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf,
EGLint interval);
static void
sync_callback(void *data, struct wl_callback *callback, uint32_t serial)
{
int *done = data;
*done = 1;
wl_callback_destroy(callback);
}
static const struct wl_callback_listener sync_listener = {
.done = sync_callback
};
static int
roundtrip(struct dri2_egl_display *dri2_dpy)
{
struct wl_callback *callback;
int done = 0, ret = 0;
callback = wl_display_sync(dri2_dpy->wl_dpy_wrapper);
wl_callback_add_listener(callback, &sync_listener, &done);
while (ret != -1 && !done)
ret = wl_display_dispatch_queue(dri2_dpy->wl_dpy, dri2_dpy->wl_queue);
if (!done)
wl_callback_destroy(callback);
return ret;
return wl_display_roundtrip_queue(dri2_dpy->wl_dpy, dri2_dpy->wl_queue);
}
static void
@@ -148,7 +124,7 @@ dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
if (!_eglInitSurface(&dri2_surf->base, disp, EGL_WINDOW_BIT, conf, attrib_list))
goto cleanup_surf;
if (dri2_dpy->dri2) {
if (dri2_dpy->wl_drm) {
if (conf->RedSize == 5)
dri2_surf->format = WL_DRM_FORMAT_RGB565;
else if (conf->AlphaSize == 0)
@@ -156,6 +132,7 @@ dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
else
dri2_surf->format = WL_DRM_FORMAT_ARGB8888;
} else {
assert(dri2_dpy->wl_shm);
if (conf->RedSize == 5)
dri2_surf->format = WL_SHM_FORMAT_RGB565;
else if (conf->AlphaSize == 0)
@@ -170,6 +147,37 @@ dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
}
dri2_surf->wl_win = window;
dri2_surf->wl_queue = wl_display_create_queue(dri2_dpy->wl_dpy);
if (!dri2_surf->wl_queue) {
_eglError(EGL_BAD_ALLOC, "dri2_create_surface");
goto cleanup_surf;
}
if (dri2_dpy->wl_drm) {
dri2_surf->wl_drm_wrapper = wl_proxy_create_wrapper(dri2_dpy->wl_drm);
if (!dri2_surf->wl_drm_wrapper) {
_eglError(EGL_BAD_ALLOC, "dri2_create_surface");
goto cleanup_queue;
}
wl_proxy_set_queue((struct wl_proxy *)dri2_surf->wl_drm_wrapper,
dri2_surf->wl_queue);
}
dri2_surf->wl_dpy_wrapper = wl_proxy_create_wrapper(dri2_dpy->wl_dpy);
if (!dri2_surf->wl_dpy_wrapper) {
_eglError(EGL_BAD_ALLOC, "dri2_create_surface");
goto cleanup_drm;
}
wl_proxy_set_queue((struct wl_proxy *)dri2_surf->wl_dpy_wrapper,
dri2_surf->wl_queue);
dri2_surf->wl_surface_wrapper = wl_proxy_create_wrapper(window->surface);
if (!dri2_surf->wl_surface_wrapper) {
_eglError(EGL_BAD_ALLOC, "dri2_create_surface");
goto cleanup_drm;
}
wl_proxy_set_queue((struct wl_proxy *)dri2_surf->wl_surface_wrapper,
dri2_surf->wl_queue);
dri2_surf->wl_win->private = dri2_surf;
dri2_surf->wl_win->destroy_window_callback = destroy_window_callback;
@@ -200,6 +208,11 @@ dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
return &dri2_surf->base;
cleanup_drm:
if (dri2_surf->wl_drm_wrapper)
wl_proxy_wrapper_destroy(dri2_surf->wl_drm_wrapper);
cleanup_queue:
wl_event_queue_destroy(dri2_surf->wl_queue);
cleanup_surf:
free(dri2_surf);
@@ -265,6 +278,12 @@ dri2_wl_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
dri2_surf->wl_win->destroy_window_callback = NULL;
}
if (dri2_surf->wl_drm_wrapper)
wl_proxy_wrapper_destroy(dri2_surf->wl_drm_wrapper);
wl_proxy_wrapper_destroy(dri2_surf->wl_surface_wrapper);
wl_proxy_wrapper_destroy(dri2_surf->wl_dpy_wrapper);
wl_event_queue_destroy(dri2_surf->wl_queue);
free(surf);
return EGL_TRUE;
@@ -333,9 +352,9 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
}
/* There might be a buffer release already queued that wasn't processed */
wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_dpy->wl_queue);
wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_surf->wl_queue);
if (dri2_surf->back == NULL) {
while (dri2_surf->back == NULL) {
for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
/* Get an unlocked buffer, preferrably one with a dri_buffer
* already allocated. */
@@ -346,6 +365,14 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
else if (dri2_surf->back->dri_image == NULL)
dri2_surf->back = &dri2_surf->color_buffers[i];
}
if (dri2_surf->back)
break;
/* If we don't have a buffer, then block on the server to release one for
* us, and try again. */
if (wl_display_dispatch_queue(dri2_dpy->wl_dpy, dri2_surf->wl_queue) < 0)
return -1;
}
if (dri2_surf->back == NULL)
@@ -634,7 +661,7 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_STRIDE, &stride);
dri2_surf->current->wl_buffer =
wl_drm_create_prime_buffer(dri2_dpy->wl_drm,
wl_drm_create_prime_buffer(dri2_surf->wl_drm_wrapper,
fd,
dri2_surf->base.Width,
dri2_surf->base.Height,
@@ -648,7 +675,7 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_STRIDE, &stride);
dri2_surf->current->wl_buffer =
wl_drm_create_buffer(dri2_dpy->wl_drm,
wl_drm_create_buffer(dri2_surf->wl_drm_wrapper,
name,
dri2_surf->base.Width,
dri2_surf->base.Height,
@@ -656,8 +683,6 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
dri2_surf->format);
}
wl_proxy_set_queue((struct wl_proxy *) dri2_surf->current->wl_buffer,
dri2_dpy->wl_queue);
wl_buffer_add_listener(dri2_surf->current->wl_buffer,
&wl_buffer_listener, dri2_surf);
}
@@ -669,14 +694,14 @@ try_damage_buffer(struct dri2_egl_surface *dri2_surf,
{
int i;
if (wl_proxy_get_version((struct wl_proxy *) dri2_surf->wl_win->surface)
if (wl_proxy_get_version((struct wl_proxy *) dri2_surf->wl_surface_wrapper)
< WL_SURFACE_DAMAGE_BUFFER_SINCE_VERSION)
return EGL_FALSE;
for (i = 0; i < n_rects; i++) {
const int *rect = &rects[i * 4];
wl_surface_damage_buffer(dri2_surf->wl_win->surface,
wl_surface_damage_buffer(dri2_surf->wl_surface_wrapper,
rect[0],
dri2_surf->base.Height - rect[1] - rect[3],
rect[2], rect[3]);
@@ -699,7 +724,7 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
while (dri2_surf->throttle_callback != NULL)
if (wl_display_dispatch_queue(dri2_dpy->wl_dpy,
dri2_dpy->wl_queue) == -1)
dri2_surf->wl_queue) == -1)
return -1;
for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
@@ -715,11 +740,9 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
if (draw->SwapInterval > 0) {
dri2_surf->throttle_callback =
wl_surface_frame(dri2_surf->wl_win->surface);
wl_surface_frame(dri2_surf->wl_surface_wrapper);
wl_callback_add_listener(dri2_surf->throttle_callback,
&throttle_listener, dri2_surf);
wl_proxy_set_queue((struct wl_proxy *) dri2_surf->throttle_callback,
dri2_dpy->wl_queue);
}
dri2_surf->back->age = 1;
@@ -728,7 +751,7 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
create_wl_buffer(dri2_surf);
wl_surface_attach(dri2_surf->wl_win->surface,
wl_surface_attach(dri2_surf->wl_surface_wrapper,
dri2_surf->current->wl_buffer,
dri2_surf->dx, dri2_surf->dy);
@@ -742,7 +765,7 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
* ignore the damage region and post maximum damage, due to
* https://bugs.freedesktop.org/78190 */
if (!n_rects || !try_damage_buffer(dri2_surf, rects, n_rects))
wl_surface_damage(dri2_surf->wl_win->surface,
wl_surface_damage(dri2_surf->wl_surface_wrapper,
0, 0, INT32_MAX, INT32_MAX);
if (dri2_dpy->is_different_gpu) {
@@ -760,14 +783,14 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
dri2_flush_drawable_for_swapbuffers(disp, draw);
dri2_dpy->flush->invalidate(dri2_surf->dri_drawable);
wl_surface_commit(dri2_surf->wl_win->surface);
wl_surface_commit(dri2_surf->wl_surface_wrapper);
/* If we're not waiting for a frame callback then we'll at least throttle
* to a sync callback so that we always give a chance for the compositor to
* handle the commit and send a release event before checking for a free
* buffer */
if (dri2_surf->throttle_callback == NULL) {
dri2_surf->throttle_callback = wl_display_sync(dri2_dpy->wl_dpy_wrapper);
dri2_surf->throttle_callback = wl_display_sync(dri2_surf->wl_dpy_wrapper);
wl_callback_add_listener(dri2_surf->throttle_callback,
&throttle_listener, dri2_surf);
}
@@ -1410,11 +1433,13 @@ os_create_anonymous_file(off_t size)
static EGLBoolean
dri2_wl_swrast_allocate_buffer(struct dri2_egl_display *dri2_dpy,
dri2_wl_swrast_allocate_buffer(struct dri2_egl_surface *dri2_surf,
int format, int w, int h,
void **data, int *size,
struct wl_buffer **buffer)
{
struct dri2_egl_display *dri2_dpy =
dri2_egl_display(dri2_surf->base.Resource.Display);
struct wl_shm_pool *pool;
int fd, stride, size_map;
void *data_map;
@@ -1435,6 +1460,7 @@ dri2_wl_swrast_allocate_buffer(struct dri2_egl_display *dri2_dpy,
/* Share it in a wl_buffer */
pool = wl_shm_create_pool(dri2_dpy->wl_shm, fd, size_map);
wl_proxy_set_queue((struct wl_proxy *)pool, dri2_surf->wl_queue);
*buffer = wl_shm_pool_create_buffer(pool, 0, w, h, stride, format);
wl_shm_pool_destroy(pool);
close(fd);
@@ -1470,7 +1496,7 @@ swrast_update_buffers(struct dri2_egl_surface *dri2_surf)
/* find back buffer */
/* There might be a buffer release already queued that wasn't processed */
wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_dpy->wl_queue);
wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_surf->wl_queue);
/* try get free buffer already created */
for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
@@ -1486,7 +1512,7 @@ swrast_update_buffers(struct dri2_egl_surface *dri2_surf)
for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
if (!dri2_surf->color_buffers[i].locked) {
dri2_surf->back = &dri2_surf->color_buffers[i];
if (!dri2_wl_swrast_allocate_buffer(dri2_dpy,
if (!dri2_wl_swrast_allocate_buffer(dri2_surf,
dri2_surf->format,
dri2_surf->base.Width,
dri2_surf->base.Height,
@@ -1496,8 +1522,6 @@ swrast_update_buffers(struct dri2_egl_surface *dri2_surf)
_eglError(EGL_BAD_ALLOC, "failed to allocate color buffer");
return -1;
}
wl_proxy_set_queue((struct wl_proxy *) dri2_surf->back->wl_buffer,
dri2_dpy->wl_queue);
wl_buffer_add_listener(dri2_surf->back->wl_buffer,
&wl_buffer_listener, dri2_surf);
break;
@@ -1553,22 +1577,20 @@ dri2_wl_swrast_commit_backbuffer(struct dri2_egl_surface *dri2_surf)
while (dri2_surf->throttle_callback != NULL)
if (wl_display_dispatch_queue(dri2_dpy->wl_dpy,
dri2_dpy->wl_queue) == -1)
dri2_surf->wl_queue) == -1)
return;
if (dri2_surf->base.SwapInterval > 0) {
dri2_surf->throttle_callback =
wl_surface_frame(dri2_surf->wl_win->surface);
wl_surface_frame(dri2_surf->wl_surface_wrapper);
wl_callback_add_listener(dri2_surf->throttle_callback,
&throttle_listener, dri2_surf);
wl_proxy_set_queue((struct wl_proxy *) dri2_surf->throttle_callback,
dri2_dpy->wl_queue);
}
dri2_surf->current = dri2_surf->back;
dri2_surf->back = NULL;
wl_surface_attach(dri2_surf->wl_win->surface,
wl_surface_attach(dri2_surf->wl_surface_wrapper,
dri2_surf->current->wl_buffer,
dri2_surf->dx, dri2_surf->dy);
@@ -1578,9 +1600,9 @@ dri2_wl_swrast_commit_backbuffer(struct dri2_egl_surface *dri2_surf)
dri2_surf->dx = 0;
dri2_surf->dy = 0;
wl_surface_damage(dri2_surf->wl_win->surface,
wl_surface_damage(dri2_surf->wl_surface_wrapper,
0, 0, INT32_MAX, INT32_MAX);
wl_surface_commit(dri2_surf->wl_win->surface);
wl_surface_commit(dri2_surf->wl_surface_wrapper);
/* If we're not waiting for a frame callback then we'll at least throttle
* to a sync callback so that we always give a chance for the compositor to

View File

@@ -818,6 +818,14 @@ eglMakeCurrent(EGLDisplay dpy, EGLSurface draw, EGLSurface read,
RETURN_EGL_ERROR(disp, EGL_BAD_MATCH, EGL_FALSE);
}
/* If a native window underlying either draw or read is no longer valid,
* an EGL_BAD_NATIVE_WINDOW error is generated.
*/
if (draw_surf && draw_surf->Lost)
RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE);
if (read_surf && read_surf->Lost)
RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE);
ret = drv->API.MakeCurrent(drv, disp, draw_surf, read_surf, context);
RETURN_EGL_EVAL(disp, ret);
@@ -1205,6 +1213,15 @@ eglSwapBuffers(EGLDisplay dpy, EGLSurface surface)
RETURN_EGL_ERROR(disp, EGL_BAD_SURFACE, EGL_FALSE);
#endif
/* From the EGL 1.5 spec:
*
* If eglSwapBuffers is called and the native window associated with
* surface is no longer valid, an EGL_BAD_NATIVE_WINDOW error is
* generated.
*/
if (surf->Lost)
RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE);
ret = drv->API.SwapBuffers(drv, disp, surf);
RETURN_EGL_EVAL(disp, ret);

View File

@@ -295,6 +295,7 @@ _eglInitSurface(_EGLSurface *surf, _EGLDisplay *dpy, EGLint type,
_eglInitResource(&surf->Resource, sizeof(*surf), dpy);
surf->Type = type;
surf->Config = conf;
surf->Lost = EGL_FALSE;
surf->Width = 0;
surf->Height = 0;

View File

@@ -56,6 +56,11 @@ struct _egl_surface
EGLint Type; /* one of EGL_WINDOW_BIT, EGL_PIXMAP_BIT or EGL_PBUFFER_BIT */
/* The native surface is lost. The EGL spec requires certain functions
* to generate EGL_BAD_NATIVE_WINDOW when given this surface.
*/
EGLBoolean Lost;
/* attributes set by attribute list */
EGLint Width, Height;
EGLenum TextureFormat;

View File

@@ -125,19 +125,6 @@ create_pass_manager(struct gallivm_state *gallivm)
LLVMAddTargetData(gallivm->target, gallivm->passmgr);
#endif
/* Setting the module's DataLayout to an empty string will cause the
* ExecutionEngine to copy to the DataLayout string from its target
* machine to the module. As of LLVM 3.8 the module and the execution
* engine are required to have the same DataLayout.
*
* TODO: This is just a temporary work-around. The correct solution is
* for gallivm_init_state() to create a TargetMachine and pull the
* DataLayout from there. Currently, the TargetMachine used by llvmpipe
* is being implicitly created by the EngineBuilder in
* lp_build_create_jit_compiler_for_module()
*/
#if HAVE_LLVM < 0x0308
{
char *td_str;
// New ones from the Module.
@@ -145,9 +132,6 @@ create_pass_manager(struct gallivm_state *gallivm)
LLVMSetDataLayout(gallivm->module, td_str);
free(td_str);
}
#else
LLVMSetDataLayout(gallivm->module, "");
#endif
if ((gallivm_debug & GALLIVM_DEBUG_NO_OPT) == 0) {
/* These are the passes currently listed in llvm-c/Transforms/Scalar.h,
@@ -628,6 +612,24 @@ gallivm_compile_module(struct gallivm_state *gallivm)
}
if (use_mcjit) {
/* Setting the module's DataLayout to an empty string will cause the
* ExecutionEngine to copy to the DataLayout string from its target
* machine to the module. As of LLVM 3.8 the module and the execution
* engine are required to have the same DataLayout.
*
* We must make sure we do this after running the optimization passes,
* because those passes need a correct datalayout string. For example,
* if those optimization passes see an empty datalayout, they will assume
* this is a little endian target and will do optimizations that break big
* endian machines.
*
* TODO: This is just a temporary work-around. The correct solution is
* for gallivm_init_state() to create a TargetMachine and pull the
* DataLayout from there. Currently, the TargetMachine used by llvmpipe
* is being implicitly created by the EngineBuilder in
* lp_build_create_jit_compiler_for_module()
*/
LLVMSetDataLayout(gallivm->module, "");
assert(!gallivm->engine);
if (!init_gallivm_engine(gallivm)) {
assert(0);

View File

@@ -64,13 +64,13 @@ static const struct pipe_loader_ops pipe_loader_drm_ops;
#ifdef GALLIUM_STATIC_TARGETS
static const struct drm_conf_ret throttle_ret = {
DRM_CONF_INT,
{2},
.type = DRM_CONF_INT,
.val.val_int = 2,
};
static const struct drm_conf_ret share_fd_ret = {
DRM_CONF_BOOL,
{true},
.type = DRM_CONF_BOOL,
.val.val_bool = true,
};
static inline const struct drm_conf_ret *

View File

@@ -29,11 +29,11 @@
#include <errno.h>
#include <fcntl.h>
#include <stdio.h>
#include <sys/ioctl.h>
#include <xf86drm.h>
#include "state_tracker/drm_driver.h"
#include "pipe/p_screen.h"
#include "util/u_inlines.h"
#include "util/u_memory.h"
struct renderonly *
@@ -65,8 +65,16 @@ renderonly_scanout_for_prime(struct pipe_resource *rsc, struct renderonly *ro)
}
void
renderonly_scanout_destroy(struct renderonly_scanout *scanout)
renderonly_scanout_destroy(struct renderonly_scanout *scanout,
struct renderonly *ro)
{
struct drm_mode_destroy_dumb destroy_dumb = { };
pipe_resource_reference(&scanout->prime, NULL);
if (ro->kms_fd != -1) {
destroy_dumb.handle = scanout->handle;
drmIoctl(ro->kms_fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy_dumb);
}
FREE(scanout);
}
@@ -90,7 +98,7 @@ renderonly_create_kms_dumb_buffer_for_resource(struct pipe_resource *rsc,
return NULL;
/* create dumb buffer at scanout GPU */
err = ioctl(ro->kms_fd, DRM_IOCTL_MODE_CREATE_DUMB, &create_dumb);
err = drmIoctl(ro->kms_fd, DRM_IOCTL_MODE_CREATE_DUMB, &create_dumb);
if (err < 0) {
fprintf(stderr, "DRM_IOCTL_MODE_CREATE_DUMB failed: %s\n",
strerror(errno));
@@ -109,6 +117,7 @@ renderonly_create_kms_dumb_buffer_for_resource(struct pipe_resource *rsc,
}
/* import dumb buffer */
memset(&handle, 0, sizeof(handle));
handle.type = DRM_API_HANDLE_TYPE_FD;
handle.handle = prime_fd;
handle.stride = create_dumb.pitch;
@@ -116,6 +125,8 @@ renderonly_create_kms_dumb_buffer_for_resource(struct pipe_resource *rsc,
scanout->prime = screen->resource_from_handle(screen, rsc,
&handle, PIPE_HANDLE_USAGE_READ_WRITE);
close(prime_fd);
if (!scanout->prime) {
fprintf(stderr, "failed to create resource_from_handle: %s\n", strerror(errno));
goto free_dumb;
@@ -125,7 +136,7 @@ renderonly_create_kms_dumb_buffer_for_resource(struct pipe_resource *rsc,
free_dumb:
destroy_dumb.handle = scanout->handle;
ioctl(ro->kms_fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy_dumb);
drmIoctl(ro->kms_fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy_dumb);
free_scanout:
FREE(scanout);

View File

@@ -77,7 +77,8 @@ struct renderonly_scanout *
renderonly_scanout_for_prime(struct pipe_resource *rsc, struct renderonly *ro);
void
renderonly_scanout_destroy(struct renderonly_scanout *scanout);
renderonly_scanout_destroy(struct renderonly_scanout *scanout,
struct renderonly *ro);
static inline boolean
renderonly_get_handle(struct renderonly_scanout *scanout,

View File

@@ -39,13 +39,13 @@
#define U_DEBUG_H_
#include "os/os_misc.h"
#if defined(PIPE_OS_HAIKU)
/* Haiku provides debug_printf in libroot with OS.h */
#include <OS.h>
#endif
#include "os/os_misc.h"
#include "pipe/p_format.h"
#include "pipe/p_defines.h"

View File

@@ -294,9 +294,18 @@ util_queue_add_job(struct util_queue *queue,
struct util_queue_job *ptr;
assert(fence->signalled);
fence->signalled = false;
pipe_mutex_lock(queue->lock);
if (queue->kill_threads) {
pipe_mutex_unlock(queue->lock);
/* well no good option here, but any leaks will be
* short-lived as things are shutting down..
*/
return;
}
fence->signalled = false;
assert(queue->num_queued >= 0 && queue->num_queued <= queue->max_jobs);
/* if the queue is full, wait until there is space */

View File

@@ -103,6 +103,8 @@ static struct etna_format formats[PIPE_FORMAT_COUNT] = {
_T(B4G4R4A4_UNORM, A4R4G4B4, A4R4G4B4),
_T(B4G4R4X4_UNORM, X4R4G4B4, X4R4G4B4),
_T(L8A8_UNORM, A8L8, NONE),
_T(Z16_UNORM, D16, A4R4G4B4),
_T(B5G6R5_UNORM, R5G6B5, R5G6B5),
_T(B5G5R5A1_UNORM, A1R5G5B5, A1R5G5B5),

View File

@@ -179,7 +179,7 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
&paddingY, &halign);
assert(paddingX && paddingY);
if (templat->bind != PIPE_BUFFER) {
if (templat->target != PIPE_BUFFER) {
unsigned min_paddingY = 4 * screen->specs.pixel_pipes;
if (paddingY < min_paddingY)
paddingY = min_paddingY;
@@ -289,7 +289,7 @@ etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
etna_bo_del(rsc->ts_bo);
if (rsc->scanout)
renderonly_scanout_destroy(rsc->scanout);
renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
list_delinit(&rsc->list);

View File

@@ -149,6 +149,9 @@ use_hw_binning(struct fd_batch *batch)
if (gmem->minx || gmem->miny)
return false;
if ((gmem->maxpw * gmem->maxph) > 32)
return false;
return fd_binning_enabled && ((gmem->nbins_x * gmem->nbins_y) > 2);
}

View File

@@ -219,6 +219,9 @@ calculate_tiles(struct fd_batch *batch)
div_round_up(nbins_x, tpp_x)) > 8)
tpp_x += 1;
gmem->maxpw = tpp_x;
gmem->maxph = tpp_y;
/* configure pipes: */
xoff = yoff = 0;
for (i = 0; i < ARRAY_SIZE(ctx->pipe); i++) {

View File

@@ -57,6 +57,7 @@ struct fd_gmem_stateobj {
uint16_t bin_w, nbins_x;
uint16_t minx, miny;
uint16_t width, height;
uint16_t maxpw, maxph; /* maximum pipe width/height */
};
struct fd_batch;

View File

@@ -58,6 +58,7 @@ private:
void setImmediateS8(const ValueRef&);
void setSUConst16(const Instruction *, const int s);
void setSUPred(const Instruction *, const int s);
void setPDSTL(const Instruction *, const int d);
void emitCondCode(CondCode cc, int pos);
void emitInterpMode(const Instruction *);
@@ -373,6 +374,16 @@ void CodeEmitterNVC0::setImmediateS8(const ValueRef &ref)
code[0] |= (s8 >> 6) << 8;
}
void CodeEmitterNVC0::setPDSTL(const Instruction *i, const int d)
{
assert(d < 0 || (i->defExists(d) && i->def(d).getFile() == FILE_PREDICATE));
uint32_t pred = d >= 0 ? DDATA(i->def(d)).id : 7;
code[0] |= (pred & 3) << 8;
code[1] |= (pred & 4) << (26 - 2);
}
void
CodeEmitterNVC0::emitForm_A(const Instruction *i, uint64_t opc)
{
@@ -1864,7 +1875,7 @@ CodeEmitterNVC0::emitSTORE(const Instruction *i)
if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED) {
assert(i->defExists(0));
defId(i->def(0), 8);
setPDSTL(i, 0);
}
}
@@ -1936,7 +1947,7 @@ CodeEmitterNVC0::emitLOAD(const Instruction *i)
if (p >= 0) {
if (targ->getChipset() >= NVISA_GK104_CHIPSET)
defId(i->def(p), 8);
setPDSTL(i, p);
else
defId(i->def(p), 32 + 18);
}

View File

@@ -2906,8 +2906,8 @@ Converter::handleINTERP(Value *dst[4])
// and then convert to s32.
Value *offs[2];
for (c = 0; c < 2; c++) {
offs[c] = fetchSrc(1, c);
mkOp2(OP_MIN, TYPE_F32, offs[c], offs[c], loadImm(NULL, 0.4375f));
offs[c] = getScratch();
mkOp2(OP_MIN, TYPE_F32, offs[c], fetchSrc(1, c), loadImm(NULL, 0.4375f));
mkOp2(OP_MAX, TYPE_F32, offs[c], offs[c], loadImm(NULL, -0.5f));
mkOp2(OP_MUL, TYPE_F32, offs[c], offs[c], loadImm(NULL, 4096.0f));
mkCvt(OP_CVT, TYPE_S32, offs[c], TYPE_F32, offs[c]);
@@ -3651,16 +3651,17 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
case TGSI_OPCODE_UBFE:
FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
src0 = fetchSrc(0, c);
val0 = getScratch();
if (tgsi.getSrc(1).getFile() == TGSI_FILE_IMMEDIATE &&
tgsi.getSrc(2).getFile() == TGSI_FILE_IMMEDIATE) {
src1 = loadImm(NULL, tgsi.getSrc(2).getValueU32(c, info) << 8 |
tgsi.getSrc(1).getValueU32(c, info));
loadImm(val0, (tgsi.getSrc(2).getValueU32(c, info) << 8) |
tgsi.getSrc(1).getValueU32(c, info));
} else {
src1 = fetchSrc(1, c);
src2 = fetchSrc(2, c);
mkOp3(OP_INSBF, TYPE_U32, src1, src2, mkImm(0x808), src1);
mkOp3(OP_INSBF, TYPE_U32, val0, src2, mkImm(0x808), src1);
}
mkOp2(OP_EXTBF, dstTy, dst0[c], src0, src1);
mkOp2(OP_EXTBF, dstTy, dst0[c], src0, val0);
}
break;
case TGSI_OPCODE_BFI:
@@ -3669,16 +3670,18 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
src1 = fetchSrc(1, c);
src2 = fetchSrc(2, c);
src3 = fetchSrc(3, c);
mkOp3(OP_INSBF, TYPE_U32, src2, src3, mkImm(0x808), src2);
mkOp3(OP_INSBF, TYPE_U32, dst0[c], src1, src2, src0);
val0 = getScratch();
mkOp3(OP_INSBF, TYPE_U32, val0, src3, mkImm(0x808), src2);
mkOp3(OP_INSBF, TYPE_U32, dst0[c], src1, val0, src0);
}
break;
case TGSI_OPCODE_LSB:
FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
src0 = fetchSrc(0, c);
geni = mkOp2(OP_EXTBF, TYPE_U32, src0, src0, mkImm(0x2000));
val0 = getScratch();
geni = mkOp2(OP_EXTBF, TYPE_U32, val0, src0, mkImm(0x2000));
geni->subOp = NV50_IR_SUBOP_EXTBF_REV;
geni = mkOp1(OP_BFIND, TYPE_U32, dst0[c], src0);
geni = mkOp1(OP_BFIND, TYPE_U32, dst0[c], val0);
geni->subOp = NV50_IR_SUBOP_BFIND_SAMT;
}
break;

View File

@@ -521,6 +521,8 @@ NVC0LegalizePostRA::replaceZero(Instruction *i)
for (int s = 0; i->srcExists(s); ++s) {
if (s == 2 && i->op == OP_SUCLAMP)
continue;
if (s == 1 && i->op == OP_SHLADD)
continue;
ImmediateValue *imm = i->getSrc(s)->asImm();
if (imm) {
if (i->op == OP_SELP && s == 2) {

View File

@@ -105,6 +105,7 @@ static const struct opProperties _initProps[] =
{ OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
{ OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
{ OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 | 0x8 }, // special c[] constraint
{ OP_FMA, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 | 0x8 }, // keep the same as OP_MAD
{ OP_SHLADD, 0x5, 0x0, 0x0, 0x0, 0x4, 0x6 },
{ OP_MADSP, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 },
{ OP_ABS, 0x0, 0x0, 0x0, 0x0, 0x1, 0x0 },

View File

@@ -406,9 +406,6 @@ nouveau_buffer_transfer_map(struct pipe_context *pipe,
!util_ranges_intersect(&buf->valid_buffer_range, box->x, box->x + box->width))
usage |= PIPE_TRANSFER_DISCARD_RANGE | PIPE_TRANSFER_UNSYNCHRONIZED;
if (usage & PIPE_TRANSFER_PERSISTENT)
usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
if (buf->domain == NOUVEAU_BO_VRAM) {
if (usage & NOUVEAU_TRANSFER_DISCARD) {
/* Set up a staging area for the user to write to. It will be copied
@@ -476,7 +473,8 @@ nouveau_buffer_transfer_map(struct pipe_context *pipe,
* complete its operation, or set up a staging area to perform our work in.
*/
if (nouveau_buffer_busy(buf, usage & PIPE_TRANSFER_READ_WRITE)) {
if (unlikely(usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)) {
if (unlikely(usage & (PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE |
PIPE_TRANSFER_PERSISTENT))) {
/* Discarding was not possible, must sync because
* subsequent transfers might use UNSYNCHRONIZED. */
nouveau_buffer_sync(nv, buf, usage & PIPE_TRANSFER_READ_WRITE);

View File

@@ -147,7 +147,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
return 256;
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
if (class_3d < NVE4_3D_CLASS)
if (class_3d < GM107_3D_CLASS)
return 256; /* IMAGE bindings require alignment to 256 */
return 16;
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:

View File

@@ -173,6 +173,20 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
if (sctx->b.chip_class == SI) {
unsigned one_wave = 64 / MAX2(num_tcs_input_cp, num_tcs_output_cp);
*num_patches = MIN2(*num_patches, one_wave);
if (sctx->screen->b.info.max_se == 1) {
/* The VGT HS block increments the patch ID unconditionally
* within a single threadgroup. This results in incorrect
* patch IDs when instanced draws are used.
*
* The intended solution is to restrict threadgroups to
* a single instance by setting SWITCH_ON_EOI, which
* should cause IA to split instances up. However, this
* doesn't work correctly on SI when there is no other
* SE to switch to.
*/
*num_patches = 1;
}
}
sctx->last_num_patches = *num_patches;
@@ -305,7 +319,8 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
if (sctx->b.family == CHIP_TONGA ||
sctx->b.family == CHIP_FIJI ||
sctx->b.family == CHIP_POLARIS10 ||
sctx->b.family == CHIP_POLARIS11)
sctx->b.family == CHIP_POLARIS11 ||
sctx->b.family == CHIP_POLARIS12)
partial_vs_wave = true;
} else {
partial_vs_wave = true;

View File

@@ -1146,7 +1146,7 @@ again:
memcmp(&current->key, key, sizeof(*key)) == 0 &&
(!current->is_optimized ||
util_queue_fence_is_signalled(&current->optimized_ready))))
return 0;
return current->compilation_failed ? -1 : 0;
/* This must be done before the mutex is locked, because async GS
* compilation calls this function too, and therefore must enter
@@ -1958,7 +1958,10 @@ static bool si_update_gs_ring_buffers(struct si_context *sctx)
unsigned num_se = sctx->screen->b.info.max_se;
unsigned wave_size = 64;
unsigned max_gs_waves = 32 * num_se; /* max 32 per SE on GCN */
unsigned gs_vertex_reuse = 16 * num_se; /* GS_VERTEX_REUSE register (per SE) */
/* On SI-CI, the value comes from VGT_GS_VERTEX_REUSE = 16.
* On VI+, the value comes from VGT_VERTEX_REUSE_BLOCK_CNTL = 30 (+2).
*/
unsigned gs_vertex_reuse = (sctx->b.chip_class >= VI ? 32 : 16) * num_se;
unsigned alignment = 256 * num_se;
/* The maximum size is 63.999 MB per SE. */
unsigned max_size = ((unsigned)(63.999 * 1024 * 1024) & ~255) * num_se;

View File

@@ -542,7 +542,7 @@ struct BlendJit : public Builder
IRB()->SetInsertPoint(entry);
// arguments
auto argitr = blendFunc->getArgumentList().begin();
auto argitr = blendFunc->arg_begin();
Value* pBlendState = &*argitr++;
pBlendState->setName("pBlendState");
Value* pSrc = &*argitr++;

View File

@@ -99,7 +99,7 @@ Function* FetchJit::Create(const FETCH_COMPILE_STATE& fetchState)
IRB()->SetInsertPoint(entry);
auto argitr = fetch->getArgumentList().begin();
auto argitr = fetch->arg_begin();
// Fetch shader arguments
mpFetchInfo = &*argitr; ++argitr;

View File

@@ -281,7 +281,7 @@ struct StreamOutJit : public Builder
IRB()->SetInsertPoint(entry);
// arguments
auto argitr = soFunc->getArgumentList().begin();
auto argitr = soFunc->arg_begin();
Value* pSoCtx = &*argitr++;
pSoCtx->setName("pSoCtx");

View File

@@ -165,7 +165,8 @@ vc4_resource_transfer_map(struct pipe_context *pctx,
prsc->width0 == box->width &&
prsc->height0 == box->height &&
prsc->depth0 == box->depth &&
prsc->array_size == 1) {
prsc->array_size == 1 &&
rsc->bo->private) {
usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
}

View File

@@ -25,6 +25,7 @@
#include "pipe/p_screen.h"
#include "util/u_sampler.h"
#include "util/u_format.h"
#include "util/u_inlines.h"
using namespace clover;
@@ -176,7 +177,7 @@ root_resource::root_resource(clover::device &dev, memory_obj &obj,
}
root_resource::~root_resource() {
device().pipe->resource_destroy(device().pipe, pipe);
pipe_resource_reference(&this->pipe, NULL);
}
sub_resource::sub_resource(resource &r, const vector &offset) :
@@ -189,7 +190,7 @@ mapping::mapping(command_queue &q, resource &r,
cl_map_flags flags, bool blocking,
const resource::vector &origin,
const resource::vector &region) :
pctx(q.pipe) {
pctx(q.pipe), pres(NULL) {
unsigned usage = ((flags & CL_MAP_WRITE ? PIPE_TRANSFER_WRITE : 0 ) |
(flags & CL_MAP_READ ? PIPE_TRANSFER_READ : 0 ) |
(flags & CL_MAP_WRITE_INVALIDATE_REGION ?
@@ -202,12 +203,14 @@ mapping::mapping(command_queue &q, resource &r,
pxfer = NULL;
throw error(CL_OUT_OF_RESOURCES);
}
pipe_resource_reference(&pres, r.pipe);
}
mapping::mapping(mapping &&m) :
pctx(m.pctx), pxfer(m.pxfer), p(m.p) {
pctx(m.pctx), pxfer(m.pxfer), pres(m.pres), p(m.p) {
m.pctx = NULL;
m.pxfer = NULL;
m.pres = NULL;
m.p = NULL;
}
@@ -215,12 +218,14 @@ mapping::~mapping() {
if (pxfer) {
pctx->transfer_unmap(pctx, pxfer);
}
pipe_resource_reference(&pres, NULL);
}
mapping &
mapping::operator=(mapping m) {
std::swap(pctx, m.pctx);
std::swap(pxfer, m.pxfer);
std::swap(pres, m.pres);
std::swap(p, m.p);
return *this;
}

View File

@@ -125,6 +125,7 @@ namespace clover {
private:
pipe_context *pctx;
pipe_transfer *pxfer;
pipe_resource *pres;
void *p;
};
}

View File

@@ -49,7 +49,7 @@ namespace clover {
build_module_library(const ::llvm::Module &mod,
enum module::section::type section_type);
std::unique_ptr<::llvm::Module>
std::unique_ptr< ::llvm::Module>
parse_module_library(const module &m, ::llvm::LLVMContext &ctx,
std::string &r_log);

View File

@@ -94,7 +94,7 @@ clover::llvm::build_module_library(const ::llvm::Module &mod,
return m;
}
std::unique_ptr<::llvm::Module>
std::unique_ptr< ::llvm::Module>
clover::llvm::parse_module_library(const module &m, ::llvm::LLVMContext &ctx,
std::string &r_log) {
auto mod = ::llvm::parseBitcodeFile(::llvm::MemoryBufferRef(
@@ -104,5 +104,5 @@ clover::llvm::parse_module_library(const module &m, ::llvm::LLVMContext &ctx,
fail(r_log, error(CL_INVALID_PROGRAM), s);
});
return std::unique_ptr<::llvm::Module>(std::move(*mod));
return std::unique_ptr< ::llvm::Module>(std::move(*mod));
}

View File

@@ -121,12 +121,12 @@ namespace {
} else {
// Other types.
const auto actual_type =
isa<::llvm::PointerType>(arg_type) && arg.hasByValAttr() ?
cast<::llvm::PointerType>(arg_type)->getElementType() : arg_type;
isa< ::llvm::PointerType>(arg_type) && arg.hasByValAttr() ?
cast< ::llvm::PointerType>(arg_type)->getElementType() : arg_type;
if (actual_type->isPointerTy()) {
const unsigned address_space =
cast<::llvm::PointerType>(actual_type)->getAddressSpace();
cast< ::llvm::PointerType>(actual_type)->getAddressSpace();
if (address_space == address_spaces[clang::LangAS::opencl_local
- clang::LangAS::Offset]) {

View File

@@ -156,7 +156,7 @@ clover::llvm::print_module_native(const ::llvm::Module &mod,
const target &target) {
std::string log;
try {
std::unique_ptr<::llvm::Module> cmod { CloneModule(&mod) };
std::unique_ptr< ::llvm::Module> cmod { CloneModule(&mod) };
return as_string(emit_code(*cmod, target,
TargetMachine::CGFT_AssemblyFile, log));
} catch (...) {

View File

@@ -118,18 +118,18 @@ namespace clover {
#endif
}
inline std::unique_ptr<::llvm::Linker>
inline std::unique_ptr< ::llvm::Linker>
create_linker(::llvm::Module &mod) {
#if HAVE_LLVM >= 0x0308
return std::unique_ptr<::llvm::Linker>(new ::llvm::Linker(mod));
return std::unique_ptr< ::llvm::Linker>(new ::llvm::Linker(mod));
#else
return std::unique_ptr<::llvm::Linker>(new ::llvm::Linker(&mod));
return std::unique_ptr< ::llvm::Linker>(new ::llvm::Linker(&mod));
#endif
}
inline bool
link_in_module(::llvm::Linker &linker,
std::unique_ptr<::llvm::Module> mod) {
std::unique_ptr< ::llvm::Module> mod) {
#if HAVE_LLVM >= 0x0308
return linker.linkInModule(std::move(mod));
#else

View File

@@ -51,7 +51,7 @@ namespace clover {
is_kernel_node_for(const ::llvm::Function &f) {
return [&](const ::llvm::MDNode *n) {
using ::llvm::mdconst::dyn_extract;
return &f == dyn_extract<::llvm::Function>(n->getOperand(0));
return &f == dyn_extract< ::llvm::Function>(n->getOperand(0));
};
}
@@ -65,7 +65,7 @@ namespace clover {
#endif
}
inline iterator_range<::llvm::MDNode::op_iterator>
inline iterator_range< ::llvm::MDNode::op_iterator>
get_kernel_metadata_operands(const ::llvm::Function &f,
const std::string &name) {
#if HAVE_LLVM >= 0x0309
@@ -79,11 +79,11 @@ namespace clover {
const auto kernel_node = find(is_kernel_node_for(f),
get_kernel_nodes(*f.getParent()));
const auto data_node = cast<::llvm::MDNode>(
const auto data_node = cast< ::llvm::MDNode>(
find([&](const ::llvm::MDOperand &op) {
if (auto m = dyn_cast<::llvm::MDNode>(op))
if (auto m = dyn_cast< ::llvm::MDNode>(op))
if (m->getNumOperands())
if (auto m_name = dyn_cast<::llvm::MDString>(
if (auto m_name = dyn_cast< ::llvm::MDString>(
m->getOperand(0).get()))
return m_name->getString() == name;
@@ -106,7 +106,7 @@ namespace clover {
get_argument_metadata(const ::llvm::Function &f,
const ::llvm::Argument &arg,
const std::string &name) {
return ::llvm::cast<::llvm::MDString>(
return ::llvm::cast< ::llvm::MDString>(
detail::get_kernel_metadata_operands(f, name)[arg.getArgNo()])
->getString();
}

View File

@@ -1804,7 +1804,7 @@ dri2_interop_export_object(__DRIcontext *_ctx,
return MESA_GLINTEROP_INVALID_MIP_LEVEL;
}
if (!st_finalize_texture(ctx, st->pipe, obj)) {
if (!st_finalize_texture(ctx, st->pipe, obj, 0)) {
mtx_unlock(&ctx->Shared->Mutex);
return MESA_GLINTEROP_OUT_OF_RESOURCES;
}

View File

@@ -233,8 +233,8 @@ name##_rx( struct NineDevice9 *device, struct csmt_instruction *instr ) \
name##_priv( \
device ARGS_FOR_CALL( __VA_ARGS__ ) \
); \
ARGS_FOR_UNBIND( __VA_ARGS__ ) \
p_atomic_dec(args->counter); \
ARGS_FOR_UNBIND( __VA_ARGS__ ) \
return 0; \
} \
\

View File

@@ -79,7 +79,7 @@ NineResource9_ctor( struct NineResource9 *This,
if (This->info.target != PIPE_BUFFER) {
This->size = util_resource_size(&This->info);
This->base.device->available_texture_mem -= This->size;
p_atomic_add(&This->base.device->available_texture_mem, -This->size);
if (This->base.device->available_texture_mem <=
This->base.device->available_texture_limit) {
return D3DERR_OUTOFVIDEOMEMORY;
@@ -111,7 +111,7 @@ NineResource9_dtor( struct NineResource9 *This )
/* NOTE: size is 0, unless something has actually been allocated */
if (This->base.device)
This->base.device->available_texture_mem += This->size;
p_atomic_add(&This->base.device->available_texture_mem, This->size);
NineUnknown_dtor(&This->base);
}

View File

@@ -204,9 +204,15 @@ NineSurface9_dtor( struct NineSurface9 *This )
{
DBG("This=%p\n", This);
if (This->transfer)
NineSurface9_UnlockRect(This);
if (This->transfer) {
struct pipe_context *pipe = nine_context_get_pipe_multithread(This->base.base.device);
pipe->transfer_unmap(pipe, This->transfer);
This->transfer = NULL;
}
/* Note: Following condition cannot happen currently, since we
* refcount the surface in the functions increasing
* pending_uploads_counter. */
if (p_atomic_read(&This->pending_uploads_counter))
nine_csmt_process(This->base.base.device);

View File

@@ -142,9 +142,15 @@ NineVolume9_dtor( struct NineVolume9 *This )
{
DBG("This=%p\n", This);
if (This->transfer)
NineVolume9_UnlockBox(This);
if (This->transfer) {
struct pipe_context *pipe = nine_context_get_pipe_multithread(This->base.device);
pipe->transfer_unmap(pipe, This->transfer);
This->transfer = NULL;
}
/* Note: Following condition cannot happen currently, since we
* refcount the volume in the functions increasing
* pending_uploads_counter. */
if (p_atomic_read(&This->pending_uploads_counter))
nine_csmt_process(This->base.device);

View File

@@ -139,8 +139,8 @@ VA_DRIVER_INIT_FUNC(VADriverContextP ctx)
drv->vscreen = vl_drm_screen_create(drm_info->fd);
if (!drv->vscreen)
goto error_screen;
}
break;
}
default:
FREE(drv);
return VA_STATUS_ERROR_INVALID_DISPLAY;

View File

@@ -1,10 +1,8 @@
include $(top_srcdir)/src/gallium/Automake.inc
if HAVE_ANDROID
if HAVE_SHARED_GLAPI
SHARED_GLAPI_LIB = $(top_builddir)/src/mapi/shared-glapi/libglapi.la
endif
endif
AM_CFLAGS = \
-I$(top_srcdir)/src/mapi \
@@ -31,8 +29,10 @@ gallium_dri_la_LDFLAGS = \
-shared \
-shrext .so \
-module \
-no-undefined \
-avoid-version \
$(GC_SECTIONS)
$(GC_SECTIONS) \
$(LD_NO_UNDEFINED)
if HAVE_LD_VERSION_SCRIPT
gallium_dri_la_LDFLAGS += \

View File

@@ -1,6 +1,11 @@
{
global:
omx_component_library_Setup;
# Workaround for an LLVM warning with -simplifycfg-sink-common
# due to LLVM being initialized multiple times.
radeon_drm_winsys_create;
amdgpu_winsys_create;
local:
*;
};

View File

@@ -2,6 +2,11 @@
global:
driver_descriptor;
swrast_driver_descriptor;
# Workaround for an LLVM warning with -simplifycfg-sink-common
# due to LLVM being initialized multiple times.
radeon_drm_winsys_create;
amdgpu_winsys_create;
local:
*;
};

View File

@@ -30,7 +30,7 @@ static const struct drm_conf_ret throttle_ret = {
static const struct drm_conf_ret share_fd_ret = {
.type = DRM_CONF_BOOL,
.val.val_int = true,
.val.val_bool = true,
};
static const struct drm_conf_ret *drm_configuration(enum drm_conf conf)

View File

@@ -24,7 +24,7 @@ static const struct drm_conf_ret throttle_ret = {
static const struct drm_conf_ret share_fd_ret = {
.type = DRM_CONF_BOOL,
.val.val_int = true,
.val.val_bool = true,
};
static const struct drm_conf_ret *drm_configuration(enum drm_conf conf)

View File

@@ -24,7 +24,7 @@ static const struct drm_conf_ret throttle_ret = {
static const struct drm_conf_ret share_fd_ret = {
.type = DRM_CONF_BOOL,
.val.val_int = true,
.val.val_bool = true,
};
static const struct drm_conf_ret *drm_configuration(enum drm_conf conf)

View File

@@ -20,7 +20,7 @@ static const struct drm_conf_ret throttle_ret = {
static const struct drm_conf_ret share_fd_ret = {
.type = DRM_CONF_BOOL,
.val.val_int = true,
.val.val_bool = true,
};
static const struct drm_conf_ret *drm_configuration(enum drm_conf conf)

View File

@@ -20,7 +20,7 @@ static const struct drm_conf_ret throttle_ret = {
static const struct drm_conf_ret share_fd_ret = {
.type = DRM_CONF_BOOL,
.val.val_int = true,
.val.val_bool = true,
};
static const struct drm_conf_ret *drm_configuration(enum drm_conf conf)

View File

@@ -26,7 +26,7 @@ static const struct drm_conf_ret throttle_ret = {
static const struct drm_conf_ret share_fd_ret = {
.type = DRM_CONF_BOOL,
.val.val_int = true,
.val.val_bool = true,
};
static const struct drm_conf_ret *drm_configuration(enum drm_conf conf)

View File

@@ -30,7 +30,7 @@ static const struct drm_conf_ret throttle_ret = {
static const struct drm_conf_ret share_fd_ret = {
.type = DRM_CONF_BOOL,
.val.val_int = true,
.val.val_bool = true,
};
static const struct drm_conf_ret *drm_configuration(enum drm_conf conf)

View File

@@ -1,6 +1,11 @@
{
global:
__vaDriverInit_*_*;
# Workaround for an LLVM warning with -simplifycfg-sink-common
# due to LLVM being initialized multiple times.
radeon_drm_winsys_create;
amdgpu_winsys_create;
local:
*;
};

View File

@@ -186,8 +186,13 @@ static enum radeon_bo_domain radeon_bo_get_initial_domain(
args.handle = bo->handle;
args.op = RADEON_GEM_OP_GET_INITIAL_DOMAIN;
drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_OP,
&args, sizeof(args));
if (drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_OP,
&args, sizeof(args))) {
fprintf(stderr, "radeon: failed to get initial domain: %p 0x%08X\n",
bo, bo->handle);
/* Default domain as returned by get_valid_domain. */
return RADEON_DOMAIN_VRAM_GTT;
}
/* GEM domains and winsys domains are defined the same. */
return get_valid_domain(args.value);
@@ -258,7 +263,7 @@ static uint64_t radeon_bomgr_find_va(struct radeon_drm_winsys *rws,
static void radeon_bomgr_free_va(struct radeon_drm_winsys *rws,
uint64_t va, uint64_t size)
{
struct radeon_bo_va_hole *hole;
struct radeon_bo_va_hole *hole = NULL;
size = align(size, rws->info.gart_page_size);

View File

@@ -593,18 +593,20 @@ static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
fence = radeon_cs_create_fence(rcs);
}
if (pfence)
radeon_fence_reference(pfence, fence);
if (fence) {
if (pfence)
radeon_fence_reference(pfence, fence);
pipe_mutex_lock(cs->ws->bo_fence_lock);
for (unsigned i = 0; i < cs->csc->num_slab_buffers; ++i) {
struct radeon_bo *bo = cs->csc->slab_buffers[i].bo;
p_atomic_inc(&bo->num_active_ioctls);
radeon_bo_slab_fence(bo, (struct radeon_bo *)fence);
pipe_mutex_lock(cs->ws->bo_fence_lock);
for (unsigned i = 0; i < cs->csc->num_slab_buffers; ++i) {
struct radeon_bo *bo = cs->csc->slab_buffers[i].bo;
p_atomic_inc(&bo->num_active_ioctls);
radeon_bo_slab_fence(bo, (struct radeon_bo *)fence);
}
pipe_mutex_unlock(cs->ws->bo_fence_lock);
radeon_fence_reference(&fence, NULL);
}
pipe_mutex_unlock(cs->ws->bo_fence_lock);
radeon_fence_reference(&fence, NULL);
} else {
radeon_fence_reference(&cs->next_fence, NULL);
}
@@ -750,6 +752,9 @@ radeon_cs_create_fence(struct radeon_winsys_cs *rcs)
/* Create a fence, which is a dummy BO. */
fence = cs->ws->base.buffer_create(&cs->ws->base, 1, 1,
RADEON_DOMAIN_GTT, RADEON_FLAG_HANDLE);
if (!fence)
return NULL;
/* Add the fence as a dummy relocation. */
cs->ws->base.cs_add_buffer(rcs, fence,
RADEON_USAGE_READWRITE, RADEON_DOMAIN_GTT,

View File

@@ -200,7 +200,7 @@ dri_sw_displaytarget_display(struct sw_winsys *ws,
if (box) {
void *data;
data = dri_sw_dt->data + (dri_sw_dt->stride * box->y) + box->x * blsize;
data = (char *)dri_sw_dt->data + (dri_sw_dt->stride * box->y) + box->x * blsize;
dri_sw_ws->lf->put_image2(dri_drawable, data,
box->x, box->y, box->width, box->height, dri_sw_dt->stride);
} else {

View File

@@ -106,7 +106,8 @@ hgl_winsys_convert_cs(enum pipe_format format)
static struct sw_displaytarget*
hgl_winsys_displaytarget_create(struct sw_winsys* winsys,
unsigned textureUsage, enum pipe_format format, unsigned width,
unsigned height, unsigned alignment, unsigned* stride)
unsigned height, unsigned alignment, const void *front_private,
unsigned* stride)
{
struct haiku_displaytarget* haikuDisplayTarget
= CALLOC_STRUCT(haiku_displaytarget);

View File

@@ -987,6 +987,14 @@ gbm_dri_bo_unmap(struct gbm_bo *_bo, void *map_data)
return;
dri->image->unmapImage(dri->context, bo->image, map_data);
/*
* Not all DRI drivers use direct maps. They may queue up DMA operations
* on the mapping context. Since there is no explicit gbm flush
* mechanism, we need to flush here.
*/
if (dri->flush->base.version >= 4)
dri->flush->flush_with_flags(dri->context, NULL, __DRI2_FLUSH_CONTEXT, 0);
}

View File

@@ -4,6 +4,7 @@
*/
#include <stdlib.h>
#include "glxclient.h"
#include "glxglvnd.h"
#include "glxglvnddispatchfuncs.h"
#include "g_glxglvnddispatchindices.h"
@@ -50,6 +51,7 @@ const char * const __glXDispatchTableStrings[DI_LAST_INDEX] = {
__ATTRIB(GetCurrentDisplayEXT),
// glXGetCurrentDrawable implemented by libglvnd
// glXGetCurrentReadDrawable implemented by libglvnd
__ATTRIB(GetDriverConfig),
// glXGetFBConfigAttrib implemented by libglvnd
__ATTRIB(GetFBConfigAttribSGIX),
__ATTRIB(GetFBConfigFromVisualSGIX),
@@ -334,6 +336,17 @@ static Display *dispatch_GetCurrentDisplayEXT(void)
static const char *dispatch_GetDriverConfig(const char *driverName)
{
/*
* The options are constant for a given driverName, so we do not need
* a context (and apps expect to be able to call this without one).
*/
return glXGetDriverConfig(driverName);
}
static int dispatch_GetFBConfigAttribSGIX(Display *dpy, GLXFBConfigSGIX config,
int attribute, int *value_return)
{
@@ -939,6 +952,7 @@ const void * const __glXDispatchFunctions[DI_LAST_INDEX + 1] = {
__ATTRIB(DestroyGLXPbufferSGIX),
__ATTRIB(GetContextIDEXT),
__ATTRIB(GetCurrentDisplayEXT),
__ATTRIB(GetDriverConfig),
__ATTRIB(GetFBConfigAttribSGIX),
__ATTRIB(GetFBConfigFromVisualSGIX),
__ATTRIB(GetMscRateOML),

View File

@@ -39,6 +39,7 @@ typedef enum __GLXdispatchIndex {
DI_GetCurrentDisplayEXT,
// GetCurrentDrawable implemented by libglvnd
// GetCurrentReadDrawable implemented by libglvnd
DI_GetDriverConfig,
// GetFBConfigAttrib implemented by libglvnd
DI_GetFBConfigAttribSGIX,
DI_GetFBConfigFromVisualSGIX,

View File

@@ -2651,7 +2651,7 @@ _GLX_PUBLIC void (*glXGetProcAddressARB(const GLubyte * procName)) (void)
f = (gl_function) get_glx_proc_address((const char *) procName);
if ((f == NULL) && (procName[0] == 'g') && (procName[1] == 'l')
&& (procName[2] != 'X')) {
#ifdef GLX_SHARED_GLAPI
#ifdef GLX_INDIRECT_RENDERING
f = (gl_function) __indirect_get_proc_address((const char *) procName);
#endif
if (!f)

View File

@@ -56,7 +56,7 @@ static const struct {
[5] = {24, 32, 4},
[6] = {24, 32, 4},
[7] = {32, 32, 4, 24},
[8] = {52, 64, 32, 40},
[8] = {64, 64, 32, 40},
[9] = {64, 64, 32, 40},
};

View File

@@ -352,30 +352,12 @@ gen7_choose_valign_el(const struct isl_device *dev,
if (isl_surf_usage_is_stencil(info->usage)) {
/* The Ivybridge PRM states that the stencil buffer's vertical alignment
* is 8 [Ivybridge PRM, Volume 1, Part 1, Section 6.18.4.4 Alignment
* Unit Size]. However, valign=8 is outside the set of valid values of
* RENDER_SURFACE_STATE.SurfaceVerticalAlignment, which is VALIGN_2
* (0x0) and VALIGN_4 (0x1).
*
* The PRM is generally confused about the width, height, and alignment
* of the stencil buffer; and this confusion appears elsewhere. For
* example, the following PRM text effectively converts the stencil
* buffer's 8-pixel alignment to a 4-pixel alignment [Ivybridge PRM,
* Volume 1, Part 1, Section
* 6.18.4.2 Base Address and LOD Calculation]:
*
* For separate stencil buffer, the width must be mutiplied by 2 and
* height divided by 2 as follows:
*
* w_L = 2*i*ceil(W_L/i)
* h_L = 1/2*j*ceil(H_L/j)
*
* The root of the confusion is that, in W tiling, each pair of rows is
* interleaved into one.
*
* FINISHME(chadv): Decide to set valign=4 or valign=8 after isl's API
* is more polished.
* Unit Size]. valign=8 is outside the set of valid values of
* RENDER_SURFACE_STATE.SurfaceVerticalAlignment, but that's ok because
* a stencil buffer will never be used directly for texturing or
* rendering on gen7.
*/
require_valign4 = true;
return 8;
}
assert(!require_valign2 || !require_valign4);

View File

@@ -93,7 +93,20 @@ VULKAN_SOURCES = \
$(VULKAN_GENERATED_FILES) \
$(VULKAN_FILES)
VULKAN_LIB_DEPS =
VULKAN_LIB_DEPS = \
libvulkan_common.la \
$(top_builddir)/src/vulkan/wsi/libvulkan_wsi.la \
$(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \
$(top_builddir)/src/compiler/nir/libnir.la \
$(top_builddir)/src/util/libmesautil.la \
$(top_builddir)/src/intel/common/libintel_common.la \
$(top_builddir)/src/intel/isl/libisl.la \
$(top_builddir)/src/intel/blorp/libblorp.la \
$(PER_GEN_LIBS) \
$(PTHREAD_LIBS) \
$(DLOPEN_LIBS) \
-lm
if HAVE_PLATFORM_X11
AM_CPPFLAGS += \
@@ -123,20 +136,6 @@ endif
noinst_LTLIBRARIES += libvulkan_common.la
libvulkan_common_la_SOURCES = $(VULKAN_SOURCES)
VULKAN_LIB_DEPS += \
libvulkan_common.la \
$(top_builddir)/src/vulkan/wsi/libvulkan_wsi.la \
$(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \
$(top_builddir)/src/compiler/nir/libnir.la \
$(top_builddir)/src/util/libmesautil.la \
$(top_builddir)/src/intel/common/libintel_common.la \
$(top_builddir)/src/intel/isl/libisl.la \
$(top_builddir)/src/intel/blorp/libblorp.la \
$(PER_GEN_LIBS) \
$(PTHREAD_LIBS) \
$(DLOPEN_LIBS) \
-lm
nodist_EXTRA_libvulkan_intel_la_SOURCES = dummy.cpp
libvulkan_intel_la_SOURCES = $(VULKAN_GEM_FILES)

View File

@@ -859,7 +859,7 @@ anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo, uint32_t size)
assert(new_bo.size == pow2_size);
new_bo.map = anv_gem_mmap(pool->device, new_bo.gem_handle, 0, pow2_size, 0);
if (new_bo.map == NULL) {
if (new_bo.map == MAP_FAILED) {
anv_gem_close(pool->device, new_bo.gem_handle);
return vk_error(VK_ERROR_MEMORY_MAP_FAILED);
}

View File

@@ -1237,7 +1237,7 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
adjust_relocations_from_state_pool(ss_pool, &cmd_buffer->surface_relocs,
cmd_buffer->last_ss_pool_center);
anv_execbuf_add_bo(&execbuf, &ss_pool->bo, &cmd_buffer->surface_relocs,
&cmd_buffer->pool->alloc);
&device->alloc);
/* First, we walk over all of the bos we've seen and add them and their
* relocations to the validate list.
@@ -1248,7 +1248,7 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
cmd_buffer->last_ss_pool_center);
anv_execbuf_add_bo(&execbuf, &(*bbo)->bo, &(*bbo)->relocs,
&cmd_buffer->pool->alloc);
&device->alloc);
}
/* Now that we've adjusted all of the surface state relocations, we need to
@@ -1355,7 +1355,7 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
VkResult result = anv_device_execbuf(device, &execbuf.execbuf, execbuf.bos);
anv_execbuf_finish(&execbuf, &cmd_buffer->pool->alloc);
anv_execbuf_finish(&execbuf, &device->alloc);
return result;
}

View File

@@ -227,7 +227,8 @@ void anv_CmdCopyImage(
layer_count = pRegions[r].extent.depth;
} else {
dst_base_layer = pRegions[r].dstSubresource.baseArrayLayer;
layer_count = pRegions[r].dstSubresource.layerCount;
layer_count =
anv_get_layerCount(dst_image, &pRegions[r].dstSubresource);
}
unsigned src_base_layer;
@@ -235,7 +236,8 @@ void anv_CmdCopyImage(
src_base_layer = pRegions[r].srcOffset.z;
} else {
src_base_layer = pRegions[r].srcSubresource.baseArrayLayer;
assert(pRegions[r].srcSubresource.layerCount == layer_count);
assert(layer_count ==
anv_get_layerCount(src_image, &pRegions[r].srcSubresource));
}
assert(pRegions[r].srcSubresource.aspectMask ==
@@ -307,7 +309,8 @@ copy_buffer_to_image(struct anv_cmd_buffer *cmd_buffer,
anv_sanitize_image_extent(anv_image->type, pRegions[r].imageExtent);
if (anv_image->type != VK_IMAGE_TYPE_3D) {
image.offset.z = pRegions[r].imageSubresource.baseArrayLayer;
extent.depth = pRegions[r].imageSubresource.layerCount;
extent.depth =
anv_get_layerCount(anv_image, &pRegions[r].imageSubresource);
}
const enum isl_format buffer_format =
@@ -461,7 +464,7 @@ void anv_CmdBlitImage(
dst_end = pRegions[r].dstOffsets[1].z;
} else {
dst_start = dst_res->baseArrayLayer;
dst_end = dst_start + dst_res->layerCount;
dst_end = dst_start + anv_get_layerCount(dst_image, dst_res);
}
unsigned src_start, src_end;
@@ -471,7 +474,7 @@ void anv_CmdBlitImage(
src_end = pRegions[r].srcOffsets[1].z;
} else {
src_start = src_res->baseArrayLayer;
src_end = src_start + src_res->layerCount;
src_end = src_start + anv_get_layerCount(src_image, src_res);
}
bool flip_z = flip_coords(&src_start, &src_end, &dst_start, &dst_end);
@@ -680,6 +683,11 @@ void anv_CmdUpdateBuffer(
assert(max_update_size < MAX_SURFACE_DIM * 4);
/* We're about to read data that was written from the CPU. Flush the
* texture cache so we don't get anything stale.
*/
cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT;
while (dataSize) {
const uint32_t copy_size = MIN2(dataSize, max_update_size);
@@ -688,6 +696,9 @@ void anv_CmdUpdateBuffer(
memcpy(tmp_data.map, pData, copy_size);
if (!cmd_buffer->device->info.has_llc)
anv_state_clflush(tmp_data);
int bs = 16;
bs = gcd_pow2_u64(bs, dstOffset);
bs = gcd_pow2_u64(bs, copy_size);
@@ -818,7 +829,7 @@ void anv_CmdClearColorImage(
VK_IMAGE_ASPECT_COLOR_BIT, image->tiling);
unsigned base_layer = pRanges[r].baseArrayLayer;
unsigned layer_count = pRanges[r].layerCount;
unsigned layer_count = anv_get_layerCount(image, &pRanges[r]);
for (unsigned i = 0; i < anv_get_levelCount(image, &pRanges[r]); i++) {
const unsigned level = pRanges[r].baseMipLevel + i;
@@ -878,7 +889,7 @@ void anv_CmdClearDepthStencilImage(
bool clear_stencil = pRanges[r].aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT;
unsigned base_layer = pRanges[r].baseArrayLayer;
unsigned layer_count = pRanges[r].layerCount;
unsigned layer_count = anv_get_layerCount(image, &pRanges[r]);
for (unsigned i = 0; i < anv_get_levelCount(image, &pRanges[r]); i++) {
const unsigned level = pRanges[r].baseMipLevel + i;
@@ -1119,6 +1130,9 @@ anv_cmd_buffer_flush_attachments(struct anv_cmd_buffer *cmd_buffer,
for (uint32_t i = 0; i < subpass->color_count; ++i) {
uint32_t att = subpass->color_attachments[i];
if (att == VK_ATTACHMENT_UNUSED)
continue;
assert(att < pass->attachment_count);
if (attachment_needs_flush(cmd_buffer, &pass->attachments[att], stage)) {
cmd_buffer->state.pending_pipe_bits |=
@@ -1146,14 +1160,19 @@ subpass_needs_clear(const struct anv_cmd_buffer *cmd_buffer)
for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
uint32_t a = cmd_state->subpass->color_attachments[i];
if (a == VK_ATTACHMENT_UNUSED)
continue;
assert(a < cmd_state->pass->attachment_count);
if (cmd_state->attachments[a].pending_clear_aspects) {
return true;
}
}
if (ds != VK_ATTACHMENT_UNUSED &&
cmd_state->attachments[ds].pending_clear_aspects) {
return true;
if (ds != VK_ATTACHMENT_UNUSED) {
assert(ds < cmd_state->pass->attachment_count);
if (cmd_state->attachments[ds].pending_clear_aspects)
return true;
}
return false;
@@ -1185,6 +1204,10 @@ anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer)
struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
const uint32_t a = cmd_state->subpass->color_attachments[i];
if (a == VK_ATTACHMENT_UNUSED)
continue;
assert(a < cmd_state->pass->attachment_count);
struct anv_attachment_state *att_state = &cmd_state->attachments[a];
if (!att_state->pending_clear_aspects)
@@ -1243,6 +1266,7 @@ anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer)
}
const uint32_t ds = cmd_state->subpass->depth_stencil_attachment;
assert(ds == VK_ATTACHMENT_UNUSED || ds < cmd_state->pass->attachment_count);
if (ds != VK_ATTACHMENT_UNUSED &&
cmd_state->attachments[ds].pending_clear_aspects) {
@@ -1379,10 +1403,11 @@ void anv_CmdResolveImage(
for (uint32_t r = 0; r < regionCount; r++) {
assert(pRegions[r].srcSubresource.aspectMask ==
pRegions[r].dstSubresource.aspectMask);
assert(pRegions[r].srcSubresource.layerCount ==
pRegions[r].dstSubresource.layerCount);
assert(anv_get_layerCount(src_image, &pRegions[r].srcSubresource) ==
anv_get_layerCount(dst_image, &pRegions[r].dstSubresource));
const uint32_t layer_count = pRegions[r].dstSubresource.layerCount;
const uint32_t layer_count =
anv_get_layerCount(dst_image, &pRegions[r].dstSubresource);
for (uint32_t layer = 0; layer < layer_count; layer++) {
resolve_image(&batch,
@@ -1547,8 +1572,12 @@ anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer *cmd_buffer)
blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
for (uint32_t i = 0; i < subpass->color_count; ++i) {
ccs_resolve_attachment(cmd_buffer, &batch,
subpass->color_attachments[i]);
const uint32_t att = subpass->color_attachments[i];
if (att == VK_ATTACHMENT_UNUSED)
continue;
assert(att < cmd_buffer->state.pass->attachment_count);
ccs_resolve_attachment(cmd_buffer, &batch, att);
}
anv_cmd_buffer_flush_attachments(cmd_buffer, SUBPASS_STAGE_DRAW);
@@ -1561,6 +1590,9 @@ anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer *cmd_buffer)
if (dst_att == VK_ATTACHMENT_UNUSED)
continue;
assert(src_att < cmd_buffer->state.pass->attachment_count);
assert(dst_att < cmd_buffer->state.pass->attachment_count);
if (cmd_buffer->state.attachments[dst_att].pending_clear_aspects) {
/* From the Vulkan 1.0 spec:
*

View File

@@ -118,7 +118,12 @@ anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
struct anv_cmd_state *state = &cmd_buffer->state;
memset(&state->descriptors, 0, sizeof(state->descriptors));
memset(&state->push_constants, 0, sizeof(state->push_constants));
for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++) {
if (state->push_constants[i] != NULL) {
vk_free(&cmd_buffer->pool->alloc, state->push_constants[i]);
state->push_constants[i] = NULL;
}
}
memset(state->binding_tables, 0, sizeof(state->binding_tables));
memset(state->samplers, 0, sizeof(state->samplers));
@@ -180,6 +185,9 @@ static VkResult anv_create_cmd_buffer(
if (cmd_buffer == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++) {
cmd_buffer->state.push_constants[i] = NULL;
}
cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
cmd_buffer->device = device;
cmd_buffer->pool = pool;

Some files were not shown because too many files have changed in this diff Show More