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Author SHA1 Message Date
Juan A. Suarez Romero
3c8c851fe4 docs: add release notes for 18.2.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-09-21 12:38:01 +02:00
Juan A. Suarez Romero
8a197eb34e Update version to 18.2.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-09-21 08:43:21 +00:00
Bas Nieuwenhuizen
6c355700fd radv: Fix driver UUID SHA1 init.
Was missing the init, found by Emil.

Fixes: d17443a459 "radv: Use build ID if available for cache UUID."
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 0a77e70d10)
2018-09-21 09:20:51 +02:00
Juan A. Suarez Romero
5f27643567 cherry-ignore: radv: fix descriptor pool allocation size
fixes: this commit was reverted by commit 95bb7d82ca.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-09-19 11:57:29 +02:00
Jason Ekstrand
cc622c0815 nir/opt_if: Re-materialize derefs in use blocks before peeling loops
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107879
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 864c780566)
2018-09-19 11:57:29 +02:00
Jason Ekstrand
36aa46c2ec nir/loop_unroll: Re-materialize derefs in use blocks before unrolling
When we're about to re-arrange a bunch of blocks, it's a good idea to
make sure that we don't have deref uses crossing block boundaries.
Otherwise we may end up with a deref going through a phi and that would
be bad.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 0796c3934e)
2018-09-19 11:57:29 +02:00
Jason Ekstrand
f1305c32c1 nir: Add a small pass to rematerialize derefs per-block
This pass re-materializes deref instructions on a per-block basis to
ensure that every use of a deref occurs in the same block as the
instruction which uses it.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 7d1d1208c2)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/compiler/nir/nir_deref.c

Squashed with:

nir: add initializer data to fix MSVC compile error

CC: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 82799a5d1b8 ("nir: Add a small pass to rematerialize derefs
per-block")
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

(cherry picked from commit 0c82e3603e)
2018-09-19 11:57:16 +02:00
Kenneth Feng
3781c4cbf4 amd: Add Picasso device id
No changes here compared to Raven.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4490fce166)
2018-09-19 11:04:53 +02:00
Timothy Arceri
1ce0c521cd Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"
This reverts commit bc65dcab3b.

This was manually reverted. Reverting stops the menu hanging in
some id tech games such as RAGE and Wolfenstein The New Order.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107891
(cherry picked from commit 7a992fcfa0)
2018-09-19 11:04:53 +02:00
Fritz Koenig
f1f82d2eb0 mesa: FramebufferParameteri parameter checking
Missing break; causes parameter checking to
never pass GL_FRAMEBUFFER_FLIP_Y_MESA parameters.

Fixes: 318c265160 ("mesa: GL_MESA_framebuffer_flip_y extension [v4]")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 60d0c0d062)
2018-09-19 11:04:53 +02:00
Fritz Koenig
f92aa39032 mesa: Additional FlipY applications
Instances where direction was determined based on
winsys or user fbo and should be determined based on
FlipY.

Key STATE_FB_WPOS_Y_TRANSFORM for of FlipY instead of
_mesa_is_user_fbo.  This corrects gl_FragCoord usage
when applying GL_MESA_framebuffer_flip_y.

Fixes: ab05dd183c ("i965: implement GL_MESA_framebuffer_flip_y [v3]")
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit ba6cc32cf9)
2018-09-19 11:04:53 +02:00
Bas Nieuwenhuizen
d2b6f842b4 radv: Use build ID if available for cache UUID.
To get an useful UUID for systems that have a non-useful mtime
for the binaries.

I started using SHA1 to ensure we get reasonable mixing in the
various possibilities and the various build id lengths.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit d17443a459)
2018-09-19 11:04:53 +02:00
Gert Wollny
e86804eab2 mesa/texture: Also check for LA texture when querying intensity component size
Gallium may pick L16A16_FLOAT to represent GL_INTENSITY16F if no intensity
format is provided by the driver. However, when calling

   glGetTexLevelParameteriv(..., GL_TEXTURE_INTENSITY_SIZE, ...)

mesa will return a zero size because the actually used format has no
intensity channel and as a fallback only the sizes of the red/green
channels are checked.

Also checking for LA sizes in the allocated texture resolves this problem.

v2: Only check alpha channel size and return it (Marek)
    L and A size are always the same in this case.

Fixes (on virgl):
  ext_framebuffer_multisample-fast-clear GL_ARB_texture_float *

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107832

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 47e01e77d8)
2018-09-19 11:04:53 +02:00
Jason Ekstrand
2f9795d6b3 anv/query: Write both dwords in emit_zero_queries
Each query slot is a uint64_t and we were only zeroing half of it.

Fixes: 7ec6e4e689 "anv/query: implement multiview interactions"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 07e214f1ce)
2018-09-19 11:04:53 +02:00
Ian Romanick
152e12f36b i965/fs: Don't propagate conditional modifiers from integer compares to adds
No shader-db changes on any Intel platform... which probably explains
why no bugs have been bisected to this problem since it landed in Mesa
18.1. :( The commit mentioned below is in 18.2, so 18.1 would need a
slightly different fix (due to code refactoring).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes: 77f269bb56 "i965/fs: Refactor propagation of conditional modifiers from compares to adds"
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> (reviewed the original patch)
Cc: Matt Turner <mattst88@gmail.com> (reviewed the original patch)
(cherry picked from commit df9dbc03d3)
2018-09-19 11:04:53 +02:00
Erik Faye-Lund
d42bf4f0ee virgl: adjust strides when mapping temp-resources
When we're mapping temp-resources, we clip the resource to the
transfer-box, which means the stride might not be correct any more.

So let's update the stride from the temp-resource, and recompute the
layer-stride.

This fixes crashes when running dEQP with --deqp-gl-config-name=rgba8888d24s8ms4

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: a8987b88ff "virgl: add driver for virtio-gpu 3D (v2)"
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit fa5e9f1f73)
2018-09-19 11:04:53 +02:00
Pierre Moreau
5b58be3590 nvir: Always split 64-bit IMAD/IMUL operations
Those operations do not map to actual hardware instructions, therefore
those should always be lowered to 32-bit instructions.

Fixes: 009c54aa7a "nv50/ir: Split 64-bit integer MAD/MUL operations"

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
(cherry picked from commit 21b92b3464)
2018-09-19 11:04:53 +02:00
Erik Faye-Lund
051880fc20 winsys/virgl: avoid unintended behavior
If we end up never taking the loop that writes ret, we can end up with
an uninitialized value, and if we're *really* unlucky, that value can
be -1, causing us to go down an error-path instead of a success path.

This was obviously not intended, so let's just initialize this to zero.

Noticed by Valgrind:

Conditional jump or move depends on uninitialised value(s)
   at 0xBA640A0: virgl_drm_winsys_resource_cache_create (virgl_drm_winsys.c:348)
   by 0xBA62FCF: virgl_buffer_create (virgl_buffer.c:170)
   by 0xBA605AC: virgl_resource_create (virgl_resource.c:60)
   by 0xBCF816F: bufferobj_data (st_cb_bufferobjects.c:344)
   by 0xBCF816F: st_bufferobj_data (st_cb_bufferobjects.c:390)
   by 0xBB7E836: vbo_use_buffer_objects (vbo_exec_api.c:1136)
   by 0xBCFCC6E: st_create_context_priv (st_context.c:414)
   by 0xBCFD3CD: st_create_context (st_context.c:590)
   by 0xBBB30CA: st_api_create_context (st_manager.c:896)
   by 0xB981E76: dri_create_context (dri_context.c:155)
   by 0xB97BDCE: driCreateContextAttribs (dri_util.c:473)
   by 0x5288331: dri3_create_context_attribs (dri3_glx.c:309)
   by 0x5264D64: glXCreateContextAttribsARB (create_context.c:78)

Fixes: a8987b88ff ("virgl: add driver for virtio-gpu 3D (v2)")
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
(cherry picked from commit eaa718588e)
2018-09-19 11:04:53 +02:00
Bas Nieuwenhuizen
f2f969add1 radv: Only allow 16 user SGPRs for compute on GFX9+.
Apparently for compute there are only 16 instead of the 32 for the
graphics path.

Fixes dEQP-VK.binding_model.descriptorset_random.sets16.noarray.ubolimitlow.sbolimitlow.imglimitlow.noiub.comp.0

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 0dd8189f15)
2018-09-17 17:08:00 +02:00
Bas Nieuwenhuizen
1ab5f8addd radv: Set the user SGPR MSB for Vega.
Otherwise using 32 user SGPRs would be broken.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit d97c892584)
2018-09-17 17:05:10 +02:00
Mauro Rossi
f354ac60bd android: broadcom/cle: export the broadcom top level path headers
Fixes the following building error in vc4 build:

In file included from external/mesa/src/gallium/drivers/vc4/kernel/vc4_render_cl.c:34:
In file included from external/mesa/src/gallium/drivers/vc4/kernel/vc4_drv.h:27:
In file included from external/mesa/src/gallium/drivers/vc4/vc4_simulator_validate.h:34:
In file included from external/mesa/src/gallium/drivers/vc4/vc4_context.h:39:
In file included from external/mesa/src/gallium/drivers/vc4/vc4_cl.h:56:
gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h:12:10:
fatal error: 'cle/v3d_packet_helpers.h' file not found
         ^~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.

Fixes: 5b102160ae ("broadcom/genxml: Introduce a V3D packet/struct decoder.")
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
(cherry picked from commit cc3b99bb48)
2018-09-17 17:02:30 +02:00
Mauro Rossi
7fbd3177dc android: broadcom/cle: add gallium include path
Fixes the following building error:

In file included from external/mesa/src/broadcom/cle/v3d_decoder.c:38:
In file included from external/mesa/src/broadcom/cle/v3d_packet_helpers.h:29:
external/mesa/src/gallium/auxiliary/util/u_math.h:42:10:
fatal error: 'pipe/p_compiler.h' file not found
         ^~~~~~~~~~~~~~~~~~~
1 error generated.

Fixes: 5b102160ae ("broadcom/genxml: Introduce a V3D packet/struct decoder.")
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
(cherry picked from commit 9158e0bd82)
2018-09-17 17:00:03 +02:00
Mauro Rossi
4ef541926c android: broadcom/genxml: fix collision with intel/genxml header-gen macro
Fixes the following building error, happening when building both intel and broadcom:

Gen Header: libmesa_broadcom_genxml_32 <= v3d_packet_v21_pack.h
FAILED: gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h
/bin/bash -c "python external/mesa/src/broadcom/cle/gen_pack_header.py \
external/mesa/src/broadcom/cle/v3d_packet_v21.xml \
> gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h"
Traceback (most recent call last):
  File "external/mesa/src/broadcom/cle/gen_pack_header.py", line 626, in <module>
    p = Parser(sys.argv[2])
IndexError: list index out of range

header-gen macro is already defined by Intel genxml building rules
and the existing header-gen does not have the $(PRIVATE_VER) argument,
infact the bash command line logged in the building error is missing
exactly $(PRIVATE_VER) argument

Renaming the macro as pack-header-gen in src/broadcom/Android.genxml.mk
solves the building error, another possible way is to keep the gen rules
commands expanded and not use the macros.

Fixes: 7f80a9ff13 ("vc4: Introduce XML-based packet header generation like Intel's.")
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
(cherry picked from commit 3341429d74)
2018-09-17 16:57:45 +02:00
Josh Pieper
fa7a9dca23 st/mesa: Validate the result of pipe_transfer_map in make_texture (v2)
When using Freecad, I was getting intermittent segfaults inside of
mesa.  I traced it down to this path in st_cb_drawpixels.c where the
result of pipe_transfer_map wasn't being checked.  In my case, it was
returning NULL because nouveau_bo_new returned ENOENT.  I'm by no
means a mesa developer, but this patch solves the problem for me and
seems reasonable enough.

v2: Marek - also unmap the PBO and release the texture, and call
    the make_texture function sooner for less cleanup

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 936e0dcd61)
2018-09-17 16:55:06 +02:00
Samuel Pitoiset
40b930c982 radv: fix setting global locations for indirect descriptors
Indirect descriptors only need one entry, we don't have to
emit a location for every descriptors.

Fixes GPU hangs with new CTS:
dEQP-VK.binding_model.descriptorset_random.*

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 9de062ef20)
2018-09-17 16:50:10 +02:00
Samuel Pitoiset
a103bc9b1f radv: fix flushing indirect descriptors
Let say, we first bind a graphics pipeline that needs indirect
descriptors sets. The userdata pointers will be emitted at draw
time. Then if we bind a compute pipeline that doesn't need any
indirect descriptors, the driver will re-emit them for all
grpahics stages.

To avoid this to happen, just check the bind point type.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 748f4cce18)
2018-09-17 16:46:47 +02:00
Samuel Pitoiset
0d2527c944 radv: fix GPU hangs with 32-bit indirect descriptors
LLVM 6 isn't affected.

Fixes GPU hangs with new CTS:
dEQP-VK.binding_model.descriptorset_random.*

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 063264db5b)
2018-09-17 16:42:23 +02:00
Samuel Pitoiset
1655fbd40d radv: handle loc->indirect correctly for the first descriptor
This was wrong for descriptor #0 when all of them are indirect.
This is because indirect_offset was 0 and we emitted a
"normal" descriptor pointer for nothing.

While we are at it remove
radv_userdata_info::indirect_offset which is useless.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit aa30205929)
2018-09-17 16:39:08 +02:00
Samuel Pitoiset
8de8af1b90 radv: bump the maximum number of arguments to 64
Bumping to 64 should be safe enough.

Fixes some crashes with new CTS:
dEQP-VK.binding_model.descriptorset_random.*

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit b9f6521157)
2018-09-17 16:36:02 +02:00
Samuel Pitoiset
b03b6173a9 radv: fix VK_EXT_conditional_rendering visibility
It's actually just the opposite.

This fixes the new Sascha conditionalrender demo.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit abdf396cbe)
2018-09-17 16:33:24 +02:00
Samuel Pitoiset
9b52e8fde9 radv: fix function names for VK_EXT_conditional_rendering
Otherwise they are not exported.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Dave Airlie <airlied@redhat.com
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit d4bf954fe6)
2018-09-17 16:28:46 +02:00
Michel Dänzer
e4b667224d loader/dri3: Only wait for back buffer fences in dri3_get_buffer
We don't need to wait before drawing to the fake front buffer, as front
buffer rendering by definition is allowed to produce artifacts.

Fixes hangs in some cases when re-using the fake front buffer, due to it
still being busy (i.e. in use for presentation).

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/106404
Bugzilla: https://bugs.freedesktop.org/107757
Tested-by: Olivier Fourdan <ofourdan@redhat.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
(cherry picked from commit aefac10fec)
2018-09-17 16:08:43 +02:00
Sergii Romantsov
4fe3ce2aa3 mesa/meson: 32bit xmlconfig linkage
Building of 32bit mesa with meson causes linkage issue:
"undefined reference to `util_get_process_name'"
Fixed by adding link-with mesa_util for xmlconfig primary.

v2: Removed '[]', commit message corrected.

v3: Reverted changes in gbm and glx libraries.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843
Fixes: 2e1e6511f7 "util: extract get_process_name from xmlconfig.c"
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit bbe551f3ea)
2018-09-12 01:12:56 +03:00
Dave Airlie
87a05c22fb virgl: don't send a shader create with no data. (v2)
This fixes the situation where we'd send a shader with just the
header and no data.

piglit/glsl-max-varyings test was causing this to happen, and
the renderer fix was breaking it.

v2: drop fprintf

Fixes: a8987b88ff "virgl: add driver for virtio-gpu 3D (v2)"
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
(cherry picked from commit 240af61494)
2018-09-12 01:11:55 +03:00
Christopher Egert
5a73466674 radeon: fix ColorMask
Since commit af3685d149 various OpenGL applications regressed
on the classic mesa radeon driver.

Signed-off-by: Christopher Egert <cme3000@gmail.com>
CC: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 51995f6920)
2018-09-12 01:11:03 +03:00
Bas Nieuwenhuizen
196baf24d5 radv: Support v3 of VK_EXT_vertex_attribute_divisor.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
CC: 18.2 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f6e09db2e6)
2018-09-12 01:04:10 +03:00
Jason Ekstrand
f3c91874fa anv: Support v3 of VK_EXT_vertex_attribute_divisor
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 6f00785765)
2018-09-12 01:03:47 +03:00
Jason Ekstrand
8d7c88997f vulkan: Update the XML and headers to 1.1.84
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 34a17a48d4)
2018-09-12 01:03:18 +03:00
Marek Olšák
ad3151a02d ac: revert new LLVM 7.0 behavior for fdiv
Cc: 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit a5f35aa742)
2018-09-12 00:53:35 +03:00
Marek Olšák
7b2e888770 radeonsi: fix printing a BO list into ddebug reports
important for debugging

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit 662db03577)
2018-09-12 00:53:01 +03:00
Marek Olšák
f580738655 r600: fix HTILE for NPOT textures with mipmapping
Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit da72b6296c)
2018-09-12 00:52:29 +03:00
Marek Olšák
1aa9e7f973 winsys/radeon: fix CMASK fast clear for NPOT textures with mipmapping on SI/CI
Cc: 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit d4e52281aa)
2018-09-12 00:50:56 +03:00
Marek Olšák
075313416a radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CI
VI uses addrlib so it's unaffected.

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit a1b9a00f82)
2018-09-12 00:49:32 +03:00
Jason Ekstrand
bd6303a440 anv: Clamp scissors to the framebuffer boundary
The Vulkan 1.1.81 spec says:

    "It is legal for offset.x + extent.width or offset.y + extent.height
    to exceed the dimensions of the framebuffer - the scissor test still
    applies as defined above. Rasterization does not produce fragments
    outside of the framebuffer, so such fragments never have the scissor
    test performed on them."

Elsewhere, the Vulkan 1.1.81 spec says:

    "The application must ensure (using scissor if necessary) that all
    rendering is contained within the render area, otherwise the pixels
    outside of the render area become undefined and shader side effects
    may occur for fragments outside the render area. The render area
    must be contained within the framebuffer dimensions."

Unfortunately, there's some room for interpretation here as to what the
consequences are of having the render area set to exactly the
framebuffer dimensions and having a scissor that is larger than the
framebuffer.  Given that GL and other APIs provide automatic clipping to
the framebuffer, it makes sense that applications would assume that
Vulkan does this as well.  It costs us very little to play it safe and
just clamp client-provided scissors to the framebuffer dimensions.
Fortunately, the user is required to provide us with at least one
scissor so we don't need to handle the case where they don't.

Fixes: fb2a5ceb32 "anv: Emit DRAWING_RECTANGLE once at driver..."
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 465e5a868c)
2018-09-08 01:30:13 +03:00
Eric Anholt
ded225eb98 v3d: Fix setup of the VCM cache size.
There were two bugs working together to make things mostly work: I wasn't
dividing the VPM output size available by the size of a batch (vertex),
but I also had the size of the VPM reduced by a factor of 8.

Fixes dEQP-GLES3.functional.vertex_array_objects.all_attributes and it
seems also my intermittent varying failures.

Fixes: 1561e4984e ("v3d: Emit the VCM_CACHE_SIZE packet.")
(cherry picked from commit a91b158bd9)
2018-09-08 01:29:23 +03:00
Sergii Romantsov
3f20c0a004 i965/tools: 32bit compilation with meson
Building of 32bit mesa with meson causes issue:
"implicit declaration of function ‘__builtin_ia32_clflush’".
Fixed by adding msse2 compilation flag.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843
Fixes: 314879f7fe (i965: Fix asynchronous mappings on !LLC platforms.)
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 97fcccb25e)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/tools/meson.build
2018-09-08 01:28:20 +03:00
Jason Ekstrand
5333eba63a anv: Disable the vertex cache when tessellating on SKL GT4
I have no idea if I'm correct about what's going wrong or if this is the
correct fix.  However, in my multiple weeks of banging my head on this
hang, a VUE reference counting bug seems to match all the symptoms and
it definitely fixes the hang.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107280
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit b08b4b2b25)
2018-09-08 01:21:05 +03:00
Jason Ekstrand
9909102335 anv: Re-emit vertex buffers when the pipeline changes
Some of the bits of VERTEX_BUFFER_STATE such as access type, instance
data step rate, and pitch come from the pipeline.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit c643c5e18d)
2018-09-08 01:19:30 +03:00
Jason Ekstrand
320dd62ce1 i965: Workaround the gen9 hw astc5x5 sampler bug
gen9 hardware has a bug in the sampler cache that can cause GPU hangs
whenever an texture with aux compression enabled is in the sampler cache
together with an ASTC5x5 texture.  Because we can't control what the
client binds at any given time, we have two options: resolve the CCS or
decompresss the ASTC.  Doing a CCS or HiZ resolve is far less drastic
and will likely have a smaller performance impact.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit f9e630e23d)
2018-09-08 01:17:49 +03:00
Eric Anholt
8ed365a7ff v3d: Fix SRC_ALPHA_SATURATE blending for RTs without alpha.
Fixes
dEQP-GLES3.functional.fragment_ops.blend.default_framebuffer.rgb_func_alpha_func.dst.src_alpha_saturate_src_alpha_saturate
and friends with --deqp-egl-config-name=rgb565d0s0

Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f73f748323)
2018-09-08 01:16:18 +03:00
Sergii Romantsov
9dff29fda5 intel: compiler option msse2 and mstackrealign
Seems in case of 32-bit library, usage of msse2 makes
some stack corruption or incorrect instructions.
Usage with mstackrealign fixes that case.

v2: Fixed meson.

v3: Definition of c_sse2_args moved on the top (L.Landwerlin).
    Added mstackrealign for Android's mks where msee4.1 is used.

v4: Added for Vulkan also.

v5: Commit message correction.

CC: <mesa-stable@lists.freedesktop.org>
Fixes: 6b05c080f2 (i965: Compile with -msse3)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107779
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit d709f12792)
2018-09-08 01:12:43 +03:00
Andres Gomez
4ca64c6872 cherry-ignore: i965/tools: 32bit compilation with meson
fixes: This commit was immediately reverted by commit 2dce1175c1.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-08 01:08:18 +03:00
Andres Gomez
4c977744ba Revert "Revert "glsl: skip stringification in preprocessor if in unreachable branch""
This reverts commit 2fd6f06faa.

Take back 28a3731e3f ("glsl: skip stringification in preprocessor if in
unreachable branch") after b9fe8ff23d ("glsl: fixer lexer for
unreachable defines") has made it to the branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-08 01:08:18 +03:00
Timothy Arceri
8a471fe120 glsl: fixer lexer for unreachable defines
If we have something like:

   #ifdef NOT_DEFINED
   #define A_MACRO(x) \
	if (x)
   #endif

The # on the #define is not skipped but the define itself is so
this then gets recognised as #if.

Until 28a3731e3f this didn't happen because we ended up in
<HASH>{NONSPACE} where BEGIN INITIAL was called stopping the
problem from happening.

This change makes sure we never call RETURN_TOKEN_NEVER_SKIP for
if/else/endif when processing a define.

Cc: Ian Romanick <idr@freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107772
Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit b9fe8ff23d)
2018-09-08 01:02:28 +03:00
Andrii Simiklit
4ddc689d68 mesa/util: add missing va_end() after va_copy()
MSDN:
"va_end must be called on each argument list that's initialized
 with va_start or va_copy before the function returns."

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107810
Fixes: c6267ebd6c "gallium/util: Stop bundling our snprintf implementation."
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
(cherry picked from commit 2930b76cfe)
2018-09-08 01:02:28 +03:00
Andrii Simiklit
841dc893ca mesa/util: don't ignore NULL returned from 'malloc'
We should exit from the function 'util_vasprintf'
with error code -1 for case where 'malloc'
returns NULL

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 864148d69e "util: add util_vasprintf() for Windows (v2)"
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
(cherry picked from commit 65cfe698b0)
2018-09-08 01:02:28 +03:00
Andrii Simiklit
d55da359fa mesa/util: don't use the same 'va_list' instance twice
The first usage of the 'va_list' instance could change it.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 864148d69e "util: add util_vasprintf() for Windows (v2)"
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
(cherry picked from commit 570cacba7a)
2018-09-08 01:02:28 +03:00
Andrii Simiklit
e1695569de apple/glx/log: added missing va_end() after va_copy()
Each invocation of va_copy() must be matched by a
corresponding invocation of va_end()

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 51691f0767 "darwin: Use ASL for logging"
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
(cherry picked from commit 267ed29288)
2018-09-08 01:02:28 +03:00
Mathias Fröhlich
884fa13865 tnl: Fix green gun regression in xonotic.
Fix an other regression of
mesa: Make gl_vertex_array contain pointers to first order VAO members.
The regression showed up with drivers using the tnl module and
was reproducible using xonotic-glx -benchmark demos/the-big-keybench.dem.

Fixes: 64d2a20480
    mesa: Make gl_vertex_array contain pointers to first order VAO members.
Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
(cherry picked from commit a6232b6932)
2018-09-08 01:02:28 +03:00
Jason Ekstrand
432a95b65f anv/pipeline: Only consider double elements which actually exist
The brw_vs_prog_data::double_inputs_read field comes directly from
shader_info::double_inputs which may contain inputs which are not
actually read.  Instead of using it directly, AND it with inputs_read
which is only things which are read.  Otherwise, we may end up
subtracting too many elements when computing elem_count.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103241
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 7b26741806)
2018-09-08 01:02:28 +03:00
Dylan Baker
93726c17c6 meson: Print a message about why a libdrm version was selected
We require a single version of libdrm for all of our libdrm
dependencies (core and driver), but the way this is structured can make
the error message less than helpful, as one driver might be the one
setting the libdrm requirement, while another might be the one that
generates the version failure.

This adds a simple message to the output announcing which libdrm module
set the version, which might be more helpful.

v2: - Use message suggested by Eric Engstrom

Fixes: c445b1d56f
       ("meson: Use the same version for all libdrm checks")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit d25a27ec56)
2018-09-08 01:02:28 +03:00
Gert Wollny
fb41d6e95c winsys/virgl: correct resource and handle allocation (v2)
Fixes crash with
  piglit/bin/map_buffer_range-invalidate CopyBufferSubData \
                               increment-offset -auto -fbo

* Resize the resource storage already when the count is equal to the
  allocated size, fixes:

  Invalid write of size 8
  at 0xB72E4CF: virgl_drm_add_res (virgl_drm_winsys.c:629)
  by 0xB72E4CF: virgl_drm_emit_res (virgl_drm_winsys.c:663)
  by 0xB72A44A: virgl_encode_resource_copy_region (virgl_encode.c:776)
  by 0xB40CD12: st_copy_buffer_subdata (st_cb_bufferobjects.c:585)
  by 0xB244A3B: _mesa_CopyBufferSubData (bufferobj.c:2940)
  by 0x109A1E: upload (invalidate.c:169)
  by 0x109C2F: piglit_display (invalidate.c:215)
  by 0x4F80FBE: run_test (piglit_fbo_framework.c:52)
  by 0x4F66E5F: piglit_gl_test_run (piglit-framework-gl.c:229)
  by 0x10949D: main (invalidate.c:47)
  Address 0xbe07d30 is 0 bytes after a block of size 4,096 alloc'd
  at 0x4C31B25: calloc (in
       /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
  by 0xB72DAAF: virgl_drm_cmd_buf_create (virgl_drm_winsys.c:567)

* Also resize the space allocated for the handles, fixes:

  Invalid write of size 4
  at 0xB72E4F0: virgl_drm_add_res (virgl_drm_winsys.c:631)
  by 0xB72E4F0: virgl_drm_emit_res (virgl_drm_winsys.c:663)
  by 0xB72A44A: virgl_encode_resource_copy_region (virgl_encode.c:776)
  by 0xB40CD12: st_copy_buffer_subdata (st_cb_bufferobjects.c:585)
  by 0xB244A3B: _mesa_CopyBufferSubData (bufferobj.c:2940)
  by 0x109A1E: upload (invalidate.c:169)
  by 0x109C2F: piglit_display (invalidate.c:215)
  by 0x4F80FBE: run_test (piglit_fbo_framework.c:52)
  by 0x4F66E5F: piglit_gl_test_run (piglit-framework-gl.c:229)
  by 0x10949D: main (invalidate.c:47)
  Address 0xbe08570 is 0 bytes after a block of size 2,048 alloc'd
  at 0x4C2FB0F: malloc (
    in /usr/lib/valgrind/vgpreload_memcheck-amd64- linux.so)
  by 0xB72DAC8: virgl_drm_cmd_buf_create (virgl_drm_winsys.c:572)

Fixes: 4b15b5e803 ("virgl: resize resource bo allocation if we need to.")

v2: - Use REALLOC macro and avoid memory leak when re-allocation fails
    - add Fixes tag (both Emil Velikov)
    - reorder commit message

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
(cherry picked from commit 9b0e8d8723)
2018-09-08 01:02:28 +03:00
Andres Gomez
cb1ddf48e2 docs: add sha256 checksums for 18.2.0
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-08 00:26:57 +03:00
Andres Gomez
7378180e7a docs: update 18.2.0 release notes
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-08 00:10:49 +03:00
Andres Gomez
83c0910b53 Update version to 18.2.0(final)
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-07 19:55:08 +03:00
Andres Gomez
2fd6f06faa Revert "glsl: skip stringification in preprocessor if in unreachable branch"
This reverts commit c52bcfa61c.

This revealed the bug reported at:
https://bugs.freedesktop.org/show_bug.cgi?id=107772

Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-07 18:22:09 +03:00
69 changed files with 1384 additions and 267 deletions

View File

@@ -1 +1 @@
18.2.0-rc6
18.2.1

View File

@@ -9,3 +9,7 @@ a72dbc461bdb7714656e62cd8f4b00a404c2e6e0 mesa: allow GL_UNSIGNED_BYTE type for S
c9f54486959716762e6818dabb0a73a8cd46df67 radeonsi: fix regression in indirect input swizzles.
# extra: Just some comments update.
2ad9917e187c1e9dbb053d3c98aa0e39fa374059 anv/blorp: Fix a comment as per Nanley's review feedback
# fixes: This commit was immediately reverted by commit 2dce1175c1c.
4aec44c0d9c4c0649c362199fac97efe0a3b38a4 i965/tools: 32bit compilation with meson
# pick: This commit was reverted by commit 95bb7d82ca8.
90819abb56f6b1a0cd4946b13b6caf24fb46e500 radv: fix descriptor pool allocation size

View File

@@ -14,7 +14,7 @@
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.2.0 Release Notes / TBD</h1>
<h1>Mesa 18.2.0 Release Notes / September 7, 2018</h1>
<p>
Mesa 18.2.0 is a new development release. People who are concerned
@@ -40,7 +40,8 @@ an up-to-date version of Wayland to keep the functionality.
<h2>SHA256 checksums</h2>
<pre>
TBD.
b9e6bb3eb7660b0726ba28405ffa0cb77de619e925b910b72f4d7a85c0098596 mesa-18.2.0.tar.gz
22452bdffff8e11bf4284278155a9f77cb28d6d73a12c507f1490732d0d9ddce mesa-18.2.0.tar.xz
</pre>
@@ -65,6 +66,211 @@ Note: some of the new features are only available with certain drivers.
</ul>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=13728">Bug 13728</a> - [G965] Some objects in Neverwinter Nights Linux version not displayed correctly</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61761">Bug 61761</a> - glPolygonOffsetEXT, OFFSET_BIAS incorrectly set to a huge number</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=65422">Bug 65422</a> - Rename api_validate.[ch] to draw_validate.[ch]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=78097">Bug 78097</a> - glUniform1ui and friends not supported by display lists</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91808">Bug 91808</a> - trine1 misrender r600g</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=93355">Bug 93355</a> - [BXT,SKLGT4e] intermittent ext_framebuffer_multisample.accuracy fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=95009">Bug 95009</a> - [SNB] amd_shader_trinary_minmax.execution.built-in-functions.gs-mid3-ivec2-ivec2-ivec2 intermittent</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=95012">Bug 95012</a> - [SNB] glsl-1_50.execution.built-in-functions.gs-op tests intermittent</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98699">Bug 98699</a> - &quot;float[a+++4 ? 1:1] f;&quot; crashes glsl_compiler</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99116">Bug 99116</a> - Wine DirectDraw programs showing only a blackscreen when using Mesa Gallium drivers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99730">Bug 99730</a> - Metro Redux game(s) needs override for midshader extension declaration</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100177">Bug 100177</a> - [GM206] Misrendering in XCOM Ennemy Within</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100430">Bug 100430</a> - [radv] graphical glitches on dolphin emulator</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101247">Bug 101247</a> - Mesa fails to link GLSL programs with unused output blocks</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102390">Bug 102390</a> - centroid interpolation causes broken attribute values</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102678">Bug 102678</a> - gl_BaseVertex should always be zero when the draw command has no &lt;basevertex&gt; parameter</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103274">Bug 103274</a> - BRW allocates too much heap memory</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104388">Bug 104388</a> - [snb] GPU HANG: ecode 6:0:0x85fffff8 in fgfs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104626">Bug 104626</a> - broadcom/vc5: double compare</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104809">Bug 104809</a> - anv: DOOM 2016 and Wolfenstein II:The New Colossus crash due to not having depthBoundsTest</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105351">Bug 105351</a> - [Gen6+] piglit's arb_shader_image_load_store-host-mem-barrier fails with a glGetTexSubImage fallback path</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105374">Bug 105374</a> - texture3d, a SaschaWillems demo, assert fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105396">Bug 105396</a> - tc compatible htile sets depth of htiles of discarded fragments to 1.0</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105399">Bug 105399</a> - [snb] GPU hang: after geometry shader emits no geometry, the program hangs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105497">Bug 105497</a> - shader-db crashes on 72 core system after ast_type_qualifier bitset change</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105613">Bug 105613</a> - Compute shader locks up within nested &quot;for&quot; loop</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105731">Bug 105731</a> - linker error &quot;fragment shader input ... has no matching output in the previous stage&quot; when previous stage's output declaration in a separate shader object</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105904">Bug 105904</a> - Needed to delete mesa shader cache after driver upgrade for 32 bit wine vulkan programs to work.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105975">Bug 105975</a> - i965 always reports 0 viewport subpixel bits</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106090">Bug 106090</a> - Compiling compute shader crashes RADV</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106133">Bug 106133</a> - make check &quot;OSError: [Errno 24] Too many open files&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106163">Bug 106163</a> - r600/sb: optimizer tries to schedule access to different array elements in one instruction group</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106174">Bug 106174</a> - vulkan dota2 broken (segfaulting), found bug commit</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106180">Bug 106180</a> - [bisected] radv vulkan smoke test black screen (Add support for DRI3 v1.2)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106232">Bug 106232</a> - LLVM unit tests have error in random number handling</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106243">Bug 106243</a> - [kbl] GPU HANG: 9:0:0x85dffffb, in Cinnamon</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106315">Bug 106315</a> - The witness + dxvk suffers flickering garbage</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106331">Bug 106331</a> - radv doesnt support VK_FORMAT_R32G32B32_SFLOAT</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106382">Bug 106382</a> - Shader cache breaks INTEL_DEBUG=shader_time</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106393">Bug 106393</a> - glsl-fs-shader-stencil-export hangs forever</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106450">Bug 106450</a> - glGetIntegerv return wrong value in some cases</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106462">Bug 106462</a> - piglit.spec.arb_vertex_array_bgra.get regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106479">Bug 106479</a> - NDEBUG not defined for libamdgpu_addrlib</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106480">Bug 106480</a> - A2B10G10R10_SNORM vertex attribute doesn't work.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106499">Bug 106499</a> - [regression, bisected] Several games crash on start</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106504">Bug 106504</a> - vulkan SPIR-V parsing failed at ../src/compiler/spirv/vtn_cfg.c:381</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106511">Bug 106511</a> - radv: MSAA broken on SI (assertion failure in vkCreateImage)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106587">Bug 106587</a> - Dota2 is very dark when using vulkan render on a Intel &lt;&lt; AMD prime setup</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106594">Bug 106594</a> - [regression,apitrace,bisected] Prison Architect rendered unplayable by multicoloured flickering triangles and overlayed triangles when performing certain actions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106619">Bug 106619</a> - [OpenCL][llvm-svn]build failure addPassesToEmitFile candidate expects 6 arguments, 3 provided</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106629">Bug 106629</a> - [SNB,IVB,HSW,BDW] dEQP-EGL.functional.image.create.gles2_cubemap_negative_z_rgb_read_pixels</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106642">Bug 106642</a> - X server crashes in i965 on desktop startup when DRI3 v1.2 / modifier support is enabled</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106643">Bug 106643</a> - double free when exporting a temporarily imported semaphore</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106673">Bug 106673</a> - [bisected] Steam is unusable since commit 5c33e8c7</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106687">Bug 106687</a> - radv: Fast color clears use incorrect format</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106708">Bug 106708</a> - [SKL/KBL/GLK] 2-3% performance drop in SynMark DrvState and 5-9% drop on SynMark Multithread</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106748">Bug 106748</a> - st/mesa: use PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY broke qemu -display sdl,gl=on</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106756">Bug 106756</a> - Wine 3.9 crashes with DXVK on Just Cause 3 and Quantum Break on VEGA but works ON POLARIS</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106774">Bug 106774</a> - GLSL IR copy propagates loads of SSBOs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106776">Bug 106776</a> - vma_random unrecognized command line option &quot;-std=c++11&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106778">Bug 106778</a> - Files missing from tarball - intel_sanitize_gpu.*</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106779">Bug 106779</a> - Files missing from tarball - u_debug_stack_android.cpp</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106784">Bug 106784</a> - 18.1.1 autotools build fail without mako</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106801">Bug 106801</a> - vma_random_test.cpp:239:18: error: non-constant-expression cannot be narrowed from type 'unsigned long' to 'uint_fast32_t' (aka 'unsigned int') in initializer list [-Wc++11-narrowing]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106810">Bug 106810</a> - ProgramBinary does not switch program correctly when using transform feedback</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106823">Bug 106823</a> - Failed to recongnize keyword of shader code</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106830">Bug 106830</a> - [bisected] 32 bit tests (deqp, piglit, glcts, vulkancts) crashing on all platforms</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106861">Bug 106861</a> - fatal error: wayland-egl-backend.h: No such file or directory compilation terminated.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106865">Bug 106865</a> - [GLK] piglit.spec.ext_framebuffer_multisample.accuracy stencil tests fail</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106903">Bug 106903</a> - radv: Fragment shader output goes to wrong attachments when render targets are sparse</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106906">Bug 106906</a> - Failed to recongnize keyword “sampler2DRect” and &quot;sampler2DRectShadow&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106907">Bug 106907</a> - Correct Transform Feedback Varyings information is expected after using ProgramBinary</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106912">Bug 106912</a> - radv: 16-bit depth buffer causes artifacts in Shadow Warrior 2</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106928">Bug 106928</a> - When starting a match Rocket League crashes on &quot;Go&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106941">Bug 106941</a> - Intel ANV vulkan driver exposing version 1.1.0 which is incorrect</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106986">Bug 106986</a> - glGetQueryiv error when querying number of result bits for GL_ANY_SAMPLES_PASSED_CONSERVATIVE</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106997">Bug 106997</a> - [Regression]. Dying light game is crashing on latest mesa</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107098">Bug 107098</a> - Segfault after munmap(kms_sw_dt-&gt;ro_mapped)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107117">Bug 107117</a> - mesa-18.1: regression with TFP on intel with modesettings and glamor acceleration</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107190">Bug 107190</a> - Got seg fault on snb when use INTEL_DEBUG=bat</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107193">Bug 107193</a> - piglit.spec.arb_compute_shader.linker.bug-93840 fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107212">Bug 107212</a> - Dual-Core CPU E5500 / G45: RetroArch with reicast core results in corrupted graphics</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107223">Bug 107223</a> - [GEN9+] 50% perf drop in SynMark Fill* tests (E2E RBC gets disabled?)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107248">Bug 107248</a> - [G45 ILK G965] Texture handling broken</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107275">Bug 107275</a> - NIR segfaults after spirv-opt</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107276">Bug 107276</a> - radv: OpBitfieldUExtract returns incorrect result when count is zero</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107295">Bug 107295</a> - Access violation on glDrawArrays with count &gt;= 2048</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107305">Bug 107305</a> - glsl/opt_copy_propagation_elements.cpp:72:9: error: delegating constructors are permitted only in C++11</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107312">Bug 107312</a> - Mesa-git RPM build fails after commit 8cacf38f527d42e41441ef8c25d95d4b2f4e8602</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107359">Bug 107359</a> - [Regression] [bisected] [OpenGL CTS] [SKL,BDW] KHR-GL46.texture_barrier*-texels, GTF-GL46.gtf21.GL2FixedTests.buffer_corners.buffer_corners, and GTF-GL46.gtf21.GL2FixedTests.stencil_plane_corners.stencil_plane_corners fail with some configuration</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107366">Bug 107366</a> - NIR verification crashes on piglit tests</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107423">Bug 107423</a> - vc4 build failure: &quot;v3d_decoder.c:893: undefined reference to `clif_lookup_bo'&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107443">Bug 107443</a> - Build error on arm64: v3d_decoder.c:837:17: error: format not a string literal and no format arguments [-Werror=format-security]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107460">Bug 107460</a> - radv: OpControlBarrier does not always work correctly (bisected)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107477">Bug 107477</a> - [DXVK] Setting high shader quality in GTA V results in LLVM error</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107510">Bug 107510</a> - [GEN8+] up to 10% perf drop on several 3D benchmarks</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107544">Bug 107544</a> - intel/decoder: out of bounds group_iter</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107550">Bug 107550</a> - &quot;0[2]&quot; as function parameter hits assert</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107579">Bug 107579</a> - [SNB] The graphic corruption when we reuse the GS compiled and used for TFB when statebuffer contain magic trash in the unused space</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107601">Bug 107601</a> - Rise of the Tomb Raider Segmentation Fault when the game starts</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107610">Bug 107610</a> - Dolphin emulator mis-renders shadow overlay in Super Mario Sunshine</li>
</ul>
<h2>Changes</h2>

226
docs/relnotes/18.2.1.html Normal file
View File

@@ -0,0 +1,226 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.2.1 Release Notes / September 21, 2018</h1>
<p>
Mesa 18.2.1 is a bug fix release which fixes bugs found since the 18.2.0 release.
</p>
<p>
Mesa 18.2.0 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
TBD
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103241">Bug 103241</a> - Anv crashes when using 64-bit vertex inputs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107280">Bug 107280</a> - [DXVK] Batman: Arkham City with tessellation enabled hangs on SKL GT4</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107772">Bug 107772</a> - Mesa preprocessor matches if(def)s &amp; endifs incorrectly</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107779">Bug 107779</a> - Access violation with some games</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107810">Bug 107810</a> - The 'va_end' call is missed after 'va_copy' in 'util_vsnprintf' function under windows</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107832">Bug 107832</a> - Gallium picking A16L16 formats when emulating INTENSITY16 conflicts with mesa</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107843">Bug 107843</a> - 32bit Mesa build failes with meson.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107879">Bug 107879</a> - crash happens when link program</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107891">Bug 107891</a> - [wine, regression, bisected] RAGE, Wolfenstein The New Order hangs in menu</li>
</ul>
<h2>Changes</h2>
<p>Andres Gomez (3):</p>
<ul>
<li>docs: add sha256 checksums for 18.2.0</li>
<li>Revert "Revert "glsl: skip stringification in preprocessor if in unreachable branch""</li>
<li>cherry-ignore: i965/tools: 32bit compilation with meson</li>
</ul>
<p>Andrii Simiklit (4):</p>
<ul>
<li>apple/glx/log: added missing va_end() after va_copy()</li>
<li>mesa/util: don't use the same 'va_list' instance twice</li>
<li>mesa/util: don't ignore NULL returned from 'malloc'</li>
<li>mesa/util: add missing va_end() after va_copy()</li>
</ul>
<p>Bas Nieuwenhuizen (5):</p>
<ul>
<li>radv: Support v3 of VK_EXT_vertex_attribute_divisor.</li>
<li>radv: Set the user SGPR MSB for Vega.</li>
<li>radv: Only allow 16 user SGPRs for compute on GFX9+.</li>
<li>radv: Use build ID if available for cache UUID.</li>
<li>radv: Fix driver UUID SHA1 init.</li>
</ul>
<p>Christopher Egert (1):</p>
<ul>
<li>radeon: fix ColorMask</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>virgl: don't send a shader create with no data. (v2)</li>
</ul>
<p>Dylan Baker (1):</p>
<ul>
<li>meson: Print a message about why a libdrm version was selected</li>
</ul>
<p>Eric Anholt (2):</p>
<ul>
<li>v3d: Fix SRC_ALPHA_SATURATE blending for RTs without alpha.</li>
<li>v3d: Fix setup of the VCM cache size.</li>
</ul>
<p>Erik Faye-Lund (2):</p>
<ul>
<li>winsys/virgl: avoid unintended behavior</li>
<li>virgl: adjust strides when mapping temp-resources</li>
</ul>
<p>Fritz Koenig (2):</p>
<ul>
<li>mesa: Additional FlipY applications</li>
<li>mesa: FramebufferParameteri parameter checking</li>
</ul>
<p>Gert Wollny (2):</p>
<ul>
<li>winsys/virgl: correct resource and handle allocation (v2)</li>
<li>mesa/texture: Also check for LA texture when querying intensity component size</li>
</ul>
<p>Ian Romanick (1):</p>
<ul>
<li>i965/fs: Don't propagate conditional modifiers from integer compares to adds</li>
</ul>
<p>Jason Ekstrand (11):</p>
<ul>
<li>anv/pipeline: Only consider double elements which actually exist</li>
<li>i965: Workaround the gen9 hw astc5x5 sampler bug</li>
<li>anv: Re-emit vertex buffers when the pipeline changes</li>
<li>anv: Disable the vertex cache when tessellating on SKL GT4</li>
<li>anv: Clamp scissors to the framebuffer boundary</li>
<li>vulkan: Update the XML and headers to 1.1.84</li>
<li>anv: Support v3 of VK_EXT_vertex_attribute_divisor</li>
<li>anv/query: Write both dwords in emit_zero_queries</li>
<li>nir: Add a small pass to rematerialize derefs per-block</li>
<li>nir/loop_unroll: Re-materialize derefs in use blocks before unrolling</li>
<li>nir/opt_if: Re-materialize derefs in use blocks before peeling loops</li>
</ul>
<p>Josh Pieper (1):</p>
<ul>
<li>st/mesa: Validate the result of pipe_transfer_map in make_texture (v2)</li>
</ul>
<p>Juan A. Suarez Romero (2):</p>
<ul>
<li>cherry-ignore: radv: fix descriptor pool allocation size</li>
<li>Update version to 18.2.1</li>
</ul>
<p>Kenneth Feng (1):</p>
<ul>
<li>amd: Add Picasso device id</li>
</ul>
<p>Marek Olšák (5):</p>
<ul>
<li>radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CI</li>
<li>winsys/radeon: fix CMASK fast clear for NPOT textures with mipmapping on SI/CI</li>
<li>r600: fix HTILE for NPOT textures with mipmapping</li>
<li>radeonsi: fix printing a BO list into ddebug reports</li>
<li>ac: revert new LLVM 7.0 behavior for fdiv</li>
</ul>
<p>Mathias Fröhlich (1):</p>
<ul>
<li>tnl: Fix green gun regression in xonotic.</li>
</ul>
<p>Mauro Rossi (3):</p>
<ul>
<li>android: broadcom/genxml: fix collision with intel/genxml header-gen macro</li>
<li>android: broadcom/cle: add gallium include path</li>
<li>android: broadcom/cle: export the broadcom top level path headers</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>loader/dri3: Only wait for back buffer fences in dri3_get_buffer</li>
</ul>
<p>Pierre Moreau (1):</p>
<ul>
<li>nvir: Always split 64-bit IMAD/IMUL operations</li>
</ul>
<p>Samuel Pitoiset (7):</p>
<ul>
<li>radv: fix function names for VK_EXT_conditional_rendering</li>
<li>radv: fix VK_EXT_conditional_rendering visibility</li>
<li>radv: bump the maximum number of arguments to 64</li>
<li>radv: handle loc-&gt;indirect correctly for the first descriptor</li>
<li>radv: fix GPU hangs with 32-bit indirect descriptors</li>
<li>radv: fix flushing indirect descriptors</li>
<li>radv: fix setting global locations for indirect descriptors</li>
</ul>
<p>Sergii Romantsov (3):</p>
<ul>
<li>intel: compiler option msse2 and mstackrealign</li>
<li>i965/tools: 32bit compilation with meson</li>
<li>mesa/meson: 32bit xmlconfig linkage</li>
</ul>
<p>Timothy Arceri (2):</p>
<ul>
<li>glsl: fixer lexer for unreachable defines</li>
<li>Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"</li>
</ul>
</div>
</body>
</html>

View File

@@ -243,3 +243,4 @@ CHIPSET(0x66A7, VEGA20)
CHIPSET(0x66AF, VEGA20)
CHIPSET(0x15DD, RAVEN)
CHIPSET(0x15D8, RAVEN)

View File

@@ -43,7 +43,7 @@ extern "C" {
#define VK_VERSION_MINOR(version) (((uint32_t)(version) >> 12) & 0x3ff)
#define VK_VERSION_PATCH(version) ((uint32_t)(version) & 0xfff)
// Version of this file
#define VK_HEADER_VERSION 80
#define VK_HEADER_VERSION 84
#define VK_NULL_HANDLE 0
@@ -305,6 +305,8 @@ typedef enum VkStructureType {
VK_STRUCTURE_TYPE_WIN32_KEYED_MUTEX_ACQUIRE_RELEASE_INFO_NV = 1000058000,
VK_STRUCTURE_TYPE_VALIDATION_FLAGS_EXT = 1000061000,
VK_STRUCTURE_TYPE_VI_SURFACE_CREATE_INFO_NN = 1000062000,
VK_STRUCTURE_TYPE_IMAGE_VIEW_ASTC_DECODE_MODE_EXT = 1000067000,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_ASTC_DECODE_FEATURES_EXT = 1000067001,
VK_STRUCTURE_TYPE_IMPORT_MEMORY_WIN32_HANDLE_INFO_KHR = 1000073000,
VK_STRUCTURE_TYPE_EXPORT_MEMORY_WIN32_HANDLE_INFO_KHR = 1000073001,
VK_STRUCTURE_TYPE_MEMORY_WIN32_HANDLE_PROPERTIES_KHR = 1000073002,
@@ -380,6 +382,10 @@ typedef enum VkStructureType {
VK_STRUCTURE_TYPE_EXTERNAL_FORMAT_ANDROID = 1000129005,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SAMPLER_FILTER_MINMAX_PROPERTIES_EXT = 1000130000,
VK_STRUCTURE_TYPE_SAMPLER_REDUCTION_MODE_CREATE_INFO_EXT = 1000130001,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_FEATURES_EXT = 1000138000,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_PROPERTIES_EXT = 1000138001,
VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET_INLINE_UNIFORM_BLOCK_EXT = 1000138002,
VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_INLINE_UNIFORM_BLOCK_CREATE_INFO_EXT = 1000138003,
VK_STRUCTURE_TYPE_SAMPLE_LOCATIONS_INFO_EXT = 1000143000,
VK_STRUCTURE_TYPE_RENDER_PASS_SAMPLE_LOCATIONS_BEGIN_INFO_EXT = 1000143001,
VK_STRUCTURE_TYPE_PIPELINE_SAMPLE_LOCATIONS_STATE_CREATE_INFO_EXT = 1000143002,
@@ -406,6 +412,11 @@ typedef enum VkStructureType {
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_CORE_PROPERTIES_AMD = 1000185000,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_PROPERTIES_EXT = 1000190000,
VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_DIVISOR_STATE_CREATE_INFO_EXT = 1000190001,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_FEATURES_EXT = 1000190002,
VK_STRUCTURE_TYPE_CHECKPOINT_DATA_NV = 1000206000,
VK_STRUCTURE_TYPE_QUEUE_FAMILY_CHECKPOINT_PROPERTIES_NV = 1000206001,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_MEMORY_MODEL_FEATURES_KHR = 1000211000,
VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT = VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT,
VK_STRUCTURE_TYPE_RENDER_PASS_MULTIVIEW_CREATE_INFO_KHR = VK_STRUCTURE_TYPE_RENDER_PASS_MULTIVIEW_CREATE_INFO,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_PROPERTIES_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_PROPERTIES,
@@ -440,6 +451,7 @@ typedef enum VkStructureType {
VK_STRUCTURE_TYPE_EXPORT_SEMAPHORE_CREATE_INFO_KHR = VK_STRUCTURE_TYPE_EXPORT_SEMAPHORE_CREATE_INFO,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_16BIT_STORAGE_FEATURES_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_16BIT_STORAGE_FEATURES,
VK_STRUCTURE_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_CREATE_INFO_KHR = VK_STRUCTURE_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_CREATE_INFO,
VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES2_EXT = VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES_2_EXT,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_FENCE_INFO_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_FENCE_INFO,
VK_STRUCTURE_TYPE_EXTERNAL_FENCE_PROPERTIES_KHR = VK_STRUCTURE_TYPE_EXTERNAL_FENCE_PROPERTIES,
VK_STRUCTURE_TYPE_EXPORT_FENCE_CREATE_INFO_KHR = VK_STRUCTURE_TYPE_EXPORT_FENCE_CREATE_INFO,
@@ -1118,6 +1130,7 @@ typedef enum VkDescriptorType {
VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC = 8,
VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC = 9,
VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT = 10,
VK_DESCRIPTOR_TYPE_INLINE_UNIFORM_BLOCK_EXT = 1000138000,
VK_DESCRIPTOR_TYPE_BEGIN_RANGE = VK_DESCRIPTOR_TYPE_SAMPLER,
VK_DESCRIPTOR_TYPE_END_RANGE = VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT,
VK_DESCRIPTOR_TYPE_RANGE_SIZE = (VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT - VK_DESCRIPTOR_TYPE_SAMPLER + 1),
@@ -4573,7 +4586,6 @@ VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkSurfaceKHR)
#define VK_KHR_SURFACE_SPEC_VERSION 25
#define VK_KHR_SURFACE_EXTENSION_NAME "VK_KHR_surface"
#define VK_COLORSPACE_SRGB_NONLINEAR_KHR VK_COLOR_SPACE_SRGB_NONLINEAR_KHR
typedef enum VkColorSpaceKHR {
@@ -4592,6 +4604,7 @@ typedef enum VkColorSpaceKHR {
VK_COLOR_SPACE_ADOBERGB_NONLINEAR_EXT = 1000104012,
VK_COLOR_SPACE_PASS_THROUGH_EXT = 1000104013,
VK_COLOR_SPACE_EXTENDED_SRGB_NONLINEAR_EXT = 1000104014,
VK_COLORSPACE_SRGB_NONLINEAR_KHR = VK_COLOR_SPACE_SRGB_NONLINEAR_KHR,
VK_COLOR_SPACE_BEGIN_RANGE_KHR = VK_COLOR_SPACE_SRGB_NONLINEAR_KHR,
VK_COLOR_SPACE_END_RANGE_KHR = VK_COLOR_SPACE_SRGB_NONLINEAR_KHR,
VK_COLOR_SPACE_RANGE_SIZE_KHR = (VK_COLOR_SPACE_SRGB_NONLINEAR_KHR - VK_COLOR_SPACE_SRGB_NONLINEAR_KHR + 1),
@@ -5979,13 +5992,24 @@ typedef struct VkPhysicalDevice8BitStorageFeaturesKHR {
#define VK_KHR_vulkan_memory_model 1
#define VK_KHR_VULKAN_MEMORY_MODEL_SPEC_VERSION 2
#define VK_KHR_VULKAN_MEMORY_MODEL_EXTENSION_NAME "VK_KHR_vulkan_memory_model"
typedef struct VkPhysicalDeviceVulkanMemoryModelFeaturesKHR {
VkStructureType sType;
void* pNext;
VkBool32 vulkanMemoryModel;
VkBool32 vulkanMemoryModelDeviceScope;
} VkPhysicalDeviceVulkanMemoryModelFeaturesKHR;
#define VK_EXT_debug_report 1
VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDebugReportCallbackEXT)
#define VK_EXT_DEBUG_REPORT_SPEC_VERSION 9
#define VK_EXT_DEBUG_REPORT_EXTENSION_NAME "VK_EXT_debug_report"
#define VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT
#define VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_EXT VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT_EXT
typedef enum VkDebugReportObjectTypeEXT {
@@ -6025,6 +6049,8 @@ typedef enum VkDebugReportObjectTypeEXT {
VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT_EXT = 33,
VK_DEBUG_REPORT_OBJECT_TYPE_SAMPLER_YCBCR_CONVERSION_EXT = 1000156000,
VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_EXT = 1000085000,
VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT_EXT,
VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT_EXT,
VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_KHR_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_EXT,
VK_DEBUG_REPORT_OBJECT_TYPE_SAMPLER_YCBCR_CONVERSION_KHR_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_SAMPLER_YCBCR_CONVERSION_EXT,
VK_DEBUG_REPORT_OBJECT_TYPE_BEGIN_RANGE_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_UNKNOWN_EXT,
@@ -6411,10 +6437,10 @@ typedef enum VkValidationCheckEXT {
} VkValidationCheckEXT;
typedef struct VkValidationFlagsEXT {
VkStructureType sType;
const void* pNext;
uint32_t disabledValidationCheckCount;
VkValidationCheckEXT* pDisabledValidationChecks;
VkStructureType sType;
const void* pNext;
uint32_t disabledValidationCheckCount;
const VkValidationCheckEXT* pDisabledValidationChecks;
} VkValidationFlagsEXT;
@@ -6429,6 +6455,24 @@ typedef struct VkValidationFlagsEXT {
#define VK_EXT_SHADER_SUBGROUP_VOTE_EXTENSION_NAME "VK_EXT_shader_subgroup_vote"
#define VK_EXT_astc_decode_mode 1
#define VK_EXT_ASTC_DECODE_MODE_SPEC_VERSION 1
#define VK_EXT_ASTC_DECODE_MODE_EXTENSION_NAME "VK_EXT_astc_decode_mode"
typedef struct VkImageViewASTCDecodeModeEXT {
VkStructureType sType;
const void* pNext;
VkFormat decodeMode;
} VkImageViewASTCDecodeModeEXT;
typedef struct VkPhysicalDeviceASTCDecodeFeaturesEXT {
VkStructureType sType;
void* pNext;
VkBool32 decodeModeSharedExponent;
} VkPhysicalDeviceASTCDecodeFeaturesEXT;
#define VK_EXT_conditional_rendering 1
#define VK_EXT_CONDITIONAL_RENDERING_SPEC_VERSION 1
#define VK_EXT_CONDITIONAL_RENDERING_EXTENSION_NAME "VK_EXT_conditional_rendering"
@@ -6744,7 +6788,6 @@ VKAPI_ATTR VkResult VKAPI_CALL vkReleaseDisplayEXT(
#define VK_EXT_display_surface_counter 1
#define VK_EXT_DISPLAY_SURFACE_COUNTER_SPEC_VERSION 1
#define VK_EXT_DISPLAY_SURFACE_COUNTER_EXTENSION_NAME "VK_EXT_display_surface_counter"
#define VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES2_EXT VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES_2_EXT
typedef enum VkSurfaceCounterFlagBitsEXT {
@@ -7298,6 +7341,42 @@ typedef struct VkPhysicalDeviceSamplerFilterMinmaxPropertiesEXT {
#define VK_AMD_SHADER_FRAGMENT_MASK_EXTENSION_NAME "VK_AMD_shader_fragment_mask"
#define VK_EXT_inline_uniform_block 1
#define VK_EXT_INLINE_UNIFORM_BLOCK_SPEC_VERSION 1
#define VK_EXT_INLINE_UNIFORM_BLOCK_EXTENSION_NAME "VK_EXT_inline_uniform_block"
typedef struct VkPhysicalDeviceInlineUniformBlockFeaturesEXT {
VkStructureType sType;
void* pNext;
VkBool32 inlineUniformBlock;
VkBool32 descriptorBindingInlineUniformBlockUpdateAfterBind;
} VkPhysicalDeviceInlineUniformBlockFeaturesEXT;
typedef struct VkPhysicalDeviceInlineUniformBlockPropertiesEXT {
VkStructureType sType;
void* pNext;
uint32_t maxInlineUniformBlockSize;
uint32_t maxPerStageDescriptorInlineUniformBlocks;
uint32_t maxPerStageDescriptorUpdateAfterBindInlineUniformBlocks;
uint32_t maxDescriptorSetInlineUniformBlocks;
uint32_t maxDescriptorSetUpdateAfterBindInlineUniformBlocks;
} VkPhysicalDeviceInlineUniformBlockPropertiesEXT;
typedef struct VkWriteDescriptorSetInlineUniformBlockEXT {
VkStructureType sType;
const void* pNext;
uint32_t dataSize;
const void* pData;
} VkWriteDescriptorSetInlineUniformBlockEXT;
typedef struct VkDescriptorPoolInlineUniformBlockCreateInfoEXT {
VkStructureType sType;
const void* pNext;
uint32_t maxInlineUniformBlockBindings;
} VkDescriptorPoolInlineUniformBlockCreateInfoEXT;
#define VK_EXT_shader_stencil_export 1
#define VK_EXT_SHADER_STENCIL_EXPORT_SPEC_VERSION 1
#define VK_EXT_SHADER_STENCIL_EXPORT_EXTENSION_NAME "VK_EXT_shader_stencil_export"
@@ -7481,7 +7560,6 @@ VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkValidationCacheEXT)
#define VK_EXT_VALIDATION_CACHE_SPEC_VERSION 1
#define VK_EXT_VALIDATION_CACHE_EXTENSION_NAME "VK_EXT_validation_cache"
#define VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT_EXT
typedef enum VkValidationCacheHeaderVersionEXT {
@@ -7732,7 +7810,7 @@ typedef struct VkPhysicalDeviceShaderCorePropertiesAMD {
#define VK_EXT_vertex_attribute_divisor 1
#define VK_EXT_VERTEX_ATTRIBUTE_DIVISOR_SPEC_VERSION 1
#define VK_EXT_VERTEX_ATTRIBUTE_DIVISOR_SPEC_VERSION 3
#define VK_EXT_VERTEX_ATTRIBUTE_DIVISOR_EXTENSION_NAME "VK_EXT_vertex_attribute_divisor"
typedef struct VkPhysicalDeviceVertexAttributeDivisorPropertiesEXT {
@@ -7753,6 +7831,13 @@ typedef struct VkPipelineVertexInputDivisorStateCreateInfoEXT {
const VkVertexInputBindingDivisorDescriptionEXT* pVertexBindingDivisors;
} VkPipelineVertexInputDivisorStateCreateInfoEXT;
typedef struct VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT {
VkStructureType sType;
void* pNext;
VkBool32 vertexAttributeInstanceRateDivisor;
VkBool32 vertexAttributeInstanceRateZeroDivisor;
} VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT;
#define VK_NV_shader_subgroup_partitioned 1
@@ -7760,6 +7845,38 @@ typedef struct VkPipelineVertexInputDivisorStateCreateInfoEXT {
#define VK_NV_SHADER_SUBGROUP_PARTITIONED_EXTENSION_NAME "VK_NV_shader_subgroup_partitioned"
#define VK_NV_device_diagnostic_checkpoints 1
#define VK_NV_DEVICE_DIAGNOSTIC_CHECKPOINTS_SPEC_VERSION 2
#define VK_NV_DEVICE_DIAGNOSTIC_CHECKPOINTS_EXTENSION_NAME "VK_NV_device_diagnostic_checkpoints"
typedef struct VkQueueFamilyCheckpointPropertiesNV {
VkStructureType sType;
void* pNext;
VkPipelineStageFlags checkpointExecutionStageMask;
} VkQueueFamilyCheckpointPropertiesNV;
typedef struct VkCheckpointDataNV {
VkStructureType sType;
void* pNext;
VkPipelineStageFlagBits stage;
void* pCheckpointMarker;
} VkCheckpointDataNV;
typedef void (VKAPI_PTR *PFN_vkCmdSetCheckpointNV)(VkCommandBuffer commandBuffer, const void* pCheckpointMarker);
typedef void (VKAPI_PTR *PFN_vkGetQueueCheckpointDataNV)(VkQueue queue, uint32_t* pCheckpointDataCount, VkCheckpointDataNV* pCheckpointData);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR void VKAPI_CALL vkCmdSetCheckpointNV(
VkCommandBuffer commandBuffer,
const void* pCheckpointMarker);
VKAPI_ATTR void VKAPI_CALL vkGetQueueCheckpointDataNV(
VkQueue queue,
uint32_t* pCheckpointDataCount,
VkCheckpointDataNV* pCheckpointData);
#endif
#ifdef __cplusplus
}
#endif

View File

@@ -1106,12 +1106,17 @@ endif
# Loop over the enables versions and get the highest libdrm requirement for all
# active drivers.
_drm_blame = ''
foreach d : _libdrm_checks
ver = get_variable('_drm_@0@_ver'.format(d[0]))
if d[1] and ver.version_compare('>' + _drm_ver)
_drm_ver = ver
_drm_blame = d[0]
endif
endforeach
if _drm_blame != ''
message('libdrm @0@ needed because @1@ has the highest requirement'.format(_drm_ver, _drm_blame))
endif
# Then get each libdrm module
foreach d : _libdrm_checks

View File

@@ -555,7 +555,14 @@ ac_build_fdiv(struct ac_llvm_context *ctx,
LLVMValueRef num,
LLVMValueRef den)
{
LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
/* If we do (num / den), LLVM >= 7.0 does:
* return num * v_rcp_f32(den * (fabs(den) > 0x1.0p+96f ? 0x1.0p-32f : 1.0f));
*
* If we do (num * (1 / den)), LLVM does:
* return num * v_rcp_f32(den);
*/
LLVMValueRef rcp = LLVMBuildFDiv(ctx->builder, ctx->f32_1, den, "");
LLVMValueRef ret = LLVMBuildFMul(ctx->builder, num, rcp, "");
/* Use v_rcp_f32 instead of precise division. */
if (!LLVMIsConstant(ret))

View File

@@ -1657,7 +1657,8 @@ radv_flush_indirect_descriptor_sets(struct radv_cmd_buffer *cmd_buffer,
{
struct radv_descriptor_state *descriptors_state =
radv_get_descriptors_state(cmd_buffer, bind_point);
uint32_t size = MAX_SETS * 2 * 4;
uint8_t ptr_size = HAVE_32BIT_POINTERS ? 1 : 2;
uint32_t size = MAX_SETS * 4 * ptr_size;
uint32_t offset;
void *ptr;
@@ -1666,13 +1667,14 @@ radv_flush_indirect_descriptor_sets(struct radv_cmd_buffer *cmd_buffer,
return;
for (unsigned i = 0; i < MAX_SETS; i++) {
uint32_t *uptr = ((uint32_t *)ptr) + i * 2;
uint32_t *uptr = ((uint32_t *)ptr) + i * ptr_size;
uint64_t set_va = 0;
struct radv_descriptor_set *set = descriptors_state->sets[i];
if (descriptors_state->valid & (1u << i))
set_va = set->va;
uptr[0] = set_va & 0xffffffff;
uptr[1] = set_va >> 32;
if (ptr_size == 2)
uptr[1] = set_va >> 32;
}
uint64_t va = radv_buffer_get_va(cmd_buffer->upload.upload_bo);
@@ -1714,6 +1716,8 @@ radv_flush_descriptors(struct radv_cmd_buffer *cmd_buffer,
VK_PIPELINE_BIND_POINT_GRAPHICS;
struct radv_descriptor_state *descriptors_state =
radv_get_descriptors_state(cmd_buffer, bind_point);
struct radv_cmd_state *state = &cmd_buffer->state;
bool flush_indirect_descriptors;
if (!descriptors_state->dirty)
return;
@@ -1721,10 +1725,14 @@ radv_flush_descriptors(struct radv_cmd_buffer *cmd_buffer,
if (descriptors_state->push_dirty)
radv_flush_push_descriptors(cmd_buffer, bind_point);
if ((cmd_buffer->state.pipeline && cmd_buffer->state.pipeline->need_indirect_descriptor_sets) ||
(cmd_buffer->state.compute_pipeline && cmd_buffer->state.compute_pipeline->need_indirect_descriptor_sets)) {
flush_indirect_descriptors =
(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS &&
state->pipeline && state->pipeline->need_indirect_descriptor_sets) ||
(bind_point == VK_PIPELINE_BIND_POINT_COMPUTE &&
state->compute_pipeline && state->compute_pipeline->need_indirect_descriptor_sets);
if (flush_indirect_descriptors)
radv_flush_indirect_descriptor_sets(cmd_buffer, bind_point);
}
MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws,
cmd_buffer->cs,
@@ -4443,29 +4451,37 @@ void radv_CmdSetDeviceMask(VkCommandBuffer commandBuffer,
}
/* VK_EXT_conditional_rendering */
void vkCmdBeginConditionalRenderingEXT(
void radv_CmdBeginConditionalRenderingEXT(
VkCommandBuffer commandBuffer,
const VkConditionalRenderingBeginInfoEXT* pConditionalRenderingBegin)
{
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
RADV_FROM_HANDLE(radv_buffer, buffer, pConditionalRenderingBegin->buffer);
bool inverted;
bool draw_visible = true;
uint64_t va;
va = radv_buffer_get_va(buffer->bo) + pConditionalRenderingBegin->offset;
inverted = pConditionalRenderingBegin->flags & VK_CONDITIONAL_RENDERING_INVERTED_BIT_EXT;
/* By default, if the 32-bit value at offset in buffer memory is zero,
* then the rendering commands are discarded, otherwise they are
* executed as normal. If the inverted flag is set, all commands are
* discarded if the value is non zero.
*/
if (pConditionalRenderingBegin->flags &
VK_CONDITIONAL_RENDERING_INVERTED_BIT_EXT) {
draw_visible = false;
}
/* Enable predication for this command buffer. */
si_emit_set_predication_state(cmd_buffer, inverted, va);
si_emit_set_predication_state(cmd_buffer, draw_visible, va);
cmd_buffer->state.predicating = true;
/* Store conditional rendering user info. */
cmd_buffer->state.predication_type = inverted;
cmd_buffer->state.predication_type = draw_visible;
cmd_buffer->state.predication_va = va;
}
void vkCmdEndConditionalRenderingEXT(
void radv_CmdEndConditionalRenderingEXT(
VkCommandBuffer commandBuffer)
{
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);

View File

@@ -45,22 +45,51 @@
#include "sid.h"
#include "gfx9d.h"
#include "addrlib/gfx9/chip/gfx9_enum.h"
#include "util/build_id.h"
#include "util/debug.h"
#include "util/mesa-sha1.h"
static bool
radv_get_build_id(void *ptr, struct mesa_sha1 *ctx)
{
uint32_t timestamp;
#ifdef HAVE_DL_ITERATE_PHDR
const struct build_id_note *note = NULL;
if ((note = build_id_find_nhdr_for_addr(ptr))) {
_mesa_sha1_update(ctx, build_id_data(note), build_id_length(note));
} else
#endif
if (disk_cache_get_function_timestamp(ptr, &timestamp)) {
if (!timestamp) {
fprintf(stderr, "radv: The provided filesystem timestamp for the cache is bogus!\n");
}
_mesa_sha1_update(ctx, &timestamp, sizeof(timestamp));
} else
return false;
return true;
}
static int
radv_device_get_cache_uuid(enum radeon_family family, void *uuid)
{
uint32_t mesa_timestamp, llvm_timestamp;
uint16_t f = family;
struct mesa_sha1 ctx;
unsigned char sha1[20];
unsigned ptr_size = sizeof(void*);
memset(uuid, 0, VK_UUID_SIZE);
if (!disk_cache_get_function_timestamp(radv_device_get_cache_uuid, &mesa_timestamp) ||
!disk_cache_get_function_timestamp(LLVMInitializeAMDGPUTargetInfo, &llvm_timestamp))
_mesa_sha1_init(&ctx);
if (!radv_get_build_id(radv_device_get_cache_uuid, &ctx) ||
!radv_get_build_id(LLVMInitializeAMDGPUTargetInfo, &ctx))
return -1;
memcpy(uuid, &mesa_timestamp, 4);
memcpy((char*)uuid + 4, &llvm_timestamp, 4);
memcpy((char*)uuid + 8, &f, 2);
snprintf((char*)uuid + 10, VK_UUID_SIZE - 10, "radv%zd", sizeof(void *));
_mesa_sha1_update(&ctx, &family, sizeof(family));
_mesa_sha1_update(&ctx, &ptr_size, sizeof(ptr_size));
_mesa_sha1_final(&ctx, sha1);
memcpy(uuid, sha1, VK_UUID_SIZE);
return 0;
}
@@ -821,6 +850,13 @@ void radv_GetPhysicalDeviceFeatures2(
features->inheritedConditionalRendering = false;
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_FEATURES_EXT: {
VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT *features =
(VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT *)ext;
features->vertexAttributeInstanceRateDivisor = VK_TRUE;
features->vertexAttributeInstanceRateZeroDivisor = VK_TRUE;
break;
}
default:
break;
}

View File

@@ -105,7 +105,7 @@ EXTENSIONS = [
Extension('VK_EXT_sampler_filter_minmax', 1, 'device->rad_info.chip_class >= CIK'),
Extension('VK_EXT_shader_viewport_index_layer', 1, True),
Extension('VK_EXT_shader_stencil_export', 1, True),
Extension('VK_EXT_vertex_attribute_divisor', 2, True),
Extension('VK_EXT_vertex_attribute_divisor', 3, True),
Extension('VK_AMD_draw_indirect_count', 1, True),
Extension('VK_AMD_gcn_shader', 1, True),
Extension('VK_AMD_rasterization_order', 1, 'device->has_out_of_order_rast'),

View File

@@ -422,7 +422,7 @@ get_tcs_out_current_patch_data_offset(struct radv_shader_context *ctx)
"");
}
#define MAX_ARGS 23
#define MAX_ARGS 64
struct arg_info {
LLVMTypeRef types[MAX_ARGS];
LLVMValueRef *assign[MAX_ARGS];
@@ -545,13 +545,12 @@ create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module,
static void
set_loc(struct radv_userdata_info *ud_info, uint8_t *sgpr_idx, uint8_t num_sgprs,
uint32_t indirect_offset)
set_loc(struct radv_userdata_info *ud_info, uint8_t *sgpr_idx,
uint8_t num_sgprs, bool indirect)
{
ud_info->sgpr_idx = *sgpr_idx;
ud_info->num_sgprs = num_sgprs;
ud_info->indirect = indirect_offset > 0;
ud_info->indirect_offset = indirect_offset;
ud_info->indirect = indirect;
*sgpr_idx += num_sgprs;
}
@@ -563,7 +562,7 @@ set_loc_shader(struct radv_shader_context *ctx, int idx, uint8_t *sgpr_idx,
&ctx->shader_info->user_sgprs_locs.shader_data[idx];
assert(ud_info);
set_loc(ud_info, sgpr_idx, num_sgprs, 0);
set_loc(ud_info, sgpr_idx, num_sgprs, false);
}
static void
@@ -577,15 +576,16 @@ set_loc_shader_ptr(struct radv_shader_context *ctx, int idx, uint8_t *sgpr_idx)
static void
set_loc_desc(struct radv_shader_context *ctx, int idx, uint8_t *sgpr_idx,
uint32_t indirect_offset)
bool indirect)
{
struct radv_userdata_locations *locs =
&ctx->shader_info->user_sgprs_locs;
struct radv_userdata_info *ud_info = &locs->descriptor_sets[idx];
assert(ud_info);
set_loc(ud_info, sgpr_idx, HAVE_32BIT_POINTERS ? 1 : 2, indirect_offset);
if (indirect_offset == 0)
set_loc(ud_info, sgpr_idx, HAVE_32BIT_POINTERS ? 1 : 2, indirect);
if (!indirect)
locs->descriptor_sets_enabled |= 1 << idx;
}
@@ -695,7 +695,7 @@ static void allocate_user_sgprs(struct radv_shader_context *ctx,
if (ctx->shader_info->info.loads_push_constants)
user_sgpr_count += HAVE_32BIT_POINTERS ? 1 : 2;
uint32_t available_sgprs = ctx->options->chip_class >= GFX9 ? 32 : 16;
uint32_t available_sgprs = ctx->options->chip_class >= GFX9 && stage != MESA_SHADER_COMPUTE ? 32 : 16;
uint32_t remaining_sgprs = available_sgprs - user_sgpr_count;
uint32_t num_desc_set =
util_bitcount(ctx->shader_info->info.desc_set_used_mask);
@@ -806,7 +806,7 @@ set_global_input_locs(struct radv_shader_context *ctx, gl_shader_stage stage,
for (unsigned i = 0; i < num_sets; ++i) {
if ((ctx->shader_info->info.desc_set_used_mask & (1 << i)) &&
ctx->options->layout->set[i].layout->shader_stages & stage_mask) {
set_loc_desc(ctx, i, user_sgpr_idx, 0);
set_loc_desc(ctx, i, user_sgpr_idx, false);
} else
ctx->descriptor_sets[i] = NULL;
}
@@ -817,7 +817,6 @@ set_global_input_locs(struct radv_shader_context *ctx, gl_shader_stage stage,
for (unsigned i = 0; i < num_sets; ++i) {
if ((ctx->shader_info->info.desc_set_used_mask & (1 << i)) &&
ctx->options->layout->set[i].layout->shader_stages & stage_mask) {
set_loc_desc(ctx, i, user_sgpr_idx, i * 8);
ctx->descriptor_sets[i] =
ac_build_load_to_sgpr(&ctx->ac,
desc_sets,

View File

@@ -409,6 +409,7 @@ radv_fill_shader_variant(struct radv_device *device,
variant->code_size = radv_get_shader_binary_size(binary);
variant->rsrc2 = S_00B12C_USER_SGPR(variant->info.num_user_sgprs) |
S_00B12C_USER_SGPR_MSB(variant->info.num_user_sgprs >> 5) |
S_00B12C_SCRATCH_EN(scratch_enabled);
variant->rsrc1 = S_00B848_VGPRS((variant->config.num_vgprs - 1) / 4) |

View File

@@ -192,7 +192,6 @@ struct radv_userdata_info {
int8_t sgpr_idx;
uint8_t num_sgprs;
bool indirect;
uint32_t indirect_offset;
};
struct radv_userdata_locations {

View File

@@ -29,6 +29,10 @@ LOCAL_SRC_FILES := $(BROADCOM_DECODER_FILES)
LOCAL_STATIC_LIBRARIES := libmesa_broadcom_genxml
LOCAL_C_INCLUDES += $(MESA_TOP)/src/gallium/include
LOCAL_EXPORT_C_INCLUDE_DIRS := $(LOCAL_PATH)
LOCAL_SHARED_LIBRARIES := libexpat libz
include $(MESA_COMMON_MK)

View File

@@ -39,7 +39,7 @@ $(intermediates)/dummy.c:
# This is the list of auto-generated files headers
LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/broadcom/, $(BROADCOM_GENXML_GENERATED_FILES))
define header-gen
define pack-header-gen
@mkdir -p $(dir $@)
@echo "Gen Header: $(PRIVATE_MODULE) <= $(notdir $(@))"
$(hide) $(PRIVATE_SCRIPT) $(PRIVATE_SCRIPT_FLAGS) $(PRIVATE_XML) $(PRIVATE_VER) > $@
@@ -49,25 +49,25 @@ $(intermediates)/broadcom/cle/v3d_packet_v21_pack.h: PRIVATE_SCRIPT := $(MESA_PY
$(intermediates)/broadcom/cle/v3d_packet_v21_pack.h: PRIVATE_XML := $(LOCAL_PATH)/cle/v3d_packet_v21.xml
$(intermediates)/broadcom/cle/v3d_packet_v21_pack.h: PRIVATE_VER := 21
$(intermediates)/broadcom/cle/v3d_packet_v21_pack.h: $(LOCAL_PATH)/cle/v3d_packet_v21.xml $(LOCAL_PATH)/cle/gen_pack_header.py
$(call header-gen)
$(call pack-header-gen)
$(intermediates)/broadcom/cle/v3d_packet_v33_pack.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/cle/gen_pack_header.py
$(intermediates)/broadcom/cle/v3d_packet_v33_pack.h: PRIVATE_XML := $(LOCAL_PATH)/cle/v3d_packet_v33.xml
$(intermediates)/broadcom/cle/v3d_packet_v33_pack.h: PRIVATE_VER := 33
$(intermediates)/broadcom/cle/v3d_packet_v33_pack.h: $(LOCAL_PATH)/cle/v3d_packet_v33.xml $(LOCAL_PATH)/cle/gen_pack_header.py
$(call header-gen)
$(call pack-header-gen)
$(intermediates)/broadcom/cle/v3d_packet_v41_pack.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/cle/gen_pack_header.py
$(intermediates)/broadcom/cle/v3d_packet_v41_pack.h: PRIVATE_XML := $(LOCAL_PATH)/cle/v3d_packet_v33.xml
$(intermediates)/broadcom/cle/v3d_packet_v41_pack.h: PRIVATE_VER := 41
$(intermediates)/broadcom/cle/v3d_packet_v41_pack.h: $(LOCAL_PATH)/cle/v3d_packet_v33.xml $(LOCAL_PATH)/cle/gen_pack_header.py
$(call header-gen)
$(call pack-header-gen)
$(intermediates)/broadcom/cle/v3d_packet_v42_pack.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/cle/gen_pack_header.py
$(intermediates)/broadcom/cle/v3d_packet_v42_pack.h: PRIVATE_XML := $(LOCAL_PATH)/cle/v3d_packet_v33.xml
$(intermediates)/broadcom/cle/v3d_packet_v42_pack.h: PRIVATE_VER := 42
$(intermediates)/broadcom/cle/v3d_packet_v42_pack.h: $(LOCAL_PATH)/cle/v3d_packet_v33.xml $(LOCAL_PATH)/cle/gen_pack_header.py
$(call header-gen)
$(call pack-header-gen)
$(intermediates)/broadcom/cle/v3d_xml.h: $(addprefix $(MESA_TOP)/src/broadcom/,$(BROADCOM_GENXML_XML_FILES)) $(MESA_TOP)/src/intel/genxml/gen_zipped_file.py
@mkdir -p $(dir $@)

View File

@@ -774,7 +774,8 @@ uint64_t *v3d_compile_vs(const struct v3d_compiler *compiler,
int sector_size = 16 * sizeof(uint32_t) * 8;
int vpm_size_in_sectors = c->devinfo->vpm_size / sector_size;
int half_vpm = vpm_size_in_sectors / 2;
int vpm_output_batches = half_vpm - prog_data->vpm_input_size;
int vpm_output_sectors = half_vpm - prog_data->vpm_input_size;
int vpm_output_batches = vpm_output_sectors / prog_data->vpm_output_size;
assert(vpm_output_batches >= 2);
prog_data->vcm_cache_size = CLAMP(vpm_output_batches - 1, 2, 4);

View File

@@ -289,6 +289,7 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
* token. */
if (parser->first_non_space_token_this_line) {
BEGIN HASH;
yyextra->in_define = false;
}
RETURN_TOKEN_NEVER_SKIP (HASH_TOKEN);
@@ -336,43 +337,55 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
/* For the pre-processor directives, we return these tokens
* even when we are otherwise skipping. */
<HASH>ifdef {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (IFDEF);
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (IFDEF);
}
}
<HASH>ifndef {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (IFNDEF);
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (IFNDEF);
}
}
<HASH>if/[^_a-zA-Z0-9] {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (IF);
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (IF);
}
}
<HASH>elif/[^_a-zA-Z0-9] {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (ELIF);
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (ELIF);
}
}
<HASH>else {
BEGIN INITIAL;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (ELSE);
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (ELSE);
}
}
<HASH>endif {
BEGIN INITIAL;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (ENDIF);
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (ENDIF);
}
}
<HASH>error[^\r\n]* {
@@ -399,7 +412,8 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
* and not whitespace). This will generate an error.
*/
<HASH>define{HSPACE}* {
if (! parser->skipping) {
yyextra->in_define = true;
if (!parser->skipping) {
BEGIN DEFINE;
yyextra->space_tokens = 0;
RETURN_TOKEN (DEFINE_TOKEN);

View File

@@ -197,6 +197,7 @@ struct glcpp_parser {
int first_non_space_token_this_line;
int newline_as_space;
int in_control_line;
bool in_define;
int paren_count;
int commented_newlines;
skip_node_t *skip_stack;

View File

@@ -2926,6 +2926,7 @@ bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
bool nir_lower_phis_to_regs_block(nir_block *block);
bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
bool nir_opt_algebraic(nir_shader *shader);
bool nir_opt_algebraic_before_ffma(nir_shader *shader);

View File

@@ -24,6 +24,7 @@
#include "nir.h"
#include "nir_builder.h"
#include "nir_deref.h"
#include "util/hash_table.h"
void
nir_deref_path_init(nir_deref_path *path,
@@ -270,3 +271,135 @@ nir_fixup_deref_modes(nir_shader *shader)
}
}
}
struct rematerialize_deref_state {
bool progress;
nir_builder builder;
nir_block *block;
struct hash_table *cache;
};
static nir_deref_instr *
rematerialize_deref_in_block(nir_deref_instr *deref,
struct rematerialize_deref_state *state)
{
if (deref->instr.block == state->block)
return deref;
if (!state->cache) {
state->cache = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
_mesa_key_pointer_equal);
}
struct hash_entry *cached = _mesa_hash_table_search(state->cache, deref);
if (cached)
return cached->data;
nir_builder *b = &state->builder;
nir_deref_instr *new_deref =
nir_deref_instr_create(b->shader, deref->deref_type);
new_deref->mode = deref->mode;
new_deref->type = deref->type;
if (deref->deref_type == nir_deref_type_var) {
new_deref->var = deref->var;
} else {
nir_deref_instr *parent = nir_src_as_deref(deref->parent);
if (parent) {
parent = rematerialize_deref_in_block(parent, state);
new_deref->parent = nir_src_for_ssa(&parent->dest.ssa);
} else {
nir_src_copy(&new_deref->parent, &deref->parent, new_deref);
}
}
switch (deref->deref_type) {
case nir_deref_type_var:
case nir_deref_type_array_wildcard:
case nir_deref_type_cast:
/* Nothing more to do */
break;
case nir_deref_type_array:
assert(!nir_src_as_deref(deref->arr.index));
nir_src_copy(&new_deref->arr.index, &deref->arr.index, new_deref);
break;
case nir_deref_type_struct:
new_deref->strct.index = deref->strct.index;
break;
default:
unreachable("Invalid deref instruction type");
}
nir_ssa_dest_init(&new_deref->instr, &new_deref->dest,
deref->dest.ssa.num_components,
deref->dest.ssa.bit_size,
deref->dest.ssa.name);
nir_builder_instr_insert(b, &new_deref->instr);
return new_deref;
}
static bool
rematerialize_deref_src(nir_src *src, void *_state)
{
struct rematerialize_deref_state *state = _state;
nir_deref_instr *deref = nir_src_as_deref(*src);
if (!deref)
return true;
nir_deref_instr *block_deref = rematerialize_deref_in_block(deref, state);
if (block_deref != deref) {
nir_instr_rewrite_src(src->parent_instr, src,
nir_src_for_ssa(&block_deref->dest.ssa));
nir_deref_instr_remove_if_unused(deref);
state->progress = true;
}
return true;
}
/** Re-materialize derefs in every block
*
* This pass re-materializes deref instructions in every block in which it is
* used. After this pass has been run, every use of a deref will be of a
* deref in the same block as the use. Also, all unused derefs will be
* deleted as a side-effect.
*/
bool
nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl)
{
struct rematerialize_deref_state state = { 0 };
nir_builder_init(&state.builder, impl);
nir_foreach_block(block, impl) {
state.block = block;
/* Start each block with a fresh cache */
if (state.cache)
_mesa_hash_table_clear(state.cache, NULL);
nir_foreach_instr_safe(instr, block) {
if (instr->type == nir_instr_type_deref) {
nir_deref_instr_remove_if_unused(nir_instr_as_deref(instr));
continue;
}
state.builder.cursor = nir_before_instr(instr);
nir_foreach_src(instr, rematerialize_deref_src, &state);
}
#ifndef NDEBUG
nir_if *following_if = nir_block_get_following_if(block);
if (following_if)
assert(!nir_src_as_deref(following_if->condition));
#endif
}
_mesa_hash_table_destroy(state.cache, NULL);
return state.progress;
}

View File

@@ -180,6 +180,13 @@ opt_peel_loop_initial_if(nir_loop *loop)
}
}
/* We're about to re-arrange a bunch of blocks so make sure that we don't
* have deref uses which cross block boundaries. We don't want a deref
* accidentally ending up in a phi.
*/
nir_rematerialize_derefs_in_use_blocks_impl(
nir_cf_node_get_function(&loop->cf_node));
/* Before we do anything, convert the loop to LCSSA. We're about to
* replace a bunch of SSA defs with registers and this will prevent any of
* it from leaking outside the loop.
@@ -423,12 +430,6 @@ nir_opt_if(nir_shader *shader)
*/
nir_lower_regs_to_ssa_impl(function->impl);
/* Calling nir_convert_loop_to_lcssa() in opt_peel_loop_initial_if()
* adds extra phi nodes which may not be valid if they're used for
* something such as a deref. Remove any unneeded phis.
*/
nir_opt_remove_phis_impl(function->impl);
progress = true;
}
}

View File

@@ -49,6 +49,9 @@
static void
loop_prepare_for_unroll(nir_loop *loop)
{
nir_rematerialize_derefs_in_use_blocks_impl(
nir_cf_node_get_function(&loop->cf_node));
nir_convert_loop_to_lcssa(loop);
/* Lower phis at the top level of the loop body */

View File

@@ -408,14 +408,6 @@ threaded_transfer(struct pipe_transfer *transfer)
return (struct threaded_transfer*)transfer;
}
static inline struct pipe_context *
threaded_context_unwrap_unsync(struct pipe_context *pipe)
{
if (!pipe || !pipe->priv)
return pipe;
return (struct pipe_context*)pipe->priv;
}
static inline void
tc_unflushed_batch_token_reference(struct tc_unflushed_batch_token **dst,
struct tc_unflushed_batch_token *src)

View File

@@ -3855,7 +3855,7 @@ Program::optimizeSSA(int level)
RUN_PASS(2, AlgebraicOpt, run);
RUN_PASS(2, ModifierFolding, run); // before load propagation -> less checks
RUN_PASS(1, ConstantFolding, foldAll);
RUN_PASS(1, Split64BitOpPreRA, run);
RUN_PASS(0, Split64BitOpPreRA, run);
RUN_PASS(2, LateAlgebraicOpt, run);
RUN_PASS(1, LoadPropagation, run);
RUN_PASS(1, IndirectPropagation, run);

View File

@@ -774,8 +774,8 @@ static void r600_texture_get_htile_size(struct r600_common_screen *rscreen,
return;
}
width = align(rtex->resource.b.b.width0, cl_width * 8);
height = align(rtex->resource.b.b.height0, cl_height * 8);
width = align(rtex->surface.u.legacy.level[0].nblk_x, cl_width * 8);
height = align(rtex->surface.u.legacy.level[0].nblk_y, cl_height * 8);
slice_elements = (width * height) / (8 * 8);
slice_bytes = slice_elements * 4;

View File

@@ -291,8 +291,12 @@ static boolean si_fence_finish(struct pipe_screen *screen,
{
struct radeon_winsys *rws = ((struct si_screen*)screen)->ws;
struct si_multi_fence *rfence = (struct si_multi_fence *)fence;
struct si_context *sctx;
int64_t abs_timeout = os_time_get_absolute_timeout(timeout);
ctx = threaded_context_unwrap_sync(ctx);
sctx = (struct si_context*)(ctx ? ctx : NULL);
if (!util_queue_fence_is_signalled(&rfence->ready)) {
if (rfence->tc_token) {
/* Ensure that si_flush_from_st will be called for
@@ -345,49 +349,43 @@ static boolean si_fence_finish(struct pipe_screen *screen,
}
/* Flush the gfx IB if it hasn't been flushed yet. */
if (ctx && rfence->gfx_unflushed.ctx) {
struct si_context *sctx;
if (sctx && rfence->gfx_unflushed.ctx == sctx &&
rfence->gfx_unflushed.ib_index == sctx->num_gfx_cs_flushes) {
/* Section 4.1.2 (Signaling) of the OpenGL 4.6 (Core profile)
* spec says:
*
* "If the sync object being blocked upon will not be
* signaled in finite time (for example, by an associated
* fence command issued previously, but not yet flushed to
* the graphics pipeline), then ClientWaitSync may hang
* forever. To help prevent this behavior, if
* ClientWaitSync is called and all of the following are
* true:
*
* * the SYNC_FLUSH_COMMANDS_BIT bit is set in flags,
* * sync is unsignaled when ClientWaitSync is called,
* * and the calls to ClientWaitSync and FenceSync were
* issued from the same context,
*
* then the GL will behave as if the equivalent of Flush
* were inserted immediately after the creation of sync."
*
* This means we need to flush for such fences even when we're
* not going to wait.
*/
si_flush_gfx_cs(sctx,
(timeout ? 0 : PIPE_FLUSH_ASYNC) |
RADEON_FLUSH_START_NEXT_GFX_IB_NOW,
NULL);
rfence->gfx_unflushed.ctx = NULL;
sctx = (struct si_context *)threaded_context_unwrap_unsync(ctx);
if (rfence->gfx_unflushed.ctx == sctx &&
rfence->gfx_unflushed.ib_index == sctx->num_gfx_cs_flushes) {
/* Section 4.1.2 (Signaling) of the OpenGL 4.6 (Core profile)
* spec says:
*
* "If the sync object being blocked upon will not be
* signaled in finite time (for example, by an associated
* fence command issued previously, but not yet flushed to
* the graphics pipeline), then ClientWaitSync may hang
* forever. To help prevent this behavior, if
* ClientWaitSync is called and all of the following are
* true:
*
* * the SYNC_FLUSH_COMMANDS_BIT bit is set in flags,
* * sync is unsignaled when ClientWaitSync is called,
* * and the calls to ClientWaitSync and FenceSync were
* issued from the same context,
*
* then the GL will behave as if the equivalent of Flush
* were inserted immediately after the creation of sync."
*
* This means we need to flush for such fences even when we're
* not going to wait.
*/
threaded_context_unwrap_sync(ctx);
si_flush_gfx_cs(sctx,
(timeout ? 0 : PIPE_FLUSH_ASYNC) |
RADEON_FLUSH_START_NEXT_GFX_IB_NOW,
NULL);
rfence->gfx_unflushed.ctx = NULL;
if (!timeout)
return false;
if (!timeout)
return false;
/* Recompute the timeout after all that. */
if (timeout && timeout != PIPE_TIMEOUT_INFINITE) {
int64_t time = os_time_get_nano();
timeout = abs_timeout > time ? abs_timeout - time : 0;
}
/* Recompute the timeout after all that. */
if (timeout && timeout != PIPE_TIMEOUT_INFINITE) {
int64_t time = os_time_get_nano();
timeout = abs_timeout > time ? abs_timeout - time : 0;
}
}

View File

@@ -133,12 +133,13 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags,
if (ctx->current_saved_cs) {
si_trace_emit(ctx);
si_log_hw_flush(ctx);
/* Save the IB for debug contexts. */
si_save_cs(ws, cs, &ctx->current_saved_cs->gfx, true);
ctx->current_saved_cs->flushed = true;
ctx->current_saved_cs->time_flush = os_time_get_nano();
si_log_hw_flush(ctx);
}
/* Flush the CS. */
@@ -146,8 +147,6 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags,
if (fence)
ws->fence_reference(fence, ctx->last_gfx_fence);
/* This must be after cs_flush returns, since the context's API
* thread can concurrently read this value in si_fence_finish. */
ctx->num_gfx_cs_flushes++;
/* Check VM faults if needed. */

View File

@@ -931,8 +931,8 @@ static void si_texture_get_htile_size(struct si_screen *sscreen,
return;
}
width = align(tex->buffer.b.b.width0, cl_width * 8);
height = align(tex->buffer.b.b.height0, cl_height * 8);
width = align(tex->surface.u.legacy.level[0].nblk_x, cl_width * 8);
height = align(tex->surface.u.legacy.level[0].nblk_y, cl_height * 8);
slice_elements = (width * height) / (8 * 8);
slice_bytes = slice_elements * 4;

View File

@@ -585,7 +585,7 @@ v3d_get_device_info(struct v3d_screen *screen)
uint32_t minor = (ident1.value >> 0) & 0xf;
screen->devinfo.ver = major * 10 + minor;
screen->devinfo.vpm_size = (ident1.value >> 28 & 0xf) * 1024;
screen->devinfo.vpm_size = (ident1.value >> 28 & 0xf) * 8192;
switch (screen->devinfo.ver) {
case 33:

View File

@@ -69,7 +69,9 @@ v3d_factor(enum pipe_blendfactor factor, bool dst_alpha_one)
case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
return V3D_BLEND_FACTOR_INV_CONST_ALPHA;
case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
return V3D_BLEND_FACTOR_SRC_ALPHA_SATURATE;
return (dst_alpha_one ?
V3D_BLEND_FACTOR_ZERO :
V3D_BLEND_FACTOR_SRC_ALPHA_SATURATE);
default:
unreachable("Bad blend factor");
}

View File

@@ -284,7 +284,7 @@ int virgl_encode_shader_state(struct virgl_context *ctx,
while (left_bytes) {
uint32_t length, offlen;
int hdr_len = base_hdr_size + (first_pass ? strm_hdr_size : 0);
if (ctx->cbuf->cdw + hdr_len + 1 > VIRGL_MAX_CMDBUF_DWORDS)
if (ctx->cbuf->cdw + hdr_len + 1 >= VIRGL_MAX_CMDBUF_DWORDS)
ctx->base.flush(&ctx->base, NULL, 0);
thispass = (VIRGL_MAX_CMDBUF_DWORDS - ctx->cbuf->cdw - hdr_len - 1) * 4;

View File

@@ -177,6 +177,8 @@ static void *virgl_texture_transfer_map(struct pipe_context *ctx,
/* we want to do a resolve blit into the temporary */
hw_res = trans->resolve_tmp->hw_res;
offset = 0;
trans->base.stride = ((struct virgl_texture*)trans->resolve_tmp)->stride[level];
trans->base.layer_stride = trans->base.stride * nblocksy;
} else {
offset = vrend_get_tex_image_offset(vtex, level, box->z);

View File

@@ -257,8 +257,8 @@ static void si_compute_cmask(const struct radeon_info *info,
unsigned base_align = num_pipes * pipe_interleave_bytes;
unsigned width = align(config->info.width, cl_width*8);
unsigned height = align(config->info.height, cl_height*8);
unsigned width = align(surf->u.legacy.level[0].nblk_x, cl_width*8);
unsigned height = align(surf->u.legacy.level[0].nblk_y, cl_height*8);
unsigned slice_elements = (width * height) / (8*8);
/* Each element of CMASK is a nibble. */

View File

@@ -313,7 +313,7 @@ virgl_drm_winsys_resource_cache_create(struct virgl_winsys *qws,
struct virgl_hw_res *res, *curr_res;
struct list_head *curr, *next;
int64_t now;
int ret;
int ret = 0;
/* only store binds for vertex/index/const buffers */
if (bind != VIRGL_BIND_CONSTANT_BUFFER && bind != VIRGL_BIND_INDEX_BUFFER &&
@@ -617,13 +617,26 @@ static void virgl_drm_add_res(struct virgl_drm_winsys *qdws,
{
unsigned hash = res->res_handle & (sizeof(cbuf->is_handle_added)-1);
if (cbuf->cres > cbuf->nres) {
cbuf->nres += 256;
cbuf->res_bo = realloc(cbuf->res_bo, cbuf->nres * sizeof(struct virgl_hw_buf*));
if (!cbuf->res_bo) {
fprintf(stderr,"failure to add relocation %d, %d\n", cbuf->cres, cbuf->nres);
if (cbuf->cres >= cbuf->nres) {
unsigned new_nres = cbuf->nres + 256;
void *new_ptr = REALLOC(cbuf->res_bo,
cbuf->nres * sizeof(struct virgl_hw_buf*),
new_nres * sizeof(struct virgl_hw_buf*));
if (!new_ptr) {
fprintf(stderr,"failure to add relocation %d, %d\n", cbuf->cres, new_nres);
return;
}
cbuf->res_bo = new_ptr;
new_ptr = REALLOC(cbuf->res_hlist,
cbuf->nres * sizeof(uint32_t),
new_nres * sizeof(uint32_t));
if (!new_ptr) {
fprintf(stderr,"failure to add hlist relocation %d, %d\n", cbuf->cres, cbuf->nres);
return;
}
cbuf->res_hlist = new_ptr;
cbuf->nres = new_nres;
}
cbuf->res_bo[cbuf->cres] = NULL;

View File

@@ -97,6 +97,7 @@ void _apple_glx_vlog(int level, const char *file, const char *function,
fprintf(stderr, "%-9s %24s:%-4d %s(%"PRIu64"): ",
_asl_level_string(level), file, line, function, thread);
vfprintf(stderr, fmt, args2);
va_end(args2);
}
msg = asl_new(ASL_TYPE_MSG);

View File

@@ -104,7 +104,7 @@ noinst_LTLIBRARIES += $(VULKAN_PER_GEN_LIBS)
VULKAN_CFLAGS = \
$(AM_CFLAGS) \
-msse2
-msse2 -mstackrealign
VULKAN_CPPFLAGS = \
-I$(top_srcdir)/src/compiler \

View File

@@ -211,9 +211,17 @@ opt_cmod_propagation_local(const gen_device_info *devinfo, bblock_t *block)
/* A CMP with a second source of zero can match with anything. A CMP
* with a second source that is not zero can only match with an ADD
* instruction.
*
* Only apply this optimization to float-point sources. It can fail for
* integers. For inputs a = 0x80000000, b = 4, int(0x80000000) < 4, but
* int(0x80000000) - 4 overflows and results in 0x7ffffffc. that's not
* less than zero, so the flags get set differently than for (a < b).
*/
if (inst->opcode == BRW_OPCODE_CMP && !inst->src[1].is_zero()) {
progress = cmod_propagate_cmp_to_add(devinfo, block, inst) || progress;
if (brw_reg_type_is_floating_point(inst->src[0].type) &&
cmod_propagate_cmp_to_add(devinfo, block, inst))
progress = true;
continue;
}

View File

@@ -18,6 +18,7 @@
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
c_sse2_args = ['-msse2', '-mstackrealign']
inc_intel = include_directories('.')
subdir('blorp')

View File

@@ -70,7 +70,7 @@ if with_tools.contains('intel')
dependencies : [dep_dl, dep_thread],
include_directories : [inc_common, inc_intel, inc_drm_uapi],
link_with : [libintel_common, libmesa_util],
c_args : [c_vis_args, no_override_init_args],
c_args : [c_vis_args, no_override_init_args, c_sse2_args],
install_dir: get_option('libexecdir'),
install: true,
)

View File

@@ -934,6 +934,14 @@ void anv_GetPhysicalDeviceFeatures2(
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_FEATURES_EXT: {
VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT *features =
(VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT *)ext;
features->vertexAttributeInstanceRateDivisor = VK_TRUE;
features->vertexAttributeInstanceRateZeroDivisor = VK_TRUE;
break;
}
default:
anv_debug_ignored_stype(ext->sType);
break;

View File

@@ -123,7 +123,7 @@ EXTENSIONS = [
'device->has_context_priority'),
Extension('VK_EXT_shader_viewport_index_layer', 1, True),
Extension('VK_EXT_shader_stencil_export', 1, 'device->info.gen >= 9'),
Extension('VK_EXT_vertex_attribute_divisor', 2, True),
Extension('VK_EXT_vertex_attribute_divisor', 3, True),
Extension('VK_EXT_post_depth_coverage', 1, 'device->info.gen >= 9'),
]

View File

@@ -48,6 +48,7 @@ clamp_int64(int64_t x, int64_t min, int64_t max)
void
gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
uint32_t count = cmd_buffer->state.gfx.dynamic.scissor.count;
const VkRect2D *scissors = cmd_buffer->state.gfx.dynamic.scissor.scissors;
struct anv_state scissor_state =
@@ -73,8 +74,8 @@ gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer)
/* Do this math using int64_t so overflow gets clamped correctly. */
.ScissorRectangleYMin = clamp_int64(s->offset.y, 0, max),
.ScissorRectangleXMin = clamp_int64(s->offset.x, 0, max),
.ScissorRectangleYMax = clamp_int64((uint64_t) s->offset.y + s->extent.height - 1, 0, max),
.ScissorRectangleXMax = clamp_int64((uint64_t) s->offset.x + s->extent.width - 1, 0, max)
.ScissorRectangleYMax = clamp_int64((uint64_t) s->offset.y + s->extent.height - 1, 0, fb->height - 1),
.ScissorRectangleXMax = clamp_int64((uint64_t) s->offset.x + s->extent.width - 1, 0, fb->width - 1)
};
if (s->extent.width <= 0 || s->extent.height <= 0) {

View File

@@ -2493,6 +2493,8 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
uint32_t *p;
uint32_t vb_emit = cmd_buffer->state.gfx.vb_dirty & pipeline->vb_used;
if (cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_PIPELINE)
vb_emit |= pipeline->vb_used;
assert((pipeline->active_stages & VK_SHADER_STAGE_COMPUTE_BIT) == 0);
@@ -2612,7 +2614,8 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
pipeline->depth_clamp_enable);
}
if (cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_DYNAMIC_SCISSOR)
if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_DYNAMIC_SCISSOR |
ANV_CMD_DIRTY_RENDER_TARGETS))
gen7_cmd_buffer_emit_scissor(cmd_buffer);
genX(cmd_buffer_flush_dynamic_state)(cmd_buffer);

View File

@@ -91,7 +91,8 @@ emit_vertex_input(struct anv_pipeline *pipeline,
/* Pull inputs_read out of the VS prog data */
const uint64_t inputs_read = vs_prog_data->inputs_read;
const uint64_t double_inputs_read = vs_prog_data->double_inputs_read;
const uint64_t double_inputs_read =
vs_prog_data->double_inputs_read & inputs_read;
assert((inputs_read & ((1 << VERT_ATTRIB_GENERIC0) - 1)) == 0);
const uint32_t elements = inputs_read >> VERT_ATTRIB_GENERIC0;
const uint32_t elements_double = double_inputs_read >> VERT_ATTRIB_GENERIC0;
@@ -1168,7 +1169,28 @@ emit_3dstate_vs(struct anv_pipeline *pipeline)
vs.IllegalOpcodeExceptionEnable = false;
vs.SoftwareExceptionEnable = false;
vs.MaximumNumberofThreads = devinfo->max_vs_threads - 1;
vs.VertexCacheDisable = false;
if (GEN_GEN == 9 && devinfo->gt == 4 &&
anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL)) {
/* On Sky Lake GT4, we have experienced some hangs related to the VS
* cache and tessellation. It is unknown exactly what is happening
* but the Haswell docs for the "VS Reference Count Full Force Miss
* Enable" field of the "Thread Mode" register refer to a HSW bug in
* which the VUE handle reference count would overflow resulting in
* internal reference counting bugs. My (Jason's) best guess is that
* this bug cropped back up on SKL GT4 when we suddenly had more
* threads in play than any previous gen9 hardware.
*
* What we do know for sure is that setting this bit when
* tessellation shaders are in use fixes a GPU hang in Batman: Arkham
* City when playing with DXVK (https://bugs.freedesktop.org/107280).
* Disabling the vertex cache with tessellation shaders should only
* have a minor performance impact as the tessellation shaders are
* likely generating and processing far more geometry than the vertex
* stage.
*/
vs.VertexCacheDisable = true;
}
vs.VertexURBEntryReadLength = vs_prog_data->base.urb_read_length;
vs.VertexURBEntryReadOffset = 0;

View File

@@ -347,6 +347,11 @@ emit_zero_queries(struct anv_cmd_buffer *cmd_buffer,
sdi.Address.offset = slot_offset + j * sizeof(uint64_t);
sdi.ImmediateData = 0ull;
}
anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) {
sdi.Address.bo = &pool->bo;
sdi.Address.offset = slot_offset + j * sizeof(uint64_t) + 4;
sdi.ImmediateData = 0ull;
}
}
emit_query_availability(cmd_buffer, &pool->bo, slot_offset);
}

View File

@@ -102,7 +102,7 @@ foreach g : [['70', ['gen7_cmd_buffer.c']], ['75', ['gen7_cmd_buffer.c']],
inc_vulkan_wsi,
],
c_args : [
c_vis_args, no_override_init_args, '-msse2',
c_vis_args, no_override_init_args, c_sse2_args,
'-DGEN_VERSIONx10=@0@'.format(_gen),
],
dependencies : [dep_libdrm, dep_valgrind, idep_nir_headers],
@@ -146,7 +146,7 @@ anv_deps = [
anv_flags = [
c_vis_args,
no_override_init_args,
'-msse2',
c_sse2_args,
]
if with_platform_x11

View File

@@ -1819,7 +1819,9 @@ dri3_get_buffer(__DRIdrawable *driDrawable,
buffer = new_buffer;
draw->buffers[buf_id] = buffer;
}
dri3_fence_await(draw->conn, draw, buffer);
if (buffer_type == loader_dri3_buffer_back)
dri3_fence_await(draw->conn, draw, buffer);
/*
* Do we need to preserve the content of a previous buffer?

View File

@@ -49,7 +49,7 @@ ifeq ($(ARCH_X86_HAVE_SSE4_1),true)
LOCAL_WHOLE_STATIC_LIBRARIES := \
libmesa_sse41
LOCAL_CFLAGS := \
-msse4.1 \
-msse4.1 -mstackrealign \
-DUSE_SSE41
endif

View File

@@ -34,7 +34,7 @@ LOCAL_SRC_FILES += \
$(X86_SSE41_FILES)
LOCAL_CFLAGS := \
-msse4.1
-msse4.1 -mstackrealign
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \

View File

@@ -44,7 +44,7 @@ AM_CFLAGS = \
$(WNO_OVERRIDE_INIT) \
$(LIBDRM_CFLAGS) \
$(VALGRIND_CFLAGS) \
-msse2
-msse2 -mstackrealign
AM_CXXFLAGS = $(AM_CFLAGS)

View File

@@ -187,6 +187,9 @@ blorp_surf_for_miptree(struct brw_context *brw,
assert((surf->aux_usage == ISL_AUX_USAGE_NONE) ==
(surf->aux_addr.buffer == NULL));
if (!is_render_target && brw->screen->devinfo.gen == 9)
gen9_apply_single_tex_astc5x5_wa(brw, mt->format, surf->aux_usage);
/* ISL wants real levels, not offset ones. */
*level -= mt->first_level;
}
@@ -382,7 +385,8 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
enum isl_format src_isl_format =
brw_blorp_to_isl_format(brw, src_format, false);
enum isl_aux_usage src_aux_usage =
intel_miptree_texture_aux_usage(brw, src_mt, src_isl_format);
intel_miptree_texture_aux_usage(brw, src_mt, src_isl_format,
0 /* The astc5x5 WA isn't needed */);
/* We do format workarounds for some depth formats so we can't reliably
* sample with HiZ. One of these days, we should fix that.
*/

View File

@@ -168,6 +168,11 @@ enum brw_cache_id {
BRW_MAX_CACHE
};
enum gen9_astc5x5_wa_tex_type {
GEN9_ASTC5X5_WA_TEX_TYPE_ASTC5x5 = 1 << 0,
GEN9_ASTC5X5_WA_TEX_TYPE_AUX = 1 << 1,
};
enum brw_state_id {
/* brw_cache_ids must come first - see brw_program_cache.c */
BRW_STATE_URB_FENCE = BRW_MAX_CACHE,
@@ -1315,6 +1320,8 @@ struct brw_context
*/
enum isl_aux_usage draw_aux_usage[MAX_DRAW_BUFFERS];
enum gen9_astc5x5_wa_tex_type gen9_astc5x5_wa_tex_mask;
__DRIcontext *driContext;
struct intel_screen *screen;
};
@@ -1339,6 +1346,10 @@ void intel_update_renderbuffers(__DRIcontext *context,
__DRIdrawable *drawable);
void intel_prepare_render(struct brw_context *brw);
void gen9_apply_single_tex_astc5x5_wa(struct brw_context *brw,
mesa_format format,
enum isl_aux_usage aux_usage);
void brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering,
bool *draw_aux_buffer_disabled);

View File

@@ -378,6 +378,68 @@ intel_disable_rb_aux_buffer(struct brw_context *brw,
return found;
}
/** Implement the ASTC 5x5 sampler workaround
*
* Gen9 sampling hardware has a bug where an ASTC 5x5 compressed surface
* cannot live in the sampler cache at the same time as an aux compressed
* surface. In order to work around the bug we have to stall rendering with a
* CS and pixel scoreboard stall (implicit in the CS stall) and invalidate the
* texture cache whenever one of ASTC 5x5 or aux compressed may be in the
* sampler cache and we're about to render with something which samples from
* the other.
*
* In the case of a single shader which textures from both ASTC 5x5 and
* a texture which is CCS or HiZ compressed, we have to resolve the aux
* compressed texture prior to rendering. This second part is handled in
* brw_predraw_resolve_inputs() below.
*
* We have observed this issue to affect CCS and HiZ sampling but whether or
* not it also affects MCS is unknown. Because MCS has no concept of a
* resolve (and doing one would be stupid expensive), we choose to simply
* ignore the possibility and hope for the best.
*/
static void
gen9_apply_astc5x5_wa_flush(struct brw_context *brw,
enum gen9_astc5x5_wa_tex_type curr_mask)
{
assert(brw->screen->devinfo.gen == 9);
if (((brw->gen9_astc5x5_wa_tex_mask & GEN9_ASTC5X5_WA_TEX_TYPE_ASTC5x5) &&
(curr_mask & GEN9_ASTC5X5_WA_TEX_TYPE_AUX)) ||
((brw->gen9_astc5x5_wa_tex_mask & GEN9_ASTC5X5_WA_TEX_TYPE_AUX) &&
(curr_mask & GEN9_ASTC5X5_WA_TEX_TYPE_ASTC5x5))) {
brw_emit_pipe_control_flush(brw, PIPE_CONTROL_CS_STALL);
brw_emit_pipe_control_flush(brw, PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
}
brw->gen9_astc5x5_wa_tex_mask = curr_mask;
}
static enum gen9_astc5x5_wa_tex_type
gen9_astc5x5_wa_bits(mesa_format format, enum isl_aux_usage aux_usage)
{
if (aux_usage != ISL_AUX_USAGE_NONE &&
aux_usage != ISL_AUX_USAGE_MCS)
return GEN9_ASTC5X5_WA_TEX_TYPE_AUX;
if (format == MESA_FORMAT_RGBA_ASTC_5x5 ||
format == MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5)
return GEN9_ASTC5X5_WA_TEX_TYPE_ASTC5x5;
return 0;
}
/* Helper for the gen9 ASTC 5x5 workaround. This version exists for BLORP's
* use-cases where only a single texture is bound.
*/
void
gen9_apply_single_tex_astc5x5_wa(struct brw_context *brw,
mesa_format format,
enum isl_aux_usage aux_usage)
{
gen9_apply_astc5x5_wa_flush(brw, gen9_astc5x5_wa_bits(format, aux_usage));
}
static void
mark_textures_used_for_txf(BITSET_WORD *used_for_txf,
const struct gl_program *prog)
@@ -417,8 +479,30 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering,
mark_textures_used_for_txf(used_for_txf, ctx->ComputeProgram._Current);
}
/* Resolve depth buffer and render cache of each enabled texture. */
int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
enum gen9_astc5x5_wa_tex_type astc5x5_wa_bits = 0;
if (brw->screen->devinfo.gen == 9) {
/* In order to properly implement the ASTC 5x5 workaround for an
* arbitrary draw or dispatch call, we have to walk the entire list of
* textures looking for ASTC 5x5. If there is any ASTC 5x5 in this draw
* call, all aux compressed textures must be resolved and have aux
* compression disabled while sampling.
*/
for (int i = 0; i <= maxEnabledUnit; i++) {
if (!ctx->Texture.Unit[i]._Current)
continue;
tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
if (!tex_obj || !tex_obj->mt)
continue;
astc5x5_wa_bits |= gen9_astc5x5_wa_bits(tex_obj->_Format,
tex_obj->mt->aux_usage);
}
gen9_apply_astc5x5_wa_flush(brw, astc5x5_wa_bits);
}
/* Resolve depth buffer and render cache of each enabled texture. */
for (int i = 0; i <= maxEnabledUnit; i++) {
if (!ctx->Texture.Unit[i]._Current)
continue;
@@ -452,7 +536,8 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering,
intel_miptree_prepare_texture(brw, tex_obj->mt, view_format,
min_level, num_levels,
min_layer, num_layers);
min_layer, num_layers,
astc5x5_wa_bits);
/* If any programs are using it with texelFetch, we may need to also do
* a prepare with an sRGB format to ensure texelFetch works "properly".
@@ -463,7 +548,8 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering,
if (txf_format != view_format) {
intel_miptree_prepare_texture(brw, tex_obj->mt, txf_format,
min_level, num_levels,
min_layer, num_layers);
min_layer, num_layers,
astc5x5_wa_bits);
}
}
@@ -535,7 +621,8 @@ brw_predraw_resolve_framebuffer(struct brw_context *brw,
if (irb) {
intel_miptree_prepare_texture(brw, irb->mt, irb->mt->surf.format,
irb->mt_level, 1,
irb->mt_layer, irb->layer_count);
irb->mt_layer, irb->layer_count,
brw->gen9_astc5x5_wa_tex_mask);
}
}
}

View File

@@ -603,7 +603,8 @@ static void brw_update_texture_surface(struct gl_context *ctx,
view.usage |= ISL_SURF_USAGE_CUBE_BIT;
enum isl_aux_usage aux_usage =
intel_miptree_texture_aux_usage(brw, mt, format);
intel_miptree_texture_aux_usage(brw, mt, format,
brw->gen9_astc5x5_wa_tex_mask);
brw_emit_surface_state(brw, mt, mt->target, view, aux_usage,
surf_offset, surf_index,
@@ -1107,7 +1108,8 @@ update_renderbuffer_read_surfaces(struct brw_context *brw)
};
enum isl_aux_usage aux_usage =
intel_miptree_texture_aux_usage(brw, irb->mt, format);
intel_miptree_texture_aux_usage(brw, irb->mt, format,
brw->gen9_astc5x5_wa_tex_mask);
if (brw->draw_aux_usage[i] == ISL_AUX_USAGE_NONE)
aux_usage = ISL_AUX_USAGE_NONE;

View File

@@ -2542,8 +2542,19 @@ can_texture_with_ccs(struct brw_context *brw,
enum isl_aux_usage
intel_miptree_texture_aux_usage(struct brw_context *brw,
struct intel_mipmap_tree *mt,
enum isl_format view_format)
enum isl_format view_format,
enum gen9_astc5x5_wa_tex_type astc5x5_wa_bits)
{
assert(brw->screen->devinfo.gen == 9 || astc5x5_wa_bits == 0);
/* On gen9, ASTC 5x5 textures cannot live in the sampler cache along side
* CCS or HiZ compressed textures. See gen9_apply_astc5x5_wa_flush() for
* details.
*/
if ((astc5x5_wa_bits & GEN9_ASTC5X5_WA_TEX_TYPE_ASTC5x5) &&
mt->aux_usage != ISL_AUX_USAGE_MCS)
return ISL_AUX_USAGE_NONE;
switch (mt->aux_usage) {
case ISL_AUX_USAGE_HIZ:
if (intel_miptree_sample_with_hiz(brw, mt))
@@ -2601,10 +2612,12 @@ intel_miptree_prepare_texture(struct brw_context *brw,
struct intel_mipmap_tree *mt,
enum isl_format view_format,
uint32_t start_level, uint32_t num_levels,
uint32_t start_layer, uint32_t num_layers)
uint32_t start_layer, uint32_t num_layers,
enum gen9_astc5x5_wa_tex_type astc5x5_wa_bits)
{
enum isl_aux_usage aux_usage =
intel_miptree_texture_aux_usage(brw, mt, view_format);
intel_miptree_texture_aux_usage(brw, mt, view_format, astc5x5_wa_bits);
bool clear_supported = aux_usage != ISL_AUX_USAGE_NONE;
/* Clear color is specified as ints or floats and the conversion is done by

View File

@@ -621,13 +621,15 @@ intel_miptree_access_raw(struct brw_context *brw,
enum isl_aux_usage
intel_miptree_texture_aux_usage(struct brw_context *brw,
struct intel_mipmap_tree *mt,
enum isl_format view_format);
enum isl_format view_format,
enum gen9_astc5x5_wa_tex_type astc5x5_wa_bits);
void
intel_miptree_prepare_texture(struct brw_context *brw,
struct intel_mipmap_tree *mt,
enum isl_format view_format,
uint32_t start_level, uint32_t num_levels,
uint32_t start_layer, uint32_t num_layers);
uint32_t start_layer, uint32_t num_layers,
enum gen9_astc5x5_wa_tex_type astc5x5_wa_bits);
void
intel_miptree_prepare_image(struct brw_context *brw,
struct intel_mipmap_tree *mt);

View File

@@ -142,7 +142,7 @@ foreach v : ['40', '45', '50', '60', '70', '75', '80', '90', '100', '110']
['genX_blorp_exec.c', 'genX_state_upload.c', gen_xml_pack],
include_directories : [inc_common, inc_intel, inc_dri_common],
c_args : [
c_vis_args, no_override_init_args, '-msse2',
c_vis_args, no_override_init_args, c_sse2_args,
'-DGEN_VERSIONx10=@0@'.format(v),
],
dependencies : [dep_libdrm, idep_nir_headers],
@@ -183,8 +183,8 @@ libi965 = static_library(
include_directories : [
inc_common, inc_intel, inc_dri_common, inc_util, inc_drm_uapi,
],
c_args : [c_vis_args, no_override_init_args, '-msse2'],
cpp_args : [cpp_vis_args, '-msse2'],
c_args : [c_vis_args, no_override_init_args, c_sse2_args],
cpp_args : [cpp_vis_args, c_sse2_args],
link_with : [
i965_gen_libs, libintel_common, libintel_dev, libisl, libintel_compiler,
libblorp,

View File

@@ -688,10 +688,10 @@ static void r200ColorMask( struct gl_context *ctx,
if (!rrb)
return;
mask = radeonPackColor( rrb->cpp,
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 0),
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 1),
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 2),
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 3) );
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 0)*0xFF,
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 1)*0xFF,
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 2)*0xFF,
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 3)*0xFF );
if (!(r && g && b && a))

View File

@@ -503,10 +503,10 @@ static void radeonColorMask( struct gl_context *ctx,
return;
mask = radeonPackColor( rrb->cpp,
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 0),
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 1),
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 2),
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 3) );
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 0)*0xFF,
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 1)*0xFF,
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 2)*0xFF,
GET_COLORMASK_BIT(ctx->Color.ColorMask, 0, 3)*0xFF );
if ( rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK] != mask ) {
RADEON_STATECHANGE( rmesa, msk );

View File

@@ -1434,6 +1434,7 @@ framebuffer_parameteri(struct gl_context *ctx, struct gl_framebuffer *fb,
if (!ctx->Extensions.MESA_framebuffer_flip_y)
goto invalid_pname_enum;
cannot_be_winsys_fbo = true;
break;
default:
goto invalid_pname_enum;
}

View File

@@ -94,8 +94,8 @@ _mesa_GetMultisamplefv(GLenum pname, GLuint index, GLfloat * val)
ctx->Driver.GetSamplePosition(ctx, ctx->DrawBuffer, index, val);
/* winsys FBOs are upside down */
if (_mesa_is_winsys_fbo(ctx->DrawBuffer))
/* FBOs can be upside down (winsys always are)*/
if (ctx->DrawBuffer->FlipY)
val[1] = 1.0f - val[1];
return;

View File

@@ -1426,6 +1426,11 @@ get_tex_level_parameter_image(struct gl_context *ctx,
_mesa_get_format_bits(texFormat,
GL_TEXTURE_GREEN_SIZE));
}
if (*params == 0 && pname == GL_TEXTURE_INTENSITY_SIZE) {
/* Gallium may store intensity as LA */
*params = _mesa_get_format_bits(texFormat,
GL_TEXTURE_ALPHA_SIZE);
}
}
else {
*params = 0;

View File

@@ -571,7 +571,7 @@ _mesa_fetch_state(struct gl_context *ctx, const gl_state_index16 state[],
case STATE_FB_WPOS_Y_TRANSFORM:
/* A driver may negate this conditional by using ZW swizzle
* instead of XY (based on e.g. some other state). */
if (_mesa_is_user_fbo(ctx->DrawBuffer)) {
if (!ctx->DrawBuffer->FlipY) {
/* Identity (XY) followed by flipping Y upside down (ZW). */
value[0] = 1.0F;
value[1] = 0.0F;

View File

@@ -566,7 +566,11 @@ make_texture(struct st_context *st,
dest = pipe_transfer_map(pipe, pt, 0, 0,
PIPE_TRANSFER_WRITE, 0, 0,
width, height, &transfer);
if (!dest) {
pipe_resource_reference(&pt, NULL);
_mesa_unmap_pbo_source(ctx, unpack);
return NULL;
}
/* Put image into texture transfer.
* Note that the image is actually going to be upside down in
@@ -1173,6 +1177,13 @@ st_DrawPixels(struct gl_context *ctx, GLint x, GLint y,
return;
}
/* Put glDrawPixels image into a texture */
pt = make_texture(st, width, height, format, type, unpack, pixels);
if (!pt) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glDrawPixels");
return;
}
/*
* Get vertex/fragment shaders
*/
@@ -1199,13 +1210,6 @@ st_DrawPixels(struct gl_context *ctx, GLint x, GLint y,
st_upload_constants(st, &st->fp->Base);
}
/* Put glDrawPixels image into a texture */
pt = make_texture(st, width, height, format, type, unpack, pixels);
if (!pt) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glDrawPixels");
return;
}
/* create sampler view for the image */
sv[0] = st_create_texture_sampler_view(st->pipe, pt);
if (!sv[0]) {

View File

@@ -531,7 +531,7 @@ replay_init(struct copy_context *copy)
for (offset = 0, i = 0; i < copy->nr_varying; i++) {
const struct tnl_vertex_array *src = copy->varying[i].array;
const struct gl_array_attributes *srcattr = src->VertexAttrib;
struct tnl_vertex_array *dst = &copy->dstarray[i];
struct tnl_vertex_array *dst = &copy->dstarray[copy->varying[i].attr];
struct gl_vertex_buffer_binding *dstbind = &copy->varying[i].dstbinding;
struct gl_array_attributes *dstattr = &copy->varying[i].dstattribs;

View File

@@ -117,6 +117,7 @@ libxmlconfig = static_library(
'xmlconfig',
files_xmlconfig,
include_directories : inc_common,
link_with : libmesa_util,
dependencies : [dep_expat, dep_m],
c_args : [
c_msvc_compat_args, c_vis_args,

View File

@@ -81,6 +81,7 @@ util_vsnprintf(char *str, size_t size, const char *format, va_list ap)
if (ret < 0) {
ret = _vscprintf(format, ap_copy);
}
va_end(ap_copy);
return ret;
}
@@ -119,14 +120,14 @@ util_vasprintf(char **ret, const char *format, va_list ap)
/* Compute length of output string first */
va_copy(ap_copy, ap);
int r = util_vsnprintf(NULL, 0, format, ap);
int r = util_vsnprintf(NULL, 0, format, ap_copy);
va_end(ap_copy);
if (r < 0)
return -1;
*ret = (char *) malloc(r + 1);
if (!ret)
if (!*ret)
return -1;
/* Print to buffer */

View File

@@ -72,6 +72,7 @@ server.
<tag name="KDAB" author="KDAB" contact="Sean Harmer @seanharmer"/>
<tag name="ANDROID" author="Google, Inc." contact="Jesse Hall @critsec"/>
<tag name="CHROMIUM" author="Google, Inc." contact="Jesse Hall @critsec"/>
<tag name="FUCHSIA" author="Google, Inc." contact="Craig Stout @cdotstout, Jesse Hall @critsec"/>
<tag name="GOOGLE" author="Google, Inc." contact="Jesse Hall @critsec"/>
<tag name="QCOM" author="Qualcomm Technologies, Inc." contact="Maurice Ribble @mribble"/>
<tag name="LUNARG" author="LunarG, Inc." contact="Karen Ghavam @karenghavam-lunarg"/>
@@ -146,7 +147,7 @@ server.
<type category="define">// Vulkan 1.1 version number
#define <name>VK_API_VERSION_1_1</name> <type>VK_MAKE_VERSION</type>(1, 1, 0)// Patch version should always be set to 0</type>
<type category="define">// Version of this file
#define <name>VK_HEADER_VERSION</name> 80</type>
#define <name>VK_HEADER_VERSION</name> 84</type>
<type category="define">
#define <name>VK_DEFINE_HANDLE</name>(object) typedef struct object##_T* object;</type>
@@ -588,12 +589,12 @@ server.
<member><type>uint32_t</type> <name>depth</name></member>
</type>
<type category="struct" name="VkViewport">
<member><type>float</type> <name>x</name></member>
<member><type>float</type> <name>y</name></member>
<member><type>float</type> <name>width</name></member>
<member><type>float</type> <name>height</name></member>
<member><type>float</type> <name>minDepth</name></member>
<member><type>float</type> <name>maxDepth</name></member>
<member noautovalidity="true"><type>float</type> <name>x</name></member>
<member noautovalidity="true"><type>float</type> <name>y</name></member>
<member noautovalidity="true"><type>float</type> <name>width</name></member>
<member noautovalidity="true"><type>float</type> <name>height</name></member>
<member><type>float</type> <name>minDepth</name></member>
<member><type>float</type> <name>maxDepth</name></member>
</type>
<type category="struct" name="VkRect2D">
<member><type>VkOffset2D</type> <name>offset</name></member>
@@ -642,11 +643,11 @@ server.
</type>
<type category="struct" name="VkAllocationCallbacks">
<member optional="true"><type>void</type>* <name>pUserData</name></member>
<member><type>PFN_vkAllocationFunction</type> <name>pfnAllocation</name></member>
<member><type>PFN_vkReallocationFunction</type> <name>pfnReallocation</name></member>
<member><type>PFN_vkFreeFunction</type> <name>pfnFree</name></member>
<member optional="true"><type>PFN_vkInternalAllocationNotification</type> <name>pfnInternalAllocation</name></member>
<member optional="true"><type>PFN_vkInternalFreeNotification</type> <name>pfnInternalFree</name></member>
<member noautovalidity="true"><type>PFN_vkAllocationFunction</type> <name>pfnAllocation</name></member>
<member noautovalidity="true"><type>PFN_vkReallocationFunction</type> <name>pfnReallocation</name></member>
<member noautovalidity="true"><type>PFN_vkFreeFunction</type> <name>pfnFree</name></member>
<member optional="true" noautovalidity="true"><type>PFN_vkInternalAllocationNotification</type> <name>pfnInternalAllocation</name></member>
<member optional="true" noautovalidity="true"><type>PFN_vkInternalFreeNotification</type> <name>pfnInternalFree</name></member>
</type>
<type category="struct" name="VkDeviceQueueCreateInfo">
<member values="VK_STRUCTURE_TYPE_DEVICE_QUEUE_CREATE_INFO"><type>VkStructureType</type> <name>sType</name></member>
@@ -741,7 +742,7 @@ server.
<member><type>VkDeviceSize</type> <name>maxResourceSize</name><comment>max size (in bytes) of this resource type</comment></member>
</type>
<type category="struct" name="VkDescriptorBufferInfo">
<member><type>VkBuffer</type> <name>buffer</name><comment>Buffer used for this descriptor slot when the descriptor is UNIFORM_BUFFER[_DYNAMIC] or STORAGE_BUFFER[_DYNAMIC]. VK_NULL_HANDLE otherwise.</comment></member>
<member><type>VkBuffer</type> <name>buffer</name><comment>Buffer used for this descriptor slot.</comment></member>
<member><type>VkDeviceSize</type> <name>offset</name><comment>Base offset from buffer start in bytes to update in the descriptor set.</comment></member>
<member><type>VkDeviceSize</type> <name>range</name><comment>Size in bytes of the buffer resource for this descriptor update.</comment></member>
</type>
@@ -874,9 +875,9 @@ server.
<member><type>VkImageSubresourceRange</type> <name>subresourceRange</name></member>
</type>
<type category="struct" name="VkBufferCopy">
<member><type>VkDeviceSize</type> <name>srcOffset</name><comment>Specified in bytes</comment></member>
<member><type>VkDeviceSize</type> <name>dstOffset</name><comment>Specified in bytes</comment></member>
<member><type>VkDeviceSize</type> <name>size</name><comment>Specified in bytes</comment></member>
<member><type>VkDeviceSize</type> <name>srcOffset</name><comment>Specified in bytes</comment></member>
<member><type>VkDeviceSize</type> <name>dstOffset</name><comment>Specified in bytes</comment></member>
<member noautovalidity="true"><type>VkDeviceSize</type> <name>size</name><comment>Specified in bytes</comment></member>
</type>
<type category="struct" name="VkSparseMemoryBind">
<member><type>VkDeviceSize</type> <name>resourceOffset</name><comment>Specified in bytes</comment></member>
@@ -991,13 +992,13 @@ server.
<member len="descriptorSetCount">const <type>VkDescriptorSetLayout</type>* <name>pSetLayouts</name></member>
</type>
<type category="struct" name="VkSpecializationMapEntry">
<member><type>uint32_t</type> <name>constantID</name><comment>The SpecConstant ID specified in the BIL</comment></member>
<member><type>uint32_t</type> <name>offset</name><comment>Offset of the value in the data block</comment></member>
<member><type>size_t</type> <name>size</name><comment>Size in bytes of the SpecConstant</comment></member>
<member><type>uint32_t</type> <name>constantID</name><comment>The SpecConstant ID specified in the BIL</comment></member>
<member><type>uint32_t</type> <name>offset</name><comment>Offset of the value in the data block</comment></member>
<member noautovalidity="true"><type>size_t</type> <name>size</name><comment>Size in bytes of the SpecConstant</comment></member>
</type>
<type category="struct" name="VkSpecializationInfo">
<member optional="true"><type>uint32_t</type> <name>mapEntryCount</name><comment>Number of entries in the map</comment></member>
<member len="mapEntryCount" noautovalidity="true">const <type>VkSpecializationMapEntry</type>* <name>pMapEntries</name><comment>Array of map entries</comment></member>
<member len="mapEntryCount">const <type>VkSpecializationMapEntry</type>* <name>pMapEntries</name><comment>Array of map entries</comment></member>
<member optional="true"><type>size_t</type> <name>dataSize</name><comment>Size in bytes of pData</comment></member>
<member len="dataSize">const <type>void</type>* <name>pData</name><comment>Pointer to SpecConstant data</comment></member>
</type>
@@ -1518,22 +1519,22 @@ server.
<member><type>uint32_t</type> <name>layers</name></member>
</type>
<type category="struct" name="VkDrawIndirectCommand">
<member><type>uint32_t</type> <name>vertexCount</name></member>
<member><type>uint32_t</type> <name>instanceCount</name></member>
<member><type>uint32_t</type> <name>firstVertex</name></member>
<member><type>uint32_t</type> <name>firstInstance</name></member>
<member><type>uint32_t</type> <name>vertexCount</name></member>
<member><type>uint32_t</type> <name>instanceCount</name></member>
<member><type>uint32_t</type> <name>firstVertex</name></member>
<member noautovalidity="true"><type>uint32_t</type> <name>firstInstance</name></member>
</type>
<type category="struct" name="VkDrawIndexedIndirectCommand">
<member><type>uint32_t</type> <name>indexCount</name></member>
<member><type>uint32_t</type> <name>instanceCount</name></member>
<member><type>uint32_t</type> <name>firstIndex</name></member>
<member><type>int32_t</type> <name>vertexOffset</name></member>
<member><type>uint32_t</type> <name>firstInstance</name></member>
<member><type>uint32_t</type> <name>indexCount</name></member>
<member><type>uint32_t</type> <name>instanceCount</name></member>
<member><type>uint32_t</type> <name>firstIndex</name></member>
<member><type>int32_t</type> <name>vertexOffset</name></member>
<member noautovalidity="true"><type>uint32_t</type> <name>firstInstance</name></member>
</type>
<type category="struct" name="VkDispatchIndirectCommand">
<member><type>uint32_t</type> <name>x</name></member>
<member><type>uint32_t</type> <name>y</name></member>
<member><type>uint32_t</type> <name>z</name></member>
<member noautovalidity="true"><type>uint32_t</type> <name>x</name></member>
<member noautovalidity="true"><type>uint32_t</type> <name>y</name></member>
<member noautovalidity="true"><type>uint32_t</type> <name>z</name></member>
</type>
<type category="struct" name="VkSubmitInfo">
<member values="VK_STRUCTURE_TYPE_SUBMIT_INFO"><type>VkStructureType</type> <name>sType</name></member>
@@ -1562,7 +1563,7 @@ server.
</type>
<type category="struct" name="VkDisplayModeParametersKHR">
<member><type>VkExtent2D</type> <name>visibleRegion</name><comment>Visible scanout region.</comment></member>
<member><type>uint32_t</type> <name>refreshRate</name><comment>Number of times per second the display is updated.</comment></member>
<member noautovalidity="true"><type>uint32_t</type> <name>refreshRate</name><comment>Number of times per second the display is updated.</comment></member>
</type>
<type category="struct" name="VkDisplayModePropertiesKHR" returnedonly="true">
<member><type>VkDisplayModeKHR</type> <name>displayMode</name><comment>Handle of this display mode.</comment></member>
@@ -1708,7 +1709,7 @@ server.
<member values="VK_STRUCTURE_TYPE_VALIDATION_FLAGS_EXT"><type>VkStructureType</type> <name>sType</name><comment>Must be VK_STRUCTURE_TYPE_VALIDATION_FLAGS_EXT</comment></member>
<member>const <type>void</type>* <name>pNext</name></member>
<member><type>uint32_t</type> <name>disabledValidationCheckCount</name><comment>Number of validation checks to disable</comment></member>
<member len="disabledValidationCheckCount"><type>VkValidationCheckEXT</type>* <name>pDisabledValidationChecks</name><comment>Validation checks to disable</comment></member>
<member len="disabledValidationCheckCount">const <type>VkValidationCheckEXT</type>* <name>pDisabledValidationChecks</name><comment>Validation checks to disable</comment></member>
</type>
<type category="struct" name="VkPipelineRasterizationStateRasterizationOrderAMD" structextends="VkPipelineRasterizationStateCreateInfo">
<member values="VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_RASTERIZATION_ORDER_AMD"><type>VkStructureType</type> <name>sType</name></member>
@@ -1971,7 +1972,7 @@ server.
</type>
<type category="struct" name="VkRectLayerKHR">
<member><type>VkOffset2D</type> <name>offset</name><comment>upper-left corner of a rectangle that has not changed, in pixels of a presentation images</comment></member>
<member><type>VkExtent2D</type> <name>extent</name><comment>Dimensions of a rectangle that has not changed, in pixels of a presentation images</comment></member>
<member noautovalidity="true"><type>VkExtent2D</type> <name>extent</name><comment>Dimensions of a rectangle that has not changed, in pixels of a presentation images</comment></member>
<member><type>uint32_t</type> <name>layer</name><comment>Layer of a swapchain's image(s), for stereoscopic-3D images</comment></member>
</type>
<type category="struct" name="VkPhysicalDeviceVariablePointerFeatures" structextends="VkPhysicalDeviceFeatures2,VkDeviceCreateInfo">
@@ -2440,10 +2441,10 @@ server.
<member><type>float</type> <name>maxContentLightLevel</name><comment>Content maximum luminance</comment></member>
<member><type>float</type> <name>maxFrameAverageLightLevel</name></member>
</type>
<type category="struct" name="VkRefreshCycleDurationGOOGLE">
<type category="struct" name="VkRefreshCycleDurationGOOGLE" returnedonly="true">
<member><type>uint64_t</type> <name>refreshDuration</name><comment>Number of nanoseconds from the start of one refresh cycle to the next</comment></member>
</type>
<type category="struct" name="VkPastPresentationTimingGOOGLE">
<type category="struct" name="VkPastPresentationTimingGOOGLE" returnedonly="true">
<member><type>uint32_t</type> <name>presentID</name><comment>Application-provided identifier, previously given to vkQueuePresentKHR</comment></member>
<member><type>uint64_t</type> <name>desiredPresentTime</name><comment>Earliest time an image should have been presented, previously given to vkQueuePresentKHR</comment></member>
<member><type>uint64_t</type> <name>actualPresentTime</name><comment>Time the image was actually displayed</comment></member>
@@ -2795,7 +2796,7 @@ server.
<member>const <type>void</type>* <name>pNext</name></member>
<member><type>VkSamplerReductionModeEXT</type> <name>reductionMode</name></member>
</type>
<type category="struct" name="VkPhysicalDeviceBlendOperationAdvancedFeaturesEXT" structextends="VkPhysicalDeviceFeatures2">
<type category="struct" name="VkPhysicalDeviceBlendOperationAdvancedFeaturesEXT" structextends="VkPhysicalDeviceFeatures2,VkDeviceCreateInfo">
<member values="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BLEND_OPERATION_ADVANCED_FEATURES_EXT"><type>VkStructureType</type> <name>sType</name></member>
<member noautovalidity="true"><type>void</type>* <name>pNext</name></member>
<member><type>VkBool32</type> <name>advancedBlendCoherentOperations</name></member>
@@ -2817,6 +2818,32 @@ server.
<member><type>VkBool32</type> <name>dstPremultiplied</name></member>
<member><type>VkBlendOverlapEXT</type> <name>blendOverlap</name></member>
</type>
<type category="struct" name="VkPhysicalDeviceInlineUniformBlockFeaturesEXT" returnedonly="true" structextends="VkPhysicalDeviceFeatures2,VkDeviceCreateInfo">
<member values="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_FEATURES_EXT"><type>VkStructureType</type> <name>sType</name></member>
<member><type>void</type>* <name>pNext</name></member>
<member><type>VkBool32</type> <name>inlineUniformBlock</name></member>
<member><type>VkBool32</type> <name>descriptorBindingInlineUniformBlockUpdateAfterBind</name></member>
</type>
<type category="struct" name="VkPhysicalDeviceInlineUniformBlockPropertiesEXT" returnedonly="true" structextends="VkPhysicalDeviceProperties2">
<member values="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_PROPERTIES_EXT"><type>VkStructureType</type> <name>sType</name></member>
<member><type>void</type>* <name>pNext</name></member>
<member><type>uint32_t</type> <name>maxInlineUniformBlockSize</name></member>
<member><type>uint32_t</type> <name>maxPerStageDescriptorInlineUniformBlocks</name></member>
<member><type>uint32_t</type> <name>maxPerStageDescriptorUpdateAfterBindInlineUniformBlocks</name></member>
<member><type>uint32_t</type> <name>maxDescriptorSetInlineUniformBlocks</name></member>
<member><type>uint32_t</type> <name>maxDescriptorSetUpdateAfterBindInlineUniformBlocks</name></member>
</type>
<type category="struct" name="VkWriteDescriptorSetInlineUniformBlockEXT">
<member values="VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET_INLINE_UNIFORM_BLOCK_EXT"><type>VkStructureType</type> <name>sType</name></member>
<member>const <type>void</type>* <name>pNext</name></member>
<member><type>uint32_t</type> <name>dataSize</name></member>
<member len="dataSize">const <type>void</type>* <name>pData</name></member>
</type>
<type category="struct" name="VkDescriptorPoolInlineUniformBlockCreateInfoEXT" structextends="VkDescriptorPoolCreateInfo">
<member values="VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_INLINE_UNIFORM_BLOCK_CREATE_INFO_EXT"><type>VkStructureType</type> <name>sType</name></member>
<member>const <type>void</type>* <name>pNext</name></member>
<member><type>uint32_t</type> <name>maxInlineUniformBlockBindings</name></member>
</type>
<type category="struct" name="VkPipelineCoverageModulationStateCreateInfoNV" structextends="VkPipelineMultisampleStateCreateInfo">
<member values="VK_STRUCTURE_TYPE_PIPELINE_COVERAGE_MODULATION_STATE_CREATE_INFO_NV"><type>VkStructureType</type> <name>sType</name></member>
<member>const <type>void</type>* <name>pNext</name></member>
@@ -2857,7 +2884,7 @@ server.
<member><type>VkBool32</type> <name>supported</name></member>
</type>
<type category="struct" name="VkDescriptorSetLayoutSupportKHR" alias="VkDescriptorSetLayoutSupport"/>
<type category="struct" name="VkPhysicalDeviceShaderDrawParameterFeatures" structextends="VkPhysicalDeviceFeatures2">
<type category="struct" name="VkPhysicalDeviceShaderDrawParameterFeatures" structextends="VkPhysicalDeviceFeatures2,VkDeviceCreateInfo">
<member values="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_DRAW_PARAMETER_FEATURES"><type>VkStructureType</type> <name>sType</name></member>
<member noautovalidity="true"><type>void</type>* <name>pNext</name></member>
<member><type>VkBool32</type> <name>shaderDrawParameters</name></member>
@@ -3198,6 +3225,39 @@ server.
<member><type>VkBool32</type> <name>conditionalRendering</name></member>
<member><type>VkBool32</type> <name>inheritedConditionalRendering</name></member>
</type>
<type category="struct" name="VkPhysicalDeviceVulkanMemoryModelFeaturesKHR" returnedonly="true" structextends="VkPhysicalDeviceFeatures2,VkDeviceCreateInfo">
<member values="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_MEMORY_MODEL_FEATURES_KHR"><type>VkStructureType</type> <name>sType</name></member>
<member noautovalidity="true"><type>void</type>* <name>pNext</name></member>
<member><type>VkBool32</type> <name>vulkanMemoryModel</name></member>
<member><type>VkBool32</type> <name>vulkanMemoryModelDeviceScope</name></member>
</type>
<type category="struct" name="VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT" structextends="VkPhysicalDeviceFeatures2,VkDeviceCreateInfo">
<member values="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_FEATURES_EXT"><type>VkStructureType</type> <name>sType</name></member>
<member noautovalidity="true"><type>void</type>* <name>pNext</name></member>
<member><type>VkBool32</type> <name>vertexAttributeInstanceRateDivisor</name></member>
<member><type>VkBool32</type> <name>vertexAttributeInstanceRateZeroDivisor</name></member>
</type>
<type category="struct" name="VkQueueFamilyCheckpointPropertiesNV" structextends="VkQueueFamilyProperties2" returnedonly="true">
<member values="VK_STRUCTURE_TYPE_QUEUE_FAMILY_CHECKPOINT_PROPERTIES_NV"><type>VkStructureType</type> <name>sType</name></member>
<member><type>void</type>* <name>pNext</name></member>
<member><type>VkPipelineStageFlags</type> <name>checkpointExecutionStageMask</name></member>
</type>
<type category="struct" name="VkCheckpointDataNV" returnedonly="true">
<member values="VK_STRUCTURE_TYPE_CHECKPOINT_DATA_NV"><type>VkStructureType</type> <name>sType</name></member>
<member><type>void</type>* <name>pNext</name></member>
<member><type>VkPipelineStageFlagBits</type> <name>stage</name></member>
<member noautovalidity="true"><type>void</type>* <name>pCheckpointMarker</name></member>
</type>
<type category="struct" name="VkImageViewASTCDecodeModeEXT" structextends="VkImageViewCreateInfo">
<member values="VK_STRUCTURE_TYPE_IMAGE_VIEW_ASTC_DECODE_MODE_EXT"><type>VkStructureType</type> <name>sType</name></member>
<member>const <type>void</type>* <name>pNext</name></member>
<member><type>VkFormat</type> <name>decodeMode</name></member>
</type>
<type category="struct" name="VkPhysicalDeviceASTCDecodeFeaturesEXT" structextends="VkPhysicalDeviceFeatures2,VkDeviceCreateInfo">
<member values="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_ASTC_DECODE_FEATURES_EXT"><type>VkStructureType</type> <name>sType</name></member>
<member noautovalidity="true"><type>void</type>* <name>pNext</name></member>
<member><type>VkBool32</type> <name>decodeModeSharedExponent</name></member>
</type>
</types>
<comment>Vulkan enumerant (token) definitions</comment>
@@ -3725,7 +3785,7 @@ server.
<enum value="-10" name="VK_ERROR_TOO_MANY_OBJECTS" comment="Too many objects of the type have already been created"/>
<enum value="-11" name="VK_ERROR_FORMAT_NOT_SUPPORTED" comment="Requested format is not supported on this device"/>
<enum value="-12" name="VK_ERROR_FRAGMENTED_POOL" comment="A requested pool allocation has failed due to fragmentation of the pool's memory"/>
<unused start="-12"/>
<unused start="-13" comment="This is the next unused available error code (negative value)"/>
</enums>
<enums name="VkDynamicState" type="enum">
<enum value="0" name="VK_DYNAMIC_STATE_VIEWPORT"/>
@@ -3982,6 +4042,7 @@ server.
</enums>
<enums name="VkColorSpaceKHR" type="enum">
<enum value="0" name="VK_COLOR_SPACE_SRGB_NONLINEAR_KHR"/>
<enum name="VK_COLORSPACE_SRGB_NONLINEAR_KHR" alias="VK_COLOR_SPACE_SRGB_NONLINEAR_KHR" comment="Backwards-compatible alias containing a typo"/>
</enums>
<enums name="VkDisplayPlaneAlphaFlagBitsKHR" type="bitmask">
<enum bitpos="0" name="VK_DISPLAY_PLANE_ALPHA_OPAQUE_BIT_KHR"/>
@@ -4043,11 +4104,13 @@ server.
<enum value="26" name="VK_DEBUG_REPORT_OBJECT_TYPE_SURFACE_KHR_EXT"/>
<enum value="27" name="VK_DEBUG_REPORT_OBJECT_TYPE_SWAPCHAIN_KHR_EXT"/>
<enum value="28" name="VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT_EXT"/>
<enum name="VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_EXT" alias="VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT_EXT" comment="Backwards-compatible alias containing a typo"/>
<enum value="29" name="VK_DEBUG_REPORT_OBJECT_TYPE_DISPLAY_KHR_EXT"/>
<enum value="30" name="VK_DEBUG_REPORT_OBJECT_TYPE_DISPLAY_MODE_KHR_EXT"/>
<enum value="31" name="VK_DEBUG_REPORT_OBJECT_TYPE_OBJECT_TABLE_NVX_EXT"/>
<enum value="32" name="VK_DEBUG_REPORT_OBJECT_TYPE_INDIRECT_COMMANDS_LAYOUT_NVX_EXT"/>
<enum value="33" name="VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT_EXT"/>
<enum name="VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT" alias="VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT_EXT" comment="Backwards-compatible alias containing a typo"/>
</enums>
<enums name="VkRasterizationOrderAMD" type="enum">
<enum value="0" name="VK_RASTERIZATION_ORDER_STRICT_AMD"/>
@@ -6239,6 +6302,17 @@ server.
<param><type>uint32_t</type> <name>maxDrawCount</name></param>
<param><type>uint32_t</type> <name>stride</name></param>
</command>
<command queues="graphics,compute,transfer" renderpass="both" cmdbufferlevel="primary,secondary">
<proto><type>void</type> <name>vkCmdSetCheckpointNV</name></proto>
<param><type>VkCommandBuffer</type> <name>commandBuffer</name></param>
<param noautovalidity="true">const <type>void</type>* <name>pCheckpointMarker</name></param>
</command>
<command>
<proto><type>void</type> <name>vkGetQueueCheckpointDataNV</name></proto>
<param><type>VkQueue</type> <name>queue</name></param>
<param optional="false,true"><type>uint32_t</type>* <name>pCheckpointDataCount</name></param>
<param optional="true" len="pCheckpointDataCount"><type>VkCheckpointDataNV</type>* <name>pCheckpointData</name></param>
</command>
</commands>
<feature api="vulkan" name="VK_VERSION_1_0" number="1.0" comment="Vulkan core API interface definitions">
@@ -6803,7 +6877,6 @@ server.
<enum value="&quot;VK_KHR_surface&quot;" name="VK_KHR_SURFACE_EXTENSION_NAME"/>
<enum offset="0" extends="VkResult" dir="-" name="VK_ERROR_SURFACE_LOST_KHR"/>
<enum offset="1" extends="VkResult" dir="-" name="VK_ERROR_NATIVE_WINDOW_IN_USE_KHR"/>
<enum value="VK_COLOR_SPACE_SRGB_NONLINEAR_KHR" name="VK_COLORSPACE_SRGB_NONLINEAR_KHR"/>
<enum offset="0" extends="VkObjectType" name="VK_OBJECT_TYPE_SURFACE_KHR" comment="VkSurfaceKHR"/>
<command name="vkDestroySurfaceKHR"/>
<command name="vkGetPhysicalDeviceSurfaceSupportKHR"/>
@@ -6971,10 +7044,9 @@ server.
<enum value="9" name="VK_EXT_DEBUG_REPORT_SPEC_VERSION"/>
<enum value="&quot;VK_EXT_debug_report&quot;" name="VK_EXT_DEBUG_REPORT_EXTENSION_NAME"/>
<enum offset="0" extends="VkStructureType" name="VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT"/>
<enum alias="VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT" extends="VkStructureType" name="VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT" comment="Backwards-compatible alias containing a typo"/>
<enum offset="1" extends="VkResult" dir="-" name="VK_ERROR_VALIDATION_FAILED_EXT"/>
<enum value="VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT" name="VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT"/>
<enum offset="0" extends="VkObjectType" name="VK_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT" comment="VkDebugReportCallbackEXT"/>
<enum value="VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT_EXT" name="VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_EXT"/>
<type name="VkDebugReportObjectTypeEXT"/>
<type name="VkDebugReportCallbackCreateInfoEXT"/>
<command name="vkCreateDebugReportCallbackEXT"/>
@@ -6987,7 +7059,7 @@ server.
<enum extends="VkDebugReportObjectTypeEXT" extnumber="86" offset="0" name="VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_EXT"/>
</require>
</extension>
<extension name="VK_NV_glsl_shader" number="13" type="device" author="NV" contact="Piers Daniell @pdaniell-nv" supported="vulkan">
<extension name="VK_NV_glsl_shader" number="13" type="device" author="NV" contact="Piers Daniell @pdaniell-nv" supported="vulkan" deprecatedby="">
<require>
<enum value="1" name="VK_NV_GLSL_SHADER_SPEC_VERSION"/>
<enum value="&quot;VK_NV_glsl_shader&quot;" name="VK_NV_GLSL_SHADER_EXTENSION_NAME"/>
@@ -7042,13 +7114,13 @@ server.
<enum value="&quot;VK_AMD_extension_20&quot;" name="VK_AMD_EXTENSION_20_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_AMD_shader_trinary_minmax" number="21" type="device" author="AMD" contact="Qun Lin, AMD @linqun" supported="vulkan">
<extension name="VK_AMD_shader_trinary_minmax" number="21" type="device" author="AMD" contact="Qun Lin @linqun" supported="vulkan">
<require>
<enum value="1" name="VK_AMD_SHADER_TRINARY_MINMAX_SPEC_VERSION"/>
<enum value="&quot;VK_AMD_shader_trinary_minmax&quot;" name="VK_AMD_SHADER_TRINARY_MINMAX_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_AMD_shader_explicit_vertex_parameter" number="22" type="device" author="AMD" contact="Qun Lin, AMD @linqun" supported="vulkan">
<extension name="VK_AMD_shader_explicit_vertex_parameter" number="22" type="device" author="AMD" contact="Qun Lin @linqun" supported="vulkan">
<require>
<enum value="1" name="VK_AMD_SHADER_EXPLICIT_VERTEX_PARAMETER_SPEC_VERSION"/>
<enum value="&quot;VK_AMD_shader_explicit_vertex_parameter&quot;" name="VK_AMD_SHADER_EXPLICIT_VERTEX_PARAMETER_EXTENSION_NAME"/>
@@ -7252,6 +7324,7 @@ server.
<require>
<enum value="0" name="VK_NVX_EXTENSION_51_SPEC_VERSION"/>
<enum value="&quot;VK_NVX_extension_51&quot;" name="VK_NVX_EXTENSION_51_EXTENSION_NAME"/>
<enum bitpos="13" extends="VkImageCreateFlagBits" name="VK_IMAGE_CREATE_RESERVED_13_BIT_NV"/>
</require>
</extension>
<extension name="VK_NVX_extension_52" number="52" author="NVX" contact="James Jones @cubanismo" supported="disabled">
@@ -7468,10 +7541,14 @@ server.
<enum value="&quot;VK_ARM_extension_01&quot;" name="VK_ARM_EXTENSION_01_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_ARM_extension_02" number="68" type="device" author="ARM" contact="Jan-Harald Fredriksen @janharaldfredriksen-arm" supported="disabled">
<extension name="VK_EXT_astc_decode_mode" number="68" type="device" author="ARM" contact="Jan-Harald Fredriksen @janharaldfredriksen-arm" requires="VK_KHR_get_physical_device_properties2" supported="vulkan">
<require>
<enum value="0" name="VK_ARM_EXTENSION_02_SPEC_VERSION"/>
<enum value="&quot;VK_ARM_extension_02&quot;" name="VK_ARM_EXTENSION_02_EXTENSION_NAME"/>
<enum value="1" name="VK_EXT_ASTC_DECODE_MODE_SPEC_VERSION"/>
<enum value="&quot;VK_EXT_astc_decode_mode&quot;" name="VK_EXT_ASTC_DECODE_MODE_EXTENSION_NAME"/>
<enum offset="0" extends="VkStructureType" name="VK_STRUCTURE_TYPE_IMAGE_VIEW_ASTC_DECODE_MODE_EXT"/>
<enum offset="1" extends="VkStructureType" name="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_ASTC_DECODE_FEATURES_EXT"/>
<type name="VkImageViewASTCDecodeModeEXT"/>
<type name="VkPhysicalDeviceASTCDecodeFeaturesEXT"/>
</require>
</extension>
<extension name="VK_IMG_extension_69" number="69" type="device" author="IMG" contact="Tobias Hector @tobski" supported="disabled">
@@ -7812,8 +7889,8 @@ server.
<require>
<enum value="1" name="VK_EXT_DISPLAY_SURFACE_COUNTER_SPEC_VERSION"/>
<enum value="&quot;VK_EXT_display_surface_counter&quot;" name="VK_EXT_DISPLAY_SURFACE_COUNTER_EXTENSION_NAME"/>
<enum offset="0" extends="VkStructureType" name="VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES_2_EXT"/>
<enum value="VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES_2_EXT" name="VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES2_EXT"/>
<enum offset="0" extends="VkStructureType" name="VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES_2_EXT"/>
<enum alias="VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES_2_EXT" extends="VkStructureType" name="VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES2_EXT" comment="Backwards-compatible alias containing a typo"/>
<type name="VkSurfaceCounterFlagsEXT"/>
<type name="VkSurfaceCounterFlagBitsEXT"/>
<type name="VkSurfaceCapabilities2EXT"/>
@@ -8283,7 +8360,7 @@ server.
<enum value="&quot;VK_KHR_storage_buffer_storage_class&quot;" name="VK_KHR_STORAGE_BUFFER_STORAGE_CLASS_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_AMD_gpu_shader_int16" number="133" type="device" author="AMD" contact="Qun Lin, AMD @linqun" supported="vulkan">
<extension name="VK_AMD_gpu_shader_int16" number="133" type="device" author="AMD" contact="Qun Lin @linqun" supported="vulkan">
<require>
<enum value="1" name="VK_AMD_GPU_SHADER_INT16_SPEC_VERSION"/>
<enum value="&quot;VK_AMD_gpu_shader_int16&quot;" name="VK_AMD_GPU_SHADER_INT16_EXTENSION_NAME"/>
@@ -8319,10 +8396,19 @@ server.
<enum value="&quot;VK_AMD_shader_fragment_mask&quot;" name="VK_AMD_SHADER_FRAGMENT_MASK_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_AMD_extension_139" number="139" author="AMD" contact="Mais Alnasser @malnasse" supported="disabled">
<extension name="VK_EXT_inline_uniform_block" number="139" type="device" author="EXT" requires="VK_KHR_get_physical_device_properties2,VK_KHR_maintenance1" contact="Daniel Rakos @aqnuep" supported="vulkan">
<require>
<enum value="0" name="VK_AMD_EXTENSION_139_SPEC_VERSION"/>
<enum value="&quot;VK_AMD_extension_139&quot;" name="VK_AMD_EXTENSION_139_EXTENSION_NAME"/>
<enum value="1" name="VK_EXT_INLINE_UNIFORM_BLOCK_SPEC_VERSION"/>
<enum value="&quot;VK_EXT_inline_uniform_block&quot;" name="VK_EXT_INLINE_UNIFORM_BLOCK_EXTENSION_NAME"/>
<enum offset="0" extends="VkDescriptorType" name="VK_DESCRIPTOR_TYPE_INLINE_UNIFORM_BLOCK_EXT"/>
<enum offset="0" extends="VkStructureType" name="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_FEATURES_EXT"/>
<enum offset="1" extends="VkStructureType" name="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_PROPERTIES_EXT"/>
<enum offset="2" extends="VkStructureType" name="VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET_INLINE_UNIFORM_BLOCK_EXT"/>
<enum offset="3" extends="VkStructureType" name="VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_INLINE_UNIFORM_BLOCK_CREATE_INFO_EXT"/>
<type name="VkPhysicalDeviceInlineUniformBlockFeaturesEXT"/>
<type name="VkPhysicalDeviceInlineUniformBlockPropertiesEXT"/>
<type name="VkWriteDescriptorSetInlineUniformBlockEXT"/>
<type name="VkDescriptorPoolInlineUniformBlockCreateInfoEXT"/>
</require>
</extension>
<extension name="VK_AMD_extension_140" number="140" author="AMD" contact="Mais Alnasser @malnasse" supported="disabled">
@@ -8632,7 +8718,6 @@ server.
<enum offset="0" extends="VkStructureType" name="VK_STRUCTURE_TYPE_VALIDATION_CACHE_CREATE_INFO_EXT"/>
<enum offset="1" extends="VkStructureType" name="VK_STRUCTURE_TYPE_SHADER_MODULE_VALIDATION_CACHE_CREATE_INFO_EXT"/>
<enum offset="0" extends="VkObjectType" name="VK_OBJECT_TYPE_VALIDATION_CACHE_EXT" comment="VkValidationCacheEXT"/>
<enum value="VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT_EXT" name="VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT"/>
<type name="VkValidationCacheEXT"/>
<type name="VkValidationCacheCreateInfoEXT"/>
<type name="VkShaderModuleValidationCacheCreateInfoEXT"/>
@@ -8679,12 +8764,26 @@ server.
<require>
<enum value="0" name="VK_EXT_EXTENSION_165_SPEC_VERSION"/>
<enum value="&quot;VK_NV_extension_165&quot;" name="VK_EXT_EXTENSION_165_EXTENSION_NAME"/>
<enum bitpos="23" extends="VkAccessFlagBits" name="VK_ACCESS_RESERVED_23_BIT_NV"/>
<enum bitpos="8" extends="VkImageUsageFlagBits" name="VK_IMAGE_USAGE_RESERVED_8_BIT_NV"/>
<enum bitpos="22" extends="VkPipelineStageFlagBits" name="VK_PIPELINE_STAGE_RESERVED_22_BIT_NV"/>
</require>
</extension>
<extension name="VK_NV_extension_166" number="166" author="NV" contact="Daniel Koch @dgkoch" supported="disabled">
<require>
<enum value="0" name="VK_EXT_EXTENSION_166_SPEC_VERSION"/>
<enum value="&quot;VK_NV_extension_166&quot;" name="VK_EXT_EXTENSION_166_EXTENSION_NAME"/>
<enum bitpos="8" extends="VkShaderStageFlagBits" name="VK_SHADER_STAGE_RESERVED_8_BIT_NV"/>
<enum bitpos="9" extends="VkShaderStageFlagBits" name="VK_SHADER_STAGE_RESERVED_9_BIT_NV"/>
<enum bitpos="10" extends="VkShaderStageFlagBits" name="VK_SHADER_STAGE_RESERVED_10_BIT_NV"/>
<enum bitpos="11" extends="VkShaderStageFlagBits" name="VK_SHADER_STAGE_RESERVED_11_BIT_NV"/>
<enum bitpos="12" extends="VkShaderStageFlagBits" name="VK_SHADER_STAGE_RESERVED_12_BIT_NV"/>
<enum bitpos="13" extends="VkShaderStageFlagBits" name="VK_SHADER_STAGE_RESERVED_13_BIT_NV"/>
<enum bitpos="21" extends="VkPipelineStageFlagBits" name="VK_PIPELINE_STAGE_RESERVED_21_BIT_NV"/>
<enum bitpos="10" extends="VkBufferUsageFlagBits" name="VK_BUFFER_USAGE_RESERVED_10_BIT_NV"/>
<enum bitpos="21" extends="VkAccessFlagBits" name="VK_ACCESS_RESERVED_21_BIT_NV"/>
<enum bitpos="22" extends="VkAccessFlagBits" name="VK_ACCESS_RESERVED_22_BIT_NV"/>
<enum bitpos="5" extends="VkPipelineCreateFlagBits" name="VK_PIPELINE_CREATE_RESERVED_5_BIT_NV"/>
</require>
</extension>
<extension name="VK_NV_extension_167" number="167" author="NV" contact="Daniel Koch @dgkoch" supported="disabled">
@@ -8860,13 +8959,15 @@ server.
</extension>
<extension name="VK_EXT_vertex_attribute_divisor" number="191" type="device" requires="VK_KHR_get_physical_device_properties2" author="NV" contact="Vikram Kushwaha @vkushwaha" supported="vulkan">
<require>
<enum value="1" name="VK_EXT_VERTEX_ATTRIBUTE_DIVISOR_SPEC_VERSION"/>
<enum value="3" name="VK_EXT_VERTEX_ATTRIBUTE_DIVISOR_SPEC_VERSION"/>
<enum value="&quot;VK_EXT_vertex_attribute_divisor&quot;" name="VK_EXT_VERTEX_ATTRIBUTE_DIVISOR_EXTENSION_NAME"/>
<enum offset="0" extends="VkStructureType" name="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_PROPERTIES_EXT"/>
<enum offset="1" extends="VkStructureType" name="VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_DIVISOR_STATE_CREATE_INFO_EXT"/>
<enum offset="2" extends="VkStructureType" name="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_FEATURES_EXT"/>
<type name="VkPhysicalDeviceVertexAttributeDivisorPropertiesEXT"/>
<type name="VkVertexInputBindingDivisorDescriptionEXT"/>
<type name="VkPipelineVertexInputDivisorStateCreateInfoEXT"/>
<type name="VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT"/>
</require>
</extension>
<extension name="VK_GOOGLE_extension_192" number="192" author="GOOGLE" contact="Jean-Francois Roy @jfroy" supported="disabled">
@@ -8940,6 +9041,10 @@ server.
<require>
<enum value="0" name="VK_NV_EXTENSION_203_SPEC_VERSION"/>
<enum value="&quot;VK_NV_extension_203&quot;" name="VK_NV_EXTENSION_203_EXTENSION_NAME"/>
<enum bitpos="6" extends="VkShaderStageFlagBits" name="VK_SHADER_STAGE_RESERVED_6_BIT_NV"/>
<enum bitpos="7" extends="VkShaderStageFlagBits" name="VK_SHADER_STAGE_RESERVED_7_BIT_NV"/>
<enum bitpos="19" extends="VkPipelineStageFlagBits" name="VK_PIPELINE_STAGE_RESERVED_19_BIT_NV"/>
<enum bitpos="20" extends="VkPipelineStageFlagBits" name="VK_PIPELINE_STAGE_RESERVED_20_BIT_NV"/>
</require>
</extension>
<extension name="VK_NV_extension_204" number="204" author="NV" contact="Pat Brown @nvpbrown" supported="disabled">
@@ -8960,10 +9065,16 @@ server.
<enum value="&quot;VK_NV_extension_206&quot;" name="VK_NV_EXTENSION_206_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_NV_extension_207" number="207" author="NV" contact="Nuno Subtil @nsubtil" supported="disabled">
<extension name="VK_NV_device_diagnostic_checkpoints" type="device" number="207" requires="VK_KHR_get_physical_device_properties2" author="NVIDIA" contact="Nuno Subtil @nsubtil" supported="vulkan">
<require>
<enum value="0" name="VK_NV_EXTENSION_207_SPEC_VERSION"/>
<enum value="&quot;VK_NV_extension_207&quot;" name="VK_NV_EXTENSION_207_EXTENSION_NAME"/>
<enum value="2" name="VK_NV_DEVICE_DIAGNOSTIC_CHECKPOINTS_SPEC_VERSION"/>
<enum value="&quot;VK_NV_device_diagnostic_checkpoints&quot;" name="VK_NV_DEVICE_DIAGNOSTIC_CHECKPOINTS_EXTENSION_NAME"/>
<enum offset="0" extends="VkStructureType" name="VK_STRUCTURE_TYPE_CHECKPOINT_DATA_NV"/>
<enum offset="1" extends="VkStructureType" name="VK_STRUCTURE_TYPE_QUEUE_FAMILY_CHECKPOINT_PROPERTIES_NV"/>
<type name="VkQueueFamilyCheckpointPropertiesNV"/>
<type name="VkCheckpointDataNV"/>
<command name="vkCmdSetCheckpointNV"/>
<command name="vkGetQueueCheckpointDataNV"/>
</require>
</extension>
<extension name="VK_KHR_extension_208" number="208" type="device" author="KHR" contact="Daniel Rakos @drakos-arm" supported="disabled">
@@ -8990,10 +9101,12 @@ server.
<enum value="&quot;VK_KHR_extension_211&quot;" name="VK_KHR_EXTENSION_211_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_KHR_extension_212" number="212" type="device" author="KHR" contact="Jeff Bolz @jeffbolznv" supported="disabled">
<extension name="VK_KHR_vulkan_memory_model" number="212" type="device" author="KHR" contact="Jeff Bolz @jeffbolznv" provisional="true" supported="vulkan">
<require>
<enum value="0" name="VK_KHR_EXTENSION_212_SPEC_VERSION"/>
<enum value="&quot;VK_KHR_extension_212&quot;" name="VK_KHR_EXTENSION_212_EXTENSION_NAME"/>
<enum value="2" name="VK_KHR_VULKAN_MEMORY_MODEL_SPEC_VERSION"/>
<enum value="&quot;VK_KHR_vulkan_memory_model&quot;" name="VK_KHR_VULKAN_MEMORY_MODEL_EXTENSION_NAME"/>
<enum offset="0" extends="VkStructureType" name="VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_MEMORY_MODEL_FEATURES_KHR"/>
<type name="VkPhysicalDeviceVulkanMemoryModelFeaturesKHR"/>
</require>
</extension>
<extension name="VK_AMD_extension_213" number="213" author="AMD" contact="Neil Henning @sheredom" supported="disabled">
@@ -9008,5 +9121,46 @@ server.
<enum value="&quot;VK_KHR_extension_214&quot;" name="VK_KHR_EXTENSION_214_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_GOOGLE_extension_215" number="215" author="GOOGLE" contact="Jesse Hall @critsec" supported="disabled">
<require>
<enum value="0" name="VK_KHR_EXTENSION_215_SPEC_VERSION"/>
<enum value="&quot;VK_KHR_extension_215&quot;" name="VK_KHR_EXTENSION_215_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_GOOGLE_extension_216" number="216" author="GOOGLE" contact="Jesse Hall @critsec" supported="disabled">
<require>
<enum value="0" name="VK_KHR_EXTENSION_216_SPEC_VERSION"/>
<enum value="&quot;VK_KHR_extension_216&quot;" name="VK_KHR_EXTENSION_216_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_GOOGLE_extension_217" number="217" author="GOOGLE" contact="Jesse Hall @critsec" supported="disabled">
<require>
<enum value="0" name="VK_KHR_EXTENSION_217_SPEC_VERSION"/>
<enum value="&quot;VK_KHR_extension_217&quot;" name="VK_KHR_EXTENSION_217_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_EXT_macos_ios_window" number="218" author="EXT" contact="Dzmitry Malyshau @kvark" supported="disabled">
<require>
<enum value="0" name="VK_EXT_MACOS_IOS_WINDOW_SPEC_VERSION"/>
<enum value="&quot;VK_EXT_macos_ios_window&quot;" name="VK_EXT_MACOS_IOS_WINDOW_EXTENSION_NAME"/>
</require>
</extension>
<extension name="VK_EXT_extension_219" number="219" type="device" author="EXT" contact="Matthew Netsch @mnetsch" supported="disabled">
<require>
<enum value="0" name="VK_EXT_EXTENSION_219_SPEC_VERSION"/>
<enum value="&quot;VK_EXT_extension_219&quot;" name="VK_EXT_EXTENSION_219_EXTENSION_NAME"/>
<enum bitpos="14" extends="VkImageCreateFlagBits" name="VK_IMAGE_CREATE_RESERVED_14_BIT_EXT"/>
<enum bitpos="24" extends="VkAccessFlagBits" name="VK_ACCESS_RESERVED_24_BIT_EXT"/>
<enum bitpos="24" extends="VkFormatFeatureFlagBits" name="VK_FORMAT_FEATURE_RESERVED_24_BIT_EXT"/>
<enum bitpos="9" extends="VkImageUsageFlagBits" name="VK_IMAGE_USAGE_RESERVED_9_BIT_EXT"/>
<enum bitpos="23" extends="VkPipelineStageFlagBits" name="VK_PIPELINE_STAGE_RESERVED_23_BIT_EXT"/>
</require>
</extension>
<extension name="VK_EXT_extension_220" number="220" author="EXT" contact="Dzmitry Malyshau @kvark" supported="disabled">
<require>
<enum value="0" name="VK_EXT_EXTENSION_220_SPEC_VERSION"/>
<enum value="&quot;VK_EXT_extension_220&quot;" name="VK_EXT_EXTENSION_220_EXTENSION_NAME"/>
</require>
</extension>
</extensions>
</registry>