docs: add sha256 checksums for 18.2.8

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

.mailmap

@@ -145,11 +145,6 @@ Edward O'Callaghan <funfunctor@folklore1984.net> <eocallaghan@alterapraxis.com>
 Emeric Grange <emeric.grange@gmail.com> Emeric <emeric.grange@gmail.com>
 
 Emil Velikov <emil.l.velikov@gmail.com> <emil.velikov@collabora.com>
-Emil Velikov <emil.l.velikov@gmail.com> <emil.veliko@collabora.com>
-Emil Velikov <emil.l.velikov@gmail.com> <emil.velikov@collabora.co.uk>
-Emil Velikov <emil.l.velikov@gmail.com> <emil.veliikov@collabora.com>
-Emil Velikov <emil.l.velikov@gmail.com> <emil.velikov@gmail.com>
-Emil Velikov <emil.l.velikov@gmail.com> <emmil.velikov@collabora.com>
 
 Eric Anholt <eric@anholt.net> Eric Anholt <anholt@FreeBSD.org>
 

.travis.yml

@@ -9,9 +9,9 @@ cache:
 
 env:
   global:
-    - XORG_RELEASES=https://xorg.freedesktop.org/releases/individual
-    - XCB_RELEASES=https://xcb.freedesktop.org/dist
-    - WAYLAND_RELEASES=https://wayland.freedesktop.org/releases
+    - XORG_RELEASES=http://xorg.freedesktop.org/releases/individual
+    - XCB_RELEASES=http://xcb.freedesktop.org/dist
+    - WAYLAND_RELEASES=http://wayland.freedesktop.org/releases
     - XORGMACROS_VERSION=util-macros-1.19.0
     - GLPROTO_VERSION=glproto-1.4.17
     - DRI2PROTO_VERSION=dri2proto-2.8
@@ -35,33 +35,28 @@ matrix:
     - env:
         - LABEL="meson Vulkan"
         - BUILD=meson
-        - DRI_DRIVERS=""
-        - GALLIUM_DRIVERS=""
-        - VULKAN_DRIVERS="intel,amd"
-        - LLVM_VERSION=6.0
+        - MESON_OPTIONS="-Ddri-drivers=[] -Dgallium-drivers=[]"
+        - LLVM_VERSION=5.0
         - LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
       addons:
         apt:
           sources:
-            - llvm-toolchain-trusty-6.0
-            # llvm-6 requires libstdc++4.9 which is not in main repo
-            - ubuntu-toolchain-r-test
+            - llvm-toolchain-trusty-5.0
           packages:
+            # LLVM packaging is broken and misses these dependencies
+            - libedit-dev
             # From sources above
-            - llvm-6.0-dev
+            - llvm-5.0-dev
             # Common
             - xz-utils
             - libexpat1-dev
             - libx11-xcb-dev
             - libelf-dev
-            - python3.5
             - python3-pip
     - env:
         - LABEL="meson loaders/classic DRI"
         - BUILD=meson
-        - DRI_DRIVERS="i915,i965,r100,r200,swrast,nouveau"
-        - GALLIUM_DRIVERS=""
-        - VULKAN_DRIVERS=""
+        - MESON_OPTIONS="-Dvulkan-drivers=[] -Dgallium-drivers=[]"
       addons:
         apt:
           packages:
@@ -71,7 +66,6 @@ matrix:
             - libx11-xcb-dev
             - libxdamage-dev
             - libxfixes-dev
-            - python3.5
             - python3-pip
     - env:
         - LABEL="make loaders/classic DRI"
@@ -93,7 +87,6 @@ matrix:
             - libx11-xcb-dev
             - libxdamage-dev
             - libxfixes-dev
-            - python3-pip
     - env:
         # NOTE: Building SWR is 2x (yes two) times slower than all the other
         # gallium drivers combined.
@@ -102,8 +95,10 @@ matrix:
         - BUILD=make
         - MAKEFLAGS="-j4"
         - MAKE_CHECK_COMMAND="true"
-        - LLVM_VERSION=6.0
+        - LLVM_VERSION=5.0
         - LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
+        - OVERRIDE_CC="gcc-4.8"
+        - OVERRIDE_CXX="g++-4.8"
         - DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
         - DRI_DRIVERS=""
         - GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
@@ -113,25 +108,24 @@ matrix:
       addons:
         apt:
           sources:
-            - llvm-toolchain-trusty-6.0
-            # llvm-6 requires libstdc++4.9 which is not in main repo
-            - ubuntu-toolchain-r-test
+            - llvm-toolchain-trusty-5.0
           packages:
+            # LLVM packaging is broken and misses these dependencies
+            - libedit-dev
             # From sources above
-            - llvm-6.0-dev
+            - llvm-5.0-dev
             # Common
             - xz-utils
             - libexpat1-dev
             - libx11-xcb-dev
             - libelf-dev
             - libunwind8-dev
-            - python3-pip
     - env:
         - LABEL="make Gallium Drivers RadeonSI"
         - BUILD=make
         - MAKEFLAGS="-j4"
         - MAKE_CHECK_COMMAND="true"
-        - LLVM_VERSION=6.0
+        - LLVM_VERSION=5.0
         - LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
         - DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
         - DRI_DRIVERS=""
@@ -142,19 +136,18 @@ matrix:
       addons:
         apt:
           sources:
-            - llvm-toolchain-trusty-6.0
-            # llvm-6 requires libstdc++4.9 which is not in main repo
-            - ubuntu-toolchain-r-test
+            - llvm-toolchain-trusty-5.0
           packages:
+            # LLVM packaging is broken and misses these dependencies
+            - libedit-dev
             # From sources above
-            - llvm-6.0-dev
+            - llvm-5.0-dev
             # Common
             - xz-utils
             - libexpat1-dev
             - libx11-xcb-dev
             - libelf-dev
             - libunwind8-dev
-            - python3-pip
     - env:
         - LABEL="make Gallium Drivers Other"
         - BUILD=make
@@ -186,8 +179,8 @@ matrix:
             - libx11-xcb-dev
             - libelf-dev
             - libunwind8-dev
-            - python3-pip
     - env:
+        # NOTE: Analogous to SWR above, building Clover is quite slow.
         - LABEL="make Gallium ST Clover LLVM-3.9"
         - BUILD=make
         - MAKEFLAGS="-j4"
@@ -224,8 +217,8 @@ matrix:
             - libx11-xcb-dev
             - libelf-dev
             - libunwind8-dev
-            - python3-pip
     - env:
+        # NOTE: Analogous to SWR above, building Clover is quite slow.
         - LABEL="make Gallium ST Clover LLVM-4.0"
         - BUILD=make
         - MAKEFLAGS="-j4"
@@ -259,8 +252,8 @@ matrix:
             - libx11-xcb-dev
             - libelf-dev
             - libunwind8-dev
-            - python3-pip
     - env:
+        # NOTE: Analogous to SWR above, building Clover is quite slow.
         - LABEL="make Gallium ST Clover LLVM-5.0"
         - BUILD=make
         - MAKEFLAGS="-j4"
@@ -272,7 +265,7 @@ matrix:
         - DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
         - DRI_DRIVERS=""
         - GALLIUM_ST="--disable-dri --enable-opencl --enable-opencl-icd --enable-llvm --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
-        - GALLIUM_DRIVERS="r600"
+        - GALLIUM_DRIVERS="r600,radeonsi"
         - VULKAN_DRIVERS=""
         - LIBUNWIND_FLAGS="--enable-libunwind"
       addons:
@@ -294,8 +287,8 @@ matrix:
             - libx11-xcb-dev
             - libelf-dev
             - libunwind8-dev
-            - python3-pip
     - env:
+        # NOTE: Analogous to SWR above, building Clover is quite slow.
         - LABEL="make Gallium ST Clover LLVM-6.0"
         - BUILD=make
         - MAKEFLAGS="-j4"
@@ -312,7 +305,7 @@ matrix:
         apt:
           sources:
             - llvm-toolchain-trusty-6.0
-            # llvm-6 requires libstdc++4.9 which is not in main repo
+            # llvm-6 depends on gcc-4.9 which is not in main repo
             - ubuntu-toolchain-r-test
           packages:
             - libclc-dev
@@ -326,39 +319,6 @@ matrix:
             - libx11-xcb-dev
             - libelf-dev
             - libunwind8-dev
-            - python3-pip
-    - env:
-        - LABEL="make Gallium ST Clover LLVM-7"
-        - BUILD=make
-        - MAKEFLAGS="-j4"
-        - MAKE_CHECK_COMMAND="true"
-        - LLVM_VERSION=7
-        - LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
-        - DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
-        - DRI_DRIVERS=""
-        - GALLIUM_ST="--disable-dri --enable-opencl --enable-opencl-icd --enable-llvm --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
-        - GALLIUM_DRIVERS="r600,radeonsi"
-        - VULKAN_DRIVERS=""
-        - LIBUNWIND_FLAGS="--enable-libunwind"
-      addons:
-        apt:
-          sources:
-            - sourceline: 'deb http://apt.llvm.org/trusty/ llvm-toolchain-trusty-7 main'
-              key_url: https://apt.llvm.org/llvm-snapshot.gpg.key
-            # llvm-7 requires libstdc++4.9 which is not in main repo
-            - ubuntu-toolchain-r-test
-          packages:
-            - libclc-dev
-            # From sources above
-            - llvm-7-dev
-            - clang-7
-            - libclang-7-dev
-            # Common
-            - xz-utils
-            - libexpat1-dev
-            - libx11-xcb-dev
-            - libelf-dev
-            - libunwind8-dev
     - env:
         - LABEL="make Gallium ST Other"
         - BUILD=make
@@ -394,13 +354,12 @@ matrix:
             - libx11-xcb-dev
             - libelf-dev
             - libunwind8-dev
-            - python3-pip
     - env:
         - LABEL="make Vulkan"
         - BUILD=make
         - MAKEFLAGS="-j4"
         - MAKE_CHECK_COMMAND="make -C src/gtest check && make -C src/intel check"
-        - LLVM_VERSION=6.0
+        - LLVM_VERSION=5.0
         - LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
         - DRI_LOADERS="--disable-glx --disable-gbm --disable-egl --with-platforms=x11,wayland"
         - DRI_DRIVERS=""
@@ -411,18 +370,17 @@ matrix:
       addons:
         apt:
           sources:
-            - llvm-toolchain-trusty-6.0
-            # llvm-6 requires libstdc++4.9 which is not in main repo
-            - ubuntu-toolchain-r-test
+            - llvm-toolchain-trusty-5.0
           packages:
+            # LLVM packaging is broken and misses these dependencies
+            - libedit-dev
             # From sources above
-            - llvm-6.0-dev
+            - llvm-5.0-dev
             # Common
             - xz-utils
             - libexpat1-dev
             - libx11-xcb-dev
             - libelf-dev
-            - python3-pip
     - env:
         - LABEL="scons"
         - BUILD=scons
@@ -466,19 +424,21 @@ matrix:
         - BUILD=scons
         - SCONSFLAGS="-j4"
         - SCONS_TARGET="swr=1"
-        - LLVM_VERSION=6.0
+        - LLVM_VERSION=5.0
         - LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
         # Keep it symmetrical to the make build. There's no actual SWR, yet.
         - SCONS_CHECK_COMMAND="true"
+        - OVERRIDE_CC="gcc-4.8"
+        - OVERRIDE_CXX="g++-4.8"
       addons:
         apt:
           sources:
-            - llvm-toolchain-trusty-6.0
-            # llvm-6 requires libstdc++4.9 which is not in main repo
-            - ubuntu-toolchain-r-test
+            - llvm-toolchain-trusty-5.0
           packages:
+            # LLVM packaging is broken and misses these dependencies
+            - libedit-dev
             # From sources above
-            - llvm-6.0-dev
+            - llvm-5.0-dev
             # Common
             - xz-utils
             - x11proto-xf86vidmode-dev
@@ -495,6 +455,7 @@ matrix:
     - env:
         - LABEL="macOS meson"
         - BUILD=meson
+        - MESON_OPTIONS="-Degl=false"
       os: osx
 
 before_install:
@@ -521,24 +482,18 @@ before_install:
     fi
 
 install:
-  # Install a more modern meson from pip, since the version in the
-  # ubuntu repos is often quite old. This requires python>=3.5, so
-  # let's make it default
-  - if test "x$BUILD" = xmeson; then
-      sudo update-alternatives --install /usr/bin/python3 python3 /usr/bin/python3.5 10;
-      pip3 install --user meson;
-      pip3 install --user mako;
-    fi
+  - pip2 install --user mako
 
-  # Install autotools build dependencies
-  - if test "x$BUILD" = xmake; then
-      pip2 install --user mako;
+  # Install a more modern meson from pip, since the version in the
+  # ubuntu repos is often quite old. Avoid >=0.45.0 as it needs python
+  # 3.5+
+  - if test "x$BUILD" = xmeson; then
+      pip3 install --user "meson<0.45.0";
     fi
 
   # Install a more modern scons from pip.
   - if test "x$BUILD" = xscons; then
       pip2 install --user "scons>=2.4";
-      pip2 install --user mako;
     fi
 
   # Since libdrm gets updated in configure.ac regularly, try to pick up the
@@ -580,7 +535,7 @@ install:
       tar -jxvf $LIBPCIACCESS_VERSION.tar.bz2
       (cd $LIBPCIACCESS_VERSION && ./configure --prefix=$HOME/prefix && make install)
 
-      wget https://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.bz2
+      wget http://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.bz2
       tar -jxvf $LIBDRM_VERSION.tar.bz2
       (cd $LIBDRM_VERSION && ./configure --prefix=$HOME/prefix --enable-vc4 --enable-freedreno --enable-etnaviv-experimental-api && make install)
 
@@ -596,11 +551,11 @@ install:
       tar -jxvf $LIBXSHMFENCE_VERSION.tar.bz2
       (cd $LIBXSHMFENCE_VERSION && ./configure --prefix=$HOME/prefix && make install)
 
-      wget https://people.freedesktop.org/~aplattner/vdpau/$LIBVDPAU_VERSION.tar.bz2
+      wget http://people.freedesktop.org/~aplattner/vdpau/$LIBVDPAU_VERSION.tar.bz2
       tar -jxvf $LIBVDPAU_VERSION.tar.bz2
       (cd $LIBVDPAU_VERSION && ./configure --prefix=$HOME/prefix && make install)
 
-      wget https://www.freedesktop.org/software/vaapi/releases/libva/$LIBVA_VERSION.tar.bz2
+      wget http://www.freedesktop.org/software/vaapi/releases/libva/$LIBVA_VERSION.tar.bz2
       tar -jxvf $LIBVA_VERSION.tar.bz2
       (cd $LIBVA_VERSION && ./configure --prefix=$HOME/prefix --disable-wayland --disable-dummy-driver && make install)
 
@@ -684,14 +639,6 @@ script:
   - |
     if test "x$BUILD" = xmeson; then
 
-      if test "x$TRAVIS_OS_NAME" == xosx; then
-        MESON_OPTIONS="-Degl=false"
-      fi
-
-      if test "x$TRAVIS_OS_NAME" == xlinux; then
-        MESON_OPTIONS="-Ddri-drivers=${DRI_DRIVERS:-[]} -Dgallium-drivers=${GALLIUM_DRIVERS:-[]} -Dvulkan-drivers=${VULKAN_DRIVERS:-[]}"
-      fi
-
       # Travis CI has moved to LLVM 5.0, and meson is detecting
       # automatically the available version in /usr/local/bin based on
       # the PATH env variable order preference.

Android.common.mk

@@ -76,8 +76,6 @@ LOCAL_CFLAGS += \
 	-DMAJOR_IN_SYSMACROS \
 	-DVK_USE_PLATFORM_ANDROID_KHR \
 	-fvisibility=hidden \
-	-fno-math-errno \
-	-fno-trapping-math \
 	-Wno-sign-compare
 
 LOCAL_CPPFLAGS += \
@@ -91,13 +89,6 @@ LOCAL_CPPFLAGS += \
 LOCAL_CONLYFLAGS += \
 	-std=c99
 
-# c11 timespec_get is part of bionic as well
-# https://android-review.googlesource.com/c/718518
-# This means releases from P and earlier won't need this
-ifeq ($(filter 5 6 7 8 9, $(MESA_ANDROID_MAJOR_VERSION)),)
-LOCAL_CFLAGS += -DHAVE_TIMESPEC_GET
-endif
-
 ifeq ($(strip $(MESA_ENABLE_ASM)),true)
 ifeq ($(TARGET_ARCH),x86)
 LOCAL_CFLAGS += \

CleanSpec.mk

@@ -10,7 +10,7 @@ $(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/STATIC_LIBRARIES/libmesa_*_interm
 $(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/i9?5_dri_intermediates)
 $(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/libglapi_intermediates)
 $(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/libGLES_mesa_intermediates)
-$(call add-clean-step, rm -rf $(HOST_OUT)/*/EXECUTABLES/mesa_*_intermediates)
-$(call add-clean-step, rm -rf $(HOST_OUT)/*/EXECUTABLES/glsl_compiler_intermediates)
-$(call add-clean-step, rm -rf $(HOST_OUT)/*/STATIC_LIBRARIES/libmesa_*_intermediates)
+$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/EXECUTABLES/mesa_*_intermediates)
+$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/EXECUTABLES/glsl_compiler_intermediates)
+$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/STATIC_LIBRARIES/libmesa_*_intermediates)
 $(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/*_dri_intermediates)

SConstruct

@@ -31,7 +31,6 @@ import common
 # Minimal scons version
 
 EnsureSConsVersion(2, 4)
-EnsurePythonVersion(2, 7)
 
 
 #######################################################################

VERSION

@@ -1 +1 @@
-18.3.0-rc4
+18.2.8

appveyor.yml

@@ -33,41 +33,31 @@ branches:
 # - https://www.appveyor.com/blog/2014/06/04/shallow-clone-for-git-repositories
 clone_depth: 100
 
-# https://www.appveyor.com/docs/build-cache/
 cache:
-- '%LOCALAPPDATA%\pip\Cache -> appveyor.yml'
-- win_flex_bison-2.5.15.zip
-- llvm-5.0.1-msvc2017-mtd.7z
+- win_flex_bison-2.5.9.zip
+- llvm-5.0.1-msvc2015-mtd.7z
 
-os: Visual Studio 2017
-
-init:
-# Appveyor defaults core.autocrlf to input instead of the default (true), but
-# that can hide problems processing CRLF text on Windows
-- git config --global core.autocrlf true
+os: Visual Studio 2015
 
 environment:
-  WINFLEXBISON_VERSION: 2.5.15
-  LLVM_ARCHIVE: llvm-5.0.1-msvc2017-mtd.7z
+  WINFLEXBISON_ARCHIVE: win_flex_bison-2.5.9.zip
+  LLVM_ARCHIVE: llvm-5.0.1-msvc2015-mtd.7z
 
 install:
-# Check git config
-- git config core.autocrlf
 # Check pip
 - python --version
 - python -m pip --version
 # Install Mako
-- python -m pip install Mako==1.0.7
+- python -m pip install Mako==1.0.6
 # Install pywin32 extensions, needed by SCons
 - python -m pip install pypiwin32
 # Install python wheels, necessary to install SCons via pip
 - python -m pip install wheel
 # Install SCons
-- python -m pip install scons==3.0.1
+- python -m pip install scons==2.5.1
 - scons --version
 # Install flex/bison
-- set WINFLEXBISON_ARCHIVE=win_flex_bison-%WINFLEXBISON_VERSION%.zip
-- if not exist "%WINFLEXBISON_ARCHIVE%" appveyor DownloadFile "https://github.com/lexxmark/winflexbison/releases/download/v%WINFLEXBISON_VERSION%/%WINFLEXBISON_ARCHIVE%"
+- if not exist "%WINFLEXBISON_ARCHIVE%" appveyor DownloadFile "https://downloads.sourceforge.net/project/winflexbison/old_versions/%WINFLEXBISON_ARCHIVE%"
 - 7z x -y -owinflexbison\ "%WINFLEXBISON_ARCHIVE%" > nul
 - set Path=%CD%\winflexbison;%Path%
 - win_flex --version
@@ -79,10 +69,10 @@ install:
 - set LLVM=%CD%\llvm
 
 build_script:
-- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.1 llvm=1
+- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.0 llvm=1
 
 after_build:
-- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.1 llvm=1 check
+- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.0 llvm=1 check
 
 
 # It's possible to setup notification here, as described in

bin/.cherry-ignore

@@ -0,0 +1,56 @@
+# fixes:  This commit has more than one Fixes tag but the commit it
+#         addresses didn't land in branch.
+6ff1c479968819b93c46d24bd898e89ce14ac401 autotools: don't ship the git_sha1.h generated in git in the tarballs
+# pick:   This commit addresses a regression introduced by previous
+#         commit fa9e6c235da, which didn't make it for 18.2.
+a72dbc461bdb7714656e62cd8f4b00a404c2e6e0 mesa: allow GL_UNSIGNED_BYTE type for SNORM reads
+# fixes:  This commit has more than one Fixes tag but the commit it
+#         addresses didn't land in branch.
+c9f54486959716762e6818dabb0a73a8cd46df67 radeonsi: fix regression in indirect input swizzles.
+# extra:  Just some comments update.
+2ad9917e187c1e9dbb053d3c98aa0e39fa374059 anv/blorp: Fix a comment as per Nanley's review feedback
+# fixes:  This commit was immediately reverted by commit 2dce1175c1c.
+4aec44c0d9c4c0649c362199fac97efe0a3b38a4 i965/tools: 32bit compilation with meson
+# pick:   This commit was reverted by commit 95bb7d82ca8.
+90819abb56f6b1a0cd4946b13b6caf24fb46e500 radv: fix descriptor pool allocation size
+# pick:   There is a specific patch for stable branch for this commit.
+0d495bec25bd7584de4e988c2b4528c1996bc1d0 radeonsi: NaN should pass kill_if
+# pick:   This commit reverts 0fa9e6d7b30 which did not land in branch.
+aa02d7e8781c25ee18b6da97606300808c84973a Revert "anv/skylake: disable ForceThreadDispatchEnable"
+# pick:   Explicit 18.3 only nominations.
+b1b2dd06a7b777e862b525302b15bcaf407d3648 radv: add missing TFB queries support to CmdCopyQueryPoolsResults()
+e0c7114eb3c19d4c2653f661698a6baa3bc9bedf st/mesa: disable L3 thread pinning
+b5f213bb1dcde22949dffe9d3a431fecd5d0f33b radv: binding streamout buffers doesn't change context regs
+9367514524f70faad99c721bac92339c8ff8bad9 radeonsi: fix video APIs on Raven2
+ea9f95e2a67eca90bb84eea24e7b4b804b3b1345 radeonsi: go back to using bottom-of-pipe for beginning of TIME_ELAPSED
+8f401b0ce6e6650e1a85e9bb2be23d5ff08812b8 anv,radv: Disable VK_EXT_pci_bus_info
+8c77f4c76ddfe0b692b430b012b65f6981a53336 meson: Add support for gnu hurd
+7a90886921eb1d5d73b40aadd6fd3f340041bd26 meson: Add toggle for glx-direct
+# fixes:  This commit was reverted by commit 5f312e95f87.
+a9031bf9b55602d93cccef6c926e2179c23205b4 i965/batch: avoid reverting batch buffer if saved state is an empty
+# extra:  intel/aub_viewer is not present in branch
+ac324a6809c09c54d3b0bfdb00e5e62987ec4ad8 intel/aub_viewer: fix dynamic state printing
+0db898cef2f5a455138e5845689c075aadba1c1f intel/aub_viewer: Print blend states properly
+# fixes: This commit requires commits 854202f70e6 and 84bc5738401 which did not
+#        land in branch.
+c120dbfe4d18240315ecec9b43a61aeb9ab239ac mesa/main: fix incorrect depth-error
+# fixes: This commit fixes commits b4476138d5ad and aa0fed10d357 which did not
+#        land in branch.
+d0c7b079d07f751eb37ecaa45a2a6db920d71d7a freedreno: Fix autotools build.
+# pick:  While this commit does not include the proper CC tag, it was intended
+#        to be applied only in 18.3 branch.
+017199d2d2e4c57015bc60edfcc656062c3a7472 mesa: Revert INTEL_fragment_shader_ordering support
+# fixes: The changes this commit provides are already included in the branch.
+ff6f1dd0d3c6b4c15ca51b478b2884d14f6a1e06 meson: libfreedreno depends upon libdrm (for fence support)
+# fixes: This commit requires commits aeaf8dbd097 and 7484bc894b9 which did not
+#        land in branch.
+f67dea5e19ef14187be0e8d0f61b1f764c7ccb4f radv: Fix multiview depth clears
+# fixes: There is a specific patch for stable franch for this commit.
+bde9f482de69528db5ccf5dd6bbfd8359adfbb19 ac: split 16-bit ssbo loads that may not be dword aligned
+# pick:  This commit is nominated to stable, but fixes commit b3c61469255 which
+#        is in 18.3 stable. Hence, this commit is considered as nominated to
+#        18.3 stable.
+947f7b452a550c66cfb9a8c9518e35635eb25947 nir: properly find the entry to keep in copy_prop_vars
+# pick:  This commit is nominated to stable, but fixes commit 11dc1307794 which
+#        is not in the current stable branch.
+d6110d4d547ad98dce7a89d0e020ab5be5aaaad6 intel/compiler: move nir_lower_bool_to_int32 before nir_lower_locals_to_regs

bin/get-pick-list.sh

@@ -21,31 +21,46 @@ is_typod_nomination()
 	git show --summary "$1" | grep -q -i -o "CC:.*mesa-dev"
 }
 
+fixes=
+
 # Helper to handle various mistypos of the fixes tag.
 # The tag string itself is passed as argument and normalised within.
+#
+# Resulting string in the global variable "fixes" and contains entries
+# in the form "fixes:$sha"
 is_sha_nomination()
 {
 	fixes=`git show --pretty=medium -s $1 | tr -d "\n" | \
 		sed -e 's/'"$2"'/\nfixes:/Ig' | \
 		grep -Eo 'fixes:[a-f0-9]{8,40}'`
 
-	fixes_count=`echo "$fixes" | wc -l`
+	fixes_count=`echo "$fixes" | grep "fixes:" | wc -l`
 	if test $fixes_count -eq 0; then
-		return 0
+		return 1
 	fi
+
+	# Throw a warning for each invalid sha
 	while test $fixes_count -gt 0; do
 		# Treat only the current line
 		id=`echo "$fixes" | tail -n $fixes_count | head -n 1 | cut -d : -f 2`
 		fixes_count=$(($fixes_count-1))
-
-		# Bail out if we cannot find suitable id.
-		# Any specific validation the $id is valid and not some junk, is
-		# implied with the follow up code
-		if test "x$id" = x; then
-			continue
+		if ! git show $id &>/dev/null; then
+			echo WARNING: Commit $1 lists invalid sha $id
 		fi
+	done
 
-		#Check if the offending commit is in branch.
+	return 0
+}
+
+# Checks if at least one of offending commits, listed in the global
+# "fixes", is in branch.
+sha_in_range()
+{
+	fixes_count=`echo "$fixes" | grep "fixes:" | wc -l`
+	while test $fixes_count -gt 0; do
+		# Treat only the current line
+		id=`echo "$fixes" | tail -n $fixes_count | head -n 1 | cut -d : -f 2`
+		fixes_count=$(($fixes_count-1))
 
 		# Be that cherry-picked ...
 		# ... or landed before the branchpoint.
@@ -103,20 +118,30 @@ do
 		continue
 	fi
 
-	if is_stable_nomination "$sha"; then
-		tag=stable
-	elif is_typod_nomination "$sha"; then
-		tag=typod
-	elif is_fixes_nomination "$sha"; then
+	if is_fixes_nomination "$sha"; then
 		tag=fixes
 	elif is_brokenby_nomination "$sha"; then
 		tag=brokenby
 	elif is_revert_nomination "$sha"; then
 		tag=revert
+	elif is_stable_nomination "$sha"; then
+		tag=stable
+	elif is_typod_nomination "$sha"; then
+		tag=typod
 	else
 		continue
 	fi
 
+	case "$tag" in
+	fixes | brokenby | revert )
+		if ! sha_in_range; then
+			continue
+		fi
+		;;
+	* )
+		;;
+	esac
+
 	printf "[ %8s ] " "$tag"
 	git --no-pager show --summary --oneline $sha
 done

bin/git_sha1_gen.py

@@ -1,3 +1,5 @@
+#!/usr/bin/env python
+
 """
 Generate the contents of the git_sha1.h file.
 The output of this script goes to stdout.
@@ -26,25 +28,22 @@ def get_git_sha1():
         git_sha1 = ''
     return git_sha1
 
-def write_if_different(contents):
-    """
-    Avoid touching the output file if it doesn't need modifications
-    Useful to avoid triggering rebuilds when nothing has changed.
-    """
-    if os.path.isfile(args.output):
-        with open(args.output, 'r') as file:
-            if file.read() == contents:
-                return
-    with open(args.output, 'w') as file:
-        file.write(contents)
-
 parser = argparse.ArgumentParser()
 parser.add_argument('--output', help='File to write the #define in',
-                    required=True)
+        required=True)
 args = parser.parse_args()
 
 git_sha1 = os.environ.get('MESA_GIT_SHA1_OVERRIDE', get_git_sha1())[:10]
 if git_sha1:
-    write_if_different('#define MESA_GIT_SHA1 " (git-' + git_sha1 + ')"')
+    git_sha1_h_in_path = os.path.join(os.path.dirname(sys.argv[0]),
+            '..', 'src', 'git_sha1.h.in')
+    with open(git_sha1_h_in_path , 'r') as git_sha1_h_in:
+        new_sha1 = git_sha1_h_in.read().replace('@VCS_TAG@', git_sha1)
+        if os.path.isfile(args.output):
+            with open(args.output, 'r') as git_sha1_h:
+                if git_sha1_h.read() == new_sha1:
+                    quit()
+        with open(args.output, 'w') as git_sha1_h:
+            git_sha1_h.write(new_sha1)
 else:
-    write_if_different('#define MESA_GIT_SHA1 ""')
+    open(args.output, 'w').close()

bin/install_megadrivers.py

@@ -1,3 +1,4 @@
+#!/usr/bin/env python
 # encoding=utf-8
 # Copyright © 2017-2018 Intel Corporation
 

common.py

@@ -99,6 +99,8 @@ def AddOptions(opts):
                         'enable static code analysis where available', 'no'))
     opts.Add(BoolOption('asan', 'enable Address Sanitizer', 'no'))
     opts.Add('toolchain', 'compiler toolchain', default_toolchain)
+    opts.Add(BoolOption('gles', 'EXPERIMENTAL: enable OpenGL ES support',
+                        'no'))
     opts.Add(BoolOption('llvm', 'use LLVM', default_llvm))
     opts.Add(BoolOption('openmp', 'EXPERIMENTAL: compile with openmp (swrast)',
                         'no'))
@@ -108,4 +110,3 @@ def AddOptions(opts):
     opts.Add(BoolOption('swr', 'Build OpenSWR', 'no'))
     if host_platform == 'windows':
         opts.Add('MSVC_VERSION', 'Microsoft Visual C/C++ version')
-        opts.Add('MSVC_USE_SCRIPT', 'Microsoft Visual C/C++ vcvarsall script', True)

configure.ac

@@ -74,10 +74,11 @@ AC_SUBST([OPENCL_VERSION])
 # in the first entry.
 LIBDRM_REQUIRED=2.4.75
 LIBDRM_RADEON_REQUIRED=2.4.71
-LIBDRM_AMDGPU_REQUIRED=2.4.95
+LIBDRM_AMDGPU_REQUIRED=2.4.91
 LIBDRM_INTEL_REQUIRED=2.4.75
 LIBDRM_NVVIEUX_REQUIRED=2.4.66
 LIBDRM_NOUVEAU_REQUIRED=2.4.66
+LIBDRM_FREEDRENO_REQUIRED=2.4.92
 LIBDRM_ETNAVIV_REQUIRED=2.4.89
 LIBDRM_VC4_REQUIRED=2.4.89
 
@@ -107,9 +108,9 @@ dnl LLVM versions
 LLVM_REQUIRED_GALLIUM=3.3.0
 LLVM_REQUIRED_OPENCL=3.9.0
 LLVM_REQUIRED_R600=3.9.0
-LLVM_REQUIRED_RADEONSI=6.0.0
-LLVM_REQUIRED_RADV=6.0.0
-LLVM_REQUIRED_SWR=6.0.0
+LLVM_REQUIRED_RADEONSI=5.0.0
+LLVM_REQUIRED_RADV=5.0.0
+LLVM_REQUIRED_SWR=5.0.0
 
 dnl Check for progs
 AC_PROG_CPP
@@ -124,8 +125,7 @@ AC_PROG_GREP
 AC_PROG_NM
 AM_PROG_AS
 AX_CHECK_GNU_MAKE
-AM_PATH_PYTHON([2.7],, [AM_PATH_PYTHON([3.4],, [:])])
-
+AC_CHECK_PROGS([PYTHON2], [python2.7 python2 python])
 AC_PROG_SED
 AC_PROG_MKDIR_P
 
@@ -157,7 +157,7 @@ fi
 
 AX_CHECK_PYTHON_MAKO_MODULE($PYTHON_MAKO_REQUIRED)
 
-if test "$PYTHON" = ":"; then
+if test -z "$PYTHON2"; then
     if test ! -f "$srcdir/src/util/format_srgb.c"; then
         AC_MSG_ERROR([Python not found - unable to generate sources])
     fi
@@ -310,7 +310,6 @@ AX_CHECK_COMPILE_FLAG([-Werror=missing-prototypes],            [CFLAGS="$CFLAGS
 AX_CHECK_COMPILE_FLAG([-Wmissing-prototypes],                  [CFLAGS="$CFLAGS -Wmissing-prototypes"])
 dnl Dylan Baker: gcc and clang always accepr -Wno-*, hence check for the original warning, then set the no-* flag
 AX_CHECK_COMPILE_FLAG([-Wmissing-field-initializers],          [CFLAGS="$CFLAGS -Wno-missing-field-initializers"])
-AX_CHECK_COMPILE_FLAG([-Wformat-truncation],                   [CFLAGS="$CFLAGS -Wno-format-truncation"])
 AX_CHECK_COMPILE_FLAG([-fno-math-errno],                       [CFLAGS="$CFLAGS -fno-math-errno"])
 
 AX_CHECK_COMPILE_FLAG([-fno-trapping-math],                    [CFLAGS="$CFLAGS -fno-trapping-math"])
@@ -330,7 +329,6 @@ AX_CHECK_COMPILE_FLAG([-fno-math-errno],                       [CXXFLAGS="$CXXFL
 AX_CHECK_COMPILE_FLAG([-fno-trapping-math],                    [CXXFLAGS="$CXXFLAGS -fno-trapping-math"])
 AX_CHECK_COMPILE_FLAG([-fvisibility=hidden],                   [VISIBILITY_CXXFLAGS="-fvisibility=hidden"])
 AX_CHECK_COMPILE_FLAG([-Wmissing-field-initializers],          [CXXFLAGS="$CXXFLAGS -Wno-missing-field-initializers"])
-AX_CHECK_COMPILE_FLAG([-Wformat-truncation],                   [CXXFLAGS="$CXXFLAGS -Wno-format-truncation"])
 AC_LANG_POP([C++])
 
 # Flags to help ensure that certain portions of the code -- and only those
@@ -978,22 +976,6 @@ if test "x$pthread_stubs_possible" = xyes; then
     PKG_CHECK_MODULES(PTHREADSTUBS, pthread-stubs >= 0.4)
 fi
 
-save_LIBS="$LIBS"
-LIBS="$PTHREAD_LIBS"
-AC_MSG_CHECKING(whether pthread_setaffinity_np is supported)
-AC_LINK_IFELSE([AC_LANG_SOURCE([[
-    #define _GNU_SOURCE
-    #include <pthread.h>
-    int main() {
-       void *a = (void*) &pthread_setaffinity_np;
-       long b = (long) a;
-       return (int) b;
-    }]])],
-  [DEFINES="$DEFINES -DHAVE_PTHREAD_SETAFFINITY"];
-   AC_MSG_RESULT([yes]),
-   AC_MSG_RESULT([no]))
-LIBS="$save_LIBS"
-
 dnl Check for futex for fast inline simple_mtx_t.
 AC_CHECK_HEADER([linux/futex.h], [DEFINES="$DEFINES -DHAVE_LINUX_FUTEX_H"])
 
@@ -1716,6 +1698,8 @@ xdri)
             if test x"$enable_dri" = xyes; then
                dri_modules="$dri_modules xcb-dri2 >= $XCBDRI2_REQUIRED"
             fi
+
+            dri_modules="$dri_modules xxf86vm"
         fi
         if test x"$dri_platform" = xapple ; then
             DEFINES="$DEFINES -DGLX_USE_APPLEGL"
@@ -1725,8 +1709,6 @@ xdri)
         fi
     fi
 
-    dri_modules="$dri_modules xxf86vm"
-
     PKG_CHECK_MODULES([DRIGL], [$dri_modules])
     GL_PC_REQ_PRIV="$GL_PC_REQ_PRIV $dri_modules"
     X11_INCLUDES="$X11_INCLUDES $DRIGL_CFLAGS"
@@ -1844,10 +1826,6 @@ for plat in $platforms; do
         PKG_CHECK_MODULES([WAYLAND_SCANNER], [wayland-scanner],
                           WAYLAND_SCANNER=`$PKG_CONFIG --variable=wayland_scanner wayland-scanner`,
                           WAYLAND_SCANNER='')
-        PKG_CHECK_EXISTS([wayland-scanner >= 1.15],
-                          AC_SUBST(SCANNER_ARG, 'private-code'),
-                          AC_SUBST(SCANNER_ARG, 'code'))
-
         if test "x$WAYLAND_SCANNER" = x; then
             AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner], [:])
         fi
@@ -2720,6 +2698,7 @@ if test -n "$with_gallium_drivers"; then
             ;;
         xfreedreno)
             HAVE_GALLIUM_FREEDRENO=yes
+            PKG_CHECK_MODULES([FREEDRENO], [libdrm >= $LIBDRM_FREEDRENO_REQUIRED libdrm_freedreno >= $LIBDRM_FREEDRENO_REQUIRED])
             require_libdrm "freedreno"
             ;;
         xetnaviv)
@@ -2834,8 +2813,9 @@ if test -n "$with_gallium_drivers"; then
 fi
 
 # XXX: Keep in sync with LLVM_REQUIRED_SWR
-AM_CONDITIONAL(SWR_INVALID_LLVM_VERSION, test "x$LLVM_VERSION" != x6.0.0 -a \
-                                              "x$LLVM_VERSION" != x6.0.1)
+AM_CONDITIONAL(SWR_INVALID_LLVM_VERSION, test "x$LLVM_VERSION" != x5.0.0 -a \
+                                              "x$LLVM_VERSION" != x5.0.1 -a \
+                                              "x$LLVM_VERSION" != x5.0.2)
 
 if test "x$enable_llvm" = "xyes" -a "$with_gallium_drivers"; then
     llvm_require_version $LLVM_REQUIRED_GALLIUM "gallium"
@@ -3192,7 +3172,6 @@ AC_CONFIG_FILES([Makefile
                  src/mesa/main/tests/Makefile
                  src/mesa/state_tracker/tests/Makefile
                  src/util/Makefile
-                 src/util/tests/fast_idiv_by_const/Makefile
                  src/util/tests/hash_table/Makefile
                  src/util/tests/set/Makefile
                  src/util/tests/string_buffer/Makefile
@@ -3364,7 +3343,7 @@ if test "x$enable_llvm" = xyes; then
     echo "        LLVM_LDFLAGS:    $LLVM_LDFLAGS"
     echo ""
 fi
-echo "        PYTHON:         $PYTHON"
+echo "        PYTHON2:         $PYTHON2"
 
 echo ""
 echo "        Run '${MAKE-make}' to build Mesa"

docs/autoconf.html

@@ -94,13 +94,6 @@ Currently there's only one config file provided when dri drivers are
 enabled - it's <code>drirc</code>.</p>
 </dd>
 
-<dt><code>--datadir=DIR</code></dt>
-<dd><p>This option specifies the directory where the data files will
-be installed. The default is <code>${prefix}/share</code>.
-Currently when dri drivers are enabled, <code>drirc.d/</code> is at
-this place.</p>
-</dd>
-
 <dt><code>--enable-static, --disable-shared</code></dt>
 <dd><p>By default, Mesa
 will build shared libraries. Either of these options will force static

docs/download.html

@@ -102,9 +102,9 @@ In the past, GLUT, GLU and the Mesa demos were released in conjunction with
 Mesa releases.  But since GLUT, GLU and the demos change infrequently, they
 were split off into their own git repositories:
 
-<a href="https://gitlab.freedesktop.org/mesa/glut">GLUT</a>,
-<a href="https://gitlab.freedesktop.org/mesa/glu">GLU</a> and
-<a href="https://gitlab.freedesktop.org/mesa/demos">Demos</a>,
+<a href="https://cgit.freedesktop.org/mesa/glut/">GLUT</a>,
+<a href="https://cgit.freedesktop.org/mesa/glu/">GLU</a> and
+<a href="https://cgit.freedesktop.org/mesa/demos/">Demos</a>,
 </p>
 
 </div>

docs/envvars.html

@@ -146,8 +146,8 @@ your system. For example under the default settings you may end up with a 1GB
 cache for x86_64 and another 1GB cache for i386.
 <li>MESA_GLSL_CACHE_DIR - if set, determines the directory to be used
 for the on-disk cache of compiled GLSL programs. If this variable is
-not set, then the cache will be stored in $XDG_CACHE_HOME/mesa_shader_cache (if
-that variable is set), or else within .cache/mesa_shader_cache within the user's
+not set, then the cache will be stored in $XDG_CACHE_HOME/mesa (if
+that variable is set), or else within .cache/mesa within the user's
 home directory.
 <li>MESA_GLSL - <a href="shading.html#envvars">shading language compiler options</a>
 <li>MESA_NO_MINMAX_CACHE - when set, the minmax index cache is globally disabled.

docs/features.txt

@@ -196,7 +196,7 @@ GL 4.4, GLSL 4.40 -- all DONE: i965/gen8+, nvc0, r600, radeonsi
   GL_MAX_VERTEX_ATTRIB_STRIDE                           DONE (all drivers)
   GL_ARB_buffer_storage                                 DONE (freedreno, i965, nv50, llvmpipe, swr)
   GL_ARB_clear_texture                                  DONE (i965, nv50, llvmpipe, softpipe, swr)
-  GL_ARB_enhanced_layouts                               DONE (i965, nv50, llvmpipe, softpipe, virgl)
+  GL_ARB_enhanced_layouts                               DONE (i965, nv50, llvmpipe, softpipe)
   - compile-time constant expressions                   DONE
   - explicit byte offsets for blocks                    DONE
   - forced alignment within blocks                      DONE
@@ -219,7 +219,7 @@ GL 4.5, GLSL 4.50 -- all DONE: nvc0, radeonsi
   GL_ARB_direct_state_access                            DONE (all drivers)
   GL_ARB_get_texture_sub_image                          DONE (all drivers)
   GL_ARB_shader_texture_image_samples                   DONE (i965, nv50, r600, virgl)
-  GL_ARB_texture_barrier                                DONE (freedreno, i965, nv50, r600, virgl)
+  GL_ARB_texture_barrier                                DONE (freedreno, i965, nv50, r600)
   GL_KHR_context_flush_control                          DONE (all - but needs GLX/EGL extension to be useful)
   GL_KHR_robustness                                     DONE (i965)
   GL_EXT_shader_integer_mix                             DONE (all drivers that support GLSL)
@@ -308,7 +308,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
   GL_ARB_sample_locations                               DONE (nvc0)
   GL_ARB_seamless_cubemap_per_texture                   DONE (freedreno, i965, nvc0, radeonsi, r600, softpipe, swr, virgl)
   GL_ARB_shader_ballot                                  DONE (i965/gen8+, nvc0, radeonsi)
-  GL_ARB_shader_clock                                   DONE (i965/gen7+, nv50, nvc0, r600, radeonsi, virgl)
+  GL_ARB_shader_clock                                   DONE (i965/gen7+, nv50, nvc0, r600, radeonsi)
   GL_ARB_shader_stencil_export                          DONE (i965/gen9+, r600, radeonsi, softpipe, llvmpipe, swr, virgl)
   GL_ARB_shader_viewport_layer_array                    DONE (i965/gen6+, nvc0, radeonsi)
   GL_ARB_sparse_buffer                                  DONE (radeonsi/CIK+)
@@ -319,14 +319,13 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
   GL_EXT_memory_object                                  DONE (radeonsi)
   GL_EXT_memory_object_fd                               DONE (radeonsi)
   GL_EXT_memory_object_win32                            not started
-  GL_EXT_render_snorm                                   DONE (i965)
   GL_EXT_semaphore                                      DONE (radeonsi)
   GL_EXT_semaphore_fd                                   DONE (radeonsi)
   GL_EXT_semaphore_win32                                not started
   GL_EXT_texture_norm16                                 DONE (i965, r600, radeonsi, nvc0)
   GL_KHR_blend_equation_advanced_coherent               DONE (i965/gen9+)
   GL_KHR_texture_compression_astc_hdr                   DONE (i965/bxt)
-  GL_KHR_texture_compression_astc_sliced_3d             DONE (i965/gen9+, radeonsi)
+  GL_KHR_texture_compression_astc_sliced_3d             DONE (i965/gen9+)
   GL_OES_depth_texture_cube_map                         DONE (all drivers that support GLSL 1.30+)
   GL_OES_EGL_image                                      DONE (all drivers)
   GL_OES_EGL_image_external                             DONE (all drivers)
@@ -344,63 +343,6 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
   GLX_ARB_robustness_application_isolation              not started
   GLX_ARB_robustness_share_group_isolation              not started
 
-GL_EXT_direct_state_access subfeatures (in the spec order):
-  GL 1.1: Client commands                               not started
-  GL 1.0-1.3: Matrix and transpose matrix commands      not started
-  GL 1.1-1.2: Texture commands                          not started
-  GL 1.2: 3D texture commands                           not started
-  GL 1.2.1: Multitexture commands                       not started
-  GL 1.2.1-3.0: Indexed texture commands                not started
-  GL 1.2.1-3.0: Indexed generic queries                 not started
-  GL 1.2.1: EnableIndexed.. Get*Indexed                 not started
-  GL_ARB_vertex_program                                 not started
-  GL 1.3: Compressed texture and multitexture commands  not started
-  GL 1.5: Buffer commands                               not started
-  GL 2.0-2.1: Uniform and uniform matrix commands       not started
-  GL_EXT_texture_buffer_object                          not started
-  GL_EXT_texture_integer                                not started
-  GL_EXT_gpu_shader4                                    not started
-  GL_EXT_gpu_program_parameters                         not started
-  GL_NV_gpu_program4                                    n/a
-  GL_NV_framebuffer_multisample_coverage                n/a
-  GL 3.0: Renderbuffer/framebuffer commands, Gen*Mipmap not started
-  GL 3.0: CopyBuffer command                            not started
-  GL_EXT_geometry_shader4 commands (expose in GL 3.2)   not started
-  GL_NV_explicit_multisample                            n/a
-  GL 3.0: Vertex array/attrib/query/map commands        not started
-  Matrix GL tokens                                      not started
-
-GL_EXT_direct_state_access additions from other extensions (complete list):
-  GL_AMD_framebuffer_sample_positions                   n/a
-  GL_AMD_gpu_shader_int64                               not started
-  GL_ARB_bindless_texture                               not started
-  GL_ARB_buffer_storage                                 not started
-  GL_ARB_clear_buffer_object                            not started
-  GL_ARB_framebuffer_no_attachments                     not started
-  GL_ARB_gpu_shader_fp64                                not started
-  GL_ARB_instanced_arrays                               not started
-  GL_ARB_internalformat_query2                          not started
-  GL_ARB_sparse_texture                                 n/a
-  GL_ARB_sparse_buffer                                  not started
-  GL_ARB_texture_buffer_range                           not started
-  GL_ARB_texture_storage                                not started
-  GL_ARB_texture_storage_multisample                    not started
-  GL_ARB_vertex_attrib_64bit                            not started
-  GL_ARB_vertex_attrib_binding                          not started
-  GL_EXT_buffer_storage                                 not started
-  GL_EXT_external_buffer                                not started
-  GL_EXT_separate_shader_objects                        n/a
-  GL_EXT_sparse_texture                                 n/a
-  GL_EXT_texture_storage                                n/a
-  GL_EXT_vertex_attrib_64bit                            not started
-  GL_EXT_EGL_image_storage                              n/a
-  GL_NV_bindless_texture                                n/a
-  GL_NV_gpu_shader5                                     n/a
-  GL_NV_texture_multisample                             n/a
-  GL_NV_vertex_buffer_unified_memory                    n/a
-  GL_NVX_linked_gpu_multicast                           n/a
-  GLX_NV_copy_buffer                                    n/a
-
 The following extensions are not part of any OpenGL or OpenGL ES version, and
 we DO NOT WANT implementations of these extensions for Mesa.
 

docs/helpwanted.html

@@ -47,7 +47,7 @@ You can find some further To-do lists here:
 <b>Common To-Do lists:</b>
 </p>
 <ul>
-  <li><a href="https://gitlab.freedesktop.org/mesa/mesa/blob/master/docs/features.txt">
+  <li><a href="https://cgit.freedesktop.org/mesa/mesa/tree/docs/features.txt">
     <b>features.txt</b></a> - Status of OpenGL 3.x / 4.x features in Mesa.</li>
 </ul>
 

docs/index.html

@@ -15,61 +15,6 @@
 <div class="content">
 
 <h1>News</h1>
-<h2>October 31, 2018</h2>
-<p>
-<a href="relnotes/18.2.4.html">Mesa 18.2.4</a> is released.
-This is a bug-fix release.
-</p>
-
-<h2>October 19, 2018</h2>
-<p>
-<a href="relnotes/18.2.3.html">Mesa 18.2.3</a> is released.
-This is a bug-fix release.
-</p>
-
-<h2>October 5, 2018</h2>
-<p>
-<a href="relnotes/18.2.2.html">Mesa 18.2.2</a> is released.
-This is a bug-fix release.
-</p>
-
-<h2>September 24, 2018</h2>
-<p>
-<a href="relnotes/18.1.9.html">Mesa 18.1.9</a> is released.
-This is a bug-fix release.
-<br>
-NOTE: It is anticipated that 18.1.9 will be the final release in the
-18.1 series. Users of 18.1 are encouraged to migrate to the 18.2
-series in order to obtain future fixes.
-</p>
-
-<h2>September 21, 2018</h2>
-<p>
-<a href="relnotes/18.2.1.html">Mesa 18.2.1</a> is released.
-This is a bug-fix release.
-</p>
-
-<h2>September 7, 2018</h2>
-<p>
-<a href="relnotes/18.1.8.html">Mesa 18.1.8</a> and
-<a href="relnotes/18.2.0.html">Mesa 18.2.0</a> are released.
-
-These are, respectively, a bug-fix release from the 18.1 branch and a
-new development release.  See the release notes for more information
-about the releases.
-</p>
-
-<h2>August 24, 2018</h2>
-<p>
-<a href="relnotes/18.1.7.html">Mesa 18.1.7</a> is released.
-This is a bug-fix release.
-</p>
-
-<h2>August 13, 2018</h2>
-<p>
-<a href="relnotes/18.1.6.html">Mesa 18.1.6</a> is released.
-This is a bug-fix release.
-</p>
 
 <h2>July 27, 2018</h2>
 <p>

docs/install.html

@@ -57,7 +57,7 @@ willing to maintain support for other compiler get in touch.
 <ul>
 <li>GCC 4.2.0 or later (some parts of Mesa may require later versions)
 <li>clang - exact minimum requirement is currently unknown.
-<li>Microsoft Visual Studio 2015 or later is required, for building on Windows.
+<li>Microsoft Visual Studio 2013 Update 4 or later is required, for building on Windows.
 </ul>
 
 
@@ -72,7 +72,7 @@ you think you've spotted a bug let developers know by filing a
 
 <ul>
 <li><a href="https://www.python.org/">Python</a> - Python is required.
-Version 2.7 or later should work.
+Version 2.6.4 or later should work.
 </li>
 <li><a href="http://www.makotemplates.org/">Python Mako module</a> -
 Python Mako module is required. Version 0.8.0 or later should work.

docs/meson.html

@@ -21,10 +21,10 @@
 <p><strong>The Meson build system is generally considered stable and ready
 for production</strong></p>
 
-<p>The meson build is tested on Linux, macOS, Cygwin and Haiku, FreeBSD,
-DragonflyBSD, NetBSD, and should work on OpenBSD.</p>
+<p>The meson build is tested on on Linux, macOS, Cygwin and Haiku, it should
+work on FreeBSD, DragonflyBSD, NetBSD, and OpenBSD.</p>
 
-<p><strong>Mesa requires Meson >= 0.45.0 to build.</strong>
+<p><strong>Mesa requires Meson >= 0.44.1 to build.</strong>
 
 Some older versions of meson do not check that they are too old and will error
 out in odd ways.
@@ -95,49 +95,41 @@ each configuration you want to build
 recommended in the documentation</a>
 </p>
 
-<p>
-Autotools automatically updates translation files as part of the build process,
-meson does not do this. Instead if you want translated drirc files you will need 
-to invoke non-default targets for ninja to update them:
-<code>ninja -C build/ xmlpool-pot xmlpool-update-po xmlpool-gmo</code>
-</p>
-
 <dl>
 <dt><code>Environment Variables</code></dt>
 <dd><p>Meson supports the standard CC and CXX environment variables for
 changing the default compiler, and CFLAGS, CXXFLAGS, and LDFLAGS for setting
-options to the compiler and linker during the initial configuration.
+options to the compiler and linker.
 
-These arguments are consumed and stored by meson when it is initialized. To
-change these flags after the build is initialized (or when doing a first
-initialization), consider using <code>-D${lang}_args</code> and
-<code>-D${lang}_link_args</code> instead. Meson will never change compiler in a
-configured build directory.
+The default compilers depends on your operating system. Meson supports most of
+the popular compilers, a complete list is available
+<a href="http://mesonbuild.com/Reference-tables.html#compiler-ids">here</a>.
+
+These arguments are consumed and stored by meson when it is initialized or
+re-initialized. Therefore passing them to meson configure will not do anything,
+and passing them to ninja will only do something if ninja decides to
+re-initialize meson, for example, if a meson.build file has been changed.
+Changing these variables will not cause all targets to be rebuilt, so running
+ninja clean is recommended when changing CFLAGS or CXXFLAGS. Meson will never
+change compiler in a configured build directory.
 </p>
 
 <pre>
     CC=clang CXX=clang++ meson build-clang
     ninja -C build-clang
     ninja -C build-clang clean
-    meson configure build -Dc_args="-Wno-typedef-redefinition"
-    ninja -C build-clang
+    touch meson.build
+    CFLAGS=-Wno-typedef-redefinition ninja -C build-clang
 </pre>
 
-<p>
-The default compilers depends on your operating system. Meson supports most of
-the popular compilers, a complete list is available
-<a href="http://mesonbuild.com/Reference-tables.html#compiler-ids">here</a>.
-</p>
-
 <p>Meson also honors <code>DESTDIR</code> for installs</p>
 </dd>
 
 
 <dt><code>LLVM</code></dt>
-<dd><p>Meson includes upstream logic to wrap llvm-config using its standard
+<dd><p>Meson includes upstream logic to wrap llvm-config using it's standard
 dependency interface. It will search <code>$PATH</code> (or <code>%PATH%</code> on windows) for
-llvm-config (and llvm-config$version and llvm-config-$version), so using an
-LLVM from a non-standard path is as easy as
+llvm-config, so using an LLVM from a non-standard path is as easy as
 <code>PATH=/path/with/llvm-config:$PATH meson build</code>.
 </p></dd>
 </dl>

docs/release-calendar.html

@@ -39,47 +39,48 @@ if you'd like to nominate a patch in the next stable release.
 <th>Notes</th>
 </tr>
 <tr>
-<td rowspan="3">18.2</td>
-<td>2018-11-14</td>
-<td>18.2.5</td>
-<td>Juan A. Suarez</td>
-<td/>
-</tr>
-<tr>
-<td>2018-11-28</td>
-<td>18.2.6</td>
-<td>Juan A. Suarez</td>
-<td/>
-</tr>
-<tr>
-<td>2018-12-12</td>
-<td>18.2.7</td>
-<td>Juan A. Suarez</td>
-<td>Last planned 18.2.x release</td>
-</tr>
-<td rowspan="4">18.3</td>
-<td>2018-10-31</td>
-<td>18.3.0-rc1</td>
-<td>Emil Velikov</td>
+<td rowspan="3">18.1</td>
+<td>2018-08-10</td>
+<td>18.1.6</td>
+<td>Dylan Baker</td>
 <td></td>
 </tr>
 <tr>
-<td>2018-11-07</td>
-<td>18.3.0-rc2</td>
-<td>Emil Velikov</td>
-<td/>
+<td>2018-08-24</td>
+<td>18.1.7</td>
+<td>Dylan Baker</td>
+<td></td>
 </tr>
 <tr>
-<td>2018-11-14</td>
-<td>18.3.0-rc3</td>
-<td>Emil Velikov</td>
-<td/>
+<td>2018-09-07</td>
+<td>18.1.8</td>
+<td>Dylan Baker</td>
+<td>Last planned 18.1.x release</td>
 </tr>
 <tr>
-<td>2018-11-21</td>
-<td>18.3.0-rc4</td>
-<td>Emil Velikov</td>
-<td>Last planned RC/final release</td>
+<td rowspan="4">18.2</td>
+<td>2018-08-01</td>
+<td>18.2.0rc1</td>
+<td>Andres Gomez</td>
+<td></td>
+</tr>
+<tr>
+<td>2018-08-08</td>
+<td>18.2.0rc2</td>
+<td>Andres Gomez</td>
+<td></td>
+</tr>
+<tr>
+<td>2018-08-15</td>
+<td>18.2.0rc3</td>
+<td>Andres Gomez</td>
+<td></td>
+</tr>
+<tr>
+<td>2018-08-22</td>
+<td>18.2.0rc4</td>
+<td>Andres Gomez</td>
+<td>Last planned RC/Final release</td>
 </tr>
 </table>
 

docs/releasing.html

@@ -21,7 +21,6 @@
 <li><a href="#overview">Overview</a>
 <li><a href="#schedule">Release schedule</a>
 <li><a href="#pickntest">Cherry-pick and test</a>
-<li><a href="#stagingbranch">Staging branch</a>
 <li><a href="#branch">Making a branchpoint</a>
 <li><a href="#prerelease">Pre-release announcement</a>
 <li><a href="#release">Making a new release</a>
@@ -210,25 +209,6 @@ system and making some every day's use until the release may be a good
 idea too.
 </p>
 
-<h1 id="stagingbranch">Staging branch</h1>
-
-<p>
-A live branch, which contains the currently merge/rejected patches is available
-in the main repository under <code>staging/X.Y</code>. For example:
-</p>
-<pre>
-	staging/18.1 - WIP branch for the 18.1 series
-	staging/18.2 - WIP branch for the 18.2 series
-</pre>
-
-<p>
-Notes:
-</p>
-<ul>
-<li>People are encouraged to test the branch and report regressions.</li>
-<li>The branch history is not stable and it <strong>will</strong> be rebased,</li>
-</ul>
-
 
 <h1 id="branch">Making a branchpoint</h1>
 
@@ -512,10 +492,10 @@ Here is one solution that I've been using.
 	# Drop LLVM_CONFIG, if applicable:
 	# unset LLVM_CONFIG
 
-	__glxinfo_cmd='glxinfo 2&gt;&amp;1 | egrep -o "Mesa.*|Gallium.*|.*dri\.so"'
-	__glxgears_cmd='glxgears 2&gt;&amp;1 | grep -v "configuration file"'
-	__es2info_cmd='es2_info 2&gt;&amp;1 | egrep "GL_VERSION|GL_RENDERER|.*dri\.so"'
-	__es2gears_cmd='es2gears_x11 2&gt;&amp;1 | grep -v "configuration file"'
+	__glxinfo_cmd='glxinfo 2>&amp;1 | egrep -o "Mesa.*|Gallium.*|.*dri\.so"'
+	__glxgears_cmd='glxgears 2>&amp;1 | grep -v "configuration file"'
+	__es2info_cmd='es2_info 2>&amp;1 | egrep "GL_VERSION|GL_RENDERER|.*dri\.so"'
+	__es2gears_cmd='es2gears_x11 2>&amp;1 | grep -v "configuration file"'
 	test "x$LD_LIBRARY_PATH" != 'x' &amp;&amp; __old_ld="$LD_LIBRARY_PATH"
 	export LD_LIBRARY_PATH=`pwd`/test/usr/local/lib/:"${__old_ld}"
 	export LIBGL_DRIVERS_PATH=`pwd`/test/usr/local/lib/dri/

docs/relnotes.html

@@ -21,15 +21,6 @@ The release notes summarize what's new or changed in each Mesa release.
 </p>
 
 <ul>
-<li><a href="relnotes/18.2.4.html">18.2.4 release notes</a>
-<li><a href="relnotes/18.2.3.html">18.2.3 release notes</a>
-<li><a href="relnotes/18.2.2.html">18.2.2 release notes</a>
-<li><a href="relnotes/18.1.9.html">18.1.9 release notes</a>
-<li><a href="relnotes/18.2.1.html">18.2.1 release notes</a>
-<li><a href="relnotes/18.2.0.html">18.2.0 release notes</a>
-<li><a href="relnotes/18.1.8.html">18.1.8 release notes</a>
-<li><a href="relnotes/18.1.7.html">18.1.7 release notes</a>
-<li><a href="relnotes/18.1.6.html">18.1.6 release notes</a>
 <li><a href="relnotes/18.1.5.html">18.1.5 release notes</a>
 <li><a href="relnotes/18.1.4.html">18.1.4 release notes</a>
 <li><a href="relnotes/18.1.3.html">18.1.3 release notes</a>

docs/relnotes/18.1.6.html

@@ -1,188 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<html lang="en">
-<head>
-  <meta http-equiv="content-type" content="text/html; charset=utf-8">
-  <title>Mesa Release Notes</title>
-  <link rel="stylesheet" type="text/css" href="../mesa.css">
-</head>
-<body>
-
-<div class="header">
-  <h1>The Mesa 3D Graphics Library</h1>
-</div>
-
-<iframe src="../contents.html"></iframe>
-<div class="content">
-
-<h1>Mesa 18.1.6 Release Notes / August 13 2018</h1>
-
-<p>
-Mesa 18.1.6 is a bug fix release which fixes bugs found since the 18.1.5 release.
-</p>
-<p>
-Mesa 18.1.6 implements the OpenGL 4.5 API, but the version reported by
-glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
-glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
-Some drivers don't support all the features required in OpenGL 4.5.  OpenGL
-4.5 is <strong>only</strong> available if requested at context creation.
-Compatibility contexts may report a lower version depending on each driver.
-</p>
-
-
-<h2>SHA256 checksums</h2>
-<pre>
-580e03328ffefe1fd43b19ab7669f20d931601a1c0a4c0f8b9c65d6e81a06df3  mesa-18.1.6.tar.gz
-bb7ce759069801804fcfb8152da3457f76cd7b4e0096e4870ff5adcb5c894289  mesa-18.1.6.tar.xz
-</pre>
-
-
-<h2>New features</h2>
-
-<p>None</p>
-
-<h2>Bug fixes</h2>
-<ul>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=13728">Bug 13728</a> - [G965] Some objects in Neverwinter Nights Linux version not displayed correctly</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98699">Bug 98699</a> - &quot;float[a+++4 ? 1:1] f;&quot; crashes glsl_compiler</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99730">Bug 99730</a> - Metro Redux game(s) needs override for midshader extension declaration</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106382">Bug 106382</a> - Shader cache breaks INTEL_DEBUG=shader_time</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107117">Bug 107117</a> - mesa-18.1: regression with TFP on intel with modesettings and glamor acceleration</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107212">Bug 107212</a> - Dual-Core CPU E5500 / G45: RetroArch with reicast core results in corrupted graphics</li>
-
-</ul>
-
-<h2>Changes</h2>
-<p>Adam Jackson (1):</p>
-<ul>
-  <li>glx: GLX_MESA_multithread_makecurrent is direct-only</li>
-</ul>
-
-<p>Andres Gomez (3):</p>
-<ul>
-  <li>ddebug: use util_snprintf() in dd_get_debug_filename_and_mkdir</li>
-  <li>gallium/aux/util: use util_snprintf() in test_texture_barrier</li>
-  <li>glsl: use util_snprintf()</li>
-</ul>
-
-<p>Christian Gmeiner (1):</p>
-<ul>
-  <li>etnaviv: fix typo in query names</li>
-</ul>
-
-<p>Dave Airlie (1):</p>
-<ul>
-  <li>r600: reduce num compute threads to 1024.</li>
-</ul>
-
-<p>Dylan Baker (6):</p>
-<ul>
-  <li>docs: Add sha-256 sums for 18.1.5</li>
-  <li>nir/meson: fix c vs cpp args for nir test</li>
-  <li>gallium: fix ddebug on windows</li>
-  <li>cherry-ignore: add patches that get-pick-list is finding in error</li>
-  <li>cherry-ignore: Add some additional patches that are for 18.2</li>
-  <li>bump version to 18.1.6</li>
-</ul>
-
-<p>Emil Velikov (5):</p>
-<ul>
-  <li>swr: don't export swr_create_screen_internal</li>
-  <li>automake: require shared glapi when using DRI based libGL</li>
-  <li>autotools: error out when using the broken --with-{gl, osmesa}-lib-name</li>
-  <li>autotools: error out when building with mangling and glvnd</li>
-  <li>autotools: use correct gl.pc LIBS when using glvnd</li>
-</ul>
-
-<p>Eric Anholt (4):</p>
-<ul>
-  <li>vc4: Fix a leak of the no-vertex-elements workaround BO.</li>
-  <li>vc4: Respect a sampler view's first_layer field.</li>
-  <li>vc4: Ignore samplers for finding uniform offsets.</li>
-  <li>egl: Fix leak of X11 pixmaps backing pbuffers in DRI3.</li>
-</ul>
-
-<p>Gert Wollny (1):</p>
-<ul>
-  <li>meson, install_megadrivers: Also remove stale symlinks</li>
-</ul>
-
-<p>Jan Vesely (2):</p>
-<ul>
-  <li>clover: Reduce wait_count in abort path.</li>
-  <li>clover: Don't extend illegal integer types.</li>
-</ul>
-
-<p>Jason Ekstrand (2):</p>
-<ul>
-  <li>nir: Take if uses into account in ssa_def_components_read</li>
-  <li>i965/fs: Flag all slots of a flat input as flat</li>
-</ul>
-
-<p>Jon Turney (1):</p>
-<ul>
-  <li>meson: use correct keyword to fix a meson warning</li>
-</ul>
-
-<p>Jordan Justen (2):</p>
-<ul>
-  <li>i965, anv: Use INTEL_DEBUG for disk_cache driver flags</li>
-  <li>i965: Disable shader cache with INTEL_DEBUG=shader_time</li>
-</ul>
-
-<p>Juan A. Suarez Romero (2):</p>
-<ul>
-  <li>wayland/egl: update surface size on window resize</li>
-  <li>wayland/egl: initialize window surface size to window size</li>
-</ul>
-
-<p>Karol Herbst (2):</p>
-<ul>
-  <li>nir/lower_int64: mark all metadata as dirty</li>
-  <li>nvc0/ir: return 0 in imageLoad on incomplete textures</li>
-</ul>
-
-<p>Kenneth Graunke (1):</p>
-<ul>
-  <li>intel: Fix SIMD16 unaligned payload GRF reads on Gen4-5.</li>
-</ul>
-
-<p>Marek Olšák (1):</p>
-<ul>
-  <li>ac/surface: fix MSAA corruption on Vega due to FMASK tile swizzle</li>
-</ul>
-
-<p>Mauro Rossi (2):</p>
-<ul>
-  <li>radv: generate entrypoints for VK_ANDROID_native_buffer</li>
-  <li>radv: move vk_format_table.c to generated sources</li>
-</ul>
-
-<p>Olivier Fourdan (1):</p>
-<ul>
-  <li>dri3: For 1.2, use root window instead of pixmap drawable</li>
-</ul>
-
-<p>Tapani Pälli (1):</p>
-<ul>
-  <li>glsl: handle error case with ast_post_inc, ast_post_dec</li>
-</ul>
-
-<p>Vlad Golovkin (1):</p>
-<ul>
-  <li>swr: Remove unnecessary memset call</li>
-</ul>
-
-<p>vadym.shovkoplias (1):</p>
-<ul>
-  <li>drirc: Allow extension midshader for Metro Redux</li>
-</ul>
-
-</div>
-</body>
-</html>

docs/relnotes/18.1.7.html

@@ -1,104 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<html lang="en">
-<head>
-  <meta http-equiv="content-type" content="text/html; charset=utf-8">
-  <title>Mesa Release Notes</title>
-  <link rel="stylesheet" type="text/css" href="../mesa.css">
-</head>
-<body>
-
-<div class="header">
-  <h1>The Mesa 3D Graphics Library</h1>
-</div>
-
-<iframe src="../contents.html"></iframe>
-<div class="content">
-
-<h1>Mesa 18.1.7 Release Notes / August 24 2018</h1>
-
-<p>
-Mesa 18.1.7 is a bug fix release which fixes bugs found since the 18.1.6 release.
-</p>
-<p>
-Mesa 18.1.7 implements the OpenGL 4.5 API, but the version reported by
-glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
-glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
-Some drivers don't support all the features required in OpenGL 4.5.  OpenGL
-4.5 is <strong>only</strong> available if requested at context creation.
-Compatibility contexts may report a lower version depending on each driver.
-</p>
-
-
-<h2>SHA256 checksums</h2>
-<pre>
-0c3c240bcd1352d179e65993214f9d55a399beac852c3ab4433e8df9b6c51c83  mesa-18.1.7.tar.gz
-655e3b32ce3bdddd5e6e8768596e5d4bdef82d0dd37067c324cc4b2daa207306  mesa-18.1.7.tar.xz
-</pre>
-
-
-<h2>New features</h2>
-
-<p>None</p>
-
-<h2>Bug fixes</h2>
-<ul>
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105975">Bug 105975</a> - i965 always reports 0 viewport subpixel bits</li>
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107098">Bug 107098</a> - Segfault after munmap(kms_sw_dt-&gt;ro_mapped)</li>
-</ul>
-
-<h2>Changes</h2>
-<p>Alexander Tsoy (1):</p>
-<ul>
-  <li>meson: fix build for egl platform_x11 without dri3 and gbm</li>
-</ul>
-
-<p>Bas Nieuwenhuizen (1):</p>
-<ul>
-  <li>radv: Fix missing Android platform define.</li>
-</ul>
-
-<p>Danylo Piliaiev (1):</p>
-<ul>
-  <li>i965: Advertise 8 bits subpixel precision for viewport bounds on gen6+</li>
-</ul>
-
-<p>Dave Airlie (1):</p>
-<ul>
-  <li>r600/eg: rework atomic counter emission with flushes</li>
-</ul>
-
-<p>Dylan Baker (7):</p>
-<ul>
-  <li>docs: Add sha256 sums for 18.1.6</li>
-  <li>cherry-ignore: Add additional 18.2 only patches</li>
-  <li>cherry-ignore: Add more 18.2 patches</li>
-  <li>cherry-ignore: Add more 18.2 patches</li>
-  <li>cherry-ignore: Add a couple of patches with &gt; 1 fixes tags</li>
-  <li>cherry-ignore: more 18.2 patches</li>
-  <li>bump version for 18.1.7 release</li>
-</ul>
-
-<p>Jason Ekstrand (2):</p>
-<ul>
-  <li>intel: Switch the order of the 2x MSAA sample positions</li>
-  <li>anv/lower_ycbcr: Use the binding array size for bounds checks</li>
-</ul>
-
-<p>Ray Strode (1):</p>
-<ul>
-  <li>gallium/winsys/kms: don't unmap what wasn't mapped</li>
-</ul>
-
-<p>Samuel Pitoiset (1):</p>
-<ul>
-  <li>radv/winsys: fix creating the BO list for virtual buffers</li>
-</ul>
-
-<p>Timothy Arceri (1):</p>
-<ul>
-  <li>radv: add Doom workaround</li>
-</ul>
-
-</div>
-</body>
-</html>

docs/relnotes/18.1.8.html

@@ -1,180 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<html lang="en">
-<head>
-  <meta http-equiv="content-type" content="text/html; charset=utf-8">
-  <title>Mesa Release Notes</title>
-  <link rel="stylesheet" type="text/css" href="../mesa.css">
-</head>
-<body>
-
-<div class="header">
-  <h1>The Mesa 3D Graphics Library</h1>
-</div>
-
-<iframe src="../contents.html"></iframe>
-<div class="content">
-
-<h1>Mesa 18.1.8 Release Notes / September 7 2018</h1>
-
-<p>
-Mesa 18.1.8 is a bug fix release which fixes bugs found since the 18.1.7 release.
-</p>
-<p>
-Mesa 18.1.8 implements the OpenGL 4.5 API, but the version reported by
-glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
-glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
-Some drivers don't support all the features required in OpenGL 4.5.  OpenGL
-4.5 is <strong>only</strong> available if requested at context creation.
-Compatibility contexts may report a lower version depending on each driver.
-</p>
-
-
-<h2>SHA256 checksums</h2>
-<pre>
-8ec62f215dd1bb3910987f9941c6fc31632a0874e618815cf1e8e29445c86e0a  mesa-18.1.8.tar.gz
-bd1be67fe9c73b517765264ac28911c84144682d28dbff140e1c2deb2f44c21b  mesa-18.1.8.tar.xz
-</pre>
-
-
-<h2>New features</h2>
-<p>None</p>
-
-<h2>Bug fixes</h2>
-<ul>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=93355">Bug 93355</a> - [BXT,SKLGT4e] intermittent ext_framebuffer_multisample.accuracy fails</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101247">Bug 101247</a> - Mesa fails to link GLSL programs with unused output blocks</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104809">Bug 104809</a> - anv: DOOM 2016 and Wolfenstein II:The New Colossus crash due to not having depthBoundsTest</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105904">Bug 105904</a> - Needed to delete mesa shader cache after driver upgrade for 32 bit wine vulkan programs to work.</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106738">Bug 106738</a> - No test for miptrees with DRI modifiers</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106865">Bug 106865</a> - [GLK] piglit.spec.ext_framebuffer_multisample.accuracy stencil tests fail</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107359">Bug 107359</a> - [Regression] [bisected] [OpenGL CTS] [SKL,BDW] KHR-GL46.texture_barrier*-texels, GTF-GL46.gtf21.GL2FixedTests.buffer_corners.buffer_corners, and GTF-GL46.gtf21.GL2FixedTests.stencil_plane_corners.stencil_plane_corners fail with some configuration</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107477">Bug 107477</a> - [DXVK] Setting high shader quality in GTA V results in LLVM error</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107579">Bug 107579</a> - [SNB] The graphic corruption when we reuse the GS compiled and used for TFB when statebuffer contain magic trash in the unused space</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107601">Bug 107601</a> - Rise of the Tomb Raider Segmentation Fault when the game starts</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107760">Bug 107760</a> - GPU Hang when Playing DiRT 3 Complete Edition using Steam Play with DXVK</li>
-
-</ul>
-
-<h2>Changes</h2>
-<p>Andrii Simiklit (1):</p>
-<ul>
-  <li>i965/gen6/xfb: handle case where transform feedback is not active</li>
-</ul>
-
-<p>Bas Nieuwenhuizen (3):</p>
-<ul>
-  <li>radv: Add missing checks in radv_get_image_format_properties.</li>
-  <li>radv: Fix CMASK dimensions.</li>
-  <li>radv: Use a lower max offchip buffer count.</li>
-</ul>
-
-<p>Christian Gmeiner (1):</p>
-<ul>
-  <li>tegra: fix memory leak</li>
-</ul>
-
-<p>Daniel Stone (1):</p>
-<ul>
-  <li>st/dri: Don't expose sRGB formats to clients</li>
-</ul>
-
-<p>Dave Airlie (1):</p>
-<ul>
-  <li>ac/radeonsi: fix CIK copy max size</li>
-</ul>
-
-<p>Dylan Baker (10):</p>
-<ul>
-  <li>docs: Add mesa 18.1.7 notes</li>
-  <li>cherry-ignore: add a patch</li>
-  <li>cherry-ignore: Add more 18.2 only patches</li>
-  <li>meson: Actually load translation files</li>
-  <li>cherry-ignore: Add more 18.2 patches</li>
-  <li>cherry-ignore: Add additional patch</li>
-  <li>cherry-ignore: Add patch that doesn't apply to 18.1</li>
-  <li>cherry-ignore: Add a couple of two fixes warning patches</li>
-  <li>cherry-ignore: Add patch that needs more significant patches to function</li>
-  <li>Bump version to 18.1.8</li>
-</ul>
-
-<p>Emil Velikov (1):</p>
-<ul>
-  <li>docs: update required mako version</li>
-</ul>
-
-<p>Grazvydas Ignotas (1):</p>
-<ul>
-  <li>radv: place pointer length into cache uuid</li>
-</ul>
-
-<p>Gurchetan Singh (2):</p>
-<ul>
-  <li>meson: fix egl build for surfaceless</li>
-  <li>meson: fix egl build for android</li>
-</ul>
-
-<p>Ian Romanick (2):</p>
-<ul>
-  <li>i965/vec4: Clamp indirect tes input array reads with 0x0fffffff</li>
-  <li>i965/vec4: Correctly handle uniform sources in generate_tes_add_indirect_urb_offset</li>
-</ul>
-
-<p>Jason Ekstrand (5):</p>
-<ul>
-  <li>anv: Fill holes in the VF VUE to zero</li>
-  <li>nir/algebraic: Be more careful converting ushr to extract_u8/16</li>
-  <li>egl/dri2: Add a helper for the number of planes for a FOURCC format</li>
-  <li>egl/dri2: Guard against invalid fourcc formats</li>
-  <li>anv/blorp: Do more flushing around HiZ clears</li>
-</ul>
-
-<p>Juan A. Suarez Romero (1):</p>
-<ul>
-  <li>egl/wayland: do not leak wl_buffer when it is locked</li>
-</ul>
-
-<p>Lionel Landwerlin (1):</p>
-<ul>
-  <li>anv: blorp: support multiple aspect blits</li>
-</ul>
-
-<p>Marek Olšák (1):</p>
-<ul>
-  <li>glapi: actually implement GL_EXT_robustness for GLES</li>
-</ul>
-
-<p>Nanley Chery (7):</p>
-<ul>
-  <li>intel/isl: Avoid tiling some 16K-wide render targets</li>
-  <li>i965: Make blt_pitch public</li>
-  <li>i965/miptree: Drop an if case from retile_as_linear</li>
-  <li>i965/miptree: Use the correct BLT pitch</li>
-  <li>i965/miptree: Use miptree_map in map_blit functions</li>
-  <li>i965/miptree: Fix can_blit_slice()</li>
-  <li>i965/gen7_urb: Re-emit PUSH_CONSTANT_ALLOC on some gen9</li>
-</ul>
-
-<p>Samuel Pitoiset (1):</p>
-<ul>
-  <li>radv: fix passing clip/cull distances from VS to PS</li>
-</ul>
-
-<p>vadym.shovkoplias (1):</p>
-<ul>
-  <li>glsl/linker: Allow unused in blocks which are not declated on previous stage</li>
-</ul>
-
-</div>
-</body>
-</html>

docs/relnotes/18.1.9.html

@@ -1,178 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<html lang="en">
-<head>
-  <meta http-equiv="content-type" content="text/html; charset=utf-8">
-  <title>Mesa Release Notes</title>
-  <link rel="stylesheet" type="text/css" href="../mesa.css">
-</head>
-<body>
-
-<div class="header">
-  <h1>The Mesa 3D Graphics Library</h1>
-</div>
-
-<iframe src="../contents.html"></iframe>
-<div class="content">
-
-<h1>Mesa 18.1.8 Release Notes / September 24 2018</h1>
-
-<p>
-Mesa 18.1.9 is a bug fix release which fixes bugs found since the 18.1.8 release.
-</p>
-<p>
-Mesa 18.1.9 implements the OpenGL 4.5 API, but the version reported by
-glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
-glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
-Some drivers don't support all the features required in OpenGL 4.5.  OpenGL
-4.5 is <strong>only</strong> available if requested at context creation.
-Compatibility contexts may report a lower version depending on each driver.
-</p>
-
-
-<h2>SHA256 checksums</h2>
-<pre>
-0f825dc834b1b3e3d9a6c3ce58b42977f0d9a248a7627a36dd3b313ffe41a499  mesa-18.1.9.tar.gz
-55f5778d58a710a63d6635f000535768faf7db9e8144dc0f4fd1989f936c1a83  mesa-18.1.9.tar.xz
-</pre>
-
-
-<h2>New features</h2>
-<p>None</p>
-
-<h2>Bug fixes</h2>
-<ul>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103241">Bug 103241</a> - Anv crashes when using 64-bit vertex inputs</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104926">Bug 104926</a> - swrast: Mesa 17.3.3 produces:  HW cursor for format 875713089 not supported</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107280">Bug 107280</a> - [DXVK] Batman: Arkham City with tessellation enabled hangs on SKL GT4</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107772">Bug 107772</a> - Mesa preprocessor matches if(def)s &amp; endifs incorrectly</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107779">Bug 107779</a> - Access violation with some games</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107810">Bug 107810</a> - The 'va_end' call is missed after 'va_copy' in 'util_vsnprintf' function under windows</li>
-
-</ul>
-
-<h2>Changes</h2>
-<p>Andrii Simiklit (4):</p>
-<ul>
-  <li>apple/glx/log: added missing va_end() after va_copy()</li>
-  <li>mesa/util: don't use the same 'va_list' instance twice</li>
-  <li>mesa/util: don't ignore NULL returned from 'malloc'</li>
-  <li>mesa/util: add missing va_end() after va_copy()</li>
-</ul>
-
-<p>Bas Nieuwenhuizen (4):</p>
-<ul>
-  <li>radv: Use build ID if available for cache UUID.</li>
-  <li>radv: Only allow 16 user SGPRs for compute on GFX9+.</li>
-  <li>radv: Set the user SGPR MSB for Vega.</li>
-  <li>radv: Fix driver UUID SHA1 init.</li>
-</ul>
-
-<p>Christopher Egert (1):</p>
-<ul>
-  <li>radeon: fix ColorMask</li>
-</ul>
-
-<p>Dave Airlie (1):</p>
-<ul>
-  <li>virgl: don't send a shader create with no data. (v2)</li>
-</ul>
-
-<p>Dylan Baker (10):</p>
-<ul>
-  <li>docs/relnotes: Add sha256 sums for mesa 18.1.8</li>
-  <li>cherry-ignore: Add additional 18.2 patch</li>
-  <li>meson: Print a message about why a libdrm version was selected</li>
-  <li>cherry-ignore: add another 18.2 patch</li>
-  <li>cherry-ignore: Add patches that don't apply cleanly and are for developer tools</li>
-  <li>cherry-ignore: Add more 18.2 patches</li>
-  <li>cherry-ignore: add 18.2 patchs</li>
-  <li>cherry-ignore: add a patch that was reverted on master</li>
-  <li>cherry-ignore: one final update</li>
-  <li>Bump version to 18.1.9</li>
-</ul>
-
-<p>Erik Faye-Lund (2):</p>
-<ul>
-  <li>winsys/virgl: avoid unintended behavior</li>
-  <li>virgl: adjust strides when mapping temp-resources</li>
-</ul>
-
-<p>Gert Wollny (1):</p>
-<ul>
-  <li>winsys/virgl: correct resource and handle allocation (v2)</li>
-</ul>
-
-<p>Jason Ekstrand (6):</p>
-<ul>
-  <li>anv/pipeline: Only consider double elements which actually exist</li>
-  <li>i965: Workaround the gen9 hw astc5x5 sampler bug</li>
-  <li>anv: Re-emit vertex buffers when the pipeline changes</li>
-  <li>anv: Disable the vertex cache when tessellating on SKL GT4</li>
-  <li>anv: Clamp scissors to the framebuffer boundary</li>
-  <li>anv/query: Write both dwords in emit_zero_queries</li>
-</ul>
-
-<p>Josh Pieper (1):</p>
-<ul>
-  <li>st/mesa: Validate the result of pipe_transfer_map in make_texture (v2)</li>
-</ul>
-
-<p>Kenneth Feng (1):</p>
-<ul>
-  <li>amd: Add Picasso device id</li>
-</ul>
-
-<p>Marek Olšák (4):</p>
-<ul>
-  <li>st/mesa: help fix stencil border color for GL_DEPTH_STENCIL textures</li>
-  <li>radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CI</li>
-  <li>r600: fix HTILE for NPOT textures with mipmapping</li>
-  <li>radeonsi: fix printing a BO list into ddebug reports</li>
-</ul>
-
-<p>Mathias Fröhlich (1):</p>
-<ul>
-  <li>tnl: Fix green gun regression in xonotic.</li>
-</ul>
-
-<p>Mauro Rossi (3):</p>
-<ul>
-  <li>android: broadcom/genxml: fix collision with intel/genxml header-gen macro</li>
-  <li>android: broadcom/cle: add gallium include path</li>
-  <li>android: broadcom/cle: export the broadcom top level path headers</li>
-</ul>
-
-<p>Michal Srb (1):</p>
-<ul>
-  <li>st/dri: don't set queryDmaBufFormats/queryDmaBufModifiers if the driver does not implement it</li>
-</ul>
-
-<p>Michel Dänzer (1):</p>
-<ul>
-  <li>loader/dri3: Only wait for back buffer fences in dri3_get_buffer</li>
-</ul>
-
-<p>Pierre Moreau (1):</p>
-<ul>
-  <li>nvir: Always split 64-bit IMAD/IMUL operations</li>
-</ul>
-
-<p>Sergii Romantsov (1):</p>
-<ul>
-  <li>intel: compiler option msse2 and mstackrealign</li>
-</ul>
-
-<p>Timothy Arceri (1):</p>
-<ul>
-  <li>glsl: fixer lexer for unreachable defines</li>
-</ul>
-
-</div>
-</body>
-</html>

docs/relnotes/18.2.5.html

@@ -0,0 +1,172 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 18.2.5 Release Notes / November 15, 2018</h1>
+
+<p>
+Mesa 18.2.5 is a bug fix release which fixes bugs found since the 18.2.4 release.
+</p>
+<p>
+Mesa 18.2.5 implements the OpenGL 4.5 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 4.5.  OpenGL
+4.5 is <strong>only</strong> available if requested at context creation.
+Compatibility contexts may report a lower version depending on each driver.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+dddc28928b6f4083a0d5120b58c1c8e2dc189ab5c14299c08a386607fdbbdce7  mesa-18.2.5.tar.gz
+b12c32872832e5353155e1e8026e1f1ab75bba9dc5b178d712045684d26c2b73  mesa-18.2.5.tar.xz
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+
+<h2>Bug fixes</h2>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105731">Bug 105731</a> - linker error &quot;fragment shader input ... has no matching output in the previous stage&quot; when previous stage's output declaration in a separate shader object</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107511">Bug 107511</a> - KHR/khrplatform.h not always installed when needed</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107626">Bug 107626</a> - [SNB] The graphical corruption and GPU hang occur sometimes on the piglit test &quot;arb_texture_multisample-large-float-texture&quot; with parameter --fp16</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108082">Bug 108082</a> - warning: unknown warning option '-Wno-format-truncation' [-Wunknown-warning-option]</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108560">Bug 108560</a> - Mesa 32 is built without sse</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Andre Heider (1):</p>
+<ul>
+  <li>st/nine: fix stack corruption due to ABI mismatch</li>
+</ul>
+
+<p>Andrii Simiklit (1):</p>
+<ul>
+  <li>i965/batch: don't ignore the 'brw_new_batch' call for a 'new batch'</li>
+</ul>
+
+<p>Dylan Baker (2):</p>
+<ul>
+  <li>meson: link gallium nine with pthreads</li>
+  <li>meson: fix libatomic tests</li>
+</ul>
+
+<p>Emil Velikov (2):</p>
+<ul>
+  <li>egl/glvnd: correctly report errors when vendor cannot be found</li>
+  <li>m4: add Werror when checking for compiler flags</li>
+</ul>
+
+<p>Eric Engestrom (6):</p>
+<ul>
+  <li>svga: add missing meson build dependency</li>
+  <li>clover: add missing meson build dependency</li>
+  <li>wsi/wayland: use proper VkResult type</li>
+  <li>wsi/wayland: only finish() a successfully init()ed display</li>
+  <li>configure: install KHR/khrplatform.h when needed</li>
+  <li>meson: install KHR/khrplatform.h when needed</li>
+</ul>
+
+<p>Gert Wollny (1):</p>
+<ul>
+  <li>virgl/vtest-winsys: Use virgl version of bind flags</li>
+</ul>
+
+<p>Jonathan Gray (1):</p>
+<ul>
+  <li>intel/tools: include stdarg.h in error2aub</li>
+</ul>
+
+<p>Juan A. Suarez Romero (4):</p>
+<ul>
+  <li>docs: add sha256 checksums for 18.2.4</li>
+  <li>cherry-ignore: add explicit 18.3 only nominations</li>
+  <li>cherry-ignore: i965/batch: avoid reverting batch buffer if saved state is an empty</li>
+  <li>Update version to 18.2.5</li>
+</ul>
+
+<p>Lionel Landwerlin (1):</p>
+<ul>
+  <li>anv/android: mark gralloc allocated BOs as external</li>
+</ul>
+
+<p>Marek Olšák (3):</p>
+<ul>
+  <li>ac: fix ac_build_fdiv for f64</li>
+  <li>st/va: fix incorrect use of resource_destroy</li>
+  <li>include: update GL &amp; GLES headers (v2)</li>
+</ul>
+
+<p>Matt Turner (2):</p>
+<ul>
+  <li>util/ralloc: Switch from DEBUG to NDEBUG</li>
+  <li>util/ralloc: Make sizeof(linear_header) a multiple of 8</li>
+</ul>
+
+<p>Olivier Fourdan (1):</p>
+<ul>
+  <li>wayland/egl: Resize EGL surface on update buffer for swrast</li>
+</ul>
+
+<p>Rhys Perry (1):</p>
+<ul>
+  <li>glsl_to_tgsi: don't create 64-bit integer MAD/FMA</li>
+</ul>
+
+<p>Samuel Pitoiset (2):</p>
+<ul>
+  <li>radv: disable conditional rendering for vkCmdCopyQueryPoolResults()</li>
+  <li>radv: only expose VK_SUBGROUP_FEATURE_ARITHMETIC_BIT for VI+</li>
+</ul>
+
+<p>Sergii Romantsov (1):</p>
+<ul>
+  <li>autotools: library-dependency when no sse and 32-bit</li>
+</ul>
+
+<p>Timothy Arceri (4):</p>
+<ul>
+  <li>st/mesa: calculate buffer size correctly for packed uniforms</li>
+  <li>st/glsl_to_nir: fix next_stage gathering</li>
+  <li>nir: add glsl_type_is_integer() helper</li>
+  <li>nir: don't pack varyings ints with floats unless flat</li>
+</ul>
+
+<p>Vadym Shovkoplias (1):</p>
+<ul>
+  <li>glsl/linker: Fix out variables linking during single stage</li>
+</ul>
+
+<p>Vinson Lee (1):</p>
+<ul>
+  <li>r600/sb: Fix constant logical operand in assert.</li>
+</ul>
+
+
+</div>
+</body>
+</html>

docs/relnotes/18.2.6.html

@@ -0,0 +1,179 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 18.2.6 Release Notes / November 28, 2018</h1>
+
+<p>
+Mesa 18.2.6 is a bug fix release which fixes bugs found since the 18.2.5 release.
+</p>
+<p>
+Mesa 18.2.6 implements the OpenGL 4.5 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 4.5.  OpenGL
+4.5 is <strong>only</strong> available if requested at context creation.
+Compatibility contexts may report a lower version depending on each driver.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+e0ea1236dbc6c412b02e1b5d7f838072525971a6630246fa82ae4466a6d8a587  mesa-18.2.6.tar.gz
+9ebafa4f8249df0c718e93b9ca155e3593a1239af303aa2a8b0f2056a7efdc12  mesa-18.2.6.tar.xz
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+
+<h2>Bug fixes</h2>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107626">Bug 107626</a> - [SNB] The graphical corruption and GPU hang occur sometimes on the piglit test &quot;arb_texture_multisample-large-float-texture&quot; with parameter --fp16</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107856">Bug 107856</a> - i965 incorrectly calculates the number of layers for texture views (assert)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108630">Bug 108630</a> - [G965] piglit.spec.!opengl 1_2.tex3d-maxsize spins forever</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108713">Bug 108713</a> - Gallium: use after free with transform feedback</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108829">Bug 108829</a> - [meson] libglapi exports internal API</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Andrii Simiklit (1):</p>
+<ul>
+  <li>i965/batch: avoid reverting batch buffer if saved state is an empty</li>
+</ul>
+
+<p>Bas Nieuwenhuizen (1):</p>
+<ul>
+  <li>radv: Fix opaque metadata descriptor last layer.</li>
+</ul>
+
+<p>Brian Paul (1):</p>
+<ul>
+  <li>scons/svga: remove opt from the list of valid build types</li>
+</ul>
+
+<p>Danylo Piliaiev (1):</p>
+<ul>
+  <li>i965: Fix calculation of layers array length for isl_view</li>
+</ul>
+
+<p>Dylan Baker (2):</p>
+<ul>
+  <li>meson: Don't set -Wall</li>
+  <li>meson: Don't force libva to required from auto</li>
+</ul>
+
+<p>Emil Velikov (13):</p>
+<ul>
+  <li>bin/get-pick-list.sh: simplify git oneline printing</li>
+  <li>bin/get-pick-list.sh: prefix output with "[stable] "</li>
+  <li>bin/get-pick-list.sh: handle "typod" usecase.</li>
+  <li>bin/get-pick-list.sh: handle the fixes tag</li>
+  <li>bin/get-pick-list.sh: tweak the commit sha matching pattern</li>
+  <li>bin/get-pick-list.sh: flesh out is_sha_nomination</li>
+  <li>bin/get-pick-list.sh: handle fixes tag with missing colon</li>
+  <li>bin/get-pick-list.sh: handle unofficial "broken by" tag</li>
+  <li>bin/get-pick-list.sh: use test instead of [ ]</li>
+  <li>bin/get-pick-list.sh: handle reverts prior to the branchpoint</li>
+  <li>travis: drop unneeded x11proto-xf86vidmode-dev</li>
+  <li>glx: make xf86vidmode mandatory for direct rendering</li>
+  <li>travis: adding missing x11-xcb for meson+vulkan</li>
+</ul>
+
+<p>Eric Anholt (1):</p>
+<ul>
+  <li>vc4: Make sure we make ro scanout resources for create_with_modifiers.</li>
+</ul>
+
+<p>Eric Engestrom (5):</p>
+<ul>
+  <li>meson: only run vulkan's meson.build when building vulkan</li>
+  <li>gbm: remove unnecessary meson include</li>
+  <li>meson: fix wayland-less builds</li>
+  <li>egl: add missing glvnd entrypoint for EGL_ANDROID_blob_cache</li>
+  <li>glapi: add missing visibility args</li>
+</ul>
+
+<p>Erik Faye-Lund (1):</p>
+<ul>
+  <li>mesa/main: remove bogus error for zero-sized images</li>
+</ul>
+
+<p>Gert Wollny (3):</p>
+<ul>
+  <li>mesa: Reference count shaders that are used by transform feedback objects</li>
+  <li>r600: clean up the GS ring buffers when the context is destroyed</li>
+  <li>glsl: free or reuse memory allocated for TF varying</li>
+</ul>
+
+<p>Jason Ekstrand (2):</p>
+<ul>
+  <li>nir/lower_alu_to_scalar: Don't try to lower unpack_32_2x16</li>
+  <li>anv: Put robust buffer access in the pipeline hash</li>
+</ul>
+
+<p>Juan A. Suarez Romero (6):</p>
+<ul>
+  <li>cherry-ignore: add explicit 18.3 only nominations</li>
+  <li>cherry-ignore: intel/aub_viewer: fix dynamic state printing</li>
+  <li>cherry-ignore: intel/aub_viewer: Print blend states properly</li>
+  <li>cherry-ignore: mesa/main: fix incorrect depth-error</li>
+  <li>docs: add sha256 checksums for 18.2.5</li>
+  <li>Update version to 18.2.6</li>
+</ul>
+
+<p>Karol Herbst (1):</p>
+<ul>
+  <li>nir/spirv: cast shift operand to u32</li>
+</ul>
+
+<p>Kenneth Graunke (1):</p>
+<ul>
+  <li>i965: Add PCI IDs for new Amberlake parts that are Coffeelake based</li>
+</ul>
+
+<p>Lionel Landwerlin (1):</p>
+<ul>
+  <li>egl/dri: fix error value with unknown drm format</li>
+</ul>
+
+<p>Marek Olšák (2):</p>
+<ul>
+  <li>winsys/amdgpu: fix a buffer leak in amdgpu_bo_from_handle</li>
+  <li>winsys/amdgpu: fix a device handle leak in amdgpu_winsys_create</li>
+</ul>
+
+<p>Rodrigo Vivi (4):</p>
+<ul>
+  <li>i965: Add a new CFL PCI ID.</li>
+  <li>intel: aubinator: Adding missed platforms to the error message.</li>
+  <li>intel: Introducing Amber Lake platform</li>
+  <li>intel: Introducing Whiskey Lake platform</li>
+</ul>
+
+
+</div>
+</body>
+</html>

docs/relnotes/18.2.7.html

@@ -0,0 +1,167 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 18.2.7 Release Notes / December 13, 2018</h1>
+
+<p>
+Mesa 18.2.7 is a bug fix release which fixes bugs found since the 18.2.6 release.
+</p>
+<p>
+Mesa 18.2.7 implements the OpenGL 4.5 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 4.5.  OpenGL
+4.5 is <strong>only</strong> available if requested at context creation.
+Compatibility contexts may report a lower version depending on each driver.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+092351cfbcd430ec595fbd3a3d8d253fd62c29074e1740d7198b00289ab400f8  mesa-18.2.7.tar.gz
+9c7b02560d89d77ca279cd21f36ea9a49e9ffc5611f6fe35099357d744d07ae6  mesa-18.2.7.tar.xz
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+
+<h2>Bug fixes</h2>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106577">Bug 106577</a> - broken rendering with nine and nouveau (GM107)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108245">Bug 108245</a> - RADV/Vega: Low mip levels of large BCn textures get corrupted by vkCmdCopyBufferToImage</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108311">Bug 108311</a> - Query buffer object support is broken on r600.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108894">Bug 108894</a> - [anv] vkCmdCopyBuffer() and vkCmdCopyQueryPoolResults() write-after-write hazard</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108909">Bug 108909</a> - Vkd3d test failure test_resolve_non_issued_query_data()</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108914">Bug 108914</a> - blocky shadow artifacts in The Forest with DXVK, RADV_DEBUG=nohiz fixes this</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108925">Bug 108925</a> - vkCmdCopyQueryPoolResults(VK_QUERY_RESULT_WAIT_BIT) for timestamps with large query count hangs</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Alex Smith (1):</p>
+<ul>
+  <li>radv: Flush before vkCmdWriteTimestamp() if needed</li>
+</ul>
+
+<p>Bas Nieuwenhuizen (4):</p>
+<ul>
+  <li>radv: Align large buffers to the fragment size.</li>
+  <li>radv: Clamp gfx9 image view extents to the allocated image extents.</li>
+  <li>radv/android: Mark android WSI image as shareable.</li>
+  <li>radv/android: Use buffer metadata to determine scanout compat.</li>
+</ul>
+
+<p>Dave Airlie (2):</p>
+<ul>
+  <li>r600: make suballocator 256-bytes align</li>
+  <li>radv: use 3d shader for gfx9 copies if dst is 3d</li>
+</ul>
+
+<p>Emil Velikov (2):</p>
+<ul>
+  <li>egl/wayland: bail out when drmGetMagic fails</li>
+  <li>egl/wayland: plug memory leak in drm_handle_device()</li>
+</ul>
+
+<p>Eric Anholt (3):</p>
+<ul>
+  <li>v3d: Fix a leak of the transfer helper on screen destroy.</li>
+  <li>vc4: Fix a leak of the transfer helper on screen destroy.</li>
+  <li>v3d: Fix a leak of the disassembled instruction string during debug dumps.</li>
+</ul>
+
+<p>Eric Engestrom (3):</p>
+<ul>
+  <li>anv: correctly use vulkan 1.0 by default</li>
+  <li>wsi/display: fix mem leak when freeing swapchains</li>
+  <li>vulkan/wsi: fix s/,/;/ typo</li>
+</ul>
+
+<p>Gurchetan Singh (3):</p>
+<ul>
+  <li>virgl: quadruple command buffer size</li>
+  <li>virgl: avoid large inline transfers</li>
+  <li>virgl: don't mark buffers as unclean after a write</li>
+</ul>
+
+<p>Juan A. Suarez Romero (4):</p>
+<ul>
+  <li>docs: add sha256 checksums for 18.2.6</li>
+  <li>cherry-ignore: freedreno: Fix autotools build.</li>
+  <li>cherry-ignore: mesa: Revert INTEL_fragment_shader_ordering support</li>
+  <li>Update version to 18.2.7</li>
+</ul>
+
+<p>Karol Herbst (1):</p>
+<ul>
+  <li>nv50,nvc0: Fix gallium nine regression regarding sampler bindings</li>
+</ul>
+
+<p>Lionel Landwerlin (2):</p>
+<ul>
+  <li>anv: flush pipeline before query result copies</li>
+  <li>anv/query: flush render target before copying results</li>
+</ul>
+
+<p>Michal Srb (2):</p>
+<ul>
+  <li>gallium: Constify drisw_loader_funcs struct</li>
+  <li>drisw: Use separate drisw_loader_funcs for shm</li>
+</ul>
+
+<p>Nicolai Hähnle (2):</p>
+<ul>
+  <li>egl/wayland: rather obvious build fix</li>
+  <li>meson: link LLVM 'native' component when LLVM is available</li>
+</ul>
+
+<p>Samuel Pitoiset (1):</p>
+<ul>
+  <li>radv: rework the TC-compat HTILE hardware bug with COND_EXEC</li>
+</ul>
+
+<p>Thomas Hellstrom (2):</p>
+<ul>
+  <li>st/xa: Fix a memory leak</li>
+  <li>winsys/svga: Fix a memory leak</li>
+</ul>
+
+<p>Tobias Klausmann (1):</p>
+<ul>
+  <li>amd/vulkan: meson build - use radv_deps for libvulkan_radeon</li>
+</ul>
+
+<p>Vinson Lee (1):</p>
+<ul>
+  <li>st/xvmc: Add X11 include path.</li>
+</ul>
+
+
+</div>
+</body>
+</html>

docs/relnotes/18.2.8.html

@@ -0,0 +1,183 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 18.2.8 Release Notes / December 27, 2018</h1>
+
+<p>
+Mesa 18.2.8 is a bug fix release which fixes bugs found since the 18.2.7 release.
+</p>
+<p>
+Mesa 18.2.8 implements the OpenGL 4.5 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 4.5.  OpenGL
+4.5 is <strong>only</strong> available if requested at context creation.
+Compatibility contexts may report a lower version depending on each driver.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+77512edc0a84e19c7131a0e2e5ebf1beaf1494dc4b71508fcc92d06d65f9f4f5  mesa-18.2.8.tar.gz
+1d2ed9fd435d86d95b7215b287258d3e6b1180293a36f688e5a2efc18298d863  mesa-18.2.8.tar.xz
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+
+<h2>Bug fixes</h2>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108114">Bug 108114</a> - [vulkancts] new VK_KHR_16bit_storage tests fail.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108116">Bug 108116</a> - [vulkancts] stencil partial clear tests fail.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108910">Bug 108910</a> - Vkd3d test failure test_multisample_array_texture()</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108911">Bug 108911</a> - Vkd3d test failure test_clear_render_target_view()</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109081">Bug 109081</a> - [bisected] [HSW] Regression in clipping.user_defined.clip_* vulkancts tests</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Alex Deucher (3):</p>
+<ul>
+  <li>pci_ids: add new vega10 pci ids</li>
+  <li>pci_ids: add new vega20 pci id</li>
+  <li>pci_ids: add new VegaM pci id</li>
+</ul>
+
+<p>Axel Davy (3):</p>
+<ul>
+  <li>st/nine: Fix volumetexture dtor on ctor failure</li>
+  <li>st/nine: Bind src not dst in nine_context_box_upload</li>
+  <li>st/nine: Add src reference to nine_context_range_upload</li>
+</ul>
+
+<p>Caio Marcelo de Oliveira Filho (1):</p>
+<ul>
+  <li>nir: properly clear the entry sources in copy_prop_vars</li>
+</ul>
+
+<p>Dylan Baker (1):</p>
+<ul>
+  <li>meson: Fix ppc64 little endian detection</li>
+</ul>
+
+<p>Emil Velikov (9):</p>
+<ul>
+  <li>glx: mandate xf86vidmode only for "drm" dri platforms</li>
+  <li>bin/get-pick-list.sh: rework handing of sha nominations</li>
+  <li>bin/get-pick-list.sh: warn when commit lists invalid sha</li>
+  <li>meson: don't require glx/egl/gbm with gallium drivers</li>
+  <li>pipe-loader: meson: reference correct library</li>
+  <li>TODO: glx: meson: build dri based glx tests, only with -Dglx=dri</li>
+  <li>glx: meson: drop includes from a link-only library</li>
+  <li>glx: meson: wire up the dispatch-index-check test</li>
+  <li>glx/test: meson: assorted include fixes</li>
+</ul>
+
+<p>Eric Anholt (2):</p>
+<ul>
+  <li>v3d: Make sure that a thrsw doesn't split a multop from its umul24.</li>
+  <li>v3d: Add missing flagging of SYNCB as a TSY op.</li>
+</ul>
+
+<p>Erik Faye-Lund (2):</p>
+<ul>
+  <li>virgl: wrap vertex element state in a struct</li>
+  <li>virgl: work around bad assumptions in virglrenderer</li>
+</ul>
+
+<p>Iago Toral Quiroga (1):</p>
+<ul>
+  <li>intel/compiler: do not copy-propagate strided regions to ddx/ddy arguments</li>
+</ul>
+
+<p>Ian Romanick (2):</p>
+<ul>
+  <li>i965/vec4/dce: Don't narrow the write mask if the flags are used</li>
+  <li>Revert "nir/lower_indirect: Bail early if modes == 0"</li>
+</ul>
+
+<p>Jan Vesely (1):</p>
+<ul>
+  <li>clover: Fix build after clang r348827</li>
+</ul>
+
+<p>Jason Ekstrand (1):</p>
+<ul>
+  <li>nir/constant_folding: Fix source bit size logic</li>
+</ul>
+
+<p>Jon Turney (1):</p>
+<ul>
+  <li>glx: Fix compilation with GLX_USE_WINDOWSGL</li>
+</ul>
+
+<p>Juan A. Suarez Romero (7):</p>
+<ul>
+  <li>docs: add sha256 checksums for 18.2.7</li>
+  <li>cherry-ignore: add explicit 18.3 only nominations</li>
+  <li>cherry-ignore: meson: libfreedreno depends upon libdrm (for fence support)</li>
+  <li>cherry-ignore: radv: Fix multiview depth clears</li>
+  <li>cherry-ignore: nir: properly find the entry to keep in copy_prop_vars</li>
+  <li>cherry-ignore: intel/compiler: move nir_lower_bool_to_int32 before nir_lower_locals_to_regs</li>
+  <li>Update version to 18.2.8</li>
+</ul>
+
+<p>Kirill Burtsev (1):</p>
+<ul>
+  <li>loader: free error state, when checking the drawable type</li>
+</ul>
+
+<p>Lionel Landwerlin (1):</p>
+<ul>
+  <li>anv: don't do partial resolve on layer &gt; 0</li>
+</ul>
+
+<p>Rhys Perry (2):</p>
+<ul>
+  <li>radv: don't set surf_index for stencil-only images</li>
+  <li>ac: split 16-bit ssbo loads that may not be dword aligned</li>
+</ul>
+
+<p>Rob Clark (1):</p>
+<ul>
+  <li>mesa/st/nir: fix missing nir_compact_varyings</li>
+</ul>
+
+<p>Samuel Pitoiset (1):</p>
+<ul>
+  <li>radv: switch on EOP when primitive restart is enabled with triangle strips</li>
+</ul>
+
+<p>Vinson Lee (2):</p>
+<ul>
+  <li>meson: Fix typo.</li>
+  <li>meson: Fix libsensors detection.</li>
+</ul>
+
+
+</div>
+</body>
+</html>

docs/relnotes/18.3.0.html

@@ -1,85 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<html lang="en">
-<head>
-  <meta http-equiv="content-type" content="text/html; charset=utf-8">
-  <title>Mesa Release Notes</title>
-  <link rel="stylesheet" type="text/css" href="../mesa.css">
-</head>
-<body>
-
-<div class="header">
-  <h1>The Mesa 3D Graphics Library</h1>
-</div>
-
-<iframe src="../contents.html"></iframe>
-<div class="content">
-
-<h1>Mesa 18.3.0 Release Notes / TBD</h1>
-
-<p>
-Mesa 18.3.0 is a new development release. People who are concerned
-with stability and reliability should stick with a previous release or
-wait for Mesa 18.3.1.
-</p>
-<p>
-Mesa 18.3.0 implements the OpenGL 4.5 API, but the version reported by
-glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
-glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
-Some drivers don't support all the features required in OpenGL 4.5.  OpenGL
-4.5 is <strong>only</strong> available if requested at context creation.
-Compatibility contexts may report a lower version depending on each driver.
-</p>
-
-<p>
-libwayland-egl is now distributed by Wayland (since 1.15,
-<a href="https://lists.freedesktop.org/archives/wayland-devel/2018-April/037767.html">see announcement</a>),
-and has been removed from Mesa in this release. Make sure you're using
-an up-to-date version of Wayland to keep the functionality.
-</p>
-
-
-<h2>SHA256 checksums</h2>
-<pre>
-TBD.
-</pre>
-
-
-<h2>New features</h2>
-
-<p>
-Note: some of the new features are only available with certain drivers.
-</p>
-
-<ul>
-<li>GL_AMD_depth_clamp_separate on r600, radeonsi.</li>
-<li>GL_AMD_framebuffer_multisample_advanced on radeonsi.</li>
-<li>GL_AMD_gpu_shader_int64 on i965, nvc0, radeonsi.</li>
-<li>GL_AMD_multi_draw_indirect on all GL 4.x drivers.</li>
-<li>GL_AMD_query_buffer_object on i965, nvc0, r600, radeonsi.</li>
-<li>GL_EXT_disjoint_timer_query on radeonsi and most other Gallium drivers (ES extension)</li>
-<li>GL_EXT_texture_compression_s3tc on all drivers (ES extension)<li>
-<li>GL_EXT_vertex_attrib_64bit on i965, nvc0, radeonsi.</li>
-<li>GL_EXT_window_rectangles on radeonsi.</li>
-<li>GL_KHR_texture_compression_astc_sliced_3d on radeonsi.</li>
-<li>GL_INTEL_fragment_shader_ordering on i965.</li>
-<li>GL_NV_fragment_shader_interlock on i965.</li>
-<li>EGL_EXT_device_base for all drivers.</li>
-<li>EGL_EXT_device_drm for all drivers.</li>
-<li>EGL_MESA_device_software for all drivers.</li>
-</ul>
-
-<h2>Bug fixes</h2>
-
-<ul>
-<li>TBD</li>
-</ul>
-
-<h2>Changes</h2>
-
-<ul>
-<li>TBD</li>
-</ul>
-
-</div>
-</body>
-</html>

docs/repository.html

@@ -35,9 +35,9 @@ You may access the repository either as an
 
 <p>
 You may also 
-<a href="https://gitlab.freedesktop.org/mesa/mesa"
+<a href="https://cgit.freedesktop.org/mesa/mesa/"
 >browse the main Mesa git repository</a> and the
-<a href="https://gitlab.freedesktop.org/mesa/demos"
+<a href="https://cgit.freedesktop.org/mesa/demos"
 >Mesa demos and tests git repository</a>.
 </p>
 
@@ -52,7 +52,7 @@ To get the Mesa sources anonymously (read-only):
 <li>Install the git software on your computer if needed.<br><br>
 <li>Get an initial, local copy of the repository with:
     <pre>
-    git clone https://gitlab.freedesktop.org/mesa/mesa.git
+    git clone git://anongit.freedesktop.org/git/mesa/mesa
     </pre>
 <li>Later, you can update your tree from the master repository with:
     <pre>
@@ -60,7 +60,7 @@ To get the Mesa sources anonymously (read-only):
     </pre>
 <li>If you also want the Mesa demos/tests repository:
     <pre>
-    git clone https://gitlab.freedesktop.org/mesa/demos.git
+    git clone git://anongit.freedesktop.org/git/mesa/demos
     </pre>
 </ol>
 
@@ -98,17 +98,24 @@ on a particular driver, add a new extension, etc.) in the bugzilla record.
 </ol>
 
 <p>
-Once your account is established, you can update your push url to use SSH:
-<pre>
-git remote set-url --push <em>origin</em> git@gitlab.freedesktop.org:mesa/mesa.git
-</pre>
+Once your account is established:
+</p>
 
-You can also use <a href="https://gitlab.freedesktop.org/profile/personal_access_tokens">personal access tokens</a>
-to push over HTTPS instead (useful for people behind strict proxies).
-In this case, create a token, and put it in the url as shown here:
-<pre>
-git remote set-url --push <em>origin</em> https://<em>USER</em>:<em>TOKEN</em>@gitlab.freedesktop.org/mesa/mesa.git
-</pre>
+<ol>
+<li>Get an initial, local copy of the repository with:
+    <pre>
+    git clone git+ssh://username@git.freedesktop.org/git/mesa/mesa
+    </pre>
+    Replace <em>username</em> with your actual login name.<br><br>
+<li>Later, you can update your tree from the master repository with:
+    <pre>
+    git pull origin
+    </pre>
+<li>If you also want the Mesa demos/tests repository:
+    <pre>
+    git clone git+ssh://username@git.freedesktop.org/git/mesa/demos
+    </pre>
+</ol>
 
 
 <h2>Windows Users</h2>
@@ -142,12 +149,12 @@ code while a branch has the latest stable code.
 </p>
 
 <p>
-The command <code>git branch</code> will list all available branches.
+The command <code>git-branch</code> will list all available branches.
 </p>
 
 <p>
 Questions about branch status/activity should be posted to the
-mesa-dev mailing list.
+mesa3d-dev mailing list.
 </p>
 
 <h2>Developer Git Tips</h2>

docs/shading.html

@@ -85,7 +85,7 @@ should match the filenames of the corresponding dumped shaders.
 <p>
 Setting <b>MESA_SHADER_CAPTURE_PATH</b> to a directory will cause the compiler
 to write <tt>.shader_test</tt> files for use with
-<a href="https://gitlab.freedesktop.org/mesa/shader-db">shader-db</a>, a tool
+<a href="https://cgit.freedesktop.org/mesa/shader-db">shader-db</a>, a tool
 which compiler developers can use to gather statistics about shaders
 (instructions, cycles, memory accesses, and so on).
 </p>

docs/sourcedocs.html

@@ -31,7 +31,7 @@ the <code>doxygen</code> directory and run <code>make</code>.
 
 <p>
 For an example of Doxygen usage in Mesa, see a recent source file
-such as <a href="https://gitlab.freedesktop.org/mesa/mesa/blob/master/src/mesa/main/bufferobj.c">bufferobj.c</a>.
+such as <a href="https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/main/bufferobj.c">bufferobj.c</a>.
 </p>
 
 

docs/specs/EGL_MESA_device_software.txt

@@ -1,82 +0,0 @@
-Name
-
-    MESA_device_software
-
-Name Strings
-
-    EGL_MESA_device_software
-
-Contributors
-
-    Adam Jackson <ajax@redhat.com>
-    Emil Velikov <emil.velikov@collabora.com>
-
-Contacts
-
-    Adam Jackson <ajax@redhat.com>
-
-Status
-
-    DRAFT
-
-Version
-
-    Version 2, 2018-10-03
-
-Number
-
-    EGL Extension #TODO
-
-Extension Type
-
-    EGL device extension
-
-Dependencies
-
-    Requires EGL_EXT_device_query.
-
-    This extension is written against the EGL 1.5 Specification.
-
-Overview
-
-    This extension defines a software EGL "device". The device is not backed by
-    any actual device node and simply renders into client memory.
-
-    By defining this as an extension, EGL_EXT_device_enumeration is able to
-    sanely enumerate a software device.
-
-New Types
-
-    None
-
-New Procedures and Functions
-
-    None
-
-New Tokens
-
-    None
-
-Additions to the EGL Specification
-
-    None
-
-New Behavior
-
-    The device list produced by eglQueryDevicesEXT will include a software
-    device. This can be distinguished from other device classes in the usual
-    way by calling eglQueryDeviceStringEXT(EGL_EXTENSIONS) and matching this
-    extension's string in the result.
-
-Issues
-
-    None
-
-Revision History
-
-    Version 2, 2018-10-03 (Emil Velikov)
-        - Drop "fallback" from "software fallback device"
-        - Add Emil Velikov as contributor
-
-    Version 1, 2017-07-06 (Adam Jackson)
-        - Initial version

docs/specs/INTEL_shader_atomic_float_minmax.txt

@@ -1,200 +0,0 @@
-Name
-
-    INTEL_shader_atomic_float_minmax
-
-Name Strings
-
-    GL_INTEL_shader_atomic_float_minmax
-
-Contact
-
-    Ian Romanick (ian . d . romanick 'at' intel . com)
-
-Contributors
-
-
-Status
-
-    In progress
-
-Version
-
-    Last Modified Date: 06/22/2018
-    Revision: 4
-
-Number
-
-    TBD
-
-Dependencies
-
-    OpenGL 4.2, OpenGL ES 3.1, ARB_shader_storage_buffer_object, or
-    ARB_compute_shader is required.
-
-    This extension is written against version 4.60 of the OpenGL Shading
-    Language Specification.
-
-Overview
-
-    This extension provides GLSL built-in functions allowing shaders to
-    perform atomic read-modify-write operations to floating-point buffer
-    variables and shared variables.  Minimum, maximum, exchange, and
-    compare-and-swap are enabled.
-
-
-New Procedures and Functions
-
-    None.
-
-New Tokens
-
-    None.
-
-IP Status
-
-    None.
-
-Modifications to the OpenGL Shading Language Specification, Version 4.60
-
-    Including the following line in a shader can be used to control the
-    language features described in this extension:
-
-      #extension GL_INTEL_shader_atomic_float_minmax : <behavior>
-
-    where <behavior> is as specified in section 3.3.
-
-    New preprocessor #defines are added to the OpenGL Shading Language:
-
-      #define GL_INTEL_shader_atomic_float_minmax   1
-
-Additions to Chapter 8 of the OpenGL Shading Language Specification
-(Built-in Functions)
-
-    Modify Section 8.11, "Atomic Memory Functions"
-
-    (add a new row after the existing "atomicMin" table row, p. 179)
-
-        float atomicMin(inout float mem, float data)
-
-
-        Computes a new value by taking the minimum of the value of data and
-        the contents of mem.  If one of these is an IEEE signaling NaN (i.e.,
-        a NaN with the most-significant bit of the mantissa cleared), it is
-        always considered smaller.  If one of these is an IEEE quiet NaN
-        (i.e., a NaN with the most-significant bit of the mantissa set), it is
-        always considered larger.  If both are IEEE quiet NaNs or both are
-        IEEE signaling NaNs, the result of the comparison is undefined.
-
-    (add a new row after the exiting "atomicMax" table row, p. 179)
-
-        float atomicMax(inout float mem, float data)
-
-        Computes a new value by taking the maximum of the value of data and
-        the contents of mem.  If one of these is an IEEE signaling NaN (i.e.,
-        a NaN with the most-significant bit of the mantissa cleared), it is
-        always considered larger.  If one of these is an IEEE quiet NaN (i.e.,
-        a NaN with the most-significant bit of the mantissa set), it is always
-        considered smaller.  If both are IEEE quiet NaNs or both are IEEE
-        signaling NaNs, the result of the comparison is undefined.
-
-    (add to "atomicExchange" table cell, p. 180)
-
-        float atomicExchange(inout float mem, float data)
-
-    (add to "atomicCompSwap" table cell, p. 180)
-
-        float atomicCompSwap(inout float mem, float compare, float data)
-
-Interactions with OpenGL 4.6 and ARB_gl_spirv
-
-    If OpenGL 4.6 or ARB_gl_spirv is supported, then
-    SPV_INTEL_shader_atomic_float_minmax must also be supported.
-
-    The AtomicFloatMinmaxINTEL capability is available whenever the OpenGL or
-    OpenGL ES implementation supports INTEL_shader_atomic_float_minmax.
-
-Issues
-
-    1) Why call this extension INTEL_shader_atomic_float_minmax?
-
-    RESOLVED: Several other extensions already set the precedent of
-    VENDOR_shader_atomic_float and VENDOR_shader_atomic_float64 for extensions
-    that enable floating-point atomic operations.  Using that as a base for
-    the name seems logical.
-
-    There already exists NV_shader_atomic_float, but the two extensions have
-    nearly zero overlap in functionality.  NV_shader_atomic_float adds
-    atomicAdd and image atomic operations that currently shipping Intel GPUs
-    do not support.  Calling this extension INTEL_shader_atomic_float would
-    likely have been confusing.
-
-    Adding something to describe the actual functions added by this extension
-    seemed reasonable.  INTEL_shader_atomic_float_compare was considered, but
-    that name was deemed to be not properly descriptive.  Calling this
-    extension INTEL_shader_atomic_float_min_max_exchange_compswap is right
-    out.
-
-    2) What atomic operations should we support for floating-point targets?
-
-    RESOLVED.  Exchange, min, max, and compare-swap make sense, and these are
-    all supported by the hardware.  Future extensions may add other functions.
-
-    For buffer variables and shared variables it is not possible to bit-cast
-    the memory location in GLSL, so existing integer operations, such as
-    atomicOr, cannot be used.  However, the underlying hardware implementation
-    can do this by treating the memory as an integer.  It would be possible to
-    implement atomicNegate using this technique with atomicXor.  It is unclear
-    whether this provides any actual utility.
-
-    3) What should be said about the NaN behavior?
-
-    RESOLVED.  There are several aspects of NaN behavior that should be
-    documented in this extension.  However, some of this behavior varies based
-    on NaN concepts that do not exist in the GLSL specification.
-
-    * atomicCompSwap performs the comparison as the floating-point equality
-      operator (==).  That is, if either 'mem' or 'compare' is NaN, the
-      comparison result is always false.
-
-    * atomicMin and atomicMax implement the IEEE specification with respect to
-      NaN.  IEEE considers two different kinds of NaN: signaling NaN and quiet
-      NaN.  A quiet NaN has the most significant bit of the mantissa set, and
-      a signaling NaN does not.  This concept does not exist in SPIR-V,
-      Vulkan, or OpenGL.  Let qNaN denote a quiet NaN and sNaN denote a
-      signaling NaN.  atomicMin and atomicMax specifically implement
-
-      - fmin(qNaN, x) = fmin(x, qNaN) = fmax(qNaN, x) = fmax(x, qNaN) = x
-      - fmin(sNaN, x) = fmin(x, sNaN) = fmax(sNaN, x) = fmax(x, sNaN) = sNaN
-      - fmin(sNaN, qNaN) = fmin(qNaN, sNaN) = fmax(sNaN, qNaN) =
-        fmax(qNaN, sNaN) = sNaN
-      - fmin(sNaN, sNaN) = sNaN.  This specification does not define which of
-        the two arguments is stored.
-      - fmax(sNaN, sNaN) = sNaN.  This specification does not define which of
-        the two arguments is stored.
-      - fmin(qNaN, qNaN) = qNaN.  This specification does not define which of
-        the two arguments is stored.
-      - fmax(qNaN, qNaN) = qNaN.  This specification does not define which of
-        the two arguments is stored.
-
-    Further details are available in the Skylake Programmer's Reference
-    Manuals available at
-    https://01.org/linuxgraphics/documentation/hardware-specification-prms.
-
-    4) What about atomicMin and atomicMax with (+0.0, -0.0) or (-0.0, +0.0)
-    arguments?
-
-    RESOLVED.  atomicMin should store -0.0, and atomicMax should store +0.0.
-    Due to a known issue in shipping Skylake GPUs, the incorrectly signed 0 is
-    stored.  This behavior may change in later GPUs.
-
-Revision History
-
-    Rev  Date        Author    Changes
-    ---  ----------  --------  ---------------------------------------------
-      1  04/19/2018  idr       Initial version
-      2  05/05/2018  idr       Describe interactions with the capabilities
-                               added by SPV_INTEL_shader_atomic_float_minmax.
-      3  05/29/2018  idr       Remove mention of 64-bit float support.
-      4  06/22/2018  idr       Resolve issue #2.
-                               Add issue #3 (regarding NaN behavior).
-                               Add issue #4 (regarding atomicMin(-0, +0).

docs/submittingpatches.html

@@ -251,9 +251,6 @@ If you are not the author of the original patch, please Cc: them in your
 nomination request.
 </p>
 
-<p>
-The current patch status can be observed in the <a href="releasing.html#stagingbranch">staging branch</a>.
-</p>
 
 <h3 id="thetag">The stable tag</h3>
 

docs/utilities.html

@@ -17,7 +17,7 @@
 <h1>Development Utilities</h1>
 
 <dl>
-  <dt><a href="https://gitlab.freedesktop.org/mesa/demos">Mesa demos collection</a></dt>
+  <dt><a href="https://cgit.freedesktop.org/mesa/demos">Mesa demos collection</a></dt>
   <dd>includes several utility routines in the <code>src/util/</code>
   directory.</dd>
 

docs/vmware-guest.html

@@ -43,23 +43,6 @@ This requires:
 Otherwise, OpenGL 2.1 is supported.
 </p>
 
-<p>
-With the Fall 2018 Workstation 15 / Fusion 11 releases, additional
-features are supported in the driver:
-<ul>
-<li>Multisample antialiasing (2x, 4x)
-<li>GL_ARB/AMD_draw_buffers_blend
-<li>GL_ARB_sample_shading
-<li>GL_ARB_texture_cube_map_array
-<li>GL_ARB_texture_gather
-<li>GL_ARB_texture_query_lod
-<li>GL_EXT/OES_draw_buffers_indexed
-</ul>
-<p>
-This requires version 2.15.0 or later of the vmwgfx kernel module and
-the VM must be configured for hardware version 16 or later.
-</p>
-
 <p>
 OpenGL 3.3 support can be disabled by setting the environment variable
 SVGA_VGPU10=0.
@@ -143,7 +126,7 @@ Begin by saving your current directory location:
 <ul>
 <li>Mesa/Gallium master branch. This code is used to build libGL, and the direct rendering svga driver for libGL, vmwgfx_dri.so, and the X acceleration library libxatracker.so.x.x.x. 
   <pre>
-  git clone https://gitlab.freedesktop.org/mesa/mesa.git
+  git clone git://anongit.freedesktop.org/git/mesa/mesa
   </pre>
 <li>VMware Linux guest kernel module. Note that this repo contains the complete DRM and TTM code. The vmware-specific driver is really only the files prefixed with vmwgfx. 
   <pre>
@@ -153,7 +136,7 @@ Begin by saving your current directory location:
 Most distros ship with this but it's safest to install a newer version.
 To get the latest code from git:
   <pre>
-  git clone https://gitlab.freedesktop.org/mesa/drm.git
+  git clone git://anongit.freedesktop.org/git/mesa/drm
   </pre>
 <li>xf86-video-vmware. The chainloading driver, vmware_drv.so, the legacy driver vmwlegacy_drv.so, and the vmwgfx driver vmwgfx_drv.so. 
   <pre>

include/EGL/eglext.h

@@ -33,12 +33,12 @@ extern "C" {
 ** used to make the header, and the header can be found at
 **   http://www.khronos.org/registry/egl
 **
-** Khronos $Git commit SHA1: bae3518c48 $ on $Git commit date: 2018-05-17 10:56:57 -0700 $
+** Khronos $Git commit SHA1: a732b061e7 $ on $Git commit date: 2017-06-17 23:27:53 +0100 $
 */
 
 #include <EGL/eglplatform.h>
 
-#define EGL_EGLEXT_VERSION 20180517
+#define EGL_EGLEXT_VERSION 20170627
 
 /* Generated C header for:
  * API: egl
@@ -495,47 +495,6 @@ EGLAPI EGLClientBuffer EGLAPIENTRY eglCreateNativeClientBufferANDROID (const EGL
 #define EGL_FRONT_BUFFER_AUTO_REFRESH_ANDROID 0x314C
 #endif /* EGL_ANDROID_front_buffer_auto_refresh */
 
-#ifndef EGL_ANDROID_get_frame_timestamps
-#define EGL_ANDROID_get_frame_timestamps 1
-typedef khronos_stime_nanoseconds_t EGLnsecsANDROID;
-#define EGL_TIMESTAMP_PENDING_ANDROID     EGL_CAST(EGLnsecsANDROID,-2)
-#define EGL_TIMESTAMP_INVALID_ANDROID     EGL_CAST(EGLnsecsANDROID,-1)
-#define EGL_TIMESTAMPS_ANDROID            0x3430
-#define EGL_COMPOSITE_DEADLINE_ANDROID    0x3431
-#define EGL_COMPOSITE_INTERVAL_ANDROID    0x3432
-#define EGL_COMPOSITE_TO_PRESENT_LATENCY_ANDROID 0x3433
-#define EGL_REQUESTED_PRESENT_TIME_ANDROID 0x3434
-#define EGL_RENDERING_COMPLETE_TIME_ANDROID 0x3435
-#define EGL_COMPOSITION_LATCH_TIME_ANDROID 0x3436
-#define EGL_FIRST_COMPOSITION_START_TIME_ANDROID 0x3437
-#define EGL_LAST_COMPOSITION_START_TIME_ANDROID 0x3438
-#define EGL_FIRST_COMPOSITION_GPU_FINISHED_TIME_ANDROID 0x3439
-#define EGL_DISPLAY_PRESENT_TIME_ANDROID  0x343A
-#define EGL_DEQUEUE_READY_TIME_ANDROID    0x343B
-#define EGL_READS_DONE_TIME_ANDROID       0x343C
-typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETCOMPOSITORTIMINGSUPPORTEDANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLint name);
-typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETCOMPOSITORTIMINGANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLint numTimestamps,  const EGLint *names, EGLnsecsANDROID *values);
-typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETNEXTFRAMEIDANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLuint64KHR *frameId);
-typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETFRAMETIMESTAMPSUPPORTEDANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLint timestamp);
-typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETFRAMETIMESTAMPSANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLuint64KHR frameId, EGLint numTimestamps,  const EGLint *timestamps, EGLnsecsANDROID *values);
-#ifdef EGL_EGLEXT_PROTOTYPES
-EGLAPI EGLBoolean EGLAPIENTRY eglGetCompositorTimingSupportedANDROID (EGLDisplay dpy, EGLSurface surface, EGLint name);
-EGLAPI EGLBoolean EGLAPIENTRY eglGetCompositorTimingANDROID (EGLDisplay dpy, EGLSurface surface, EGLint numTimestamps,  const EGLint *names, EGLnsecsANDROID *values);
-EGLAPI EGLBoolean EGLAPIENTRY eglGetNextFrameIdANDROID (EGLDisplay dpy, EGLSurface surface, EGLuint64KHR *frameId);
-EGLAPI EGLBoolean EGLAPIENTRY eglGetFrameTimestampSupportedANDROID (EGLDisplay dpy, EGLSurface surface, EGLint timestamp);
-EGLAPI EGLBoolean EGLAPIENTRY eglGetFrameTimestampsANDROID (EGLDisplay dpy, EGLSurface surface, EGLuint64KHR frameId, EGLint numTimestamps,  const EGLint *timestamps, EGLnsecsANDROID *values);
-#endif
-#endif /* EGL_ANDROID_get_frame_timestamps */
-
-#ifndef EGL_ANDROID_get_native_client_buffer
-#define EGL_ANDROID_get_native_client_buffer 1
-struct AHardwareBuffer;
-typedef EGLClientBuffer (EGLAPIENTRYP PFNEGLGETNATIVECLIENTBUFFERANDROIDPROC) (const struct AHardwareBuffer *buffer);
-#ifdef EGL_EGLEXT_PROTOTYPES
-EGLAPI EGLClientBuffer EGLAPIENTRY eglGetNativeClientBufferANDROID (const struct AHardwareBuffer *buffer);
-#endif
-#endif /* EGL_ANDROID_get_native_client_buffer */
-
 #ifndef EGL_ANDROID_image_native_buffer
 #define EGL_ANDROID_image_native_buffer 1
 #define EGL_NATIVE_BUFFER_ANDROID         0x3140
@@ -555,6 +514,7 @@ EGLAPI EGLint EGLAPIENTRY eglDupNativeFenceFDANDROID (EGLDisplay dpy, EGLSyncKHR
 
 #ifndef EGL_ANDROID_presentation_time
 #define EGL_ANDROID_presentation_time 1
+typedef khronos_stime_nanoseconds_t EGLnsecsANDROID;
 typedef EGLBoolean (EGLAPIENTRYP PFNEGLPRESENTATIONTIMEANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLnsecsANDROID time);
 #ifdef EGL_EGLEXT_PROTOTYPES
 EGLAPI EGLBoolean EGLAPIENTRY eglPresentationTimeANDROID (EGLDisplay dpy, EGLSurface surface, EGLnsecsANDROID time);
@@ -618,16 +578,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurfacePointerANGLE (EGLDisplay dpy, EGLSu
 #define EGL_EXT_client_extensions 1
 #endif /* EGL_EXT_client_extensions */
 
-#ifndef EGL_EXT_client_sync
-#define EGL_EXT_client_sync 1
-#define EGL_SYNC_CLIENT_EXT               0x3364
-#define EGL_SYNC_CLIENT_SIGNAL_EXT        0x3365
-typedef EGLBoolean (EGLAPIENTRYP PFNEGLCLIENTSIGNALSYNCEXTPROC) (EGLDisplay dpy, EGLSync sync, const EGLAttrib *attrib_list);
-#ifdef EGL_EGLEXT_PROTOTYPES
-EGLAPI EGLBoolean EGLAPIENTRY eglClientSignalSyncEXT (EGLDisplay dpy, EGLSync sync, const EGLAttrib *attrib_list);
-#endif
-#endif /* EGL_EXT_client_sync */
-
 #ifndef EGL_EXT_compositor
 #define EGL_EXT_compositor 1
 #define EGL_PRIMARY_COMPOSITOR_CONTEXT_EXT 0x3460
@@ -773,11 +723,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQueryDmaBufModifiersEXT (EGLDisplay dpy, EGLint
 #endif
 #endif /* EGL_EXT_image_dma_buf_import_modifiers */
 
-#ifndef EGL_EXT_image_gl_colorspace
-#define EGL_EXT_image_gl_colorspace 1
-#define EGL_GL_COLORSPACE_DEFAULT_EXT     0x314D
-#endif /* EGL_EXT_image_gl_colorspace */
-
 #ifndef EGL_EXT_image_implicit_sync_control
 #define EGL_EXT_image_implicit_sync_control 1
 #define EGL_IMPORT_SYNC_TYPE_EXT          0x3470
@@ -913,14 +858,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffersWithDamageEXT (EGLDisplay dpy, EGLSu
 #endif
 #endif /* EGL_EXT_swap_buffers_with_damage */
 
-#ifndef EGL_EXT_sync_reuse
-#define EGL_EXT_sync_reuse 1
-typedef EGLBoolean (EGLAPIENTRYP PFNEGLUNSIGNALSYNCEXTPROC) (EGLDisplay dpy, EGLSync sync, const EGLAttrib *attrib_list);
-#ifdef EGL_EGLEXT_PROTOTYPES
-EGLAPI EGLBoolean EGLAPIENTRY eglUnsignalSyncEXT (EGLDisplay dpy, EGLSync sync, const EGLAttrib *attrib_list);
-#endif
-#endif /* EGL_EXT_sync_reuse */
-
 #ifndef EGL_EXT_yuv_surface
 #define EGL_EXT_yuv_surface 1
 #define EGL_YUV_ORDER_EXT                 0x3301
@@ -1051,11 +988,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffersRegion2NOK (EGLDisplay dpy, EGLSurfa
 #define EGL_AUTO_STEREO_NV                0x3136
 #endif /* EGL_NV_3dvision_surface */
 
-#ifndef EGL_NV_context_priority_realtime
-#define EGL_NV_context_priority_realtime 1
-#define EGL_CONTEXT_PRIORITY_REALTIME_NV  0x3357
-#endif /* EGL_NV_context_priority_realtime */
-
 #ifndef EGL_NV_coverage_sample
 #define EGL_NV_coverage_sample 1
 #define EGL_COVERAGE_BUFFERS_NV           0x30E0
@@ -1123,9 +1055,9 @@ EGLAPI EGLBoolean EGLAPIENTRY eglPostSubBufferNV (EGLDisplay dpy, EGLSurface sur
 #define EGL_YUV_PLANE0_TEXTURE_UNIT_NV    0x332C
 #define EGL_YUV_PLANE1_TEXTURE_UNIT_NV    0x332D
 #define EGL_YUV_PLANE2_TEXTURE_UNIT_NV    0x332E
-typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMCONSUMERGLTEXTUREEXTERNALATTRIBSNVPROC) (EGLDisplay dpy, EGLStreamKHR stream, const EGLAttrib *attrib_list);
+typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMCONSUMERGLTEXTUREEXTERNALATTRIBSNVPROC) (EGLDisplay dpy, EGLStreamKHR stream, EGLAttrib *attrib_list);
 #ifdef EGL_EGLEXT_PROTOTYPES
-EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerGLTextureExternalAttribsNV (EGLDisplay dpy, EGLStreamKHR stream, const EGLAttrib *attrib_list);
+EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerGLTextureExternalAttribsNV (EGLDisplay dpy, EGLStreamKHR stream, EGLAttrib *attrib_list);
 #endif
 #endif /* EGL_NV_stream_consumer_gltexture_yuv */
 
@@ -1165,14 +1097,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerGLTextureExternalAttribsNV (EGLDi
 #define EGL_STREAM_FIFO_SYNCHRONOUS_NV    0x3336
 #endif /* EGL_NV_stream_fifo_synchronous */
 
-#ifndef EGL_NV_stream_flush
-#define EGL_NV_stream_flush 1
-typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMFLUSHNVPROC) (EGLDisplay dpy, EGLStreamKHR stream);
-#ifdef EGL_EGLEXT_PROTOTYPES
-EGLAPI EGLBoolean EGLAPIENTRY eglStreamFlushNV (EGLDisplay dpy, EGLStreamKHR stream);
-#endif
-#endif /* EGL_NV_stream_flush */
-
 #ifndef EGL_NV_stream_frame_limits
 #define EGL_NV_stream_frame_limits 1
 #define EGL_PRODUCER_MAX_FRAME_HINT_NV    0x3337

include/GL/gl.h

@@ -2086,7 +2086,7 @@ typedef void (APIENTRYP PFNGLBLENDEQUATIONSEPARATEATIPROC) (GLenum modeRGB, GLen
 
 
 /* GL_OES_EGL_image */
-#if !defined(GL_OES_EGL_image) && !defined(GL_EXT_EGL_image_storage)
+#ifndef GL_OES_EGL_image
 typedef void* GLeglImageOES;
 #endif
 

include/GL/internal/dri_interface.h

@@ -746,8 +746,7 @@ struct __DRIuseInvalidateExtensionRec {
 #define __DRI_ATTRIB_BIND_TO_TEXTURE_TARGETS	46
 #define __DRI_ATTRIB_YINVERTED			47
 #define __DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE	48
-#define __DRI_ATTRIB_MUTABLE_RENDER_BUFFER	49 /* EGL_MUTABLE_RENDER_BUFFER_BIT_KHR */
-#define __DRI_ATTRIB_MAX			50
+#define __DRI_ATTRIB_MAX			(__DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE + 1)
 
 /* __DRI_ATTRIB_RENDER_TYPE */
 #define __DRI_ATTRIB_RGBA_BIT			0x01	
@@ -1889,57 +1888,9 @@ struct __DRI2rendererQueryExtensionRec {
  * Image Loader extension. Drivers use this to allocate color buffers
  */
 
-/**
- * See __DRIimageLoaderExtensionRec::getBuffers::buffer_mask.
- */
 enum __DRIimageBufferMask {
    __DRI_IMAGE_BUFFER_BACK = (1 << 0),
-   __DRI_IMAGE_BUFFER_FRONT = (1 << 1),
-
-   /**
-    * A buffer shared between application and compositor. The buffer may be
-    * simultaneously accessed by each.
-    *
-    * A shared buffer is equivalent to an EGLSurface whose EGLConfig contains
-    * EGL_MUTABLE_RENDER_BUFFER_BIT_KHR and whose active EGL_RENDER_BUFFER (as
-    * opposed to any pending, requested change to EGL_RENDER_BUFFER) is
-    * EGL_SINGLE_BUFFER.
-    *
-    * If buffer_mask contains __DRI_IMAGE_BUFFER_SHARED, then must contains no
-    * other bits. As a corollary, a __DRIdrawable that has a "shared" buffer
-    * has no front nor back buffer.
-    *
-    * The loader returns __DRI_IMAGE_BUFFER_SHARED in buffer_mask if and only
-    * if:
-    *     - The loader supports __DRI_MUTABLE_RENDER_BUFFER_LOADER.
-    *     - The driver supports __DRI_MUTABLE_RENDER_BUFFER_DRIVER.
-    *     - The EGLConfig of the drawable EGLSurface contains
-    *       EGL_MUTABLE_RENDER_BUFFER_BIT_KHR.
-    *     - The EGLContext's EGL_RENDER_BUFFER is EGL_SINGLE_BUFFER.
-    *       Equivalently, the EGLSurface's active EGL_RENDER_BUFFER (as
-    *       opposed to any pending, requested change to EGL_RENDER_BUFFER) is
-    *       EGL_SINGLE_BUFFER. (See the EGL 1.5 and
-    *       EGL_KHR_mutable_render_buffer spec for details about "pending" vs
-    *       "active" EGL_RENDER_BUFFER state).
-    *
-    * A shared buffer is similar to a front buffer in that all rendering to the
-    * buffer should appear promptly on the screen. It is different from
-    * a front buffer in that its behavior is independent from the
-    * GL_DRAW_BUFFER state. Specifically, if GL_DRAW_FRAMEBUFFER is 0 and the
-    * __DRIdrawable's buffer_mask is __DRI_IMAGE_BUFFER_SHARED, then all
-    * rendering should appear promptly on the screen if GL_DRAW_BUFFER is not
-    * GL_NONE.
-    *
-    * The difference between a shared buffer and a front buffer is motivated
-    * by the constraints of Android and OpenGL ES. OpenGL ES does not support
-    * front-buffer rendering. Android's SurfaceFlinger protocol provides the
-    * EGL driver only a back buffer and no front buffer. The shared buffer
-    * mode introduced by EGL_KHR_mutable_render_buffer is a backdoor though
-    * EGL that allows Android OpenGL ES applications to render to what is
-    * effectively the front buffer, a backdoor that required no change to the
-    * OpenGL ES API and little change to the SurfaceFlinger API.
-    */
-   __DRI_IMAGE_BUFFER_SHARED = (1 << 2),
+   __DRI_IMAGE_BUFFER_FRONT = (1 << 1)
 };
 
 struct __DRIimageList {
@@ -1964,8 +1915,7 @@ struct __DRIimageLoaderExtensionRec {
     * \param stamp              Address of variable to be updated when
     *                           getBuffers must be called again
     * \param loaderPrivate      The loaderPrivate for driDrawable
-    * \param buffer_mask        Set of buffers to allocate. A bitmask of
-    *                           __DRIimageBufferMask.
+    * \param buffer_mask        Set of buffers to allocate
     * \param buffers            Returned buffers
     */
    int (*getBuffers)(__DRIdrawable *driDrawable,
@@ -2079,85 +2029,4 @@ struct __DRIbackgroundCallableExtensionRec {
    GLboolean (*isThreadSafe)(void *loaderPrivate);
 };
 
-/**
- * The driver portion of EGL_KHR_mutable_render_buffer.
- *
- * If the driver creates a __DRIconfig with
- * __DRI_ATTRIB_MUTABLE_RENDER_BUFFER, then it must support this extension.
- *
- * To support this extension:
- *
- *    - The driver should create at least one __DRIconfig with
- *      __DRI_ATTRIB_MUTABLE_RENDER_BUFFER. This is strongly recommended but
- *      not required.
- *
- *    - The driver must be able to handle __DRI_IMAGE_BUFFER_SHARED if
- *      returned by __DRIimageLoaderExtension:getBuffers().
- *
- *    - When rendering to __DRI_IMAGE_BUFFER_SHARED, it must call
- *      __DRImutableRenderBufferLoaderExtension::displaySharedBuffer() in
- *      response to glFlush and glFinish.  (This requirement is not documented
- *      in EGL_KHR_mutable_render_buffer, but is a de-facto requirement in the
- *      Android ecosystem. Android applications expect that glFlush will
- *      immediately display the buffer when in shared buffer mode, and Android
- *      drivers comply with this expectation).  It :may: call
- *      displaySharedBuffer() more often than required.
- *
- *    - When rendering to __DRI_IMAGE_BUFFER_SHARED, it must ensure that the
- *      buffer is always in a format compatible for display because the
- *      display engine (usually SurfaceFlinger or hwcomposer) may display the
- *      image at any time, even concurrently with 3D rendering. For example,
- *      display hardware and the GL hardware may be able to access the buffer
- *      simultaneously. In particular, if the buffer is compressed then take
- *      care that SurfaceFlinger and hwcomposer can consume the compression
- *      format.
- *
- * \see __DRI_IMAGE_BUFFER_SHARED
- * \see __DRI_ATTRIB_MUTABLE_RENDER_BUFFER
- * \see __DRI_MUTABLE_RENDER_BUFFER_LOADER
- */
-#define __DRI_MUTABLE_RENDER_BUFFER_DRIVER "DRI_MutableRenderBufferDriver"
-#define __DRI_MUTABLE_RENDER_BUFFER_DRIVER_VERSION 1
-
-typedef struct __DRImutableRenderBufferDriverExtensionRec __DRImutableRenderBufferDriverExtension;
-struct __DRImutableRenderBufferDriverExtensionRec {
-   __DRIextension base;
-};
-
-/**
- * The loader portion of EGL_KHR_mutable_render_buffer.
- *
- * Requires loader extension DRI_IMAGE_LOADER, through which the loader sends
- * __DRI_IMAGE_BUFFER_SHARED to the driver.
- *
- * \see __DRI_MUTABLE_RENDER_BUFFER_DRIVER
- */
-#define __DRI_MUTABLE_RENDER_BUFFER_LOADER "DRI_MutableRenderBufferLoader"
-#define __DRI_MUTABLE_RENDER_BUFFER_LOADER_VERSION 1
-
-typedef struct __DRImutableRenderBufferLoaderExtensionRec __DRImutableRenderBufferLoaderExtension;
-struct __DRImutableRenderBufferLoaderExtensionRec {
-   __DRIextension base;
-
-   /**
-    * Inform the display engine (that is, SurfaceFlinger and/or hwcomposer)
-    * that the __DRIdrawable has new content.
-    *
-    * The display engine may ignore this call, for example, if it continually
-    * refreshes and displays the buffer on every frame, as in
-    * EGL_ANDROID_front_buffer_auto_refresh. On the other extreme, the display
-    * engine may refresh and display the buffer only in frames in which the
-    * driver calls this.
-    *
-    * If the fence_fd is not -1, then the display engine will display the
-    * buffer only after the fence signals.
-    *
-    * The drawable's current __DRIimageBufferMask, as returned by
-    * __DRIimageLoaderExtension::getBuffers(), must be
-    * __DRI_IMAGE_BUFFER_SHARED.
-    */
-   void (*displaySharedBuffer)(__DRIdrawable *drawable, int fence_fd,
-                               void *loaderPrivate);
-};
-
 #endif

include/c11/threads_win32.h

@@ -76,8 +76,18 @@ Configuration macro:
 #endif
 
 /* Visual Studio 2015 and later */
-#ifdef _MSC_VER
+#if _MSC_VER >= 1900
+#define HAVE_TIMESPEC
 #define HAVE_TIMESPEC_GET
+#elif defined(__MINGW32__)
+#define HAVE_TIMESPEC
+#endif
+
+#ifndef HAVE_TIMESPEC
+struct timespec {
+    time_t tv_sec;
+    long tv_nsec;
+};
 #endif
 
 /*---------------------------- macros ----------------------------*/

include/c99_compat.h

@@ -36,8 +36,8 @@
  */
 #if defined(_MSC_VER)
 
-#  if _MSC_VER < 1900
-#    error "Microsoft Visual Studio 2015 or higher required"
+#  if _MSC_VER < 1800 || (_MSC_FULL_VER < 180031101 && !defined(__clang__))
+#    error "Microsoft Visual Studio 2013 Update 4 or higher required"
 #  endif
 
    /*

include/d3dadapter/present.h

@@ -125,7 +125,7 @@ struct ID3DPresent
 #define ID3DPresent_SetCursorPos(p,a) (p)->lpVtbl->SetCursorPos(p,a)
 #define ID3DPresent_SetCursor(p,a,b,c) (p)->lpVtbl->SetCursor(p,a,b,c)
 #define ID3DPresent_SetGammaRamp(p,a,b) (p)->lpVtbl->SetGammaRamp(p,a,b)
-#define ID3DPresent_GetWindowInfo(p,a,b,c,d) (p)->lpVtbl->GetWindowInfo(p,a,b,c,d)
+#define ID3DPresent_GetWindowInfo(p,a,b,c,d) (p)->lpVtbl->GetWindowSize(p,a,b,c,d)
 #define ID3DPresent_GetWindowOccluded(p) (p)->lpVtbl->GetWindowOccluded(p)
 #define ID3DPresent_ResolutionMismatch(p) (p)->lpVtbl->ResolutionMismatch(p)
 #define ID3DPresent_CreateThread(p,a,b) (p)->lpVtbl->CreateThread(p,a,b)

include/pci_ids/radeonsi_pci_ids.h

@@ -219,6 +219,7 @@ CHIPSET(0x699F, POLARIS12)
 
 CHIPSET(0x694C, VEGAM)
 CHIPSET(0x694E, VEGAM)
+CHIPSET(0x694F, VEGAM)
 
 CHIPSET(0x6860, VEGA10)
 CHIPSET(0x6861, VEGA10)
@@ -227,8 +228,14 @@ CHIPSET(0x6863, VEGA10)
 CHIPSET(0x6864, VEGA10)
 CHIPSET(0x6867, VEGA10)
 CHIPSET(0x6868, VEGA10)
-CHIPSET(0x687F, VEGA10)
+CHIPSET(0x6869, VEGA10)
+CHIPSET(0x686A, VEGA10)
+CHIPSET(0x686B, VEGA10)
 CHIPSET(0x686C, VEGA10)
+CHIPSET(0x686D, VEGA10)
+CHIPSET(0x686E, VEGA10)
+CHIPSET(0x686F, VEGA10)
+CHIPSET(0x687F, VEGA10)
 
 CHIPSET(0x69A0, VEGA12)
 CHIPSET(0x69A1, VEGA12)
@@ -240,6 +247,7 @@ CHIPSET(0x66A0, VEGA20)
 CHIPSET(0x66A1, VEGA20)
 CHIPSET(0x66A2, VEGA20)
 CHIPSET(0x66A3, VEGA20)
+CHIPSET(0x66A4, VEGA20)
 CHIPSET(0x66A7, VEGA20)
 CHIPSET(0x66AF, VEGA20)
 

include/vulkan/vulkan.h

@@ -24,10 +24,6 @@
 #include "vulkan_android.h"
 #endif
 
-#ifdef VK_USE_PLATFORM_FUCHSIA
-#include <zircon/types.h>
-#include "vulkan_fuchsia.h"
-#endif
 
 #ifdef VK_USE_PLATFORM_IOS_MVK
 #include "vulkan_ios.h"

include/vulkan/vulkan_fuchsia.h

@@ -1,58 +0,0 @@
-#ifndef VULKAN_FUCHSIA_H_
-#define VULKAN_FUCHSIA_H_ 1
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
-** Copyright (c) 2015-2018 The Khronos Group Inc.
-**
-** Licensed under the Apache License, Version 2.0 (the "License");
-** you may not use this file except in compliance with the License.
-** You may obtain a copy of the License at
-**
-**     http://www.apache.org/licenses/LICENSE-2.0
-**
-** Unless required by applicable law or agreed to in writing, software
-** distributed under the License is distributed on an "AS IS" BASIS,
-** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-** See the License for the specific language governing permissions and
-** limitations under the License.
-*/
-
-/*
-** This header is generated from the Khronos Vulkan XML API Registry.
-**
-*/
-
-
-#define VK_FUCHSIA_imagepipe_surface 1
-#define VK_FUCHSIA_IMAGEPIPE_SURFACE_SPEC_VERSION 1
-#define VK_FUCHSIA_IMAGEPIPE_SURFACE_EXTENSION_NAME "VK_FUCHSIA_imagepipe_surface"
-
-typedef VkFlags VkImagePipeSurfaceCreateFlagsFUCHSIA;
-
-typedef struct VkImagePipeSurfaceCreateInfoFUCHSIA {
-    VkStructureType                         sType;
-    const void*                             pNext;
-    VkImagePipeSurfaceCreateFlagsFUCHSIA    flags;
-    zx_handle_t                             imagePipeHandle;
-} VkImagePipeSurfaceCreateInfoFUCHSIA;
-
-
-typedef VkResult (VKAPI_PTR *PFN_vkCreateImagePipeSurfaceFUCHSIA)(VkInstance instance, const VkImagePipeSurfaceCreateInfoFUCHSIA* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
-
-#ifndef VK_NO_PROTOTYPES
-VKAPI_ATTR VkResult VKAPI_CALL vkCreateImagePipeSurfaceFUCHSIA(
-    VkInstance                                  instance,
-    const VkImagePipeSurfaceCreateInfoFUCHSIA*  pCreateInfo,
-    const VkAllocationCallbacks*                pAllocator,
-    VkSurfaceKHR*                               pSurface);
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

m4/ax_check_python_mako_module.m4

@@ -45,14 +45,13 @@ AC_DEFUN([AX_CHECK_PYTHON_MAKO_MODULE],
 try:
     import sys
     import mako
-    import distutils.version
 except ImportError as err:
     sys.exit(err)
 else:
-    ver_req = distutils.version.LooseVersion('$1')
-    ver_act = distutils.version.LooseVersion(mako.__version__)
+    ver_req = map(int, '$1'.split('.'))
+    ver_act = map(int, mako.__version__.split('.'))
     sys.exit(int(ver_req > ver_act))
-    " | $PYTHON -
+    " | $PYTHON2 -
 
     if test $? -ne 0 ; then
        AC_MSG_RESULT(no)

meson.build

@@ -25,8 +25,8 @@ project(
     [find_program('python', 'python2', 'python3'), 'bin/meson_get_version.py']
   ).stdout(),
   license : 'MIT',
-  meson_version : '>= 0.45',
-  default_options : ['buildtype=debugoptimized', 'b_ndebug=if-release', 'c_std=c99', 'cpp_std=c++11']
+  meson_version : '>= 0.44.1',
+  default_options : ['buildtype=debugoptimized', 'c_std=c99', 'cpp_std=c++11']
 )
 
 cc = meson.get_compiler('c')
@@ -102,15 +102,13 @@ if _drivers.contains('auto')
     elif ['arm', 'aarch64'].contains(host_machine.cpu_family())
       _drivers = []
     else
-      error('Unknown architecture @0@. Please pass -Ddri-drivers to set driver options. Patches gladly accepted to fix this.'.format(
-            host_machine.cpu_family()))
+      error('Unknown architecture. Please pass -Ddri-drivers to set driver options. Patches gladly accepted to fix this.')
     endif
   elif ['darwin', 'windows', 'cygwin', 'haiku'].contains(host_machine.system())
     # only swrast would make sense here, but gallium swrast is a much better default
     _drivers = []
   else
-    error('Unknown OS @0@. Please pass -Ddri-drivers to set driver options. Patches gladly accepted to fix this.'.format(
-          host_machine.system()))
+    error('Unknown OS. Please pass -Ddri-drivers to set driver options. Patches gladly accepted to fix this.')
   endif
 endif
 
@@ -137,14 +135,12 @@ if _drivers.contains('auto')
         'tegra', 'virgl', 'swrast',
       ]
     else
-      error('Unknown architecture @0@. Please pass -Dgallium-drivers to set driver options. Patches gladly accepted to fix this.'.format(
-            host_machine.cpu_family()))
+      error('Unknown architecture. Please pass -Dgallium-drivers to set driver options. Patches gladly accepted to fix this.')
     endif
   elif ['darwin', 'windows', 'cygwin', 'haiku'].contains(host_machine.system())
     _drivers = ['swrast']
   else
-    error('Unknown OS @0@. Please pass -Dgallium-drivers to set driver options. Patches gladly accepted to fix this.'.format(
-          host_machine.system()))
+    error('Unknown OS. Please pass -Dgallium-drivers to set driver options. Patches gladly accepted to fix this.')
   endif
 endif
 with_gallium_pl111 = _drivers.contains('pl111')
@@ -179,18 +175,14 @@ if _vulkan_drivers.contains('auto')
   if system_has_kms_drm
     if host_machine.cpu_family().startswith('x86')
       _vulkan_drivers = ['amd', 'intel']
-    elif ['arm', 'aarch64'].contains(host_machine.cpu_family())
-      _vulkan_drivers = []
     else
-      error('Unknown architecture @0@. Please pass -Dvulkan-drivers to set driver options. Patches gladly accepted to fix this.'.format(
-            host_machine.cpu_family()))
+      error('Unknown architecture. Please pass -Dvulkan-drivers to set driver options. Patches gladly accepted to fix this.')
     endif
   elif ['darwin', 'windows', 'cygwin', 'haiku'].contains(host_machine.system())
     # No vulkan driver supports windows or macOS currently
     _vulkan_drivers = []
   else
-    error('Unknown OS @0@. Please pass -Dvulkan-drivers to set driver options. Patches gladly accepted to fix this.'.format(
-          host_machine.system()))
+    error('Unknown OS. Please pass -Dvulkan-drivers to set driver options. Patches gladly accepted to fix this.')
   endif
 endif
 
@@ -238,8 +230,7 @@ if _platforms.contains('auto')
   elif ['haiku'].contains(host_machine.system())
     _platforms = ['haiku']
   else
-    error('Unknown OS @0@. Please pass -Dplatforms to set platforms. Patches gladly accepted to fix this.'.format(
-          host_machine.system()))
+    error('Unknown OS. Please pass -Dplatforms to set platforms. Patches gladly accepted to fix this.')
   endif
 endif
 
@@ -316,7 +307,7 @@ elif _egl == 'true'
   elif not with_shared_glapi
     error('EGL requires shared-glapi')
   elif not with_platforms
-    error('No platforms specified, consider -Dplatforms=drm,x11,surfaceless at least')
+    error('No platforms specified, consider -Dplatforms=drm,x11 at least')
   elif not ['disabled', 'dri'].contains(with_glx)
     error('EGL requires dri, but a GLX is being built without dri')
   elif ['darwin', 'windows'].contains(host_machine.system())
@@ -388,9 +379,9 @@ endif
 if with_any_vk and (with_platform_x11 and not with_dri3)
   error('Vulkan drivers require dri3 for X11 support')
 endif
-if with_dri or with_gallium
-  if with_glx == 'disabled' and not with_egl and not with_platform_haiku
-    error('building dri or gallium drivers require at least one window system')
+if with_dri
+  if with_glx == 'disabled' and not with_egl and not with_gbm
+    error('building dri drivers require at least one windowing system')
   endif
 endif
 
@@ -620,7 +611,7 @@ if with_gallium_st_nine
     error('The nine state tracker requires gallium softpipe/llvmpipe.')
   elif not (with_gallium_radeonsi or with_gallium_nouveau or with_gallium_r600
             or with_gallium_r300 or with_gallium_svga or with_gallium_i915)
-    error('The nine state tracker requires at least on non-swrast gallium driver.')
+    error('The nine state tracker requires at least one non-swrast gallium driver.')
   endif
   if not with_dri3
     error('Using nine with wine requires dri3')
@@ -628,7 +619,12 @@ if with_gallium_st_nine
 endif
 
 if get_option('power8') != 'false'
-  if host_machine.cpu_family() == 'ppc64le'
+  # on old versions of meson the cpu family would return as ppc64le on little
+  # endian power8, this was changed in 0.48 such that the family would always
+  # be ppc64 regardless of endianness, and the the machine.endian() value
+  # should be checked. Since we support versions < 0.48 we need to use
+  # startswith.
+  if host_machine.cpu_family().startswith('ppc64') and host_machine.endian() == 'little'
     if cc.get_id() == 'gcc' and cc.version().version_compare('< 4.8')
       error('Altivec is not supported with gcc version < 4.8.')
     endif
@@ -709,16 +705,10 @@ if with_platform_haiku
   pre_args += '-DHAVE_HAIKU_PLATFORM'
 endif
 
-prog_python = import('python3').find_python()
-has_mako = run_command(
-  prog_python, '-c',
-  '''
-from distutils.version import StrictVersion
-import mako
-assert StrictVersion(mako.__version__) > StrictVersion("0.8.0")
-  ''')
+prog_python2 = find_program('python2')
+has_mako = run_command(prog_python2, '-c', 'import mako')
 if has_mako.returncode() != 0
-  error('Python (3.x) mako module >= 0.8.0 required to build mesa.')
+  error('Python (2.x) mako module required to build mesa.')
 endif
 
 if cc.get_id() == 'gcc' and cc.version().version_compare('< 4.4.6')
@@ -788,19 +778,15 @@ endif
 # Check for generic C arguments
 c_args = []
 foreach a : ['-Werror=implicit-function-declaration',
-             '-Werror=missing-prototypes', '-Werror=return-type',
-             '-fno-math-errno',
+             '-Werror=missing-prototypes', '-fno-math-errno',
              '-fno-trapping-math', '-Qunused-arguments']
   if cc.has_argument(a)
     c_args += a
   endif
 endforeach
-
-foreach a : ['missing-field-initializers', 'format-truncation']
-  if cc.has_argument('-W' + a)
-    c_args += '-Wno-' + a
-  endif
-endforeach
+if cc.has_argument('-Wmissing-field-initializers')
+  c_args += '-Wno-missing-field-initializers'
+endif
 
 c_vis_args = []
 if cc.has_argument('-fvisibility=hidden')
@@ -809,8 +795,7 @@ endif
 
 # Check for generic C++ arguments
 cpp_args = []
-foreach a : ['-Werror=return-type',
-             '-fno-math-errno', '-fno-trapping-math',
+foreach a : ['-fno-math-errno', '-fno-trapping-math',
              '-Qunused-arguments']
   if cpp.has_argument(a)
     cpp_args += a
@@ -820,7 +805,7 @@ endforeach
 # For some reason, the test for -Wno-foo always succeeds with gcc, even if the
 # option is not supported. Hence, check for -Wfoo instead.
 
-foreach a : ['non-virtual-dtor', 'missing-field-initializers', 'format-truncation']
+foreach a : ['non-virtual-dtor', 'missing-field-initializers']
   if cpp.has_argument('-W' + a)
     cpp_args += '-Wno-' + a
   endif
@@ -969,7 +954,7 @@ if with_asm
       with_asm_arch = 'sparc'
       pre_args += ['-DUSE_SPARC_ASM']
     endif
-  elif host_machine.cpu_family() == 'ppc64le'
+  elif host_machine.cpu_family().startswith('ppc64') and host_machine.endian() == 'little'
     if system_has_kms_drm
       with_asm_arch = 'ppc64le'
       pre_args += ['-DUSE_PPC64LE_ASM']
@@ -1079,13 +1064,6 @@ pre_args += '-DHAVE_ZLIB'
 dep_thread = dependency('threads')
 if dep_thread.found() and host_machine.system() != 'windows'
   pre_args += '-DHAVE_PTHREAD'
-  if cc.has_function(
-      'pthread_setaffinity_np',
-      dependencies : dep_thread,
-      prefix : '#include <pthread.h>',
-      args : '-D_GNU_SOURCE')
-    pre_args += '-DHAVE_PTHREAD_SETAFFINITY'
-  endif
 endif
 dep_expat = dependency('expat')
 # this only exists on linux so either this is linux and it will be found, or
@@ -1100,12 +1078,14 @@ dep_libdrm_amdgpu = null_dep
 dep_libdrm_radeon = null_dep
 dep_libdrm_nouveau = null_dep
 dep_libdrm_etnaviv = null_dep
+dep_libdrm_freedreno = null_dep
 dep_libdrm_intel = null_dep
 
-_drm_amdgpu_ver = '2.4.95'
+_drm_amdgpu_ver = '2.4.91'
 _drm_radeon_ver = '2.4.71'
 _drm_nouveau_ver = '2.4.66'
 _drm_etnaviv_ver = '2.4.89'
+_drm_freedreno_ver = '2.4.92'
 _drm_intel_ver = '2.4.75'
 _drm_ver = '2.4.75'
 
@@ -1116,6 +1096,7 @@ _libdrm_checks = [
               with_gallium_r300 or with_gallium_r600)],
   ['nouveau', (with_gallium_nouveau or with_dri_nouveau)],
   ['etnaviv', with_gallium_etnaviv],
+  ['freedreno', with_gallium_freedreno],
 ]
 
 # VC4 only needs core libdrm support of this version, not a libdrm_vc4
@@ -1163,7 +1144,7 @@ endif
 llvm_modules = ['bitwriter', 'engine', 'mcdisassembler', 'mcjit']
 llvm_optional_modules = []
 if with_amd_vk or with_gallium_radeonsi or with_gallium_r600
-  llvm_modules += ['amdgpu', 'bitreader', 'ipo']
+  llvm_modules += ['amdgpu', 'native', 'bitreader', 'ipo']
   if with_gallium_r600
     llvm_modules += 'asmparser'
   endif
@@ -1173,40 +1154,45 @@ if with_gallium_opencl
     'all-targets', 'linker', 'coverage', 'instrumentation', 'ipo', 'irreader',
     'lto', 'option', 'objcarcopts', 'profiledata',
   ]
-  llvm_optional_modules += ['coroutines']
+  llvm_optional_modules += ['coroutines', 'opencl']
 endif
 
-if with_amd_vk or with_gallium_radeonsi
-  _llvm_version = '>= 6.0.0'
-elif with_gallium_swr
-  _llvm_version = '>= 6.0.0'
+if with_amd_vk or with_gallium_radeonsi or with_gallium_swr
+  _llvm_version = '>= 5.0.0'
 elif with_gallium_opencl or with_gallium_r600
   _llvm_version = '>= 3.9.0'
 else
   _llvm_version = '>= 3.3.0'
 endif
 
-_shared_llvm = get_option('shared-llvm')
-
 _llvm = get_option('llvm')
-dep_llvm = null_dep
-with_llvm = false
-if _llvm != 'false'
+if _llvm == 'auto'
   dep_llvm = dependency(
     'llvm',
     version : _llvm_version,
     modules : llvm_modules,
     optional_modules : llvm_optional_modules,
-    required : (
-      with_amd_vk or with_gallium_radeonsi or with_gallium_swr or
-      with_gallium_opencl or _llvm == 'true'
-    ),
-    static : not _shared_llvm,
+    required : with_amd_vk or with_gallium_radeonsi or with_gallium_swr or with_gallium_opencl,
   )
   with_llvm = dep_llvm.found()
+elif _llvm == 'true'
+  dep_llvm = dependency(
+    'llvm',
+    version : _llvm_version,
+    modules : llvm_modules,
+    optional_modules : llvm_optional_modules,
+  )
+  with_llvm = true
+else
+  dep_llvm = null_dep
+  with_llvm = false
 endif
 if with_llvm
   _llvm_version = dep_llvm.version().split('.')
+  # Development versions of LLVM have an 'svn' or 'git' suffix, we don't want
+  # that for our version checks.
+  # svn suffixes are stripped by meson as of 0.43, and git suffixes are
+  # strippped as of 0.44, but we support older meson versions.
 
   # 3 digits versions in LLVM only started from 3.4.1 on
   if dep_llvm.version().version_compare('>= 3.4.1')
@@ -1215,6 +1201,11 @@ if with_llvm
     _llvm_patch = '0'
   endif
 
+  if _llvm_patch.endswith('svn')
+    _llvm_patch = _llvm_patch.split('s')[0]
+  elif _llvm_patch.contains('git')
+    _llvm_patch = _llvm_patch.split('g')[0]
+  endif
   pre_args += [
     '-DHAVE_LLVM=0x0@0@0@1@'.format(_llvm_version[0], _llvm_version[1]),
     '-DMESA_LLVM_VERSION_PATCH=@0@'.format(_llvm_patch),
@@ -1298,13 +1289,7 @@ endif
 # TODO: symbol mangling
 
 if with_platform_wayland
-  dep_wl_scanner = dependency('wayland-scanner', native: true)
-  prog_wl_scanner = find_program(dep_wl_scanner.get_pkgconfig_variable('wayland_scanner'))
-  if dep_wl_scanner.version().version_compare('>= 1.15')
-    wl_scanner_arg = 'private-code'
-  else
-    wl_scanner_arg = 'code'
-  endif
+  prog_wl_scanner = find_program('wayland-scanner')
   dep_wl_protocols = dependency('wayland-protocols', version : '>= 1.8')
   dep_wayland_client = dependency('wayland-client', version : '>=1.11')
   dep_wayland_server = dependency('wayland-server', version : '>=1.11')
@@ -1350,7 +1335,6 @@ if with_platform_x11
     dep_xdamage = dependency('xdamage', version : '>= 1.1')
     dep_xfixes = dependency('xfixes')
     dep_xcb_glx = dependency('xcb-glx', version : '>= 1.8.1')
-    dep_xxf86vm = dependency('xxf86vm')
   endif
   if (with_any_vk or with_glx == 'dri' or
        (with_gallium_vdpau or with_gallium_xvmc or with_gallium_va or
@@ -1377,6 +1361,7 @@ if with_platform_x11
   if with_glx == 'dri'
     if with_dri_platform == 'drm'
       dep_dri2proto = dependency('dri2proto', version : '>= 2.8')
+      dep_xxf86vm = dependency('xxf86vm')
     endif
     dep_glproto = dependency('glproto', version : '>= 1.4.14')
   endif
@@ -1397,7 +1382,7 @@ endif
 
 _sensors = get_option('lmsensors')
 if _sensors != 'false'
-  dep_lmsensors = cc.find_library('libsensors', required : _sensors == 'true')
+  dep_lmsensors = cc.find_library('sensors', required : _sensors == 'true')
   if dep_lmsensors.found()
     pre_args += '-DHAVE_LIBSENSORS=1'
   endif
@@ -1427,8 +1412,8 @@ elif with_glx == 'dri'
     'xcb-glx >= 1.8.1']
   if with_dri_platform == 'drm'
     gl_priv_reqs += 'xcb-dri2 >= 1.8'
+    gl_priv_reqs += 'xxf86vm'
   endif
-  gl_priv_reqs += 'xxf86vm'
 endif
 if dep_libdrm.found()
   gl_priv_reqs += 'libdrm >= 2.4.75'

meson_options.txt

@@ -25,7 +25,7 @@ option(
   choices : [
     '', 'auto', 'x11', 'wayland', 'drm', 'surfaceless', 'haiku', 'android',
   ],
-  description : 'window systems to support. If this is set to `auto`, all platforms applicable will be enabled.'
+  description : 'comma separated list of window systems to support. If this is set to auto all platforms applicable to the OS will be enabled.'
 )
 option(
   'dri3',
@@ -237,12 +237,6 @@ option(
   choices : ['auto', 'true', 'false'],
   description : 'Build with LLVM support.'
 )
-option(
-  'shared-llvm',
-  type : 'boolean',
-  value : true,
-  description : 'Whether to link llvm shared or statically.'
-)
 option(
   'valgrind',
   type : 'combo',
@@ -301,8 +295,8 @@ option(
   'tools',
   type : 'array',
   value : [],
-  choices : ['freedreno', 'glsl', 'intel', 'intel-ui', 'nir', 'nouveau', 'xvmc', 'all'],
-  description : 'List of tools to build. (Note: `intel-ui` selects `intel`)',
+  choices : ['freedreno', 'glsl', 'intel', 'nir', 'nouveau', 'xvmc', 'all'],
+  description : 'List of tools to build.',
 )
 option(
   'power8',

scons/gallium.py

@@ -29,7 +29,6 @@ Frontend-tool for Gallium3D architecture.
 # SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #
 
-from __future__ import print_function
 
 import distutils.version
 import os
@@ -222,6 +221,10 @@ def generate(env):
     env['suncc'] = env['platform'] == 'sunos' and os.path.basename(env['CC']) == 'cc'
     env['icc'] = 'icc' == os.path.basename(env['CC'])
 
+    if env['msvc'] and env['toolchain'] == 'default' and env['machine'] == 'x86_64':
+        # MSVC x64 support is broken in earlier versions of scons
+        env.EnsurePythonVersion(2, 0)
+
     # shortcuts
     machine = env['machine']
     platform = env['platform']
@@ -676,18 +679,6 @@ def generate(env):
     env.PkgCheckModules('XF86VIDMODE', ['xxf86vm'])
     env.PkgCheckModules('DRM', ['libdrm >= 2.4.75'])
 
-    if not os.path.exists("src/util/format_srgb.c"):
-        print("Checking for Python Mako module (>= 0.8.0)... ", end='')
-        try:
-            import mako
-        except ImportError:
-            print("no")
-            exit(1)
-        if distutils.version.StrictVersion(mako.__version__) < distutils.version.StrictVersion('0.8.0'):
-            print("no")
-            exit(1)
-        print("yes")
-
     if env['x11']:
         env.Append(CPPPATH = env['X11_CPPPATH'])
 

scons/llvm.py

@@ -99,6 +99,9 @@ def generate(env):
             return
 
         env.Prepend(CPPPATH = [os.path.join(llvm_dir, 'include')])
+        env.AppendUnique(CPPDEFINES = [
+            'HAVE_STDINT_H',
+        ])
         env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')])
         # LIBS should match the output of `llvm-config --libs engine mcjit bitwriter x86asmprinter irreader`
         if llvm_version >= distutils.version.LooseVersion('5.0'):

src/Makefile.am

@@ -20,13 +20,13 @@
 # IN THE SOFTWARE.
 
 .PHONY: git_sha1.h
-git_sha1.h:
+git_sha1.h: $(top_srcdir)/src/git_sha1.h.in
 	@echo "updating $@"
-	@$(PYTHON) $(top_srcdir)/bin/git_sha1_gen.py --output $@
+	@$(PYTHON2) $(top_srcdir)/bin/git_sha1_gen.py --output $@
 
 BUILT_SOURCES = git_sha1.h
 CLEANFILES = $(BUILT_SOURCES)
-EXTRA_DIST = meson.build
+EXTRA_DIST = git_sha1.h.in meson.build
 
 SUBDIRS = . gtest util mapi/glapi/gen mapi
 
@@ -39,7 +39,6 @@ gl_HEADERS = \
   $(top_srcdir)/include/GL/gl_mangle.h
 endif
 
-# TODO: When building with glvnd, glvnd itself should be providing gl.pc and the headers
 if HAVE_GLX
 glxdir = $(includedir)/GL
 glx_HEADERS = \

src/SConscript

@@ -42,6 +42,10 @@ env.Append(CPPPATH = ["#" + env['build_dir']])
 if env['platform'] != 'windows':
     SConscript('loader/SConscript')
 
+# When env['gles'] is set, the targets defined in mapi/glapi/SConscript are not
+# used.  libgl-xlib and libgl-gdi adapt themselves to use the targets defined
+# in mapi/glapi-shared/SConscript.  mesa/SConscript also adapts itself to
+# enable OpenGL ES support.
 SConscript('mapi/glapi/gen/SConscript')
 SConscript('mapi/glapi/SConscript')
 
@@ -57,5 +61,8 @@ if not env['embedded']:
     if env['platform'] == 'haiku':
         SConscript('egl/SConscript')
 
+    if env['gles']:
+        SConscript('mapi/shared-glapi/SConscript')
+
 SConscript('gallium/SConscript')
 

src/amd/Makefile.addrlib.am

@@ -24,7 +24,6 @@ ADDRLIB_LIBS = addrlib/libamdgpu_addrlib.la
 addrlib_libamdgpu_addrlib_la_CPPFLAGS = \
 	$(DEFINES) \
 	-I$(top_srcdir)/src/ \
-	-I$(top_srcdir)/include \
 	-I$(srcdir)/common \
 	-I$(srcdir)/addrlib \
 	-I$(srcdir)/addrlib/core \

src/amd/Makefile.common.am

@@ -66,6 +66,6 @@ common_libamd_common_la_LIBADD = $(LIBELF_LIBS)
 
 common/sid_tables.h: $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h
 	$(AM_V_at)$(MKDIR_P) $(@D)
-	$(AM_V_GEN) $(PYTHON) $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h > $@
+	$(AM_V_GEN) $(PYTHON2) $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h > $@
 
 BUILT_SOURCES = $(AMD_GENERATED_FILES)

src/amd/addrlib/addrinterface.cpp

@@ -36,8 +36,6 @@
 
 #include "addrcommon.h"
 
-#include "util/macros.h"
-
 using namespace Addr;
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -834,7 +832,7 @@ BOOL_32 ADDR_API ElemGetExportNorm(
     Addr::Lib* pLib = Lib::GetLib(hLib);
     BOOL_32 enabled = FALSE;
 
-    MAYBE_UNUSED ADDR_E_RETURNCODE returnCode = ADDR_OK;
+    ADDR_E_RETURNCODE returnCode = ADDR_OK;
 
     if (pLib != NULL)
     {

src/amd/addrlib/amdgpu_asic_addr.h

@@ -90,7 +90,6 @@
 #define AMDGPU_VEGA20_RANGE     0x28, 0xFF
 
 #define AMDGPU_RAVEN_RANGE      0x01, 0x81
-#define AMDGPU_RAVEN2_RANGE     0x81, 0xFF
 
 #define AMDGPU_EXPAND_FIX(x) x
 #define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max))
@@ -133,6 +132,5 @@
 #define ASICREV_IS_VEGA20_P(r)         ASICREV_IS(r, VEGA20)
 
 #define ASICREV_IS_RAVEN(r)            ASICREV_IS(r, RAVEN)
-#define ASICREV_IS_RAVEN2(r)           ASICREV_IS(r, RAVEN2)
 
 #endif // _AMDGPU_ASIC_ADDR_H

src/amd/addrlib/gfx9/gfx9addrlib.cpp

@@ -37,8 +37,6 @@
 
 #include "amdgpu_asic_addr.h"
 
-#include "util/macros.h"
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
@@ -1291,7 +1289,7 @@ ChipFamily Gfx9Lib::HwlConvertChipFamily(
             break;
         case FAMILY_RV:
             m_settings.isArcticIsland = 1;
-            m_settings.isRaven        = ASICREV_IS_RAVEN(uChipRevision) || ASICREV_IS_RAVEN2(uChipRevision);
+            m_settings.isRaven        = ASICREV_IS_RAVEN(uChipRevision);
 
             if (m_settings.isRaven)
             {
@@ -2472,7 +2470,7 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeBlock256Equation(
     // Post validation
     if (ret == ADDR_OK)
     {
-        MAYBE_UNUSED Dim2d microBlockDim = Block256_2d[elementBytesLog2];
+        Dim2d microBlockDim = Block256_2d[elementBytesLog2];
         ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 0)) ==
                     (microBlockDim.w * (1 << elementBytesLog2)));
         ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 1)) == microBlockDim.h);
@@ -3878,7 +3876,7 @@ ADDR_E_RETURNCODE Gfx9Lib::ComputeStereoInfo(
             const UINT_32        numBankBits       = GetBankXorBits(blkSizeLog2);
             const UINT_32        bppLog2           = Log2(pIn->bpp >> 3);
             const UINT_32        maxYCoordBlock256 = Log2(Block256_2d[bppLog2].h) - 1;
-            MAYBE_UNUSED const ADDR_EQUATION *pEqToCheck = &m_equationTable[eqIndex];
+            const ADDR_EQUATION *pEqToCheck        = &m_equationTable[eqIndex];
 
             ADDR_ASSERT(maxYCoordBlock256 ==
                         GetMaxValidChannelIndex(&pEqToCheck->addr[0], GetBlockSizeLog2(ADDR_SW_256B), 1));

src/amd/addrlib/meson.build

@@ -57,7 +57,7 @@ libamdgpu_addrlib = static_library(
     include_directories(
       'core', 'inc/chip/gfx9', 'inc/chip/r800', 'gfx9/chip', 'r800/chip',
     ),
-    inc_amd_common, inc_common, inc_src,
+    inc_amd_common, inc_src,
   ],
   cpp_args : cpp_vis_args,
 )

src/amd/addrlib/r800/egbaddrlib.cpp

@@ -33,8 +33,6 @@
 
 #include "egbaddrlib.h"
 
-#include "util/macros.h"
-
 namespace Addr
 {
 namespace V1
@@ -981,7 +979,7 @@ BOOL_32 EgBasedLib::SanityCheckMacroTiled(
     ) const
 {
     BOOL_32 valid       = TRUE;
-    MAYBE_UNUSED UINT_32 numPipes = HwlGetPipes(pTileInfo);
+    UINT_32 numPipes    = HwlGetPipes(pTileInfo);
 
     switch (pTileInfo->banks)
     {
@@ -4110,7 +4108,7 @@ UINT_64 EgBasedLib::HwlGetSizeAdjustmentMicroTiled(
     ) const
 {
     UINT_64 logicalSliceSize;
-    MAYBE_UNUSED UINT_64 physicalSliceSize;
+    UINT_64 physicalSliceSize;
 
     UINT_32 pitch   = *pPitch;
     UINT_32 height  = *pHeight;

src/amd/common/ac_gpu_info.c

@@ -99,7 +99,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 	struct drm_amdgpu_info_device device_info = {};
 	struct amdgpu_buffer_size_alignments alignment_info = {};
 	struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {};
-	struct drm_amdgpu_info_hw_ip uvd_enc = {}, vce = {}, vcn_dec = {}, vcn_jpeg = {};
+	struct drm_amdgpu_info_hw_ip uvd_enc = {}, vce = {}, vcn_dec = {};
 	struct drm_amdgpu_info_hw_ip vcn_enc = {}, gfx = {};
 	struct amdgpu_gds_resource_info gds = {};
 	uint32_t vce_version = 0, vce_feature = 0, uvd_version = 0, uvd_feature = 0;
@@ -186,14 +186,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 		}
 	}
 
-	if (info->drm_major == 3 && info->drm_minor >= 27) {
-		r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_VCN_JPEG, 0, &vcn_jpeg);
-		if (r) {
-			fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(vcn_jpeg) failed.\n");
-			return false;
-		}
-	}
-
 	r = amdgpu_query_firmware_version(dev, AMDGPU_INFO_FW_GFX_ME, 0, 0,
 					&info->me_fw_version,
 					&info->me_fw_feature);
@@ -263,6 +255,9 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 		info->gart_size = meminfo.gtt.total_heap_size;
 		info->vram_size = meminfo.vram.total_heap_size;
 		info->vram_vis_size = meminfo.cpu_accessible_vram.total_heap_size;
+
+		info->max_alloc_size = MAX2(meminfo.vram.max_allocation,
+					    meminfo.gtt.max_allocation);
 	} else {
 		/* This is a deprecated interface, which reports usable sizes
 		 * (total minus pinned), but the pinned size computation is
@@ -294,6 +289,11 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 		info->gart_size = gtt.heap_size;
 		info->vram_size = vram.heap_size;
 		info->vram_vis_size = vram_vis.heap_size;
+
+		/* The kernel can split large buffers in VRAM but not in GTT, so large
+		 * allocations can fail or cause buffer movement failures in the kernel.
+		 */
+		info->max_alloc_size = MAX2(info->vram_size * 0.9, info->gart_size * 0.7);
 	}
 
 	/* Set chip identification. */
@@ -301,11 +301,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 	info->vce_harvest_config = amdinfo->vce_harvest_config;
 
 	switch (info->pci_id) {
-#define CHIPSET(pci_id, cfamily) \
-	case pci_id: \
-		info->family = CHIP_##cfamily; \
-		info->name = #cfamily; \
-		break;
+#define CHIPSET(pci_id, cfamily) case pci_id: info->family = CHIP_##cfamily; break;
 #include "pci_ids/radeonsi_pci_ids.h"
 #undef CHIPSET
 
@@ -314,12 +310,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 		return false;
 	}
 
-	/* Raven2 uses the same PCI IDs as Raven1, but different revision IDs. */
-	if (info->family == CHIP_RAVEN && amdinfo->chip_rev >= 0x8) {
-		info->family = CHIP_RAVEN2;
-		info->name = "RAVEN2";
-	}
-
 	if (info->family >= CHIP_VEGA10)
 		info->chip_class = GFX9;
 	else if (info->family >= CHIP_TONGA)
@@ -337,14 +327,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 	info->has_dedicated_vram =
 		!(amdinfo->ids_flags & AMDGPU_IDS_FLAGS_FUSION);
 
-	/* The kernel can split large buffers in VRAM but not in GTT, so large
-	 * allocations can fail or cause buffer movement failures in the kernel.
-	 */
-	if (info->has_dedicated_vram)
-		info->max_alloc_size = info->vram_size * 0.8;
-	else
-		info->max_alloc_size = info->gart_size * 0.7;
-
 	/* Set hardware information. */
 	info->gds_size = gds.gds_total_size;
 	info->gds_gfx_partition_size = gds.gds_gfx_partition_size;
@@ -354,8 +336,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 	info->max_se = amdinfo->num_shader_engines;
 	info->max_sh_per_se = amdinfo->num_shader_arrays_per_engine;
 	info->has_hw_decode =
-		(uvd.available_rings != 0) || (vcn_dec.available_rings != 0) ||
-		(vcn_jpeg.available_rings != 0);
+		(uvd.available_rings != 0) || (vcn_dec.available_rings != 0);
 	info->uvd_fw_version =
 		uvd.available_rings ? uvd_version : 0;
 	info->vce_fw_version =
@@ -429,8 +410,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 		for (j = 0; j < info->max_sh_per_se; j++)
 			info->num_good_compute_units +=
 				util_bitcount(amdinfo->cu_bitmap[i][j]);
-	info->num_good_cu_per_sh = info->num_good_compute_units /
-				   (info->max_se * info->max_sh_per_se);
 
 	memcpy(info->si_tile_mode_array, amdinfo->gb_tile_mode,
 		sizeof(amdinfo->gb_tile_mode));
@@ -454,7 +433,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 	ib_align = MAX2(ib_align, vce.ib_start_alignment);
 	ib_align = MAX2(ib_align, vcn_dec.ib_start_alignment);
 	ib_align = MAX2(ib_align, vcn_enc.ib_start_alignment);
-	ib_align = MAX2(ib_align, vcn_jpeg.ib_start_alignment);
        assert(ib_align);
 	info->ib_start_alignment = ib_align;
 
@@ -561,7 +539,6 @@ void ac_print_gpu_info(struct radeon_info *info)
 	printf("Shader core info:\n");
 	printf("    max_shader_clock = %i\n", info->max_shader_clock);
 	printf("    num_good_compute_units = %i\n", info->num_good_compute_units);
-	printf("    num_good_cu_per_sh = %i\n", info->num_good_cu_per_sh);
 	printf("    num_tcc_blocks = %i\n", info->num_tcc_blocks);
 	printf("    max_se = %i\n", info->max_se);
 	printf("    max_sh_per_se = %i\n", info->max_sh_per_se);
@@ -659,10 +636,9 @@ ac_get_gs_table_depth(enum chip_class chip_class, enum radeon_family family)
 void
 ac_get_raster_config(struct radeon_info *info,
 		     uint32_t *raster_config_p,
-		     uint32_t *raster_config_1_p,
-		     uint32_t *se_tile_repeat_p)
+		     uint32_t *raster_config_1_p)
 {
-	unsigned raster_config, raster_config_1, se_tile_repeat;
+	unsigned raster_config, raster_config_1;
 
 	switch (info->family) {
 	/* 1 SE / 1 RB */
@@ -739,16 +715,8 @@ ac_get_raster_config(struct radeon_info *info,
 		raster_config_1 = 0x0000002a;
 	}
 
-	unsigned se_width = 8 << G_028350_SE_XSEL_GFX6(raster_config);
-	unsigned se_height = 8 << G_028350_SE_YSEL_GFX6(raster_config);
-
-	/* I don't know how to calculate this, though this is probably a good guess. */
-	se_tile_repeat = MAX2(se_width, se_height) * info->max_se;
-
 	*raster_config_p = raster_config;
 	*raster_config_1_p = raster_config_1;
-	if (se_tile_repeat_p)
-		*se_tile_repeat_p = se_tile_repeat;
 }
 
 void

src/amd/common/ac_gpu_info.h

@@ -47,7 +47,6 @@ struct radeon_info {
 	uint32_t                    pci_func;
 
 	/* Device info. */
-	const char                  *name;
 	uint32_t                    pci_id;
 	enum radeon_family          family;
 	enum chip_class             chip_class;
@@ -116,7 +115,6 @@ struct radeon_info {
 	uint32_t                    r600_max_quad_pipes; /* wave size / 16 */
 	uint32_t                    max_shader_clock;
 	uint32_t                    num_good_compute_units;
-	uint32_t                    num_good_cu_per_sh;
 	uint32_t                    num_tcc_blocks;
 	uint32_t                    max_se; /* shader engines */
 	uint32_t                    max_sh_per_se; /* shader arrays per shader engine */
@@ -150,8 +148,7 @@ void ac_print_gpu_info(struct radeon_info *info);
 int ac_get_gs_table_depth(enum chip_class chip_class, enum radeon_family family);
 void ac_get_raster_config(struct radeon_info *info,
 			  uint32_t *raster_config_p,
-			  uint32_t *raster_config_1_p,
-			  uint32_t *se_tile_repeat_p);
+			  uint32_t *raster_config_1_p);
 void ac_get_harvested_configs(struct radeon_info *info,
 			      unsigned raster_config,
 			      unsigned *cik_raster_config_1_p,

src/amd/common/ac_llvm_build.c

@@ -87,8 +87,6 @@ ac_llvm_context_init(struct ac_llvm_context *ctx,
 	ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
 	ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
 
-	ctx->i16_0 = LLVMConstInt(ctx->i16, 0, false);
-	ctx->i16_1 = LLVMConstInt(ctx->i16, 1, false);
 	ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
 	ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
 	ctx->i64_0 = LLVMConstInt(ctx->i64, 0, false);
@@ -184,7 +182,7 @@ ac_get_type_size(LLVMTypeRef type)
 	case LLVMDoubleTypeKind:
 		return 8;
 	case LLVMPointerTypeKind:
-		if (LLVMGetPointerAddressSpace(type) == AC_ADDR_SPACE_CONST_32BIT)
+		if (LLVMGetPointerAddressSpace(type) == AC_CONST_32BIT_ADDR_SPACE)
 			return 4;
 		return 8;
 	case LLVMVectorTypeKind:
@@ -350,12 +348,6 @@ ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type,
 	return phi;
 }
 
-void ac_build_s_barrier(struct ac_llvm_context *ctx)
-{
-	ac_build_intrinsic(ctx, "llvm.amdgcn.s.barrier", ctx->voidt, NULL,
-			   0, AC_FUNC_ATTR_CONVERGENT);
-}
-
 /* Prevent optimizations (at least of memory accesses) across the current
  * point in the program by emitting empty inline assembly that is marked as
  * having side effects.
@@ -570,22 +562,6 @@ LLVMValueRef ac_build_expand_to_vec4(struct ac_llvm_context *ctx,
 	return ac_build_expand(ctx, value, num_channels, 4);
 }
 
-LLVMValueRef ac_build_round(struct ac_llvm_context *ctx, LLVMValueRef value)
-{
-	unsigned type_size = ac_get_type_size(LLVMTypeOf(value));
-	const char *name;
-
-	if (type_size == 2)
-		name = "llvm.rint.f16";
-	else if (type_size == 4)
-		name = "llvm.rint.f32";
-	else
-		name = "llvm.rint.f64";
-
-	return ac_build_intrinsic(ctx, name, LLVMTypeOf(value), &value, 1,
-				  AC_FUNC_ATTR_READNONE);
-}
-
 LLVMValueRef
 ac_build_fdiv(struct ac_llvm_context *ctx,
 	      LLVMValueRef num,
@@ -607,67 +583,6 @@ ac_build_fdiv(struct ac_llvm_context *ctx,
 	return ret;
 }
 
-/* See fast_idiv_by_const.h. */
-/* Set: increment = util_fast_udiv_info::increment ? multiplier : 0; */
-LLVMValueRef ac_build_fast_udiv(struct ac_llvm_context *ctx,
-				LLVMValueRef num,
-				LLVMValueRef multiplier,
-				LLVMValueRef pre_shift,
-				LLVMValueRef post_shift,
-				LLVMValueRef increment)
-{
-	LLVMBuilderRef builder = ctx->builder;
-
-	num = LLVMBuildLShr(builder, num, pre_shift, "");
-	num = LLVMBuildMul(builder,
-			   LLVMBuildZExt(builder, num, ctx->i64, ""),
-			   LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
-	num = LLVMBuildAdd(builder, num,
-			   LLVMBuildZExt(builder, increment, ctx->i64, ""), "");
-	num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
-	num = LLVMBuildTrunc(builder, num, ctx->i32, "");
-	return LLVMBuildLShr(builder, num, post_shift, "");
-}
-
-/* See fast_idiv_by_const.h. */
-/* If num != UINT_MAX, this more efficient version can be used. */
-/* Set: increment = util_fast_udiv_info::increment; */
-LLVMValueRef ac_build_fast_udiv_nuw(struct ac_llvm_context *ctx,
-				    LLVMValueRef num,
-				    LLVMValueRef multiplier,
-				    LLVMValueRef pre_shift,
-				    LLVMValueRef post_shift,
-				    LLVMValueRef increment)
-{
-	LLVMBuilderRef builder = ctx->builder;
-
-	num = LLVMBuildLShr(builder, num, pre_shift, "");
-	num = LLVMBuildNUWAdd(builder, num, increment, "");
-	num = LLVMBuildMul(builder,
-			   LLVMBuildZExt(builder, num, ctx->i64, ""),
-			   LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
-	num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
-	num = LLVMBuildTrunc(builder, num, ctx->i32, "");
-	return LLVMBuildLShr(builder, num, post_shift, "");
-}
-
-/* See fast_idiv_by_const.h. */
-/* Both operands must fit in 31 bits and the divisor must not be 1. */
-LLVMValueRef ac_build_fast_udiv_u31_d_not_one(struct ac_llvm_context *ctx,
-					      LLVMValueRef num,
-					      LLVMValueRef multiplier,
-					      LLVMValueRef post_shift)
-{
-	LLVMBuilderRef builder = ctx->builder;
-
-	num = LLVMBuildMul(builder,
-			   LLVMBuildZExt(builder, num, ctx->i64, ""),
-			   LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
-	num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
-	num = LLVMBuildTrunc(builder, num, ctx->i32, "");
-	return LLVMBuildLShr(builder, num, post_shift, "");
-}
-
 /* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
  * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
  * already multiplied by two. id is the cube face number.
@@ -765,7 +680,8 @@ ac_prepare_cube_coords(struct ac_llvm_context *ctx,
 	LLVMValueRef invma;
 
 	if (is_array && !is_lod) {
-		LLVMValueRef tmp = ac_build_round(ctx, coords_arg[3]);
+		LLVMValueRef tmp = coords_arg[3];
+		tmp = ac_build_intrinsic(ctx, "llvm.rint.f32", ctx->f32, &tmp, 1, 0);
 
 		/* Section 8.9 (Texture Functions) of the GLSL 4.50 spec says:
 		 *
@@ -860,7 +776,8 @@ ac_prepare_cube_coords(struct ac_llvm_context *ctx,
 	if (is_array) {
 		/* for cube arrays coord.z = coord.w(array_index) * 8 + face */
 		/* coords_arg.w component - array_index for cube arrays */
-		coords[2] = ac_build_fmad(ctx, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), coords[2]);
+		LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
+		coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
 	}
 
 	memcpy(coords_arg, coords, sizeof(coords));
@@ -920,18 +837,11 @@ ac_build_gep0(struct ac_llvm_context *ctx,
 	      LLVMValueRef index)
 {
 	LLVMValueRef indices[2] = {
-		ctx->i32_0,
+		LLVMConstInt(ctx->i32, 0, 0),
 		index,
 	};
-	return LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, "");
-}
-
-LLVMValueRef ac_build_pointer_add(struct ac_llvm_context *ctx, LLVMValueRef ptr,
-				  LLVMValueRef index)
-{
-	return LLVMBuildPointerCast(ctx->builder,
-				    ac_build_gep0(ctx, ptr, index),
-				    LLVMTypeOf(ptr), "");
+	return LLVMBuildGEP(ctx->builder, base_ptr,
+			    indices, 2, "");
 }
 
 void
@@ -952,39 +862,14 @@ ac_build_indexed_store(struct ac_llvm_context *ctx,
  * \param uniform   Whether the base_ptr and index can be assumed to be
  *                  dynamically uniform (i.e. load to an SGPR)
  * \param invariant Whether the load is invariant (no other opcodes affect it)
- * \param no_unsigned_wraparound
- *    For all possible re-associations and re-distributions of an expression
- *    "base_ptr + index * elemsize" into "addr + offset" (excluding GEPs
- *    without inbounds in base_ptr), this parameter is true if "addr + offset"
- *    does not result in an unsigned integer wraparound. This is used for
- *    optimal code generation of 32-bit pointer arithmetic.
- *
- *    For example, a 32-bit immediate offset that causes a 32-bit unsigned
- *    integer wraparound can't be an imm offset in s_load_dword, because
- *    the instruction performs "addr + offset" in 64 bits.
- *
- *    Expected usage for bindless textures by chaining GEPs:
- *      // possible unsigned wraparound, don't use InBounds:
- *      ptr1 = LLVMBuildGEP(base_ptr, index);
- *      image = load(ptr1); // becomes "s_load ptr1, 0"
- *
- *      ptr2 = LLVMBuildInBoundsGEP(ptr1, 32 / elemsize);
- *      sampler = load(ptr2); // becomes "s_load ptr1, 32" thanks to InBounds
  */
 static LLVMValueRef
 ac_build_load_custom(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
-		     LLVMValueRef index, bool uniform, bool invariant,
-		     bool no_unsigned_wraparound)
+		     LLVMValueRef index, bool uniform, bool invariant)
 {
 	LLVMValueRef pointer, result;
-	LLVMValueRef indices[2] = {ctx->i32_0, index};
-
-	if (no_unsigned_wraparound &&
-	    LLVMGetPointerAddressSpace(LLVMTypeOf(base_ptr)) == AC_ADDR_SPACE_CONST_32BIT)
-		pointer = LLVMBuildInBoundsGEP(ctx->builder, base_ptr, indices, 2, "");
-	else
-		pointer = LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, "");
 
+	pointer = ac_build_gep0(ctx, base_ptr, index);
 	if (uniform)
 		LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
 	result = LLVMBuildLoad(ctx->builder, pointer, "");
@@ -996,28 +881,19 @@ ac_build_load_custom(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
 LLVMValueRef ac_build_load(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
 			   LLVMValueRef index)
 {
-	return ac_build_load_custom(ctx, base_ptr, index, false, false, false);
+	return ac_build_load_custom(ctx, base_ptr, index, false, false);
 }
 
 LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
 				     LLVMValueRef base_ptr, LLVMValueRef index)
 {
-	return ac_build_load_custom(ctx, base_ptr, index, false, true, false);
+	return ac_build_load_custom(ctx, base_ptr, index, false, true);
 }
 
-/* This assumes that there is no unsigned integer wraparound during the address
- * computation, excluding all GEPs within base_ptr. */
 LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
 				   LLVMValueRef base_ptr, LLVMValueRef index)
 {
-	return ac_build_load_custom(ctx, base_ptr, index, true, true, true);
-}
-
-/* See ac_build_load_custom() documentation. */
-LLVMValueRef ac_build_load_to_sgpr_uint_wraparound(struct ac_llvm_context *ctx,
-				   LLVMValueRef base_ptr, LLVMValueRef index)
-{
-	return ac_build_load_custom(ctx, base_ptr, index, true, true, false);
+	return ac_build_load_custom(ctx, base_ptr, index, true, true);
 }
 
 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
@@ -1076,7 +952,7 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
 		LLVMValueRef args[] = {
 			ac_to_float(ctx, vdata),
 			LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
-			ctx->i32_0,
+			LLVMConstInt(ctx->i32, 0, 0),
 			offset,
 			LLVMConstInt(ctx->i1, glc, 0),
 			LLVMConstInt(ctx->i1, slc, 0),
@@ -1104,8 +980,8 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
 	LLVMValueRef args[] = {
 		vdata,
 		LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
-		ctx->i32_0,
-		voffset ? voffset : ctx->i32_0,
+		LLVMConstInt(ctx->i32, 0, 0),
+		voffset ? voffset : LLVMConstInt(ctx->i32, 0, 0),
 		soffset,
 		LLVMConstInt(ctx->i32, inst_offset, 0),
 		LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
@@ -1137,7 +1013,7 @@ ac_build_buffer_load_common(struct ac_llvm_context *ctx,
 {
 	LLVMValueRef args[] = {
 		LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
-		vindex ? vindex : ctx->i32_0,
+		vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0),
 		voffset,
 		LLVMConstInt(ctx->i1, glc, 0),
 		LLVMConstInt(ctx->i1, slc, 0)
@@ -1232,7 +1108,7 @@ LLVMValueRef ac_build_buffer_load_format_gfx9_safe(struct ac_llvm_context *ctx,
                                                   bool can_speculate)
 {
 	LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->builder, rsrc, LLVMConstInt(ctx->i32, 2, 0), "");
-	LLVMValueRef stride = LLVMBuildExtractElement(ctx->builder, rsrc, ctx->i32_1, "");
+	LLVMValueRef stride = LLVMBuildExtractElement(ctx->builder, rsrc, LLVMConstInt(ctx->i32, 1, 0), "");
 	stride = LLVMBuildLShr(ctx->builder, stride, LLVMConstInt(ctx->i32, 16, 0), "");
 
 	LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->builder,
@@ -1253,8 +1129,7 @@ ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
 			    LLVMValueRef vindex,
 			    LLVMValueRef voffset,
 				LLVMValueRef soffset,
-				LLVMValueRef immoffset,
-				LLVMValueRef glc)
+				LLVMValueRef immoffset)
 {
 	const char *name = "llvm.amdgcn.tbuffer.load.i32";
 	LLVMTypeRef type = ctx->i32;
@@ -1266,7 +1141,7 @@ ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
 				immoffset,
 				LLVMConstInt(ctx->i32, V_008F0C_BUF_DATA_FORMAT_16, false),
 				LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, false),
-				glc,
+				ctx->i1false,
 				ctx->i1false,
 	};
 	LLVMValueRef res = ac_build_intrinsic(ctx, name, type, params, 9, 0);
@@ -1300,7 +1175,7 @@ ac_get_thread_id(struct ac_llvm_context *ctx)
 
 	LLVMValueRef tid_args[2];
 	tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
-	tid_args[1] = ctx->i32_0;
+	tid_args[1] = LLVMConstInt(ctx->i32, 0, false);
 	tid_args[1] = ac_build_intrinsic(ctx,
 					 "llvm.amdgcn.mbcnt.lo", ctx->i32,
 					 tid_args, 2, AC_FUNC_ATTR_READNONE);
@@ -1467,7 +1342,7 @@ ac_build_imsb(struct ac_llvm_context *ctx,
 	LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
 	LLVMValueRef cond = LLVMBuildOr(ctx->builder,
 					LLVMBuildICmp(ctx->builder, LLVMIntEQ,
-						      arg, ctx->i32_0, ""),
+						      arg, LLVMConstInt(ctx->i32, 0, 0), ""),
 					LLVMBuildICmp(ctx->builder, LLVMIntEQ,
 						      arg, all_ones, ""), "");
 
@@ -1483,31 +1358,17 @@ ac_build_umsb(struct ac_llvm_context *ctx,
 	LLVMTypeRef type;
 	LLVMValueRef highest_bit;
 	LLVMValueRef zero;
-	unsigned bitsize;
 
-	bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(arg));
-	switch (bitsize) {
-	case 64:
+	if (ac_get_elem_bits(ctx, LLVMTypeOf(arg)) == 64) {
 		intrin_name = "llvm.ctlz.i64";
 		type = ctx->i64;
 		highest_bit = LLVMConstInt(ctx->i64, 63, false);
 		zero = ctx->i64_0;
-		break;
-	case 32:
+	} else {
 		intrin_name = "llvm.ctlz.i32";
 		type = ctx->i32;
 		highest_bit = LLVMConstInt(ctx->i32, 31, false);
 		zero = ctx->i32_0;
-		break;
-	case 16:
-		intrin_name = "llvm.ctlz.i16";
-		type = ctx->i16;
-		highest_bit = LLVMConstInt(ctx->i16, 15, false);
-		zero = ctx->i16_0;
-		break;
-	default:
-		unreachable(!"invalid bitsize");
-		break;
 	}
 
 	LLVMValueRef params[2] = {
@@ -2013,24 +1874,83 @@ LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
 				  args, 2, AC_FUNC_ATTR_READNONE);
 }
 
+/* Upper 16 bits must be zero. */
+static LLVMValueRef ac_llvm_pack_two_int16(struct ac_llvm_context *ctx,
+					   LLVMValueRef val[2])
+{
+	return LLVMBuildOr(ctx->builder, val[0],
+			   LLVMBuildShl(ctx->builder, val[1],
+					LLVMConstInt(ctx->i32, 16, 0),
+					""), "");
+}
+
+/* Upper 16 bits are ignored and will be dropped. */
+static LLVMValueRef ac_llvm_pack_two_int32_as_int16(struct ac_llvm_context *ctx,
+						    LLVMValueRef val[2])
+{
+	LLVMValueRef v[2] = {
+		LLVMBuildAnd(ctx->builder, val[0],
+			     LLVMConstInt(ctx->i32, 0xffff, 0), ""),
+		val[1],
+	};
+	return ac_llvm_pack_two_int16(ctx, v);
+}
+
 LLVMValueRef ac_build_cvt_pknorm_i16(struct ac_llvm_context *ctx,
 				     LLVMValueRef args[2])
 {
-	LLVMValueRef res =
-		ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.i16",
-				   ctx->v2i16, args, 2,
-				   AC_FUNC_ATTR_READNONE);
-	return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
+	if (HAVE_LLVM >= 0x0600) {
+		LLVMValueRef res =
+			ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.i16",
+					   ctx->v2i16, args, 2,
+					   AC_FUNC_ATTR_READNONE);
+		return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
+	}
+
+	LLVMValueRef val[2];
+
+	for (int chan = 0; chan < 2; chan++) {
+		/* Clamp between [-1, 1]. */
+		val[chan] = ac_build_fmin(ctx, args[chan], ctx->f32_1);
+		val[chan] = ac_build_fmax(ctx, val[chan], LLVMConstReal(ctx->f32, -1));
+		/* Convert to a signed integer in [-32767, 32767]. */
+		val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
+					  LLVMConstReal(ctx->f32, 32767), "");
+		/* If positive, add 0.5, else add -0.5. */
+		val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
+				LLVMBuildSelect(ctx->builder,
+					LLVMBuildFCmp(ctx->builder, LLVMRealOGE,
+						      val[chan], ctx->f32_0, ""),
+					LLVMConstReal(ctx->f32, 0.5),
+					LLVMConstReal(ctx->f32, -0.5), ""), "");
+		val[chan] = LLVMBuildFPToSI(ctx->builder, val[chan], ctx->i32, "");
+	}
+	return ac_llvm_pack_two_int32_as_int16(ctx, val);
 }
 
 LLVMValueRef ac_build_cvt_pknorm_u16(struct ac_llvm_context *ctx,
 				     LLVMValueRef args[2])
 {
-	LLVMValueRef res =
-		ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.u16",
-				   ctx->v2i16, args, 2,
-				   AC_FUNC_ATTR_READNONE);
-	return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
+	if (HAVE_LLVM >= 0x0600) {
+		LLVMValueRef res =
+			ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.u16",
+					   ctx->v2i16, args, 2,
+					   AC_FUNC_ATTR_READNONE);
+		return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
+	}
+
+	LLVMValueRef val[2];
+
+	for (int chan = 0; chan < 2; chan++) {
+		val[chan] = ac_build_clamp(ctx, args[chan]);
+		val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
+					  LLVMConstReal(ctx->f32, 65535), "");
+		val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
+					  LLVMConstReal(ctx->f32, 0.5), "");
+		val[chan] = LLVMBuildFPToUI(ctx->builder, val[chan],
+					    ctx->i32, "");
+	}
+	return ac_llvm_pack_two_int32_as_int16(ctx, val);
 }
 
 /* The 8-bit and 10-bit clamping is for HW workarounds. */
@@ -2047,9 +1967,10 @@ LLVMValueRef ac_build_cvt_pk_i16(struct ac_llvm_context *ctx,
 		bits != 10 ? max_rgb : ctx->i32_1;
 	LLVMValueRef min_alpha =
 		bits != 10 ? min_rgb : LLVMConstInt(ctx->i32, -2, 0);
+	bool has_intrinsic = HAVE_LLVM >= 0x0600;
 
 	/* Clamp. */
-	if (bits != 16) {
+	if (!has_intrinsic || bits != 16) {
 		for (int i = 0; i < 2; i++) {
 			bool alpha = hi && i == 1;
 			args[i] = ac_build_imin(ctx, args[i],
@@ -2059,11 +1980,15 @@ LLVMValueRef ac_build_cvt_pk_i16(struct ac_llvm_context *ctx,
 		}
 	}
 
-	LLVMValueRef res =
-		ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.i16",
-				   ctx->v2i16, args, 2,
-				   AC_FUNC_ATTR_READNONE);
-	return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
+	if (has_intrinsic) {
+		LLVMValueRef res =
+			ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.i16",
+					   ctx->v2i16, args, 2,
+					   AC_FUNC_ATTR_READNONE);
+		return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
+	}
+
+	return ac_llvm_pack_two_int32_as_int16(ctx, args);
 }
 
 /* The 8-bit and 10-bit clamping is for HW workarounds. */
@@ -2076,9 +2001,10 @@ LLVMValueRef ac_build_cvt_pk_u16(struct ac_llvm_context *ctx,
 		bits == 8 ? 255 : bits == 10 ? 1023 : 65535, 0);
 	LLVMValueRef max_alpha =
 		bits != 10 ? max_rgb : LLVMConstInt(ctx->i32, 3, 0);
+	bool has_intrinsic = HAVE_LLVM >= 0x0600;
 
 	/* Clamp. */
-	if (bits != 16) {
+	if (!has_intrinsic || bits != 16) {
 		for (int i = 0; i < 2; i++) {
 			bool alpha = hi && i == 1;
 			args[i] = ac_build_umin(ctx, args[i],
@@ -2086,23 +2012,37 @@ LLVMValueRef ac_build_cvt_pk_u16(struct ac_llvm_context *ctx,
 		}
 	}
 
-	LLVMValueRef res =
-		ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.u16",
-				   ctx->v2i16, args, 2,
-				   AC_FUNC_ATTR_READNONE);
-	return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
+	if (has_intrinsic) {
+		LLVMValueRef res =
+			ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.u16",
+					   ctx->v2i16, args, 2,
+					   AC_FUNC_ATTR_READNONE);
+		return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
+	}
+
+	return ac_llvm_pack_two_int16(ctx, args);
 }
 
 LLVMValueRef ac_build_wqm_vote(struct ac_llvm_context *ctx, LLVMValueRef i1)
 {
+	assert(HAVE_LLVM >= 0x0600);
 	return ac_build_intrinsic(ctx, "llvm.amdgcn.wqm.vote", ctx->i1,
 				  &i1, 1, AC_FUNC_ATTR_READNONE);
 }
 
 void ac_build_kill_if_false(struct ac_llvm_context *ctx, LLVMValueRef i1)
 {
-	ac_build_intrinsic(ctx, "llvm.amdgcn.kill", ctx->voidt,
-			   &i1, 1, 0);
+	if (HAVE_LLVM >= 0x0600) {
+		ac_build_intrinsic(ctx, "llvm.amdgcn.kill", ctx->voidt,
+				   &i1, 1, 0);
+		return;
+	}
+
+	LLVMValueRef value = LLVMBuildSelect(ctx->builder, i1,
+					     LLVMConstReal(ctx->f32, 1),
+					     LLVMConstReal(ctx->f32, -1), "");
+	ac_build_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
+			   &value, 1, AC_FUNC_ATTR_LEGACY);
 }
 
 LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
@@ -2122,20 +2062,6 @@ LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
 				  AC_FUNC_ATTR_READNONE);
 }
 
-LLVMValueRef ac_build_imad(struct ac_llvm_context *ctx, LLVMValueRef s0,
-			   LLVMValueRef s1, LLVMValueRef s2)
-{
-	return LLVMBuildAdd(ctx->builder,
-			    LLVMBuildMul(ctx->builder, s0, s1, ""), s2, "");
-}
-
-LLVMValueRef ac_build_fmad(struct ac_llvm_context *ctx, LLVMValueRef s0,
-			   LLVMValueRef s1, LLVMValueRef s2)
-{
-	return LLVMBuildFAdd(ctx->builder,
-			     LLVMBuildFMul(ctx->builder, s0, s1, ""), s2, "");
-}
-
 void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16)
 {
 	LLVMValueRef args[1] = {
@@ -2173,25 +2099,14 @@ LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0,
 	LLVMValueRef cmp, val, zero, one;
 	LLVMTypeRef type;
 
-	switch (bitsize) {
-	case 64:
-		type = ctx->i64;
-		zero = ctx->i64_0;
-		one = ctx->i64_1;
-		break;
-	case 32:
+	if (bitsize == 32) {
 		type = ctx->i32;
 		zero = ctx->i32_0;
 		one = ctx->i32_1;
-		break;
-	case 16:
-		type = ctx->i16;
-		zero = ctx->i16_0;
-		one = ctx->i16_1;
-		break;
-	default:
-		unreachable(!"invalid bitsize");
-		break;
+	} else {
+		type = ctx->i64;
+		zero = ctx->i64_0;
+		one = ctx->i64_1;
 	}
 
 	cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, zero, "");
@@ -2224,66 +2139,6 @@ LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0,
 	return val;
 }
 
-LLVMValueRef ac_build_bit_count(struct ac_llvm_context *ctx, LLVMValueRef src0)
-{
-	LLVMValueRef result;
-	unsigned bitsize;
-
-	bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
-
-	switch (bitsize) {
-	case 64:
-		result = ac_build_intrinsic(ctx, "llvm.ctpop.i64", ctx->i64,
-					    (LLVMValueRef []) { src0 }, 1,
-					    AC_FUNC_ATTR_READNONE);
-
-		result = LLVMBuildTrunc(ctx->builder, result, ctx->i32, "");
-		break;
-	case 32:
-		result = ac_build_intrinsic(ctx, "llvm.ctpop.i32", ctx->i32,
-					    (LLVMValueRef []) { src0 }, 1,
-					    AC_FUNC_ATTR_READNONE);
-		break;
-	case 16:
-		result = ac_build_intrinsic(ctx, "llvm.ctpop.i16", ctx->i16,
-					    (LLVMValueRef []) { src0 }, 1,
-					    AC_FUNC_ATTR_READNONE);
-		break;
-	default:
-		unreachable(!"invalid bitsize");
-		break;
-	}
-
-	return result;
-}
-
-LLVMValueRef ac_build_bitfield_reverse(struct ac_llvm_context *ctx,
-				       LLVMValueRef src0)
-{
-	LLVMValueRef result;
-	unsigned bitsize;
-
-	bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
-
-	switch (bitsize) {
-	case 32:
-		result = ac_build_intrinsic(ctx, "llvm.bitreverse.i32", ctx->i32,
-					    (LLVMValueRef []) { src0 }, 1,
-					    AC_FUNC_ATTR_READNONE);
-		break;
-	case 16:
-		result = ac_build_intrinsic(ctx, "llvm.bitreverse.i16", ctx->i16,
-					    (LLVMValueRef []) { src0 }, 1,
-					    AC_FUNC_ATTR_READNONE);
-		break;
-	default:
-		unreachable(!"invalid bitsize");
-		break;
-	}
-
-	return result;
-}
-
 #define AC_EXP_TARGET		0
 #define AC_EXP_ENABLED_CHANNELS 1
 #define AC_EXP_OUT0		2
@@ -2572,7 +2427,7 @@ void ac_declare_lds_as_pointer(struct ac_llvm_context *ctx)
 {
 	unsigned lds_size = ctx->chip_class >= CIK ? 65536 : 32768;
 	ctx->lds = LLVMBuildIntToPtr(ctx->builder, ctx->i32_0,
-				     LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), AC_ADDR_SPACE_LDS),
+				     LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), AC_LOCAL_ADDR_SPACE),
 				     "lds");
 }
 
@@ -2599,25 +2454,14 @@ LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
 	const char *intrin_name;
 	LLVMTypeRef type;
 	LLVMValueRef zero;
-
-	switch (src0_bitsize) {
-	case 64:
+	if (src0_bitsize == 64) {
 		intrin_name = "llvm.cttz.i64";
 		type = ctx->i64;
 		zero = ctx->i64_0;
-		break;
-	case 32:
+	} else {
 		intrin_name = "llvm.cttz.i32";
 		type = ctx->i32;
 		zero = ctx->i32_0;
-		break;
-	case 16:
-		intrin_name = "llvm.cttz.i16";
-		type = ctx->i16;
-		zero = ctx->i16_0;
-		break;
-	default:
-		unreachable(!"invalid bitsize");
 	}
 
 	LLVMValueRef params[2] = {
@@ -2632,7 +2476,7 @@ LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
 		 *
 		 * The hardware already implements the correct behavior.
 		 */
-		ctx->i1true,
+		LLVMConstInt(ctx->i1, 1, false),
 	};
 
 	LLVMValueRef lsb = ac_build_intrinsic(ctx, intrin_name, type,
@@ -2654,7 +2498,7 @@ LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
 LLVMTypeRef ac_array_in_const_addr_space(LLVMTypeRef elem_type)
 {
 	return LLVMPointerType(LLVMArrayType(elem_type, 0),
-			       AC_ADDR_SPACE_CONST);
+			       AC_CONST_ADDR_SPACE);
 }
 
 LLVMTypeRef ac_array_in_const32_addr_space(LLVMTypeRef elem_type)
@@ -2663,7 +2507,7 @@ LLVMTypeRef ac_array_in_const32_addr_space(LLVMTypeRef elem_type)
 		return ac_array_in_const_addr_space(elem_type);
 
 	return LLVMPointerType(LLVMArrayType(elem_type, 0),
-			       AC_ADDR_SPACE_CONST_32BIT);
+			       AC_CONST_32BIT_ADDR_SPACE);
 }
 
 static struct ac_llvm_flow *
@@ -2837,7 +2681,7 @@ void ac_build_uif(struct ac_llvm_context *ctx, LLVMValueRef value,
 	if_cond_emit(ctx, cond, label_id);
 }
 
-LLVMValueRef ac_build_alloca_undef(struct ac_llvm_context *ac, LLVMTypeRef type,
+LLVMValueRef ac_build_alloca(struct ac_llvm_context *ac, LLVMTypeRef type,
 			     const char *name)
 {
 	LLVMBuilderRef builder = ac->builder;
@@ -2855,15 +2699,18 @@ LLVMValueRef ac_build_alloca_undef(struct ac_llvm_context *ac, LLVMTypeRef type,
 	}
 
 	res = LLVMBuildAlloca(first_builder, type, name);
+	LLVMBuildStore(builder, LLVMConstNull(type), res);
+
 	LLVMDisposeBuilder(first_builder);
+
 	return res;
 }
 
-LLVMValueRef ac_build_alloca(struct ac_llvm_context *ac,
+LLVMValueRef ac_build_alloca_undef(struct ac_llvm_context *ac,
 				   LLVMTypeRef type, const char *name)
 {
-	LLVMValueRef ptr = ac_build_alloca_undef(ac, type, name);
-	LLVMBuildStore(ac->builder, LLVMConstNull(type), ptr);
+	LLVMValueRef ptr = ac_build_alloca(ac, type, name);
+	LLVMBuildStore(ac->builder, LLVMGetUndef(type), ptr);
 	return ptr;
 }
 
@@ -2882,9 +2729,11 @@ LLVMValueRef ac_trim_vector(struct ac_llvm_context *ctx, LLVMValueRef value,
 	if (count == num_components)
 		return value;
 
-	LLVMValueRef masks[] = {
-	    ctx->i32_0, ctx->i32_1,
-	    LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false)};
+	LLVMValueRef masks[MAX2(count, 2)];
+	masks[0] = ctx->i32_0;
+	masks[1] = ctx->i32_1;
+	for (unsigned i = 2; i < count; i++)
+		masks[i] = LLVMConstInt(ctx->i32, i, false);
 
 	if (count == 1)
 		return LLVMBuildExtractElement(ctx->builder, value, masks[0],
@@ -3404,7 +3253,7 @@ ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src,
 		unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3)
 {
 	unsigned mask = dpp_quad_perm(lane0, lane1, lane2, lane3);
-	if (ctx->chip_class >= VI) {
+	if (ctx->chip_class >= VI && HAVE_LLVM >= 0x0600) {
 		return ac_build_dpp(ctx, src, src, mask, 0xf, 0xf, false);
 	} else {
 		return ac_build_ds_swizzle(ctx, src, (1 << 15) | mask);

src/amd/common/ac_llvm_build.h

@@ -37,20 +37,12 @@ extern "C" {
 #define HAVE_32BIT_POINTERS (HAVE_LLVM >= 0x0700)
 
 enum {
-	AC_ADDR_SPACE_FLAT = HAVE_LLVM >= 0x0700 ? 0 : 4, /* Slower than global. */
-	AC_ADDR_SPACE_GLOBAL = 1,
-	AC_ADDR_SPACE_GDS = HAVE_LLVM >= 0x0700 ? 2 : 5,
-	AC_ADDR_SPACE_LDS = 3,
-	AC_ADDR_SPACE_CONST = HAVE_LLVM >= 0x0700 ? 4 : 2, /* Global allowing SMEM. */
-	AC_ADDR_SPACE_CONST_32BIT = 6, /* same as CONST, but the pointer type has 32 bits */
+	/* CONST is the only address space that selects SMEM loads */
+	AC_CONST_ADDR_SPACE = HAVE_LLVM >= 0x700 ? 4 : 2,
+	AC_LOCAL_ADDR_SPACE = 3,
+	AC_CONST_32BIT_ADDR_SPACE = 6, /* same as CONST, but the pointer type has 32 bits */
 };
 
-/* Combine these with & instead of |. */
-#define NOOP_WAITCNT	0xcf7f
-#define LGKM_CNT	0xc07f
-#define EXP_CNT		0xcf0f
-#define VM_CNT		0x0f70 /* On GFX9, vmcnt has 6 bits in [0:3] and [14:15] */
-
 struct ac_llvm_flow;
 
 struct ac_llvm_context {
@@ -76,8 +68,6 @@ struct ac_llvm_context {
 	LLVMTypeRef v4f32;
 	LLVMTypeRef v8i32;
 
-	LLVMValueRef i16_0;
-	LLVMValueRef i16_1;
 	LLVMValueRef i32_0;
 	LLVMValueRef i32_1;
 	LLVMValueRef i64_0;
@@ -143,7 +133,6 @@ ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type,
 	     unsigned count_incoming, LLVMValueRef *values,
 	     LLVMBasicBlockRef *blocks);
 
-void ac_build_s_barrier(struct ac_llvm_context *ctx);
 void ac_build_optimization_barrier(struct ac_llvm_context *ctx,
 				   LLVMValueRef *pvgpr);
 
@@ -178,30 +167,12 @@ LLVMValueRef ac_build_expand(struct ac_llvm_context *ctx,
 LLVMValueRef ac_build_expand_to_vec4(struct ac_llvm_context *ctx,
 				     LLVMValueRef value,
 				     unsigned num_channels);
-LLVMValueRef ac_build_round(struct ac_llvm_context *ctx, LLVMValueRef value);
 
 LLVMValueRef
 ac_build_fdiv(struct ac_llvm_context *ctx,
 	      LLVMValueRef num,
 	      LLVMValueRef den);
 
-LLVMValueRef ac_build_fast_udiv(struct ac_llvm_context *ctx,
-				LLVMValueRef num,
-				LLVMValueRef multiplier,
-				LLVMValueRef pre_shift,
-				LLVMValueRef post_shift,
-				LLVMValueRef increment);
-LLVMValueRef ac_build_fast_udiv_nuw(struct ac_llvm_context *ctx,
-				    LLVMValueRef num,
-				    LLVMValueRef multiplier,
-				    LLVMValueRef pre_shift,
-				    LLVMValueRef post_shift,
-				    LLVMValueRef increment);
-LLVMValueRef ac_build_fast_udiv_u31_d_not_one(struct ac_llvm_context *ctx,
-					      LLVMValueRef num,
-					      LLVMValueRef multiplier,
-					      LLVMValueRef post_shift);
-
 void
 ac_prepare_cube_coords(struct ac_llvm_context *ctx,
 		       bool is_deriv, bool is_array, bool is_lod,
@@ -228,8 +199,6 @@ LLVMValueRef
 ac_build_gep0(struct ac_llvm_context *ctx,
 	      LLVMValueRef base_ptr,
 	      LLVMValueRef index);
-LLVMValueRef ac_build_pointer_add(struct ac_llvm_context *ctx, LLVMValueRef ptr,
-				  LLVMValueRef index);
 
 void
 ac_build_indexed_store(struct ac_llvm_context *ctx,
@@ -242,8 +211,6 @@ LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
 				     LLVMValueRef base_ptr, LLVMValueRef index);
 LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
 				   LLVMValueRef base_ptr, LLVMValueRef index);
-LLVMValueRef ac_build_load_to_sgpr_uint_wraparound(struct ac_llvm_context *ctx,
-				   LLVMValueRef base_ptr, LLVMValueRef index);
 
 void
 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
@@ -294,8 +261,7 @@ ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
 			    LLVMValueRef vindex,
 			    LLVMValueRef voffset,
 				LLVMValueRef soffset,
-				LLVMValueRef immoffset,
-				LLVMValueRef glc);
+				LLVMValueRef immoffset);
 
 LLVMValueRef
 ac_get_thread_id(struct ac_llvm_context *ctx);
@@ -434,10 +400,6 @@ void ac_build_kill_if_false(struct ac_llvm_context *ctx, LLVMValueRef i1);
 LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
 			  LLVMValueRef offset, LLVMValueRef width,
 			  bool is_signed);
-LLVMValueRef ac_build_imad(struct ac_llvm_context *ctx, LLVMValueRef s0,
-			   LLVMValueRef s1, LLVMValueRef s2);
-LLVMValueRef ac_build_fmad(struct ac_llvm_context *ctx, LLVMValueRef s0,
-			   LLVMValueRef s1, LLVMValueRef s2);
 
 void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16);
 
@@ -450,11 +412,6 @@ LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0,
 LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0,
 			    unsigned bitsize);
 
-LLVMValueRef ac_build_bit_count(struct ac_llvm_context *ctx, LLVMValueRef src0);
-
-LLVMValueRef ac_build_bitfield_reverse(struct ac_llvm_context *ctx,
-				       LLVMValueRef src0);
-
 void ac_optimize_vs_outputs(struct ac_llvm_context *ac,
 			    LLVMValueRef main_fn,
 			    uint8_t *vs_output_param_offset,

src/amd/common/ac_llvm_helper.cpp

@@ -92,7 +92,11 @@ LLVMBuilderRef ac_create_builder(LLVMContextRef ctx,
 		llvm::unwrap(builder)->setFastMathFlags(flags);
 		break;
 	case AC_FLOAT_MODE_UNSAFE_FP_MATH:
+#if HAVE_LLVM >= 0x0600
 		flags.setFast();
+#else
+		flags.setUnsafeAlgebra();
+#endif
 		llvm::unwrap(builder)->setFastMathFlags(flags);
 		break;
 	}

src/amd/common/ac_llvm_util.c

@@ -135,8 +135,6 @@ const char *ac_get_llvm_processor_name(enum radeon_family family)
 		return HAVE_LLVM >= 0x0700 ? "gfx904" : "gfx902";
 	case CHIP_VEGA20:
 		return HAVE_LLVM >= 0x0700 ? "gfx906" : "gfx902";
-	case CHIP_RAVEN2:
-		return "gfx902"; /* TODO: use gfx909 when it's available */
 	default:
 		return "";
 	}

src/amd/common/ac_nir_to_llvm.c

@@ -311,18 +311,9 @@ static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
 }
 
 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
-			     LLVMValueRef src0,
-			     unsigned bitsize)
+			     LLVMValueRef src0)
 {
-	LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
-					   LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
-					   "");
-	result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
-
-	if (bitsize == 32)
-		return result;
-
-	return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
+	return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), "");
 }
 
 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
@@ -436,7 +427,7 @@ static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx,
 		/* FIXME: LLVM 7 returns incorrect result when count is 0.
 		 * https://bugs.freedesktop.org/show_bug.cgi?id=107276
 		 */
-		LLVMValueRef zero = ctx->i32_0;
+		LLVMValueRef zero = LLVMConstInt(ctx->i32, 0, false);
 		LLVMValueRef icond1 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
 		LLVMValueRef icond2 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], zero, "");
 
@@ -495,7 +486,7 @@ static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
 					  LLVMValueRef src0)
 {
 	LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
-	LLVMValueRef temps[2], val;
+	LLVMValueRef temps[2], result, val;
 	int i;
 
 	for (i = 0; i < 2; i++) {
@@ -504,7 +495,12 @@ static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
 		val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
 		temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
 	}
-	return ac_build_gather_values(ctx, temps, 2);
+
+	result = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), temps[0],
+					ctx->i32_0, "");
+	result = LLVMBuildInsertElement(ctx->builder, result, temps[1],
+					ctx->i32_1, "");
+	return result;
 }
 
 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
@@ -845,10 +841,15 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
 		result = emit_bitfield_insert(&ctx->ac, src[0], src[1], src[2], src[3]);
 		break;
 	case nir_op_bitfield_reverse:
-		result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
+		result = ac_build_intrinsic(&ctx->ac, "llvm.bitreverse.i32", ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
 		break;
 	case nir_op_bit_count:
-		result = ac_build_bit_count(&ctx->ac, src[0]);
+		if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 32)
+			result = ac_build_intrinsic(&ctx->ac, "llvm.ctpop.i32", ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
+		else {
+			result = ac_build_intrinsic(&ctx->ac, "llvm.ctpop.i64", ctx->ac.i64, src, 1, AC_FUNC_ATTR_READNONE);
+			result = LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
+		}
 		break;
 	case nir_op_vec2:
 	case nir_op_vec3:
@@ -941,7 +942,7 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
 		result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
 		break;
 	case nir_op_b2f:
-		result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
+		result = emit_b2f(&ctx->ac, src[0]);
 		break;
 	case nir_op_f2b:
 		result = emit_f2b(&ctx->ac, src[0]);
@@ -1003,7 +1004,10 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
 
 	case nir_op_pack_64_2x32_split: {
 		LLVMValueRef tmp = LLVMGetUndef(ctx->ac.v2i32);
-		tmp = ac_build_gather_values(&ctx->ac, src, 2);
+		tmp = LLVMBuildInsertElement(ctx->ac.builder, tmp,
+					     src[0], ctx->ac.i32_0, "");
+		tmp = LLVMBuildInsertElement(ctx->ac.builder, tmp,
+					     src[1], ctx->ac.i32_1, "");
 		result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
 		break;
 	}
@@ -1401,7 +1405,7 @@ static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
 		LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
 		res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
 		LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
-		cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
+		cond = LLVMBuildTrunc(ctx->ac.builder, cond, LLVMInt1Type(), "");
 		LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
 					LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
 					LLVMConstInt(ctx->ac.i32, 4, false)};
@@ -1439,7 +1443,7 @@ static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueR
                                          unsigned start, unsigned count)
 {
 	LLVMValueRef mask[] = {
-	ctx->i32_0, ctx->i32_1,
+	LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
 	LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
 
 	unsigned src_elements = ac_get_llvm_num_components(src);
@@ -1465,11 +1469,6 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
 	LLVMValueRef src_data = get_src(ctx, instr->src[0]);
 	int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
 	unsigned writemask = nir_intrinsic_write_mask(instr);
-	enum gl_access_qualifier access = nir_intrinsic_access(instr);
-	LLVMValueRef glc = ctx->ac.i1false;
-
-	if (access & (ACCESS_VOLATILE | ACCESS_COHERENT))
-		glc = ctx->ac.i1true;
 
 	LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
 				        get_src(ctx, instr->src[1]), true);
@@ -1526,7 +1525,7 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
 				ctx->ac.i32_0,
 				LLVMConstInt(ctx->ac.i32, 2, false), // dfmt (= 16bit)
 				LLVMConstInt(ctx->ac.i32, 4, false), // nfmt (= uint)
-				glc,
+				ctx->ac.i1false,
 				ctx->ac.i1false,
 			};
 			ac_build_intrinsic(&ctx->ac, store_name,
@@ -1554,7 +1553,7 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
 				rsrc,
 				ctx->ac.i32_0, /* vindex */
 				offset,
-				glc,
+				ctx->ac.i1false,  /* glc */
 				ctx->ac.i1false,  /* slc */
 			};
 			ac_build_intrinsic(&ctx->ac, store_name,
@@ -1579,7 +1578,7 @@ static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
 						 true);
 	params[arg_count++] = ctx->ac.i32_0; /* vindex */
 	params[arg_count++] = get_src(ctx, instr->src[1]);      /* voffset */
-	params[arg_count++] = ctx->ac.i1false;  /* slc */
+	params[arg_count++] = LLVMConstInt(ctx->ac.i1, 0, false);  /* slc */
 
 	switch (instr->intrinsic) {
 	case nir_intrinsic_ssbo_atomic_add:
@@ -1622,37 +1621,39 @@ static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
                                       const nir_intrinsic_instr *instr)
 {
-	LLVMValueRef results[2];
-	int load_bytes;
 	int elem_size_bytes = instr->dest.ssa.bit_size / 8;
 	int num_components = instr->num_components;
-	int num_bytes = num_components * elem_size_bytes;
-	enum gl_access_qualifier access = nir_intrinsic_access(instr);
-	LLVMValueRef glc = ctx->ac.i1false;
 
-	if (access & (ACCESS_VOLATILE | ACCESS_COHERENT))
-		glc = ctx->ac.i1true;
+	LLVMValueRef offset = get_src(ctx, instr->src[1]);
+	LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
+						get_src(ctx, instr->src[0]), false);
+	LLVMValueRef vindex = ctx->ac.i32_0;
 
-	for (int i = 0; i < num_bytes; i += load_bytes) {
-		load_bytes = MIN2(num_bytes - i, 16);
-		const char *load_name;
-		LLVMTypeRef data_type;
-		LLVMValueRef offset = get_src(ctx, instr->src[1]);
-		LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i, false);
-		LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
-							get_src(ctx, instr->src[0]), false);
-		LLVMValueRef vindex = ctx->ac.i32_0;
+	LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
+	LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
 
-		int idx = i ? 1 : 0;
+	LLVMValueRef results[4];
+	for (int i = 0; i < num_components;) {
+		int num_elems = num_components - i;
+		if (elem_size_bytes < 4)
+			num_elems = 1;
+		if (num_elems * elem_size_bytes > 16)
+			num_elems = 16 / elem_size_bytes;
+		int load_bytes = num_elems * elem_size_bytes;
+
+		LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
+
+		LLVMValueRef ret;
 		if (load_bytes == 2) {
-			results[idx] = ac_build_tbuffer_load_short(&ctx->ac,
-								   rsrc,
-								   vindex,
-								   offset,
-								   ctx->ac.i32_0,
-								   immoffset,
-								   glc);
+			ret = ac_build_tbuffer_load_short(&ctx->ac,
+							  rsrc,
+							  vindex,
+							  offset,
+							  ctx->ac.i32_0,
+							  immoffset);
 		} else {
+			const char *load_name;
+			LLVMTypeRef data_type;
 			switch (load_bytes) {
 			case 16:
 			case 12:
@@ -1675,36 +1676,26 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
 				rsrc,
 				vindex,
 				LLVMBuildAdd(ctx->ac.builder, offset, immoffset, ""),
-				glc,
+				ctx->ac.i1false,
 				ctx->ac.i1false,
 			};
-			results[idx] = ac_build_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
-			unsigned num_elems = ac_get_type_size(data_type) / elem_size_bytes;
-			LLVMTypeRef resTy = LLVMVectorType(LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size), num_elems);
-			results[idx] = LLVMBuildBitCast(ctx->ac.builder, results[idx], resTy, "");
-		}
-	}
-
-	assume(results[0]);
-	LLVMValueRef ret = results[0];
-	if (num_bytes > 16 || num_components == 3) {
-		LLVMValueRef masks[] = {
-		        LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
-		        LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
-		};
-
-		if (num_bytes > 16 && num_components == 3) {
-			/* we end up with a v2i64 and i64 but shuffle fails on that */
-			results[1] = ac_build_expand(&ctx->ac, results[1], 1, 2);
+			ret = ac_build_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
 		}
 
-		LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
-		ret = LLVMBuildShuffleVector(ctx->ac.builder, results[0],
-					     results[num_bytes > 16 ? 1 : 0], swizzle, "");
+		LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
+		ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
+		ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
+
+		LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
+		ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
+
+		for (unsigned j = 0; j < num_elems; j++) {
+			results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
+		}
+		i += num_elems;
 	}
 
-	return LLVMBuildBitCast(ctx->ac.builder, ret,
-	                        get_def_type(ctx, &instr->dest.ssa), "");
+	return ac_build_gather_values(&ctx->ac, results, num_components);
 }
 
 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
@@ -1729,8 +1720,7 @@ static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
 								 ctx->ac.i32_0,
 								 offset,
 								 ctx->ac.i32_0,
-								 LLVMConstInt(ctx->ac.i32, 2 * i, 0),
-								 ctx->ac.i1false);
+								 LLVMConstInt(ctx->ac.i32, 2 * i, 0));
 		}
 		ret = ac_build_gather_values(&ctx->ac, results, num_components);
 	} else {
@@ -2260,8 +2250,7 @@ static void get_image_coords(struct ac_nir_context *ctx,
 							       fmask_load_address[1],
 							       fmask_load_address[2],
 							       sample_index,
-							       get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
-										AC_DESC_FMASK, NULL, false, false));
+							       get_image_descriptor(ctx, instr, AC_DESC_FMASK, false));
 	}
 	if (count == 1 && !gfx9_1d) {
 		if (instr->src[1].ssa->num_components)
@@ -2359,7 +2348,7 @@ static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
 					    glsl_sampler_type_is_array(type));
 		args.dmask = 15;
 		args.attributes = AC_FUNC_ATTR_READONLY;
-		if (var->data.image.access & (ACCESS_VOLATILE | ACCESS_COHERENT))
+		if (var->data.image._volatile || var->data.image.coherent)
 			args.cache_policy |= ac_glc;
 
 		res = ac_build_image_opcode(&ctx->ac, &args);
@@ -2400,7 +2389,7 @@ static void visit_image_store(struct ac_nir_context *ctx,
 		args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
 					    glsl_sampler_type_is_array(type));
 		args.dmask = 15;
-		if (force_glc || (var->data.image.access & (ACCESS_VOLATILE | ACCESS_COHERENT)))
+		if (force_glc || var->data.image._volatile || var->data.image.coherent)
 			args.cache_policy |= ac_glc;
 
 		ac_build_image_opcode(&ctx->ac, &args);
@@ -2554,6 +2543,10 @@ static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
 	return res;
 }
 
+#define NOOP_WAITCNT 0xf7f
+#define LGKM_CNT 0x07f
+#define VM_CNT 0xf70
+
 static void emit_membar(struct ac_llvm_context *ac,
 			const nir_intrinsic_instr *instr)
 {
@@ -2589,7 +2582,8 @@ void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
 		ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
 		return;
 	}
-	ac_build_s_barrier(ac);
+	ac_build_intrinsic(ac, "llvm.amdgcn.s.barrier",
+			   ac->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
 }
 
 static void emit_discard(struct ac_nir_context *ctx,
@@ -2603,7 +2597,7 @@ static void emit_discard(struct ac_nir_context *ctx,
 				     ctx->ac.i32_0, "");
 	} else {
 		assert(instr->intrinsic == nir_intrinsic_discard);
-		cond = ctx->ac.i1false;
+		cond = LLVMConstInt(ctx->ac.i1, false, 0);
 	}
 
 	ctx->abi->emit_kill(ctx->abi, cond);
@@ -2661,7 +2655,7 @@ visit_first_invocation(struct ac_nir_context *ctx)
 	LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
 
 	/* The second argument is whether cttz(0) should be defined, but we do not care. */
-	LLVMValueRef args[] = {active_set, ctx->ac.i1false};
+	LLVMValueRef args[] = {active_set, LLVMConstInt(ctx->ac.i1, 0, false)};
 	LLVMValueRef result =  ac_build_intrinsic(&ctx->ac,
 	                                          "llvm.cttz.i64",
 	                                          ctx->ac.i64, args, 2,
@@ -2860,8 +2854,11 @@ static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
 			interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
 						     ctx->ac.f32, "");
 
-			temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
-			temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
+			temp1 = LLVMBuildFMul(ctx->ac.builder, ddx_el, src_c0, "");
+			temp1 = LLVMBuildFAdd(ctx->ac.builder, temp1, interp_el, "");
+
+			temp2 = LLVMBuildFMul(ctx->ac.builder, ddy_el, src_c1, "");
+			temp2 = LLVMBuildFAdd(ctx->ac.builder, temp2, temp1, "");
 
 			ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
 						     temp2, ctx->ac.i32, "");
@@ -3332,7 +3329,7 @@ static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
 				      LLVMValueRef coord)
 {
 	coord = ac_to_float(ctx, coord);
-	coord = ac_build_round(ctx, coord);
+	coord = ac_build_intrinsic(ctx, "llvm.rint.f32", ctx->f32, &coord, 1, 0);
 	coord = ac_to_integer(ctx, coord);
 	return coord;
 }
@@ -3644,6 +3641,7 @@ static void visit_post_phi(struct ac_nir_context *ctx,
 
 static void phi_post_pass(struct ac_nir_context *ctx)
 {
+	struct hash_entry *entry;
 	hash_table_foreach(ctx->phis, entry) {
 		visit_post_phi(ctx, (nir_phi_instr*)entry->key,
 		               (LLVMValueRef)entry->data);
@@ -3948,7 +3946,7 @@ setup_shared(struct ac_nir_context *ctx,
 			LLVMAddGlobalInAddressSpace(
 			   ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
 			   variable->name ? variable->name : "",
-			   AC_ADDR_SPACE_LDS);
+			   AC_LOCAL_ADDR_SPACE);
 		_mesa_hash_table_insert(ctx->vars, variable, shared);
 	}
 }

src/amd/common/ac_surface.c

@@ -151,10 +151,6 @@ static void addrlib_family_rev_id(enum radeon_family family,
 		*addrlib_family = FAMILY_RV;
 		*addrlib_revid = get_first(AMDGPU_RAVEN_RANGE);
 		break;
-	case CHIP_RAVEN2:
-		*addrlib_family = FAMILY_RV;
-		*addrlib_revid = get_first(AMDGPU_RAVEN2_RANGE);
-		break;
 	default:
 		fprintf(stderr, "amdgpu: Unknown family.\n");
 	}

src/amd/common/amd_family.h

@@ -97,7 +97,6 @@ enum radeon_family {
     CHIP_VEGA12,
     CHIP_VEGA20,
     CHIP_RAVEN,
-    CHIP_RAVEN2,
     CHIP_LAST,
 };
 

src/amd/common/gfx9d.h

@@ -4457,9 +4457,6 @@
 #define   S_028424_OVERWRITE_COMBINER_WATERMARK(x)                    (((unsigned)(x) & 0x1F) << 2)
 #define   G_028424_OVERWRITE_COMBINER_WATERMARK(x)                    (((x) >> 2) & 0x1F)
 #define   C_028424_OVERWRITE_COMBINER_WATERMARK                       0xFFFFFF83
-#define   S_028424_DISABLE_CONSTANT_ENCODE_REG(x)                     (((unsigned)(x) & 0x1) << 10) /* Raven2+ */
-#define   G_028424_DISABLE_CONSTANT_ENCODE_REG(x)                     (((x) >> 10) & 0x1)
-#define   C_028424_DISABLE_CONSTANT_ENCODE_REG                        0xFFFFFBFF
 #define R_02842C_DB_STENCIL_CONTROL                                     0x02842C
 #define   S_02842C_STENCILFAIL(x)                                     (((unsigned)(x) & 0x0F) << 0)
 #define   G_02842C_STENCILFAIL(x)                                     (((x) >> 0) & 0x0F)

src/amd/common/meson.build

@@ -22,7 +22,7 @@ sid_tables_h = custom_target(
   'sid_tables_h',
   input : ['sid_tables.py', 'sid.h', 'gfx9d.h'],
   output : 'sid_tables.h',
-  command : [prog_python, '@INPUT@'],
+  command : [prog_python2, '@INPUT@'],
   capture : true,
 )
 

src/amd/common/sid.h

@@ -119,7 +119,6 @@
 #define			STRMOUT_OFFSET_FROM_VGT_FILLED_SIZE	1
 #define			STRMOUT_OFFSET_FROM_MEM			2
 #define			STRMOUT_OFFSET_NONE			3
-#define		STRMOUT_DATA_TYPE(x)		(((unsigned)(x) & 0x1) << 7)
 #define		STRMOUT_SELECT_BUFFER(x)	(((unsigned)(x) & 0x3) << 8)
 #define PKT3_DRAW_INDEX_OFFSET_2               0x35
 #define PKT3_WRITE_DATA                        0x37
@@ -145,10 +144,7 @@
 #define PKT3_MPEG_INDEX                        0x3A /* not on CIK */
 #define PKT3_WAIT_REG_MEM                      0x3C
 #define		WAIT_REG_MEM_EQUAL		3
-#define		WAIT_REG_MEM_NOT_EQUAL		4
-#define		WAIT_REG_MEM_GREATER_OR_EQUAL   5
 #define         WAIT_REG_MEM_MEM_SPACE(x)       (((unsigned)(x) & 0x3) << 4)
-#define         WAIT_REG_MEM_PFP		(1 << 8)
 #define PKT3_MEM_WRITE                         0x3D /* not on CIK */
 #define PKT3_INDIRECT_BUFFER_CIK               0x3F /* new on CIK */
 #define   R_3F0_IB_BASE_LO                     0x3F0
@@ -163,30 +159,20 @@
 #define PKT3_COPY_DATA			       0x40
 #define		COPY_DATA_SRC_SEL(x)		((x) & 0xf)
 #define			COPY_DATA_REG		0
-#define			COPY_DATA_SRC_MEM	1 /* only valid as source */
-#define                 COPY_DATA_TC_L2         2
-#define                 COPY_DATA_GDS           3
+#define			COPY_DATA_MEM		1
 #define                 COPY_DATA_PERF          4
 #define                 COPY_DATA_IMM           5
 #define                 COPY_DATA_TIMESTAMP     9
 #define		COPY_DATA_DST_SEL(x)		(((unsigned)(x) & 0xf) << 8)
-#define                 COPY_DATA_DST_MEM_GRBM	1 /* sync across GRBM, deprecated */
-#define                 COPY_DATA_TC_L2         2
-#define                 COPY_DATA_GDS           3
-#define                 COPY_DATA_PERF          4
-#define                 COPY_DATA_DST_MEM       5
+#define                 COPY_DATA_MEM_ASYNC     5
 #define		COPY_DATA_COUNT_SEL		(1 << 16)
 #define		COPY_DATA_WR_CONFIRM		(1 << 20)
-#define		COPY_DATA_ENGINE_PFP		(1 << 30)
 #define PKT3_PFP_SYNC_ME		       0x42
 #define PKT3_SURFACE_SYNC                      0x43 /* deprecated on CIK, use ACQUIRE_MEM */
 #define PKT3_ME_INITIALIZE                     0x44 /* not on CIK */
 #define PKT3_COND_WRITE                        0x45
 #define PKT3_EVENT_WRITE                       0x46
 #define PKT3_EVENT_WRITE_EOP                   0x47 /* not on GFX9 */
-#define         EOP_DST_SEL(x)				((x) << 16)
-#define			EOP_DST_SEL_MEM			0
-#define			EOP_DST_SEL_TC_L2		1
 #define         EOP_INT_SEL(x)                          ((x) << 24)
 #define			EOP_INT_SEL_NONE			0
 #define			EOP_INT_SEL_SEND_DATA_AFTER_WR_CONFIRM	3
@@ -195,8 +181,6 @@
 #define			EOP_DATA_SEL_VALUE_32BIT	1
 #define			EOP_DATA_SEL_VALUE_64BIT	2
 #define			EOP_DATA_SEL_TIMESTAMP		3
-#define			EOP_DATA_SEL_GDS		5
-#define		EOP_DATA_GDS(dw_offset, num_dwords)	((dw_offset) | ((unsigned)(num_dwords) << 16))
 /* CP DMA bug: Any use of CP_DMA.DST_SEL=TC must be avoided when EOS packets
  * are used. Use DST_SEL=MC instead. For prefetch, use SRC_SEL=TC and
  * DST_SEL=MC. Only CIK chips are affected.
@@ -310,13 +294,11 @@
 #define       V_500_GDS			1 /* program SAS to 1 as well */
 #define       V_500_DATA		2
 #define       V_500_SRC_ADDR_TC_L2	3 /* new for CIK */
-#define     S_500_DST_CACHE_POLICY(x)	(((unsigned)(x) & 0x3) << 25) /* CIK+ */
 #define     S_500_DST_SEL(x)		(((unsigned)(x) & 0x3) << 20)
 #define       V_500_DST_ADDR		0
 #define       V_500_GDS			1 /* program DAS to 1 as well */
 #define       V_500_NOWHERE		2 /* new for GFX9 */
 #define       V_500_DST_ADDR_TC_L2	3 /* new for CIK */
-#define     S_500_SRC_CACHE_POLICY(x)	(((unsigned)(x) & 0x3) << 13) /* CIK+ */
 #define     S_500_ENGINE(x)		((x) & 0x1)
 #define       V_500_ME			0
 #define       V_500_PFP			1
@@ -5300,22 +5282,6 @@
 #define   S_02820C_CLIP_RULE(x)                                       (((unsigned)(x) & 0xFFFF) << 0)
 #define   G_02820C_CLIP_RULE(x)                                       (((x) >> 0) & 0xFFFF)
 #define   C_02820C_CLIP_RULE                                          0xFFFF0000
-#define     V_02820C_OUT                                            0x0001
-#define     V_02820C_IN_0                                           0x0002
-#define     V_02820C_IN_1                                           0x0004
-#define     V_02820C_IN_10                                          0x0008
-#define     V_02820C_IN_2                                           0x0010
-#define     V_02820C_IN_20                                          0x0020
-#define     V_02820C_IN_21                                          0x0040
-#define     V_02820C_IN_210                                         0x0080
-#define     V_02820C_IN_3                                           0x0100
-#define     V_02820C_IN_30                                          0x0200
-#define     V_02820C_IN_31                                          0x0400
-#define     V_02820C_IN_310                                         0x0800
-#define     V_02820C_IN_32                                          0x1000
-#define     V_02820C_IN_320                                         0x2000
-#define     V_02820C_IN_321                                         0x4000
-#define     V_02820C_IN_3210                                        0x8000
 #define R_028210_PA_SC_CLIPRECT_0_TL                                    0x028210
 #define   S_028210_TL_X(x)                                            (((unsigned)(x) & 0x7FFF) << 0)
 #define   G_028210_TL_X(x)                                            (((x) >> 0) & 0x7FFF)
@@ -9156,10 +9122,6 @@
 #define    CIK_SDMA_PACKET_TRAP                    0x6
 #define    CIK_SDMA_PACKET_SEMAPHORE               0x7
 #define    CIK_SDMA_PACKET_CONSTANT_FILL           0xb
-#define    CIK_SDMA_OPCODE_TIMESTAMP               0xd
-#define        SDMA_TS_SUB_OPCODE_SET_LOCAL_TIMESTAMP     0x0
-#define        SDMA_TS_SUB_OPCODE_GET_LOCAL_TIMESTAMP     0x1
-#define        SDMA_TS_SUB_OPCODE_GET_GLOBAL_TIMESTAMP    0x2
 #define    CIK_SDMA_PACKET_SRBM_WRITE              0xe
 /* There is apparently an undocumented HW "feature" that
    prevents the HW from copying past 256 bytes of (1 << 22) */

src/amd/vulkan/Android.mk

@@ -74,8 +74,7 @@ LOCAL_C_INCLUDES := \
 	$(call generated-sources-dir-for,STATIC_LIBRARIES,libmesa_vulkan_util,,)/util
 
 LOCAL_WHOLE_STATIC_LIBRARIES := \
-	libmesa_vulkan_util \
-	libmesa_git_sha1
+	libmesa_vulkan_util
 
 LOCAL_GENERATED_SOURCES += $(intermediates)/radv_entrypoints.c
 LOCAL_GENERATED_SOURCES += $(intermediates)/radv_entrypoints.h

src/amd/vulkan/Makefile.am

@@ -140,7 +140,7 @@ vulkan_api_xml = $(top_srcdir)/src/vulkan/registry/vk.xml
 
 radv_entrypoints.c: radv_entrypoints_gen.py radv_extensions.py $(vulkan_api_xml)
 	$(MKDIR_GEN)
-	$(AM_V_GEN)$(PYTHON) $(srcdir)/radv_entrypoints_gen.py \
+	$(AM_V_GEN)$(PYTHON2) $(srcdir)/radv_entrypoints_gen.py \
 		--xml $(vulkan_api_xml) \
 		--outdir $(builddir)
 radv_entrypoints.h: radv_entrypoints.c
@@ -148,7 +148,7 @@ radv_entrypoints.h: radv_entrypoints.c
 radv_extensions.c: radv_extensions.py \
 		 $(vulkan_api_xml)
 	$(MKDIR_GEN)
-	$(AM_V_GEN)$(PYTHON) $(srcdir)/radv_extensions.py \
+	$(AM_V_GEN)$(PYTHON2) $(srcdir)/radv_extensions.py \
 		--xml $(vulkan_api_xml) \
 		--out-c radv_extensions.c \
 		--out-h radv_extensions.h
@@ -157,7 +157,7 @@ radv_extensions.h: radv_extensions.c
 vk_format_table.c: vk_format_table.py \
 		   vk_format_parse.py \
                    vk_format_layout.csv
-	$(PYTHON) $(srcdir)/vk_format_table.py $(srcdir)/vk_format_layout.csv > $@
+	$(PYTHON2) $(srcdir)/vk_format_table.py $(srcdir)/vk_format_layout.csv > $@
 
 BUILT_SOURCES = $(VULKAN_GENERATED_FILES)
 CLEANFILES = $(BUILT_SOURCES) dev_icd.json radeon_icd.@host_cpu@.json
@@ -190,11 +190,11 @@ icdconf_DATA = radeon_icd.@host_cpu@.json
 noinst_DATA = dev_icd.json
 
 dev_icd.json : radv_extensions.py radv_icd.py
-	$(AM_V_GEN)$(PYTHON) $(srcdir)/radv_icd.py \
+	$(AM_V_GEN)$(PYTHON2) $(srcdir)/radv_icd.py \
 		--lib-path="${abs_top_builddir}/${LIB_DIR}" --out $@
 
 radeon_icd.@host_cpu@.json : radv_extensions.py radv_icd.py
-	$(AM_V_GEN)$(PYTHON) $(srcdir)/radv_icd.py \
+	$(AM_V_GEN)$(PYTHON2) $(srcdir)/radv_icd.py \
 		--lib-path="${libdir}" --out $@
 
 include $(top_srcdir)/install-lib-links.mk

src/amd/vulkan/meson.build

@@ -23,7 +23,7 @@ radv_entrypoints = custom_target(
   input : ['radv_entrypoints_gen.py', vk_api_xml],
   output : ['radv_entrypoints.h', 'radv_entrypoints.c'],
   command : [
-    prog_python, '@INPUT0@', '--xml', '@INPUT1@', '--outdir',
+    prog_python2, '@INPUT0@', '--xml', '@INPUT1@', '--outdir',
     meson.current_build_dir()
   ],
   depend_files : files('radv_extensions.py'),
@@ -34,7 +34,7 @@ radv_extensions_c = custom_target(
   input : ['radv_extensions.py', vk_api_xml],
   output : ['radv_extensions.c', 'radv_extensions.h'],
   command : [
-    prog_python, '@INPUT0@', '--xml', '@INPUT1@', '--out-c', '@OUTPUT0@',
+    prog_python2, '@INPUT0@', '--xml', '@INPUT1@', '--out-c', '@OUTPUT0@',
     '--out-h', '@OUTPUT1@'
   ],
 )
@@ -43,7 +43,7 @@ vk_format_table_c = custom_target(
   'vk_format_table.c',
   input : ['vk_format_table.py', 'vk_format_layout.csv'],
   output : 'vk_format_table.c',
-  command : [prog_python, '@INPUT@'],
+  command : [prog_python2, '@INPUT@'],
   depend_files : files('vk_format_parse.py'),
   capture : true,
 )
@@ -129,7 +129,7 @@ endif
 
 libvulkan_radeon = shared_library(
   'vulkan_radeon',
-  [libradv_files, radv_entrypoints, radv_extensions_c, vk_format_table_c, sha1_h],
+  [libradv_files, radv_entrypoints, radv_extensions_c, vk_format_table_c],
   include_directories : [
     inc_common, inc_amd, inc_amd_common, inc_compiler, inc_vulkan_util,
     inc_vulkan_wsi,
@@ -140,7 +140,7 @@ libvulkan_radeon = shared_library(
   ],
   dependencies : [
     dep_llvm, dep_libdrm_amdgpu, dep_thread, dep_elf, dep_dl, dep_m,
-    dep_valgrind,
+    dep_valgrind, radv_deps,
     idep_nir,
   ],
   c_args : [c_vis_args, no_override_init_args, radv_flags],
@@ -154,7 +154,7 @@ radeon_icd = custom_target(
   input : 'radv_icd.py',
   output : 'radeon_icd.@0@.json'.format(host_machine.cpu()),
   command : [
-    prog_python, '@INPUT@',
+    prog_python2, '@INPUT@',
     '--lib-path', join_paths(get_option('prefix'), get_option('libdir')),
     '--out', '@OUTPUT@',
   ],
@@ -169,7 +169,7 @@ radv_dev_icd = custom_target(
   input : 'radv_icd.py',
   output : 'dev_icd.json',
   command : [
-    prog_python, '@INPUT@', '--lib-path', meson.current_build_dir(),
+    prog_python2, '@INPUT@', '--lib-path', meson.current_build_dir(),
     '--out', '@OUTPUT@'
   ],
   depend_files : files('radv_extensions.py'),

src/amd/vulkan/radv_android.c

@@ -110,17 +110,6 @@ radv_image_from_gralloc(VkDevice device_h,
 	struct radv_bo *bo = NULL;
 	VkResult result;
 
-	result = radv_image_create(device_h,
-	                           &(struct radv_image_create_info) {
-	                               .vk_info = base_info,
-	                               .scanout = true,
-	                               .no_metadata_planes = true},
-	                           alloc,
-	                           &image_h);
-
-	if (result != VK_SUCCESS)
-		return result;
-
 	if (gralloc_info->handle->numFds != 1) {
 		return vk_errorf(device->instance, VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR,
 		                 "VkNativeBufferANDROID::handle::numFds is %d, "
@@ -133,23 +122,14 @@ radv_image_from_gralloc(VkDevice device_h,
 	 */
 	int dma_buf = gralloc_info->handle->data[0];
 
-	image = radv_image_from_handle(image_h);
-
 	VkDeviceMemory memory_h;
 
-	const VkMemoryDedicatedAllocateInfoKHR ded_alloc = {
-		.sType = VK_STRUCTURE_TYPE_MEMORY_DEDICATED_ALLOCATE_INFO_KHR,
-		.pNext = NULL,
-		.buffer = VK_NULL_HANDLE,
-		.image = image_h
-	};
-
 	const VkImportMemoryFdInfoKHR import_info = {
 		.sType = VK_STRUCTURE_TYPE_IMPORT_MEMORY_FD_INFO_KHR,
-		.pNext = &ded_alloc,
 		.handleType = VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT_KHR,
 		.fd = dup(dma_buf),
 	};
+
 	/* Find the first VRAM memory type, or GART for PRIME images. */
 	int memory_type_index = -1;
 	for (int i = 0; i < device->physical_device->memory_properties.memoryTypeCount; ++i) {
@@ -168,14 +148,49 @@ radv_image_from_gralloc(VkDevice device_h,
 				     &(VkMemoryAllocateInfo) {
 					     .sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO,
 					     .pNext = &import_info,
-					     .allocationSize = image->size,
+					     /* Max buffer size, unused for imports */
+					     .allocationSize = 0x7FFFFFFF,
 					     .memoryTypeIndex = memory_type_index,
 				     },
 				     alloc,
 				     &memory_h);
+	if (result != VK_SUCCESS)
+		return result;
+
+	struct radeon_bo_metadata md;
+	device->ws->buffer_get_metadata(radv_device_memory_from_handle(memory_h)->bo, &md);
+
+	bool is_scanout;
+	if (device->physical_device->rad_info.chip_class >= GFX9) {
+		/* Copied from radeonsi, but is hacky so should be cleaned up. */
+		is_scanout =  md.u.gfx9.swizzle_mode == 0 || md.u.gfx9.swizzle_mode % 4 == 2;
+	} else {
+		is_scanout = md.u.legacy.scanout;
+	}
+
+	VkImageCreateInfo updated_base_info = *base_info;
+
+	VkExternalMemoryImageCreateInfo external_memory_info = {
+		.sType = VK_STRUCTURE_TYPE_EXTERNAL_MEMORY_IMAGE_CREATE_INFO,
+		.pNext = updated_base_info.pNext,
+		.handleTypes = VK_EXTERNAL_MEMORY_HANDLE_TYPE_DMA_BUF_BIT_EXT,
+	};
+
+	updated_base_info.pNext = &external_memory_info;
+
+	result = radv_image_create(device_h,
+	                           &(struct radv_image_create_info) {
+	                               .vk_info = &updated_base_info,
+	                               .scanout = is_scanout,
+	                               .no_metadata_planes = true},
+	                           alloc,
+	                           &image_h);
+
 	if (result != VK_SUCCESS)
 		goto fail_create_image;
 
+	image = radv_image_from_handle(image_h);
+
 	radv_BindImageMemory(device_h, image_h, memory_h, 0);
 
 	image->owned_memory = memory_h;
@@ -185,9 +200,7 @@ radv_image_from_gralloc(VkDevice device_h,
 	return VK_SUCCESS;
 
 fail_create_image:
-fail_size:
-	radv_DestroyImage(device_h, image_h, alloc);
-
+	radv_FreeMemory(device_h, memory_h, alloc);
 	return result;
 }
 

src/amd/vulkan/radv_cmd_buffer.c

@@ -196,23 +196,6 @@ radv_bind_dynamic_state(struct radv_cmd_buffer *cmd_buffer,
 	cmd_buffer->state.dirty |= dest_mask;
 }
 
-static void
-radv_bind_streamout_state(struct radv_cmd_buffer *cmd_buffer,
-			  struct radv_pipeline *pipeline)
-{
-	struct radv_streamout_state *so = &cmd_buffer->state.streamout;
-	struct radv_shader_info *info;
-
-	if (!pipeline->streamout_shader)
-		return;
-
-	info = &pipeline->streamout_shader->info.info;
-	for (int i = 0; i < MAX_SO_BUFFERS; i++)
-		so->stride_in_dw[i] = info->so.strides[i];
-
-	so->enabled_stream_buffers_mask = info->so.enabled_stream_buffers_mask;
-}
-
 bool radv_cmd_buffer_uses_mec(struct radv_cmd_buffer *cmd_buffer)
 {
 	return cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE &&
@@ -1068,7 +1051,7 @@ static void
 radv_update_zrange_precision(struct radv_cmd_buffer *cmd_buffer,
 			     struct radv_ds_buffer_info *ds,
 			     struct radv_image *image, VkImageLayout layout,
-			     bool requires_cond_write)
+			     bool requires_cond_exec)
 {
 	uint32_t db_z_info = ds->db_z_info;
 	uint32_t db_z_info_reg;
@@ -1092,38 +1075,21 @@ radv_update_zrange_precision(struct radv_cmd_buffer *cmd_buffer,
 	}
 
 	/* When we don't know the last fast clear value we need to emit a
-	 * conditional packet, otherwise we can update DB_Z_INFO directly.
+	 * conditional packet that will eventually skip the following
+	 * SET_CONTEXT_REG packet.
 	 */
-	if (requires_cond_write) {
-		radeon_emit(cmd_buffer->cs, PKT3(PKT3_COND_WRITE, 7, 0));
-
-		const uint32_t write_space = 0 << 8;	/* register */
-		const uint32_t poll_space = 1 << 4;	/* memory */
-		const uint32_t function = 3 << 0;	/* equal to the reference */
-		const uint32_t options = write_space | poll_space | function;
-		radeon_emit(cmd_buffer->cs, options);
-
-		/* poll address - location of the depth clear value */
+	if (requires_cond_exec) {
 		uint64_t va = radv_buffer_get_va(image->bo);
-		va += image->offset + image->clear_value_offset;
-
-		/* In presence of stencil format, we have to adjust the base
-		 * address because the first value is the stencil clear value.
-		 */
-		if (vk_format_is_stencil(image->vk_format))
-			va += 4;
+		va += image->offset + image->tc_compat_zrange_offset;
 
+		radeon_emit(cmd_buffer->cs, PKT3(PKT3_COND_EXEC, 3, 0));
 		radeon_emit(cmd_buffer->cs, va);
 		radeon_emit(cmd_buffer->cs, va >> 32);
-
-		radeon_emit(cmd_buffer->cs, fui(0.0f));		 /* reference value */
-		radeon_emit(cmd_buffer->cs, (uint32_t)-1);	 /* comparison mask */
-		radeon_emit(cmd_buffer->cs, db_z_info_reg >> 2); /* write address low */
-		radeon_emit(cmd_buffer->cs, 0u);		 /* write address high */
-		radeon_emit(cmd_buffer->cs, db_z_info);
-	} else {
-		radeon_set_context_reg(cmd_buffer->cs, db_z_info_reg, db_z_info);
+		radeon_emit(cmd_buffer->cs, 0);
+		radeon_emit(cmd_buffer->cs, 3); /* SET_CONTEXT_REG size */
 	}
+
+	radeon_set_context_reg(cmd_buffer->cs, db_z_info_reg, db_z_info);
 }
 
 static void
@@ -1270,6 +1236,45 @@ radv_set_ds_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
 		radeon_emit(cs, fui(ds_clear_value.depth));
 }
 
+/**
+ * Update the TC-compat metadata value for this image.
+ */
+static void
+radv_set_tc_compat_zrange_metadata(struct radv_cmd_buffer *cmd_buffer,
+				   struct radv_image *image,
+				   uint32_t value)
+{
+	struct radeon_cmdbuf *cs = cmd_buffer->cs;
+	uint64_t va = radv_buffer_get_va(image->bo);
+	va += image->offset + image->tc_compat_zrange_offset;
+
+	radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0));
+	radeon_emit(cs, S_370_DST_SEL(V_370_MEM_ASYNC) |
+			S_370_WR_CONFIRM(1) |
+			S_370_ENGINE_SEL(V_370_PFP));
+	radeon_emit(cs, va);
+	radeon_emit(cs, va >> 32);
+	radeon_emit(cs, value);
+}
+
+static void
+radv_update_tc_compat_zrange_metadata(struct radv_cmd_buffer *cmd_buffer,
+				      struct radv_image *image,
+				      VkClearDepthStencilValue ds_clear_value)
+{
+	struct radeon_cmdbuf *cs = cmd_buffer->cs;
+	uint64_t va = radv_buffer_get_va(image->bo);
+	va += image->offset + image->tc_compat_zrange_offset;
+	uint32_t cond_val;
+
+	/* Conditionally set DB_Z_INFO.ZRANGE_PRECISION to 0 when the last
+	 * depth clear value is 0.0f.
+	 */
+	cond_val = ds_clear_value.depth == 0.0f ? UINT_MAX : 0;
+
+	radv_set_tc_compat_zrange_metadata(cmd_buffer, image, cond_val);
+}
+
 /**
  * Update the clear depth/stencil values for this image.
  */
@@ -1283,6 +1288,12 @@ radv_update_ds_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
 
 	radv_set_ds_clear_metadata(cmd_buffer, image, ds_clear_value, aspects);
 
+	if (radv_image_is_tc_compat_htile(image) &&
+	    (aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) {
+		radv_update_tc_compat_zrange_metadata(cmd_buffer, image,
+						      ds_clear_value);
+	}
+
 	radv_update_bound_fast_clear_ds(cmd_buffer, image, ds_clear_value,
 				        aspects);
 }
@@ -1314,7 +1325,7 @@ radv_load_ds_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
 		++reg_count;
 
 	radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
-	radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_SRC_MEM) |
+	radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_MEM) |
 			COPY_DATA_DST_SEL(COPY_DATA_REG) |
 			(reg_count == 2 ? COPY_DATA_COUNT_SEL : 0));
 	radeon_emit(cs, va);
@@ -1444,7 +1455,7 @@ radv_load_color_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
 	uint32_t reg = R_028C8C_CB_COLOR0_CLEAR_WORD0 + cb_idx * 0x3c;
 
 	radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, cmd_buffer->state.predicating));
-	radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_SRC_MEM) |
+	radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_MEM) |
 			COPY_DATA_DST_SEL(COPY_DATA_REG) |
 			COPY_DATA_COUNT_SEL);
 	radeon_emit(cs, va);
@@ -1892,96 +1903,10 @@ radv_flush_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer,
 	cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_VERTEX_BUFFER;
 }
 
-static void
-radv_emit_streamout_buffers(struct radv_cmd_buffer *cmd_buffer, uint64_t va)
-{
-	struct radv_pipeline *pipeline = cmd_buffer->state.pipeline;
-	struct radv_userdata_info *loc;
-	uint32_t base_reg;
-
-	for (unsigned stage = 0; stage < MESA_SHADER_STAGES; ++stage) {
-		if (!radv_get_shader(pipeline, stage))
-			continue;
-
-		loc = radv_lookup_user_sgpr(pipeline, stage,
-					    AC_UD_STREAMOUT_BUFFERS);
-		if (loc->sgpr_idx == -1)
-			continue;
-
-		base_reg = pipeline->user_data_0[stage];
-
-		radv_emit_shader_pointer(cmd_buffer->device, cmd_buffer->cs,
-					 base_reg + loc->sgpr_idx * 4, va, false);
-	}
-
-	if (pipeline->gs_copy_shader) {
-		loc = &pipeline->gs_copy_shader->info.user_sgprs_locs.shader_data[AC_UD_STREAMOUT_BUFFERS];
-		if (loc->sgpr_idx != -1) {
-			base_reg = R_00B130_SPI_SHADER_USER_DATA_VS_0;
-
-			radv_emit_shader_pointer(cmd_buffer->device, cmd_buffer->cs,
-						 base_reg + loc->sgpr_idx * 4, va, false);
-		}
-	}
-}
-
-static void
-radv_flush_streamout_descriptors(struct radv_cmd_buffer *cmd_buffer)
-{
-	if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_STREAMOUT_BUFFER) {
-		struct radv_streamout_binding *sb = cmd_buffer->streamout_bindings;
-		struct radv_streamout_state *so = &cmd_buffer->state.streamout;
-		unsigned so_offset;
-		void *so_ptr;
-		uint64_t va;
-
-		/* Allocate some descriptor state for streamout buffers. */
-		if (!radv_cmd_buffer_upload_alloc(cmd_buffer,
-						  MAX_SO_BUFFERS * 16, 256,
-						  &so_offset, &so_ptr))
-			return;
-
-		for (uint32_t i = 0; i < MAX_SO_BUFFERS; i++) {
-			struct radv_buffer *buffer = sb[i].buffer;
-			uint32_t *desc = &((uint32_t *)so_ptr)[i * 4];
-
-			if (!(so->enabled_mask & (1 << i)))
-				continue;
-
-			va = radv_buffer_get_va(buffer->bo) + buffer->offset;
-
-			va += sb[i].offset;
-
-			/* Set the descriptor.
-			 *
-			 * On VI, the format must be non-INVALID, otherwise
-			 * the buffer will be considered not bound and store
-			 * instructions will be no-ops.
-			 */
-			desc[0] = va;
-			desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32);
-			desc[2] = 0xffffffff;
-			desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
-				  S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
-				  S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
-				  S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
-				  S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
-		}
-
-		va = radv_buffer_get_va(cmd_buffer->upload.upload_bo);
-		va += so_offset;
-
-		radv_emit_streamout_buffers(cmd_buffer, va);
-	}
-
-	cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_STREAMOUT_BUFFER;
-}
-
 static void
 radv_upload_graphics_shader_descriptors(struct radv_cmd_buffer *cmd_buffer, bool pipeline_is_dirty)
 {
 	radv_flush_vertex_descriptors(cmd_buffer, pipeline_is_dirty);
-	radv_flush_streamout_descriptors(cmd_buffer);
 	radv_flush_descriptors(cmd_buffer, VK_SHADER_STAGE_ALL_GRAPHICS);
 	radv_flush_constants(cmd_buffer, VK_SHADER_STAGE_ALL_GRAPHICS);
 }
@@ -2072,8 +1997,7 @@ static void radv_stage_flush(struct radv_cmd_buffer *cmd_buffer,
 	                             VK_PIPELINE_STAGE_VERTEX_SHADER_BIT |
 				     VK_PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT |
 				     VK_PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT |
-				     VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT |
-				     VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT)) {
+				     VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT)) {
 		cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VS_PARTIAL_FLUSH;
 	}
 }
@@ -2097,8 +2021,6 @@ radv_src_access_flush(struct radv_cmd_buffer *cmd_buffer,
 	for_each_bit(b, src_flags) {
 		switch ((VkAccessFlagBits)(1 << b)) {
 		case VK_ACCESS_SHADER_WRITE_BIT:
-		case VK_ACCESS_TRANSFORM_FEEDBACK_WRITE_BIT_EXT:
-		case VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT:
 			flush_bits |= RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2;
 			break;
 		case VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT:
@@ -2136,7 +2058,6 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer,
 	bool flush_CB_meta = true, flush_DB_meta = true;
 	enum radv_cmd_flush_bits flush_bits = 0;
 	bool flush_CB = true, flush_DB = true;
-	bool image_is_coherent = false;
 	uint32_t b;
 
 	if (image) {
@@ -2149,42 +2070,23 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer,
 			flush_CB_meta = false;
 		if (!radv_image_has_htile(image))
 			flush_DB_meta = false;
-
-		if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
-			if (image->info.samples == 1 &&
-			    (image->usage & (VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
-					     VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) &&
-			    !vk_format_is_stencil(image->vk_format)) {
-				/* Single-sample color and single-sample depth
-				 * (not stencil) are coherent with shaders on
-				 * GFX9.
-				 */
-				image_is_coherent = true;
-			}
-		}
 	}
 
 	for_each_bit(b, dst_flags) {
 		switch ((VkAccessFlagBits)(1 << b)) {
 		case VK_ACCESS_INDIRECT_COMMAND_READ_BIT:
 		case VK_ACCESS_INDEX_READ_BIT:
-		case VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT:
 			break;
 		case VK_ACCESS_UNIFORM_READ_BIT:
 			flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 | RADV_CMD_FLAG_INV_SMEM_L1;
 			break;
 		case VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT:
+		case VK_ACCESS_SHADER_READ_BIT:
 		case VK_ACCESS_TRANSFER_READ_BIT:
 		case VK_ACCESS_INPUT_ATTACHMENT_READ_BIT:
 			flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 |
 			              RADV_CMD_FLAG_INV_GLOBAL_L2;
 			break;
-		case VK_ACCESS_SHADER_READ_BIT:
-			flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1;
-
-			if (!image_is_coherent)
-				flush_bits |= RADV_CMD_FLAG_INV_GLOBAL_L2;
-			break;
 		case VK_ACCESS_COLOR_ATTACHMENT_READ_BIT:
 			if (flush_CB)
 				flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
@@ -2405,6 +2307,20 @@ VkResult radv_ResetCommandBuffer(
 	return radv_reset_cmd_buffer(cmd_buffer);
 }
 
+static void emit_gfx_buffer_state(struct radv_cmd_buffer *cmd_buffer)
+{
+	struct radv_device *device = cmd_buffer->device;
+	if (device->gfx_init) {
+		uint64_t va = radv_buffer_get_va(device->gfx_init);
+		radv_cs_add_buffer(device->ws, cmd_buffer->cs, device->gfx_init);
+		radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDIRECT_BUFFER_CIK, 2, 0));
+		radeon_emit(cmd_buffer->cs, va);
+		radeon_emit(cmd_buffer->cs, va >> 32);
+		radeon_emit(cmd_buffer->cs, device->gfx_init_size_dw & 0xffff);
+	} else
+		si_init_config(cmd_buffer);
+}
+
 VkResult radv_BeginCommandBuffer(
 	VkCommandBuffer commandBuffer,
 	const VkCommandBufferBeginInfo *pBeginInfo)
@@ -2430,6 +2346,21 @@ VkResult radv_BeginCommandBuffer(
 	cmd_buffer->state.predication_type = -1;
 	cmd_buffer->usage_flags = pBeginInfo->flags;
 
+	/* setup initial configuration into command buffer */
+	if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) {
+		switch (cmd_buffer->queue_family_index) {
+		case RADV_QUEUE_GENERAL:
+			emit_gfx_buffer_state(cmd_buffer);
+			break;
+		case RADV_QUEUE_COMPUTE:
+			si_init_compute(cmd_buffer);
+			break;
+		case RADV_QUEUE_TRANSFER:
+		default:
+			break;
+		}
+	}
+
 	if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY &&
 	    (pBeginInfo->flags & VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT)) {
 		assert(pBeginInfo->pInheritanceInfo);
@@ -2823,7 +2754,6 @@ void radv_CmdBindPipeline(
 		cmd_buffer->state.prefetch_L2_mask |= RADV_PREFETCH_SHADERS;
 
 		radv_bind_dynamic_state(cmd_buffer, &pipeline->dynamic_state);
-		radv_bind_streamout_state(cmd_buffer, pipeline);
 
 		if (pipeline->graphics.esgs_ring_size > cmd_buffer->esgs_ring_size_needed)
 			cmd_buffer->esgs_ring_size_needed = pipeline->graphics.esgs_ring_size;
@@ -3246,13 +3176,12 @@ static void radv_emit_view_index(struct radv_cmd_buffer *cmd_buffer, unsigned in
 
 static void
 radv_cs_emit_draw_packet(struct radv_cmd_buffer *cmd_buffer,
-                         uint32_t vertex_count,
-			 bool use_opaque)
+                         uint32_t vertex_count)
 {
 	radeon_emit(cmd_buffer->cs, PKT3(PKT3_DRAW_INDEX_AUTO, 1, cmd_buffer->state.predicating));
 	radeon_emit(cmd_buffer->cs, vertex_count);
 	radeon_emit(cmd_buffer->cs, V_0287F0_DI_SRC_SEL_AUTO_INDEX |
-	                            S_0287F0_USE_OPAQUE(use_opaque));
+	                            S_0287F0_USE_OPAQUE(0));
 }
 
 static void
@@ -3356,12 +3285,6 @@ struct radv_draw_info {
 	 */
 	struct radv_buffer *count_buffer;
 	uint64_t count_buffer_offset;
-
-	/**
-	 * Stream output parameters resource.
-	 */
-	struct radv_buffer *strmout_buffer;
-	uint64_t strmout_buffer_offset;
 };
 
 static void
@@ -3372,27 +3295,6 @@ radv_emit_draw_packets(struct radv_cmd_buffer *cmd_buffer,
 	struct radeon_winsys *ws = cmd_buffer->device->ws;
 	struct radeon_cmdbuf *cs = cmd_buffer->cs;
 
-	if (info->strmout_buffer) {
-		uint64_t va = radv_buffer_get_va(info->strmout_buffer->bo);
-
-		va += info->strmout_buffer->offset +
-		      info->strmout_buffer_offset;
-
-		radeon_set_context_reg(cs, R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE,
-				       info->stride);
-
-		radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
-		radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_SRC_MEM) |
-				COPY_DATA_DST_SEL(COPY_DATA_REG) |
-				COPY_DATA_WR_CONFIRM);
-		radeon_emit(cs, va);
-		radeon_emit(cs, va >> 32);
-		radeon_emit(cs, R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE >> 2);
-		radeon_emit(cs, 0); /* unused */
-
-		radv_cs_add_buffer(ws, cs, info->strmout_buffer->bo);
-	}
-
 	if (info->indirect) {
 		uint64_t va = radv_buffer_get_va(info->indirect->bo);
 		uint64_t count_va = 0;
@@ -3477,17 +3379,14 @@ radv_emit_draw_packets(struct radv_cmd_buffer *cmd_buffer,
 			}
 		} else {
 			if (!state->subpass->view_mask) {
-				radv_cs_emit_draw_packet(cmd_buffer,
-							 info->count,
-							 !!info->strmout_buffer);
+				radv_cs_emit_draw_packet(cmd_buffer, info->count);
 			} else {
 				unsigned i;
 				for_each_bit(i, state->subpass->view_mask) {
 					radv_emit_view_index(cmd_buffer, i);
 
 					radv_cs_emit_draw_packet(cmd_buffer,
-								 info->count,
-								 !!info->strmout_buffer);
+								 info->count);
 				}
 			}
 		}
@@ -3520,13 +3419,8 @@ static bool radv_need_late_scissor_emission(struct radv_cmd_buffer *cmd_buffer,
 
 	uint32_t used_states = cmd_buffer->state.pipeline->graphics.needed_dynamic_state | ~RADV_CMD_DIRTY_DYNAMIC_ALL;
 
-	/* Index, vertex and streamout buffers don't change context regs, and
-	 * pipeline is handled later.
-	 */
-	used_states &= ~(RADV_CMD_DIRTY_INDEX_BUFFER |
-			 RADV_CMD_DIRTY_VERTEX_BUFFER |
-			 RADV_CMD_DIRTY_STREAMOUT_BUFFER |
-			 RADV_CMD_DIRTY_PIPELINE);
+	/* Index & Vertex buffer don't change context regs, and pipeline is handled later. */
+	used_states &= ~(RADV_CMD_DIRTY_INDEX_BUFFER | RADV_CMD_DIRTY_VERTEX_BUFFER | RADV_CMD_DIRTY_PIPELINE);
 
 	/* Assume all state changes except  these two can imply context rolls. */
 	if (cmd_buffer->state.dirty & used_states)
@@ -3586,8 +3480,6 @@ static void
 radv_draw(struct radv_cmd_buffer *cmd_buffer,
 	  const struct radv_draw_info *info)
 {
-	struct radeon_info *rad_info =
-		&cmd_buffer->device->physical_device->rad_info;
 	bool has_prefetch =
 		cmd_buffer->device->physical_device->rad_info.chip_class >= CIK;
 	bool pipeline_is_dirty =
@@ -3657,16 +3549,6 @@ radv_draw(struct radv_cmd_buffer *cmd_buffer,
 		}
 	}
 
-	/* Workaround for a VGT hang when streamout is enabled.
-	 * It must be done after drawing.
-	 */
-	if (cmd_buffer->state.streamout.streamout_enabled &&
-	    (rad_info->family == CHIP_HAWAII ||
-	     rad_info->family == CHIP_TONGA ||
-	     rad_info->family == CHIP_FIJI)) {
-		cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VGT_STREAMOUT_SYNC;
-	}
-
 	assert(cmd_buffer->cs->cdw <= cdw_max);
 	radv_cmd_buffer_after_draw(cmd_buffer, RADV_CMD_FLAG_PS_PARTIAL_FLUSH);
 }
@@ -3897,7 +3779,7 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer,
 		if (loc->sgpr_idx != -1) {
 			for (unsigned i = 0; i < 3; ++i) {
 				radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
-				radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_SRC_MEM) |
+				radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_MEM) |
 						COPY_DATA_DST_SEL(COPY_DATA_REG));
 				radeon_emit(cs, (va +  4 * i));
 				radeon_emit(cs, (va + 4 * i) >> 32);
@@ -4192,6 +4074,15 @@ static void radv_initialize_htile(struct radv_cmd_buffer *cmd_buffer,
 		aspects |= VK_IMAGE_ASPECT_STENCIL_BIT;
 
 	radv_set_ds_clear_metadata(cmd_buffer, image, value, aspects);
+
+	if (radv_image_is_tc_compat_htile(image)) {
+		/* Initialize the TC-compat metada value to 0 because by
+		 * default DB_Z_INFO.RANGE_PRECISION is set to 1, and we only
+		 * need have to conditionally update its value when performing
+		 * a fast depth clear.
+		 */
+		radv_set_tc_compat_zrange_metadata(cmd_buffer, image, 0);
+	}
 }
 
 static void radv_handle_depth_image_transition(struct radv_cmd_buffer *cmd_buffer,
@@ -4642,233 +4533,3 @@ void radv_CmdEndConditionalRenderingEXT(
 	cmd_buffer->state.predication_type = -1;
 	cmd_buffer->state.predication_va = 0;
 }
-
-/* VK_EXT_transform_feedback */
-void radv_CmdBindTransformFeedbackBuffersEXT(
-    VkCommandBuffer                             commandBuffer,
-    uint32_t                                    firstBinding,
-    uint32_t                                    bindingCount,
-    const VkBuffer*                             pBuffers,
-    const VkDeviceSize*                         pOffsets,
-    const VkDeviceSize*                         pSizes)
-{
-	RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
-	struct radv_streamout_binding *sb = cmd_buffer->streamout_bindings;
-	uint8_t enabled_mask = 0;
-
-	assert(firstBinding + bindingCount <= MAX_SO_BUFFERS);
-	for (uint32_t i = 0; i < bindingCount; i++) {
-		uint32_t idx = firstBinding + i;
-
-		sb[idx].buffer = radv_buffer_from_handle(pBuffers[i]);
-		sb[idx].offset = pOffsets[i];
-		sb[idx].size = pSizes[i];
-
-		radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs,
-				   sb[idx].buffer->bo);
-
-		enabled_mask |= 1 << idx;
-	}
-
-	cmd_buffer->state.streamout.enabled_mask = enabled_mask;
-
-	cmd_buffer->state.dirty |= RADV_CMD_DIRTY_STREAMOUT_BUFFER;
-}
-
-static void
-radv_emit_streamout_enable(struct radv_cmd_buffer *cmd_buffer)
-{
-	struct radv_streamout_state *so = &cmd_buffer->state.streamout;
-	struct radeon_cmdbuf *cs = cmd_buffer->cs;
-
-	radeon_set_context_reg_seq(cs, R_028B94_VGT_STRMOUT_CONFIG, 2);
-	radeon_emit(cs,
-		    S_028B94_STREAMOUT_0_EN(so->streamout_enabled) |
-		    S_028B94_RAST_STREAM(0) |
-		    S_028B94_STREAMOUT_1_EN(so->streamout_enabled) |
-		    S_028B94_STREAMOUT_2_EN(so->streamout_enabled) |
-		    S_028B94_STREAMOUT_3_EN(so->streamout_enabled));
-	radeon_emit(cs, so->hw_enabled_mask &
-			so->enabled_stream_buffers_mask);
-}
-
-static void
-radv_set_streamout_enable(struct radv_cmd_buffer *cmd_buffer, bool enable)
-{
-	struct radv_streamout_state *so = &cmd_buffer->state.streamout;
-	bool old_streamout_enabled = so->streamout_enabled;
-	uint32_t old_hw_enabled_mask = so->hw_enabled_mask;
-
-	so->streamout_enabled = enable;
-
-	so->hw_enabled_mask = so->enabled_mask |
-			      (so->enabled_mask << 4) |
-			      (so->enabled_mask << 8) |
-			      (so->enabled_mask << 12);
-
-	if ((old_streamout_enabled != so->streamout_enabled) ||
-	    (old_hw_enabled_mask != so->hw_enabled_mask))
-		radv_emit_streamout_enable(cmd_buffer);
-}
-
-static void radv_flush_vgt_streamout(struct radv_cmd_buffer *cmd_buffer)
-{
-	struct radeon_cmdbuf *cs = cmd_buffer->cs;
-	unsigned reg_strmout_cntl;
-
-	/* The register is at different places on different ASICs. */
-	if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) {
-		reg_strmout_cntl = R_0300FC_CP_STRMOUT_CNTL;
-		radeon_set_uconfig_reg(cs, reg_strmout_cntl, 0);
-	} else {
-		reg_strmout_cntl = R_0084FC_CP_STRMOUT_CNTL;
-		radeon_set_config_reg(cs, reg_strmout_cntl, 0);
-	}
-
-	radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
-	radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH) | EVENT_INDEX(0));
-
-	radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, 0));
-	radeon_emit(cs, WAIT_REG_MEM_EQUAL); /* wait until the register is equal to the reference value */
-	radeon_emit(cs, reg_strmout_cntl >> 2);  /* register */
-	radeon_emit(cs, 0);
-	radeon_emit(cs, S_0084FC_OFFSET_UPDATE_DONE(1)); /* reference value */
-	radeon_emit(cs, S_0084FC_OFFSET_UPDATE_DONE(1)); /* mask */
-	radeon_emit(cs, 4); /* poll interval */
-}
-
-void radv_CmdBeginTransformFeedbackEXT(
-    VkCommandBuffer                             commandBuffer,
-    uint32_t                                    firstCounterBuffer,
-    uint32_t                                    counterBufferCount,
-    const VkBuffer*                             pCounterBuffers,
-    const VkDeviceSize*                         pCounterBufferOffsets)
-{
-	RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
-	struct radv_streamout_binding *sb = cmd_buffer->streamout_bindings;
-	struct radv_streamout_state *so = &cmd_buffer->state.streamout;
-	struct radeon_cmdbuf *cs = cmd_buffer->cs;
-	uint32_t i;
-
-	radv_flush_vgt_streamout(cmd_buffer);
-
-	assert(firstCounterBuffer + counterBufferCount <= MAX_SO_BUFFERS);
-	for_each_bit(i, so->enabled_mask) {
-		int32_t counter_buffer_idx = i - firstCounterBuffer;
-		if (counter_buffer_idx >= 0 && counter_buffer_idx > counterBufferCount)
-			counter_buffer_idx = -1;
-
-		/* SI binds streamout buffers as shader resources.
-		 * VGT only counts primitives and tells the shader through
-		 * SGPRs what to do.
-		 */
-		radeon_set_context_reg_seq(cs, R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 + 16*i, 2);
-		radeon_emit(cs, sb[i].size >> 2);	/* BUFFER_SIZE (in DW) */
-		radeon_emit(cs, so->stride_in_dw[i]);			/* VTX_STRIDE (in DW) */
-
-		if (counter_buffer_idx >= 0 && pCounterBuffers && pCounterBuffers[counter_buffer_idx]) {
-			/* The array of counter buffers is optional. */
-			RADV_FROM_HANDLE(radv_buffer, buffer, pCounterBuffers[counter_buffer_idx]);
-			uint64_t va = radv_buffer_get_va(buffer->bo);
-
-			va += buffer->offset + pCounterBufferOffsets[counter_buffer_idx];
-
-			/* Append */
-			radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
-			radeon_emit(cs, STRMOUT_SELECT_BUFFER(i) |
-					STRMOUT_DATA_TYPE(1) | /* offset in bytes */
-					STRMOUT_OFFSET_SOURCE(STRMOUT_OFFSET_FROM_MEM)); /* control */
-			radeon_emit(cs, 0); /* unused */
-			radeon_emit(cs, 0); /* unused */
-			radeon_emit(cs, va); /* src address lo */
-			radeon_emit(cs, va >> 32); /* src address hi */
-
-			radv_cs_add_buffer(cmd_buffer->device->ws, cs, buffer->bo);
-		} else {
-			/* Start from the beginning. */
-			radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
-			radeon_emit(cs, STRMOUT_SELECT_BUFFER(i) |
-					STRMOUT_DATA_TYPE(1) | /* offset in bytes */
-					STRMOUT_OFFSET_SOURCE(STRMOUT_OFFSET_FROM_PACKET)); /* control */
-			radeon_emit(cs, 0); /* unused */
-			radeon_emit(cs, 0); /* unused */
-			radeon_emit(cs, 0); /* unused */
-			radeon_emit(cs, 0); /* unused */
-		}
-	}
-
-	radv_set_streamout_enable(cmd_buffer, true);
-}
-
-void radv_CmdEndTransformFeedbackEXT(
-    VkCommandBuffer                             commandBuffer,
-    uint32_t                                    firstCounterBuffer,
-    uint32_t                                    counterBufferCount,
-    const VkBuffer*                             pCounterBuffers,
-    const VkDeviceSize*                         pCounterBufferOffsets)
-{
-	RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
-	struct radv_streamout_state *so = &cmd_buffer->state.streamout;
-	struct radeon_cmdbuf *cs = cmd_buffer->cs;
-	uint32_t i;
-
-	radv_flush_vgt_streamout(cmd_buffer);
-
-	assert(firstCounterBuffer + counterBufferCount <= MAX_SO_BUFFERS);
-	for_each_bit(i, so->enabled_mask) {
-		int32_t counter_buffer_idx = i - firstCounterBuffer;
-		if (counter_buffer_idx >= 0 && counter_buffer_idx > counterBufferCount)
-			counter_buffer_idx = -1;
-
-		if (counter_buffer_idx >= 0 && pCounterBuffers && pCounterBuffers[counter_buffer_idx]) {
-			/* The array of counters buffer is optional. */
-			RADV_FROM_HANDLE(radv_buffer, buffer, pCounterBuffers[counter_buffer_idx]);
-			uint64_t va = radv_buffer_get_va(buffer->bo);
-
-			va += buffer->offset + pCounterBufferOffsets[counter_buffer_idx];
-
-			radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
-			radeon_emit(cs, STRMOUT_SELECT_BUFFER(i) |
-					STRMOUT_DATA_TYPE(1) | /* offset in bytes */
-					STRMOUT_OFFSET_SOURCE(STRMOUT_OFFSET_NONE) |
-					STRMOUT_STORE_BUFFER_FILLED_SIZE); /* control */
-			radeon_emit(cs, va);		/* dst address lo */
-			radeon_emit(cs, va >> 32);	/* dst address hi */
-			radeon_emit(cs, 0);		/* unused */
-			radeon_emit(cs, 0);		/* unused */
-
-			radv_cs_add_buffer(cmd_buffer->device->ws, cs, buffer->bo);
-		}
-
-		/* Deactivate transform feedback by zeroing the buffer size.
-		 * The counters (primitives generated, primitives emitted) may
-		 * be enabled even if there is not buffer bound. This ensures
-		 * that the primitives-emitted query won't increment.
-		 */
-		radeon_set_context_reg(cs, R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 + 16*i, 0);
-	}
-
-	radv_set_streamout_enable(cmd_buffer, false);
-}
-
-void radv_CmdDrawIndirectByteCountEXT(
-    VkCommandBuffer                             commandBuffer,
-    uint32_t                                    instanceCount,
-    uint32_t                                    firstInstance,
-    VkBuffer                                    _counterBuffer,
-    VkDeviceSize                                counterBufferOffset,
-    uint32_t                                    counterOffset,
-    uint32_t                                    vertexStride)
-{
-	RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
-	RADV_FROM_HANDLE(radv_buffer, counterBuffer, _counterBuffer);
-	struct radv_draw_info info = {};
-
-	info.instance_count = instanceCount;
-	info.first_instance = firstInstance;
-	info.strmout_buffer = counterBuffer;
-	info.strmout_buffer_offset = counterBufferOffset;
-	info.stride = vertexStride;
-
-	radv_draw(cmd_buffer, &info);
-}

src/amd/vulkan/radv_descriptor_set.c

@@ -533,7 +533,7 @@ VkResult radv_CreateDescriptorPool(
 {
 	RADV_FROM_HANDLE(radv_device, device, _device);
 	struct radv_descriptor_pool *pool;
-	uint64_t size = sizeof(struct radv_descriptor_pool);
+	int size = sizeof(struct radv_descriptor_pool);
 	uint64_t bo_size = 0, bo_count = 0, range_count = 0;
 
 

src/amd/vulkan/radv_device.c

@@ -43,7 +43,6 @@
 #include "ac_llvm_util.h"
 #include "vk_format.h"
 #include "sid.h"
-#include "git_sha1.h"
 #include "gfx9d.h"
 #include "addrlib/gfx9/chip/gfx9_enum.h"
 #include "util/build_id.h"
@@ -113,7 +112,6 @@ radv_get_device_name(enum radeon_family family, char *name, size_t name_len)
 	case CHIP_VEGA10: chip_string = "AMD RADV VEGA10"; break;
 	case CHIP_VEGA12: chip_string = "AMD RADV VEGA12"; break;
 	case CHIP_RAVEN: chip_string = "AMD RADV RAVEN"; break;
-	case CHIP_RAVEN2: chip_string = "AMD RADV RAVEN2"; break;
 	default: chip_string = "AMD RADV unknown"; break;
 	}
 
@@ -257,6 +255,8 @@ radv_physical_device_init(struct radv_physical_device *device,
 
 	if (strcmp(version->name, "amdgpu")) {
 		drmFreeVersion(version);
+		if (master_fd != -1)
+			close(master_fd);
 		close(fd);
 
 		if (instance->debug_flags & RADV_DEBUG_STARTUP)
@@ -337,8 +337,7 @@ radv_physical_device_init(struct radv_physical_device *device,
 		device->has_rbplus = true;
 		device->rbplus_allowed = device->rad_info.family == CHIP_STONEY ||
 					 device->rad_info.family == CHIP_VEGA12 ||
-		                         device->rad_info.family == CHIP_RAVEN ||
-		                         device->rad_info.family == CHIP_RAVEN2;
+		                         device->rad_info.family == CHIP_RAVEN;
 	}
 
 	/* The mere presence of CLEAR_STATE in the IB causes random GPU hangs
@@ -364,15 +363,6 @@ radv_physical_device_init(struct radv_physical_device *device,
 	radv_physical_device_init_mem_types(device);
 	radv_fill_device_extension_table(device, &device->supported_extensions);
 
-	device->bus_info = *drm_device->businfo.pci;
-
-	if ((device->instance->debug_flags & RADV_DEBUG_INFO))
-		ac_print_gpu_info(&device->rad_info);
-
-	/* The WSI is structured as a layer on top of the driver, so this has
-	 * to be the last part of initialization (at least until we get other
-	 * semi-layers).
-	 */
 	result = radv_init_wsi(device);
 	if (result != VK_SUCCESS) {
 		device->ws->destroy(device->ws);
@@ -380,6 +370,9 @@ radv_physical_device_init(struct radv_physical_device *device,
 		goto fail;
 	}
 
+	if ((device->instance->debug_flags & RADV_DEBUG_INFO))
+		ac_print_gpu_info(&device->rad_info);
+
 	return VK_SUCCESS;
 
 fail:
@@ -748,7 +741,7 @@ void radv_GetPhysicalDeviceFeatures(
 		.shaderCullDistance                       = true,
 		.shaderFloat64                            = true,
 		.shaderInt64                              = true,
-		.shaderInt16                              = pdevice->rad_info.chip_class >= GFX9 && HAVE_LLVM >= 0x700,
+		.shaderInt16                              = false,
 		.sparseBinding                            = true,
 		.variableMultisampleRate                  = true,
 		.inheritedQueries                         = true,
@@ -842,13 +835,6 @@ void radv_GetPhysicalDeviceFeatures2(
 			features->vertexAttributeInstanceRateZeroDivisor = VK_TRUE;
 			break;
 		}
-		case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_FEATURES_EXT: {
-			VkPhysicalDeviceTransformFeedbackFeaturesEXT *features =
-				(VkPhysicalDeviceTransformFeedbackFeaturesEXT*)ext;
-			features->transformFeedback = true;
-			features->geometryStreams = true;
-			break;
-		}
 		default:
 			break;
 		}
@@ -977,7 +963,7 @@ void radv_GetPhysicalDeviceProperties(
 		.maxClipDistances                         = 8,
 		.maxCullDistances                         = 8,
 		.maxCombinedClipAndCullDistances          = 8,
-		.discreteQueuePriorities                  = 2,
+		.discreteQueuePriorities                  = 1,
 		.pointSizeRange                           = { 0.125, 255.875 },
 		.lineWidthRange                           = { 0.0, 7.9921875 },
 		.pointSizeGranularity                     = (1.0 / 8.0),
@@ -1096,7 +1082,9 @@ void radv_GetPhysicalDeviceProperties2(
 			properties->shaderArraysPerEngineCount =
 				pdevice->rad_info.max_sh_per_se;
 			properties->computeUnitsPerShaderArray =
-				pdevice->rad_info.num_good_cu_per_sh;
+				pdevice->rad_info.num_good_compute_units /
+					(pdevice->rad_info.max_se *
+					 pdevice->rad_info.max_sh_per_se);
 			properties->simdPerComputeUnit = 4;
 			properties->wavefrontsPerSimd =
 				pdevice->rad_info.family == CHIP_TONGA ||
@@ -1166,73 +1154,6 @@ void radv_GetPhysicalDeviceProperties2(
 			properties->maxDescriptorSetUpdateAfterBindInputAttachments = max_descriptor_set_size;
 			break;
 		}
-		case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PROTECTED_MEMORY_PROPERTIES: {
-			VkPhysicalDeviceProtectedMemoryProperties *properties =
-				(VkPhysicalDeviceProtectedMemoryProperties *)ext;
-			properties->protectedNoFault = false;
-			break;
-		}
-		case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CONSERVATIVE_RASTERIZATION_PROPERTIES_EXT: {
-			VkPhysicalDeviceConservativeRasterizationPropertiesEXT *properties =
-				(VkPhysicalDeviceConservativeRasterizationPropertiesEXT *)ext;
-			properties->primitiveOverestimationSize = 0;
-			properties->maxExtraPrimitiveOverestimationSize = 0;
-			properties->extraPrimitiveOverestimationSizeGranularity = 0;
-			properties->primitiveUnderestimation = VK_FALSE;
-			properties->conservativePointAndLineRasterization = VK_FALSE;
-			properties->degenerateTrianglesRasterized = VK_FALSE;
-			properties->degenerateLinesRasterized = VK_FALSE;
-			properties->fullyCoveredFragmentShaderInputVariable = VK_FALSE;
-			properties->conservativeRasterizationPostDepthCoverage = VK_FALSE;
-			break;
-		}
-		case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PCI_BUS_INFO_PROPERTIES_EXT: {
-			VkPhysicalDevicePCIBusInfoPropertiesEXT *properties =
-				(VkPhysicalDevicePCIBusInfoPropertiesEXT *)ext;
-			properties->pciDomain = pdevice->bus_info.domain;
-			properties->pciBus = pdevice->bus_info.bus;
-			properties->pciDevice = pdevice->bus_info.dev;
-			properties->pciFunction = pdevice->bus_info.func;
-			break;
-		}
-		case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DRIVER_PROPERTIES_KHR: {
-			VkPhysicalDeviceDriverPropertiesKHR *driver_props =
-				(VkPhysicalDeviceDriverPropertiesKHR *) ext;
-
-			driver_props->driverID = VK_DRIVER_ID_MESA_RADV_KHR;
-			memset(driver_props->driverName, 0, VK_MAX_DRIVER_NAME_SIZE_KHR);
-			strcpy(driver_props->driverName, "radv");
-
-			memset(driver_props->driverInfo, 0, VK_MAX_DRIVER_INFO_SIZE_KHR);
-			snprintf(driver_props->driverInfo, VK_MAX_DRIVER_INFO_SIZE_KHR,
-				"Mesa " PACKAGE_VERSION MESA_GIT_SHA1
-				" (LLVM %d.%d.%d)",
-				 (HAVE_LLVM >> 8) & 0xff, HAVE_LLVM & 0xff,
-				 MESA_LLVM_VERSION_PATCH);
-
-			driver_props->conformanceVersion = (VkConformanceVersionKHR) {
-				.major = 1,
-				.minor = 1,
-				.subminor = 2,
-				.patch = 0,
-			};
-			break;
-		}
-		case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_PROPERTIES_EXT: {
-			VkPhysicalDeviceTransformFeedbackPropertiesEXT *properties =
-				(VkPhysicalDeviceTransformFeedbackPropertiesEXT *)ext;
-			properties->maxTransformFeedbackStreams = MAX_SO_STREAMS;
-			properties->maxTransformFeedbackBuffers = MAX_SO_BUFFERS;
-			properties->maxTransformFeedbackBufferSize = UINT32_MAX;
-			properties->maxTransformFeedbackStreamDataSize = 512;
-			properties->maxTransformFeedbackBufferDataSize = UINT32_MAX;
-			properties->maxTransformFeedbackBufferDataStride = 512;
-			properties->transformFeedbackQueries = true;
-			properties->transformFeedbackStreamsLinesTriangles = false;
-			properties->transformFeedbackRasterizationStreamSelect = false;
-			properties->transformFeedbackDraw = true;
-			break;
-		}
 		default:
 			break;
 		}
@@ -1516,28 +1437,6 @@ static int radv_get_device_extension_index(const char *name)
 	return -1;
 }
 
-static int
-radv_get_int_debug_option(const char *name, int default_value)
-{
-	const char *str;
-	int result;
-
-	str = getenv(name);
-	if (!str) {
-		result = default_value;
-	} else {
-		char *endptr;
-
-		result = strtol(str, &endptr, 0);
-		if (str == endptr) {
-			/* No digits founs. */
-			result = default_value;
-		}
-	}
-
-	return result;
-}
-
 VkResult radv_CreateDevice(
 	VkPhysicalDevice                            physicalDevice,
 	const VkDeviceCreateInfo*                   pCreateInfo,
@@ -1633,13 +1532,11 @@ VkResult radv_CreateDevice(
 
 	device->pbb_allowed = device->physical_device->rad_info.chip_class >= GFX9 &&
 			((device->instance->perftest_flags & RADV_PERFTEST_BINNING) ||
-			 device->physical_device->rad_info.family == CHIP_RAVEN ||
-			 device->physical_device->rad_info.family == CHIP_RAVEN2);
+			 device->physical_device->rad_info.family == CHIP_RAVEN);
 
 	/* Disabled and not implemented for now. */
 	device->dfsm_allowed = device->pbb_allowed &&
-	                       (device->physical_device->rad_info.family == CHIP_RAVEN ||
-	                        device->physical_device->rad_info.family == CHIP_RAVEN2);
+	                       device->physical_device->rad_info.family == CHIP_RAVEN;
 
 #ifdef ANDROID
 	device->always_use_syncobj = device->physical_device->rad_info.has_syncobj_wait_for_submit;
@@ -1735,13 +1632,6 @@ VkResult radv_CreateDevice(
 
 	device->mem_cache = radv_pipeline_cache_from_handle(pc);
 
-	device->force_aniso =
-		MIN2(16, radv_get_int_debug_option("RADV_TEX_ANISO", -1));
-	if (device->force_aniso >= 0) {
-		fprintf(stderr, "radv: Forcing anisotropy filter to %ix\n",
-			1 << util_logbase2(device->force_aniso));
-	}
-
 	*pDevice = radv_device_to_handle(device);
 	return VK_SUCCESS;
 
@@ -2202,33 +2092,6 @@ radv_emit_global_shader_pointers(struct radv_queue *queue,
 	}
 }
 
-static void
-radv_init_graphics_state(struct radeon_cmdbuf *cs, struct radv_queue *queue)
-{
-	struct radv_device *device = queue->device;
-
-	if (device->gfx_init) {
-		uint64_t va = radv_buffer_get_va(device->gfx_init);
-
-		radeon_emit(cs, PKT3(PKT3_INDIRECT_BUFFER_CIK, 2, 0));
-		radeon_emit(cs, va);
-		radeon_emit(cs, va >> 32);
-		radeon_emit(cs, device->gfx_init_size_dw & 0xffff);
-
-		radv_cs_add_buffer(device->ws, cs, device->gfx_init);
-	} else {
-		struct radv_physical_device *physical_device = device->physical_device;
-		si_emit_graphics(physical_device, cs);
-	}
-}
-
-static void
-radv_init_compute_state(struct radeon_cmdbuf *cs, struct radv_queue *queue)
-{
-	struct radv_physical_device *physical_device = queue->device->physical_device;
-	si_emit_compute(physical_device, cs);
-}
-
 static VkResult
 radv_get_preamble_cs(struct radv_queue *queue,
                      uint32_t scratch_size,
@@ -2383,18 +2246,6 @@ radv_get_preamble_cs(struct radv_queue *queue,
 		if (scratch_bo)
 			radv_cs_add_buffer(queue->device->ws, cs, scratch_bo);
 
-		/* Emit initial configuration. */
-		switch (queue->queue_family_index) {
-		case RADV_QUEUE_GENERAL:
-			radv_init_graphics_state(cs, queue);
-			break;
-		case RADV_QUEUE_COMPUTE:
-			radv_init_compute_state(cs, queue);
-			break;
-		case RADV_QUEUE_TRANSFER:
-			break;
-		}
-
 		if (descriptor_bo != queue->descriptor_bo) {
 			uint32_t *map = (uint32_t*)queue->device->ws->buffer_map(descriptor_bo);
 
@@ -3940,7 +3791,7 @@ radv_init_dcc_control_reg(struct radv_device *device,
 	unsigned max_compressed_block_size;
 	unsigned independent_64b_blocks;
 
-	if (!radv_image_has_dcc(iview->image))
+	if (device->physical_device->rad_info.chip_class < VI)
 		return 0;
 
 	if (iview->image->info.samples > 1) {
@@ -4540,26 +4391,13 @@ radv_tex_filter_mode(VkSamplerReductionModeEXT mode)
 	return 0;
 }
 
-static uint32_t
-radv_get_max_anisotropy(struct radv_device *device,
-			const VkSamplerCreateInfo *pCreateInfo)
-{
-	if (device->force_aniso >= 0)
-		return device->force_aniso;
-
-	if (pCreateInfo->anisotropyEnable &&
-	    pCreateInfo->maxAnisotropy > 1.0f)
-		return (uint32_t)pCreateInfo->maxAnisotropy;
-
-	return 0;
-}
-
 static void
 radv_init_sampler(struct radv_device *device,
 		  struct radv_sampler *sampler,
 		  const VkSamplerCreateInfo *pCreateInfo)
 {
-	uint32_t max_aniso = radv_get_max_anisotropy(device, pCreateInfo);
+	uint32_t max_aniso = pCreateInfo->anisotropyEnable && pCreateInfo->maxAnisotropy > 1.0 ?
+					(uint32_t) pCreateInfo->maxAnisotropy : 0;
 	uint32_t max_aniso_ratio = radv_tex_aniso_filter(max_aniso);
 	bool is_vi = (device->physical_device->rad_info.chip_class >= VI);
 	unsigned filter_mode = SQ_IMG_FILTER_MODE_BLEND;
@@ -4990,122 +4828,3 @@ radv_GetDeviceGroupPeerMemoryFeatures(
 	                       VK_PEER_MEMORY_FEATURE_GENERIC_SRC_BIT |
 	                       VK_PEER_MEMORY_FEATURE_GENERIC_DST_BIT;
 }
-
-static const VkTimeDomainEXT radv_time_domains[] = {
-	VK_TIME_DOMAIN_DEVICE_EXT,
-	VK_TIME_DOMAIN_CLOCK_MONOTONIC_EXT,
-	VK_TIME_DOMAIN_CLOCK_MONOTONIC_RAW_EXT,
-};
-
-VkResult radv_GetPhysicalDeviceCalibrateableTimeDomainsEXT(
-	VkPhysicalDevice                             physicalDevice,
-	uint32_t                                     *pTimeDomainCount,
-	VkTimeDomainEXT                              *pTimeDomains)
-{
-	int d;
-	VK_OUTARRAY_MAKE(out, pTimeDomains, pTimeDomainCount);
-
-	for (d = 0; d < ARRAY_SIZE(radv_time_domains); d++) {
-		vk_outarray_append(&out, i) {
-			*i = radv_time_domains[d];
-		}
-	}
-
-	return vk_outarray_status(&out);
-}
-
-static uint64_t
-radv_clock_gettime(clockid_t clock_id)
-{
-	struct timespec current;
-	int ret;
-
-	ret = clock_gettime(clock_id, &current);
-	if (ret < 0 && clock_id == CLOCK_MONOTONIC_RAW)
-		ret = clock_gettime(CLOCK_MONOTONIC, &current);
-	if (ret < 0)
-		return 0;
-
-	return (uint64_t) current.tv_sec * 1000000000ULL + current.tv_nsec;
-}
-
-VkResult radv_GetCalibratedTimestampsEXT(
-	VkDevice                                     _device,
-	uint32_t                                     timestampCount,
-	const VkCalibratedTimestampInfoEXT           *pTimestampInfos,
-	uint64_t                                     *pTimestamps,
-	uint64_t                                     *pMaxDeviation)
-{
-	RADV_FROM_HANDLE(radv_device, device, _device);
-	uint32_t clock_crystal_freq = device->physical_device->rad_info.clock_crystal_freq;
-	int d;
-	uint64_t begin, end;
-        uint64_t max_clock_period = 0;
-
-	begin = radv_clock_gettime(CLOCK_MONOTONIC_RAW);
-
-	for (d = 0; d < timestampCount; d++) {
-		switch (pTimestampInfos[d].timeDomain) {
-		case VK_TIME_DOMAIN_DEVICE_EXT:
-			pTimestamps[d] = device->ws->query_value(device->ws,
-								 RADEON_TIMESTAMP);
-                        uint64_t device_period = DIV_ROUND_UP(1000000, clock_crystal_freq);
-                        max_clock_period = MAX2(max_clock_period, device_period);
-			break;
-		case VK_TIME_DOMAIN_CLOCK_MONOTONIC_EXT:
-			pTimestamps[d] = radv_clock_gettime(CLOCK_MONOTONIC);
-                        max_clock_period = MAX2(max_clock_period, 1);
-			break;
-
-		case VK_TIME_DOMAIN_CLOCK_MONOTONIC_RAW_EXT:
-			pTimestamps[d] = begin;
-			break;
-		default:
-			pTimestamps[d] = 0;
-			break;
-		}
-	}
-
-	end = radv_clock_gettime(CLOCK_MONOTONIC_RAW);
-
-        /*
-         * The maximum deviation is the sum of the interval over which we
-         * perform the sampling and the maximum period of any sampled
-         * clock. That's because the maximum skew between any two sampled
-         * clock edges is when the sampled clock with the largest period is
-         * sampled at the end of that period but right at the beginning of the
-         * sampling interval and some other clock is sampled right at the
-         * begining of its sampling period and right at the end of the
-         * sampling interval. Let's assume the GPU has the longest clock
-         * period and that the application is sampling GPU and monotonic:
-         *
-         *                               s                 e
-         *			 w x y z 0 1 2 3 4 5 6 7 8 9 a b c d e f
-         *	Raw              -_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-
-         *
-         *                               g
-         *		  0         1         2         3
-         *	GPU       -----_____-----_____-----_____-----_____
-         *
-         *                                                m
-         *					    x y z 0 1 2 3 4 5 6 7 8 9 a b c
-         *	Monotonic                           -_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-
-         *
-         *	Interval                     <----------------->
-         *	Deviation           <-------------------------->
-         *
-         *		s  = read(raw)       2
-         *		g  = read(GPU)       1
-         *		m  = read(monotonic) 2
-         *		e  = read(raw)       b
-         *
-         * We round the sample interval up by one tick to cover sampling error
-         * in the interval clock
-         */
-
-        uint64_t sample_interval = end - begin + 1;
-
-        *pMaxDeviation = sample_interval + max_clock_period;
-
-	return VK_SUCCESS;
-}

src/amd/vulkan/radv_extensions.py

@@ -59,7 +59,6 @@ EXTENSIONS = [
     Extension('VK_KHR_device_group',                      1, True),
     Extension('VK_KHR_device_group_creation',             1, True),
     Extension('VK_KHR_draw_indirect_count',               1, True),
-    Extension('VK_KHR_driver_properties',                 1, True),
     Extension('VK_KHR_external_fence',                    1, 'device->rad_info.has_syncobj_wait_for_submit'),
     Extension('VK_KHR_external_fence_capabilities',       1, True),
     Extension('VK_KHR_external_fence_fd',                 1, 'device->rad_info.has_syncobj_wait_for_submit'),
@@ -93,9 +92,7 @@ EXTENSIONS = [
     Extension('VK_KHR_display',                          23, 'VK_USE_PLATFORM_DISPLAY_KHR'),
     Extension('VK_EXT_direct_mode_display',               1, 'VK_USE_PLATFORM_DISPLAY_KHR'),
     Extension('VK_EXT_acquire_xlib_display',              1, 'VK_USE_PLATFORM_XLIB_XRANDR_EXT'),
-    Extension('VK_EXT_calibrated_timestamps',             1, True),
     Extension('VK_EXT_conditional_rendering',             1, True),
-    Extension('VK_EXT_conservative_rasterization',        1, 'device->rad_info.chip_class >= GFX9'),
     Extension('VK_EXT_display_surface_counter',           1, 'VK_USE_PLATFORM_DISPLAY_KHR'),
     Extension('VK_EXT_display_control',                   1, 'VK_USE_PLATFORM_DISPLAY_KHR'),
     Extension('VK_EXT_debug_report',                      9, True),
@@ -105,11 +102,9 @@ EXTENSIONS = [
     Extension('VK_EXT_external_memory_dma_buf',           1, True),
     Extension('VK_EXT_external_memory_host',              1, 'device->rad_info.has_userptr'),
     Extension('VK_EXT_global_priority',                   1, 'device->rad_info.has_ctx_priority'),
-    Extension('VK_EXT_pci_bus_info',                      1, True),
     Extension('VK_EXT_sampler_filter_minmax',             1, 'device->rad_info.chip_class >= CIK'),
     Extension('VK_EXT_shader_viewport_index_layer',       1, True),
     Extension('VK_EXT_shader_stencil_export',             1, True),
-    Extension('VK_EXT_transform_feedback',                1, True),
     Extension('VK_EXT_vertex_attribute_divisor',          3, True),
     Extension('VK_AMD_draw_indirect_count',               1, True),
     Extension('VK_AMD_gcn_shader',                        1, True),
@@ -117,8 +112,6 @@ EXTENSIONS = [
     Extension('VK_AMD_shader_core_properties',            1, True),
     Extension('VK_AMD_shader_info',                       1, True),
     Extension('VK_AMD_shader_trinary_minmax',             1, True),
-    Extension('VK_GOOGLE_decorate_string',                1, True),
-    Extension('VK_GOOGLE_hlsl_functionality1',            1, True),
 ]
 
 class VkVersion:
@@ -154,15 +147,14 @@ class VkVersion:
         patch = self.patch if self.patch is not None else 0
         return (self.major << 22) | (self.minor << 12) | patch
 
-    def __gt__(self, other):
+    def __cmp__(self, other):
         # If only one of them has a patch version, "ignore" it by making
         # other's patch version match self.
         if (self.patch is None) != (other.patch is None):
             other = copy.copy(other)
             other.patch = self.patch
 
-        return self.__int_ver() > other.__int_ver()
-
+        return self.__int_ver().__cmp__(other.__int_ver())
 
 MAX_API_VERSION = VkVersion(MAX_API_VERSION)
 

src/amd/vulkan/radv_formats.c

@@ -645,12 +645,9 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
 			if (radv_is_filter_minmax_format_supported(format))
 				 tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_MINMAX_BIT_EXT;
 
-			/* Don't support blitting surfaces with depth/stencil. */
-			if (vk_format_is_depth(format) && vk_format_is_stencil(format))
-				tiled &= ~VK_FORMAT_FEATURE_BLIT_DST_BIT;
-
-			/* Don't support linear depth surfaces */
-			linear = 0;
+			/* GFX9 doesn't support linear depth surfaces */
+			if (physical_device->rad_info.chip_class >= GFX9)
+				linear = 0;
 		}
 	} else {
 		bool linear_sampling;
@@ -667,13 +664,6 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
 				linear |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT;
 				tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT;
 			}
-
-			/* Don't support blitting for R32G32B32 formats. */
-			if (format == VK_FORMAT_R32G32B32_SFLOAT ||
-			    format == VK_FORMAT_R32G32B32_UINT ||
-			    format == VK_FORMAT_R32G32B32_SINT) {
-				linear &= ~VK_FORMAT_FEATURE_BLIT_SRC_BIT;
-			}
 		}
 		if (radv_is_colorbuffer_format_supported(format, &blendable)) {
 			linear |= VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT | VK_FORMAT_FEATURE_BLIT_DST_BIT;
@@ -1098,20 +1088,6 @@ static VkResult radv_get_image_format_properties(struct radv_physical_device *ph
 		sampleCounts |= VK_SAMPLE_COUNT_2_BIT | VK_SAMPLE_COUNT_4_BIT | VK_SAMPLE_COUNT_8_BIT;
 	}
 
-	if (info->tiling == VK_IMAGE_TILING_LINEAR &&
-	    (info->format == VK_FORMAT_R32G32B32_SFLOAT ||
-	     info->format == VK_FORMAT_R32G32B32_SINT ||
-	     info->format == VK_FORMAT_R32G32B32_UINT)) {
-		/* R32G32B32 is a weird format and the driver currently only
-		 * supports the barely minimum.
-		 * TODO: Implement more if we really need to.
-		 */
-		if (info->type == VK_IMAGE_TYPE_3D)
-			goto unsupported;
-		maxArraySize = 1;
-		maxMipLevels = 1;
-	}
-
 	if (info->usage & VK_IMAGE_USAGE_SAMPLED_BIT) {
 		if (!(format_feature_flags & VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT)) {
 			goto unsupported;

src/amd/vulkan/radv_image.c

@@ -72,8 +72,11 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device,
 	if (device->physical_device->rad_info.chip_class < VI)
 		return false;
 
-	if ((pCreateInfo->usage & VK_IMAGE_USAGE_STORAGE_BIT) ||
-	    (pCreateInfo->flags & VK_IMAGE_CREATE_EXTENDED_USAGE_BIT_KHR))
+	if (pCreateInfo->usage & VK_IMAGE_USAGE_STORAGE_BIT)
+		return false;
+
+	if (pCreateInfo->flags & (VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT |
+				  VK_IMAGE_CREATE_EXTENDED_USAGE_BIT_KHR))
 		return false;
 
 	if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR)
@@ -97,26 +100,6 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device,
 	    pCreateInfo->format != VK_FORMAT_D16_UNORM)
 		return false;
 
-	if (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) {
-		const struct VkImageFormatListCreateInfoKHR *format_list =
-			(const struct  VkImageFormatListCreateInfoKHR *)
-				vk_find_struct_const(pCreateInfo->pNext,
-						     IMAGE_FORMAT_LIST_CREATE_INFO_KHR);
-
-		/* We have to ignore the existence of the list if viewFormatCount = 0 */
-		if (format_list && format_list->viewFormatCount) {
-			/* compatibility is transitive, so we only need to check
-			 * one format with everything else.
-			 */
-			for (unsigned i = 0; i < format_list->viewFormatCount; ++i) {
-				if (pCreateInfo->format != format_list->pViewFormats[i])
-					return false;
-			}
-		} else {
-			return false;
-		}
-	}
-
 	return true;
 }
 
@@ -691,7 +674,7 @@ radv_query_opaque_metadata(struct radv_device *device,
 	si_make_texture_descriptor(device, image, false,
 				   (VkImageViewType)image->type, image->vk_format,
 				   &fixedmapping, 0, image->info.levels - 1, 0,
-				   image->info.array_size,
+				   image->info.array_size - 1,
 				   image->info.width, image->info.height,
 				   image->info.depth,
 				   desc, NULL);
@@ -870,6 +853,14 @@ radv_image_alloc_htile(struct radv_image *image)
 	/* + 8 for storing the clear values */
 	image->clear_value_offset = image->htile_offset + image->surface.htile_size;
 	image->size = image->clear_value_offset + 8;
+	if (radv_image_is_tc_compat_htile(image)) {
+		/* Metadata for the TC-compatible HTILE hardware bug which
+		 * have to be fixed by updating ZRANGE_PRECISION when doing
+		 * fast depth clears to 0.0f.
+		 */
+		image->tc_compat_zrange_offset = image->clear_value_offset + 8;
+		image->size = image->clear_value_offset + 16;
+	}
 	image->alignment = align64(image->alignment, image->surface.htile_alignment);
 }
 
@@ -923,9 +914,7 @@ radv_image_can_enable_fmask(struct radv_image *image)
 static inline bool
 radv_image_can_enable_htile(struct radv_image *image)
 {
-	return image->info.levels == 1 &&
-	       vk_format_is_depth(image->vk_format) &&
-	       image->info.width * image->info.height >= 8 * 8;
+	return image->info.levels == 1 && vk_format_is_depth(image->vk_format);
 }
 
 VkResult
@@ -977,7 +966,7 @@ radv_image_create(VkDevice _device,
 
 	image->shareable = vk_find_struct_const(pCreateInfo->pNext,
 	                                        EXTERNAL_MEMORY_IMAGE_CREATE_INFO_KHR) != NULL;
-	if (!vk_format_is_depth(pCreateInfo->format) && !create_info->scanout && !image->shareable) {
+	if (!vk_format_is_depth_or_stencil(pCreateInfo->format) && !create_info->scanout && !image->shareable) {
 		image->info.surf_index = &device->image_mrt_offset_counter;
 	}
 
@@ -1014,8 +1003,8 @@ radv_image_create(VkDevice _device,
 			/* Otherwise, try to enable HTILE for depth surfaces. */
 			if (radv_image_can_enable_htile(image) &&
 			    !(device->instance->debug_flags & RADV_DEBUG_NO_HIZ)) {
-				radv_image_alloc_htile(image);
 				image->tc_compatible_htile = image->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE;
+				radv_image_alloc_htile(image);
 			} else {
 				image->surface.htile_size = 0;
 			}
@@ -1175,8 +1164,6 @@ radv_image_view_init(struct radv_image_view *iview,
 		 if (device->physical_device->rad_info.chip_class >= GFX9 &&
 		     vk_format_is_compressed(image->vk_format) &&
 		     !vk_format_is_compressed(iview->vk_format)) {
-			 unsigned rounded_img_w = util_next_power_of_two(iview->extent.width);
-			 unsigned rounded_img_h = util_next_power_of_two(iview->extent.height);
 			 unsigned lvl_width  = radv_minify(image->info.width , range->baseMipLevel);
 			 unsigned lvl_height = radv_minify(image->info.height, range->baseMipLevel);
 
@@ -1186,8 +1173,8 @@ radv_image_view_init(struct radv_image_view *iview,
 			 lvl_width <<= range->baseMipLevel;
 			 lvl_height <<= range->baseMipLevel;
 
-			 iview->extent.width = CLAMP(lvl_width, iview->extent.width, rounded_img_w);
-			 iview->extent.height = CLAMP(lvl_height, iview->extent.height, rounded_img_h);
+			 iview->extent.width = CLAMP(lvl_width, iview->extent.width, iview->image->surface.u.gfx9.surf_pitch);
+			 iview->extent.height = CLAMP(lvl_height, iview->extent.height, iview->image->surface.u.gfx9.surf_height);
 		 }
 	}
 

src/amd/vulkan/radv_meta.c

@@ -234,12 +234,15 @@ radv_builtin_cache_path(char *path)
 	const char *suffix2 = "/.cache/radv_builtin_shaders";
 	struct passwd pwd, *result;
 	char path2[PATH_MAX + 1]; /* PATH_MAX is not a real max,but suffices here. */
-	int ret;
 
 	if (xdg_cache_home) {
-		ret = snprintf(path, PATH_MAX + 1, "%s%s%zd",
-			       xdg_cache_home, suffix, sizeof(void *) * 8);
-		return ret > 0 && ret < PATH_MAX + 1;
+
+		if (strlen(xdg_cache_home) + strlen(suffix) > PATH_MAX)
+			return false;
+
+		strcpy(path, xdg_cache_home);
+		strcat(path, suffix);
+		return true;
 	}
 
 	getpwuid_r(getuid(), &pwd, path2, PATH_MAX - strlen(suffix2), &result);
@@ -250,25 +253,23 @@ radv_builtin_cache_path(char *path)
 	strcat(path, "/.cache");
 	mkdir(path, 0755);
 
-	ret = snprintf(path, PATH_MAX + 1, "%s%s%zd",
-		       pwd.pw_dir, suffix2, sizeof(void *) * 8);
-	return ret > 0 && ret < PATH_MAX + 1;
+	strcat(path, suffix);
+	return true;
 }
 
-static bool
+static void
 radv_load_meta_pipeline(struct radv_device *device)
 {
 	char path[PATH_MAX + 1];
 	struct stat st;
 	void *data = NULL;
-	bool ret = false;
 
 	if (!radv_builtin_cache_path(path))
-		return false;
+		return;
 
 	int fd = open(path, O_RDONLY);
 	if (fd < 0)
-		return false;
+		return;
 	if (fstat(fd, &st))
 		goto fail;
 	data = malloc(st.st_size);
@@ -277,11 +278,10 @@ radv_load_meta_pipeline(struct radv_device *device)
 	if(read(fd, data, st.st_size) == -1)
 		goto fail;
 
-	ret = radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size);
+	radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size);
 fail:
 	free(data);
 	close(fd);
-	return ret;
 }
 
 static void
@@ -330,8 +330,6 @@ radv_device_init_meta(struct radv_device *device)
 {
 	VkResult result;
 
-	memset(&device->meta_state, 0, sizeof(device->meta_state));
-
 	device->meta_state.alloc = (VkAllocationCallbacks) {
 		.pUserData = device,
 		.pfnAllocation = meta_alloc,
@@ -341,24 +339,21 @@ radv_device_init_meta(struct radv_device *device)
 
 	device->meta_state.cache.alloc = device->meta_state.alloc;
 	radv_pipeline_cache_init(&device->meta_state.cache, device);
-	bool loaded_cache = radv_load_meta_pipeline(device);
-	bool on_demand = !loaded_cache;
+	radv_load_meta_pipeline(device);
 
-	mtx_init(&device->meta_state.mtx, mtx_plain);
-
-	result = radv_device_init_meta_clear_state(device, on_demand);
+	result = radv_device_init_meta_clear_state(device);
 	if (result != VK_SUCCESS)
 		goto fail_clear;
 
-	result = radv_device_init_meta_resolve_state(device, on_demand);
+	result = radv_device_init_meta_resolve_state(device);
 	if (result != VK_SUCCESS)
 		goto fail_resolve;
 
-	result = radv_device_init_meta_blit_state(device, on_demand);
+	result = radv_device_init_meta_blit_state(device);
 	if (result != VK_SUCCESS)
 		goto fail_blit;
 
-	result = radv_device_init_meta_blit2d_state(device, on_demand);
+	result = radv_device_init_meta_blit2d_state(device);
 	if (result != VK_SUCCESS)
 		goto fail_blit2d;
 
@@ -366,7 +361,7 @@ radv_device_init_meta(struct radv_device *device)
 	if (result != VK_SUCCESS)
 		goto fail_bufimage;
 
-	result = radv_device_init_meta_depth_decomp_state(device, on_demand);
+	result = radv_device_init_meta_depth_decomp_state(device);
 	if (result != VK_SUCCESS)
 		goto fail_depth_decomp;
 
@@ -374,19 +369,19 @@ radv_device_init_meta(struct radv_device *device)
 	if (result != VK_SUCCESS)
 		goto fail_buffer;
 
-	result = radv_device_init_meta_query_state(device, on_demand);
+	result = radv_device_init_meta_query_state(device);
 	if (result != VK_SUCCESS)
 		goto fail_query;
 
-	result = radv_device_init_meta_fast_clear_flush_state(device, on_demand);
+	result = radv_device_init_meta_fast_clear_flush_state(device);
 	if (result != VK_SUCCESS)
 		goto fail_fast_clear;
 
-	result = radv_device_init_meta_resolve_compute_state(device, on_demand);
+	result = radv_device_init_meta_resolve_compute_state(device);
 	if (result != VK_SUCCESS)
 		goto fail_resolve_compute;
 
-	result = radv_device_init_meta_resolve_fragment_state(device, on_demand);
+	result = radv_device_init_meta_resolve_fragment_state(device);
 	if (result != VK_SUCCESS)
 		goto fail_resolve_fragment;
 	return VK_SUCCESS;
@@ -412,7 +407,6 @@ fail_blit:
 fail_resolve:
 	radv_device_finish_meta_clear_state(device);
 fail_clear:
-	mtx_destroy(&device->meta_state.mtx);
 	radv_pipeline_cache_finish(&device->meta_state.cache);
 	return result;
 }
@@ -434,7 +428,6 @@ radv_device_finish_meta(struct radv_device *device)
 
 	radv_store_meta_pipeline(device);
 	radv_pipeline_cache_finish(&device->meta_state.cache);
-	mtx_destroy(&device->meta_state.mtx);
 }
 
 nir_ssa_def *radv_meta_gen_rect_vertices_comp2(nir_builder *vs_b, nir_ssa_def *comp2)

src/amd/vulkan/radv_meta.h

@@ -58,34 +58,34 @@ struct radv_meta_saved_state {
 	VkRect2D render_area;
 };
 
-VkResult radv_device_init_meta_clear_state(struct radv_device *device, bool on_demand);
+VkResult radv_device_init_meta_clear_state(struct radv_device *device);
 void radv_device_finish_meta_clear_state(struct radv_device *device);
 
-VkResult radv_device_init_meta_resolve_state(struct radv_device *device, bool on_demand);
+VkResult radv_device_init_meta_resolve_state(struct radv_device *device);
 void radv_device_finish_meta_resolve_state(struct radv_device *device);
 
-VkResult radv_device_init_meta_depth_decomp_state(struct radv_device *device, bool on_demand);
+VkResult radv_device_init_meta_depth_decomp_state(struct radv_device *device);
 void radv_device_finish_meta_depth_decomp_state(struct radv_device *device);
 
-VkResult radv_device_init_meta_fast_clear_flush_state(struct radv_device *device, bool on_demand);
+VkResult radv_device_init_meta_fast_clear_flush_state(struct radv_device *device);
 void radv_device_finish_meta_fast_clear_flush_state(struct radv_device *device);
 
-VkResult radv_device_init_meta_blit_state(struct radv_device *device, bool on_demand);
+VkResult radv_device_init_meta_blit_state(struct radv_device *device);
 void radv_device_finish_meta_blit_state(struct radv_device *device);
 
-VkResult radv_device_init_meta_blit2d_state(struct radv_device *device, bool on_demand);
+VkResult radv_device_init_meta_blit2d_state(struct radv_device *device);
 void radv_device_finish_meta_blit2d_state(struct radv_device *device);
 
 VkResult radv_device_init_meta_buffer_state(struct radv_device *device);
 void radv_device_finish_meta_buffer_state(struct radv_device *device);
 
-VkResult radv_device_init_meta_query_state(struct radv_device *device, bool on_demand);
+VkResult radv_device_init_meta_query_state(struct radv_device *device);
 void radv_device_finish_meta_query_state(struct radv_device *device);
 
-VkResult radv_device_init_meta_resolve_compute_state(struct radv_device *device, bool on_demand);
+VkResult radv_device_init_meta_resolve_compute_state(struct radv_device *device);
 void radv_device_finish_meta_resolve_compute_state(struct radv_device *device);
 
-VkResult radv_device_init_meta_resolve_fragment_state(struct radv_device *device, bool on_demand);
+VkResult radv_device_init_meta_resolve_fragment_state(struct radv_device *device);
 void radv_device_finish_meta_resolve_fragment_state(struct radv_device *device);
 
 void radv_meta_save(struct radv_meta_saved_state *saved_state,

src/amd/vulkan/radv_meta_blit.c

@@ -31,13 +31,6 @@ struct blit_region {
 	VkExtent3D dest_extent;
 };
 
-static VkResult
-build_pipeline(struct radv_device *device,
-               VkImageAspectFlagBits aspect,
-               enum glsl_sampler_dim tex_dim,
-               unsigned fs_key,
-               VkPipeline *pipeline);
-
 static nir_shader *
 build_nir_vertex_shader(void)
 {
@@ -280,20 +273,6 @@ build_nir_copy_fragment_shader_stencil(enum glsl_sampler_dim tex_dim)
 	return b.shader;
 }
 
-static enum glsl_sampler_dim
-translate_sampler_dim(VkImageType type) {
-	switch(type) {
-	case VK_IMAGE_TYPE_1D:
-		return GLSL_SAMPLER_DIM_1D;
-	case VK_IMAGE_TYPE_2D:
-		return GLSL_SAMPLER_DIM_2D;
-	case VK_IMAGE_TYPE_3D:
-		return GLSL_SAMPLER_DIM_3D;
-	default:
-		unreachable("Unhandled image type");
-	}
-}
-
 static void
 meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
                struct radv_image *src_image,
@@ -307,7 +286,7 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
                VkOffset2D dest_offset_0,
                VkOffset2D dest_offset_1,
                VkRect2D dest_box,
-               VkSampler sampler)
+               VkFilter blit_filter)
 {
 	struct radv_device *device = cmd_buffer->device;
 	uint32_t src_width = radv_minify(src_iview->image->info.width, src_iview->base_mip);
@@ -331,6 +310,17 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
 			      VK_SHADER_STAGE_VERTEX_BIT, 0, 20,
 			      vertex_push_constants);
 
+	VkSampler sampler;
+	radv_CreateSampler(radv_device_to_handle(device),
+				 &(VkSamplerCreateInfo) {
+					 .sType = VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO,
+						 .magFilter = blit_filter,
+						 .minFilter = blit_filter,
+						 .addressModeU = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
+						 .addressModeV = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
+						 .addressModeW = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
+						 }, &cmd_buffer->pool->alloc, &sampler);
+
 	VkFramebuffer fb;
 	radv_CreateFramebuffer(radv_device_to_handle(device),
 			       &(VkFramebufferCreateInfo) {
@@ -343,12 +333,11 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
 				       .height = dst_height,
 				       .layers = 1,
 				}, &cmd_buffer->pool->alloc, &fb);
-	VkPipeline* pipeline = NULL;
-	unsigned fs_key = 0;
+	VkPipeline pipeline;
 	switch (src_iview->aspect_mask) {
 	case VK_IMAGE_ASPECT_COLOR_BIT: {
+		unsigned fs_key = radv_format_meta_fs_key(dest_image->vk_format);
 		unsigned dst_layout = radv_meta_dst_layout_from_layout(dest_image_layout);
-		fs_key = radv_format_meta_fs_key(dest_image->vk_format);
 
 		radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
 					      &(VkRenderPassBeginInfo) {
@@ -364,16 +353,16 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
 						       }, VK_SUBPASS_CONTENTS_INLINE);
 		switch (src_image->type) {
 		case VK_IMAGE_TYPE_1D:
-			pipeline = &device->meta_state.blit.pipeline_1d_src[fs_key];
+			pipeline = device->meta_state.blit.pipeline_1d_src[fs_key];
 			break;
 		case VK_IMAGE_TYPE_2D:
-			pipeline = &device->meta_state.blit.pipeline_2d_src[fs_key];
+			pipeline = device->meta_state.blit.pipeline_2d_src[fs_key];
 			break;
 		case VK_IMAGE_TYPE_3D:
-			pipeline = &device->meta_state.blit.pipeline_3d_src[fs_key];
+			pipeline = device->meta_state.blit.pipeline_3d_src[fs_key];
 			break;
 		default:
-			unreachable("bad VkImageType");
+			unreachable(!"bad VkImageType");
 		}
 		break;
 	}
@@ -393,16 +382,16 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
 						       }, VK_SUBPASS_CONTENTS_INLINE);
 		switch (src_image->type) {
 		case VK_IMAGE_TYPE_1D:
-			pipeline = &device->meta_state.blit.depth_only_1d_pipeline;
+			pipeline = device->meta_state.blit.depth_only_1d_pipeline;
 			break;
 		case VK_IMAGE_TYPE_2D:
-			pipeline = &device->meta_state.blit.depth_only_2d_pipeline;
+			pipeline = device->meta_state.blit.depth_only_2d_pipeline;
 			break;
 		case VK_IMAGE_TYPE_3D:
-			pipeline = &device->meta_state.blit.depth_only_3d_pipeline;
+			pipeline = device->meta_state.blit.depth_only_3d_pipeline;
 			break;
 		default:
-			unreachable("bad VkImageType");
+			unreachable(!"bad VkImageType");
 		}
 		break;
 	}
@@ -422,33 +411,25 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
 						       }, VK_SUBPASS_CONTENTS_INLINE);
 		switch (src_image->type) {
 		case VK_IMAGE_TYPE_1D:
-			pipeline = &device->meta_state.blit.stencil_only_1d_pipeline;
+			pipeline = device->meta_state.blit.stencil_only_1d_pipeline;
 			break;
 		case VK_IMAGE_TYPE_2D:
-			pipeline = &device->meta_state.blit.stencil_only_2d_pipeline;
+			pipeline = device->meta_state.blit.stencil_only_2d_pipeline;
 			break;
 		case VK_IMAGE_TYPE_3D:
-			pipeline = &device->meta_state.blit.stencil_only_3d_pipeline;
+			pipeline = device->meta_state.blit.stencil_only_3d_pipeline;
 			break;
 		default:
-			unreachable("bad VkImageType");
+			unreachable(!"bad VkImageType");
 		}
 		break;
 	}
 	default:
-		unreachable("bad VkImageType");
-	}
-
-	if (!*pipeline) {
-		VkResult ret = build_pipeline(device, src_iview->aspect_mask, translate_sampler_dim(src_image->type), fs_key, pipeline);
-		if (ret != VK_SUCCESS) {
-			cmd_buffer->record_result = ret;
-			goto fail_pipeline;
-		}
+		unreachable(!"bad VkImageType");
 	}
 
 	radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
-			     VK_PIPELINE_BIND_POINT_GRAPHICS, *pipeline);
+			     VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline);
 
 	radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS,
 			              device->meta_state.blit.pipeline_layout,
@@ -490,7 +471,6 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
 
 	radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
 
-fail_pipeline:
 	radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer));
 
 	/* At the point where we emit the draw call, all data from the
@@ -499,6 +479,8 @@ fail_pipeline:
 	/* TODO: above comment is not valid for at least descriptor sets/pools,
 	 * as we may not free them till after execution finishes. Check others. */
 
+	radv_DestroySampler(radv_device_to_handle(device), sampler,
+			    &cmd_buffer->pool->alloc);
 	radv_DestroyFramebuffer(radv_device_to_handle(device), fb,
 				&cmd_buffer->pool->alloc);
 }
@@ -537,10 +519,8 @@ void radv_CmdBlitImage(
 	RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
 	RADV_FROM_HANDLE(radv_image, src_image, srcImage);
 	RADV_FROM_HANDLE(radv_image, dest_image, destImage);
-	struct radv_device *device = cmd_buffer->device;
 	struct radv_meta_saved_state saved_state;
 	bool old_predicating;
-	VkSampler sampler;
 
 	/* From the Vulkan 1.0 spec:
 	 *
@@ -550,16 +530,6 @@ void radv_CmdBlitImage(
 	assert(src_image->info.samples == 1);
 	assert(dest_image->info.samples == 1);
 
-	radv_CreateSampler(radv_device_to_handle(device),
-			   &(VkSamplerCreateInfo) {
-				.sType = VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO,
-				.magFilter = filter,
-				.minFilter = filter,
-				.addressModeU = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
-				.addressModeV = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
-				.addressModeW = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
-			   }, &cmd_buffer->pool->alloc, &sampler);
-
 	radv_meta_save(&saved_state, cmd_buffer,
 		       RADV_META_SAVE_GRAPHICS_PIPELINE |
 		       RADV_META_SAVE_CONSTANTS |
@@ -681,7 +651,7 @@ void radv_CmdBlitImage(
 				       dest_image, &dest_iview, destImageLayout,
 				       dest_offset_0, dest_offset_1,
 				       dest_box,
-				       sampler);
+				       filter);
 		}
 	}
 
@@ -689,9 +659,6 @@ void radv_CmdBlitImage(
 	cmd_buffer->state.predicating = old_predicating;
 
 	radv_meta_restore(&saved_state, cmd_buffer);
-
-	radv_DestroySampler(radv_device_to_handle(device), sampler,
-			    &cmd_buffer->pool->alloc);
 }
 
 void
@@ -747,182 +714,34 @@ radv_device_finish_meta_blit_state(struct radv_device *device)
 					state->blit.ds_layout, &state->alloc);
 }
 
-static VkResult
-build_pipeline(struct radv_device *device,
-               VkImageAspectFlagBits aspect,
-               enum glsl_sampler_dim tex_dim,
-               unsigned fs_key,
-               VkPipeline *pipeline)
-{
-	VkResult result = VK_SUCCESS;
-
-	mtx_lock(&device->meta_state.mtx);
-
-	if (*pipeline) {
-		mtx_unlock(&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
-	struct radv_shader_module fs = {0};
-	struct radv_shader_module vs = {.nir = build_nir_vertex_shader()};
-	VkRenderPass rp;
-
-	switch(aspect) {
-	case VK_IMAGE_ASPECT_COLOR_BIT:
-		fs.nir = build_nir_copy_fragment_shader(tex_dim);
-		rp = device->meta_state.blit.render_pass[fs_key][0];
-		break;
-	case VK_IMAGE_ASPECT_DEPTH_BIT:
-		fs.nir = build_nir_copy_fragment_shader_depth(tex_dim);
-		rp = device->meta_state.blit.depth_only_rp[0];
-		break;
-	case VK_IMAGE_ASPECT_STENCIL_BIT:
-		fs.nir = build_nir_copy_fragment_shader_stencil(tex_dim);
-		rp = device->meta_state.blit.stencil_only_rp[0];
-		break;
-	default:
-		unreachable("Unhandled aspect");
-	}
-	VkPipelineVertexInputStateCreateInfo vi_create_info = {
-		.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
-		.vertexBindingDescriptionCount = 0,
-		.vertexAttributeDescriptionCount = 0,
-	};
-
-	VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
-		{
-			.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
-			.stage = VK_SHADER_STAGE_VERTEX_BIT,
-			.module = radv_shader_module_to_handle(&vs),
-			.pName = "main",
-			.pSpecializationInfo = NULL
-		}, {
-			.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
-			.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
-			.module = radv_shader_module_to_handle(&fs),
-			.pName = "main",
-			.pSpecializationInfo = NULL
-		},
-	};
-
-	VkGraphicsPipelineCreateInfo vk_pipeline_info = {
-		.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
-		.stageCount = ARRAY_SIZE(pipeline_shader_stages),
-		.pStages = pipeline_shader_stages,
-		.pVertexInputState = &vi_create_info,
-		.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
-			.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
-			.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
-			.primitiveRestartEnable = false,
-		},
-		.pViewportState = &(VkPipelineViewportStateCreateInfo) {
-			.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
-			.viewportCount = 1,
-			.scissorCount = 1,
-		},
-		.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
-			.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
-			.rasterizerDiscardEnable = false,
-			.polygonMode = VK_POLYGON_MODE_FILL,
-			.cullMode = VK_CULL_MODE_NONE,
-			.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
-		},
-		.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
-			.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
-			.rasterizationSamples = 1,
-			.sampleShadingEnable = false,
-			.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
-		},
-		.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
-			.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
-			.dynamicStateCount = 4,
-			.pDynamicStates = (VkDynamicState[]) {
-				VK_DYNAMIC_STATE_VIEWPORT,
-				VK_DYNAMIC_STATE_SCISSOR,
-				VK_DYNAMIC_STATE_LINE_WIDTH,
-				VK_DYNAMIC_STATE_BLEND_CONSTANTS,
-			},
-		},
-		.flags = 0,
-		.layout = device->meta_state.blit.pipeline_layout,
-		.renderPass = rp,
-		.subpass = 0,
-	};
-
-	switch(aspect) {
-	case VK_IMAGE_ASPECT_COLOR_BIT:
-		vk_pipeline_info.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
-			.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
-			.attachmentCount = 1,
-			.pAttachments = (VkPipelineColorBlendAttachmentState []) {
-				{ .colorWriteMask =
-				VK_COLOR_COMPONENT_A_BIT |
-				VK_COLOR_COMPONENT_R_BIT |
-				VK_COLOR_COMPONENT_G_BIT |
-				VK_COLOR_COMPONENT_B_BIT },
-			}
-		};
-		break;
-	case VK_IMAGE_ASPECT_DEPTH_BIT:
-		vk_pipeline_info.pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) {
-			.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
-			.depthTestEnable = true,
-			.depthWriteEnable = true,
-			.depthCompareOp = VK_COMPARE_OP_ALWAYS,
-		};
-		break;
-	case VK_IMAGE_ASPECT_STENCIL_BIT:
-		vk_pipeline_info.pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) {
-			.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
-			.depthTestEnable = false,
-			.depthWriteEnable = false,
-			.stencilTestEnable = true,
-			.front = {
-				.failOp = VK_STENCIL_OP_REPLACE,
-				.passOp = VK_STENCIL_OP_REPLACE,
-				.depthFailOp = VK_STENCIL_OP_REPLACE,
-				.compareOp = VK_COMPARE_OP_ALWAYS,
-				.compareMask = 0xff,
-				.writeMask = 0xff,
-				.reference = 0
-			},
-			.back = {
-				.failOp = VK_STENCIL_OP_REPLACE,
-				.passOp = VK_STENCIL_OP_REPLACE,
-				.depthFailOp = VK_STENCIL_OP_REPLACE,
-				.compareOp = VK_COMPARE_OP_ALWAYS,
-				.compareMask = 0xff,
-				.writeMask = 0xff,
-				.reference = 0
-			},
-			.depthCompareOp = VK_COMPARE_OP_ALWAYS,
-		};
-		break;
-	default:
-		unreachable("Unhandled aspect");
-	}
-
-	const struct radv_graphics_pipeline_create_info radv_pipeline_info = {
-		.use_rectlist = true
-	};
-
-	result = radv_graphics_pipeline_create(radv_device_to_handle(device),
-	                                       radv_pipeline_cache_to_handle(&device->meta_state.cache),
-	                                       &vk_pipeline_info, &radv_pipeline_info,
-	                                       &device->meta_state.alloc, pipeline);
-	ralloc_free(vs.nir);
-	ralloc_free(fs.nir);
-	mtx_unlock(&device->meta_state.mtx);
-	return result;
-}
+static VkFormat pipeline_formats[] = {
+   VK_FORMAT_R8G8B8A8_UNORM,
+   VK_FORMAT_R8G8B8A8_UINT,
+   VK_FORMAT_R8G8B8A8_SINT,
+   VK_FORMAT_A2R10G10B10_UINT_PACK32,
+   VK_FORMAT_A2R10G10B10_SINT_PACK32,
+   VK_FORMAT_R16G16B16A16_UNORM,
+   VK_FORMAT_R16G16B16A16_SNORM,
+   VK_FORMAT_R16G16B16A16_UINT,
+   VK_FORMAT_R16G16B16A16_SINT,
+   VK_FORMAT_R32_SFLOAT,
+   VK_FORMAT_R32G32_SFLOAT,
+   VK_FORMAT_R32G32B32A32_SFLOAT
+};
 
 static VkResult
-radv_device_init_meta_blit_color(struct radv_device *device, bool on_demand)
+radv_device_init_meta_blit_color(struct radv_device *device,
+				 struct radv_shader_module *vs)
 {
+	struct radv_shader_module fs_1d = {0}, fs_2d = {0}, fs_3d = {0};
 	VkResult result;
 
-	for (unsigned i = 0; i < NUM_META_FS_KEYS; ++i) {
-		unsigned key = radv_format_meta_fs_key(radv_fs_key_format_exemplars[i]);
+	fs_1d.nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_1D);
+	fs_2d.nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_2D);
+	fs_3d.nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_3D);
+
+	for (unsigned i = 0; i < ARRAY_SIZE(pipeline_formats); ++i) {
+		unsigned key = radv_format_meta_fs_key(pipeline_formats[i]);
 		for(unsigned j = 0; j < RADV_META_DST_LAYOUT_COUNT; ++j) {
 			VkImageLayout layout = radv_meta_dst_layout_to_layout(j);
 			result = radv_CreateRenderPass(radv_device_to_handle(device),
@@ -930,7 +749,7 @@ radv_device_init_meta_blit_color(struct radv_device *device, bool on_demand)
 							.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
 								.attachmentCount = 1,
 								.pAttachments = &(VkAttachmentDescription) {
-								.format = radv_fs_key_format_exemplars[i],
+								.format = pipeline_formats[i],
 								.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
 								.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
 								.initialLayout = layout,
@@ -959,18 +778,108 @@ radv_device_init_meta_blit_color(struct radv_device *device, bool on_demand)
 				goto fail;
 		}
 
-		if (on_demand)
-			continue;
+		VkPipelineVertexInputStateCreateInfo vi_create_info = {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
+			.vertexBindingDescriptionCount = 0,
+			.vertexAttributeDescriptionCount = 0,
+		};
 
-		result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_1D, key, &device->meta_state.blit.pipeline_1d_src[key]);
+		VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
+			{
+				.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
+				.stage = VK_SHADER_STAGE_VERTEX_BIT,
+				.module = radv_shader_module_to_handle(vs),
+				.pName = "main",
+				.pSpecializationInfo = NULL
+			}, {
+				.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
+				.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
+				.module = VK_NULL_HANDLE, /* TEMPLATE VALUE! FILL ME IN! */
+				.pName = "main",
+				.pSpecializationInfo = NULL
+			},
+		};
+
+		const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
+			.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
+			.stageCount = ARRAY_SIZE(pipeline_shader_stages),
+			.pStages = pipeline_shader_stages,
+			.pVertexInputState = &vi_create_info,
+			.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
+				.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
+				.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
+				.primitiveRestartEnable = false,
+			},
+			.pViewportState = &(VkPipelineViewportStateCreateInfo) {
+				.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
+				.viewportCount = 1,
+				.scissorCount = 1,
+			},
+			.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
+				.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
+				.rasterizerDiscardEnable = false,
+				.polygonMode = VK_POLYGON_MODE_FILL,
+				.cullMode = VK_CULL_MODE_NONE,
+				.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
+			},
+			.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
+				.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
+				.rasterizationSamples = 1,
+				.sampleShadingEnable = false,
+				.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
+			},
+			.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
+				.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
+				.attachmentCount = 1,
+				.pAttachments = (VkPipelineColorBlendAttachmentState []) {
+					{ .colorWriteMask =
+					VK_COLOR_COMPONENT_A_BIT |
+					VK_COLOR_COMPONENT_R_BIT |
+					VK_COLOR_COMPONENT_G_BIT |
+					VK_COLOR_COMPONENT_B_BIT },
+				}
+			},
+			.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
+				.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
+				.dynamicStateCount = 4,
+				.pDynamicStates = (VkDynamicState[]) {
+					VK_DYNAMIC_STATE_VIEWPORT,
+					VK_DYNAMIC_STATE_SCISSOR,
+					VK_DYNAMIC_STATE_LINE_WIDTH,
+					VK_DYNAMIC_STATE_BLEND_CONSTANTS,
+				},
+			},
+			.flags = 0,
+			.layout = device->meta_state.blit.pipeline_layout,
+			.renderPass = device->meta_state.blit.render_pass[key][0],
+			.subpass = 0,
+		};
+
+		const struct radv_graphics_pipeline_create_info radv_pipeline_info = {
+			.use_rectlist = true
+		};
+
+		pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_1d);
+		result = radv_graphics_pipeline_create(radv_device_to_handle(device),
+						radv_pipeline_cache_to_handle(&device->meta_state.cache),
+						&vk_pipeline_info, &radv_pipeline_info,
+						&device->meta_state.alloc, &device->meta_state.blit.pipeline_1d_src[key]);
 		if (result != VK_SUCCESS)
 			goto fail;
 
-		result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_2D, key, &device->meta_state.blit.pipeline_2d_src[key]);
+		pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_2d);
+		result = radv_graphics_pipeline_create(radv_device_to_handle(device),
+						radv_pipeline_cache_to_handle(&device->meta_state.cache),
+						&vk_pipeline_info, &radv_pipeline_info,
+						&device->meta_state.alloc, &device->meta_state.blit.pipeline_2d_src[key]);
 		if (result != VK_SUCCESS)
 			goto fail;
 
-		result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_3D, key, &device->meta_state.blit.pipeline_3d_src[key]);
+		pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_3d);
+		result = radv_graphics_pipeline_create(radv_device_to_handle(device),
+						radv_pipeline_cache_to_handle(&device->meta_state.cache),
+						&vk_pipeline_info, &radv_pipeline_info,
+						&device->meta_state.alloc, &device->meta_state.blit.pipeline_3d_src[key]);
 		if (result != VK_SUCCESS)
 			goto fail;
 
@@ -978,14 +887,23 @@ radv_device_init_meta_blit_color(struct radv_device *device, bool on_demand)
 
 	result = VK_SUCCESS;
 fail:
+	ralloc_free(fs_1d.nir);
+	ralloc_free(fs_2d.nir);
+	ralloc_free(fs_3d.nir);
 	return result;
 }
 
 static VkResult
-radv_device_init_meta_blit_depth(struct radv_device *device, bool on_demand)
+radv_device_init_meta_blit_depth(struct radv_device *device,
+				 struct radv_shader_module *vs)
 {
+	struct radv_shader_module fs_1d = {0}, fs_2d = {0}, fs_3d = {0};
 	VkResult result;
 
+	fs_1d.nir = build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_1D);
+	fs_2d.nir = build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_2D);
+	fs_3d.nir = build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_3D);
+
 	for (enum radv_blit_ds_layout ds_layout = RADV_BLIT_DS_LAYOUT_TILE_ENABLE; ds_layout < RADV_BLIT_DS_LAYOUT_COUNT; ds_layout++) {
 		VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout);
 		result = radv_CreateRenderPass(radv_device_to_handle(device),
@@ -1019,30 +937,134 @@ radv_device_init_meta_blit_depth(struct radv_device *device, bool on_demand)
 			goto fail;
 	}
 
-	if (on_demand)
-		return VK_SUCCESS;
+	VkPipelineVertexInputStateCreateInfo vi_create_info = {
+		.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
+		.vertexBindingDescriptionCount = 0,
+		.vertexAttributeDescriptionCount = 0,
+	};
 
-	result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_1D, 0, &device->meta_state.blit.depth_only_1d_pipeline);
+	VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
+		{
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
+			.stage = VK_SHADER_STAGE_VERTEX_BIT,
+			.module = radv_shader_module_to_handle(vs),
+			.pName = "main",
+			.pSpecializationInfo = NULL
+		}, {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
+			.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
+			.module = VK_NULL_HANDLE, /* TEMPLATE VALUE! FILL ME IN! */
+			.pName = "main",
+			.pSpecializationInfo = NULL
+		},
+	};
+
+	const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
+		.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
+		.stageCount = ARRAY_SIZE(pipeline_shader_stages),
+		.pStages = pipeline_shader_stages,
+		.pVertexInputState = &vi_create_info,
+		.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
+			.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
+			.primitiveRestartEnable = false,
+		},
+		.pViewportState = &(VkPipelineViewportStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
+			.viewportCount = 1,
+			.scissorCount = 1,
+		},
+		.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
+			.rasterizerDiscardEnable = false,
+			.polygonMode = VK_POLYGON_MODE_FILL,
+			.cullMode = VK_CULL_MODE_NONE,
+			.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
+		},
+		.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
+			.rasterizationSamples = 1,
+			.sampleShadingEnable = false,
+			.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
+		},
+		.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
+			.attachmentCount = 0,
+			.pAttachments = NULL,
+		},
+		.pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
+			.depthTestEnable = true,
+			.depthWriteEnable = true,
+			.depthCompareOp = VK_COMPARE_OP_ALWAYS,
+		},
+		.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
+			.dynamicStateCount = 9,
+			.pDynamicStates = (VkDynamicState[]) {
+				VK_DYNAMIC_STATE_VIEWPORT,
+				VK_DYNAMIC_STATE_SCISSOR,
+				VK_DYNAMIC_STATE_LINE_WIDTH,
+				VK_DYNAMIC_STATE_DEPTH_BIAS,
+				VK_DYNAMIC_STATE_BLEND_CONSTANTS,
+				VK_DYNAMIC_STATE_DEPTH_BOUNDS,
+				VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
+				VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
+				VK_DYNAMIC_STATE_STENCIL_REFERENCE,
+			},
+		},
+		.flags = 0,
+		.layout = device->meta_state.blit.pipeline_layout,
+		.renderPass = device->meta_state.blit.depth_only_rp[0],
+		.subpass = 0,
+	};
+
+	const struct radv_graphics_pipeline_create_info radv_pipeline_info = {
+		.use_rectlist = true
+	};
+
+	pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_1d);
+	result = radv_graphics_pipeline_create(radv_device_to_handle(device),
+					       radv_pipeline_cache_to_handle(&device->meta_state.cache),
+					       &vk_pipeline_info, &radv_pipeline_info,
+					       &device->meta_state.alloc, &device->meta_state.blit.depth_only_1d_pipeline);
 	if (result != VK_SUCCESS)
 		goto fail;
 
-	result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_2D, 0, &device->meta_state.blit.depth_only_2d_pipeline);
+	pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_2d);
+	result = radv_graphics_pipeline_create(radv_device_to_handle(device),
+					       radv_pipeline_cache_to_handle(&device->meta_state.cache),
+					       &vk_pipeline_info, &radv_pipeline_info,
+					       &device->meta_state.alloc, &device->meta_state.blit.depth_only_2d_pipeline);
 	if (result != VK_SUCCESS)
 		goto fail;
 
-	result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_3D, 0, &device->meta_state.blit.depth_only_3d_pipeline);
+	pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_3d);
+	result = radv_graphics_pipeline_create(radv_device_to_handle(device),
+					       radv_pipeline_cache_to_handle(&device->meta_state.cache),
+					       &vk_pipeline_info, &radv_pipeline_info,
+					       &device->meta_state.alloc, &device->meta_state.blit.depth_only_3d_pipeline);
 	if (result != VK_SUCCESS)
 		goto fail;
 
 fail:
+	ralloc_free(fs_1d.nir);
+	ralloc_free(fs_2d.nir);
+	ralloc_free(fs_3d.nir);
 	return result;
 }
 
 static VkResult
-radv_device_init_meta_blit_stencil(struct radv_device *device, bool on_demand)
+radv_device_init_meta_blit_stencil(struct radv_device *device,
+				   struct radv_shader_module *vs)
 {
+	struct radv_shader_module fs_1d = {0}, fs_2d = {0}, fs_3d = {0};
 	VkResult result;
 
+	fs_1d.nir = build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_1D);
+	fs_2d.nir = build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_2D);
+	fs_3d.nir = build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_3D);
+
 	for (enum radv_blit_ds_layout ds_layout = RADV_BLIT_DS_LAYOUT_TILE_ENABLE; ds_layout < RADV_BLIT_DS_LAYOUT_COUNT; ds_layout++) {
 		VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout);
 		result = radv_CreateRenderPass(radv_device_to_handle(device),
@@ -1076,30 +1098,145 @@ radv_device_init_meta_blit_stencil(struct radv_device *device, bool on_demand)
 	if (result != VK_SUCCESS)
 		goto fail;
 
-	if (on_demand)
-		return VK_SUCCESS;
+	VkPipelineVertexInputStateCreateInfo vi_create_info = {
+		.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
+		.vertexBindingDescriptionCount = 0,
+		.vertexAttributeDescriptionCount = 0,
+	};
 
-	result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_1D, 0, &device->meta_state.blit.stencil_only_1d_pipeline);
+	VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
+		{
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
+			.stage = VK_SHADER_STAGE_VERTEX_BIT,
+			.module = radv_shader_module_to_handle(vs),
+			.pName = "main",
+			.pSpecializationInfo = NULL
+		}, {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
+			.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
+			.module = VK_NULL_HANDLE, /* TEMPLATE VALUE! FILL ME IN! */
+			.pName = "main",
+			.pSpecializationInfo = NULL
+		},
+	};
+
+	const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
+		.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
+		.stageCount = ARRAY_SIZE(pipeline_shader_stages),
+		.pStages = pipeline_shader_stages,
+		.pVertexInputState = &vi_create_info,
+		.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
+			.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
+			.primitiveRestartEnable = false,
+		},
+		.pViewportState = &(VkPipelineViewportStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
+			.viewportCount = 1,
+			.scissorCount = 1,
+		},
+		.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
+			.rasterizerDiscardEnable = false,
+			.polygonMode = VK_POLYGON_MODE_FILL,
+			.cullMode = VK_CULL_MODE_NONE,
+			.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
+		},
+		.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
+			.rasterizationSamples = 1,
+			.sampleShadingEnable = false,
+			.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
+		},
+		.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
+			.attachmentCount = 0,
+			.pAttachments = NULL,
+		},
+		.pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
+			.depthTestEnable = false,
+			.depthWriteEnable = false,
+			.stencilTestEnable = true,
+			.front = {
+				.failOp = VK_STENCIL_OP_REPLACE,
+				.passOp = VK_STENCIL_OP_REPLACE,
+				.depthFailOp = VK_STENCIL_OP_REPLACE,
+				.compareOp = VK_COMPARE_OP_ALWAYS,
+				.compareMask = 0xff,
+				.writeMask = 0xff,
+				.reference = 0
+			},
+			.back = {
+				.failOp = VK_STENCIL_OP_REPLACE,
+				.passOp = VK_STENCIL_OP_REPLACE,
+				.depthFailOp = VK_STENCIL_OP_REPLACE,
+				.compareOp = VK_COMPARE_OP_ALWAYS,
+				.compareMask = 0xff,
+				.writeMask = 0xff,
+				.reference = 0
+			},
+			.depthCompareOp = VK_COMPARE_OP_ALWAYS,
+		},
+		.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
+			.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
+			.dynamicStateCount = 6,
+			.pDynamicStates = (VkDynamicState[]) {
+				VK_DYNAMIC_STATE_VIEWPORT,
+				VK_DYNAMIC_STATE_SCISSOR,
+				VK_DYNAMIC_STATE_LINE_WIDTH,
+				VK_DYNAMIC_STATE_DEPTH_BIAS,
+				VK_DYNAMIC_STATE_BLEND_CONSTANTS,
+				VK_DYNAMIC_STATE_DEPTH_BOUNDS,
+			},
+		},
+		.flags = 0,
+		.layout = device->meta_state.blit.pipeline_layout,
+		.renderPass = device->meta_state.blit.stencil_only_rp[0],
+		.subpass = 0,
+	};
+
+	const struct radv_graphics_pipeline_create_info radv_pipeline_info = {
+		.use_rectlist = true
+	};
+
+	pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_1d);
+	result = radv_graphics_pipeline_create(radv_device_to_handle(device),
+					       radv_pipeline_cache_to_handle(&device->meta_state.cache),
+					       &vk_pipeline_info, &radv_pipeline_info,
+					       &device->meta_state.alloc, &device->meta_state.blit.stencil_only_1d_pipeline);
 	if (result != VK_SUCCESS)
 		goto fail;
 
-	result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_2D, 0, &device->meta_state.blit.stencil_only_2d_pipeline);
+	pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_2d);
+	result = radv_graphics_pipeline_create(radv_device_to_handle(device),
+					       radv_pipeline_cache_to_handle(&device->meta_state.cache),
+					       &vk_pipeline_info, &radv_pipeline_info,
+					       &device->meta_state.alloc, &device->meta_state.blit.stencil_only_2d_pipeline);
 	if (result != VK_SUCCESS)
 		goto fail;
 
-	result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_3D, 0, &device->meta_state.blit.stencil_only_3d_pipeline);
+	pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_3d);
+	result = radv_graphics_pipeline_create(radv_device_to_handle(device),
+					       radv_pipeline_cache_to_handle(&device->meta_state.cache),
+					       &vk_pipeline_info, &radv_pipeline_info,
+					       &device->meta_state.alloc, &device->meta_state.blit.stencil_only_3d_pipeline);
 	if (result != VK_SUCCESS)
 		goto fail;
 
 
 fail:
+	ralloc_free(fs_1d.nir);
+	ralloc_free(fs_2d.nir);
+	ralloc_free(fs_3d.nir);
 	return result;
 }
 
 VkResult
-radv_device_init_meta_blit_state(struct radv_device *device, bool on_demand)
+radv_device_init_meta_blit_state(struct radv_device *device)
 {
 	VkResult result;
+	struct radv_shader_module vs = {0};
 
 	VkDescriptorSetLayoutCreateInfo ds_layout_info = {
 		.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
@@ -1136,17 +1273,20 @@ radv_device_init_meta_blit_state(struct radv_device *device, bool on_demand)
 	if (result != VK_SUCCESS)
 		goto fail;
 
-	result = radv_device_init_meta_blit_color(device, on_demand);
+	vs.nir = build_nir_vertex_shader();
+
+	result = radv_device_init_meta_blit_color(device, &vs);
 	if (result != VK_SUCCESS)
 		goto fail;
 
-	result = radv_device_init_meta_blit_depth(device, on_demand);
+	result = radv_device_init_meta_blit_depth(device, &vs);
 	if (result != VK_SUCCESS)
 		goto fail;
 
-	result = radv_device_init_meta_blit_stencil(device, on_demand);
+	result = radv_device_init_meta_blit_stencil(device, &vs);
 
 fail:
+	ralloc_free(vs.nir);
 	if (result != VK_SUCCESS)
 		radv_device_finish_meta_blit_state(device);
 	return result;

src/amd/vulkan/radv_meta_blit2d.c

@@ -35,22 +35,6 @@ enum blit2d_src_type {
 	BLIT2D_NUM_SRC_TYPES,
 };
 
-static VkResult
-blit2d_init_color_pipeline(struct radv_device *device,
-			   enum blit2d_src_type src_type,
-			   VkFormat format,
-			   uint32_t log2_samples);
-
-static VkResult
-blit2d_init_depth_only_pipeline(struct radv_device *device,
-				enum blit2d_src_type src_type,
-				uint32_t log2_samples);
-
-static VkResult
-blit2d_init_stencil_only_pipeline(struct radv_device *device,
-				  enum blit2d_src_type src_type,
-				  uint32_t log2_samples);
-
 static void
 create_iview(struct radv_cmd_buffer *cmd_buffer,
              struct radv_meta_blit2d_surf *surf,
@@ -284,14 +268,6 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
 				unsigned fs_key = radv_format_meta_fs_key(dst_temps.iview.vk_format);
 				unsigned dst_layout = radv_meta_dst_layout_from_layout(dst->current_layout);
 
-				if (device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key] == VK_NULL_HANDLE) {
-					VkResult ret = blit2d_init_color_pipeline(device, src_type, radv_fs_key_format_exemplars[fs_key], log2_samples);
-					if (ret != VK_SUCCESS) {
-						cmd_buffer->record_result = ret;
-						goto fail_pipeline;
-					}
-				}
-
 				radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
 							&(VkRenderPassBeginInfo) {
 								.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
@@ -309,15 +285,6 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
 				bind_pipeline(cmd_buffer, src_type, fs_key, log2_samples);
 			} else if (aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) {
 				enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dst->current_layout);
-
-				if (device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type] == VK_NULL_HANDLE) {
-					VkResult ret = blit2d_init_depth_only_pipeline(device, src_type, log2_samples);
-					if (ret != VK_SUCCESS) {
-						cmd_buffer->record_result = ret;
-						goto fail_pipeline;
-					}
-				}
-
 				radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
 							&(VkRenderPassBeginInfo) {
 								.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
@@ -336,15 +303,6 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
 
 			} else if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {
 				enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dst->current_layout);
-
-				if (device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type] == VK_NULL_HANDLE) {
-					VkResult ret = blit2d_init_stencil_only_pipeline(device, src_type, log2_samples);
-					if (ret != VK_SUCCESS) {
-						cmd_buffer->record_result = ret;
-						goto fail_pipeline;
-					}
-				}
-
 				radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
 							&(VkRenderPassBeginInfo) {
 								.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
@@ -379,10 +337,26 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
 
 
 
-			radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
+			if (log2_samples > 0) {
+				for (uint32_t sample = 0; sample < src_img->image->info.samples; sample++) {
+					uint32_t sample_mask = 1 << sample;
+					radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
+							      device->meta_state.blit2d[log2_samples].p_layouts[src_type],
+							      VK_SHADER_STAGE_FRAGMENT_BIT, 20, 4,
+							      &sample);
+
+					radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
+							      device->meta_state.blit2d[log2_samples].p_layouts[src_type],
+							      VK_SHADER_STAGE_FRAGMENT_BIT, 24, 4,
+							      &sample_mask);
+
+					radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
+				}
+			}
+			else
+				radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
 			radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer));
 
-fail_pipeline:
 			/* At the point where we emit the draw call, all data from the
 			* descriptor sets, etc. has been used.  We are free to delete it.
 			*/
@@ -503,7 +477,10 @@ build_nir_texel_fetch(struct nir_builder *b, struct radv_device *device,
 		tex_pos_3d = nir_vec(b, chans, 3);
 	}
 	if (is_multisampled) {
-		sample_idx = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_sample_id);
+		sample_idx = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_push_constant);
+		nir_intrinsic_set_base(sample_idx, 20);
+		nir_intrinsic_set_range(sample_idx, 4);
+		sample_idx->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
 		sample_idx->num_components = 1;
 		nir_ssa_dest_init(&sample_idx->instr, &sample_idx->dest, 1, 32, "sample_idx");
 		nir_builder_instr_insert(b, &sample_idx->instr);
@@ -558,6 +535,7 @@ build_nir_buffer_fetch(struct nir_builder *b, struct radv_device *device,
 	nir_ssa_def *pos_y = nir_channel(b, tex_pos, 1);
 	pos_y = nir_imul(b, pos_y, &width->dest.ssa);
 	pos_x = nir_iadd(b, pos_x, pos_y);
+	//pos_x = nir_iadd(b, pos_x, nir_imm_int(b, 100000));
 
 	nir_ssa_def *tex_deref = &nir_build_deref_var(b, sampler)->dest.ssa;
 
@@ -584,6 +562,27 @@ static const VkPipelineVertexInputStateCreateInfo normal_vi_create_info = {
 	.vertexAttributeDescriptionCount = 0,
 };
 
+static void
+build_nir_store_sample_mask(struct nir_builder *b)
+{
+	nir_intrinsic_instr *sample_mask = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_push_constant);
+	nir_intrinsic_set_base(sample_mask, 24);
+	nir_intrinsic_set_range(sample_mask, 4);
+	sample_mask->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
+	sample_mask->num_components = 1;
+	nir_ssa_dest_init(&sample_mask->instr, &sample_mask->dest, 1, 32, "sample_mask");
+	nir_builder_instr_insert(b, &sample_mask->instr);
+
+	const struct glsl_type *sample_mask_out_type = glsl_uint_type();
+
+	nir_variable *sample_mask_out =
+		nir_variable_create(b->shader, nir_var_shader_out,
+				    sample_mask_out_type, "sample_mask_out");
+	sample_mask_out->data.location = FRAG_RESULT_SAMPLE_MASK;
+
+	nir_store_var(b, sample_mask_out, &sample_mask->dest.ssa, 0x1);
+}
+
 static nir_shader *
 build_nir_copy_fragment_shader(struct radv_device *device,
                                texel_fetch_build_func txf_func, const char* name, bool is_3d,
@@ -604,6 +603,10 @@ build_nir_copy_fragment_shader(struct radv_device *device,
 						      vec4, "f_color");
 	color_out->data.location = FRAG_RESULT_DATA0;
 
+	if (is_multisampled) {
+		build_nir_store_sample_mask(&b);
+	}
+
 	nir_ssa_def *pos_int = nir_f2i32(&b, nir_load_var(&b, tex_pos_in));
 	nir_ssa_def *tex_pos = nir_channels(&b, pos_int, 0x3);
 
@@ -633,6 +636,10 @@ build_nir_copy_fragment_shader_depth(struct radv_device *device,
 						      vec4, "f_color");
 	color_out->data.location = FRAG_RESULT_DEPTH;
 
+	if (is_multisampled) {
+		build_nir_store_sample_mask(&b);
+	}
+
 	nir_ssa_def *pos_int = nir_f2i32(&b, nir_load_var(&b, tex_pos_in));
 	nir_ssa_def *tex_pos = nir_channels(&b, pos_int, 0x3);
 
@@ -662,6 +669,10 @@ build_nir_copy_fragment_shader_stencil(struct radv_device *device,
 						      vec4, "f_color");
 	color_out->data.location = FRAG_RESULT_STENCIL;
 
+	if (is_multisampled) {
+		build_nir_store_sample_mask(&b);
+	}
+
 	nir_ssa_def *pos_int = nir_f2i32(&b, nir_load_var(&b, tex_pos_in));
 	nir_ssa_def *tex_pos = nir_channels(&b, pos_int, 0x3);
 
@@ -726,12 +737,6 @@ blit2d_init_color_pipeline(struct radv_device *device,
 	unsigned fs_key = radv_format_meta_fs_key(format);
 	const char *name;
 
-	mtx_lock(&device->meta_state.mtx);
-	if (device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key]) {
-		mtx_unlock(&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
 	texel_fetch_build_func src_func;
 	switch(src_type) {
 	case BLIT2D_SRC_TYPE_IMAGE:
@@ -840,8 +845,7 @@ blit2d_init_color_pipeline(struct radv_device *device,
 		.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
 			.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
 			.rasterizationSamples = 1 << log2_samples,
-			.sampleShadingEnable = log2_samples > 1,
-			.minSampleShading = 1.0,
+			.sampleShadingEnable = false,
 			.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
 		},
 		.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
@@ -890,7 +894,6 @@ blit2d_init_color_pipeline(struct radv_device *device,
 	ralloc_free(vs.nir);
 	ralloc_free(fs.nir);
 
-	mtx_unlock(&device->meta_state.mtx);
 	return result;
 }
 
@@ -902,12 +905,6 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
 	VkResult result;
 	const char *name;
 
-	mtx_lock(&device->meta_state.mtx);
-	if (device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type]) {
-		mtx_unlock(&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
 	texel_fetch_build_func src_func;
 	switch(src_type) {
 	case BLIT2D_SRC_TYPE_IMAGE:
@@ -1060,7 +1057,6 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
 	ralloc_free(vs.nir);
 	ralloc_free(fs.nir);
 
-	mtx_unlock(&device->meta_state.mtx);
 	return result;
 }
 
@@ -1072,12 +1068,6 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
 	VkResult result;
 	const char *name;
 
-	mtx_lock(&device->meta_state.mtx);
-	if (device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type]) {
-		mtx_unlock(&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
 	texel_fetch_build_func src_func;
 	switch(src_type) {
 	case BLIT2D_SRC_TYPE_IMAGE:
@@ -1246,10 +1236,24 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
 	ralloc_free(vs.nir);
 	ralloc_free(fs.nir);
 
-	mtx_unlock(&device->meta_state.mtx);
 	return result;
 }
 
+static VkFormat pipeline_formats[] = {
+   VK_FORMAT_R8G8B8A8_UNORM,
+   VK_FORMAT_R8G8B8A8_UINT,
+   VK_FORMAT_R8G8B8A8_SINT,
+   VK_FORMAT_A2R10G10B10_UINT_PACK32,
+   VK_FORMAT_A2R10G10B10_SINT_PACK32,
+   VK_FORMAT_R16G16B16A16_UNORM,
+   VK_FORMAT_R16G16B16A16_SNORM,
+   VK_FORMAT_R16G16B16A16_UINT,
+   VK_FORMAT_R16G16B16A16_SINT,
+   VK_FORMAT_R32_SFLOAT,
+   VK_FORMAT_R32G32_SFLOAT,
+   VK_FORMAT_R32G32B32A32_SFLOAT
+};
+
 static VkResult
 meta_blit2d_create_pipe_layout(struct radv_device *device,
 			       int idx,
@@ -1259,7 +1263,7 @@ meta_blit2d_create_pipe_layout(struct radv_device *device,
 	VkDescriptorType desc_type = (idx == BLIT2D_SRC_TYPE_BUFFER) ? VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER : VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE;
 	const VkPushConstantRange push_constant_ranges[] = {
 		{VK_SHADER_STAGE_VERTEX_BIT, 0, 16},
-		{VK_SHADER_STAGE_FRAGMENT_BIT, 16, 4},
+		{VK_SHADER_STAGE_FRAGMENT_BIT, 16, 12},
 	};
 	int num_push_constant_range = (idx != BLIT2D_SRC_TYPE_IMAGE || log2_samples > 0) ? 2 : 1;
 
@@ -1298,7 +1302,7 @@ fail:
 }
 
 VkResult
-radv_device_init_meta_blit2d_state(struct radv_device *device, bool on_demand)
+radv_device_init_meta_blit2d_state(struct radv_device *device)
 {
 	VkResult result;
 	bool create_3d = device->physical_device->rad_info.chip_class >= GFX9;
@@ -1316,11 +1320,8 @@ radv_device_init_meta_blit2d_state(struct radv_device *device, bool on_demand)
 			if (result != VK_SUCCESS)
 				goto fail;
 
-			if (on_demand)
-				continue;
-
-			for (unsigned j = 0; j < NUM_META_FS_KEYS; ++j) {
-				result = blit2d_init_color_pipeline(device, src, radv_fs_key_format_exemplars[j], log2_samples);
+			for (unsigned j = 0; j < ARRAY_SIZE(pipeline_formats); ++j) {
+				result = blit2d_init_color_pipeline(device, src, pipeline_formats[j], log2_samples);
 				if (result != VK_SUCCESS)
 					goto fail;
 			}

src/amd/vulkan/radv_meta_buffer.c

@@ -513,7 +513,7 @@ void radv_CmdUpdateBuffer(
 	if (!dataSize)
 		return;
 
-	if (dataSize < RADV_BUFFER_UPDATE_THRESHOLD) {
+	if (dataSize < RADV_BUFFER_OPS_CS_THRESHOLD) {
 		si_emit_cache_flush(cmd_buffer);
 
 		radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, dst_buffer->bo);

src/amd/vulkan/radv_meta_clear.c

@@ -200,13 +200,7 @@ create_color_renderpass(struct radv_device *device,
 			uint32_t samples,
 			VkRenderPass *pass)
 {
-	mtx_lock(&device->meta_state.mtx);
-	if (*pass) {
-		mtx_unlock (&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
-	VkResult result = radv_CreateRenderPass(radv_device_to_handle(device),
+	return radv_CreateRenderPass(radv_device_to_handle(device),
 				       &(VkRenderPassCreateInfo) {
 					       .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
 						       .attachmentCount = 1,
@@ -237,8 +231,6 @@ create_color_renderpass(struct radv_device *device,
 					       },
 								.dependencyCount = 0,
 									 }, &device->meta_state.alloc, pass);
-	mtx_unlock(&device->meta_state.mtx);
-	return result;
 }
 
 static VkResult
@@ -251,13 +243,6 @@ create_color_pipeline(struct radv_device *device,
 	struct nir_shader *vs_nir;
 	struct nir_shader *fs_nir;
 	VkResult result;
-
-	mtx_lock(&device->meta_state.mtx);
-	if (*pipeline) {
-		mtx_unlock(&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
 	build_color_shaders(&vs_nir, &fs_nir, frag_output);
 
 	const VkPipelineVertexInputStateCreateInfo vi_state = {
@@ -299,7 +284,6 @@ create_color_pipeline(struct radv_device *device,
 				 device->meta_state.clear_color_p_layout,
 				 &extra, &device->meta_state.alloc, pipeline);
 
-	mtx_unlock(&device->meta_state.mtx);
 	return result;
 }
 
@@ -365,26 +349,6 @@ emit_color_clear(struct radv_cmd_buffer *cmd_buffer,
 		return;
 	}
 
-	if (device->meta_state.clear[samples_log2].render_pass[fs_key] == VK_NULL_HANDLE) {
-		VkResult ret = create_color_renderpass(device, radv_fs_key_format_exemplars[fs_key],
-		                                       samples,
-		                                       &device->meta_state.clear[samples_log2].render_pass[fs_key]);
-		if (ret != VK_SUCCESS) {
-			cmd_buffer->record_result = ret;
-			return;
-		}
-	}
-
-	if (device->meta_state.clear[samples_log2].color_pipelines[fs_key] == VK_NULL_HANDLE) {
-		VkResult ret = create_color_pipeline(device, samples, 0,
-		                                     &device->meta_state.clear[samples_log2].color_pipelines[fs_key],
-		                                     device->meta_state.clear[samples_log2].render_pass[fs_key]);
-		if (ret != VK_SUCCESS) {
-			cmd_buffer->record_result = ret;
-			return;
-		}
-	}
-
 	pipeline = device->meta_state.clear[samples_log2].color_pipelines[fs_key];
 	if (!pipeline) {
 		radv_finishme("color clears incomplete");
@@ -485,13 +449,7 @@ create_depthstencil_renderpass(struct radv_device *device,
 			       uint32_t samples,
 			       VkRenderPass *render_pass)
 {
-	mtx_lock(&device->meta_state.mtx);
-	if (*render_pass) {
-		mtx_unlock(&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
-	VkResult result = radv_CreateRenderPass(radv_device_to_handle(device),
+	return radv_CreateRenderPass(radv_device_to_handle(device),
 				       &(VkRenderPassCreateInfo) {
 					       .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
 						       .attachmentCount = 1,
@@ -519,8 +477,6 @@ create_depthstencil_renderpass(struct radv_device *device,
 					       },
 								.dependencyCount = 0,
 									 }, &device->meta_state.alloc, render_pass);
-	mtx_unlock(&device->meta_state.mtx);
-	return result;
 }
 
 static VkResult
@@ -533,13 +489,6 @@ create_depthstencil_pipeline(struct radv_device *device,
 {
 	struct nir_shader *vs_nir, *fs_nir;
 	VkResult result;
-
-	mtx_lock(&device->meta_state.mtx);
-	if (*pipeline) {
-		mtx_unlock(&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
 	build_depthstencil_shader(&vs_nir, &fs_nir);
 
 	const VkPipelineVertexInputStateCreateInfo vi_state = {
@@ -587,8 +536,6 @@ create_depthstencil_pipeline(struct radv_device *device,
 				 samples, vs_nir, fs_nir, &vi_state, &ds_state, &cb_state,
 				 device->meta_state.clear_depth_p_layout,
 				 &extra, &device->meta_state.alloc, pipeline);
-
-	mtx_unlock(&device->meta_state.mtx);
 	return result;
 }
 
@@ -632,7 +579,6 @@ pick_depthstencil_pipeline(struct radv_cmd_buffer *cmd_buffer,
 {
 	bool fast = depth_view_can_fast_clear(cmd_buffer, iview, aspects, layout, clear_rect, clear_value);
 	int index = DEPTH_CLEAR_SLOW;
-	VkPipeline *pipeline;
 
 	if (fast) {
 		/* we don't know the previous clear values, so we always have
@@ -642,36 +588,13 @@ pick_depthstencil_pipeline(struct radv_cmd_buffer *cmd_buffer,
 
 	switch (aspects) {
 	case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
-		pipeline = &meta_state->clear[samples_log2].depthstencil_pipeline[index];
-		break;
+		return meta_state->clear[samples_log2].depthstencil_pipeline[index];
 	case VK_IMAGE_ASPECT_DEPTH_BIT:
-		pipeline = &meta_state->clear[samples_log2].depth_only_pipeline[index];
-		break;
+		return meta_state->clear[samples_log2].depth_only_pipeline[index];
 	case VK_IMAGE_ASPECT_STENCIL_BIT:
-		pipeline = &meta_state->clear[samples_log2].stencil_only_pipeline[index];
-		break;
-	default:
-		unreachable("expected depth or stencil aspect");
+		return meta_state->clear[samples_log2].stencil_only_pipeline[index];
 	}
-
-	if (cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp == VK_NULL_HANDLE) {
-		VkResult ret = create_depthstencil_renderpass(cmd_buffer->device, 1u << samples_log2,
-		                                              &cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp);
-		if (ret != VK_SUCCESS) {
-			cmd_buffer->record_result = ret;
-			return VK_NULL_HANDLE;
-		}
-	}
-
-	if (*pipeline == VK_NULL_HANDLE) {
-		VkResult ret = create_depthstencil_pipeline(cmd_buffer->device, aspects, 1u << samples_log2, index,
-		                                            pipeline, cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp);
-		if (ret != VK_SUCCESS) {
-			cmd_buffer->record_result = ret;
-			return VK_NULL_HANDLE;
-		}
-	}
-	return *pipeline;
+	unreachable("expected depth or stencil aspect");
 }
 
 static void
@@ -715,8 +638,6 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer,
 							 subpass->depth_stencil_attachment.layout,
 							 clear_rect,
 							 clear_value);
-	if (!pipeline)
-		return;
 
 	radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
 			     pipeline);
@@ -836,8 +757,23 @@ fail:
 	return false;
 }
 
+static VkFormat pipeline_formats[] = {
+	VK_FORMAT_R8G8B8A8_UNORM,
+	VK_FORMAT_R8G8B8A8_UINT,
+	VK_FORMAT_R8G8B8A8_SINT,
+	VK_FORMAT_A2R10G10B10_UINT_PACK32,
+	VK_FORMAT_A2R10G10B10_SINT_PACK32,
+	VK_FORMAT_R16G16B16A16_UNORM,
+	VK_FORMAT_R16G16B16A16_SNORM,
+	VK_FORMAT_R16G16B16A16_UINT,
+	VK_FORMAT_R16G16B16A16_SINT,
+	VK_FORMAT_R32_SFLOAT,
+	VK_FORMAT_R32G32_SFLOAT,
+	VK_FORMAT_R32G32B32A32_SFLOAT
+};
+
 VkResult
-radv_device_init_meta_clear_state(struct radv_device *device, bool on_demand)
+radv_device_init_meta_clear_state(struct radv_device *device)
 {
 	VkResult res;
 	struct radv_meta_state *state = &device->meta_state;
@@ -870,13 +806,10 @@ radv_device_init_meta_clear_state(struct radv_device *device, bool on_demand)
 	if (res != VK_SUCCESS)
 		goto fail;
 
-	if (on_demand)
-		return VK_SUCCESS;
-
 	for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) {
 		uint32_t samples = 1 << i;
-		for (uint32_t j = 0; j < NUM_META_FS_KEYS; ++j) {
-			VkFormat format = radv_fs_key_format_exemplars[j];
+		for (uint32_t j = 0; j < ARRAY_SIZE(pipeline_formats); ++j) {
+			VkFormat format = pipeline_formats[j];
 			unsigned fs_key = radv_format_meta_fs_key(format);
 			assert(!state->clear[i].color_pipelines[fs_key]);
 
@@ -1476,10 +1409,7 @@ radv_cmd_clear_image(struct radv_cmd_buffer *cmd_buffer,
 				radv_get_layerCount(image, range);
 			for (uint32_t s = 0; s < layer_count; ++s) {
 
-				if (cs ||
-				    (format == VK_FORMAT_R32G32B32_UINT ||
-				     format == VK_FORMAT_R32G32B32_SINT ||
-				     format == VK_FORMAT_R32G32B32_SFLOAT)) {
+				if (cs) {
 					struct radv_meta_blit2d_surf surf;
 					surf.format = format;
 					surf.image = image;

src/amd/vulkan/radv_meta_copy.c

@@ -195,14 +195,10 @@ meta_copy_buffer_to_image(struct radv_cmd_buffer *cmd_buffer,
 
 
 			/* Perform Blit */
-			if (cs ||
-			    (img_bsurf.image->vk_format == VK_FORMAT_R32G32B32_UINT ||
-			     img_bsurf.image->vk_format == VK_FORMAT_R32G32B32_SINT ||
-			     img_bsurf.image->vk_format == VK_FORMAT_R32G32B32_SFLOAT)) {
+			if (cs)
 				radv_meta_buffer_to_image_cs(cmd_buffer, &buf_bsurf, &img_bsurf, 1, &rect);
-			} else {
+			else
 				radv_meta_blit2d(cmd_buffer, NULL, &buf_bsurf, &img_bsurf, 1, &rect);
-			}
 
 			/* Once we've done the blit, all of the actual information about
 			 * the image is embedded in the command buffer so we can just
@@ -482,14 +478,10 @@ meta_copy_image(struct radv_cmd_buffer *cmd_buffer,
 			rect.src_y = src_offset_el.y;
 
 			/* Perform Blit */
-			if (cs ||
-			    (b_src.format == VK_FORMAT_R32G32B32_UINT ||
-			     b_src.format == VK_FORMAT_R32G32B32_SINT ||
-			     b_src.format == VK_FORMAT_R32G32B32_SFLOAT)) {
+			if (cs)
 				radv_meta_image_to_image_cs(cmd_buffer, &b_src, &b_dst, 1, &rect);
-			} else {
+			else
 				radv_meta_blit2d(cmd_buffer, &b_src, NULL, &b_dst, 1, &rect);
-			}
 
 			b_src.layer++;
 			b_dst.layer++;

src/amd/vulkan/radv_meta_decompress.c

@@ -103,18 +103,6 @@ create_pipeline(struct radv_device *device,
 {
 	VkResult result;
 	VkDevice device_h = radv_device_to_handle(device);
-	struct radv_shader_module vs_module = {0};
-
-	mtx_lock(&device->meta_state.mtx);
-	if (*decompress_pipeline) {
-		mtx_unlock(&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
-	if (!vs_module_h) {
-		vs_module.nir = radv_meta_build_nir_vs_generate_vertices();
-		vs_module_h = radv_shader_module_to_handle(&vs_module);
-	}
 
 	struct radv_shader_module fs_module = {
 		.nir = radv_meta_build_nir_fs_noop(),
@@ -231,9 +219,6 @@ create_pipeline(struct radv_device *device,
 
 cleanup:
 	ralloc_free(fs_module.nir);
-	if (vs_module.nir)
-		ralloc_free(vs_module.nir);
-	mtx_unlock(&device->meta_state.mtx);
 	return result;
 }
 
@@ -259,7 +244,7 @@ radv_device_finish_meta_depth_decomp_state(struct radv_device *device)
 }
 
 VkResult
-radv_device_init_meta_depth_decomp_state(struct radv_device *device, bool on_demand)
+radv_device_init_meta_depth_decomp_state(struct radv_device *device)
 {
 	struct radv_meta_state *state = &device->meta_state;
 	VkResult res = VK_SUCCESS;
@@ -285,9 +270,6 @@ radv_device_init_meta_depth_decomp_state(struct radv_device *device, bool on_dem
 		if (res != VK_SUCCESS)
 			goto fail;
 
-		if (on_demand)
-			continue;
-
 		res = create_pipeline(device, vs_module_h, samples,
 				      state->depth_decomp[i].pass,
 				      state->depth_decomp[i].p_layout,
@@ -361,18 +343,6 @@ static void radv_process_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
 	if (!radv_image_has_htile(image))
 		return;
 
-	if (!meta_state->depth_decomp[samples_log2].decompress_pipeline) {
-		VkResult ret = create_pipeline(cmd_buffer->device, VK_NULL_HANDLE, samples,
-		                               meta_state->depth_decomp[samples_log2].pass,
-		                               meta_state->depth_decomp[samples_log2].p_layout,
-		                               &meta_state->depth_decomp[samples_log2].decompress_pipeline,
-		                               &meta_state->depth_decomp[samples_log2].resummarize_pipeline);
-		if (ret != VK_SUCCESS) {
-			cmd_buffer->record_result = ret;
-			return;
-		}
-	}
-
 	radv_meta_save(&saved_state, cmd_buffer,
 		       RADV_META_SAVE_GRAPHICS_PIPELINE |
 		       RADV_META_SAVE_PASS);

src/amd/vulkan/radv_meta_fast_clear.c

@@ -92,7 +92,6 @@ build_dcc_decompress_compute_shader(struct radv_device *dev)
 
 	nir_ssa_def *outval = &tex->dest.ssa;
 	nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_deref_store);
-	store->num_components = 4;
 	store->src[0] = nir_src_for_ssa(&nir_build_deref_var(&b, output_img)->dest.ssa);
 	store->src[1] = nir_src_for_ssa(global_id);
 	store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
@@ -490,17 +489,11 @@ radv_device_finish_meta_fast_clear_flush_state(struct radv_device *device)
 	                                &state->alloc);
 }
 
-static VkResult
-radv_device_init_meta_fast_clear_flush_state_internal(struct radv_device *device)
+VkResult
+radv_device_init_meta_fast_clear_flush_state(struct radv_device *device)
 {
 	VkResult res = VK_SUCCESS;
 
-	mtx_lock(&device->meta_state.mtx);
-	if (device->meta_state.fast_clear_flush.cmask_eliminate_pipeline) {
-		mtx_unlock(&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
 	struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() };
 	if (!vs_module.nir) {
 		/* XXX: Need more accurate error */
@@ -534,21 +527,10 @@ fail:
 
 cleanup:
 	ralloc_free(vs_module.nir);
-	mtx_unlock(&device->meta_state.mtx);
 
 	return res;
 }
 
-
-VkResult
-radv_device_init_meta_fast_clear_flush_state(struct radv_device *device, bool on_demand)
-{
-	if (on_demand)
-		return VK_SUCCESS;
-
-	return radv_device_init_meta_fast_clear_flush_state_internal(device);
-}
-
 static void
 emit_fast_clear_flush(struct radv_cmd_buffer *cmd_buffer,
 		      const VkExtent2D *resolve_extent,
@@ -609,14 +591,6 @@ radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer,
 
 	assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL);
 
-	if (!cmd_buffer->device->meta_state.fast_clear_flush.cmask_eliminate_pipeline) {
-		VkResult ret = radv_device_init_meta_fast_clear_flush_state_internal(cmd_buffer->device);
-		if (ret != VK_SUCCESS) {
-			cmd_buffer->record_result = ret;
-			return;
-		}
-	}
-
 	radv_meta_save(&saved_state, cmd_buffer,
 		       RADV_META_SAVE_GRAPHICS_PIPELINE |
 		       RADV_META_SAVE_PASS);

src/amd/vulkan/radv_meta_resolve.c

@@ -251,12 +251,24 @@ radv_device_finish_meta_resolve_state(struct radv_device *device)
 
 }
 
-VkResult
-radv_device_init_meta_resolve_state(struct radv_device *device, bool on_demand)
-{
-	if (on_demand)
-		return VK_SUCCESS;
+static VkFormat pipeline_formats[] = {
+	VK_FORMAT_R8G8B8A8_UNORM,
+	VK_FORMAT_R8G8B8A8_UINT,
+	VK_FORMAT_R8G8B8A8_SINT,
+	VK_FORMAT_A2R10G10B10_UINT_PACK32,
+	VK_FORMAT_A2R10G10B10_SINT_PACK32,
+	VK_FORMAT_R16G16B16A16_UNORM,
+	VK_FORMAT_R16G16B16A16_SNORM,
+	VK_FORMAT_R16G16B16A16_UINT,
+	VK_FORMAT_R16G16B16A16_SINT,
+	VK_FORMAT_R32_SFLOAT,
+	VK_FORMAT_R32G32_SFLOAT,
+	VK_FORMAT_R32G32B32A32_SFLOAT
+};
 
+VkResult
+radv_device_init_meta_resolve_state(struct radv_device *device)
+{
 	VkResult res = VK_SUCCESS;
 	struct radv_meta_state *state = &device->meta_state;
 	struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() };
@@ -266,8 +278,8 @@ radv_device_init_meta_resolve_state(struct radv_device *device, bool on_demand)
 		goto fail;
 	}
 
-	for (uint32_t i = 0; i < NUM_META_FS_KEYS; ++i) {
-		VkFormat format = radv_fs_key_format_exemplars[i];
+	for (uint32_t i = 0; i < ARRAY_SIZE(pipeline_formats); ++i) {
+		VkFormat format = pipeline_formats[i];
 		unsigned fs_key = radv_format_meta_fs_key(format);
 		res = create_pass(device, format, &state->resolve.pass[fs_key]);
 		if (res != VK_SUCCESS)
@@ -357,36 +369,6 @@ static void radv_pick_resolve_method_images(struct radv_image *src_image,
 	}
 }
 
-static VkResult
-build_resolve_pipeline(struct radv_device *device,
-                       unsigned fs_key)
-{
-	VkResult result = VK_SUCCESS;
-
-	if (device->meta_state.resolve.pipeline[fs_key])
-		return result;
-
-	mtx_lock(&device->meta_state.mtx);
-	if (device->meta_state.resolve.pipeline[fs_key]) {
-		mtx_unlock(&device->meta_state.mtx);
-		return result;
-	}
-
-	struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() };
-
-	result = create_pass(device, radv_fs_key_format_exemplars[fs_key], &device->meta_state.resolve.pass[fs_key]);
-	if (result != VK_SUCCESS)
-		goto fail;
-
-	VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module);
-	result = create_pipeline(device, vs_module_h, &device->meta_state.resolve.pipeline[fs_key], device->meta_state.resolve.pass[fs_key]);
-
-fail:
-	ralloc_free(vs_module.nir);
-	mtx_unlock(&device->meta_state.mtx);
-	return result;
-}
-
 void radv_CmdResolveImage(
 	VkCommandBuffer                             cmd_buffer_h,
 	VkImage                                     src_image_h,
@@ -517,12 +499,6 @@ void radv_CmdResolveImage(
 		for (uint32_t layer = 0; layer < region->srcSubresource.layerCount;
 		     ++layer) {
 
-			VkResult ret = build_resolve_pipeline(device, fs_key);
-			if (ret != VK_SUCCESS) {
-				cmd_buffer->record_result = ret;
-				break;
-			}
-
 			struct radv_image_view src_iview;
 			radv_image_view_init(&src_iview, cmd_buffer->device,
 					     &(VkImageViewCreateInfo) {
@@ -688,12 +664,6 @@ radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer)
 
 		radv_cmd_buffer_set_subpass(cmd_buffer, &resolve_subpass, false);
 
-		VkResult ret = build_resolve_pipeline(cmd_buffer->device, radv_format_meta_fs_key(dst_img->vk_format));
-		if (ret != VK_SUCCESS) {
-			cmd_buffer->record_result = ret;
-			continue;
-		}
-
 		emit_resolve(cmd_buffer,
 			     dst_img->vk_format,
 			     &(VkOffset2D) { 0, 0 },

src/amd/vulkan/radv_meta_resolve_cs.c

@@ -136,7 +136,6 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s
 
 	nir_ssa_def *coord = nir_iadd(&b, global_id, &dst_offset->dest.ssa);
 	nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_deref_store);
-	store->num_components = 4;
 	store->src[0] = nir_src_for_ssa(&nir_build_deref_var(&b, output_img)->dest.ssa);
 	store->src[1] = nir_src_for_ssa(coord);
 	store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
@@ -213,12 +212,6 @@ create_resolve_pipeline(struct radv_device *device,
 	VkResult result;
 	struct radv_shader_module cs = { .nir = NULL };
 
-	mtx_lock(&device->meta_state.mtx);
-	if (*pipeline) {
-		mtx_unlock(&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
 	cs.nir = build_resolve_compute_shader(device, is_integer, is_srgb, samples);
 
 	/* compute shader */
@@ -246,16 +239,14 @@ create_resolve_pipeline(struct radv_device *device,
 		goto fail;
 
 	ralloc_free(cs.nir);
-	mtx_unlock(&device->meta_state.mtx);
 	return VK_SUCCESS;
 fail:
 	ralloc_free(cs.nir);
-	mtx_unlock(&device->meta_state.mtx);
 	return result;
 }
 
 VkResult
-radv_device_init_meta_resolve_compute_state(struct radv_device *device, bool on_demand)
+radv_device_init_meta_resolve_compute_state(struct radv_device *device)
 {
 	struct radv_meta_state *state = &device->meta_state;
 	VkResult res;
@@ -264,9 +255,6 @@ radv_device_init_meta_resolve_compute_state(struct radv_device *device, bool on_
 	if (res != VK_SUCCESS)
 		goto fail;
 
-	if (on_demand)
-		return VK_SUCCESS;
-
 	for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) {
 		uint32_t samples = 1 << i;
 
@@ -365,27 +353,16 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer,
 			      }
 				      });
 
-	VkPipeline *pipeline;
+	VkPipeline pipeline;
 	if (vk_format_is_int(src_iview->image->vk_format))
-		pipeline = &device->meta_state.resolve_compute.rc[samples_log2].i_pipeline;
+		pipeline = device->meta_state.resolve_compute.rc[samples_log2].i_pipeline;
 	else if (vk_format_is_srgb(src_iview->image->vk_format))
-		pipeline = &device->meta_state.resolve_compute.rc[samples_log2].srgb_pipeline;
+		pipeline = device->meta_state.resolve_compute.rc[samples_log2].srgb_pipeline;
 	else
-		pipeline = &device->meta_state.resolve_compute.rc[samples_log2].pipeline;
-
-	if (!*pipeline) {
-		VkResult ret = create_resolve_pipeline(device, samples,
-		                                       vk_format_is_int(src_iview->image->vk_format),
-		                                       vk_format_is_srgb(src_iview->image->vk_format),
-		                                       pipeline);
-		if (ret != VK_SUCCESS) {
-			cmd_buffer->record_result = ret;
-			return;
-		}
-	}
+		pipeline = device->meta_state.resolve_compute.rc[samples_log2].pipeline;
 
 	radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
-			     VK_PIPELINE_BIND_POINT_COMPUTE, *pipeline);
+			     VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
 
 	unsigned push_constants[4] = {
 		src_offset->x,

src/amd/vulkan/radv_meta_resolve_fs.c

@@ -156,23 +156,30 @@ static const VkPipelineVertexInputStateCreateInfo normal_vi_create_info = {
 	.vertexAttributeDescriptionCount = 0,
 };
 
+static VkFormat pipeline_formats[] = {
+   VK_FORMAT_R8G8B8A8_UNORM,
+   VK_FORMAT_R8G8B8A8_UINT,
+   VK_FORMAT_R8G8B8A8_SINT,
+   VK_FORMAT_A2R10G10B10_UINT_PACK32,
+   VK_FORMAT_A2R10G10B10_SINT_PACK32,
+   VK_FORMAT_R16G16B16A16_UNORM,
+   VK_FORMAT_R16G16B16A16_SNORM,
+   VK_FORMAT_R16G16B16A16_UINT,
+   VK_FORMAT_R16G16B16A16_SINT,
+   VK_FORMAT_R32_SFLOAT,
+   VK_FORMAT_R32G32_SFLOAT,
+   VK_FORMAT_R32G32B32A32_SFLOAT
+};
+
 static VkResult
 create_resolve_pipeline(struct radv_device *device,
 			int samples_log2,
 			VkFormat format)
 {
-	mtx_lock(&device->meta_state.mtx);
-
-	unsigned fs_key = radv_format_meta_fs_key(format);
-	VkPipeline *pipeline = &device->meta_state.resolve_fragment.rc[samples_log2].pipeline[fs_key];
-	if (*pipeline) {
-		mtx_unlock(&device->meta_state.mtx);
-		return VK_SUCCESS;
-	}
-
 	VkResult result;
 	bool is_integer = false;
 	uint32_t samples = 1 << samples_log2;
+	unsigned fs_key = radv_format_meta_fs_key(format);
 	const VkPipelineVertexInputStateCreateInfo *vi_create_info;
 	vi_create_info = &normal_vi_create_info;
 	if (vk_format_is_int(format))
@@ -188,6 +195,9 @@ create_resolve_pipeline(struct radv_device *device,
 
 	assert(!*rp);
 
+	VkPipeline *pipeline = &device->meta_state.resolve_fragment.rc[samples_log2].pipeline[fs_key];
+	assert(!*pipeline);
+
 	VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
 		{
 			.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
@@ -312,12 +322,11 @@ create_resolve_pipeline(struct radv_device *device,
 	ralloc_free(vs.nir);
 	ralloc_free(fs.nir);
 
-	mtx_unlock(&device->meta_state.mtx);
 	return result;
 }
 
 VkResult
-radv_device_init_meta_resolve_fragment_state(struct radv_device *device, bool on_demand)
+radv_device_init_meta_resolve_fragment_state(struct radv_device *device)
 {
 	VkResult res;
 
@@ -325,12 +334,9 @@ radv_device_init_meta_resolve_fragment_state(struct radv_device *device, bool on
 	if (res != VK_SUCCESS)
 		goto fail;
 
-	if (on_demand)
-		return VK_SUCCESS;
-
 	for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) {
-		for (unsigned j = 0; j < NUM_META_FS_KEYS; ++j) {
-			res = create_resolve_pipeline(device, i, radv_fs_key_format_exemplars[j]);
+		for (unsigned j = 0; j < ARRAY_SIZE(pipeline_formats); ++j) {
+			res = create_resolve_pipeline(device, i, pipeline_formats[j]);
 			if (res != VK_SUCCESS)
 				goto fail;
 		}
@@ -413,18 +419,10 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer,
 			      push_constants);
 
 	unsigned fs_key = radv_format_meta_fs_key(dest_iview->vk_format);
-	VkPipeline* pipeline = &device->meta_state.resolve_fragment.rc[samples_log2].pipeline[fs_key];
-
-	if (*pipeline == VK_NULL_HANDLE) {
-		VkResult ret = create_resolve_pipeline(device, samples_log2, radv_fs_key_format_exemplars[fs_key]);
-		if (ret != VK_SUCCESS) {
-			cmd_buffer->record_result = ret;
-			return;
-		}
-	}
+	VkPipeline pipeline_h = device->meta_state.resolve_fragment.rc[samples_log2].pipeline[fs_key];
 
 	radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
-			     *pipeline);
+			     pipeline_h);
 
 	radv_CmdSetViewport(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkViewport) {
 		.x = dest_offset->x,
@@ -463,14 +461,6 @@ void radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer,
 	radv_decompress_resolve_src(cmd_buffer, src_image, src_image_layout,
 				    region_count, regions);
 
-	if (!device->meta_state.resolve_fragment.rc[samples_log2].render_pass[fs_key][dst_layout]) {
-		VkResult ret = create_resolve_pipeline(device, samples_log2, radv_fs_key_format_exemplars[fs_key]);
-		if (ret != VK_SUCCESS) {
-			cmd_buffer->record_result = ret;
-			return;
-		}
-	}
-
 	rp = device->meta_state.resolve_fragment.rc[samples_log2].render_pass[fs_key][dst_layout];
 
 	radv_meta_save(&saved_state, cmd_buffer,