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433 Commits

Author SHA1 Message Date
Juan A. Suarez Romero
24c31bc0e2 docs: add sha256 checksums for 18.2.8
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-27 17:34:35 +01:00
Juan A. Suarez Romero
785e09e3b3 docs: add release notes for 18.2.8
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-27 15:57:51 +00:00
Juan A. Suarez Romero
1ccbb8827a Update version to 18.2.8
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-27 15:52:31 +00:00
Emil Velikov
3f04c31cfe glx/test: meson: assorted include fixes
Swap '..' with the symbolic inc_glx and add glproto as dependency. That
will pull the correct include, effectively fixing the tests on macOS.

Fixes: a47c525f32 ("meson: build glx")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit f331419f26)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/glx/tests/meson.build
2018-12-25 17:58:06 +01:00
Emil Velikov
3de8d15d1f glx: meson: wire up the dispatch-index-check test
Accidentally dropped with earlier commit.!

Fixes: 4ccb981673 ("meson: Use consistent style for tests")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit e139d7a8a3)
2018-12-25 17:58:06 +01:00
Emil Velikov
7f1cc8d52d glx: meson: drop includes from a link-only library
When producing the final libGL.so/libGLX_mesa.so we only link the local
static helper lib (libglx). Thus there's no reason for the includes.

Fixes: a47c525f32 ("meson: build glx")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit b44875e2dc)
2018-12-25 17:58:06 +01:00
Emil Velikov
0d692a5b54 TODO: glx: meson: build dri based glx tests, only with -Dglx=dri
The library itself (libGL) is only built when -Dglx=dri, yet it's
accompanying tests are build even with -Dglx=xlib.

Adjust the guards, so we don't build the tests when they are not
applicable

v2:
 - Reword commit message (Dylan)
 - Drop build_by_default hunk (Dylan)

Fixes: a47c525f32 ("meson: build glx")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 9527f9ea26)
2018-12-25 17:58:06 +01:00
Emil Velikov
00fda84bff pipe-loader: meson: reference correct library
The library is called libgalliumvl_stub - note singular.

Fixes: 42ea0631f1 ("meson: build clover")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 2eedb79e1a)
2018-12-25 17:58:06 +01:00
Emil Velikov
1af31b1bac meson: don't require glx/egl/gbm with gallium drivers
The gallium drivers do not require a DRI loader. Drop the artificial
and unnecessary restriction.

Fixes: af9d276134 ("meson: build libmesa_gallium")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 9d10581897)
2018-12-25 17:58:06 +01:00
Lionel Landwerlin
f024966626 anv: don't do partial resolve on layer > 0
We've made the choice not to use fast clears on layer > 0 with
multilayer images. This is partly because we would need to store
multiple clear colors for each layer, making the existing memory
layout, already including aux surfaces, fast clear color, image state,
etc... even more complex.

Partial resolves are the operations transfering the clear colors into
the auxiliary buffers. This operation is currently implemented in
Blorp by loading the clear color from the image's BO, into a shader
that then samples from the auxiliary buffer and writes the color only
if it isn't there already.

The problem here is that because we store only one clear color for all
layers and it is used for partial resolves. If you trigger a partial
clear on a layer > 0, then you're likely to deal with a color that is
not what you actually want. In the particular issues below, we have
multiple layers, each cleared with a different color but the partial
resolve just writes the wrong color into the auxiliary buffers for
layers > 0.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108910
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108911
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit e2ae5f2f0a)
2018-12-25 17:58:05 +01:00
Axel Davy
2d60f11197 st/nine: Add src reference to nine_context_range_upload
Just like nine_context_box_upload, nine_context_range_upload
should reference the src, which holds the ram source buffer.

Fixes: https://github.com/iXit/Mesa-3D/issues/327
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 104681c5d5)
2018-12-25 17:58:05 +01:00
Axel Davy
ec1bae2236 st/nine: Bind src not dst in nine_context_box_upload
nine_context_box_upload uploads a ram buffer (from src)
to a pipe_resource (dst).
We already have a refcount on the pipe_resource,
what needs to be protected from release is the ram buffer,
thus a reference to src.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 42d672fa6a)
2018-12-25 17:58:05 +01:00
Axel Davy
8689dcba7b st/nine: Fix volumetexture dtor on ctor failure
The dtor is called on allocation failure,
thus we must check the volumes are allocated
before trying to release them.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit f91f748fab)
2018-12-25 17:58:05 +01:00
Alex Deucher
14e04a2011 pci_ids: add new VegaM pci id
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 516160d717)
2018-12-25 17:58:05 +01:00
Emil Velikov
ced1bf714b bin/get-pick-list.sh: warn when commit lists invalid sha
We had cases where people would list old/invalid sha in the commit.
Add a trivial checker to catch those and throw a warning.

CC: Juan A. Suarez <jasuarez@igalia.com>
CC: Dylan Baker <dylan@pnwbakers.com>
CC: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit e0dbfc9953)
2018-12-25 17:58:05 +01:00
Emil Velikov
1eb1a23237 bin/get-pick-list.sh: rework handing of sha nominations
Currently our is_sha_nomination does:
 - folds any whitespace, attempting to extract sha-like information
 - checks that at least one of the shas has landed

Split it in two and do sha-like validation first.

This way, commits with mesa-stable and sha nominations will feature the
fixes/revert/etc instead of stable (a) or will be omitted if not
applicable for the respective branch (b).

Misc examples from 18.3

(a)
-[   stable ] 5bc509363b glx: make xf86vidmode mandatory for direct rendering
+[    fixes ] 5bc509363b glx: make xf86vidmode mandatory for direct rendering

(b)
-[   stable ] 9a7b319903 anv/query: flush render target before copying results

CC: Juan A. Suarez <jasuarez@igalia.com>
CC: Dylan Baker <dylan@pnwbakers.com>
CC: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 6b296f64af)
2018-12-25 17:58:05 +01:00
Caio Marcelo de Oliveira Filho
4203d05c11 nir: properly clear the entry sources in copy_prop_vars
When updating a copy entry source value from a "non-SSA" (the data
come from a copy instruction) to a "SSA" (the data or parts of it come
from SSA values), it was possible to hold invalid data in ssa[0]
depending on the writemask.  Because the union, ssa[0] could contain a
pointer to a nir_deref_instr left-over from previous non-SSA usage.

Change code to clean up the array before use to avoid invalid data
around.

Fixes: 62332d139c "nir: Add a local variable-based copy propagation pass"
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 0ddc911f4d)
2018-12-25 17:58:05 +01:00
Juan A. Suarez Romero
a1b25102c1 cherry-ignore: intel/compiler: move nir_lower_bool_to_int32 before nir_lower_locals_to_regs
pick: This commit is nominated to stable, but fixes commit 11dc130779
which is not in the current stable branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-25 17:58:05 +01:00
Juan A. Suarez Romero
8a5e70c5fb cherry-ignore: nir: properly find the entry to keep in copy_prop_vars
pick: This commit is nominated to stable, but fixes commit b3c6146925
which is in 18.3 stable. Hence, this commit is considered as nominated
to 18.3 stable.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-25 17:58:05 +01:00
Rhys Perry
d06b8a322a ac: split 16-bit ssbo loads that may not be dword aligned
This ends up refactoring visit_load_buffer() a little.

Fixes: 7e7ee82698 ('ac: add support for 16bit buffer loads')
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108114
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-12-25 17:57:58 +01:00
Ian Romanick
4ff2105e1d Revert "nir/lower_indirect: Bail early if modes == 0"
"There's no point in walking the program if we're never going to
    actually lower anything."

Except we might lower compacted local arrays.  In that case, modes will
be 0, but there is still lowering to be done.

This reverts commit 7f75cf2a94.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109081
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 29e4b949b4)
2018-12-25 17:54:20 +01:00
Vinson Lee
d61fffdc59 meson: Fix libsensors detection.
Fixes: 5e71efef44 ("meson: Add lmsensors support")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 0f7ba5758b)
2018-12-25 17:54:20 +01:00
Vinson Lee
057d5bb658 meson: Fix typo.
Fixes: 6b4c7047d5 ("meson: build gallium nine state_tracker")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 84f39e5971)
2018-12-25 17:54:20 +01:00
Dylan Baker
46d39ba5c9 meson: Fix ppc64 little endian detection
Old versions of meson returned ppc64le as the cpu_family for little
endian power8 cpus, versions >=0.48 don't do this, so the check wouldn't
work in that case. This generalizes the check to work for both old and
new versions of meson.

Fixes: 34bbb24ce7
       ("meson: Add support for ppc assembly/optimizations")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit e430a034b9)
2018-12-25 17:54:20 +01:00
Ian Romanick
344f1e2b8a i965/vec4/dce: Don't narrow the write mask if the flags are used
In an instruction sequence like

            cmp(8).ge.f0.0 vgrf17:D, vgrf2.xxxx:D, vgrf9.xxxx:D
    (+f0.0) sel(8) vgrf1:UD, vgrf8.xyzw:UD, vgrf1.xyzw:UD

The other fields of vgrf17 may be unused, but the CMP still needs to
generate the other flag bits.

To my surprise, nothing in shader-db or any test suite appears to hit
this.  However, I have a change to brw_vec4_cmod_propagation that
creates cases where this can happen.  This fix prevents a couple dozen
regressions in that patch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 5df88c20 ("i965/vec4: Rewrite dead code elimination to use live in/out.")
(cherry picked from commit 440c051340)
2018-12-25 17:54:20 +01:00
Juan A. Suarez Romero
901b8c52b8 cherry-ignore: radv: Fix multiview depth clears
fixes: This commit requires commits aeaf8dbd09 and 7484bc894b which
did not land in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-25 17:54:20 +01:00
Rhys Perry
3a6987b4cc radv: don't set surf_index for stencil-only images
Fixes: f8d5b377c8 ('radv: set cb base tile swizzles for MRT speedups (v4)')
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108116
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit bba94a3d85)
2018-12-25 17:54:20 +01:00
Iago Toral Quiroga
4b5a4dbc54 intel/compiler: do not copy-propagate strided regions to ddx/ddy arguments
The implementation of these opcodes in the generator assumes that their
arguments are packed, and it generates register regions based on that
assumption.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 3918943211)
2018-12-25 17:54:20 +01:00
Jason Ekstrand
9384414767 nir/constant_folding: Fix source bit size logic
Instead of looking at input_sizes[i] which contains the number of
components for each source, we look at the bit size of input_types[i].
This fixes a regression in the 1-bit boolean series though I have no
idea how we haven't seen it before now.

Fixes: 35baee5dce "nir/constant_folding: fix incorrect bit-size check"
Fixes: 9076c4e289 "nir: update opcode definitions for different bit sizes"
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 3595a0abf4)
[Juan A. Suarez: resolve trivial conflicts]

Conflicts:
	src/compiler/nir/nir_opt_constant_folding.c
2018-12-25 17:54:14 +01:00
Jon Turney
beec28d21b glx: Fix compilation with GLX_USE_WINDOWSGL
Sadly, the GLX_USE_APPLEGL and GLX_USE_WINDOWSGL cases are not identical
(because GLX_USE_WINDOWSGL uses vtables rather than a maze of ifdefs)

Include <sys/time.h> again, as functions prototyped by it are used in
the GLX_USE_WINDOWSGL path.

Make the include guard around the __glxGetMscRate() definition match the
one at it's declaration again, as it's referenced from dri_common.c
which is built for GLX_USE_WINDOWSGL.

Fixes: a95ec138 ("glx: mandate xf86vidmode only for "drm" dri platforms")
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d512b35b62)
2018-12-19 15:22:41 +01:00
Eric Anholt
e621aee788 v3d: Add missing flagging of SYNCB as a TSY op.
Fixes: f2e41daac5 ("broadcom/vc5: Update QPU instruction pack/unpack for v4.2.")
(cherry picked from commit ff80e58b38)
2018-12-19 15:22:41 +01:00
Eric Anholt
a52d12eec0 v3d: Make sure that a thrsw doesn't split a multop from its umul24.
The thrsw will invalidate rtop, just like accumulators and flags.  Caught
by simulator assertions in CS imulextended/umulextended tests.

Fixes: 90269ba353 ("broadcom/vc5: Use THRSW to enable multi-threaded shaders.")
(cherry picked from commit 3f9bcf9136)
2018-12-19 15:22:41 +01:00
Jan Vesely
edcbdea5a6 clover: Fix build after clang r348827
CodeGenOptions were moved to Basic.

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Aaron Watry <awatry@gmail.com>
Tested-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
CC: mesa-stable@lists.freedesktop.org
(cherry picked from commit e4f9a37ace)
2018-12-19 15:22:41 +01:00
Alex Deucher
7cde3dcf07 pci_ids: add new vega20 pci id
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 4db4b3447d)
2018-12-19 15:22:41 +01:00
Alex Deucher
51f1bd5827 pci_ids: add new vega10 pci ids
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 56cf25a114)
2018-12-19 15:22:41 +01:00
Emil Velikov
46e102d963 glx: mandate xf86vidmode only for "drm" dri platforms
Currently we have the three dri "platforms" - drm, apple and windows.

Since xf86vidmode is a thing only for the drm one, adjust the
preprocessor guards and correctly check for the dependency.

v2: terminate the GLX_USE_WINDOWSGL hunk

Cc: Jon TURNEY <jon.turney@dronecode.org.uk>
Fixes: 5bc509363b ("glx: make xf86vidmode mandatory for direct rendering")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit a95ec13879)
2018-12-19 15:22:41 +01:00
Erik Faye-Lund
bff2986b3c virgl: work around bad assumptions in virglrenderer
Virglrenderer does the wrong thing when given an instance divisor;
it tries to use the element-index rather than the binding-index as
the argument to glVertexBindingDivisor(). This worked fine as long
as there was a 1:1 relationship between elements and bindings,
which was the case util 19a91841c3 "st/mesa: Use Array._DrawVAO in
st_atom_array.c.".

So let's detect instance divisors, and restore a 1:1 relationship in
that case. This will make old versions of virglrenderer behave
correctly. For newer versions, we can consider making a better
interface, where the instance divisor isn't specified per element,
but rather per binding. But let's save that for another day.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 19a91841c3 "st/mesa: Use Array._DrawVAO in st_atom_array.c."
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-By: Gert Wollny <gert.wollny@collabora.com>
(cherry picked from commit e888f28d1f)
2018-12-19 15:22:41 +01:00
Erik Faye-Lund
5efd0c35fb virgl: wrap vertex element state in a struct
This just has one member for now; the handle. But this is about to
change.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-By: Gert Wollny <gert.wollny@collabora.com>
(cherry picked from commit 8447b64238)
2018-12-19 15:22:41 +01:00
Juan A. Suarez Romero
c57f3aaa47 cherry-ignore: meson: libfreedreno depends upon libdrm (for fence support)
fixes: The changes this commit provides are already included in the
branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-19 15:22:41 +01:00
Rob Clark
316e388223 mesa/st/nir: fix missing nir_compact_varyings
LinkedTransformFeedback is normally populated, which had nerf'd varying
packing since the check was introduced.

Fixes: dbd52585fa st/nir: Disable varying packing when doing transform feedback.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit cfe8220904)
2018-12-19 15:22:41 +01:00
Kirill Burtsev
69396e242b loader: free error state, when checking the drawable type
Currently we distinguish if the drawable is a window or pixmap by
checking xcb_present_select_input throws an error or not.

Yet, we don't always free the error state returned by xcb.

Cc: Kirill Burtsev <kirill.burtsev@qt.io>
Cc: Boyan Ding <boyan.j.ding@gmail.com>
Fixes: 6bd9ba7d07 ("loader: Add dri3 helper")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil: add commit message, fixes tag]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit a539316485)
2018-12-19 15:22:41 +01:00
Samuel Pitoiset
eb04300772 radv: switch on EOP when primitive restart is enabled with triangle strips
Otherwise, Yakuza hangs the GPU with DXVK. We don't know if
linetrip and pointlist are affected, so my point is to do that
only for triangle strips.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit d8325f1f07)
2018-12-19 15:22:41 +01:00
Juan A. Suarez Romero
a968e08d93 cherry-ignore: add explicit 18.3 only nominations
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-19 15:22:41 +01:00
Juan A. Suarez Romero
e90429cc6d docs: add sha256 checksums for 18.2.7
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-13 15:42:26 +01:00
Juan A. Suarez Romero
419ee20097 docs: add release notes for 18.2.7
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-13 14:58:30 +01:00
Juan A. Suarez Romero
33f0b43a00 Update version to 18.2.7
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-13 13:54:01 +00:00
Nicolai Hähnle
4ca3d839ea meson: link LLVM 'native' component when LLVM is available
Linking against LLVM built with BUILD_SHARED_LIBS fails otherwise,
as the component is required for the draw module.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 4275cae95c)
2018-12-10 12:55:34 +01:00
Eric Anholt
2462638eba v3d: Fix a leak of the disassembled instruction string during debug dumps.
Fixes: ade416d023 ("broadcom: Add VC5 NIR compiler.")
(cherry picked from commit f1d98204c3)
2018-12-10 12:15:54 +01:00
Eric Anholt
8508ce0113 vc4: Fix a leak of the transfer helper on screen destroy.
Fixes: d009463a65 ("vc4: Switch to using u_transfer_helper for MSAA maps.")
(cherry picked from commit 7f8d8b7d27)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/gallium/drivers/vc4/vc4_screen.c
2018-12-10 12:12:23 +01:00
Eric Anholt
47850ced2e v3d: Fix a leak of the transfer helper on screen destroy.
Fixes: 7a30517cce ("broadcom/vc5: Start adding support for rendering to Z32F_S8X24_UINT.")
(cherry picked from commit 3bd73d31a8)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/gallium/drivers/v3d/v3d_screen.c
2018-12-10 12:07:41 +01:00
Michal Srb
78aec0d3fb drisw: Use separate drisw_loader_funcs for shm
The original code was modifying the global drisw_lf variable, which is bad
when there are multiple contexts in single process, each initialized with
different loader. One may support put_image_shm and the other not.

Since there are currently only two possible combinations, lets create two
global tables, one for each. Lets make them const, since we won't change them
and they can be shared.

This fixes crash in VLC. It used two GL contexts (each in different thread), one
was initialized by its Qt GUI, the other by its video output plugin. The first
one set the put_image_shm=drisw_put_image_shm, the second did not, but
since the same structure was used, the drisw_put_image_shm was used too. Then
it crashed because the second loader did not have putImageShm set.

Downstream bug:
https://bugzilla.opensuse.org/show_bug.cgi?id=1113533

v2: Added Fixes and described the VLC bug.

Fixes: 63c427fa71 ("drisw: use putImageShm if available")
Signed-off-by: Michal Srb <msrb@suse.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 63c0916ada)
2018-12-05 17:51:54 +01:00
Alex Smith
b631a1258b radv: Flush before vkCmdWriteTimestamp() if needed
As done for vkCmdBeginQuery() already. Prevents timestamps from being
overwritten by previous vkCmdResetQueryPool() calls if the shader path
was used to do the reset.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108925
Fixes: a41e2e9cf5 ("radv: allow to use a compute shader for resetting the query pool")
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit c1b6cb068c)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/amd/vulkan/radv_query.c
2018-12-05 17:49:24 +01:00
Samuel Pitoiset
416b284b59 radv: rework the TC-compat HTILE hardware bug with COND_EXEC
After investigating on this, it appears that COND_WRITE doesn't
work correctly in some situations. I don't know exactly why does
it fail to update DB_Z_INFO.ZRANGE_PRECISION, but as AMDVLK
also uses COND_EXEC I think there is a reason.

Now the driver stores a new metadata value in order to reflect
the last fast depth clear state. If a TC-compat HTILE is fast cleared
with 0.0f, we have to update ZRANGE_PRECISION to 0 in order to
work around that hardware bug.

This fixes rendering issues with The Forest and DXVK and doesn't
seem to introduce any regressions.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108914
Fixes: 68dead112e ("radv: update the ZRANGE_PRECISION value for the TC-compat bug")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 824cfc1ee5)
2018-12-05 17:45:16 +01:00
Michal Srb
0303d8ca7e gallium: Constify drisw_loader_funcs struct
The content is not expected to change.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Michal Srb <msrb@suse.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit c0ac038c97)
2018-12-05 17:42:23 +01:00
Lionel Landwerlin
603fe555a1 anv/query: flush render target before copying results
This change tracks render target writes in the pipeline and applies a
render target flush before copying the query results to make sure the
preceding operations have landed in memory before the command streamer
initiates the copy.

v2: Simplify logic in CopyQueryResults (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108909
Fixes: 37f9788e9a ("anv: flush pipeline before query result copies")
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 9a7b319903)
2018-12-05 17:31:19 +01:00
Dave Airlie
ee7adf88d2 radv: use 3d shader for gfx9 copies if dst is 3d
This fixes some crucible 3d miptree tests I've been working on
when executed using the compute shader path.

Fixes: d08f267814 (radv/gfx9: fix 3d image to image transfers on compute queues.)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 1363a47c9c)
2018-12-04 12:44:02 +01:00
Bas Nieuwenhuizen
522ae9d5c7 radv/android: Use buffer metadata to determine scanout compat.
These days we don't always allocate scanout compatible textures anymore.
That does mean we have to fix the radv android WSI though.

Fixes: b1444c9ccb "radv: Implement VK_ANDROID_native_buffer."
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 3bf48741e1)
2018-12-04 12:41:19 +01:00
Bas Nieuwenhuizen
eb453b3f9d radv/android: Mark android WSI image as shareable.
Fixes: b1444c9ccb "radv: Implement VK_ANDROID_native_buffer."
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 51091b3e1f)
2018-12-04 12:33:52 +01:00
Tobias Klausmann
d22db70cea amd/vulkan: meson build - use radv_deps for libvulkan_radeon
Without this the build breaks with:

FAILED: src/amd/vulkan/src@amd@vulkan@@vulkan_radeon@sha/radv_pipeline.c.o
cc -Isrc/amd/vulkan/src@amd@vulkan@@vulkan_radeon@sha -Isrc/amd/vulkan
-I../src/amd/vulkan -Isrc/../include -I../src/../include -Isrc -I../src
-Isrc/mapi -I../src/mapi -Isrc/mesa -I../src/mesa -I../src/gallium/include
-Isrc/gallium/auxiliary -I../src/gallium/auxiliary -Isrc/amd -I../src/amd
-Isrc/amd/common -I../src/amd/common -Isrc/compiler -I../src/compiler
-Isrc/vulkan/util -I../src/vulkan/util -Isrc/vulkan/wsi -I../src/vulkan/wsi
-Isrc/compiler/nir -I../src/compiler/nir -I/usr/include -I/usr/include/libdrm
-fdiagnostics-color=always -pipe -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch
-std=c99 -O2 -g '-DVERSION="18.3.0-rc5"' -DPACKAGE_VERSION=VERSION
'-DPACKAGE_BUGREPORT="https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa"'
-DGLX_USE_TLS -DHAVE_ST_VDPAU -DENABLE_ST_OMX_BELLAGIO=0
-DENABLE_ST_OMX_TIZONIA=0 -DHAVE_X11_PLATFORM -DGLX_INDIRECT_RENDERING
-DGLX_DIRECT_RENDERING -DGLX_USE_DRM -DHAVE_DRM_PLATFORM -DENABLE_SHADER_CACHE
-DHAVE___BUILTIN_BSWAP32 -DHAVE___BUILTIN_BSWAP64 -DHAVE___BUILTIN_CLZ
-DHAVE___BUILTIN_CLZLL -DHAVE___BUILTIN_CTZ -DHAVE___BUILTIN_EXPECT
-DHAVE___BUILTIN_FFS -DHAVE___BUILTIN_FFSLL -DHAVE___BUILTIN_POPCOUNT
-DHAVE___BUILTIN_POPCOUNTLL -DHAVE___BUILTIN_UNREACHABLE
-DHAVE_FUNC_ATTRIBUTE_CONST -DHAVE_FUNC_ATTRIBUTE_FLATTEN
-DHAVE_FUNC_ATTRIBUTE_MALLOC -DHAVE_FUNC_ATTRIBUTE_PURE
-DHAVE_FUNC_ATTRIBUTE_UNUSED -DHAVE_FUNC_ATTRIBUTE_WARN_UNUSED_RESULT
-DHAVE_FUNC_ATTRIBUTE_WEAK -DHAVE_FUNC_ATTRIBUTE_FORMAT
-DHAVE_FUNC_ATTRIBUTE_PACKED -DHAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL
-DHAVE_FUNC_ATTRIBUTE_VISIBILITY -DHAVE_FUNC_ATTRIBUTE_ALIAS
-DHAVE_FUNC_ATTRIBUTE_NORETURN -DUSE_SSE41 -DUSE_GCC_ATOMIC_BUILTINS
-DUSE_X86_64_ASM -DMAJOR_IN_SYSMACROS -DHAVE_SYS_SYSCTL_H -DHAVE_LINUX_FUTEX_H
-DHAVE_ENDIAN_H -DHAVE_DLFCN_H -DHAVE_STRTOF -DHAVE_MKOSTEMP
-DHAVE_POSIX_MEMALIGN -DHAVE_TIMESPEC_GET -DHAVE_MEMFD_CREATE -DHAVE_STRTOD_L
-DHAVE_DLADDR -DHAVE_DL_ITERATE_PHDR -DHAVE_ZLIB -DHAVE_PTHREAD
-DHAVE_PTHREAD_SETAFFINITY -DHAVE_LIBDRM -DHAVE_LLVM=0x0600
-DMESA_LLVM_VERSION_PATCH=1 -DHAVE_WAYLAND_PLATFORM -DWL_HIDE_DEPRECATED
-DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS -Werror=implicit-function-declaration
-Werror=missing-prototypes -Werror=return-type -fno-math-errno
-fno-trapping-math -Wno-missing-field-initializers -Wno-format-truncation -O2
-Wall -D_FORTIFY_SOURCE=2 -fstack-protector-strong -funwind-tables
-fasynchronous-unwind-tables -fstack-clash-protection -DNDEBUG -fPIC -pthread
-D__STDC_FORMAT_MACROS -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS
-D__STDC_LIMIT_MACROS -fvisibility=hidden -Wno-override-init
-DVK_USE_PLATFORM_XCB_KHR -DVK_USE_PLATFORM_XLIB_KHR
-DVK_USE_PLATFORM_WAYLAND_KHR -DVK_USE_PLATFORM_DISPLAY_KHR
-DVK_USE_PLATFORM_XLIB_XRANDR_EXT  -MD -MQ
'src/amd/vulkan/src@amd@vulkan@@vulkan_radeon@sha/radv_pipeline.c.o' -MF
'src/amd/vulkan/src@amd@vulkan@@vulkan_radeon@sha/radv_pipeline.c.o.d' -o
'src/amd/vulkan/src@amd@vulkan@@vulkan_radeon@sha/radv_pipeline.c.o' -c
../src/amd/vulkan/radv_pipeline.c
In file included from ../src/vulkan/util/vk_alloc.h:29,
                 from ../src/amd/vulkan/radv_private.h:52,
                 from ../src/amd/vulkan/radv_debug.h:27,
                 from ../src/amd/vulkan/radv_pipeline.c:30:
../src/../include/vulkan/vulkan.h:54:10: fatal error: wayland-client.h: Datei
oder Verzeichnis nicht gefunden
 #include <wayland-client.h>
          ^~~~~~~~~~~~~~~~~~
compilation terminated.

The above command misses the include directory for wayland:
    -I/usr/include/wayland

The missing include is contained in the (until now) unused radv_deps:

if with_platform_wayland
  radv_deps += dep_wayland_client
  radv_flags += '-DVK_USE_PLATFORM_WAYLAND_KHR'
  libradv_files += files('radv_wsi_wayland.c')
endif

Fixes: 673dda8330 "meson: build "radv" vulkan driver for radeon hardware"
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 9401a2f2e6)
2018-12-04 12:30:52 +01:00
Juan A. Suarez Romero
28c913f1f9 cherry-ignore: mesa: Revert INTEL_fragment_shader_ordering support
pick: While this commit does not include the proper CC tag, it was
intended to be applied only in 18.3 branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-12-04 12:16:37 +01:00
Gurchetan Singh
644f1941ec virgl: don't mark buffers as unclean after a write
We can mark the buffer unclean if it's ever bound as a TBO,
SSBO, ABO, or image.

This improves

dEQP-GLES3.performance.buffer.data_upload.function_call.map_buffer_range.new_specified_buffer.flag_write_full.stream_draw

from 9.58 MB/s to 451.17 MB/s.

v2: Track buffer cleanliness as a function of bindings (Ilia).
v3: virgl_modify_clean --> virgl_dirty_res (Erik)

Tested-By: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
(cherry picked from commit 89b4798c06)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/gallium/drivers/virgl/virgl_encode.c
2018-12-03 16:55:40 +01:00
Gurchetan Singh
d058dc4aa3 virgl: avoid large inline transfers
We flush everytime the command buffer (16 kB) is full, which is
quite costly.

This improves

dEQP-GLES3.performance.buffer.data_upload.function_call.buffer_data.new_buffer.usage_stream_draw

from 111.16 MB/s to 1930.36 MB/s.

In addition, I made the benchmark produce buffers from 0 --> VIRGL_MAX_CMDBUF_DWORDS * 4,
and tried ((VIRGL_MAX_CMDBUF_DWORDS * 4) / 2), ((VIRGL_MAX_CMDBUF_DWORDS * 4) / 4), etc.

I didn't notice any clear differences, so let's just go with the most obvious
heuristic.

Tested-By: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
(cherry picked from commit d18492c64f)
2018-12-03 16:51:22 +01:00
Gurchetan Singh
bf482d48f4 virgl: quadruple command buffer size
Tested running WebGL aquarium on Nvidia host (10,000 fishes)

This moves us from 7 fps to 9 fps.  After quadrupling, performance
gains diminish.

v2: Remove change ID (Erik)

Tested-By: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
(cherry picked from commit c0773315af)
2018-12-03 16:49:00 +01:00
Karol Herbst
1c52d56be8 nv50,nvc0: Fix gallium nine regression regarding sampler bindings
The new approach is that samplers don't get unbound even if they won't be used
in a draw and we should just leave them be as well.

Fixes a regression in multiple windows games using gallium nine and nouveau.

v2: adjust num_samplers to keep track of the highest sampler bound
v3: rework how to set the new value of num_samplers

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106577
Fixes: 4d6fab245e
       "cso: don't track the number of sampler states bound"
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit fc0139d283)
2018-12-03 16:44:09 +01:00
Vinson Lee
828e18b58f st/xvmc: Add X11 include path.
This patch fixes this build error.

  CC       tests/xvmc_bench.o
In file included from tests/xvmc_bench.c:35:
tests/testlib.h:38:10: fatal error: 'X11/Xlib.h' file not found
         ^~~~~~~~~~~~

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 4f74580d30)
2018-12-03 16:40:58 +01:00
Juan A. Suarez Romero
c26f7b3441 cherry-ignore: freedreno: Fix autotools build.
fixes: This commit fixes commits b4476138d5 and aa0fed10d3 which did
not land in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-30 12:33:58 +01:00
Eric Engestrom
b3fb3fd10e vulkan/wsi: fix s/,/;/ typo
Fixes: 59e58c348e "vulkan/wsi: Only wait on semaphores on the first swapchain"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit e0f1f74eda)
2018-11-30 12:16:36 +01:00
Eric Engestrom
5a45e5538f wsi/display: fix mem leak when freeing swapchains
Fixes: da997ebec9 "vulkan: Add KHR_display extension using DRM [v10]"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Keith Packard <keithp@keithp.com>
(cherry picked from commit 9575cd2893)
2018-11-30 12:12:22 +01:00
Bas Nieuwenhuizen
fbe7b48d71 radv: Clamp gfx9 image view extents to the allocated image extents.
Mirrors AMDVLK. Looks like if we go over the alignment of height
we actually start to change the addressing. Seems like the extra
miplevels actually work with this.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108245
Fixes: f6cc15dccd "radv/gfx9: fix block compression texture views. (v2)"
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 08ea6b9d9b)
2018-11-30 11:32:39 +01:00
Eric Engestrom
d5e3935ecb anv: correctly use vulkan 1.0 by default
Per chapter 3.2 "Instances":
> Providing a NULL VkInstanceCreateInfo::pApplicationInfo or providing
> an apiVersion of 0 is equivalent to providing an apiVersion of
> VK_MAKE_VERSION(1,0,0).

Reported-by: Niklas Haas <git@haasn.xyz>
Fixes: 8c048af589 "anv: Copy the appliation info into the instance"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 56d126f8fd)
2018-11-30 11:28:47 +01:00
Lionel Landwerlin
3feae1e53f anv: flush pipeline before query result copies
Pipeline state pending bits should be taken into account when copying
results.

In the particular bug below, the results of the
vkCmdCopyQueryPoolResults() command was being overwritten by the
preceding vkCmdCopyBuffer() with a same destination buffer. This is
because we copy the buffers using the 3D pipeline whereas we copy the
query results using the command streamer. Those pieces of HW work in
parallel and the results are somewhat undefined.

v2: Unconditionally flush the pipeline before copying the results
    (Jason)

v3: Wrap & expressions (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108894
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 37f9788e9a)
2018-11-30 11:22:50 +01:00
Thomas Hellstrom
5df893b13c winsys/svga: Fix a memory leak
The ioctl.cap_3d member was never freed.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 058f85d41c)
2018-11-30 11:10:17 +01:00
Thomas Hellstrom
30cebff87d st/xa: Fix a memory leak
Free the context after destruction.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 7fce3ca375)
2018-11-30 10:58:38 +01:00
Dave Airlie
90ed597483 r600: make suballocator 256-bytes align
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108311
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 2ddd44d941)
2018-11-30 10:50:45 +01:00
Nicolai Hähnle
555a629b35 egl/wayland: rather obvious build fix
Fixes: ce74a7bb8d ("egl/wayland: plug memory leak in drm_handle_device()")
Fixes: c59d3aa4b9 ("egl/wayland: bail out when drmGetMagic fails")
(cherry picked from commit c02390f8fc)
2018-11-30 10:45:43 +01:00
Emil Velikov
bf14779a83 egl/wayland: plug memory leak in drm_handle_device()
As we fail to open the node, we leak the node/device name.

v2: Log and then free() (Eric)

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit ce74a7bb8d)
2018-11-30 10:44:03 +01:00
Emil Velikov
79c4bf0dac egl/wayland: bail out when drmGetMagic fails
Currently as the function fails, we pass uninitialized data to the
authentication function. Stop doing that and print an warning when
the function fails.

v2: Plug memory leak in error path (Eric)

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit c59d3aa4b9)
2018-11-30 10:34:06 +01:00
Bas Nieuwenhuizen
c14ed49445 radv: Align large buffers to the fragment size.
Improves performance in Talos by about 15% (and significant improvements
in RotR and possibly other but did not bench with final patch) on
kernel 4.19 and earlier.

On 4.20+ a similar effect comes from

433ca054949a "drm/amdgpu: try allocating VRAM as power of two"

v2: Do not impact the alignment of the physical memory.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 6569644bb6)
2018-11-30 10:29:35 +01:00
Juan A. Suarez Romero
cfd1f8b92c docs: add sha256 checksums for 18.2.6
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-28 19:14:21 +01:00
Juan A. Suarez Romero
3e741344d7 docs: add release notes for 18.2.6
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-28 18:39:26 +01:00
Juan A. Suarez Romero
cbbe3b0acd Update version to 18.2.6
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-28 18:38:40 +01:00
Juan A. Suarez Romero
474690cfa4 docs: add sha256 checksums for 18.2.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-28 18:37:11 +01:00
Juan A. Suarez Romero
54f36ed156 cherry-ignore: mesa/main: fix incorrect depth-error
fixes: This commit requires commits 854202f70e6 and 84bc5738401 which
did not land in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-26 13:01:26 +01:00
Erik Faye-Lund
fe4bf97af2 mesa/main: remove bogus error for zero-sized images
The explanation quotes the spec on the following wording to justify the
error:

"An INVALID_VALUE error is generated if xoffset + width is greater than
 the texture’s width, yoffset + height is greater than the  texture’s
 height, or zoffset + depth is greater than the texture’s depth."

However, this shouldn't generate an error in the case where *all three*
of width, xoffset and the texture's width are zero. In this case, we end
up generating an unspecified error.

So let's remove this check, and instead make sure that we consider this
as an empty texture.

So let's not generate an error, there's non mandated in the spec in
xoffset/yoffset/zoffset = 0 case. We already avoid doing any work in
this case, because of the final, non-error generating check in this
function.

Fixes: b37b35a5d2 "getteximage: assume texture image is empty for non defined levels"
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
(cherry picked from commit 38bbb61252)
2018-11-26 12:44:18 +01:00
Gert Wollny
4fbc68be1a glsl: free or reuse memory allocated for TF varying
When a shader program is de-serialized the gl_shader_program passed in
may actually still hold memory allocations for the transform feedback
varyings. If that is the case, free the varying names and reallocate
the new storage for the names array.

This fixes a memory leak:
Direct leak of 48 byte(s) in 6 object(s) allocated from:
 in malloc (/usr/lib64/gcc/x86_64-pc-linux-gnu/7.3.0/libasan.so+0xdb880)
 in transform_feedback_varyings ../../samba/mesa/src/mesa/main/transformfeedback.c:875
 in _mesa_TransformFeedbackVaryings ../../samba/mesa/src/mesa/main/transformfeedback.c:985
 ...
Indirect leak of 42 byte(s) in 6 object(s) allocated from:
  in __interceptor_strdup (/usr/lib64/gcc/x86_64-pc-linux-gnu/7.3.0/libasan.so+0x761c8)
  in transform_feedback_varyings ../../samba/mesa/src/mesa/main/transformfeedback.c:887
  in _mesa_TransformFeedbackVaryings ../../samba/mesa/src/mesa/main/transformfeedback.c:985

Fixes: ab2643e4b0
   glsl: serialize data from glTransformFeedbackVaryings

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit f5d053702f)
2018-11-26 12:22:16 +01:00
Bas Nieuwenhuizen
8ff6cd6569 radv: Fix opaque metadata descriptor last layer.
We used the layer count which results in an off by one error.

Not sure this really affects anything.

Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 3c96a1e3a9)
2018-11-26 12:18:36 +01:00
Marek Olšák
f79db2c0c2 winsys/amdgpu: fix a device handle leak in amdgpu_winsys_create
Cc: 18.2 18.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit d4e7d8b7f0)
2018-11-26 12:13:55 +01:00
Marek Olšák
bae84d6d11 winsys/amdgpu: fix a buffer leak in amdgpu_bo_from_handle
Cc: 18.2 18.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 82aa07f81f)
2018-11-26 12:10:24 +01:00
Eric Engestrom
841ae70a23 glapi: add missing visibility args
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108829
Fixes: 3218056e0e "meson: Build i965 and dri stack"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 896c59d690)
2018-11-23 10:30:24 +01:00
Jason Ekstrand
35379ec233 anv: Put robust buffer access in the pipeline hash
It affects apply_pipeline_layout.  Shaders compiled with the wrong value
will work but they may not be robust as requested by the app.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit 617e402b3d)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_pipeline.c
2018-11-23 10:24:38 +01:00
Gert Wollny
c9e8fa6c47 r600: clean up the GS ring buffers when the context is destroyed
This fixes two memory leaks reported by ASAN:

Direct leak of 248 byte(s) in 1 object(s) allocated from:
   in malloc (/usr/lib64/gcc/x86_64-pc-linux-gnu/7.3.0/libasan.so+0xdb880)
   in r600_alloc_buffer_struct ../../samba/mesa/src/gallium/drivers/r600/r600_buffer_common.c:578
   in r600_buffer_create ../../samba/mesa/src/gallium/drivers/r600/r600_buffer_common.c:600
   in r600_resource_create_common ../../samba/mesa/src/gallium/drivers/r600/r600_pipe_common.c:1265
   in r600_resource_create ../../samba/mesa/src/gallium/drivers/r600/r600_pipe.c:725
   in pipe_buffer_create ../../samba/mesa/src/gallium/auxiliary/util/u_inlines.h:291
   in update_gs_block_state ../../samba/mesa/src/gallium/drivers/r600/r600_state_common.c:1482

Direct leak of 248 byte(s) in 1 object(s) allocated from:
   in malloc (/usr/lib64/gcc/x86_64-pc-linux-gnu/7.3.0/libasan.so+0xdb880)
   in r600_alloc_buffer_struct ../../samba/mesa/src/gallium/drivers/r600/r600_buffer_common.c:578
   in r600_buffer_create ../../samba/mesa/src/gallium/drivers/r600/r600_buffer_common.c:600
   in r600_resource_create_common ../../samba/mesa/src/gallium/drivers/r600/r600_pipe_common.c:1265
   in r600_resource_create ../../samba/mesa/src/gallium/drivers/r600/r600_pipe.c:722
   in pipe_buffer_create ../../samba/mesa/src/gallium/auxiliary/util/u_inlines.h:291
   in update_gs_block_state ../../samba/mesa/src/gallium/drivers/r600/r600_state_common.c:1489

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Fixes: 1371d65a7f
  r600g: initial support for geometry shaders on evergreen (v2)
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
(cherry picked from commit 61b535437e)
2018-11-22 10:01:33 +01:00
Andrii Simiklit
66198a088c i965/batch: avoid reverting batch buffer if saved state is an empty
There's no point reverting to the last saved point if that save point is
the empty batch, we will just repeat ourselves.

v2: Merge with new commits, changes was minimized, added the 'fixes' tag
v3: Added in to patch series
v4: Fixed the regression which was introduced by this patch
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108630
    Reported-by:  Mark Janes <mark.a.janes@intel.com>
    The solution provided by: Jordan Justen <jordan.l.justen@intel.com>

CC: Chris Wilson <chris@chris-wilson.co.uk>
Fixes: 3faf56ffbd "intel: Add an interface for saving/restoring
                     the batchbuffer state."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107626
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108630 (fixed in v4)
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit b787dcf57b)
2018-11-21 10:12:25 +01:00
Emil Velikov
31ec3e2814 travis: adding missing x11-xcb for meson+vulkan
Required by the x11 WSI

Fixes: df82012b2c ("travis: add meson build for vulkan drivers.")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 982e012b3a)
2018-11-21 10:12:25 +01:00
Emil Velikov
f05ce9dc51 glx: make xf86vidmode mandatory for direct rendering
Currently we detect the module and if missing, the glXGetMsc* API is
effectively a stub, always returning false.

This is what effectively has been happening with our meson build :-(

Thus users have no chance of using it - they cannot even distinguish
if the failure is due to a misconfigured build.

There's no reason for keeping xf86vidmode optional - it has been
available in all distributions for years.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: a47c525f32 "meson: build glx"
(cherry picked from commit 5bc509363b)
2018-11-21 10:12:25 +01:00
Emil Velikov
6ceeb848d5 travis: drop unneeded x11proto-xf86vidmode-dev
The only place where the package is needed is for building the DRI
based libGL library.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 84445a86d1)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	.travis.yml
2018-11-21 10:12:25 +01:00
Juan A. Suarez Romero
5ac61c038a cherry-ignore: intel/aub_viewer: Print blend states properly
extra: intel/aub_viewer is not present in branch

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-21 10:12:25 +01:00
Juan A. Suarez Romero
d8a456d012 cherry-ignore: intel/aub_viewer: fix dynamic state printing
extra: intel/aub_viewer is not present in branch

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-21 10:12:25 +01:00
Lionel Landwerlin
842be2ed22 egl/dri: fix error value with unknown drm format
According to the EGL_EXT_image_dma_buf_import spec, creating an EGL
image with a DRM format not supported should yield the BAD_MATCH
error :

"
       * If <target> is EGL_LINUX_DMA_BUF_EXT, and the EGL_LINUX_DRM_FOURCC_EXT
         attribute is set to a format not supported by the EGL, EGL_BAD_MATCH
         is generated.
"

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 20de7f9f22 ("egl/dri2: support for creating images out of dma buffers")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit 1c56d21156)
2018-11-21 10:12:25 +01:00
Brian Paul
546c4b2db0 scons/svga: remove opt from the list of valid build types
This reverts commit a5fd54f8bf.

The whole point was to add a way to pass -DVMX86_STATS to the build,
but we can do that with a command line argument when we invoke scons.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
(cherry picked from commit d6be0b5556)
2018-11-21 10:12:25 +01:00
Dylan Baker
222a646de3 meson: Don't force libva to required from auto
We already correctly handle va being auto, but we force it to being
true, which is bad.

Fixes 94cf397092
      ("meson: Fix auto option for va")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

(cherry picked from commit 509ea4649a)
2018-11-21 10:12:25 +01:00
Emil Velikov
796299dfc7 bin/get-pick-list.sh: handle reverts prior to the branchpoint
Currently we detect when a breaking commit:
 - has landed in stable, and
 - is referenced by a untagged fix in master

Yet we did not consider the case of breaking commit:
 - prior to the branchpoint, and
 - is referenced by a untagged fix in master

Addressing the latter is extremely slow, due to the size of the lookup.

That said, we can trivially use the existing is_sha_nomination() helper
to catch reverts.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit adbdfc6666)
2018-11-21 10:12:25 +01:00
Emil Velikov
b783bd1f07 bin/get-pick-list.sh: use test instead of [ ]
Latter is rather picky wrt surrounding white space. The explicit `test`
doesn't have that problem, plus the statements read a bit easier.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit c0012a0708)
2018-11-21 10:12:25 +01:00
Emil Velikov
d9f7b43456 bin/get-pick-list.sh: handle unofficial "broken by" tag
We have a number of cases were devs will use a tag "broken by".
While it's not something officially documented or recommended, checking
for it is trivial enough.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 77ff0bfb5f)
2018-11-21 10:12:25 +01:00
Emil Velikov
ea94b3c877 bin/get-pick-list.sh: handle fixes tag with missing colon
Every so often, we forget to add the colon after "fixes". Trivially
tweak the script to catch it.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 209525aafb)
2018-11-21 10:12:25 +01:00
Emil Velikov
0508613b4b bin/get-pick-list.sh: flesh out is_sha_nomination
Refactor is_fixes_nomination into a is_sha_nomination helper. This way
we can reuse it for more than the usual "Fixes:" tag.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit b7418d1f3f)
2018-11-21 10:12:25 +01:00
Emil Velikov
d4c31fd25d bin/get-pick-list.sh: tweak the commit sha matching pattern
Currently we match on:
 - any arbitrary length of,
 - any a-z A-Z and 0-9 characters

At the same time, a commit sha consists of lowercase hexadecimal
numbers. Any sha shorter than 8 characters is ambiguous - in some cases
even 11+ are required.

So change the pattern to a-f0-9 and adjust the length to 8-40.

As we're here we could use a single grep, instead of the grep/sed combo.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 533fead423)
2018-11-21 10:12:25 +01:00
Emil Velikov
2e78038ac5 bin/get-pick-list.sh: handle the fixes tag
Having a separate script to handle the fixes tag, brings a number of
issues, so let's fold it in get-pick-list.sh.

v2:
 - pass the sha as argument to the function
 - Keep original sed pattern

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 181203f3c5)
2018-11-21 10:12:25 +01:00
Emil Velikov
f812820702 bin/get-pick-list.sh: handle "typod" usecase.
As the comment in get-typod-pick-list.sh says, there's little point in
having a duplicate file.

Add the new pattern + tag to get-pick-list.sh and nuke this file.

v2:
 - pass the sha as argument to the function
 - grep -q instead of using a variable (Eric)

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit e6b3a3b201)
2018-11-21 10:12:25 +01:00
Emil Velikov
1fb485efa7 bin/get-pick-list.sh: prefix output with "[stable] "
With later commits we'll fold all the different scripts into one.
Add the explicit prefix, so that we know the origin of the nomination

v2:
 - pass the sha as argument to the function
 - swap $tag = none for an else statment (Juan)
 - grep -q instead of using a variable (Eric)
 - print the tag and commit oneline separately (Eric)

v3:
 - drop unused "tag=none" assignment (Juan)
 - typo nomination

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> (v2)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit fac10169bb)
2018-11-21 10:12:25 +01:00
Emil Velikov
4c2b1b6567 bin/get-pick-list.sh: simplify git oneline printing
Currently we force disable the pager via "|cat" where --no-pager
exists. Additionally we could use git show instead of git log -n1.

Use those for a slightly more understandable code.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 559c32d241)
2018-11-21 10:12:25 +01:00
Kenneth Graunke
f982ce6f0a i965: Add PCI IDs for new Amberlake parts that are Coffeelake based
See commit c0c46ca461f136a0ae1ed69da6c874e850aeeb53 in the Linux kernel,
where José Roberto de Souza added this new PCI ID there.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
(cherry picked from commit 5bd8369681)
2018-11-21 10:12:25 +01:00
Rodrigo Vivi
3f65d18249 intel: Introducing Whiskey Lake platform
Whiskey Lake uses the same gen graphics as Coffe Lake, including some
ids that were previously marked as reserved on Coffe Lake, but that
now are moved to WHL page.

This follows the ids and approach used on kernel's commit
b9be78531d27 ("drm/i915/whl: Introducing Whiskey Lake platform")
and commit c1c8f6fa731b ("drm/i915: Redefine some Whiskey Lake SKUs")

v2: Lionel noticed that GT{1,2,3} on kernel wasn't following
spec when looking to number of EUs, so kernel has been updated.

Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 24db1c7fcc)
2018-11-21 10:12:25 +01:00
Rodrigo Vivi
a4a02d6966 intel: Introducing Amber Lake platform
Amber Lake uses the same gen graphics as Kaby Lake, including a id
that were previously marked as reserved on Kaby Lake, but that
now is moved to AML page.

This follows the ids and approach used on kernel's commit
e364672477a1 ("drm/i915/aml: Introducing Amber Lake platform")

Reported-by: Timo Aaltonen <timo.aaltonen@canonical.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit e8c42ed4ab)
2018-11-21 10:12:25 +01:00
Rodrigo Vivi
683d0a9efe intel: aubinator: Adding missed platforms to the error message.
Many new platforms got added to gen_device_name_to_pci_device_id()
but the error message inside aubinator didn't reflected those
changes. So syncing on the same order to be sure that we are not
missing any now.

Cc: Anuj Phogat <anuj.phogat@gmail.com>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 886a048feb)
2018-11-21 10:12:25 +01:00
Rodrigo Vivi
4a7566e8b8 i965: Add a new CFL PCI ID.
One more CFL ID added to spec.

Align with kernel commit d0e062ebb3a4 ("drm/i915/cfl:
Add a new CFL PCI ID.")

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 44f1dcf9b3)
2018-11-21 10:12:25 +01:00
Eric Anholt
03bcda3998 vc4: Make sure we make ro scanout resources for create_with_modifiers.
The DRI3 create_with_modifiers paths don't set tmpl.bind to SCANOUT or
SHARED, with the theory that given that you've got modifiers, that's all
you need.  However, we were looking at the tmpl.bind for setting up the
KMS handle in the renderonly case, so we'd end up trying to use vc4's
handle on the hx8357d fd.

Fixes: 84ed8b67c5 ("vc4: Set shareable BOs as T tiled if possible")
(cherry picked from commit cc0bc76a38)
2018-11-21 10:12:25 +01:00
Danylo Piliaiev
e1c9741111 i965: Fix calculation of layers array length for isl_view
Handle all cases in calculation of layers count for isl_view
taking into account texture view and image unit.
st_convert_image was taken as a reference.

When u->Layered is true the whole level is taken with respect to
image view. In other case only one layer is taken.

v3: (Józef Kucia and Ilia Mirkin)
    - Rewrote patch by taking st_convert_image as a reference
    - Removed now unused get_image_num_layers function
    - Changed commit message

v4: (Jason Ekstrand)
    - Added assert

Fixes: 5a8c8903
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107856

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit f9fd0cf479)
2018-11-21 10:12:25 +01:00
Eric Engestrom
83f1f6517a egl: add missing glvnd entrypoint for EGL_ANDROID_blob_cache
Fixes dEQP-EGL.functional.get_proc_address.extension.egl_android_blob_cache
on builds with glvnd enabled.

Fixes: 6f5b57093b "egl: add support for EGL_ANDROID_blob_cache"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit c973364967)

Squashed with:

egl: fix bad rebase

I screwed up a rebase over a refactor and didn't notice locally because
the uncommitted refactor hid the issue.

Fixes: c973364967 "egl: add missing glvnd entrypoint for EGL_ANDROID_blob_cache"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 2b2f790e59)
2018-11-21 10:12:24 +01:00
Eric Engestrom
21f97a6b38 meson: fix wayland-less builds
Those empty variables in the !wayland case are useless and running that
meson.build with them breaks the build:

  [287/850] Generating wayland-drm-client-protocol.h with a custom command.
  FAILED: src/egl/wayland/wayland-drm/wayland-drm-client-protocol.h
  client-header ../src/egl/wayland/wayland-drm/wayland-drm.xml src/egl/wayland/wayland-drm/wayland-drm-client-protocol.h
  /bin/sh: client-header: command not found
  ninja: build stopped: subcommand failed.

Fixes: d1992255bb "meson: Add build Intel "anv" vulkan driver"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 4fa2fb3524)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	meson.build
2018-11-21 10:12:24 +01:00
Eric Engestrom
7a5bbce761 gbm: remove unnecessary meson include
`inc_wayland_drm` is only used if wayland is built, and it's already
added in that case a few lines below.

Fixes: a29869e872 "gbm: Don't traverse backwards for includes"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 7df80de6e6)
2018-11-21 10:12:24 +01:00
Eric Engestrom
dad68bbdc1 meson: only run vulkan's meson.build when building vulkan
Fixes: d1992255bb "meson: Add build Intel "anv" vulkan driver"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 3832db275e)
2018-11-21 10:12:24 +01:00
Gert Wollny
64f17d660e mesa: Reference count shaders that are used by transform feedback objects
Transform feedback objects may hold a pointer to a shader program, and
at least in Gallium, this must be a valid pointer until
ctx->Driver.EndTransformFeedback in glEndTransformFeedback has been called
- which is conform with the spec that any program that is part of a
current rendering state should only be flagged for deletion by glDeleteProgram.
This was not handled properly for the transform feedback objects so that
a call sequence

  glUseProgram(x)
  glBeginTransformFreedback(...)
  glPauseTransformFeedback(...)
  glDeleteProgram(x)
  glEndTransformFeedback(...)

would result in a use after free bug. With this patch the transform
feedback object also updates the reference count to the used program
thereby keeping the program valid as long as the transform feedback
objects links to it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108713
Fixes: 654587696b
       mesa: add end_transform_feedback() helper

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit caa964b422)
2018-11-21 10:12:24 +01:00
Dylan Baker
94161eed7d meson: Don't set -Wall
meson does this for you with its warn levels, so we don't need to set
it ourselves.

Fixes: d1992255bb
       ("meson: Add build Intel "anv" vulkan driver")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 9c2a95b298)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	meson.build
2018-11-21 10:12:24 +01:00
Jason Ekstrand
7c8664982f nir/lower_alu_to_scalar: Don't try to lower unpack_32_2x16
It messes up when trying to lower.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
(cherry picked from commit 4266932c0b)
2018-11-21 10:12:24 +01:00
Karol Herbst
ef6dabbb28 nir/spirv: cast shift operand to u32
v2: fix for specialization constants as well

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Karol Herbst <kherbst@redhat.com>
(cherry picked from commit b4380cb070)
2018-11-21 10:12:24 +01:00
Juan A. Suarez Romero
005fe7e03b cherry-ignore: add explicit 18.3 only nominations
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-21 10:12:24 +01:00
Juan A. Suarez Romero
f34bddc325 docs: add release notes for 18.2.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-15 11:58:11 +00:00
Juan A. Suarez Romero
1a56538cc6 Update version to 18.2.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-15 11:53:04 +00:00
Eric Engestrom
82faa8067a meson: install KHR/khrplatform.h when needed
Fixes: f7d42ee7d3 "include: update GL & GLES headers (v2)"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit e02f061b69)
2018-11-14 10:02:17 +01:00
Marek Olšák
06eb33960e include: update GL & GLES headers (v2)
v2: use correct files

Acked-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit f7d42ee7d3)
2018-11-14 09:51:51 +01:00
Eric Engestrom
2645ea5817 configure: install KHR/khrplatform.h when needed
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107511
Fixes: f7d42ee7d3 "include: update GL & GLES headers (v2)"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Tested-by: Brad King <brad.king@kitware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 87c156183c)
2018-11-14 09:48:24 +01:00
Dylan Baker
639d915b83 meson: fix libatomic tests
There are two problems:
1) the extra underscore in MISSING_64BIT_ATOMICS
2) we should link with libatomic if the previous test decided we needed
   it

Fixes: d1992255bb
       ("meson: Add build Intel "anv" vulkan driver")
Reviewed-and-Tested-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 4eab98b66e)
2018-11-14 09:45:48 +01:00
Matt Turner
3f5ac7b8a1 util/ralloc: Make sizeof(linear_header) a multiple of 8
Prior to this patch sizeof(linear_header) was 20 bytes in a
non-debug build on 32-bit platforms. We do some pointer arithmetic to
calculate the next available location with

   ptr = (linear_size_chunk *)((char *)&latest[1] + latest->offset);

in linear_alloc_child(). The &latest[1] adds 20 bytes, so an allocation
would only be 4-byte aligned.

On 32-bit SPARC a 'sttw' instruction (which stores a consecutive pair of
4-byte registers to memory) requires an 8-byte aligned address. Such an
instruction is used to store to an 8-byte integer type, like intmax_t
which is used in glcpp's expression_value_t struct.

As a result of the 4-byte alignment returned by linear_alloc_child() we
would generate a SIGBUS (unaligned exception) on SPARC.

According to the GNU libc manual malloc() always returns memory that has
at least an alignment of 8-bytes [1]. I think our allocator should do
the same.

So, simple fix with two parts:

   (1) Increase SUBALLOC_ALIGNMENT to 8 unconditionally.
   (2) Mark linear_header with an aligned attribute, which will cause
       its sizeof to be rounded up to that alignment. (We already do
       this for ralloc_header)

With this done, all Mesa's unit tests now pass on SPARC.

[1] https://www.gnu.org/software/libc/manual/html_node/Aligned-Memory-Blocks.html

Fixes: 47e1758692 ("glcpp: use the linear allocator for most objects")
Bug: https://bugs.gentoo.org/636326
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit efb1ccadca)
2018-11-14 09:41:14 +01:00
Matt Turner
4a8ce6291d util/ralloc: Switch from DEBUG to NDEBUG
The debug code is all asserts, so protect it with the same thing that
controls assert.

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 7e3748c268)
2018-11-14 09:37:27 +01:00
Timothy Arceri
cad2254121 nir: don't pack varyings ints with floats unless flat
Fixes: 1c9c42d16b ("nir: add varying component packing helpers")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit a068958692)
2018-11-12 09:28:42 +01:00
Timothy Arceri
d03f9a05ea nir: add glsl_type_is_integer() helper
Fixes: 1c9c42d16b ("nir: add varying component packing helpers")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 9dd737bb02)
2018-11-12 09:22:51 +01:00
Andre Heider
0583e3133f st/nine: fix stack corruption due to ABI mismatch
This fixes various crashes and hangs when using nine's 'thread_submit'
feature.

On 64bit, the thread function's data argument would just be NULL.
On 32bit, the data argument would be garbage depending on the compiler
flags (in my case -march>=core2).

Fixes: f3fa7e3068 ("st/nine: Use WINE thread for threadpool")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
(cherry picked from commit 10598c9667)
2018-11-12 08:19:36 +00:00
Sergii Romantsov
ff85e527e0 autotools: library-dependency when no sse and 32-bit
Building of 32bit Mesa may fail if __SSE__ is not specified.
Added missed dependency from libm.

v2: avoided dependecy on any flag, just link

v3: meson doesn't fail, but have added dependency on libm

CC: Dylan Baker <dylan@pnwbakers.com>
CC: Lionel G Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108560
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit ce837a5372)
2018-11-09 09:55:06 +01:00
Samuel Pitoiset
98c5522d8d radv: only expose VK_SUBGROUP_FEATURE_ARITHMETIC_BIT for VI+
Inclusive and exclusives scan are missing because older chips
don't have llvm.amdgcn.update.dpp.

This fixes crashes with dEQP-VK.subgroups.arithmetic.*.

CC: mesa-stable@lists.freedesktop.org
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 0dcd99c687)
2018-11-09 09:46:27 +01:00
Samuel Pitoiset
cbd9b4a95d radv: disable conditional rendering for vkCmdCopyQueryPoolResults()
VK_EXT_conditional_rendering says that copy commands should not be
affected by conditional rendering.

Cc: 18.2 18.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 0a0aa2ba6c)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/amd/vulkan/radv_query.c
2018-11-08 10:11:47 +01:00
Eric Engestrom
9c7c711332 wsi/wayland: only finish() a successfully init()ed display
Fixes: 4369102498 "vulkan/wsi/wayland: Stop caching Wayland displays"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
(cherry picked from commit d515ded4d9)
2018-11-07 10:27:29 +01:00
Eric Engestrom
21dfd29996 wsi/wayland: use proper VkResult type
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit dcee22afed)
2018-11-07 10:27:12 +01:00
Lionel Landwerlin
c2b252ceed anv/android: mark gralloc allocated BOs as external
Allocating through Gralloc implies buffers are going to be used
outside the driver. We have special MOCS settings for external BOs and
we probably want to use them here too.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a1220e7311 ("anv/android: Set the BO flags in bo_cache_import (v2)")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 421fa01d64)
2018-11-07 10:26:45 +01:00
Olivier Fourdan
cc67222756 wayland/egl: Resize EGL surface on update buffer for swrast
After commit a9fb331ea ("wayland/egl: update surface size on window
resize"), the surface size is updated as soon as the resize is done, and
`update_buffers()` would resize only if the surface size differs from
the attached size.

However, in the case of swrast, there is no resize callback and the
attached size is updated in `dri2_wl_swrast_commit_backbuffer()` prior
to the `swrast_update_buffers()` so the attached size is always up to
date when it reaches `swrast_update_buffers()` and the surface is never
resized.

This can be observed with "totem" using the GDK backend on Wayland (the
default) when running on software rendering:

  $ LIBGL_ALWAYS_SOFTWARE=true CLUTTER_BACKEND=gdk totem

Resizing the window would leave the EGL surface size unchanged.

To avoid the issue, partially revert the part of commit a9fb331ea for
`swrast_update_buffers()` and resize on the win size and not the
attached size.

Fixes: a9fb331ea - wayland/egl: update surface size on window resize
Signed-off-by: Olivier Fourdan <ofourdan@redhat.com>
CC: Daniel Stone <daniel@fooishbar.org>
CC: Juan A. Suarez Romero <jasuarez@igalia.com>
CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
(cherry picked from commit 55af17ffed)
2018-11-07 10:26:45 +01:00
Gert Wollny
407e3e5a89 virgl/vtest-winsys: Use virgl version of bind flags
The bind flags defined by mesa/gallium might not always be in sync
with the ones copied to virglrenderer/gallium. Therefore, use the
flags defined in virgl like it is done for all the other calls to
create resources.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit b710680093)
2018-11-07 10:26:45 +01:00
Emil Velikov
9476cec273 m4: add Werror when checking for compiler flags
Seemingly that at some point clang started accepting _any_ flags,
whereas previously it would error out.

These days, you can give it -Whamsandwich and it will succeed, while
at the same time throwing an annoying warning.

Add -Werror so that everything gets flagged and set accordingly.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108082
Cc: Vinson Lee <vlee@freedesktop.org>
Repored-by: Vinson Lee <vlee@freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 29283921b7)
2018-11-07 10:26:45 +01:00
Juan A. Suarez Romero
7a3e47e5e6 cherry-ignore: i965/batch: avoid reverting batch buffer if saved state is an empty
fixes: This commit was reverted by commit 5f312e95f8.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-07 10:26:45 +01:00
Emil Velikov
ab5990fe82 egl/glvnd: correctly report errors when vendor cannot be found
If the user provides an invalid display or device the ToVendor lookup
will fail.

In this case, the local [Mesa vendor] error code will be set. Thus on
sequential eglGetError(), the error will be EGL_SUCCESS.

To be more specific, GLVND remembers the last vendor and calls back
into it's eglGetError, although there's no guarantee to ever have had
one.

v2:
 - Add _eglError call, so the debug callback is executed (Kyle)
 - Drop XXX comment.

Piglit: tests/egl/spec/egl_ext_device_query
Fixes: ce562f9e3f ("EGL: Implement the libglvnd interface for EGL (v3)")
Cc: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kyle Brenneman <kbrenneman@nvidia.com>
(cherry picked from commit b3ade65387)
2018-11-07 10:26:45 +01:00
Marek Olšák
d7a7fd28e5 st/va: fix incorrect use of resource_destroy
Fixes: 4373dd3215 ("st/va: Support YUV formats in vaCreateSurfaces")
Cc: Drew Davenport <ddavenport@chromium.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 04298a2f24)
2018-11-07 10:26:45 +01:00
Vinson Lee
e93e8dcf2e r600/sb: Fix constant logical operand in assert.
Fixes: da977ad907 ("r600/sb: start adding GDS support")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
(cherry picked from commit 64a9ed8848)
2018-11-06 13:16:07 +01:00
Dylan Baker
ece45ce5b2 meson: link gallium nine with pthreads
In some cases (not building with llvm, which automatically pulls in
pthreads) nine needs to be directly linked with pthreads. Fixes building
on x86 (32 bit) without llvm.

Distro bug: https://bugs.gentoo.org/670094
Fixes: 6b4c7047d5
       ("meson: build gallium nine state_tracker")
Tested-by: Rafal Lalik <rafallalik@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

(cherry picked from commit 7652931d33)
2018-11-06 13:16:07 +01:00
Timothy Arceri
c78ca0fe86 st/glsl_to_nir: fix next_stage gathering
ffs() just returns the bit that is set, we need to know what
stage that bit represents so use u_bit_scan() instead.

Fixes: 2ca5d9548f ("st/glsl_to_nir: gather next_stage in shader_info")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 31596836fc)
2018-11-06 13:16:07 +01:00
Timothy Arceri
b54b748c7c st/mesa: calculate buffer size correctly for packed uniforms
Fixes: edded12376 ("mesa: rework ParameterList to allow packing")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 9ec4a5ef29)
2018-11-06 13:16:07 +01:00
Rhys Perry
3b9bb81ff6 glsl_to_tgsi: don't create 64-bit integer MAD/FMA
TGSI has no I64MAD/U64MAD opcode.

Fixes: 278580729a ('st/glsl_to_tgsi: add support for 64-bit integers')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 5172eb231d)
2018-11-06 13:16:07 +01:00
Andrii Simiklit
430ca812ee i965/batch: don't ignore the 'brw_new_batch' call for a 'new batch'
If we restore the 'new batch' using 'intel_batchbuffer_reset_to_saved'
function we must restore the default state of the batch using
'brw_new_batch' function because the 'intel_batchbuffer_flush'
function will not do it for the 'new batch' again.
At least the following fields of the batch
'state_base_address_emitted','aperture_space', 'state_used'
should be restored to default values to avoid:
1. the aperture_space overflow
2. the missed STATE_BASE_ADDRESS commad in the batch
3. the memory overconsumption of the 'statebuffer'
   due to uncleared 'state_used' field.
etc.

v2: merge with new commits, changes was minimized, added the 'fixes' tag
v3: added in to patch series

Fixes: 3faf56ffbd "intel: Add an interface for saving/restoring
                     the batchbuffer state."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107626
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit e4e0fd5ffe)
2018-11-06 13:16:07 +01:00
Vadym Shovkoplias
409838cea5 glsl/linker: Fix out variables linking during single stage
Since out variables are copied from shader objects instruction
streams to linked shader instruction steam it should be cloned
at first to keep source instruction steam unaltered.

Fixes: 966a797e43 ("glsl/linker: Link all out vars from a shader
objects on a single stage")

Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105731
(cherry picked from commit 7d66eddbbd)
2018-11-06 12:18:32 +01:00
Marek Olšák
0035940759 ac: fix ac_build_fdiv for f64
trivial

Fixes: a5f35aa742
(cherry picked from commit 8676af12c8)
2018-11-06 12:14:55 +01:00
Eric Engestrom
746659919f clover: add missing meson build dependency
Fixes: 42ea0631f1 "meson: build clover"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 1df0c1e8fb)
2018-11-06 12:11:01 +01:00
Eric Engestrom
6760093afe svga: add missing meson build dependency
Fixes: a537231b22 "meson: build svga driver on linux"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 98e7c3e7a7)
2018-11-06 12:07:59 +01:00
Juan A. Suarez Romero
614dd3a5fb cherry-ignore: add explicit 18.3 only nominations
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-11-06 11:58:15 +01:00
Jonathan Gray
f3d76bcefa intel/tools: include stdarg.h in error2aub
Include stdarg.h in error2aub.c otherwise it fails to build on
OpenBSD due to not finding definitions for va_list va_start va_end.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit ae8e81b0e3)
2018-11-06 11:48:26 +01:00
Juan A. Suarez Romero
624e384ea8 docs: add sha256 checksums for 18.2.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-10-31 19:55:05 +01:00
Juan A. Suarez Romero
1cdef5e70c docs: add release notes for 18.2.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-10-31 18:04:16 +00:00
Juan A. Suarez Romero
7e0f666710 Update version to 18.2.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-10-31 18:01:02 +00:00
Alok Hota
b5ecce3c6e swr/rast: fix intrinsic/function for LLVM 7 compatibility
Converted from x86 VFMADDPS intrinsic to generic LLVM intrinsic, and
removed createInstructionSimplifierPass, which were both removed in LLVM
7.0.0

These changes combine patches we received from the community and our own
internal patches

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tested-by: Chuck Atkins <chuck.atkins@kitware.com>
(cherry picked from commit 8c872ac2e3)
2018-10-29 11:35:13 +01:00
Rob Clark
c4bb9bc069 freedreno: don't flush when new and old pfb is identical
In the 'inorder' case (ie. FD_MESA_DEBUG=inorder, or old kernel), if the
u_blitter clear path is used (a3xx, a4xx, and some fallback cases on
newer gens), util_blitter_restore_fb_state() will set_framebuffer_state()
to something that is identical to the current fb state, which triggers
an unnecessary flush, and then eventually an assert:

  (gdb) bt
  #0  0x0000007fbf24a078 in kill () from /lib64/libc.so.6
  #1  0x0000007fbe061278 in _debug_assert_fail (expr=0x7fbe93a820 "!batch->flushed", file=0x7fbe93a628 "../src/gallium/drivers/freedreno/freedreno_batch.c", line=491, function=0x7fbe93a990 <__func__.17380> "fd_batch_check_size") at ../src/gallium/auxiliary/util/u_debug.c:322
  #2  0x0000007fbe1ccb8c in fd_batch_check_size (batch=0x55556d5a70) at ../src/gallium/drivers/freedreno/freedreno_batch.c:491
  #3  0x0000007fbe1d0e08 in fd_clear (pctx=0x55555c61e0, buffers=5, color=0x55556e388c, depth=1, stencil=0) at ../src/gallium/drivers/freedreno/freedreno_draw.c:463
  #4  0x0000007fbe57afa4 in st_Clear (ctx=0x55556e17b0, mask=18) at ../src/mesa/state_tracker/st_cb_clear.c:452

The assert was introduced in 4b847b38ae, so from a functionality
standpoint this patch fixes that commit.  But it should also avoid an
unnecessary flush in the 'inorder' case, fixing a performance bug.

Fixes: 4b847b38ae freedreno: make fd_batch a one-shot thing
Signed-off-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit a61952e737)
2018-10-29 11:26:19 +01:00
Rob Clark
b8ddd70d04 freedreno: fix inorder rendering case
Signed-off-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit 12de415ad1)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/gallium/drivers/freedreno/freedreno_state.c
2018-10-29 11:25:48 +01:00
Jason Ekstrand
2edd62b4a2 anv: Flag semaphore BOs as external
It probably doesn't actually break anything but it does cause some
assertions in debug builds.

Fixes: 7a89a0d9ed "anv: Use separate MOCS settings for external BOs"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit cbd4468695)
2018-10-29 11:13:22 +01:00
Nanley Chery
aaff8c7a0e intel/blorp: Define the clear value bounds for HiZ clears
Follow the restriction of making sure the clear value is between the min
and max values defined in CC_VIEWPORT. Avoids a simulator warning for
some piglit tests, one of them being:

./bin/depthstencil-render-miplevels 146 d=z32f_s8

Jason found this to fix incorrect clearing on SKL.

Fixes: 09948151ab
       ("intel/blorp: Add the BDW+ optimized HZ_OP sequence to BLORP")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 5bcf479524)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/blorp/blorp_genX_exec.h
2018-10-29 11:02:58 +01:00
Alex Smith
8afef6d53a anv: Fix sanitization of stencil state when the depth test is disabled
When depth testing is disabled, we shouldn't pay attention to the
specified depthCompareOp, and just treat it as always passing. Before,
if the depth test is disabled, but depthCompareOp is VK_COMPARE_OP_NEVER
(e.g. from the app having zero-initialized the structure), then
sanitize_stencil_face() would have incorrectly changed passOp to
VK_STENCIL_OP_KEEP.

v2: Roll the depthTestEnable check into the ds_aspect check below since
    they now both do the same thing.

Fixes: 028e1137e6 "anv/pipeline: Be smarter about depth/stencil state"
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 3bd239f71d)
2018-10-29 10:58:09 +01:00
Juan A. Suarez Romero
957c148aa9 cherry-ignore: Revert "anv/skylake: disable ForceThreadDispatchEnable"
pick: This commit reverts 0fa9e6d7b3 which did not land in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-10-29 10:54:41 +01:00
Jason Ekstrand
14d61206eb blorp: Emit a dummy 3DSTATE_WM prior to 3DSTATE_WM_HZ_OP
Cc: mesa-stable@lists.freedesktop.org
Suggested-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit b6b2b27809)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/blorp/blorp_genX_exec.h
2018-10-29 10:12:53 +01:00
Jason Ekstrand
e69b51d632 spirv: Use the right bit-size for spec constant ops
Previously, we would always pull the bit size from the destination which
is wrong for opcodes like nir_ilt where the sources are variable-sized
but the destination is a fixed size.  We were getting lucky before
because nir_op_ilt returns a 32-bit value and basically everyone who
uses spec constants uses 32-bit ones.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 8fa70cfcfd)
2018-10-29 10:07:33 +01:00
David McFarland
37ba112d07 util: Change remaining uint32 cache ids to sha1
After discussion with Timothy Arceri. disk_cache_get_function_identifier
was using only the first byte of the sha1 build-id.  Replace
disk_cache_get_function_identifier with implementation from
radv_get_build_id.  Instead of writing a uint32_t it now writes to a
mesa_sha1.  All drivers using disk_cache_get_function_identifier are
updated accordingly.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Fixes: 83ea8dd99b ("util: add disk_cache_get_function_identifier()")
[Juan A. Suarez: resolve trivial conflicts]
(cherry picked from commit 07a00a8729)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/gallium/drivers/radeonsi/si_pipe.c
2018-10-26 08:42:45 +00:00
Bas Nieuwenhuizen
a0aa50c3f6 radv: Emit enqueued pipeline barriers on event write.
Since the CPU can read them we need to execute any GPU->CPU
flushes before the event is written.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108524
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit d41c3cc013)
2018-10-26 10:25:45 +02:00
Alok Hota
58df8607cd swr/rast: ignore CreateElementUnorderedAtomicMemCpy
This function's API changed between LLVM 5 and 6. Compile errors occur
when building with LLVM 6+ if LLVM 5 was used for a dist tarball

CC: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107865
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit edf38019a0)
2018-10-26 10:20:35 +02:00
Elie Tournier
63f01f2ef7 gallium: Correctly handle no config context creation
This patch fixes the following Piglit test:
spec@egl_mesa_configless_context@basic
It also fixes few test in a virgl guest.

v2: Evaluate the value of no_config (Ilia)

Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 9179c745f6)
2018-10-25 10:18:30 +02:00
Liviu Prodea
c13a3d4de1 scons: Put to rest zombie texture_float build option.
I found a remnant of texture_float build option that wasn't removed in
commit 66673bef94

This patch removes it.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
(cherry picked from commit d99fda17c8)
2018-10-25 10:15:45 +02:00
Eric Engestrom
d39924f601 radv: s/abs/fabsf/ for floats
Fixes: a4c4efad89 "radv: Rework guard band calculation"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 17b03b5320)
2018-10-23 13:29:34 +02:00
Dylan Baker
9d63cd4ac2 meson: don't require libelf for r600 without LLVM
r600 doesn't have a hard requirement on LLVM, and therefore doesn't have
a hard requirement on libelf. Currently the logic doesn't allow that
however.

Distro-bug: https://bugs.gentoo.org/669058
Fixes: 5060c51b6f
       ("meson: build r600 driver")
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 4e785fb383)
2018-10-23 13:18:57 +02:00
Connor Abbott
cd914013c0 ac: Fix loading a dvec3 from an SSBO
The comment was wrong, since the loop above casts to a type with the
correct bitsize already.

Fixes: 7e7ee82698 ("ac: add support for 16bit buffer loads")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 27fe3f5b5a)
2018-10-22 18:25:13 +02:00
Connor Abbott
e3777d9a83 ac: Introduce ac_build_expand()
And implement ac_bulid_expand_to_vec4() on top of it.

Fixes: 7e7ee82698 ("ac: add support for 16bit buffer loads")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 59535b05cf)
2018-10-22 18:21:00 +02:00
Michel Dänzer
f8d22f7b6e loader/dri3: Also wait for front buffer fence if we triggered it
In that case, we have to wait for the fence to synchronize with the
corresponding drawing we triggered in the X server.

Fixes incorrect display with the i965 driver and some applications, e.g.
solvespace.

Bugzilla: https://bugs.freedesktop.org/108097
Fixes: aefac10fec "loader/dri3: Only wait for back buffer fences in
                     dri3_get_buffer"
Tested-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
(cherry picked from commit c20ba1be18)
2018-10-22 11:47:25 +02:00
Marek Olšák
c4c1c09524 radeonsi: fix a VGT hang with primitive restart on Polaris10 and later
Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Jakob Bornecrantz <jakob@collabora.com>
(cherry picked from commit eae8f49fc6)
2018-10-22 11:36:25 +02:00
Jan Vesely
6899350a19 radeonsi: Bump number of allowed global buffers to 32
Fixes assertion failure/crash when running luxmark/luxball on clover.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108272
CC: mesa-stable@lists.freedesktop.org
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 06bf56725d)
2018-10-22 11:32:37 +02:00
Andres Rodriguez
8c4ff233b1 radv: fix check for perftest options size
It was using the debug options array size.

CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit e71a87775e)
2018-10-22 11:26:41 +02:00
Alex Smith
8da28e563b ac/nir: Use context-specific LLVM types
LLVMInt*Type() return types from the global context and therefore are
not safe for use in other contexts. Use types from our own context
instead.

Fixes frequent crashes seen when doing multithreaded pipeline creation.

Fixes: 4d0b02bb5a "ac: add support for 16bit load_push_constant"
Fixes: 7e7ee82698 "ac: add support for 16bit buffer loads"
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit ca83d51cfb)
2018-10-22 11:21:58 +02:00
Juan A. Suarez Romero
27fd12857b docs: add sha256 checksums for 18.2.3
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-10-19 18:43:26 +02:00
Juan A. Suarez Romero
d219361b42 docs: add release notes for 18.2.3
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-10-19 18:02:51 +02:00
Juan A. Suarez Romero
83d0be5d4a Update version to 18.2.3
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-10-19 15:58:42 +00:00
Timothy Arceri
78faa008a7 util: add drirc workarounds for RAGE
This allows the game to run on wine (tested on radeonsi where we
have compat profile support).

(cherry picked from commit 0da93de9c8)
2018-10-15 10:39:43 +02:00
Timothy Arceri
38b42b85e6 util: better handle program names from wine
For some reason wine will sometimes give us a windows style path
for an application. For example when running the 64bit version
of Rage wine gives a Unix style path, but when running the 32bit
version is gives a windows style path.

If we detect no '/' in the path at all it should be safe to
assume we have a wine application and instead look for a '\'.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 3f9d8e9c88)
2018-10-15 10:36:37 +02:00
Vinson Lee
38b69a2fd8 r600/sb: Fix constant-logical-operand warning.
sb/sb_bc_parser.cpp:620:27: warning: use of logical '&&' with constant operand [-Wconstant-logical-operand]
        if (cf->bc.op_ptr->flags && FF_GDS)
                                 ^  ~~~~~~
sb/sb_bc_parser.cpp:620:27: note: use '&' for a bitwise operation
        if (cf->bc.op_ptr->flags && FF_GDS)
                                 ^~
                                 &
sb/sb_bc_parser.cpp:620:27: note: remove constant to silence this warning
        if (cf->bc.op_ptr->flags && FF_GDS)
                                ~^~~~~~~~~

Fixes: da977ad907 ("r600/sb: start adding GDS support")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit cc33621e3b)
2018-10-15 08:29:10 +00:00
Boyuan Zhang
b72c90b003 st/va: use provided sizes and coords for vlVaGetImage
vlVaGetImage should respect the width, height, and coordinates x and y that
passed in. Therefore, pipe_box should be created with the passed in values
instead of surface width/height.

v2: add input size check, return error when size out of bounds
v3: fix the size check for vaimage
v4: add size adjustment for x and y coordinates

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit d76c277421)
2018-10-15 08:25:39 +00:00
Samuel Pitoiset
687ca5f0cd radv: add a workaround for a VGT hang with prim restart and strips
Otherwise, Yakuza and The Evil Within hang the GPU with DXVK.
This apparently only works on Polaris.

Suggested by Marek.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit d179312b53)
2018-10-15 08:19:53 +00:00
Timothy Arceri
e20307725a util: use force_compat_profile for Wolfenstein The Old Blood
This game is looking for some odd extension after creating a core
context such as ARB_vertex_program and EXT_framebuffer_object.

Rather then enabling these in core this forces the game to use
compat. This allows the game to run and seems to work without
issues. All other id tech games/engines use a compat profile.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 024abd3534)
2018-10-11 09:32:14 +02:00
Timothy Arceri
50727810ed mesa/st: add force_compat_profile option to driconfig 2018-10-11 09:29:39 +02:00
Timothy Arceri
2cf5abd80b r600: use build-id when available for disk cache
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 2b5f42068d)
2018-10-11 09:25:01 +02:00
Timothy Arceri
138d9ac2a8 nouveau: use build-id when available for disk cache
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 397f2603eb)
2018-10-11 09:22:48 +02:00
Timothy Arceri
61d782c39d radeonsi: use build-id when available for disk cache
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 2169acbf34)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/gallium/drivers/radeonsi/si_pipe.c
2018-10-11 09:20:13 +02:00
Timothy Arceri
06e726ddb5 util: add disk_cache_get_function_identifier()
This can be used as a drop in replacement for
disk_cache_get_function_timestamp().

Here we use build-id to generate a driver-id rather than build
timestamp if available. This should resolve issues such as
distros using reproducable builds and flatpak not having
real build timestamps.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 83ea8dd99b)
2018-10-11 09:12:23 +02:00
Timothy Arceri
d776ccd2da util: rename timestamp param in disk_cache_create()
Only some drivers use a timestamp here. Others use things such
as build-id, or even a combination of build-ids from Mesa and
LLVM.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 6a884014e4)
2018-10-11 09:07:39 +02:00
Timothy Arceri
4cd7db4b04 util: disable cache if we have no build-id and timestamp is zero
Timestamp can be zero for example when Flatpak is used. In this
case just disable the cache rather then segfaulting when
incompatible cache items are loaded.

V2: actually return false when mtime is 0.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit ea66bfda88)
2018-10-11 09:01:45 +02:00
Timothy Arceri
bf21df1bb5 glsl: ignore trailing whitespace when define redefined
The Nvidia/AMD binary drivers allow this, as does GCC.

This fixes shader compilation issues in the latest update of
No Mans Sky.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 0346ad3774)
2018-10-11 08:54:18 +02:00
Dave Airlie
9282afbca4 anv: add missing unlock in error path.
Not going to matter, but be consistent.

Found by coverity

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: caf41c78c (anv/allocator: Support softpin in the BO cache)
(cherry picked from commit 29a7631986)
2018-10-11 08:48:54 +02:00
Jason Ekstrand
a0782c61b2 intel: Don't propagate conditional modifiers if a UD source is negated
This fixes a bug uncovered by my NIR integer division by constant
optimization series.

Fixes: 19f9cb72c8 "i965/fs: Add pass to propagate conditional..."
Fixes: 627f94b72e "i965/vec4: adding vec4_cmod_propagation..."
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 4ba445e011)
2018-10-11 08:43:37 +02:00
Dylan Baker
26d6c57dc2 meson: Don't allow building EGL on Windows or MacOS
Currently mesa only supports EGL on Unix like systems, cygwin, and
haiku. Meson should actually enforce this. This fixes the default build
on MacOS.

v2: - invert the condition, mark darwin and windows as not supported
      instead of trying to mark what is supported.
v3: - add missing )
v3: - Update comment to reflect condition change in v2

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit b8521704ed)
2018-10-11 08:38:50 +02:00
Eric Engestrom
d8009ea363 radv: add missing meson c++ visibility arguments
Fixes: 6f3aee40f9 "radv: using tls to store llvm related info
                             and speed up compiles (v10)"
Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 976188737d)
2018-10-10 16:51:39 +02:00
Gert Wollny
4136c4e066 virgl, vtest: Correct the transfer size calculation
The transfer size used in virglrenderer refers to uint32_t, so one
must add 3 and then divide by 4 instead of adding 3/4 which is a no-op
with integers.

Fixes: b3b82fe8ea virgl/vtest: add vtest driver

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
(cherry picked from commit 5d7858f151)
2018-10-10 16:35:08 +02:00
Jason Ekstrand
2006c70812 nir/alu_to_scalar: Use ssa_for_alu_src in hand-rolled expansions
The ssa_for_alu_src helper will correctly handle swizzles and other
source modifiers for you.  The expansions for unpack_half_2x16,
pack_uvec2_to_uint, and pack_uvec4_to_uint were all broken with regards
to swizzles.  The brokenness of unpack_half_2x16 was causing rendering
errors in Rise of the Tomb Raider on Intel ever since c11833ab24
which added an extra copy propagation to the optimization pipeline and
caused us to start seeing swizzles where we hadn't seen any before.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107926
Fixes: 9ce901058f "nir: Add lowering of nir_op_unpack_half_2x16."
Fixes: 9b8786eba9 "nir: Add lowering support for packing opcodes."
Tested-by: Alex Smith <asmith@feralinteractive.com>
Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit dd553bc67f)
2018-10-10 16:23:59 +02:00
Jason Ekstrand
43079480da anv/batch_chain: Don't start a new BO just for BATCH_BUFFER_START
Previously, we just went ahead and emitted MI_BATCH_BUFFER_START as
normal.  If we are near enough to the end, this can cause us to start a
new BO just for the MI_BATCH_BUFFER_START which messes up chaining.  We
always reserve enough space at the end for an MI_BATCH_BUFFER_START so
we can just increment cmd_buffer->batch.end prior to emitting the
command.

Fixes: a0b133286a "anv/batch_chain: Simplify secondary batch return..."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107926
Tested-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit f5bab06428)
2018-10-10 16:19:39 +02:00
Emil Velikov
6d105d247e Revert "mesa: remove unnecessary 'sort by year' for the GL extensions"
This reverts commit 3d81e11b49.

As reported by Federico, some games require the 'sort by year' since
they truncate the extensions which do not fit the fixed size string
array.

Seemingly I did not consider that, as the documentation (both Mesa and
Nvidia) mentions about program crashes ... which are worked around by
setting the env. variable.

This commit reinstates the workaround and enhances the documentation.

Cc: Marek Olšák <maraeo@gmail.com>
Cc: Ian Romanick <idr@freedesktop.org>
Reported-by: Federico Dossena <info@fdossena.com>
Fixes: 3d81e11b49 ("mesa: remove unnecessary 'sort by year' for the GL
extensions")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Federico Dossena <info@fdossena.com>

(cherry picked from commit fe8be81b4a)
2018-10-10 16:14:33 +02:00
Emil Velikov
310655d8fa vl/dri3: do full teardown on screen_destroy
Earlier commit added support for 'front_buffers', erroneously adding a
return in vl_dri3_screen_destroy. Effectively leaking a lot of state.

Fixes: 8d7ac0a4e4 ("vl/dri3: implement DRI3 BufferFromPixmap")
Cc: Leo Liu <leo.liu@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
(cherry picked from commit d081ad2aa2)
2018-10-10 15:55:20 +02:00
Fritz Koenig
dd95851fb7 i965: Replace checks for rb->Name with FlipY (v2)
In the GL_MESA_framebuffer_flip_y implementation
_mesa_is_winsys_fbo checks were replaced with
FlipY checks.  rb->Name is also used to determine
if a buffer is winsys.

v2: Fixes annotation [for emil]

Fixes: ab05dd183c ("i965: implement GL_MESA_framebuffer_flip_y [v3]")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit 08f97407fb)
2018-10-10 15:51:21 +02:00
Jason Ekstrand
e13f16a24a nir/from_ssa: Don't rewrite derefs destinations to registers
We already call nir_rematerialize_derefs_in_use_blocks_impl prior to
calling nir_lower_ssa_defs_to_regs_block so the assertion that all deref
uses in the block should hold.  This fixes the following CTS test when
SPIR-V optimization recipe 1:

dEQP-VK.glsl.struct.local.loop_nested_struct_array_vertex

Fixes: 606eb56ab9 "intel/nir: Only lower load/store derefs"
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit 00f385e6d4)
2018-10-10 15:45:29 +02:00
Jason Ekstrand
4945b25d6f intel/fs: Fix a typo in need_matching_subreg_offset
This fixes a bunch of Vulkan subgroup tests on little core platforms.

Fixes: 4150920b95 "intel/fs: Add a helper for emitting scan operations"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 7e7959fcb7)
2018-10-10 15:33:01 +02:00
Ilia Mirkin
285702582a nvc0: fix blitting red to srgb8_alpha
For some reason the 2d engine can't handle this. Red formats get special
treatment there, so perhaps related.

Fixes dEQP-GLES3 tests of the form:

  dEQP-GLES3.functional.fbo.blit.conversion.r{8,16f,32f}_to_srgb8_alpha8

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 92f56fbd89)
2018-10-10 12:32:33 +02:00
Ilia Mirkin
d591014dd7 nv50,nvc0: guard against zero-size blits
The current state tracker can generate these sometimes. Fixing this is
more involved, and due to some integer math we can generate
divisions-by-zero.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 9bf0614116)
2018-10-10 12:28:45 +02:00
Ilia Mirkin
8f43af3390 nv50,nvc0: mark RGBX_UINT formats as renderable
This helps st/mesa avoid some (apparently) buggy fallbacks. Specifically
the CopyTexSubImage fallback tries to read texture A as RGBA_FLOAT and
write back that data into the target format, which fails for integer
formats which have no appropriate logic to do the conversion.

Since integer formats don't blend, there's no harm in the fact that the
"A" component gets written anyways.

Fixes, among others:
  https://www.khronos.org/registry/webgl/sdk/tests/conformance2/textures/canvas/tex-2d-rgb8ui-rgb_integer-unsigned_byte.html

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 78d3640e49)
2018-10-10 12:16:55 +02:00
Ilia Mirkin
a11b481c98 glsl: fix array assignments of a swizzled vector
This happens in situations where we might do

  vec.wzyx[i] = ...

The swizzle would get effectively ignored because of the interaction
between how ir_assignment->set_lhs works and overwriting the write_mask.
There are two cases, one where i is a constant, and another where i is
variable. We have to be extra-careful in both cases.

Fixes the following WebGL test:

  https://www.khronos.org/registry/webgl/sdk/tests/conformance2/glsl3/vector-dynamic-indexing-swizzled-lvalue.html

And the new piglit tests:

  swizzled-writemask-indexing-nonconst.shader_test
  swizzled-writemask-indexing.shader_test

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 1bb1c03d61)
2018-10-10 12:12:36 +02:00
Tapani Pälli
713e991163 glsl: do not attempt assignment if operand type not parsed correctly
v2: check types of both operands (Ian)

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108012
(cherry picked from commit d1fa69ed61)
2018-10-10 12:09:21 +02:00
Marek Olšák
857750d296 drirc: add a workaround for ARMA 3
Cc: 18.2 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 8e0b4cb8a1)
2018-10-10 11:53:44 +02:00
Jason Ekstrand
8927cf03bb anv: Use separate MOCS settings for external BOs
On Broadwell and above, we have to use different MOCS settings to allow
the kernel to take over and disable caching when needed for external
buffers.  On Broadwell, this is especially important because the kernel
can't disable eLLC so we have to do it in userspace.  We very badly
don't want to do that on everything so we need separate MOCS for
external and internal BOs.

In order to do this, we add an anv-specific BO flag for "external" and
use that to distinguish between buffers which may be shared with other
processes and/or display and those which are entirely internal.  That,
together with an anv_mocs_for_bo helper lets us choose the right MOCS
settings for each BO use.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99507
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 7a89a0d9ed)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_image.c
	src/intel/vulkan/genX_gpu_memcpy.c
2018-10-10 11:51:18 +02:00
Emil Velikov
164a28ada2 egl: make eglSwapBuffers* a no-op for !window surfaces
Analogous to the previous commit - the spec says the function is a
no-op when a pbuffer or pixmap surface is used.

Cc: samiuddi <sami.uddin.mohammad@intel.com>
Cc: Erik Faye-Lund <kusmabite@gmail.com>
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 8f66743ca2)
2018-10-08 13:54:30 +02:00
Emil Velikov
d75a602839 egl: make eglSwapInterval a no-op for !window surfaces
As the spec says, the function is a no-op when the surface is not a
window one.

That spec implies that EGL_TRUE should be returned in that case, yet
the ARM driver seems to return EGL_FALSE + EGL_BAD_SURFACE.

The Nvidia driver returns EGL_TRUE. We follow that behaviour until a
decision is made.

https://gitlab.khronos.org/egl/API/merge_requests/17

Cc: samiuddi <sami.uddin.mohammad@intel.com>
Cc: Erik Faye-Lund <kusmabite@gmail.com>
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 64b4ccde0c)
2018-10-08 11:49:49 +00:00
Emil Velikov
382099b7ad st/nine: do not double-close the fd on teardown
As the newly introduced comment says:
 The pipe loader takes ownership of the fd

Thus, there's no need to close it again.

Cc: Patrick Rudolph <siro@das-labor.org>
Cc: Axel Davy <davyaxel0@gmail.com>
Cc: mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
(cherry picked from commit 7b8d1b313c)
2018-10-08 11:49:48 +00:00
Józef Kucia
57aeec6f78 radeonsi: avoid sending GS_EMIT in shaders without outputs
Fixes GPU hangs.

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107857
Signed-off-by: Józef Kucia <joseph.kucia@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit e24a4e05c7)
2018-10-08 11:49:48 +00:00
Jason Ekstrand
4ba6f668df nir/cf: Remove phi sources if needed in nir_handle_add_jump
If the block in which the jump is inserted is the predecessor of a phi
then we need to remove phi sources otherwise the phi may end up with
things improperly connected.  This fixes the following CTS test when
dEQP is run with SPIR-V optimization recipe 1:

dEQP-VK.glsl.functions.control_flow.return_in_nested_loop_vertex

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit bfc89c668e)
2018-10-08 11:49:48 +00:00
Juan A. Suarez Romero
cb63a4e114 docs: add sha256 checksums for 18.2.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-10-05 12:45:35 +02:00
Juan A. Suarez Romero
abaeb79eb2 docs: add release notes for 18.2.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-10-05 12:13:33 +02:00
Juan A. Suarez Romero
4b24d4810d Update version to 18.2.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-10-05 10:08:20 +00:00
Marek Olšák
3e1b0a0853 radeonsi: NaN should pass kill_if
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-10-02 09:39:47 +02:00
Maxime
3c24f60cca vulkan: Disable randr lease for libxcb < 1.13
Since the Randr lease code was added, compiling against libxcb 1.12 no
longer works.

CC: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108024
Fixes: 7ab1fffcd2
Tested-By: Maxime <berillions@gmail.com>
Fixes: 7ab1fffcd2 "vulkan: Add EXT_acquire_xlib_display [v5]"
(cherry picked from commit dd333c66bd)
2018-10-01 10:22:48 +02:00
Axel Davy
4c34a42189 st/nine: Increase maximum number of temp registers
With some test app I hit the limit.
As we allocate on demand (up to the maximum),
it is free to increase the limit.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 7ae2509ce0)
2018-10-01 10:02:56 +02:00
Axel Davy
ec9175a804 st/nine: Avoid redundant SetCursorPos calls
For some applications SetCursorPosition
is called when a cursor event is received.

Our SetCursorPosition was always calling
wine SetCursorPos which would trigger
a cursor event.

The infinite loop is avoided by not calling
SetCursorPos when the position hasn't changed.
Found thanks to wine tests.

Fixes irresponsive GUI for some applications.

Fixes: https://github.com/iXit/Mesa-3D/issues/173

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit dcfde02bb0)
2018-10-01 09:58:05 +02:00
Axel Davy
98fd4107c4 st/nine: Clamp RCP when 0*inf!=0
Tests done on several devices of all 3 vendors and
of different generations showed that there are several
ways of handling infs and NaN for d3d9.

Tests showed Intel on windows does always clamp
RCP, RSQ and LOG (thus preventing inf/nan generation),
for all shader versions (some vendor behaviours vary
with shader versions).
Doing this in nine avoids 0*inf issues for drivers
that can't generate 0*inf=0 (which is controled by
TGSI's MUL_ZERO_WINS).

For now clamp for all drivers. An ulterior optimization
would be to avoid clamping for drivers with MUL_ZERO_WINS
for the specific shader versions where NV or AMD don't
clamp.

LOG and RSQ being already clamped, this patch only
clamps RCP.

Fixes: https://github.com/iXit/Mesa-3D/issues/316

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 7ee5e5e239)
2018-10-01 09:54:04 +02:00
Timothy Arceri
b4c8c67f31 radeonsi: add a workaround for bitfield_extract when count is 0
This ports the fix from 3d41757788. Both LLVM 7 & 8 continue
to have this problem.

It fixes rendering issues in some menu and loading screens of
Civ VI which can be seen in the trace from bug 104602.

Note: This does not fix the black triangles on Vega for bug
104602.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104602
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107276
2018-09-25 10:31:11 +02:00
Eric Engestrom
18913d2aae vulkan/wsi/display: check if wsi_swapchain_init() succeeded
Fixes: da997ebec9 "vulkan: Add KHR_display extension using DRM [v10]"
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit bde3102c0d)
2018-09-25 10:12:41 +02:00
Andres Rodriguez
74bb9aeae9 radv: only emit ZPASS_DONE for timestamp queries on gfx queues
A ZPASS_DONE packet doesn't make sense for the compute queue. It will
result in a gpu hang.

This change resolves a gpu hang for SteamVR+Vega.

Cc: mesa-stable@lists.freedesktop.org
Fixes: 1f616a840e "radv: emit a dummy ..."
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit ec1fcf92ae)
2018-09-25 08:06:48 +00:00
Leo Liu
dadb3952df radeon/uvd: use bitstream coded number for symbols of Huffman tables
Signed-off-by: Leo Liu <leo.liu@amd.com>
Fixes: 130d1f456(radeon/uvd: reconstruct MJPEG bitstream)
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
(cherry picked from commit 3e7b5e5db2)
2018-09-25 08:04:38 +00:00
Rhys Perry
45ce3ede80 nvc0: fix bindless multisampled images on Maxwell+
NVC0_CB_AUX_BINDLESS_INFO isn't written to on Maxwell+ and it's too small
anyway.

With these changes, TXQ is used to determine the number of samples and
the coordinate adjustment information looked up in a small array in the
driver constant buffer.

v2: rework to use TXQ and a small array instead of a larger array with an
    entry for each texture
v3: get rid of the small array and calculate the adjustments in the shader

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: c2ae9b4052 ('nvc0: implement multisampled images on Maxwell+')
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit b473fcc9a3)

Squashed with:

nv50/ir: fix link-time build failure

Seems this fixes linking problems that occur in some situations.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit 6ca1402c11)
2018-09-24 17:23:34 +02:00
Stuart Young
e6db732b45 docs: Update FAQ with respect to s3tc support
It's just over 10 months since 17.3.0 was released with s3tc support enabled.
Probably a good idea to update the FAQ page.

v2: Incorporate feedback from Adam Jackson <ajax@redhat.com>

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 04396a134f ("mesa: Import libtxc_dxtn sources")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit c95dd966c4)
2018-09-24 11:12:40 +02:00
Rhys Perry
76f5b564f3 nvc0: Update counter reading shaders to new NVC0_CB_AUX_MP_INFO
Fixes: 66ca7e400b ('nvc0: add support for programmable sample locations')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit 01fa76b707)
2018-09-24 11:07:20 +02:00
Dylan Baker
56acf932de meson: Don't compile pipe loader with dri support when not using dri
Corrects building glx as gallium-xlib without any dri targets.

v2: - fix ugly formatting

Fixes: 66c94b9313
       ("meson: build gallium winsys for dri, null, and wrapper")

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 5dcb77e491)
2018-09-24 11:03:57 +02:00
Michal Srb
03ccb045b3 st/dri: don't set queryDmaBufFormats/queryDmaBufModifiers if the driver does not implement it
This is equivalent to commit a65db0ad1c, but for dri_kms_init_screen. Without
this gbm_dri_is_format_supported always returns false.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104926
Fixes: e14fe41e0b ("st/dri: implement createImageFromRenderbuffer(2)")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Tested-by: Adam Williamson <adamwill@fedoraproject.org>
(cherry picked from commit 194bf0a2e0)
2018-09-24 11:01:19 +02:00
Eric Anholt
e79c931d28 vc4: Fix sin(0.0) and cos(0.0) accuracy to fix SDL rendering rotation.
SDL has some shaders that compute sin(angle) and cos(angle) for a rotation
matrix in the VS, and angle is usually 0.0.  Our previous implementation
had quite a bit of error around 0.0, causing single-pixel rotations at
typical window sizes.  SDL2 has changed as of August 28th (commit
12156:e5a666405750) to not need sin/cos in the VS, but we should still fix
this for existing implementations or similar patterns that other programs
may have.

glsl-cos goes from 32 instructions to 36, but 9 uniforms to 7.
glsl-sin goes from 32 instructions to 34, but 8 uniforms to 7.

This seems like a fine impact to have for the bugfix.

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Fixes: https://github.com/anholt/mesa/issues/110
(cherry picked from commit 10d5d2d527)
2018-09-24 10:58:24 +02:00
Alex Deucher
be23d75fb9 pci_ids: add new polaris pci id
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit afb7c6b301)
2018-09-24 10:53:09 +02:00
Marek Olšák
f2a66767a2 glsl_to_tgsi: invert gl_SamplePosition.y for the default framebuffer
Fixes dEQP-GLES31.functional.shaders.sample_variables.sample_pos.correctness.default_framebuffer
with --deqp-gl-config-name=rgba8888d24s8ms4

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f0cd7dbcd7)
2018-09-24 10:49:26 +02:00
Samuel Pitoiset
7796d93382 radv: use the resolve compute path if dest uses multiple layers
The hardware path doesn't support resolving layers, for both
source and destination images.

This fixes a reflection issue when MSAA is enabled which
affects GTA V and probably DIRT3.

CC: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107786
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Gregor Münch <gr.muench_at_gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit fe3f13cc5a)
2018-09-24 10:46:02 +02:00
Samuel Iglesias Gonsálvez
e2607a6da5 anv: Add support for protected memory properties on anv_GetPhysicalDeviceProperties2()
VkPhysicalDeviceProtectedMemoryProperties structure is new on Vulkan 1.1.

Fixes Vulkan CTS CL#2849.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 59a8e0dbf8)
2018-09-24 10:35:56 +02:00
Jason Ekstrand
358c2d6923 anv,radv: Implement vkAcquireNextImage2
This was added as part of 1.1 but it's very hard to track exactly what
extension added it.  In any case, we should implement it.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Dave Airlie <Airlied@redhat.com>
(cherry picked from commit ab80889e92)
2018-09-24 10:32:33 +02:00
Juan A. Suarez Romero
686eab6642 docs: add sha256 checksums for 18.2.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-09-21 13:05:44 +02:00
Juan A. Suarez Romero
3c8c851fe4 docs: add release notes for 18.2.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-09-21 12:38:01 +02:00
Juan A. Suarez Romero
8a197eb34e Update version to 18.2.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-09-21 08:43:21 +00:00
Bas Nieuwenhuizen
6c355700fd radv: Fix driver UUID SHA1 init.
Was missing the init, found by Emil.

Fixes: d17443a459 "radv: Use build ID if available for cache UUID."
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 0a77e70d10)
2018-09-21 09:20:51 +02:00
Juan A. Suarez Romero
5f27643567 cherry-ignore: radv: fix descriptor pool allocation size
fixes: this commit was reverted by commit 95bb7d82ca.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-09-19 11:57:29 +02:00
Jason Ekstrand
cc622c0815 nir/opt_if: Re-materialize derefs in use blocks before peeling loops
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107879
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 864c780566)
2018-09-19 11:57:29 +02:00
Jason Ekstrand
36aa46c2ec nir/loop_unroll: Re-materialize derefs in use blocks before unrolling
When we're about to re-arrange a bunch of blocks, it's a good idea to
make sure that we don't have deref uses crossing block boundaries.
Otherwise we may end up with a deref going through a phi and that would
be bad.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 0796c3934e)
2018-09-19 11:57:29 +02:00
Jason Ekstrand
f1305c32c1 nir: Add a small pass to rematerialize derefs per-block
This pass re-materializes deref instructions on a per-block basis to
ensure that every use of a deref occurs in the same block as the
instruction which uses it.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 7d1d1208c2)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/compiler/nir/nir_deref.c

Squashed with:

nir: add initializer data to fix MSVC compile error

CC: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 82799a5d1b8 ("nir: Add a small pass to rematerialize derefs
per-block")
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

(cherry picked from commit 0c82e3603e)
2018-09-19 11:57:16 +02:00
Kenneth Feng
3781c4cbf4 amd: Add Picasso device id
No changes here compared to Raven.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4490fce166)
2018-09-19 11:04:53 +02:00
Timothy Arceri
1ce0c521cd Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"
This reverts commit bc65dcab3b.

This was manually reverted. Reverting stops the menu hanging in
some id tech games such as RAGE and Wolfenstein The New Order.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107891
(cherry picked from commit 7a992fcfa0)
2018-09-19 11:04:53 +02:00
Fritz Koenig
f1f82d2eb0 mesa: FramebufferParameteri parameter checking
Missing break; causes parameter checking to
never pass GL_FRAMEBUFFER_FLIP_Y_MESA parameters.

Fixes: 318c265160 ("mesa: GL_MESA_framebuffer_flip_y extension [v4]")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 60d0c0d062)
2018-09-19 11:04:53 +02:00
Fritz Koenig
f92aa39032 mesa: Additional FlipY applications
Instances where direction was determined based on
winsys or user fbo and should be determined based on
FlipY.

Key STATE_FB_WPOS_Y_TRANSFORM for of FlipY instead of
_mesa_is_user_fbo.  This corrects gl_FragCoord usage
when applying GL_MESA_framebuffer_flip_y.

Fixes: ab05dd183c ("i965: implement GL_MESA_framebuffer_flip_y [v3]")
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit ba6cc32cf9)
2018-09-19 11:04:53 +02:00
Bas Nieuwenhuizen
d2b6f842b4 radv: Use build ID if available for cache UUID.
To get an useful UUID for systems that have a non-useful mtime
for the binaries.

I started using SHA1 to ensure we get reasonable mixing in the
various possibilities and the various build id lengths.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit d17443a459)
2018-09-19 11:04:53 +02:00
Gert Wollny
e86804eab2 mesa/texture: Also check for LA texture when querying intensity component size
Gallium may pick L16A16_FLOAT to represent GL_INTENSITY16F if no intensity
format is provided by the driver. However, when calling

   glGetTexLevelParameteriv(..., GL_TEXTURE_INTENSITY_SIZE, ...)

mesa will return a zero size because the actually used format has no
intensity channel and as a fallback only the sizes of the red/green
channels are checked.

Also checking for LA sizes in the allocated texture resolves this problem.

v2: Only check alpha channel size and return it (Marek)
    L and A size are always the same in this case.

Fixes (on virgl):
  ext_framebuffer_multisample-fast-clear GL_ARB_texture_float *

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107832

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 47e01e77d8)
2018-09-19 11:04:53 +02:00
Jason Ekstrand
2f9795d6b3 anv/query: Write both dwords in emit_zero_queries
Each query slot is a uint64_t and we were only zeroing half of it.

Fixes: 7ec6e4e689 "anv/query: implement multiview interactions"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 07e214f1ce)
2018-09-19 11:04:53 +02:00
Ian Romanick
152e12f36b i965/fs: Don't propagate conditional modifiers from integer compares to adds
No shader-db changes on any Intel platform... which probably explains
why no bugs have been bisected to this problem since it landed in Mesa
18.1. :( The commit mentioned below is in 18.2, so 18.1 would need a
slightly different fix (due to code refactoring).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes: 77f269bb56 "i965/fs: Refactor propagation of conditional modifiers from compares to adds"
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> (reviewed the original patch)
Cc: Matt Turner <mattst88@gmail.com> (reviewed the original patch)
(cherry picked from commit df9dbc03d3)
2018-09-19 11:04:53 +02:00
Erik Faye-Lund
d42bf4f0ee virgl: adjust strides when mapping temp-resources
When we're mapping temp-resources, we clip the resource to the
transfer-box, which means the stride might not be correct any more.

So let's update the stride from the temp-resource, and recompute the
layer-stride.

This fixes crashes when running dEQP with --deqp-gl-config-name=rgba8888d24s8ms4

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: a8987b88ff "virgl: add driver for virtio-gpu 3D (v2)"
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit fa5e9f1f73)
2018-09-19 11:04:53 +02:00
Pierre Moreau
5b58be3590 nvir: Always split 64-bit IMAD/IMUL operations
Those operations do not map to actual hardware instructions, therefore
those should always be lowered to 32-bit instructions.

Fixes: 009c54aa7a "nv50/ir: Split 64-bit integer MAD/MUL operations"

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
(cherry picked from commit 21b92b3464)
2018-09-19 11:04:53 +02:00
Erik Faye-Lund
051880fc20 winsys/virgl: avoid unintended behavior
If we end up never taking the loop that writes ret, we can end up with
an uninitialized value, and if we're *really* unlucky, that value can
be -1, causing us to go down an error-path instead of a success path.

This was obviously not intended, so let's just initialize this to zero.

Noticed by Valgrind:

Conditional jump or move depends on uninitialised value(s)
   at 0xBA640A0: virgl_drm_winsys_resource_cache_create (virgl_drm_winsys.c:348)
   by 0xBA62FCF: virgl_buffer_create (virgl_buffer.c:170)
   by 0xBA605AC: virgl_resource_create (virgl_resource.c:60)
   by 0xBCF816F: bufferobj_data (st_cb_bufferobjects.c:344)
   by 0xBCF816F: st_bufferobj_data (st_cb_bufferobjects.c:390)
   by 0xBB7E836: vbo_use_buffer_objects (vbo_exec_api.c:1136)
   by 0xBCFCC6E: st_create_context_priv (st_context.c:414)
   by 0xBCFD3CD: st_create_context (st_context.c:590)
   by 0xBBB30CA: st_api_create_context (st_manager.c:896)
   by 0xB981E76: dri_create_context (dri_context.c:155)
   by 0xB97BDCE: driCreateContextAttribs (dri_util.c:473)
   by 0x5288331: dri3_create_context_attribs (dri3_glx.c:309)
   by 0x5264D64: glXCreateContextAttribsARB (create_context.c:78)

Fixes: a8987b88ff ("virgl: add driver for virtio-gpu 3D (v2)")
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
(cherry picked from commit eaa718588e)
2018-09-19 11:04:53 +02:00
Bas Nieuwenhuizen
f2f969add1 radv: Only allow 16 user SGPRs for compute on GFX9+.
Apparently for compute there are only 16 instead of the 32 for the
graphics path.

Fixes dEQP-VK.binding_model.descriptorset_random.sets16.noarray.ubolimitlow.sbolimitlow.imglimitlow.noiub.comp.0

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 0dd8189f15)
2018-09-17 17:08:00 +02:00
Bas Nieuwenhuizen
1ab5f8addd radv: Set the user SGPR MSB for Vega.
Otherwise using 32 user SGPRs would be broken.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit d97c892584)
2018-09-17 17:05:10 +02:00
Mauro Rossi
f354ac60bd android: broadcom/cle: export the broadcom top level path headers
Fixes the following building error in vc4 build:

In file included from external/mesa/src/gallium/drivers/vc4/kernel/vc4_render_cl.c:34:
In file included from external/mesa/src/gallium/drivers/vc4/kernel/vc4_drv.h:27:
In file included from external/mesa/src/gallium/drivers/vc4/vc4_simulator_validate.h:34:
In file included from external/mesa/src/gallium/drivers/vc4/vc4_context.h:39:
In file included from external/mesa/src/gallium/drivers/vc4/vc4_cl.h:56:
gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h:12:10:
fatal error: 'cle/v3d_packet_helpers.h' file not found
         ^~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.

Fixes: 5b102160ae ("broadcom/genxml: Introduce a V3D packet/struct decoder.")
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
(cherry picked from commit cc3b99bb48)
2018-09-17 17:02:30 +02:00
Mauro Rossi
7fbd3177dc android: broadcom/cle: add gallium include path
Fixes the following building error:

In file included from external/mesa/src/broadcom/cle/v3d_decoder.c:38:
In file included from external/mesa/src/broadcom/cle/v3d_packet_helpers.h:29:
external/mesa/src/gallium/auxiliary/util/u_math.h:42:10:
fatal error: 'pipe/p_compiler.h' file not found
         ^~~~~~~~~~~~~~~~~~~
1 error generated.

Fixes: 5b102160ae ("broadcom/genxml: Introduce a V3D packet/struct decoder.")
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
(cherry picked from commit 9158e0bd82)
2018-09-17 17:00:03 +02:00
Mauro Rossi
4ef541926c android: broadcom/genxml: fix collision with intel/genxml header-gen macro
Fixes the following building error, happening when building both intel and broadcom:

Gen Header: libmesa_broadcom_genxml_32 <= v3d_packet_v21_pack.h
FAILED: gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h
/bin/bash -c "python external/mesa/src/broadcom/cle/gen_pack_header.py \
external/mesa/src/broadcom/cle/v3d_packet_v21.xml \
> gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h"
Traceback (most recent call last):
  File "external/mesa/src/broadcom/cle/gen_pack_header.py", line 626, in <module>
    p = Parser(sys.argv[2])
IndexError: list index out of range

header-gen macro is already defined by Intel genxml building rules
and the existing header-gen does not have the $(PRIVATE_VER) argument,
infact the bash command line logged in the building error is missing
exactly $(PRIVATE_VER) argument

Renaming the macro as pack-header-gen in src/broadcom/Android.genxml.mk
solves the building error, another possible way is to keep the gen rules
commands expanded and not use the macros.

Fixes: 7f80a9ff13 ("vc4: Introduce XML-based packet header generation like Intel's.")
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
(cherry picked from commit 3341429d74)
2018-09-17 16:57:45 +02:00
Josh Pieper
fa7a9dca23 st/mesa: Validate the result of pipe_transfer_map in make_texture (v2)
When using Freecad, I was getting intermittent segfaults inside of
mesa.  I traced it down to this path in st_cb_drawpixels.c where the
result of pipe_transfer_map wasn't being checked.  In my case, it was
returning NULL because nouveau_bo_new returned ENOENT.  I'm by no
means a mesa developer, but this patch solves the problem for me and
seems reasonable enough.

v2: Marek - also unmap the PBO and release the texture, and call
    the make_texture function sooner for less cleanup

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 936e0dcd61)
2018-09-17 16:55:06 +02:00
Samuel Pitoiset
40b930c982 radv: fix setting global locations for indirect descriptors
Indirect descriptors only need one entry, we don't have to
emit a location for every descriptors.

Fixes GPU hangs with new CTS:
dEQP-VK.binding_model.descriptorset_random.*

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 9de062ef20)
2018-09-17 16:50:10 +02:00
Samuel Pitoiset
a103bc9b1f radv: fix flushing indirect descriptors
Let say, we first bind a graphics pipeline that needs indirect
descriptors sets. The userdata pointers will be emitted at draw
time. Then if we bind a compute pipeline that doesn't need any
indirect descriptors, the driver will re-emit them for all
grpahics stages.

To avoid this to happen, just check the bind point type.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 748f4cce18)
2018-09-17 16:46:47 +02:00
Samuel Pitoiset
0d2527c944 radv: fix GPU hangs with 32-bit indirect descriptors
LLVM 6 isn't affected.

Fixes GPU hangs with new CTS:
dEQP-VK.binding_model.descriptorset_random.*

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 063264db5b)
2018-09-17 16:42:23 +02:00
Samuel Pitoiset
1655fbd40d radv: handle loc->indirect correctly for the first descriptor
This was wrong for descriptor #0 when all of them are indirect.
This is because indirect_offset was 0 and we emitted a
"normal" descriptor pointer for nothing.

While we are at it remove
radv_userdata_info::indirect_offset which is useless.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit aa30205929)
2018-09-17 16:39:08 +02:00
Samuel Pitoiset
8de8af1b90 radv: bump the maximum number of arguments to 64
Bumping to 64 should be safe enough.

Fixes some crashes with new CTS:
dEQP-VK.binding_model.descriptorset_random.*

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit b9f6521157)
2018-09-17 16:36:02 +02:00
Samuel Pitoiset
b03b6173a9 radv: fix VK_EXT_conditional_rendering visibility
It's actually just the opposite.

This fixes the new Sascha conditionalrender demo.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit abdf396cbe)
2018-09-17 16:33:24 +02:00
Samuel Pitoiset
9b52e8fde9 radv: fix function names for VK_EXT_conditional_rendering
Otherwise they are not exported.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Dave Airlie <airlied@redhat.com
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit d4bf954fe6)
2018-09-17 16:28:46 +02:00
Michel Dänzer
e4b667224d loader/dri3: Only wait for back buffer fences in dri3_get_buffer
We don't need to wait before drawing to the fake front buffer, as front
buffer rendering by definition is allowed to produce artifacts.

Fixes hangs in some cases when re-using the fake front buffer, due to it
still being busy (i.e. in use for presentation).

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/106404
Bugzilla: https://bugs.freedesktop.org/107757
Tested-by: Olivier Fourdan <ofourdan@redhat.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
(cherry picked from commit aefac10fec)
2018-09-17 16:08:43 +02:00
Sergii Romantsov
4fe3ce2aa3 mesa/meson: 32bit xmlconfig linkage
Building of 32bit mesa with meson causes linkage issue:
"undefined reference to `util_get_process_name'"
Fixed by adding link-with mesa_util for xmlconfig primary.

v2: Removed '[]', commit message corrected.

v3: Reverted changes in gbm and glx libraries.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843
Fixes: 2e1e6511f7 "util: extract get_process_name from xmlconfig.c"
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit bbe551f3ea)
2018-09-12 01:12:56 +03:00
Dave Airlie
87a05c22fb virgl: don't send a shader create with no data. (v2)
This fixes the situation where we'd send a shader with just the
header and no data.

piglit/glsl-max-varyings test was causing this to happen, and
the renderer fix was breaking it.

v2: drop fprintf

Fixes: a8987b88ff "virgl: add driver for virtio-gpu 3D (v2)"
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
(cherry picked from commit 240af61494)
2018-09-12 01:11:55 +03:00
Christopher Egert
5a73466674 radeon: fix ColorMask
Since commit af3685d149 various OpenGL applications regressed
on the classic mesa radeon driver.

Signed-off-by: Christopher Egert <cme3000@gmail.com>
CC: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 51995f6920)
2018-09-12 01:11:03 +03:00
Bas Nieuwenhuizen
196baf24d5 radv: Support v3 of VK_EXT_vertex_attribute_divisor.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
CC: 18.2 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f6e09db2e6)
2018-09-12 01:04:10 +03:00
Jason Ekstrand
f3c91874fa anv: Support v3 of VK_EXT_vertex_attribute_divisor
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 6f00785765)
2018-09-12 01:03:47 +03:00
Jason Ekstrand
8d7c88997f vulkan: Update the XML and headers to 1.1.84
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 34a17a48d4)
2018-09-12 01:03:18 +03:00
Marek Olšák
ad3151a02d ac: revert new LLVM 7.0 behavior for fdiv
Cc: 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit a5f35aa742)
2018-09-12 00:53:35 +03:00
Marek Olšák
7b2e888770 radeonsi: fix printing a BO list into ddebug reports
important for debugging

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit 662db03577)
2018-09-12 00:53:01 +03:00
Marek Olšák
f580738655 r600: fix HTILE for NPOT textures with mipmapping
Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit da72b6296c)
2018-09-12 00:52:29 +03:00
Marek Olšák
1aa9e7f973 winsys/radeon: fix CMASK fast clear for NPOT textures with mipmapping on SI/CI
Cc: 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit d4e52281aa)
2018-09-12 00:50:56 +03:00
Marek Olšák
075313416a radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CI
VI uses addrlib so it's unaffected.

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit a1b9a00f82)
2018-09-12 00:49:32 +03:00
Jason Ekstrand
bd6303a440 anv: Clamp scissors to the framebuffer boundary
The Vulkan 1.1.81 spec says:

    "It is legal for offset.x + extent.width or offset.y + extent.height
    to exceed the dimensions of the framebuffer - the scissor test still
    applies as defined above. Rasterization does not produce fragments
    outside of the framebuffer, so such fragments never have the scissor
    test performed on them."

Elsewhere, the Vulkan 1.1.81 spec says:

    "The application must ensure (using scissor if necessary) that all
    rendering is contained within the render area, otherwise the pixels
    outside of the render area become undefined and shader side effects
    may occur for fragments outside the render area. The render area
    must be contained within the framebuffer dimensions."

Unfortunately, there's some room for interpretation here as to what the
consequences are of having the render area set to exactly the
framebuffer dimensions and having a scissor that is larger than the
framebuffer.  Given that GL and other APIs provide automatic clipping to
the framebuffer, it makes sense that applications would assume that
Vulkan does this as well.  It costs us very little to play it safe and
just clamp client-provided scissors to the framebuffer dimensions.
Fortunately, the user is required to provide us with at least one
scissor so we don't need to handle the case where they don't.

Fixes: fb2a5ceb32 "anv: Emit DRAWING_RECTANGLE once at driver..."
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 465e5a868c)
2018-09-08 01:30:13 +03:00
Eric Anholt
ded225eb98 v3d: Fix setup of the VCM cache size.
There were two bugs working together to make things mostly work: I wasn't
dividing the VPM output size available by the size of a batch (vertex),
but I also had the size of the VPM reduced by a factor of 8.

Fixes dEQP-GLES3.functional.vertex_array_objects.all_attributes and it
seems also my intermittent varying failures.

Fixes: 1561e4984e ("v3d: Emit the VCM_CACHE_SIZE packet.")
(cherry picked from commit a91b158bd9)
2018-09-08 01:29:23 +03:00
Sergii Romantsov
3f20c0a004 i965/tools: 32bit compilation with meson
Building of 32bit mesa with meson causes issue:
"implicit declaration of function ‘__builtin_ia32_clflush’".
Fixed by adding msse2 compilation flag.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843
Fixes: 314879f7fe (i965: Fix asynchronous mappings on !LLC platforms.)
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 97fcccb25e)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/intel/tools/meson.build
2018-09-08 01:28:20 +03:00
Jason Ekstrand
5333eba63a anv: Disable the vertex cache when tessellating on SKL GT4
I have no idea if I'm correct about what's going wrong or if this is the
correct fix.  However, in my multiple weeks of banging my head on this
hang, a VUE reference counting bug seems to match all the symptoms and
it definitely fixes the hang.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107280
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit b08b4b2b25)
2018-09-08 01:21:05 +03:00
Jason Ekstrand
9909102335 anv: Re-emit vertex buffers when the pipeline changes
Some of the bits of VERTEX_BUFFER_STATE such as access type, instance
data step rate, and pitch come from the pipeline.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit c643c5e18d)
2018-09-08 01:19:30 +03:00
Jason Ekstrand
320dd62ce1 i965: Workaround the gen9 hw astc5x5 sampler bug
gen9 hardware has a bug in the sampler cache that can cause GPU hangs
whenever an texture with aux compression enabled is in the sampler cache
together with an ASTC5x5 texture.  Because we can't control what the
client binds at any given time, we have two options: resolve the CCS or
decompresss the ASTC.  Doing a CCS or HiZ resolve is far less drastic
and will likely have a smaller performance impact.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit f9e630e23d)
2018-09-08 01:17:49 +03:00
Eric Anholt
8ed365a7ff v3d: Fix SRC_ALPHA_SATURATE blending for RTs without alpha.
Fixes
dEQP-GLES3.functional.fragment_ops.blend.default_framebuffer.rgb_func_alpha_func.dst.src_alpha_saturate_src_alpha_saturate
and friends with --deqp-egl-config-name=rgb565d0s0

Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f73f748323)
2018-09-08 01:16:18 +03:00
Sergii Romantsov
9dff29fda5 intel: compiler option msse2 and mstackrealign
Seems in case of 32-bit library, usage of msse2 makes
some stack corruption or incorrect instructions.
Usage with mstackrealign fixes that case.

v2: Fixed meson.

v3: Definition of c_sse2_args moved on the top (L.Landwerlin).
    Added mstackrealign for Android's mks where msee4.1 is used.

v4: Added for Vulkan also.

v5: Commit message correction.

CC: <mesa-stable@lists.freedesktop.org>
Fixes: 6b05c080f2 (i965: Compile with -msse3)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107779
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit d709f12792)
2018-09-08 01:12:43 +03:00
Andres Gomez
4ca64c6872 cherry-ignore: i965/tools: 32bit compilation with meson
fixes: This commit was immediately reverted by commit 2dce1175c1.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-08 01:08:18 +03:00
Andres Gomez
4c977744ba Revert "Revert "glsl: skip stringification in preprocessor if in unreachable branch""
This reverts commit 2fd6f06faa.

Take back 28a3731e3f ("glsl: skip stringification in preprocessor if in
unreachable branch") after b9fe8ff23d ("glsl: fixer lexer for
unreachable defines") has made it to the branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-08 01:08:18 +03:00
Timothy Arceri
8a471fe120 glsl: fixer lexer for unreachable defines
If we have something like:

   #ifdef NOT_DEFINED
   #define A_MACRO(x) \
	if (x)
   #endif

The # on the #define is not skipped but the define itself is so
this then gets recognised as #if.

Until 28a3731e3f this didn't happen because we ended up in
<HASH>{NONSPACE} where BEGIN INITIAL was called stopping the
problem from happening.

This change makes sure we never call RETURN_TOKEN_NEVER_SKIP for
if/else/endif when processing a define.

Cc: Ian Romanick <idr@freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107772
Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit b9fe8ff23d)
2018-09-08 01:02:28 +03:00
Andrii Simiklit
4ddc689d68 mesa/util: add missing va_end() after va_copy()
MSDN:
"va_end must be called on each argument list that's initialized
 with va_start or va_copy before the function returns."

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107810
Fixes: c6267ebd6c "gallium/util: Stop bundling our snprintf implementation."
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
(cherry picked from commit 2930b76cfe)
2018-09-08 01:02:28 +03:00
Andrii Simiklit
841dc893ca mesa/util: don't ignore NULL returned from 'malloc'
We should exit from the function 'util_vasprintf'
with error code -1 for case where 'malloc'
returns NULL

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 864148d69e "util: add util_vasprintf() for Windows (v2)"
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
(cherry picked from commit 65cfe698b0)
2018-09-08 01:02:28 +03:00
Andrii Simiklit
d55da359fa mesa/util: don't use the same 'va_list' instance twice
The first usage of the 'va_list' instance could change it.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 864148d69e "util: add util_vasprintf() for Windows (v2)"
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
(cherry picked from commit 570cacba7a)
2018-09-08 01:02:28 +03:00
Andrii Simiklit
e1695569de apple/glx/log: added missing va_end() after va_copy()
Each invocation of va_copy() must be matched by a
corresponding invocation of va_end()

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 51691f0767 "darwin: Use ASL for logging"
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
(cherry picked from commit 267ed29288)
2018-09-08 01:02:28 +03:00
Mathias Fröhlich
884fa13865 tnl: Fix green gun regression in xonotic.
Fix an other regression of
mesa: Make gl_vertex_array contain pointers to first order VAO members.
The regression showed up with drivers using the tnl module and
was reproducible using xonotic-glx -benchmark demos/the-big-keybench.dem.

Fixes: 64d2a20480
    mesa: Make gl_vertex_array contain pointers to first order VAO members.
Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
(cherry picked from commit a6232b6932)
2018-09-08 01:02:28 +03:00
Jason Ekstrand
432a95b65f anv/pipeline: Only consider double elements which actually exist
The brw_vs_prog_data::double_inputs_read field comes directly from
shader_info::double_inputs which may contain inputs which are not
actually read.  Instead of using it directly, AND it with inputs_read
which is only things which are read.  Otherwise, we may end up
subtracting too many elements when computing elem_count.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103241
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 7b26741806)
2018-09-08 01:02:28 +03:00
Dylan Baker
93726c17c6 meson: Print a message about why a libdrm version was selected
We require a single version of libdrm for all of our libdrm
dependencies (core and driver), but the way this is structured can make
the error message less than helpful, as one driver might be the one
setting the libdrm requirement, while another might be the one that
generates the version failure.

This adds a simple message to the output announcing which libdrm module
set the version, which might be more helpful.

v2: - Use message suggested by Eric Engstrom

Fixes: c445b1d56f
       ("meson: Use the same version for all libdrm checks")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit d25a27ec56)
2018-09-08 01:02:28 +03:00
Gert Wollny
fb41d6e95c winsys/virgl: correct resource and handle allocation (v2)
Fixes crash with
  piglit/bin/map_buffer_range-invalidate CopyBufferSubData \
                               increment-offset -auto -fbo

* Resize the resource storage already when the count is equal to the
  allocated size, fixes:

  Invalid write of size 8
  at 0xB72E4CF: virgl_drm_add_res (virgl_drm_winsys.c:629)
  by 0xB72E4CF: virgl_drm_emit_res (virgl_drm_winsys.c:663)
  by 0xB72A44A: virgl_encode_resource_copy_region (virgl_encode.c:776)
  by 0xB40CD12: st_copy_buffer_subdata (st_cb_bufferobjects.c:585)
  by 0xB244A3B: _mesa_CopyBufferSubData (bufferobj.c:2940)
  by 0x109A1E: upload (invalidate.c:169)
  by 0x109C2F: piglit_display (invalidate.c:215)
  by 0x4F80FBE: run_test (piglit_fbo_framework.c:52)
  by 0x4F66E5F: piglit_gl_test_run (piglit-framework-gl.c:229)
  by 0x10949D: main (invalidate.c:47)
  Address 0xbe07d30 is 0 bytes after a block of size 4,096 alloc'd
  at 0x4C31B25: calloc (in
       /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
  by 0xB72DAAF: virgl_drm_cmd_buf_create (virgl_drm_winsys.c:567)

* Also resize the space allocated for the handles, fixes:

  Invalid write of size 4
  at 0xB72E4F0: virgl_drm_add_res (virgl_drm_winsys.c:631)
  by 0xB72E4F0: virgl_drm_emit_res (virgl_drm_winsys.c:663)
  by 0xB72A44A: virgl_encode_resource_copy_region (virgl_encode.c:776)
  by 0xB40CD12: st_copy_buffer_subdata (st_cb_bufferobjects.c:585)
  by 0xB244A3B: _mesa_CopyBufferSubData (bufferobj.c:2940)
  by 0x109A1E: upload (invalidate.c:169)
  by 0x109C2F: piglit_display (invalidate.c:215)
  by 0x4F80FBE: run_test (piglit_fbo_framework.c:52)
  by 0x4F66E5F: piglit_gl_test_run (piglit-framework-gl.c:229)
  by 0x10949D: main (invalidate.c:47)
  Address 0xbe08570 is 0 bytes after a block of size 2,048 alloc'd
  at 0x4C2FB0F: malloc (
    in /usr/lib/valgrind/vgpreload_memcheck-amd64- linux.so)
  by 0xB72DAC8: virgl_drm_cmd_buf_create (virgl_drm_winsys.c:572)

Fixes: 4b15b5e803 ("virgl: resize resource bo allocation if we need to.")

v2: - Use REALLOC macro and avoid memory leak when re-allocation fails
    - add Fixes tag (both Emil Velikov)
    - reorder commit message

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
(cherry picked from commit 9b0e8d8723)
2018-09-08 01:02:28 +03:00
Andres Gomez
cb1ddf48e2 docs: add sha256 checksums for 18.2.0
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-08 00:26:57 +03:00
Andres Gomez
7378180e7a docs: update 18.2.0 release notes
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-08 00:10:49 +03:00
Andres Gomez
83c0910b53 Update version to 18.2.0(final)
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-07 19:55:08 +03:00
Andres Gomez
2fd6f06faa Revert "glsl: skip stringification in preprocessor if in unreachable branch"
This reverts commit c52bcfa61c.

This revealed the bug reported at:
https://bugs.freedesktop.org/show_bug.cgi?id=107772

Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-07 18:22:09 +03:00
Andres Gomez
86704dc08f Update version to 18.2.0-rc6
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-05 22:48:59 +03:00
Juan A. Suarez Romero
552aaefff2 egl/wayland: do not leak wl_buffer when it is locked
If color buffer is locked, do not set its wayland buffer to NULL;
otherwise it can not be freed later.

Rather, flag it in order to destroy it later on the release event.

v2: instruct release event to unlock only or free wl_buffer too (Daniel)

This also fixes dEQP-EGL.functional.swap_buffers_with_damage.* tests.

CC: Daniel Stone <daniel@fooishbar.org>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 54a9622dd5)
2018-09-04 23:39:10 +03:00
Marek Olšák
7e0efcec63 st/mesa: help fix stencil border color for GL_DEPTH_STENCIL textures
GL_STENCIL_INDEX uses GL_INTENSITY for the border color, which is nicer
to hardware that doesn't read the stencil border value from the X channel.

This fixes a bunch of dEQP tests on Vega & Raven.

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 725e8ad559)
2018-09-04 23:32:36 +03:00
Ernestas Kulik
aa9d0fdbf6 u_vbuf: Fix leak
Reported by Coverity: data is heap-allocated, but only freed in the
info->index_size != 0 branch.

Signed-off-by: Ernestas Kulik <ernestas.kulik@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Cc: 18.2 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit ea1e50cc16)
2018-09-04 23:31:44 +03:00
Andres Gomez
105969acaa cherry-ignore: anv/blorp: Fix a comment as per Nanley's review feedback
extra: Just some comments update.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-03 16:46:25 +03:00
Mauro Rossi
ebbd7bcfdf egl/android: do not indent HAVE_DRM_GRALLOC preprocessor directive
Fixes: 3f7bca44d9 ("egl/android: #ifdef out flink name support")
Fixes: c7bb82136b ("egl/android: Add DRM node probing and filtering")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
(cherry picked from commit ac0856ae41)
2018-09-03 16:34:44 +03:00
Bas Nieuwenhuizen
f847a26873 radv: Fix CMASK dimensions.
Mirrors

1e40f69483 "ac/surface: fix CMASK fast clear for NPOT textures with mipmapping on SI/CI/VI"

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 233718a199)
2018-09-03 16:33:58 +03:00
Bas Nieuwenhuizen
a9377d363a radv: Use a lower max offchip buffer count.
No clue what gets fixed by this but both radeonsi and amdvlk do it.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit ab64891f4c)
2018-09-03 16:32:43 +03:00
Bas Nieuwenhuizen
706e2a0215 radv: Add VEGA20 support.
Just mirror the radeonsi bits. Since this is just adding the extra
switch entries for new HW I think this should be fine for stable.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 4dc244eb44)
2018-09-03 16:32:05 +03:00
Jason Ekstrand
e54a52b8ff anv/blorp: Do more flushing around HiZ clears
We make the flush after a HiZ clear unconditional and add a flush/stall
before the clear as well.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107760
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 62378c5e9e)
2018-09-03 16:31:18 +03:00
Ian Romanick
fae5e7198e i965/vec4: Clamp indirect tes input array reads with 0x0fffffff
Page 190 of "Volume 7: 3D Media GPGPU Engine (Haswell)" says the valid
range of the offset is [0, 0FFFFFFFh].

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 82530ce1b5)
2018-09-03 16:30:42 +03:00
Ian Romanick
c3c4448ac4 i965/vec4: Correctly handle uniform sources in generate_tes_add_indirect_urb_offset
Fixes failure in the new piglit test
tes-patch-input-array-vec2-index-invalid-rd.shader_test.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 75666605c9)
2018-09-03 16:20:18 +03:00
Andres Gomez
d910be4524 cherry-ignore: radeonsi: fix regression in indirect input swizzles.
fixes: This commit has more than one Fixes tag but the commit it
addresses didn't land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-09-01 02:10:03 +03:00
Christian Gmeiner
1761a6f5bc tegra: fix memory leak
Fixes: 1755f608f5 ("tegra: Initial support")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d0b09e2dfe)
2018-09-01 02:10:03 +03:00
Nanley Chery
14025e6570 i965/gen7_urb: Re-emit PUSH_CONSTANT_ALLOC on some gen9
According to internal docs, some gen9 platforms have a pixel shader push
constant synchronization issue. Although not listed among said
platforms, this issue seems to be present on the GeminiLake 2x6's we've
tested.

We consider the available workarounds to be too detrimental on
performance. Instead, we mitigate the issue by applying part of one of
the workarounds. Re-emit PUSH_CONSTANT_ALLOC at the top of every batch
(as suggested by Ken).

Fixes ext_framebuffer_multisample-accuracy piglit test failures with the
following options:
* 6 depth_draw small depthstencil
* 8 stencil_draw small depthstencil
* 6 stencil_draw small depthstencil
* 8 depth_resolve small
* 6 stencil_resolve small depthstencil
* 4 stencil_draw small depthstencil
* 16 stencil_draw small depthstencil
* 16 depth_draw small depthstencil
* 2 stencil_resolve small depthstencil
* 6 stencil_draw small
* all_samples stencil_draw small
* 2 depth_draw small depthstencil
* all_samples depth_draw small depthstencil
* all_samples stencil_resolve small
* 4 depth_draw small depthstencil
* all_samples depth_draw small
* all_samples stencil_draw small depthstencil
* 4 stencil_resolve small depthstencil
* 4 depth_resolve small depthstencil
* all_samples stencil_resolve small depthstencil

v2: Include more platforms in WA (Ken).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106865
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93355
Cc: <mesa-stable@lists.freedesktop.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 904c2a617d)
2018-09-01 02:10:02 +03:00
Samuel Pitoiset
ea6a08e7ea radv: fix passing clip/cull distances from VS to PS
CTS doesn't test input clip/cull distances for the fragment
shader stage, which explains why this was totally broken. I
wrote a simple test locally that works now.

This fixes a crash with GTA V and DXVK.

Note that we are exporting unused parameters from the vertex
shader now, but this can't be optimized easily because we don't
keep the fragment shader info...

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107477
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 6f47df3129)
2018-09-01 02:10:02 +03:00
Dave Airlie
df79d1fe8d ac/radeonsi: fix CIK copy max size
While adding transfer queues to radv, I started writing some tests,
the first test I wrote fell over copying a buffer larger than this
limit.

Checked AMDVLK and found the correct limit.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 2c1f249f2b)
2018-09-01 02:10:02 +03:00
Timothy Arceri
c52bcfa61c glsl: skip stringification in preprocessor if in unreachable branch
This fixes compilation of some "No Mans Sky" shaders where the stringification
happens in branches intended for DX12.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 28a3731e3f)
2018-09-01 02:10:02 +03:00
Jason Ekstrand
26b4f8a266 i965/screen: Allow modifiers on sRGB formats
This effectively reverts a266934935 which
was a misguided attempt at protecting intel_query_dma_buf_modifiers from
invalid formats.  Unfortunately, in some internal EGL cases, we can get
an SRGB format validly in this function.  Rejecting such formats caused
us to not allow CCS in some cases where we should have been allowing it.
This regressed the performance of some SynMark tests as well as GfxBench
ALU2, Tessellation and Manhattan 3.0 tests

There's some question of whether or not we really should be using SRGB
"fourcc" formats that aren't actually in drm_foucc.h but there's not
much harm in allowing them through here.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107223
Fixes: a266934935 "i965/screen: Return false for unsupported..."
Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit d9cf4308ce)
2018-09-01 02:10:02 +03:00
Jason Ekstrand
1feb45bc36 egl/dri2: Guard against invalid fourcc formats
We already reject attempts to import images with invalid fourcc formats
but don't really guard the queries all that well.  This makes us error
out in any calls to eglQueryDmaBufModifiersEXT if the given format is
not a valid fourcc format.  We also add an assert to ensure that drivers
don't advertise any non-fourcc formats.

Cc: mesa-stable@lists.freedesktop.org
Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 8c1b9882b2)

Squashed with commit:

st/dri: Don't expose sRGB formats to clients

Though the SARGB8888 format is used internally through its FourCC value,
it is not a real format as defined by drm_fourcc.h; it cannot be used
with KMS or other interfaces expecting drm_fourcc.h format codes.

Ensure we don't advertise it through the dmabuf format/modifier query
interfaces, preventing us from tripping over an assert.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reported-by: Michel Dänzer <michel.daenzer@amd.com>
Fixes: 8c1b9882b2 ("egl/dri2: Guard against invalid fourcc formats")
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
(cherry picked from commit 01c0aa9f05)
2018-09-01 02:09:54 +03:00
Jason Ekstrand
fb3303c4d7 egl/dri2: Add a helper for the number of planes for a FOURCC format
This also serves as a convenient "is this a fourcc format" check as well
which we'll take advantage of in the next commit.

Cc: mesa-stable@lists.freedesktop.org
Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit b95896f492)
2018-08-30 23:04:01 +03:00
Bas Nieuwenhuizen
332fa9f12a radv: Add missing checks in radv_get_image_format_properties.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 4738b6ac81)
2018-08-30 16:01:45 +03:00
vadym.shovkoplias
15c3dbd098 glsl/linker: Link all out vars from a shader objects on a single stage
During intra stage linking some out variables can be dropped because
it is not used in a shader with the main function. But these out vars
can be referenced on later stages which can lead to further linking
errors.

Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105731
(cherry picked from commit 966a797e43)
2018-08-30 16:01:18 +03:00
Andrii Simiklit
452f21e6de i965/gen6/xfb: handle case where transform feedback is not active
When the SVBI Payload Enable is false I guess the register R1.4
which contains the Maximum Streamed Vertex Buffer Index is filled by zero
and GS stops to write transform feedback when the transform feedback
is not active.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107579
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
(cherry picked from commit 1b0df8a460)
2018-08-30 15:57:08 +03:00
Jason Ekstrand
810c45f3fd nir/format_convert: Fix a bitmask in unpack_11f11f10f
Fixes: 4e337b42f9 "nir/format_convert: Add pack/unpack for R11F_G11F_B10F"

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 7cdf8f9339)
2018-08-30 15:57:08 +03:00
Jason Ekstrand
ffa251687c nir/algebraic: Be more careful converting ushr to extract_u8/16
If it's not the right bit-size, it may not actually be the correct
extraction.  For now, we'll only worry about 32-bit versions.

Fixes: 905ff86198 "nir: Recognize open-coded extract_u16"
Fixes: 76289fbfa8 "nir: Recognize open-coded extract_u8"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 116b47fe3c)
2018-08-30 15:57:08 +03:00
Lionel Landwerlin
31507d0594 anv: blorp: support multiple aspect blits
Newer blit tests are enabling depth&stencils blits. We currently don't
support it but can do by iterating over the aspects masks (copy some
logic from the CopyImage function).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9f44745eca ("anv: Use blorp to implement VkBlitImage")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 5a1c23d150)
2018-08-30 15:57:08 +03:00
Andres Gomez
6a13480707 cherry-ignore: mesa: allow GL_UNSIGNED_BYTE type for SNORM reads
pick: This commit addresses a regression introduced by previous commit
fa9e6c235d, which didn't make it for 18.2.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-08-30 15:57:08 +03:00
Marek Olšák
ccf5b1284a ac/surface: fix CMASK fast clear for NPOT textures with mipmapping on SI/CI/VI
This fixes VM faults and corruption.

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 1e40f69483)
2018-08-30 15:57:08 +03:00
Jason Ekstrand
7cd3674fbf anv: Claim to support depthBounds for ID games
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit c92a463d23)
2018-08-30 15:57:08 +03:00
Jason Ekstrand
c9525a167b anv: Copy the appliation info into the instance
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 8c048af589)

Squashed with commit:

anv: Free the app and engine name

Fixes: 8c048af589 "anv: Copy the appliation info into the instance"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit cdea5d996e)
2018-08-30 15:57:08 +03:00
Jason Ekstrand
70e7336e66 vulkan/alloc: Add a vk_strdup helper
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 4ffb575da5)
2018-08-30 15:57:08 +03:00
Andres Gomez
3d52cfe80b Update version to 18.2.0-rc5
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-08-30 02:55:57 +03:00
Dylan Baker
f958837964 meson: Actually load translation files
Currently we run the script but don't actually load any files, even in a
tarball where they exist.

Fixes: 3218056e0e
       ("meson: Build i965 and dri stack")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 7c00db9527)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/util/xmlpool/meson.build
2018-08-29 17:19:28 +03:00
Rhys Perry
baf5c4e4df docs: add forgotten features to 18.2.0 release notes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewied-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: 18.2: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 743e11c10b)
2018-08-28 15:53:39 +03:00
Lionel Landwerlin
09743ed9fc intel: decoder: handle 0 sized structs
Gen7.5 has a BLEND_STATE of size 0 which includes a variable length
group. We did not deal with that very well, leading to an endless
loop.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107544
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 440a988bd1)
2018-08-28 15:51:00 +03:00
Jason Ekstrand
633ef670bb intel/batch_decoder: Print blend states properly
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 70de31d0c1)
2018-08-28 15:50:59 +03:00
Jason Ekstrand
d963a16352 intel/batch_decoder: Fix dynamic state printing
Instead of printing addresses like everyone else, we were accidentally
printing the offset from state base address.  Also, state_map is a void
pointer so we were incrementing in bytes instead of dwords and every
state other than the first was wrong.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit cbd4bc1346)
2018-08-28 15:50:59 +03:00
Jason Ekstrand
d449afaa55 intel/decoder: Clean up field iteration and fix sub-dword fields
First of all, setting iter->name in advance_field is unnecessary because
it gets set by gen_decode_field which gets called immediately after
gen_decode_field in the one call-site.  Second, we weren't properly
initializing start_bit and end_bit in the initial condition of
gen_field_iterator_next so the first field of a struct would get printed
wrong if it doesn't start on the first bit.  This is fixed by adding a
iter_start_field helper which sets the field and also sets up the other
bits we need.  This fixes decoding of 3DSTATE_SBE_SWIZ.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 2abd7ae189)
2018-08-28 15:50:59 +03:00
Lionel Landwerlin
96504a886f intel: decoder: unify MI_BB_START field naming
The batch decoder looks for a field with a particular name to decide
whether an MI_BB_START leads into a second batch buffer level. Because
the names are different between Gen7.5/8 and the newer generation we
fail that test and keep on reading (invalid) instructions.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107544
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit f430a37fa7)
2018-08-28 15:50:59 +03:00
vadym.shovkoplias
71d7c714e7 glsl/linker: Allow unused in blocks which are not declated on previous stage
>From Section 4.3.4 (Inputs) of the GLSL 1.50 spec:

    "Only the input variables that are actually read need to be written
     by the previous stage; it is allowed to have superfluous
     declarations of input variables."

Fixes:
    * interstage-multiple-shader-objects.shader_test

v2:
  Update comment in ir.h since the usage of "used" field
  has been extended.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101247
Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit 4a8444d5bc)
2018-08-28 15:42:59 +03:00
Jason Ekstrand
0207765ab2 anv: Fill holes in the VF VUE to zero
This fixes a GPU hang in DOOM 2016 running under wine.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104809
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 76b0e4d8c9)
2018-08-27 09:55:58 +03:00
Emil Velikov
f6dccf6686 glsl: remove execute bit and shebang from python tests
Just like the rest of the tree - these should be run either as part of
the build system check target, or at the very least with an explicitly
versioned python executable.

Fixes: db8cd8e367 ("glcpp/tests: Convert shell scripts to a python script")
Fixes: 97c28cb082 ("glsl/tests: Convert optimization-test.sh to pure python")
Fixes: 3b52d29227 ("glsl/tests: reimplement warnings-test in python")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 48820ed8da)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/compiler/glsl/tests/optimization_test.py
2018-08-24 00:47:48 +03:00
Mathieu Bridon
7dbe4e9aab meson: Run the test with Python
This is a patch from me and a patch from Mathieu Bridon squashed
together.

Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Mathieu Bridon <bochecha@daitauha.fr>
(cherry picked from commit e15686567c)
[Andres Gomez: applied cleanly but backported as suggested by Emil]
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-08-24 00:46:01 +03:00
Emil Velikov
4b103d9931 docs: update required mako version
The requirement was bumped a while back, but we forgot to update the
docs.

Fixes: ed871af91c ("configure.ac: raise Mako required version to
0.8.0")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit e39b916d0c)
2018-08-24 00:25:01 +03:00
Gurchetan Singh
d1596b3aeb meson: fix egl build for android
Haven't tested this, but we do include loader.h
in platform_android.c

Fixes: c5ec155685 ("meson: wire up egl/android")
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit c731508b98)
2018-08-24 00:24:37 +03:00
Gurchetan Singh
44a844eb4d meson: fix egl build for surfaceless
Without this, I get:

 > platform_surfaceless.c:38:10: fatal error: 'loader.h' file not found
 > #include "loader.h"
 >      ^~~~~~~~~~
 > 1 error generated.

Fixes: 108d257a16 ("meson: build libEGL")
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>

v2: Split up patches, modify commit message (Dylan)
(cherry picked from commit ec6cb01e21)
2018-08-24 00:23:56 +03:00
Marek Olšák
2eaf0f656c glapi: actually implement GL_EXT_robustness for GLES
The extension was exposed but not the functions.

This fixes:
    dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.readn_pixels
    dEQP-GLES31.functional.debug.negative_coverage.get_error.state.get_nuniformfv
    dEQP-GLES31.functional.debug.negative_coverage.get_error.state.get_nuniformiv

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 37eee90df7)
2018-08-24 00:21:44 +03:00
Grazvydas Ignotas
da1ac07d65 radv: place pointer length into cache uuid
Thanks to reproducible builds, binary file timestamps may be identical
for both 32bit and 64bit packages when built from the same source.
This means radv will use the same cache for both 32 and 64 bit
processes, which leads to crashes.

Conveniently there is a spare byte in cache_uuid, let's place the
pointer size there.

Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
CC: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107601
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105904
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 356f6673d6)
2018-08-23 01:09:35 +03:00
Nanley Chery
461745ae38 intel/isl: Avoid tiling some 16K-wide render targets
Fix rendering issues on BDW and SKL.

Fixes: 0288fe8d04
("i965/miptree: Use the correct BLT pitch")

Fixes the following regressions seen

exclusively on SKL:
* KHR-GL46.texture_barrier_ARB.disjoint-texels
* KHR-GL46.texture_barrier_ARB.overlapping-texels
* KHR-GL46.texture_barrier.disjoint-texels
* KHR-GL46.texture_barrier.overlapping-texels

and both on BDW and SKL:
* GTF-GL46.gtf21.GL2FixedTests.buffer_corners.buffer_corners
* GTF-GL46.gtf21.GL2FixedTests.stencil_plane_corners.stencil_plane_corners

v2: Note the fixed tests (Andres).
    Don't cause failures with multisampled buffers (Andres).
    Don't hamper SKL GT4 (Ken).
v3: Fix the Fixes tag (Dylan).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107359
Cc: <mesa-stable@lists.freedesktop.org>
Tested-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 6d80b0b4ba)
2018-08-23 01:08:51 +03:00
Nanley Chery
627b874516 i965/miptree: Fix can_blit_slice()
Check the destination's row pitch against the BLT engine's row pitch
limitation as well.

Fixes: 0288fe8d04
("i965/miptree: Use the correct BLT pitch")

v2: Fix the Fixes tag (Dylan).
    Check the destination row pitch (Chris).

Reported-by: Dylan Baker <dylan@pnwbakers.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit b041fc0649)
2018-08-23 01:08:21 +03:00
Nanley Chery
dae1fc89a4 i965/miptree: Use miptree_map in map_blit functions
This struct contains all the data of interest. can_blit_slice() will use
it in the next patch to calculate the correct pitch.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 030b6efcfd)
2018-08-23 01:07:45 +03:00
Samuel Pitoiset
9798626fc0 ac/nir: fix getting GLSL type of array of samplers for TG4
This fixes a crash in build_tex_intrinsic() when trying to
launch the Basemark GPU benchmark on GFX8. It looks like
there is still something wrong because some frames are black.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106980
CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 4c43ec461d)
2018-08-23 01:07:12 +03:00
Samuel Pitoiset
7611e59a8c radv: remove dead variables after splitting per member structs
Otherwise, nir_lower_clip_cull_distance_arrays might report
wrong number of output clips/culls because it relies on
shader output variables and some of them might be dead.

This fixes a rendering issue with Dolphin and Super Mario
Sunshine.

Fixes: b0c643d8f5 ("spirv: Use NIR per-member splitting")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107610
CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 24ee53231d)
2018-08-23 01:06:34 +03:00
Marek Olšák
f8f46864f3 ac: completely remove +auto-waitcnt-before-barrier
it causes corruption on several different GPU generations.

Cc: 18.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit a4a104fc81)
2018-08-23 01:05:54 +03:00
Andres Gomez
86aa912dda Update version to 18.2.0-rc4
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-08-22 16:59:30 +03:00
Andres Gomez
2ec87de498 cherry-ignore: autotools: don't ship the git_sha1.h generated in git in the tarballs
fixes: This commit has more than one Fixes tag but the commit it
addresses didn't land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-08-22 16:58:27 +03:00
Dave Airlie
54cd81dfc5 r600/eg: rework atomic counter emission with flushes
With the current code, we didn't do the space checks prior
to atomic counter setup emission, but we also didn't add
atomic counters to the space check so we could get a flush
later as well.

These flushes would be bad, and lead to problems with
parallel tests. We have to ensure the atomic counter copy in,
draw emits and counter copy out are kept in the same command
submission unit.

This reworks the code to drop some useless masks, make the
counting separate to the emits, and make the space checker
handle atomic counter space.

[airlied: want this in 18.2]

Fixes: 06993e4ee (r600: add support for hw atomic counters. (v3))
(cherry picked from commit 32529e6084)
2018-08-21 23:18:19 +03:00
Danylo Piliaiev
5457e58a64 i965: Advertise 8 bits subpixel precision for viewport bounds on gen6+
We use floating-points for viewport bounds so VIEWPORT_SUBPIXEL_BITS
should reflect this.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105975

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 25ec806eb2)
2018-08-21 15:46:01 +03:00
Samuel Pitoiset
1e9c422894 radv: do not use CP predication for DCC decompressions
This fixes a regression with some Unity demos. Not sure
what the root cause of the problem is, especially because
the driver doesn't perform any fast color clears. So, it
shouldn't be needed to decompress DCC. RadeonSI says that
the decompression is relatively cheap if the surface has
been decompressed already.

One possible improvement is to two use predicates, one for
DCC and one for FCE that could be cleared when DCC, FMASK
or CMASK are performed by the driver. That might skip some
unnecessary decompression passes (not DCC though).

Fixes: ff7daadca1 ("radv: enable/disable predication for the DCC decompression pass")
CC: 18.2 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107563
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 0aacb5eab6)
2018-08-20 13:33:07 +03:00
Ray Strode
4320851198 gallium/winsys/kms: don't unmap what wasn't mapped
At the moment, depending on pipe transfer flags, the dumb
buffer map address can end up at either kms_sw_dt->ro_mapped
or kms_sw_dt->mapped.

When it's time to unmap the dumb buffer, both locations get unmapped,
even though one is probably initialized to 0.

That leads to the code segment getting unmapped at runtime and
crashes when trying to call into unrelated code.

This commit addresses the problem by using MAP_FAILED instead of
NULL for ro_mapped and mapped when the dumb buffer is unmapped,
and only unmapping mapped addresses at unmap time.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107098
Signed-off-by: Ray Strode <rstrode@redhat.com>
Fixes: d891f28df9 ("gallium/winsys/kms: Fix possible leak in map/unmap.")
Cc: Lepton Wu <lepton@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 9baff597ce)
2018-08-18 00:03:00 +03:00
Jason Ekstrand
f69fcede0a anv/lower_ycbcr: Use the binding array size for bounds checks
Because lower_ycbcr gets called before apply_pipeline_layout, the
indices are all logical and the binding layout HW size is actually too
big for the bounds check.  We should just use the regular logical array
size instead.

Fixes: f3e91e78a3 "anv: add nir lowering pass for ycbcr textures"
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 320dacb0a0)
2018-08-18 00:01:16 +03:00
Samuel Pitoiset
26c07daf9d radv/winsys: fix creating the BO list for virtual buffers
When the number of unique BO is 0, we optimize the list creation
by copying all buffers of the current CS directly into it. But
this is only valid if the CS doesn't have virtual buffers,
otherwise they are not added and hw might report VM faults.

This fixes VM faults with:
dEQP-VK.sparse_resources.image_sparse_binding.2d.rgba8ui.1024_128_1

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit d27e1584ce)
2018-08-17 23:35:38 +03:00
Alexander Tsoy
f3fc2d40fe meson: fix build for egl platform_x11 without dri3 and gbm
Compiling EGL's platform_x11 without dri3 and gbm yields this compile
failure:

platform_x11 needs inc_loader:

../mesa-18.2.0-rc2/src/egl/drivers/dri2/platform_x11.c:48:10: fatal
error: loader.h: No such file or directory
 #include "loader.h"
          ^~~~~~~~~~

Fixes: 108d257a16 ("meson: build libEGL")
Bugzilla: https://bugs.gentoo.org/663534
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 9a96bf0ecd)
2018-08-16 23:23:19 +03:00
Samuel Pitoiset
4477635b69 radv: initialize the DCC predicate correctly when it's compressed
We have to do a fast-clear eliminate when clearing DCC
metadata with 0x20202020. I don't know if that fixes anything
but that seems correct to me.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit f9e8456c39)
2018-08-16 23:22:19 +03:00
Samuel Pitoiset
bc6b6cb290 radv: fix missing initialization of the conditional rendering state
This was missing when VK_EXT_conditional_rendering has been
implemented. The predication type should be -1 to avoid
restoring previous state when performing a decompression pass
with DCC enabled.

Note that we don't have to handle secondary command buffers
because we don't support this feature currently.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit f3a78a9da0)
2018-08-16 23:21:34 +03:00
Bas Nieuwenhuizen
3ff3bfa3f5 radv: Revert divisor = 0 case for vertex attribute extension.
Seems like DXVK depends on that and it might get reverted
upstream. Since apps are not supposed to use 0 in v2 anyway,
we should be safe implementing the old behavior there.

Fixes: 66e12451ac "radv: Update to new VK_EXT_vertex_attribute_divisor to version 2."
CC: 18.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 011a811652)
2018-08-16 23:19:58 +03:00
Danylo Piliaiev
c2268223c8 glsl: Avoid calling get_array_element for scalar constants
Accessing scalar constant as an array in function call or
initializer list triggered assert in get_array_element.
Examples:
   func(0[0]);
   vec2 t = { 0[0], 0 };

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107550

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 479a849ad6)
2018-08-16 13:38:36 +03:00
Jason Ekstrand
b9a97a8b88 Revert "intel/nir: Call nir_lower_io_to_scalar_early"
Commit 4434591bf5 caused substantially more URB messages in
geometry and tessellation shaders.  Before we can really enable this
sort of optimization,  We either need some way of combining them back
together into vectors or we need to do cross-stage vector element
elimination without splitting everything into scalars.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107510
Fixes: 4434591bf5 "intel/nir: Call nir_lower_io_to_scalar_early"
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
(cherry picked from commit 10f44da775)
2018-08-16 02:09:21 +03:00
Sergii Romantsov
dbb5396667 intel/ppgtt: memory address alignment
Kernel (for ppgtt) requires memory address to be
aligned to page size (4096).

-v2: added marking that also fixes initial commit 01058a5522.
-v3: numbers replaced by PAGE_SIZE; buffer-object size is aligned
instead of alignment of offsets (Chris Wilson).
-v4: changes related to PAGE_SIZE moved to separate commit
-v5: restored alignment to page-size for 0-size.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106997
Fixes: a363bb2cd0 (i965: Allocate VMA in userspace for full-PPGTT systems.)
Fixes: 01058a5522 (i965: Add virtual memory allocator infrastructure to brw_bufmgr.)
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 24839663a4)
2018-08-16 02:08:32 +03:00
Timothy Arceri
586ac9c237 radv: add Doom workaround
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit f0a8accb0d)
2018-08-16 02:07:50 +03:00
Samuel Pitoiset
f070d5a568 radv: disable the auto-waitcnt-before-barrier LLVM option
This option allows us to remove additional s_waitcnt instructions
because s_barrier internally does s_waitcnt 0.

Though, apparently there is a problem with LDS accesses that
causes rendering issues with FFXV and DXVK. Disable this
optimization for now (RadeonSI still uses it).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107460
CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 71d5b2fbf8)
2018-08-16 02:07:15 +03:00
Mauro Rossi
b1e0876a6b egl/android: fix regression in drm_gralloc path (v2)
This patch fixes a regression in mesa 18.2 and mesa-dev branches
for HAVE_DRM_GRALLOC code path which is causing black screen on Android
and prevents boot due to SIGSEGV MAPERR crash related to unproper handling
of drm_gralloc drm FD in new droid_open_device() path.

Problem is due to c7bb82136b ("egl/android: Add DRM node probing and filtering")

To avoid the crash the former existing working droid_open_device() is restored,
renamed droid_open_device_drm_gralloc() and kept within HAVE_DRM_GRALLOC braces.

Tested with mesa-dev and mesa 18.2 branch and oreo-x86 bootanimation
and Androdi GUI booting is fixed with i965, nouveau, radeon.
The changes are compatible with gbm_gralloc, I've tested build with hwc too.

(v2) remove indentation from HAVE_DRM_GRALLOC pre-processor directive

NOTE: Definition of enum{} for GRALLOC_MODULE_PERFORM_GET_DRM_FD
is not necessary and it's actually causing a redefinition building error,
because in HAVE_DRM_GRALLOC path gralloc_drm.h is already exported
by libgralloc_drm which is currently still a dependency.

Fixes: c7bb82136b ("egl/android: Add DRM node probing and filtering")
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
(cherry picked from commit 73b342c7a5)
2018-08-15 15:45:34 +03:00
Andres Gomez
dcd3786e6e Update version to 18.2.0-rc3
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-08-15 14:53:50 +03:00
Bas Nieuwenhuizen
d82c36a4c7 radv: Allow ETC2 on RAVEN and VEGA10 instead of all GFX9.
Follow radeonsi.

Fixes: 3665f66ef2 "radv: Add support for ETC2 textures."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 4bb6c49375)
2018-08-14 23:52:11 +03:00
Bas Nieuwenhuizen
8061ee5883 radv: Update to new VK_EXT_vertex_attribute_divisor to version 2.
Behavior wrt firstInstance got changed, and a divisor of 0 has been
disallowed.

The new version of the ext got published in specification 1.1.81.

Sending to stable since the only known user is DXVK, which needs
this for correctness.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
CC: 18.2 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 66e12451ac)
2018-08-14 23:51:14 +03:00
Bas Nieuwenhuizen
bbd95de921 radv: Fix missing Android platform define.
CC: <mesa-stable@lists.freedesktop.org>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit bf33ca7512)
2018-08-14 23:50:05 +03:00
Kenneth Graunke
b696ab172c blorp: Properly handle Z24X8 blits.
One of the reasons we didn't notice that R24_UNORM_X8_TYPELESS
destinations were broken was that an earlier layer was swapping it
out for B8G8R8A8_UNORM.  That made Z24X8 -> Z24X8 blits work.

However, R32_FLOAT -> R24_UNORM_X8_TYPELESS was still totally broken.
The old code only considered one format at a time, without thinking
that format conversion may need to occur.

This patch moves the translation out to a place where it can consider
both formats.  If both are Z24X8, we continue using B8G8R8A8_UNORM to
avoid having to do shader math workarounds.  If we have a Z24X8
destination, but a non-matching source, we use our shader hacks to
actually render to it properly.

Fixes: 804856fa57 (intel/blorp: Handle more exotic destination formats)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit de57926dc9)
2018-08-13 12:45:28 +03:00
Kenneth Graunke
f7e8bc0f23 blorp: Don't try to use R32_UNORM for R24_UNORM_X8_TYPELESS rendering.
The hardware doesn't support rendering to R24_UNORM_X8_TYPELESS, so
Jason decided to fake it with a bit of shader math and R32_UNORM RTs.

The only problem is that R32_UNORM isn't renderable either...so we've
just traded one bad format for another.

This patch makes us use R32_UINT instead.

Fixes: 804856fa57 (intel/blorp: Handle more exotic destination formats)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 8a29086285)
2018-08-13 12:44:46 +03:00
Jason Ekstrand
90278c7f95 intel: Switch the order of the 2x MSAA sample positions
The Vulkan 1.1.82 spec flipped the order to better match D3D.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
(cherry picked from commit a9f7bcfdf9)
2018-08-13 12:43:03 +03:00
Gert Wollny
0c1832765f mesa/st: ETC2 now uses R8G8B8A8_SRGB as fallback
The check for ETC2 compatibility was not updated when the fallback
format was changed.

Fixes: 71867a0a61
   st/mesa: Fall back to R8G8B8A8_SRGB for ETC2

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit e94095ec30)
2018-08-10 15:31:40 +03:00
Eric Anholt
94da454726 egl: Fix leak of X11 pixmaps backing pbuffers in DRI3.
This is basically copied from the DRI2 destroy path.  Without this,
Raspberry Pi would quickly run out of CMA during the EGL tests in the CTS
due to all the pixmaps laying around.

Fixes: f35198bade ("egl/x11: Implement dri3 support with loader's dri3 helper")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit b618d7ea59)
2018-08-10 15:31:08 +03:00
Kenneth Graunke
dadc50add5 intel: Fix SIMD16 unaligned payload GRF reads on Gen4-5.
When the SIMD16 Gen4-5 fragment shader payload contains source depth
(g2-3), destination stencil (g4), and destination depth (g5-6), the
single register of stencil makes the destination depth unaligned.

We were generating this instruction in the RT write payload setup:

   mov(16)   m14<1>F   g5<8,8,1>F   { align1 compr };

which is illegal, instructions with a source region spanning more than
one register need to be aligned to even registers.  This is because the
hardware implicitly does (nr | 1) instead of (nr + 1) when splitting the
compressed instruction into two mov(8)'s.

I believe this would cause the hardware to load g5 twice, replicating
subspan 0-1's destination depth to subspan 2-3.  This showed up as 2x2
artifact blocks in both TIS-100 and Reicast.

Normally, we rely on the register allocator to even-align our virtual
GRFs.  But we don't control the payload, so we need to lower SIMD widths
to make it work.  To fix this, we teach lower_simd_width about the
restriction, and then call it again after lower_load_payload (which is
what generates the offending MOV).

Fixes: 8aee87fe4c (i965: Use SIMD16 instead of SIMD8 on Gen4 when possible.)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107212
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=13728
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Diego Viola <diego.viola@gmail.com>
(cherry picked from commit 08a5c395ab)
2018-08-10 15:30:10 +03:00
Adam Jackson
e91782ed55 glx: GLX_MESA_multithread_makecurrent is direct-only
This extension is not defined for indirect contexts. Marking it as
"client only", as the old code did here, would make the extension
available in indirect contexts, even though the server would certainly
not have it in its extension list.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 63a6b719d9)
2018-08-10 15:29:09 +03:00
Tapani Pälli
9df3460724 glsl: handle error case with ast_post_inc, ast_post_dec
Return ir_rvalue::error_value with ast_post_inc, ast_post_dec if
parser error was emitted previously. This way process_array_size
won't see bogus IR generated like with commit 9c676a6427.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98699
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit 03a5acec68)
2018-08-10 15:26:21 +03:00
vadym.shovkoplias
8be5985e65 drirc: Allow extension midshader for Metro Redux
This fixes both Metro 2033 Redux and Metro Last Light Redux

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99730
Signed-off-by: Eero Tamminen <eero.t.tamminen@intel.com>
Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit e0de26eacc)
2018-08-10 15:24:45 +03:00
Eric Engestrom
6606cacd3d intel/tools: add missing variable initialisation
Fixes: 6a60beba40 "intel/tools: Add an error state to aub translator"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit aac80f7597)
2018-08-09 15:19:00 +03:00
Eric Anholt
1378f33142 vc4: Fix vc4_fence_server_sync() on pre-syncobj kernels.
We won't have an FD if we're just having the server wait on a fence
created by eglCreateSyncKHR().  Our seqno fences will happen in order, so
server-side waits are no-ops in that case.  Fixes
dEQP-EGL.functional.sharing.gles2.multithread.simple_egl_server_sync.buffers.gen_delete

Fixes: b0acc3a562 ("broadcom/vc4: Native fence fd support")
(cherry picked from commit cfe69d0aaa)
2018-08-09 03:48:49 +03:00
Emil Velikov
9dacf10ca8 swr: don't export swr_create_screen_internal
With earlier rework the user and provider of the symbol are within the
same binary. Thus there's no point in exporting the function.

Spotted while reviewing patch from Chuck, that nearly added another
unneeded PUBLIC function.

Cc: Chuck Atkins <chuck.atkins@kitware.com>
Cc: Tim Rowley <timothy.o.rowley@intel.com>
Fixes: f50aa21456 "(swr: build driver proper separate from rasterizer")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Chuck Atkins <chuck.atkins@kitware.com>
Reviewed-By: George Kyriazis <george.kyriazis@intel.com<mailto:george.kyriazis@intel.com>>
Tested-by: Chuck Atkins <chuck.atkins@kitware.com<mailto:chuck.atkins@kitware.com>>
(cherry picked from commit 54d844897f)
2018-08-09 03:48:12 +03:00
Juan A. Suarez Romero
7af6be8864 wayland/egl: update surface size on window resize
According to EGL 1.5 spec, section 3.10.1.1 ("Native Window Resizing"):

  "If the native window corresponding to _surface_ has been resized
   prior to the swap, _surface_ must be resized to match. _surface_ will
   normally be resized by the EGL implementation at the time the native
   window is resized. If the implementation cannot do this transparently
   to the client, then *eglSwapBuffers* must detect the change and
   resize surface prior to copying its pixels to the native window."

So far, resizing a native window in Wayland/EGL was interpreted in Mesa
as a request to resize, which is not executed until the first draw call.
And hence, surface size is not updated until executing it. Thus,
querying the surface size with eglQuerySurface() after a window resize
still returns the old values.

This commit updates the surface size values as soon as the resize is
done, even when the real resize is done in the draw call. This makes the
semantics that any native window resize request take effect inmediately,
and if user calls eglQuerySurface() it will return the new resized
values.

v2: update surface size if there isn't a back surface (Daniel)

CC: Daniel Stone <daniel@fooishbar.org>
CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit a9fb331ea7)
2018-08-09 03:47:42 +03:00
Juan A. Suarez Romero
9ad14f71e6 wayland/egl: initialize window surface size to window size
When creating a windows surface with eglCreateWindowSurface(), the
width and height returned by eglQuerySurface(EGL_{WIDTH,HEIGHT}) is
invalid until buffers are updated (like calling glClear()).

But according to EGL 1.5 spec, section 3.5.6 ("Surface Attributes"):

  "Querying EGL_WIDTH and EGL_HEIGHT returns respectively the width and
   height, in pixels, of the surface. For a window or pixmap surface,
   these values are initially equal to the width and height of the
   native window or pixmap with respect to which the surface was
   created"

This fixes dEQP-EGL.functional.color_clears.* CTS tests

v2:
- Do not modify attached_{width,height} (Daniel)
- Do not update size on resizing window (Brendan)

CC: Daniel Stone <daniel@fooishbar.org>
CC: Brendan King <brendan.king@imgtec.com>
CC: mesa-stable@lists.freedesktop.org
Tested-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 1fe7cbdf05)
2018-08-09 03:47:21 +03:00
Emil Velikov
6ae0a639ec autotools: use correct gl.pc LIBS when using glvnd
This is more of a hack, since glvnd itself should be providing the file.
Until that happens, ensure the libs is correctly set to -lGL

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
(cherry picked from commit 315c46cfdc)
2018-08-09 03:46:50 +03:00
Emil Velikov
c709206977 autotools: error out when building with mangling and glvnd
It's not a thing that can work, nor is a wise idea to attempt.

v2: Tweak error message (Dylan)

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com> (v1)
(cherry picked from commit 25a9450a44)
2018-08-09 03:46:23 +03:00
Emil Velikov
33ac5fb678 autotools: error out when using the broken --with-{gl, osmesa}-lib-name
The toggles were broken with the introduction of --enable-mangling.
Fixing that up might be possible, but it's not worth the complexity
since one can rename the libraries at any point.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
(cherry picked from commit d5ac236471)
2018-08-09 03:45:51 +03:00
Emil Velikov
f0ae95492a automake: require shared glapi when using DRI based libGL
This has been a requirement for ages, yet it seems like we never
explicitly errored out during configure.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
(cherry picked from commit a7ea7511ba)
2018-08-09 03:45:20 +03:00
Eric Anholt
a42afc8504 vc4: Ignore samplers for finding uniform offsets.
Fixes:
dEQP-GLES2.shaders.struct.uniform.sampler_array_fragment
dEQP-GLES2.shaders.struct.uniform.sampler_array_vertex
dEQP-GLES2.shaders.struct.uniform.sampler_nested_fragment
dEQP-GLES2.shaders.struct.uniform.sampler_nested_vertex

Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 69158c452b)
2018-08-09 03:44:48 +03:00
Eric Anholt
adfbf1fe84 vc4: Respect a sampler view's first_layer field.
Fixes texturing from EGL images created from cubemap faces, as in
dEQP-EGL.functional.image.create.gles2_cubemap_negative_x_rgba_texture

Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 9ab6912a00)
2018-08-09 03:43:44 +03:00
Andres Gomez
4a25d8b623 Update version to 18.2.0-rc2
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-08-09 02:29:47 +03:00
Jon Turney
4a769c8850 meson: use correct keyword to fix a meson warning
With a sufficently recent meson, the following warning is produced:

WARNING: Passed invalid keyword argument "extra_args".
WARNING: This will become a hard error in the future.

It seems that compiler.links(args:) is meant here.

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-and-Tested-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit a48c0659e1)
2018-08-07 20:59:51 +03:00
Eric Anholt
d39fb6d157 vc4: Fix a leak of the no-vertex-elements workaround BO.
Fixes: bd1925562a ("vc4: Convert the driver to emitting the shader record using pack macros.")
(cherry picked from commit 9507e03699)
2018-08-07 20:57:27 +03:00
Eric Anholt
ed117c27e1 vc4: Fix context creation when syncobjs aren't supported.
Noticed when trying to run current Mesa on rpi's downstream kernel.

Fixes: b0acc3a562 ("broadcom/vc4: Native fence fd support")
(cherry picked from commit 86095e9bb1)
2018-08-07 20:57:01 +03:00
Chad Versace
fdbbe4c50c drisw: Fix build on Android Nougat, which lacks shm (v2)
In commit cf54bd5e8, dri_sw_winsys.c began using <sys/shm.h> to support
the new functions putImageShm, getImageShm in DRI_SWRastLoader. But
Android began supporting System V shared memory only in Oreo. Nougat has
no shm headers.

Fix the build by ifdef'ing out the shm code on Nougat.

Fixes: cf54bd5e8 "drisw: use shared memory when possible"
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: Marc-André Lureau <marcandre.lureau@gmail.com>
(cherry picked from commit aaa41cd297)
2018-08-07 20:56:30 +03:00
Gert Wollny
3c3589a0ba meson, install_megadrivers: Also remove stale symlinks
os.path.exists doesn't return True for stale symlinks, but they are in
the way later, when a link/file with the same name is to be created.
For instance it is conceivable that the pointed to file is replaced by
a file with a new name, and then the symlink is dead.

To handle this check specifically for all existing symlinks to be
removed. (This bugged me for some time with a link libXvMCr600.so
always being in the way of installing this file)

v2: use only os.lexist and replace all instances of os.exist (Dylan Baker)

v3: handle directory check correctly (Eric Engestrom)

Fixes: f7f1b30f81
       ("meson: extend install_megadrivers script to handle symmlinking")

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>(v2 minus dir check)
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
(cherry picked from commit 7a46b2d641)
2018-08-07 20:55:56 +03:00
Eric Anholt
37fa81f631 v3d: Emit the VCM_CACHE_SIZE packet.
This is needed to ensure that we don't get blocked waiting for VPM space
with bin/render overlapping.

Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 1561e4984e)
2018-08-07 20:55:09 +03:00
Eric Anholt
71aa72d695 v3d: Avoid spilling that breaks the r5 usage after a ldvary.
Fixes bad rendering when forcing 2 spills in glxgears.

Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 50a8713d4f)
2018-08-07 20:54:41 +03:00
Eric Anholt
c8d41bc58d v3d: Make sure that QPU instruction-has-a-dest matches VIR.
Found when debugging register spilling -- we would try to spill the dest
of a STVPMV, inserting spill code after entering the last segment.  In
fact, we were likely to to choose to do this, given that the STVPMV "dest"
temp was never read from, making it cheap to spill.

Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f2c0d310d6)
2018-08-07 20:54:10 +03:00
Eric Anholt
c3b1a6d7fa v3d: Wait for TMU writes to complete before continuing after a spill.
The simulator complained that we had write responses outstanding at shader
end.  It seems that a TMU read does not guarantee that previous TMU writes
by the thread have completed, which surprised me.

Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 3f9cb2eb05)
2018-08-07 20:53:42 +03:00
Eric Anholt
cce78368df v3d: Make sure we don't emit a thrsw before the last one finished.
Found while forcing some spilling, which creates a lot of short
tmua->thrsw->ldtmu sequences.

Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit ccbe33af5b)
2018-08-07 20:52:48 +03:00
Lionel Landwerlin
b6e9ef1556 intel: aubinator: fix read the context/ring
Up to now we've been lucky that the buffer returned was always exactly
at the address we requested.

Fixes: 144b40db54 ("intel: aubinator: drop the 1Tb GTT mapping")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
(cherry picked from commit 35955afa7a)
2018-08-06 16:43:31 +03:00
Karol Herbst
c18ed873a5 nvc0/ir: return 0 in imageLoad on incomplete textures
We already guarded all OP_SULDP against out of bound accesses, but we
ended up just reusing whatever value was stored in the dest registers.

Fixes CTS test shader_image_load_store.incomplete_textures

v2: fix for loads not ending up with predicates (bindless_texture)
v3: fix replacing the def

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
(cherry picked from commit c3325097be)
2018-08-06 16:42:47 +03:00
Marek Olšák
88c36f4379 gallium/u_vbuf: handle indirect multidraws correctly and efficiently (v3)
v2: need to do MAX{start+count} instead of MAX{count}
    added piglit tests
v3: use malloc

Cc: 18.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 0f79b2015b)
2018-08-06 15:46:19 +03:00
Mauro Rossi
bbeb78620c android: radv: build vulkan.radv conditionally to radeonsi
A problem was reported with arm,arm64 targets build due to missing
libLLVM shared library dependency with AOSP; to avoid this issue vulkan.radv
is built conditionally only when radeonsi is in BOARD_GPU_DRIVERS

Fixes: 0ca153f869 ("android: radv: enable build of vulkan.radv HAL module")

Reported-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 1c7a2433b2)
2018-08-06 15:44:06 +03:00
Andres Gomez
9ddff68f6f intel/tools: add error2aub creation into autotools
Tarball distribution is done through "make distcheck". We include the
meson targets also into autotools so they won't fail when building
from the tarball.

Fixes: 6a60beba40 ("intel/tools: Add an error state to aub translator")
Cc: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Dylan Baker <dylan.c.baker@intel.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 2d4d139877)
2018-08-02 21:21:22 +03:00
Vlad Golovkin
2e903df72f swr: Remove unnecessary memset call
Zeroing memory after calloc is not necessary. This also allows to avoid
possible crash when allocation fails, because memset is called before
checking screen for NULL.

Fixes: a29d63ecf7 "swr: refactor swr_create_screen to allow
                              for proper cleanup on error"
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 9d3a2394e4)
2018-08-02 21:20:52 +03:00
Andres Gomez
cb542ac550 Update version to 18.2.0-rc1
Signed-off-by: Andres Gomez <agomez@igalia.com>
2018-08-02 18:28:04 +03:00
1282 changed files with 18842 additions and 97093 deletions

View File

@@ -145,11 +145,6 @@ Edward O'Callaghan <funfunctor@folklore1984.net> <eocallaghan@alterapraxis.com>
Emeric Grange <emeric.grange@gmail.com> Emeric <emeric.grange@gmail.com>
Emil Velikov <emil.l.velikov@gmail.com> <emil.velikov@collabora.com>
Emil Velikov <emil.l.velikov@gmail.com> <emil.veliko@collabora.com>
Emil Velikov <emil.l.velikov@gmail.com> <emil.velikov@collabora.co.uk>
Emil Velikov <emil.l.velikov@gmail.com> <emil.veliikov@collabora.com>
Emil Velikov <emil.l.velikov@gmail.com> <emil.velikov@gmail.com>
Emil Velikov <emil.l.velikov@gmail.com> <emmil.velikov@collabora.com>
Eric Anholt <eric@anholt.net> Eric Anholt <anholt@FreeBSD.org>

View File

@@ -9,9 +9,9 @@ cache:
env:
global:
- XORG_RELEASES=https://xorg.freedesktop.org/releases/individual
- XCB_RELEASES=https://xcb.freedesktop.org/dist
- WAYLAND_RELEASES=https://wayland.freedesktop.org/releases
- XORG_RELEASES=http://xorg.freedesktop.org/releases/individual
- XCB_RELEASES=http://xcb.freedesktop.org/dist
- WAYLAND_RELEASES=http://wayland.freedesktop.org/releases
- XORGMACROS_VERSION=util-macros-1.19.0
- GLPROTO_VERSION=glproto-1.4.17
- DRI2PROTO_VERSION=dri2proto-2.8
@@ -35,33 +35,28 @@ matrix:
- env:
- LABEL="meson Vulkan"
- BUILD=meson
- DRI_DRIVERS=""
- GALLIUM_DRIVERS=""
- VULKAN_DRIVERS="intel,amd"
- LLVM_VERSION=6.0
- MESON_OPTIONS="-Ddri-drivers=[] -Dgallium-drivers=[]"
- LLVM_VERSION=5.0
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
addons:
apt:
sources:
- llvm-toolchain-trusty-6.0
# llvm-6 requires libstdc++4.9 which is not in main repo
- ubuntu-toolchain-r-test
- llvm-toolchain-trusty-5.0
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-6.0-dev
- llvm-5.0-dev
# Common
- xz-utils
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- python3.5
- python3-pip
- env:
- LABEL="meson loaders/classic DRI"
- BUILD=meson
- DRI_DRIVERS="i915,i965,r100,r200,swrast,nouveau"
- GALLIUM_DRIVERS=""
- VULKAN_DRIVERS=""
- MESON_OPTIONS="-Dvulkan-drivers=[] -Dgallium-drivers=[]"
addons:
apt:
packages:
@@ -71,7 +66,6 @@ matrix:
- libx11-xcb-dev
- libxdamage-dev
- libxfixes-dev
- python3.5
- python3-pip
- env:
- LABEL="make loaders/classic DRI"
@@ -93,7 +87,6 @@ matrix:
- libx11-xcb-dev
- libxdamage-dev
- libxfixes-dev
- python3-pip
- env:
# NOTE: Building SWR is 2x (yes two) times slower than all the other
# gallium drivers combined.
@@ -102,8 +95,10 @@ matrix:
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=6.0
- LLVM_VERSION=5.0
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- OVERRIDE_CC="gcc-4.8"
- OVERRIDE_CXX="g++-4.8"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
@@ -113,25 +108,24 @@ matrix:
addons:
apt:
sources:
- llvm-toolchain-trusty-6.0
# llvm-6 requires libstdc++4.9 which is not in main repo
- ubuntu-toolchain-r-test
- llvm-toolchain-trusty-5.0
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-6.0-dev
- llvm-5.0-dev
# Common
- xz-utils
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- python3-pip
- env:
- LABEL="make Gallium Drivers RadeonSI"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=6.0
- LLVM_VERSION=5.0
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
@@ -142,19 +136,18 @@ matrix:
addons:
apt:
sources:
- llvm-toolchain-trusty-6.0
# llvm-6 requires libstdc++4.9 which is not in main repo
- ubuntu-toolchain-r-test
- llvm-toolchain-trusty-5.0
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-6.0-dev
- llvm-5.0-dev
# Common
- xz-utils
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- python3-pip
- env:
- LABEL="make Gallium Drivers Other"
- BUILD=make
@@ -186,8 +179,8 @@ matrix:
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- python3-pip
- env:
# NOTE: Analogous to SWR above, building Clover is quite slow.
- LABEL="make Gallium ST Clover LLVM-3.9"
- BUILD=make
- MAKEFLAGS="-j4"
@@ -224,8 +217,8 @@ matrix:
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- python3-pip
- env:
# NOTE: Analogous to SWR above, building Clover is quite slow.
- LABEL="make Gallium ST Clover LLVM-4.0"
- BUILD=make
- MAKEFLAGS="-j4"
@@ -259,8 +252,8 @@ matrix:
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- python3-pip
- env:
# NOTE: Analogous to SWR above, building Clover is quite slow.
- LABEL="make Gallium ST Clover LLVM-5.0"
- BUILD=make
- MAKEFLAGS="-j4"
@@ -272,7 +265,7 @@ matrix:
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--disable-dri --enable-opencl --enable-opencl-icd --enable-llvm --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
- GALLIUM_DRIVERS="r600"
- GALLIUM_DRIVERS="r600,radeonsi"
- VULKAN_DRIVERS=""
- LIBUNWIND_FLAGS="--enable-libunwind"
addons:
@@ -294,8 +287,8 @@ matrix:
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- python3-pip
- env:
# NOTE: Analogous to SWR above, building Clover is quite slow.
- LABEL="make Gallium ST Clover LLVM-6.0"
- BUILD=make
- MAKEFLAGS="-j4"
@@ -312,7 +305,7 @@ matrix:
apt:
sources:
- llvm-toolchain-trusty-6.0
# llvm-6 requires libstdc++4.9 which is not in main repo
# llvm-6 depends on gcc-4.9 which is not in main repo
- ubuntu-toolchain-r-test
packages:
- libclc-dev
@@ -326,39 +319,6 @@ matrix:
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- python3-pip
- env:
- LABEL="make Gallium ST Clover LLVM-7"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=7
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--disable-dri --enable-opencl --enable-opencl-icd --enable-llvm --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
- GALLIUM_DRIVERS="r600,radeonsi"
- VULKAN_DRIVERS=""
- LIBUNWIND_FLAGS="--enable-libunwind"
addons:
apt:
sources:
- sourceline: 'deb http://apt.llvm.org/trusty/ llvm-toolchain-trusty-7 main'
key_url: https://apt.llvm.org/llvm-snapshot.gpg.key
# llvm-7 requires libstdc++4.9 which is not in main repo
- ubuntu-toolchain-r-test
packages:
- libclc-dev
# From sources above
- llvm-7-dev
- clang-7
- libclang-7-dev
# Common
- xz-utils
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- env:
- LABEL="make Gallium ST Other"
- BUILD=make
@@ -394,13 +354,12 @@ matrix:
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- python3-pip
- env:
- LABEL="make Vulkan"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="make -C src/gtest check && make -C src/intel check"
- LLVM_VERSION=6.0
- LLVM_VERSION=5.0
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl --with-platforms=x11,wayland"
- DRI_DRIVERS=""
@@ -411,18 +370,17 @@ matrix:
addons:
apt:
sources:
- llvm-toolchain-trusty-6.0
# llvm-6 requires libstdc++4.9 which is not in main repo
- ubuntu-toolchain-r-test
- llvm-toolchain-trusty-5.0
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-6.0-dev
- llvm-5.0-dev
# Common
- xz-utils
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- python3-pip
- env:
- LABEL="scons"
- BUILD=scons
@@ -466,19 +424,21 @@ matrix:
- BUILD=scons
- SCONSFLAGS="-j4"
- SCONS_TARGET="swr=1"
- LLVM_VERSION=6.0
- LLVM_VERSION=5.0
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
# Keep it symmetrical to the make build. There's no actual SWR, yet.
- SCONS_CHECK_COMMAND="true"
- OVERRIDE_CC="gcc-4.8"
- OVERRIDE_CXX="g++-4.8"
addons:
apt:
sources:
- llvm-toolchain-trusty-6.0
# llvm-6 requires libstdc++4.9 which is not in main repo
- ubuntu-toolchain-r-test
- llvm-toolchain-trusty-5.0
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-6.0-dev
- llvm-5.0-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
@@ -495,6 +455,7 @@ matrix:
- env:
- LABEL="macOS meson"
- BUILD=meson
- MESON_OPTIONS="-Degl=false"
os: osx
before_install:
@@ -521,24 +482,18 @@ before_install:
fi
install:
# Install a more modern meson from pip, since the version in the
# ubuntu repos is often quite old. This requires python>=3.5, so
# let's make it default
- if test "x$BUILD" = xmeson; then
sudo update-alternatives --install /usr/bin/python3 python3 /usr/bin/python3.5 10;
pip3 install --user meson;
pip3 install --user mako;
fi
- pip2 install --user mako
# Install autotools build dependencies
- if test "x$BUILD" = xmake; then
pip2 install --user mako;
# Install a more modern meson from pip, since the version in the
# ubuntu repos is often quite old. Avoid >=0.45.0 as it needs python
# 3.5+
- if test "x$BUILD" = xmeson; then
pip3 install --user "meson<0.45.0";
fi
# Install a more modern scons from pip.
- if test "x$BUILD" = xscons; then
pip2 install --user "scons>=2.4";
pip2 install --user mako;
fi
# Since libdrm gets updated in configure.ac regularly, try to pick up the
@@ -580,7 +535,7 @@ install:
tar -jxvf $LIBPCIACCESS_VERSION.tar.bz2
(cd $LIBPCIACCESS_VERSION && ./configure --prefix=$HOME/prefix && make install)
wget https://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.bz2
wget http://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.bz2
tar -jxvf $LIBDRM_VERSION.tar.bz2
(cd $LIBDRM_VERSION && ./configure --prefix=$HOME/prefix --enable-vc4 --enable-freedreno --enable-etnaviv-experimental-api && make install)
@@ -596,11 +551,11 @@ install:
tar -jxvf $LIBXSHMFENCE_VERSION.tar.bz2
(cd $LIBXSHMFENCE_VERSION && ./configure --prefix=$HOME/prefix && make install)
wget https://people.freedesktop.org/~aplattner/vdpau/$LIBVDPAU_VERSION.tar.bz2
wget http://people.freedesktop.org/~aplattner/vdpau/$LIBVDPAU_VERSION.tar.bz2
tar -jxvf $LIBVDPAU_VERSION.tar.bz2
(cd $LIBVDPAU_VERSION && ./configure --prefix=$HOME/prefix && make install)
wget https://www.freedesktop.org/software/vaapi/releases/libva/$LIBVA_VERSION.tar.bz2
wget http://www.freedesktop.org/software/vaapi/releases/libva/$LIBVA_VERSION.tar.bz2
tar -jxvf $LIBVA_VERSION.tar.bz2
(cd $LIBVA_VERSION && ./configure --prefix=$HOME/prefix --disable-wayland --disable-dummy-driver && make install)
@@ -684,14 +639,6 @@ script:
- |
if test "x$BUILD" = xmeson; then
if test "x$TRAVIS_OS_NAME" == xosx; then
MESON_OPTIONS="-Degl=false"
fi
if test "x$TRAVIS_OS_NAME" == xlinux; then
MESON_OPTIONS="-Ddri-drivers=${DRI_DRIVERS:-[]} -Dgallium-drivers=${GALLIUM_DRIVERS:-[]} -Dvulkan-drivers=${VULKAN_DRIVERS:-[]}"
fi
# Travis CI has moved to LLVM 5.0, and meson is detecting
# automatically the available version in /usr/local/bin based on
# the PATH env variable order preference.

View File

@@ -76,8 +76,6 @@ LOCAL_CFLAGS += \
-DMAJOR_IN_SYSMACROS \
-DVK_USE_PLATFORM_ANDROID_KHR \
-fvisibility=hidden \
-fno-math-errno \
-fno-trapping-math \
-Wno-sign-compare
LOCAL_CPPFLAGS += \
@@ -91,13 +89,6 @@ LOCAL_CPPFLAGS += \
LOCAL_CONLYFLAGS += \
-std=c99
# c11 timespec_get is part of bionic as well
# https://android-review.googlesource.com/c/718518
# This means releases from P and earlier won't need this
ifeq ($(filter 5 6 7 8 9, $(MESA_ANDROID_MAJOR_VERSION)),)
LOCAL_CFLAGS += -DHAVE_TIMESPEC_GET
endif
ifeq ($(strip $(MESA_ENABLE_ASM)),true)
ifeq ($(TARGET_ARCH),x86)
LOCAL_CFLAGS += \

View File

@@ -10,7 +10,7 @@ $(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/STATIC_LIBRARIES/libmesa_*_interm
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/i9?5_dri_intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/libglapi_intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/libGLES_mesa_intermediates)
$(call add-clean-step, rm -rf $(HOST_OUT)/*/EXECUTABLES/mesa_*_intermediates)
$(call add-clean-step, rm -rf $(HOST_OUT)/*/EXECUTABLES/glsl_compiler_intermediates)
$(call add-clean-step, rm -rf $(HOST_OUT)/*/STATIC_LIBRARIES/libmesa_*_intermediates)
$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/EXECUTABLES/mesa_*_intermediates)
$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/EXECUTABLES/glsl_compiler_intermediates)
$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/STATIC_LIBRARIES/libmesa_*_intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/*_dri_intermediates)

View File

@@ -31,7 +31,6 @@ import common
# Minimal scons version
EnsureSConsVersion(2, 4)
EnsurePythonVersion(2, 7)
#######################################################################

View File

@@ -1 +1 @@
18.3.6
18.2.8

View File

@@ -33,41 +33,31 @@ branches:
# - https://www.appveyor.com/blog/2014/06/04/shallow-clone-for-git-repositories
clone_depth: 100
# https://www.appveyor.com/docs/build-cache/
cache:
- '%LOCALAPPDATA%\pip\Cache -> appveyor.yml'
- win_flex_bison-2.5.15.zip
- llvm-5.0.1-msvc2017-mtd.7z
- win_flex_bison-2.5.9.zip
- llvm-5.0.1-msvc2015-mtd.7z
os: Visual Studio 2017
init:
# Appveyor defaults core.autocrlf to input instead of the default (true), but
# that can hide problems processing CRLF text on Windows
- git config --global core.autocrlf true
os: Visual Studio 2015
environment:
WINFLEXBISON_VERSION: 2.5.15
LLVM_ARCHIVE: llvm-5.0.1-msvc2017-mtd.7z
WINFLEXBISON_ARCHIVE: win_flex_bison-2.5.9.zip
LLVM_ARCHIVE: llvm-5.0.1-msvc2015-mtd.7z
install:
# Check git config
- git config core.autocrlf
# Check pip
- python --version
- python -m pip --version
# Install Mako
- python -m pip install Mako==1.0.7
- python -m pip install Mako==1.0.6
# Install pywin32 extensions, needed by SCons
- python -m pip install pypiwin32
# Install python wheels, necessary to install SCons via pip
- python -m pip install wheel
# Install SCons
- python -m pip install scons==3.0.1
- python -m pip install scons==2.5.1
- scons --version
# Install flex/bison
- set WINFLEXBISON_ARCHIVE=win_flex_bison-%WINFLEXBISON_VERSION%.zip
- if not exist "%WINFLEXBISON_ARCHIVE%" appveyor DownloadFile "https://github.com/lexxmark/winflexbison/releases/download/v%WINFLEXBISON_VERSION%/%WINFLEXBISON_ARCHIVE%"
- if not exist "%WINFLEXBISON_ARCHIVE%" appveyor DownloadFile "https://downloads.sourceforge.net/project/winflexbison/old_versions/%WINFLEXBISON_ARCHIVE%"
- 7z x -y -owinflexbison\ "%WINFLEXBISON_ARCHIVE%" > nul
- set Path=%CD%\winflexbison;%Path%
- win_flex --version
@@ -79,10 +69,10 @@ install:
- set LLVM=%CD%\llvm
build_script:
- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.1 llvm=1
- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.0 llvm=1
after_build:
- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.1 llvm=1 check
- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.0 llvm=1 check
# It's possible to setup notification here, as described in

View File

@@ -1,54 +1,56 @@
# fixes: Commit was squashed into the respective offenders
c02390f8fcd367c7350db568feabb2f062efca14 egl/wayland: rather obvious build fix
# fixes: The commit addresses b4476138d5ad3f8d30c14ee61f2f375edfdbab2a
# fixes: This commit has more than one Fixes tag but the commit it
# addresses didn't land in branch.
6ff1c479968819b93c46d24bd898e89ce14ac401 autotools: don't ship the git_sha1.h generated in git in the tarballs
# pick: This commit addresses a regression introduced by previous
# commit fa9e6c235da, which didn't make it for 18.2.
a72dbc461bdb7714656e62cd8f4b00a404c2e6e0 mesa: allow GL_UNSIGNED_BYTE type for SNORM reads
# fixes: This commit has more than one Fixes tag but the commit it
# addresses didn't land in branch.
c9f54486959716762e6818dabb0a73a8cd46df67 radeonsi: fix regression in indirect input swizzles.
# extra: Just some comments update.
2ad9917e187c1e9dbb053d3c98aa0e39fa374059 anv/blorp: Fix a comment as per Nanley's review feedback
# fixes: This commit was immediately reverted by commit 2dce1175c1c.
4aec44c0d9c4c0649c362199fac97efe0a3b38a4 i965/tools: 32bit compilation with meson
# pick: This commit was reverted by commit 95bb7d82ca8.
90819abb56f6b1a0cd4946b13b6caf24fb46e500 radv: fix descriptor pool allocation size
# pick: There is a specific patch for stable branch for this commit.
0d495bec25bd7584de4e988c2b4528c1996bc1d0 radeonsi: NaN should pass kill_if
# pick: This commit reverts 0fa9e6d7b30 which did not land in branch.
aa02d7e8781c25ee18b6da97606300808c84973a Revert "anv/skylake: disable ForceThreadDispatchEnable"
# pick: Explicit 18.3 only nominations.
b1b2dd06a7b777e862b525302b15bcaf407d3648 radv: add missing TFB queries support to CmdCopyQueryPoolsResults()
e0c7114eb3c19d4c2653f661698a6baa3bc9bedf st/mesa: disable L3 thread pinning
b5f213bb1dcde22949dffe9d3a431fecd5d0f33b radv: binding streamout buffers doesn't change context regs
9367514524f70faad99c721bac92339c8ff8bad9 radeonsi: fix video APIs on Raven2
ea9f95e2a67eca90bb84eea24e7b4b804b3b1345 radeonsi: go back to using bottom-of-pipe for beginning of TIME_ELAPSED
8f401b0ce6e6650e1a85e9bb2be23d5ff08812b8 anv,radv: Disable VK_EXT_pci_bus_info
8c77f4c76ddfe0b692b430b012b65f6981a53336 meson: Add support for gnu hurd
7a90886921eb1d5d73b40aadd6fd3f340041bd26 meson: Add toggle for glx-direct
# fixes: This commit was reverted by commit 5f312e95f87.
a9031bf9b55602d93cccef6c926e2179c23205b4 i965/batch: avoid reverting batch buffer if saved state is an empty
# extra: intel/aub_viewer is not present in branch
ac324a6809c09c54d3b0bfdb00e5e62987ec4ad8 intel/aub_viewer: fix dynamic state printing
0db898cef2f5a455138e5845689c075aadba1c1f intel/aub_viewer: Print blend states properly
# fixes: This commit requires commits 854202f70e6 and 84bc5738401 which did not
# land in branch.
c120dbfe4d18240315ecec9b43a61aeb9ab239ac mesa/main: fix incorrect depth-error
# fixes: This commit fixes commits b4476138d5ad and aa0fed10d357 which did not
# land in branch.
d0c7b079d07f751eb37ecaa45a2a6db920d71d7a freedreno: Fix autotools build.
# pick: While this commit does not include the proper CC tag, it was intended
# to be applied only in 18.3 branch.
017199d2d2e4c57015bc60edfcc656062c3a7472 mesa: Revert INTEL_fragment_shader_ordering support
# fixes: The changes this commit provides are already included in the branch.
ff6f1dd0d3c6b4c15ca51b478b2884d14f6a1e06 meson: libfreedreno depends upon libdrm (for fence support)
# fixes: This commit requires commits aeaf8dbd097 and 7484bc894b9 which did not
# land in branch.
f67dea5e19ef14187be0e8d0f61b1f764c7ccb4f radv: Fix multiview depth clears
# stable The commits aren't suitable in their present form.
bfe31c5e461a1330d6f606bf5310685eff1198dd nir/builder: Add nir_i2i and nir_u2u helpers which take a bit size
abfe674c54bee6f8fdcae411b07db89c10b9d530 spirv: Handle arbitrary bit sizes for deref array indices
# warn The commits refer stale sha, yet don't fix anything in particular.
98984b7cdd79c15cc7331c791f8be61e873b8bbd Revert "mapi/new: sort by slot number"
9f86f1da7c68b5b900cd6f60925610ff1225a72d egl: add glvnd entrypoints for EGL_MESA_query_driver
# stable Explicit 19.0 only nomination.
38f542783faa360020b77fdd76b97f207a9e0068 v50,nvc0: add explicit settings for recent caps
# stable Explicit 19.0 only nominations.
399215eb7a0517463e5757c598d6cff6ae2301d0 nvc0: add support for handling indirect draws with attrib conversion
4443b6ddf2e08d06f3d0457cf20a2e04244cde37 nvc0/ir: always use CG mode for loads from atomic-only buffers
5de5beedf21306b01730085f8e03d8f424729016 nvc0/ir: fix second tex argument after levelZero optimization
162352e6711b3ceab114686f7a3248074339e7f7 nvc0: fix 3d images on kepler
e00799d3dc0595dc3998dbf199ceec8b1eece966 nv50,nvc0: use condition for occlusion queries when already complete
6adb9b38bfb1f6ee4c94596bf0744225aa8e967a nvc0: stick zero values for the compute invocation counts
04593d9a73ea257a36cc3b9fb5cd41427beaaea5 gk110/ir: Add rcp f64 implementation
7937408052a1896f0b08b0110bb8a1790eeee351 gk110/ir: Add rsq f64 implementation
656ad060518d067a3b311db8c2de2a396fb41898 gk110/ir: Use the new rcp/rsq in library
12669d29705a26478aa691cb454149628be65f17 gk104/ir: Use the new rcp/rsq in library
815a8e59c6d462a7008653ea9e3010d40b6ba589 gm107/ir: add fp64 rcp
cce495572136a606dd2a35e79f45080c3796e2cc gm107/ir: add fp64 rsq
6010d7b8e8bee1bcea2b329cf6d3b44c5fc3ca66 gallium: add PIPE_CAP_MAX_VARYINGS
cbd1ad6165f0aea7fb7c6fd1b36ad5317dd65cb7 st/mesa: require RGBA2, RGB4, and RGBA4 to be renderable
# stable The commit addresses functionality not present in branch
1b8983c25be19073c02fe9630e949be55f8280fa radv: fix using LOAD_CONTEXT_REG with old GFX ME firmwares on GFX8
# stable Explicit 19.0 only nominations, require work which did not land in branch
8ab95b849e66f3221d80a67eef2ec6e3730901a8 anv: Refactor descriptor pushing a bit
5c30fffeec1732c21d600c036f95f8cdb1bb5487 anv: Take references to push descriptor set layouts
# sha Commit references invalid sha - a offender did not land in branch.
85ee157283c667372baf7c03259cba08853f0067 gitlab-ci: autotools needs to be told which llvm version to use
# revert The commit was reverted shortly after it was applied on master
47fc359822494935852de1e70e4d840b2fe6a25c anv: release memory allocated by glsl types during spirv_to_nir
# stable Explicitly 19.0 nomination, seemingly a performance patch
5ef2b8f1f2ebcdb4ffe5c98b3f4f48e584cb4b22 nir: Add a pass for lowering IO back to vector when possible
# fixes Temporary block perf. fix depending on previous opt. pass
6d5d89d25a0a4299dbfcbfeca71b6c7e65ef3d45 intel/nir: Vectorize all IO
# fixes: There is a specific patch for stable franch for this commit.
bde9f482de69528db5ccf5dd6bbfd8359adfbb19 ac: split 16-bit ssbo loads that may not be dword aligned
# pick: This commit is nominated to stable, but fixes commit b3c61469255 which
# is in 18.3 stable. Hence, this commit is considered as nominated to
# 18.3 stable.
947f7b452a550c66cfb9a8c9518e35635eb25947 nir: properly find the entry to keep in copy_prop_vars
# pick: This commit is nominated to stable, but fixes commit 11dc1307794 which
# is not in the current stable branch.
d6110d4d547ad98dce7a89d0e020ab5be5aaaad6 intel/compiler: move nir_lower_bool_to_int32 before nir_lower_locals_to_regs

View File

@@ -13,12 +13,12 @@
is_stable_nomination()
{
git show --pretty=medium --summary "$1" | grep -q -i -o "CC:.*mesa-stable"
git show --summary "$1" | grep -q -i -o "CC:.*mesa-stable"
}
is_typod_nomination()
{
git show --pretty=medium --summary "$1" | grep -q -i -o "CC:.*mesa-dev"
git show --summary "$1" | grep -q -i -o "CC:.*mesa-dev"
}
fixes=
@@ -44,7 +44,7 @@ is_sha_nomination()
# Treat only the current line
id=`echo "$fixes" | tail -n $fixes_count | head -n 1 | cut -d : -f 2`
fixes_count=$(($fixes_count-1))
if ! git show $id >/dev/null 2>&1; then
if ! git show $id &>/dev/null; then
echo WARNING: Commit $1 lists invalid sha $id
fi
done
@@ -143,7 +143,7 @@ do
esac
printf "[ %8s ] " "$tag"
git --no-pager show --no-patch --oneline $sha
git --no-pager show --summary --oneline $sha
done
rm -f already_picked

29
bin/git_sha1_gen.py Normal file → Executable file
View File

@@ -1,3 +1,5 @@
#!/usr/bin/env python
"""
Generate the contents of the git_sha1.h file.
The output of this script goes to stdout.
@@ -26,25 +28,22 @@ def get_git_sha1():
git_sha1 = ''
return git_sha1
def write_if_different(contents):
"""
Avoid touching the output file if it doesn't need modifications
Useful to avoid triggering rebuilds when nothing has changed.
"""
if os.path.isfile(args.output):
with open(args.output, 'r') as file:
if file.read() == contents:
return
with open(args.output, 'w') as file:
file.write(contents)
parser = argparse.ArgumentParser()
parser.add_argument('--output', help='File to write the #define in',
required=True)
required=True)
args = parser.parse_args()
git_sha1 = os.environ.get('MESA_GIT_SHA1_OVERRIDE', get_git_sha1())[:10]
if git_sha1:
write_if_different('#define MESA_GIT_SHA1 " (git-' + git_sha1 + ')"')
git_sha1_h_in_path = os.path.join(os.path.dirname(sys.argv[0]),
'..', 'src', 'git_sha1.h.in')
with open(git_sha1_h_in_path , 'r') as git_sha1_h_in:
new_sha1 = git_sha1_h_in.read().replace('@VCS_TAG@', git_sha1)
if os.path.isfile(args.output):
with open(args.output, 'r') as git_sha1_h:
if git_sha1_h.read() == new_sha1:
quit()
with open(args.output, 'w') as git_sha1_h:
git_sha1_h.write(new_sha1)
else:
write_if_different('#define MESA_GIT_SHA1 ""')
open(args.output, 'w').close()

8
bin/install_megadrivers.py Normal file → Executable file
View File

@@ -1,3 +1,4 @@
#!/usr/bin/env python
# encoding=utf-8
# Copyright © 2017-2018 Intel Corporation
@@ -35,11 +36,7 @@ def main():
args = parser.parse_args()
if os.path.isabs(args.libdir):
destdir = os.environ.get('DESTDIR')
if destdir:
to = os.path.join(destdir, args.libdir[1:])
else:
to = args.libdir
to = os.path.join(os.environ.get('DESTDIR', '/'), args.libdir[1:])
else:
to = os.path.join(os.environ['MESON_INSTALL_DESTDIR_PREFIX'], args.libdir)
@@ -49,6 +46,7 @@ def main():
if os.path.lexists(to):
os.unlink(to)
os.makedirs(to)
shutil.copy(args.megadriver, master)
for driver in args.drivers:
abs_driver = os.path.join(to, driver)

View File

@@ -99,6 +99,8 @@ def AddOptions(opts):
'enable static code analysis where available', 'no'))
opts.Add(BoolOption('asan', 'enable Address Sanitizer', 'no'))
opts.Add('toolchain', 'compiler toolchain', default_toolchain)
opts.Add(BoolOption('gles', 'EXPERIMENTAL: enable OpenGL ES support',
'no'))
opts.Add(BoolOption('llvm', 'use LLVM', default_llvm))
opts.Add(BoolOption('openmp', 'EXPERIMENTAL: compile with openmp (swrast)',
'no'))
@@ -108,4 +110,3 @@ def AddOptions(opts):
opts.Add(BoolOption('swr', 'Build OpenSWR', 'no'))
if host_platform == 'windows':
opts.Add('MSVC_VERSION', 'Microsoft Visual C/C++ version')
opts.Add('MSVC_USE_SCRIPT', 'Microsoft Visual C/C++ vcvarsall script', True)

View File

@@ -74,10 +74,11 @@ AC_SUBST([OPENCL_VERSION])
# in the first entry.
LIBDRM_REQUIRED=2.4.75
LIBDRM_RADEON_REQUIRED=2.4.71
LIBDRM_AMDGPU_REQUIRED=2.4.95
LIBDRM_AMDGPU_REQUIRED=2.4.91
LIBDRM_INTEL_REQUIRED=2.4.75
LIBDRM_NVVIEUX_REQUIRED=2.4.66
LIBDRM_NOUVEAU_REQUIRED=2.4.66
LIBDRM_FREEDRENO_REQUIRED=2.4.92
LIBDRM_ETNAVIV_REQUIRED=2.4.89
LIBDRM_VC4_REQUIRED=2.4.89
@@ -107,9 +108,9 @@ dnl LLVM versions
LLVM_REQUIRED_GALLIUM=3.3.0
LLVM_REQUIRED_OPENCL=3.9.0
LLVM_REQUIRED_R600=3.9.0
LLVM_REQUIRED_RADEONSI=6.0.0
LLVM_REQUIRED_RADV=6.0.0
LLVM_REQUIRED_SWR=6.0.0
LLVM_REQUIRED_RADEONSI=5.0.0
LLVM_REQUIRED_RADV=5.0.0
LLVM_REQUIRED_SWR=5.0.0
dnl Check for progs
AC_PROG_CPP
@@ -124,8 +125,7 @@ AC_PROG_GREP
AC_PROG_NM
AM_PROG_AS
AX_CHECK_GNU_MAKE
AM_PATH_PYTHON([2.7],, [AM_PATH_PYTHON([3.4],, [:])])
AC_CHECK_PROGS([PYTHON2], [python2.7 python2 python])
AC_PROG_SED
AC_PROG_MKDIR_P
@@ -157,7 +157,7 @@ fi
AX_CHECK_PYTHON_MAKO_MODULE($PYTHON_MAKO_REQUIRED)
if test "$PYTHON" = ":"; then
if test -z "$PYTHON2"; then
if test ! -f "$srcdir/src/util/format_srgb.c"; then
AC_MSG_ERROR([Python not found - unable to generate sources])
fi
@@ -310,7 +310,6 @@ AX_CHECK_COMPILE_FLAG([-Werror=missing-prototypes], [CFLAGS="$CFLAGS
AX_CHECK_COMPILE_FLAG([-Wmissing-prototypes], [CFLAGS="$CFLAGS -Wmissing-prototypes"])
dnl Dylan Baker: gcc and clang always accepr -Wno-*, hence check for the original warning, then set the no-* flag
AX_CHECK_COMPILE_FLAG([-Wmissing-field-initializers], [CFLAGS="$CFLAGS -Wno-missing-field-initializers"])
AX_CHECK_COMPILE_FLAG([-Wformat-truncation], [CFLAGS="$CFLAGS -Wno-format-truncation"])
AX_CHECK_COMPILE_FLAG([-fno-math-errno], [CFLAGS="$CFLAGS -fno-math-errno"])
AX_CHECK_COMPILE_FLAG([-fno-trapping-math], [CFLAGS="$CFLAGS -fno-trapping-math"])
@@ -330,7 +329,6 @@ AX_CHECK_COMPILE_FLAG([-fno-math-errno], [CXXFLAGS="$CXXFL
AX_CHECK_COMPILE_FLAG([-fno-trapping-math], [CXXFLAGS="$CXXFLAGS -fno-trapping-math"])
AX_CHECK_COMPILE_FLAG([-fvisibility=hidden], [VISIBILITY_CXXFLAGS="-fvisibility=hidden"])
AX_CHECK_COMPILE_FLAG([-Wmissing-field-initializers], [CXXFLAGS="$CXXFLAGS -Wno-missing-field-initializers"])
AX_CHECK_COMPILE_FLAG([-Wformat-truncation], [CXXFLAGS="$CXXFLAGS -Wno-format-truncation"])
AC_LANG_POP([C++])
# Flags to help ensure that certain portions of the code -- and only those
@@ -978,22 +976,6 @@ if test "x$pthread_stubs_possible" = xyes; then
PKG_CHECK_MODULES(PTHREADSTUBS, pthread-stubs >= 0.4)
fi
save_LIBS="$LIBS"
LIBS="$PTHREAD_LIBS"
AC_MSG_CHECKING(whether pthread_setaffinity_np is supported)
AC_LINK_IFELSE([AC_LANG_SOURCE([[
#define _GNU_SOURCE
#include <pthread.h>
int main() {
void *a = (void*) &pthread_setaffinity_np;
long b = (long) a;
return (int) b;
}]])],
[DEFINES="$DEFINES -DHAVE_PTHREAD_SETAFFINITY"];
AC_MSG_RESULT([yes]),
AC_MSG_RESULT([no]))
LIBS="$save_LIBS"
dnl Check for futex for fast inline simple_mtx_t.
AC_CHECK_HEADER([linux/futex.h], [DEFINES="$DEFINES -DHAVE_LINUX_FUTEX_H"])
@@ -1844,10 +1826,6 @@ for plat in $platforms; do
PKG_CHECK_MODULES([WAYLAND_SCANNER], [wayland-scanner],
WAYLAND_SCANNER=`$PKG_CONFIG --variable=wayland_scanner wayland-scanner`,
WAYLAND_SCANNER='')
PKG_CHECK_EXISTS([wayland-scanner >= 1.15],
AC_SUBST(SCANNER_ARG, 'private-code'),
AC_SUBST(SCANNER_ARG, 'code'))
if test "x$WAYLAND_SCANNER" = x; then
AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner], [:])
fi
@@ -1864,7 +1842,6 @@ for plat in $platforms; do
;;
drm)
test "x$enable_egl" = "xyes" &&
test "x$enable_gbm" = "xno" &&
AC_MSG_ERROR([EGL platform drm needs gbm])
DEFINES="$DEFINES -DHAVE_DRM_PLATFORM"
@@ -2721,6 +2698,7 @@ if test -n "$with_gallium_drivers"; then
;;
xfreedreno)
HAVE_GALLIUM_FREEDRENO=yes
PKG_CHECK_MODULES([FREEDRENO], [libdrm >= $LIBDRM_FREEDRENO_REQUIRED libdrm_freedreno >= $LIBDRM_FREEDRENO_REQUIRED])
require_libdrm "freedreno"
;;
xetnaviv)
@@ -2835,8 +2813,9 @@ if test -n "$with_gallium_drivers"; then
fi
# XXX: Keep in sync with LLVM_REQUIRED_SWR
AM_CONDITIONAL(SWR_INVALID_LLVM_VERSION, test "x$LLVM_VERSION" != x6.0.0 -a \
"x$LLVM_VERSION" != x6.0.1)
AM_CONDITIONAL(SWR_INVALID_LLVM_VERSION, test "x$LLVM_VERSION" != x5.0.0 -a \
"x$LLVM_VERSION" != x5.0.1 -a \
"x$LLVM_VERSION" != x5.0.2)
if test "x$enable_llvm" = "xyes" -a "$with_gallium_drivers"; then
llvm_require_version $LLVM_REQUIRED_GALLIUM "gallium"
@@ -3193,7 +3172,6 @@ AC_CONFIG_FILES([Makefile
src/mesa/main/tests/Makefile
src/mesa/state_tracker/tests/Makefile
src/util/Makefile
src/util/tests/fast_idiv_by_const/Makefile
src/util/tests/hash_table/Makefile
src/util/tests/set/Makefile
src/util/tests/string_buffer/Makefile
@@ -3365,7 +3343,7 @@ if test "x$enable_llvm" = xyes; then
echo " LLVM_LDFLAGS: $LLVM_LDFLAGS"
echo ""
fi
echo " PYTHON: $PYTHON"
echo " PYTHON2: $PYTHON2"
echo ""
echo " Run '${MAKE-make}' to build Mesa"

View File

@@ -94,13 +94,6 @@ Currently there's only one config file provided when dri drivers are
enabled - it's <code>drirc</code>.</p>
</dd>
<dt><code>--datadir=DIR</code></dt>
<dd><p>This option specifies the directory where the data files will
be installed. The default is <code>${prefix}/share</code>.
Currently when dri drivers are enabled, <code>drirc.d/</code> is at
this place.</p>
</dd>
<dt><code>--enable-static, --disable-shared</code></dt>
<dd><p>By default, Mesa
will build shared libraries. Either of these options will force static

View File

@@ -102,9 +102,9 @@ In the past, GLUT, GLU and the Mesa demos were released in conjunction with
Mesa releases. But since GLUT, GLU and the demos change infrequently, they
were split off into their own git repositories:
<a href="https://gitlab.freedesktop.org/mesa/glut">GLUT</a>,
<a href="https://gitlab.freedesktop.org/mesa/glu">GLU</a> and
<a href="https://gitlab.freedesktop.org/mesa/demos">Demos</a>,
<a href="https://cgit.freedesktop.org/mesa/glut/">GLUT</a>,
<a href="https://cgit.freedesktop.org/mesa/glu/">GLU</a> and
<a href="https://cgit.freedesktop.org/mesa/demos/">Demos</a>,
</p>
</div>

View File

@@ -146,8 +146,8 @@ your system. For example under the default settings you may end up with a 1GB
cache for x86_64 and another 1GB cache for i386.
<li>MESA_GLSL_CACHE_DIR - if set, determines the directory to be used
for the on-disk cache of compiled GLSL programs. If this variable is
not set, then the cache will be stored in $XDG_CACHE_HOME/mesa_shader_cache (if
that variable is set), or else within .cache/mesa_shader_cache within the user's
not set, then the cache will be stored in $XDG_CACHE_HOME/mesa (if
that variable is set), or else within .cache/mesa within the user's
home directory.
<li>MESA_GLSL - <a href="shading.html#envvars">shading language compiler options</a>
<li>MESA_NO_MINMAX_CACHE - when set, the minmax index cache is globally disabled.

View File

@@ -196,7 +196,7 @@ GL 4.4, GLSL 4.40 -- all DONE: i965/gen8+, nvc0, r600, radeonsi
GL_MAX_VERTEX_ATTRIB_STRIDE DONE (all drivers)
GL_ARB_buffer_storage DONE (freedreno, i965, nv50, llvmpipe, swr)
GL_ARB_clear_texture DONE (i965, nv50, llvmpipe, softpipe, swr)
GL_ARB_enhanced_layouts DONE (i965, nv50, llvmpipe, softpipe, virgl)
GL_ARB_enhanced_layouts DONE (i965, nv50, llvmpipe, softpipe)
- compile-time constant expressions DONE
- explicit byte offsets for blocks DONE
- forced alignment within blocks DONE
@@ -219,7 +219,7 @@ GL 4.5, GLSL 4.50 -- all DONE: nvc0, radeonsi
GL_ARB_direct_state_access DONE (all drivers)
GL_ARB_get_texture_sub_image DONE (all drivers)
GL_ARB_shader_texture_image_samples DONE (i965, nv50, r600, virgl)
GL_ARB_texture_barrier DONE (freedreno, i965, nv50, r600, virgl)
GL_ARB_texture_barrier DONE (freedreno, i965, nv50, r600)
GL_KHR_context_flush_control DONE (all - but needs GLX/EGL extension to be useful)
GL_KHR_robustness DONE (i965)
GL_EXT_shader_integer_mix DONE (all drivers that support GLSL)
@@ -308,7 +308,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
GL_ARB_sample_locations DONE (nvc0)
GL_ARB_seamless_cubemap_per_texture DONE (freedreno, i965, nvc0, radeonsi, r600, softpipe, swr, virgl)
GL_ARB_shader_ballot DONE (i965/gen8+, nvc0, radeonsi)
GL_ARB_shader_clock DONE (i965/gen7+, nv50, nvc0, r600, radeonsi, virgl)
GL_ARB_shader_clock DONE (i965/gen7+, nv50, nvc0, r600, radeonsi)
GL_ARB_shader_stencil_export DONE (i965/gen9+, r600, radeonsi, softpipe, llvmpipe, swr, virgl)
GL_ARB_shader_viewport_layer_array DONE (i965/gen6+, nvc0, radeonsi)
GL_ARB_sparse_buffer DONE (radeonsi/CIK+)
@@ -319,14 +319,13 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
GL_EXT_memory_object DONE (radeonsi)
GL_EXT_memory_object_fd DONE (radeonsi)
GL_EXT_memory_object_win32 not started
GL_EXT_render_snorm DONE (i965)
GL_EXT_semaphore DONE (radeonsi)
GL_EXT_semaphore_fd DONE (radeonsi)
GL_EXT_semaphore_win32 not started
GL_EXT_texture_norm16 DONE (i965, r600, radeonsi, nvc0)
GL_KHR_blend_equation_advanced_coherent DONE (i965/gen9+)
GL_KHR_texture_compression_astc_hdr DONE (i965/bxt)
GL_KHR_texture_compression_astc_sliced_3d DONE (i965/gen9+, radeonsi)
GL_KHR_texture_compression_astc_sliced_3d DONE (i965/gen9+)
GL_OES_depth_texture_cube_map DONE (all drivers that support GLSL 1.30+)
GL_OES_EGL_image DONE (all drivers)
GL_OES_EGL_image_external DONE (all drivers)
@@ -344,63 +343,6 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
GLX_ARB_robustness_application_isolation not started
GLX_ARB_robustness_share_group_isolation not started
GL_EXT_direct_state_access subfeatures (in the spec order):
GL 1.1: Client commands not started
GL 1.0-1.3: Matrix and transpose matrix commands not started
GL 1.1-1.2: Texture commands not started
GL 1.2: 3D texture commands not started
GL 1.2.1: Multitexture commands not started
GL 1.2.1-3.0: Indexed texture commands not started
GL 1.2.1-3.0: Indexed generic queries not started
GL 1.2.1: EnableIndexed.. Get*Indexed not started
GL_ARB_vertex_program not started
GL 1.3: Compressed texture and multitexture commands not started
GL 1.5: Buffer commands not started
GL 2.0-2.1: Uniform and uniform matrix commands not started
GL_EXT_texture_buffer_object not started
GL_EXT_texture_integer not started
GL_EXT_gpu_shader4 not started
GL_EXT_gpu_program_parameters not started
GL_NV_gpu_program4 n/a
GL_NV_framebuffer_multisample_coverage n/a
GL 3.0: Renderbuffer/framebuffer commands, Gen*Mipmap not started
GL 3.0: CopyBuffer command not started
GL_EXT_geometry_shader4 commands (expose in GL 3.2) not started
GL_NV_explicit_multisample n/a
GL 3.0: Vertex array/attrib/query/map commands not started
Matrix GL tokens not started
GL_EXT_direct_state_access additions from other extensions (complete list):
GL_AMD_framebuffer_sample_positions n/a
GL_AMD_gpu_shader_int64 not started
GL_ARB_bindless_texture not started
GL_ARB_buffer_storage not started
GL_ARB_clear_buffer_object not started
GL_ARB_framebuffer_no_attachments not started
GL_ARB_gpu_shader_fp64 not started
GL_ARB_instanced_arrays not started
GL_ARB_internalformat_query2 not started
GL_ARB_sparse_texture n/a
GL_ARB_sparse_buffer not started
GL_ARB_texture_buffer_range not started
GL_ARB_texture_storage not started
GL_ARB_texture_storage_multisample not started
GL_ARB_vertex_attrib_64bit not started
GL_ARB_vertex_attrib_binding not started
GL_EXT_buffer_storage not started
GL_EXT_external_buffer not started
GL_EXT_separate_shader_objects n/a
GL_EXT_sparse_texture n/a
GL_EXT_texture_storage n/a
GL_EXT_vertex_attrib_64bit not started
GL_EXT_EGL_image_storage n/a
GL_NV_bindless_texture n/a
GL_NV_gpu_shader5 n/a
GL_NV_texture_multisample n/a
GL_NV_vertex_buffer_unified_memory n/a
GL_NVX_linked_gpu_multicast n/a
GLX_NV_copy_buffer n/a
The following extensions are not part of any OpenGL or OpenGL ES version, and
we DO NOT WANT implementations of these extensions for Mesa.

View File

@@ -47,7 +47,7 @@ You can find some further To-do lists here:
<b>Common To-Do lists:</b>
</p>
<ul>
<li><a href="https://gitlab.freedesktop.org/mesa/mesa/blob/master/docs/features.txt">
<li><a href="https://cgit.freedesktop.org/mesa/mesa/tree/docs/features.txt">
<b>features.txt</b></a> - Status of OpenGL 3.x / 4.x features in Mesa.</li>
</ul>

View File

@@ -15,61 +15,6 @@
<div class="content">
<h1>News</h1>
<h2>October 31, 2018</h2>
<p>
<a href="relnotes/18.2.4.html">Mesa 18.2.4</a> is released.
This is a bug-fix release.
</p>
<h2>October 19, 2018</h2>
<p>
<a href="relnotes/18.2.3.html">Mesa 18.2.3</a> is released.
This is a bug-fix release.
</p>
<h2>October 5, 2018</h2>
<p>
<a href="relnotes/18.2.2.html">Mesa 18.2.2</a> is released.
This is a bug-fix release.
</p>
<h2>September 24, 2018</h2>
<p>
<a href="relnotes/18.1.9.html">Mesa 18.1.9</a> is released.
This is a bug-fix release.
<br>
NOTE: It is anticipated that 18.1.9 will be the final release in the
18.1 series. Users of 18.1 are encouraged to migrate to the 18.2
series in order to obtain future fixes.
</p>
<h2>September 21, 2018</h2>
<p>
<a href="relnotes/18.2.1.html">Mesa 18.2.1</a> is released.
This is a bug-fix release.
</p>
<h2>September 7, 2018</h2>
<p>
<a href="relnotes/18.1.8.html">Mesa 18.1.8</a> and
<a href="relnotes/18.2.0.html">Mesa 18.2.0</a> are released.
These are, respectively, a bug-fix release from the 18.1 branch and a
new development release. See the release notes for more information
about the releases.
</p>
<h2>August 24, 2018</h2>
<p>
<a href="relnotes/18.1.7.html">Mesa 18.1.7</a> is released.
This is a bug-fix release.
</p>
<h2>August 13, 2018</h2>
<p>
<a href="relnotes/18.1.6.html">Mesa 18.1.6</a> is released.
This is a bug-fix release.
</p>
<h2>July 27, 2018</h2>
<p>

View File

@@ -57,7 +57,7 @@ willing to maintain support for other compiler get in touch.
<ul>
<li>GCC 4.2.0 or later (some parts of Mesa may require later versions)
<li>clang - exact minimum requirement is currently unknown.
<li>Microsoft Visual Studio 2015 or later is required, for building on Windows.
<li>Microsoft Visual Studio 2013 Update 4 or later is required, for building on Windows.
</ul>
@@ -72,7 +72,7 @@ you think you've spotted a bug let developers know by filing a
<ul>
<li><a href="https://www.python.org/">Python</a> - Python is required.
Version 2.7 or later should work.
Version 2.6.4 or later should work.
</li>
<li><a href="http://www.makotemplates.org/">Python Mako module</a> -
Python Mako module is required. Version 0.8.0 or later should work.

View File

@@ -21,10 +21,10 @@
<p><strong>The Meson build system is generally considered stable and ready
for production</strong></p>
<p>The meson build is tested on Linux, macOS, Cygwin and Haiku, FreeBSD,
DragonflyBSD, NetBSD, and should work on OpenBSD.</p>
<p>The meson build is tested on on Linux, macOS, Cygwin and Haiku, it should
work on FreeBSD, DragonflyBSD, NetBSD, and OpenBSD.</p>
<p><strong>Mesa requires Meson >= 0.45.0 to build.</strong>
<p><strong>Mesa requires Meson >= 0.44.1 to build.</strong>
Some older versions of meson do not check that they are too old and will error
out in odd ways.
@@ -95,49 +95,41 @@ each configuration you want to build
recommended in the documentation</a>
</p>
<p>
Autotools automatically updates translation files as part of the build process,
meson does not do this. Instead if you want translated drirc files you will need
to invoke non-default targets for ninja to update them:
<code>ninja -C build/ xmlpool-pot xmlpool-update-po xmlpool-gmo</code>
</p>
<dl>
<dt><code>Environment Variables</code></dt>
<dd><p>Meson supports the standard CC and CXX environment variables for
changing the default compiler, and CFLAGS, CXXFLAGS, and LDFLAGS for setting
options to the compiler and linker during the initial configuration.
options to the compiler and linker.
These arguments are consumed and stored by meson when it is initialized. To
change these flags after the build is initialized (or when doing a first
initialization), consider using <code>-D${lang}_args</code> and
<code>-D${lang}_link_args</code> instead. Meson will never change compiler in a
configured build directory.
The default compilers depends on your operating system. Meson supports most of
the popular compilers, a complete list is available
<a href="http://mesonbuild.com/Reference-tables.html#compiler-ids">here</a>.
These arguments are consumed and stored by meson when it is initialized or
re-initialized. Therefore passing them to meson configure will not do anything,
and passing them to ninja will only do something if ninja decides to
re-initialize meson, for example, if a meson.build file has been changed.
Changing these variables will not cause all targets to be rebuilt, so running
ninja clean is recommended when changing CFLAGS or CXXFLAGS. Meson will never
change compiler in a configured build directory.
</p>
<pre>
CC=clang CXX=clang++ meson build-clang
ninja -C build-clang
ninja -C build-clang clean
meson configure build -Dc_args="-Wno-typedef-redefinition"
ninja -C build-clang
touch meson.build
CFLAGS=-Wno-typedef-redefinition ninja -C build-clang
</pre>
<p>
The default compilers depends on your operating system. Meson supports most of
the popular compilers, a complete list is available
<a href="http://mesonbuild.com/Reference-tables.html#compiler-ids">here</a>.
</p>
<p>Meson also honors <code>DESTDIR</code> for installs</p>
</dd>
<dt><code>LLVM</code></dt>
<dd><p>Meson includes upstream logic to wrap llvm-config using its standard
<dd><p>Meson includes upstream logic to wrap llvm-config using it's standard
dependency interface. It will search <code>$PATH</code> (or <code>%PATH%</code> on windows) for
llvm-config (and llvm-config$version and llvm-config-$version), so using an
LLVM from a non-standard path is as easy as
llvm-config, so using an LLVM from a non-standard path is as easy as
<code>PATH=/path/with/llvm-config:$PATH meson build</code>.
</p></dd>
</dl>

View File

@@ -39,47 +39,48 @@ if you'd like to nominate a patch in the next stable release.
<th>Notes</th>
</tr>
<tr>
<td rowspan="3">18.2</td>
<td>2018-11-14</td>
<td>18.2.5</td>
<td>Juan A. Suarez</td>
<td/>
</tr>
<tr>
<td>2018-11-28</td>
<td>18.2.6</td>
<td>Juan A. Suarez</td>
<td/>
</tr>
<tr>
<td>2018-12-12</td>
<td>18.2.7</td>
<td>Juan A. Suarez</td>
<td>Last planned 18.2.x release</td>
</tr>
<td rowspan="4">18.3</td>
<td>2018-10-31</td>
<td>18.3.0-rc1</td>
<td>Emil Velikov</td>
<td rowspan="3">18.1</td>
<td>2018-08-10</td>
<td>18.1.6</td>
<td>Dylan Baker</td>
<td></td>
</tr>
<tr>
<td>2018-11-07</td>
<td>18.3.0-rc2</td>
<td>Emil Velikov</td>
<td/>
<td>2018-08-24</td>
<td>18.1.7</td>
<td>Dylan Baker</td>
<td></td>
</tr>
<tr>
<td>2018-11-14</td>
<td>18.3.0-rc3</td>
<td>Emil Velikov</td>
<td/>
<td>2018-09-07</td>
<td>18.1.8</td>
<td>Dylan Baker</td>
<td>Last planned 18.1.x release</td>
</tr>
<tr>
<td>2018-11-21</td>
<td>18.3.0-rc4</td>
<td>Emil Velikov</td>
<td>Last planned RC/final release</td>
<td rowspan="4">18.2</td>
<td>2018-08-01</td>
<td>18.2.0rc1</td>
<td>Andres Gomez</td>
<td></td>
</tr>
<tr>
<td>2018-08-08</td>
<td>18.2.0rc2</td>
<td>Andres Gomez</td>
<td></td>
</tr>
<tr>
<td>2018-08-15</td>
<td>18.2.0rc3</td>
<td>Andres Gomez</td>
<td></td>
</tr>
<tr>
<td>2018-08-22</td>
<td>18.2.0rc4</td>
<td>Andres Gomez</td>
<td>Last planned RC/Final release</td>
</tr>
</table>

View File

@@ -21,7 +21,6 @@
<li><a href="#overview">Overview</a>
<li><a href="#schedule">Release schedule</a>
<li><a href="#pickntest">Cherry-pick and test</a>
<li><a href="#stagingbranch">Staging branch</a>
<li><a href="#branch">Making a branchpoint</a>
<li><a href="#prerelease">Pre-release announcement</a>
<li><a href="#release">Making a new release</a>
@@ -210,25 +209,6 @@ system and making some every day's use until the release may be a good
idea too.
</p>
<h1 id="stagingbranch">Staging branch</h1>
<p>
A live branch, which contains the currently merge/rejected patches is available
in the main repository under <code>staging/X.Y</code>. For example:
</p>
<pre>
staging/18.1 - WIP branch for the 18.1 series
staging/18.2 - WIP branch for the 18.2 series
</pre>
<p>
Notes:
</p>
<ul>
<li>People are encouraged to test the branch and report regressions.</li>
<li>The branch history is not stable and it <strong>will</strong> be rebased,</li>
</ul>
<h1 id="branch">Making a branchpoint</h1>
@@ -512,10 +492,10 @@ Here is one solution that I've been using.
# Drop LLVM_CONFIG, if applicable:
# unset LLVM_CONFIG
__glxinfo_cmd='glxinfo 2&gt;&amp;1 | egrep -o "Mesa.*|Gallium.*|.*dri\.so"'
__glxgears_cmd='glxgears 2&gt;&amp;1 | grep -v "configuration file"'
__es2info_cmd='es2_info 2&gt;&amp;1 | egrep "GL_VERSION|GL_RENDERER|.*dri\.so"'
__es2gears_cmd='es2gears_x11 2&gt;&amp;1 | grep -v "configuration file"'
__glxinfo_cmd='glxinfo 2>&amp;1 | egrep -o "Mesa.*|Gallium.*|.*dri\.so"'
__glxgears_cmd='glxgears 2>&amp;1 | grep -v "configuration file"'
__es2info_cmd='es2_info 2>&amp;1 | egrep "GL_VERSION|GL_RENDERER|.*dri\.so"'
__es2gears_cmd='es2gears_x11 2>&amp;1 | grep -v "configuration file"'
test "x$LD_LIBRARY_PATH" != 'x' &amp;&amp; __old_ld="$LD_LIBRARY_PATH"
export LD_LIBRARY_PATH=`pwd`/test/usr/local/lib/:"${__old_ld}"
export LIBGL_DRIVERS_PATH=`pwd`/test/usr/local/lib/dri/

View File

@@ -21,15 +21,6 @@ The release notes summarize what's new or changed in each Mesa release.
</p>
<ul>
<li><a href="relnotes/18.2.4.html">18.2.4 release notes</a>
<li><a href="relnotes/18.2.3.html">18.2.3 release notes</a>
<li><a href="relnotes/18.2.2.html">18.2.2 release notes</a>
<li><a href="relnotes/18.1.9.html">18.1.9 release notes</a>
<li><a href="relnotes/18.2.1.html">18.2.1 release notes</a>
<li><a href="relnotes/18.2.0.html">18.2.0 release notes</a>
<li><a href="relnotes/18.1.8.html">18.1.8 release notes</a>
<li><a href="relnotes/18.1.7.html">18.1.7 release notes</a>
<li><a href="relnotes/18.1.6.html">18.1.6 release notes</a>
<li><a href="relnotes/18.1.5.html">18.1.5 release notes</a>
<li><a href="relnotes/18.1.4.html">18.1.4 release notes</a>
<li><a href="relnotes/18.1.3.html">18.1.3 release notes</a>

View File

@@ -1,188 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.1.6 Release Notes / August 13 2018</h1>
<p>
Mesa 18.1.6 is a bug fix release which fixes bugs found since the 18.1.5 release.
</p>
<p>
Mesa 18.1.6 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
580e03328ffefe1fd43b19ab7669f20d931601a1c0a4c0f8b9c65d6e81a06df3 mesa-18.1.6.tar.gz
bb7ce759069801804fcfb8152da3457f76cd7b4e0096e4870ff5adcb5c894289 mesa-18.1.6.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=13728">Bug 13728</a> - [G965] Some objects in Neverwinter Nights Linux version not displayed correctly</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98699">Bug 98699</a> - &quot;float[a+++4 ? 1:1] f;&quot; crashes glsl_compiler</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99730">Bug 99730</a> - Metro Redux game(s) needs override for midshader extension declaration</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106382">Bug 106382</a> - Shader cache breaks INTEL_DEBUG=shader_time</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107117">Bug 107117</a> - mesa-18.1: regression with TFP on intel with modesettings and glamor acceleration</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107212">Bug 107212</a> - Dual-Core CPU E5500 / G45: RetroArch with reicast core results in corrupted graphics</li>
</ul>
<h2>Changes</h2>
<p>Adam Jackson (1):</p>
<ul>
<li>glx: GLX_MESA_multithread_makecurrent is direct-only</li>
</ul>
<p>Andres Gomez (3):</p>
<ul>
<li>ddebug: use util_snprintf() in dd_get_debug_filename_and_mkdir</li>
<li>gallium/aux/util: use util_snprintf() in test_texture_barrier</li>
<li>glsl: use util_snprintf()</li>
</ul>
<p>Christian Gmeiner (1):</p>
<ul>
<li>etnaviv: fix typo in query names</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>r600: reduce num compute threads to 1024.</li>
</ul>
<p>Dylan Baker (6):</p>
<ul>
<li>docs: Add sha-256 sums for 18.1.5</li>
<li>nir/meson: fix c vs cpp args for nir test</li>
<li>gallium: fix ddebug on windows</li>
<li>cherry-ignore: add patches that get-pick-list is finding in error</li>
<li>cherry-ignore: Add some additional patches that are for 18.2</li>
<li>bump version to 18.1.6</li>
</ul>
<p>Emil Velikov (5):</p>
<ul>
<li>swr: don't export swr_create_screen_internal</li>
<li>automake: require shared glapi when using DRI based libGL</li>
<li>autotools: error out when using the broken --with-{gl, osmesa}-lib-name</li>
<li>autotools: error out when building with mangling and glvnd</li>
<li>autotools: use correct gl.pc LIBS when using glvnd</li>
</ul>
<p>Eric Anholt (4):</p>
<ul>
<li>vc4: Fix a leak of the no-vertex-elements workaround BO.</li>
<li>vc4: Respect a sampler view's first_layer field.</li>
<li>vc4: Ignore samplers for finding uniform offsets.</li>
<li>egl: Fix leak of X11 pixmaps backing pbuffers in DRI3.</li>
</ul>
<p>Gert Wollny (1):</p>
<ul>
<li>meson, install_megadrivers: Also remove stale symlinks</li>
</ul>
<p>Jan Vesely (2):</p>
<ul>
<li>clover: Reduce wait_count in abort path.</li>
<li>clover: Don't extend illegal integer types.</li>
</ul>
<p>Jason Ekstrand (2):</p>
<ul>
<li>nir: Take if uses into account in ssa_def_components_read</li>
<li>i965/fs: Flag all slots of a flat input as flat</li>
</ul>
<p>Jon Turney (1):</p>
<ul>
<li>meson: use correct keyword to fix a meson warning</li>
</ul>
<p>Jordan Justen (2):</p>
<ul>
<li>i965, anv: Use INTEL_DEBUG for disk_cache driver flags</li>
<li>i965: Disable shader cache with INTEL_DEBUG=shader_time</li>
</ul>
<p>Juan A. Suarez Romero (2):</p>
<ul>
<li>wayland/egl: update surface size on window resize</li>
<li>wayland/egl: initialize window surface size to window size</li>
</ul>
<p>Karol Herbst (2):</p>
<ul>
<li>nir/lower_int64: mark all metadata as dirty</li>
<li>nvc0/ir: return 0 in imageLoad on incomplete textures</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>intel: Fix SIMD16 unaligned payload GRF reads on Gen4-5.</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>ac/surface: fix MSAA corruption on Vega due to FMASK tile swizzle</li>
</ul>
<p>Mauro Rossi (2):</p>
<ul>
<li>radv: generate entrypoints for VK_ANDROID_native_buffer</li>
<li>radv: move vk_format_table.c to generated sources</li>
</ul>
<p>Olivier Fourdan (1):</p>
<ul>
<li>dri3: For 1.2, use root window instead of pixmap drawable</li>
</ul>
<p>Tapani Pälli (1):</p>
<ul>
<li>glsl: handle error case with ast_post_inc, ast_post_dec</li>
</ul>
<p>Vlad Golovkin (1):</p>
<ul>
<li>swr: Remove unnecessary memset call</li>
</ul>
<p>vadym.shovkoplias (1):</p>
<ul>
<li>drirc: Allow extension midshader for Metro Redux</li>
</ul>
</div>
</body>
</html>

View File

@@ -1,104 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.1.7 Release Notes / August 24 2018</h1>
<p>
Mesa 18.1.7 is a bug fix release which fixes bugs found since the 18.1.6 release.
</p>
<p>
Mesa 18.1.7 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
0c3c240bcd1352d179e65993214f9d55a399beac852c3ab4433e8df9b6c51c83 mesa-18.1.7.tar.gz
655e3b32ce3bdddd5e6e8768596e5d4bdef82d0dd37067c324cc4b2daa207306 mesa-18.1.7.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105975">Bug 105975</a> - i965 always reports 0 viewport subpixel bits</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107098">Bug 107098</a> - Segfault after munmap(kms_sw_dt-&gt;ro_mapped)</li>
</ul>
<h2>Changes</h2>
<p>Alexander Tsoy (1):</p>
<ul>
<li>meson: fix build for egl platform_x11 without dri3 and gbm</li>
</ul>
<p>Bas Nieuwenhuizen (1):</p>
<ul>
<li>radv: Fix missing Android platform define.</li>
</ul>
<p>Danylo Piliaiev (1):</p>
<ul>
<li>i965: Advertise 8 bits subpixel precision for viewport bounds on gen6+</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>r600/eg: rework atomic counter emission with flushes</li>
</ul>
<p>Dylan Baker (7):</p>
<ul>
<li>docs: Add sha256 sums for 18.1.6</li>
<li>cherry-ignore: Add additional 18.2 only patches</li>
<li>cherry-ignore: Add more 18.2 patches</li>
<li>cherry-ignore: Add more 18.2 patches</li>
<li>cherry-ignore: Add a couple of patches with &gt; 1 fixes tags</li>
<li>cherry-ignore: more 18.2 patches</li>
<li>bump version for 18.1.7 release</li>
</ul>
<p>Jason Ekstrand (2):</p>
<ul>
<li>intel: Switch the order of the 2x MSAA sample positions</li>
<li>anv/lower_ycbcr: Use the binding array size for bounds checks</li>
</ul>
<p>Ray Strode (1):</p>
<ul>
<li>gallium/winsys/kms: don't unmap what wasn't mapped</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>radv/winsys: fix creating the BO list for virtual buffers</li>
</ul>
<p>Timothy Arceri (1):</p>
<ul>
<li>radv: add Doom workaround</li>
</ul>
</div>
</body>
</html>

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@@ -1,180 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.1.8 Release Notes / September 7 2018</h1>
<p>
Mesa 18.1.8 is a bug fix release which fixes bugs found since the 18.1.7 release.
</p>
<p>
Mesa 18.1.8 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
8ec62f215dd1bb3910987f9941c6fc31632a0874e618815cf1e8e29445c86e0a mesa-18.1.8.tar.gz
bd1be67fe9c73b517765264ac28911c84144682d28dbff140e1c2deb2f44c21b mesa-18.1.8.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=93355">Bug 93355</a> - [BXT,SKLGT4e] intermittent ext_framebuffer_multisample.accuracy fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101247">Bug 101247</a> - Mesa fails to link GLSL programs with unused output blocks</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104809">Bug 104809</a> - anv: DOOM 2016 and Wolfenstein II:The New Colossus crash due to not having depthBoundsTest</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105904">Bug 105904</a> - Needed to delete mesa shader cache after driver upgrade for 32 bit wine vulkan programs to work.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106738">Bug 106738</a> - No test for miptrees with DRI modifiers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106865">Bug 106865</a> - [GLK] piglit.spec.ext_framebuffer_multisample.accuracy stencil tests fail</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107359">Bug 107359</a> - [Regression] [bisected] [OpenGL CTS] [SKL,BDW] KHR-GL46.texture_barrier*-texels, GTF-GL46.gtf21.GL2FixedTests.buffer_corners.buffer_corners, and GTF-GL46.gtf21.GL2FixedTests.stencil_plane_corners.stencil_plane_corners fail with some configuration</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107477">Bug 107477</a> - [DXVK] Setting high shader quality in GTA V results in LLVM error</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107579">Bug 107579</a> - [SNB] The graphic corruption when we reuse the GS compiled and used for TFB when statebuffer contain magic trash in the unused space</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107601">Bug 107601</a> - Rise of the Tomb Raider Segmentation Fault when the game starts</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107760">Bug 107760</a> - GPU Hang when Playing DiRT 3 Complete Edition using Steam Play with DXVK</li>
</ul>
<h2>Changes</h2>
<p>Andrii Simiklit (1):</p>
<ul>
<li>i965/gen6/xfb: handle case where transform feedback is not active</li>
</ul>
<p>Bas Nieuwenhuizen (3):</p>
<ul>
<li>radv: Add missing checks in radv_get_image_format_properties.</li>
<li>radv: Fix CMASK dimensions.</li>
<li>radv: Use a lower max offchip buffer count.</li>
</ul>
<p>Christian Gmeiner (1):</p>
<ul>
<li>tegra: fix memory leak</li>
</ul>
<p>Daniel Stone (1):</p>
<ul>
<li>st/dri: Don't expose sRGB formats to clients</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>ac/radeonsi: fix CIK copy max size</li>
</ul>
<p>Dylan Baker (10):</p>
<ul>
<li>docs: Add mesa 18.1.7 notes</li>
<li>cherry-ignore: add a patch</li>
<li>cherry-ignore: Add more 18.2 only patches</li>
<li>meson: Actually load translation files</li>
<li>cherry-ignore: Add more 18.2 patches</li>
<li>cherry-ignore: Add additional patch</li>
<li>cherry-ignore: Add patch that doesn't apply to 18.1</li>
<li>cherry-ignore: Add a couple of two fixes warning patches</li>
<li>cherry-ignore: Add patch that needs more significant patches to function</li>
<li>Bump version to 18.1.8</li>
</ul>
<p>Emil Velikov (1):</p>
<ul>
<li>docs: update required mako version</li>
</ul>
<p>Grazvydas Ignotas (1):</p>
<ul>
<li>radv: place pointer length into cache uuid</li>
</ul>
<p>Gurchetan Singh (2):</p>
<ul>
<li>meson: fix egl build for surfaceless</li>
<li>meson: fix egl build for android</li>
</ul>
<p>Ian Romanick (2):</p>
<ul>
<li>i965/vec4: Clamp indirect tes input array reads with 0x0fffffff</li>
<li>i965/vec4: Correctly handle uniform sources in generate_tes_add_indirect_urb_offset</li>
</ul>
<p>Jason Ekstrand (5):</p>
<ul>
<li>anv: Fill holes in the VF VUE to zero</li>
<li>nir/algebraic: Be more careful converting ushr to extract_u8/16</li>
<li>egl/dri2: Add a helper for the number of planes for a FOURCC format</li>
<li>egl/dri2: Guard against invalid fourcc formats</li>
<li>anv/blorp: Do more flushing around HiZ clears</li>
</ul>
<p>Juan A. Suarez Romero (1):</p>
<ul>
<li>egl/wayland: do not leak wl_buffer when it is locked</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>anv: blorp: support multiple aspect blits</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>glapi: actually implement GL_EXT_robustness for GLES</li>
</ul>
<p>Nanley Chery (7):</p>
<ul>
<li>intel/isl: Avoid tiling some 16K-wide render targets</li>
<li>i965: Make blt_pitch public</li>
<li>i965/miptree: Drop an if case from retile_as_linear</li>
<li>i965/miptree: Use the correct BLT pitch</li>
<li>i965/miptree: Use miptree_map in map_blit functions</li>
<li>i965/miptree: Fix can_blit_slice()</li>
<li>i965/gen7_urb: Re-emit PUSH_CONSTANT_ALLOC on some gen9</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>radv: fix passing clip/cull distances from VS to PS</li>
</ul>
<p>vadym.shovkoplias (1):</p>
<ul>
<li>glsl/linker: Allow unused in blocks which are not declated on previous stage</li>
</ul>
</div>
</body>
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@@ -1,178 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.1.8 Release Notes / September 24 2018</h1>
<p>
Mesa 18.1.9 is a bug fix release which fixes bugs found since the 18.1.8 release.
</p>
<p>
Mesa 18.1.9 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
0f825dc834b1b3e3d9a6c3ce58b42977f0d9a248a7627a36dd3b313ffe41a499 mesa-18.1.9.tar.gz
55f5778d58a710a63d6635f000535768faf7db9e8144dc0f4fd1989f936c1a83 mesa-18.1.9.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103241">Bug 103241</a> - Anv crashes when using 64-bit vertex inputs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104926">Bug 104926</a> - swrast: Mesa 17.3.3 produces: HW cursor for format 875713089 not supported</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107280">Bug 107280</a> - [DXVK] Batman: Arkham City with tessellation enabled hangs on SKL GT4</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107772">Bug 107772</a> - Mesa preprocessor matches if(def)s &amp; endifs incorrectly</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107779">Bug 107779</a> - Access violation with some games</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107810">Bug 107810</a> - The 'va_end' call is missed after 'va_copy' in 'util_vsnprintf' function under windows</li>
</ul>
<h2>Changes</h2>
<p>Andrii Simiklit (4):</p>
<ul>
<li>apple/glx/log: added missing va_end() after va_copy()</li>
<li>mesa/util: don't use the same 'va_list' instance twice</li>
<li>mesa/util: don't ignore NULL returned from 'malloc'</li>
<li>mesa/util: add missing va_end() after va_copy()</li>
</ul>
<p>Bas Nieuwenhuizen (4):</p>
<ul>
<li>radv: Use build ID if available for cache UUID.</li>
<li>radv: Only allow 16 user SGPRs for compute on GFX9+.</li>
<li>radv: Set the user SGPR MSB for Vega.</li>
<li>radv: Fix driver UUID SHA1 init.</li>
</ul>
<p>Christopher Egert (1):</p>
<ul>
<li>radeon: fix ColorMask</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>virgl: don't send a shader create with no data. (v2)</li>
</ul>
<p>Dylan Baker (10):</p>
<ul>
<li>docs/relnotes: Add sha256 sums for mesa 18.1.8</li>
<li>cherry-ignore: Add additional 18.2 patch</li>
<li>meson: Print a message about why a libdrm version was selected</li>
<li>cherry-ignore: add another 18.2 patch</li>
<li>cherry-ignore: Add patches that don't apply cleanly and are for developer tools</li>
<li>cherry-ignore: Add more 18.2 patches</li>
<li>cherry-ignore: add 18.2 patchs</li>
<li>cherry-ignore: add a patch that was reverted on master</li>
<li>cherry-ignore: one final update</li>
<li>Bump version to 18.1.9</li>
</ul>
<p>Erik Faye-Lund (2):</p>
<ul>
<li>winsys/virgl: avoid unintended behavior</li>
<li>virgl: adjust strides when mapping temp-resources</li>
</ul>
<p>Gert Wollny (1):</p>
<ul>
<li>winsys/virgl: correct resource and handle allocation (v2)</li>
</ul>
<p>Jason Ekstrand (6):</p>
<ul>
<li>anv/pipeline: Only consider double elements which actually exist</li>
<li>i965: Workaround the gen9 hw astc5x5 sampler bug</li>
<li>anv: Re-emit vertex buffers when the pipeline changes</li>
<li>anv: Disable the vertex cache when tessellating on SKL GT4</li>
<li>anv: Clamp scissors to the framebuffer boundary</li>
<li>anv/query: Write both dwords in emit_zero_queries</li>
</ul>
<p>Josh Pieper (1):</p>
<ul>
<li>st/mesa: Validate the result of pipe_transfer_map in make_texture (v2)</li>
</ul>
<p>Kenneth Feng (1):</p>
<ul>
<li>amd: Add Picasso device id</li>
</ul>
<p>Marek Olšák (4):</p>
<ul>
<li>st/mesa: help fix stencil border color for GL_DEPTH_STENCIL textures</li>
<li>radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CI</li>
<li>r600: fix HTILE for NPOT textures with mipmapping</li>
<li>radeonsi: fix printing a BO list into ddebug reports</li>
</ul>
<p>Mathias Fröhlich (1):</p>
<ul>
<li>tnl: Fix green gun regression in xonotic.</li>
</ul>
<p>Mauro Rossi (3):</p>
<ul>
<li>android: broadcom/genxml: fix collision with intel/genxml header-gen macro</li>
<li>android: broadcom/cle: add gallium include path</li>
<li>android: broadcom/cle: export the broadcom top level path headers</li>
</ul>
<p>Michal Srb (1):</p>
<ul>
<li>st/dri: don't set queryDmaBufFormats/queryDmaBufModifiers if the driver does not implement it</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>loader/dri3: Only wait for back buffer fences in dri3_get_buffer</li>
</ul>
<p>Pierre Moreau (1):</p>
<ul>
<li>nvir: Always split 64-bit IMAD/IMUL operations</li>
</ul>
<p>Sergii Romantsov (1):</p>
<ul>
<li>intel: compiler option msse2 and mstackrealign</li>
</ul>
<p>Timothy Arceri (1):</p>
<ul>
<li>glsl: fixer lexer for unreachable defines</li>
</ul>
</div>
</body>
</html>

172
docs/relnotes/18.2.5.html Normal file
View File

@@ -0,0 +1,172 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.2.5 Release Notes / November 15, 2018</h1>
<p>
Mesa 18.2.5 is a bug fix release which fixes bugs found since the 18.2.4 release.
</p>
<p>
Mesa 18.2.5 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
dddc28928b6f4083a0d5120b58c1c8e2dc189ab5c14299c08a386607fdbbdce7 mesa-18.2.5.tar.gz
b12c32872832e5353155e1e8026e1f1ab75bba9dc5b178d712045684d26c2b73 mesa-18.2.5.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105731">Bug 105731</a> - linker error &quot;fragment shader input ... has no matching output in the previous stage&quot; when previous stage's output declaration in a separate shader object</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107511">Bug 107511</a> - KHR/khrplatform.h not always installed when needed</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107626">Bug 107626</a> - [SNB] The graphical corruption and GPU hang occur sometimes on the piglit test &quot;arb_texture_multisample-large-float-texture&quot; with parameter --fp16</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108082">Bug 108082</a> - warning: unknown warning option '-Wno-format-truncation' [-Wunknown-warning-option]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108560">Bug 108560</a> - Mesa 32 is built without sse</li>
</ul>
<h2>Changes</h2>
<p>Andre Heider (1):</p>
<ul>
<li>st/nine: fix stack corruption due to ABI mismatch</li>
</ul>
<p>Andrii Simiklit (1):</p>
<ul>
<li>i965/batch: don't ignore the 'brw_new_batch' call for a 'new batch'</li>
</ul>
<p>Dylan Baker (2):</p>
<ul>
<li>meson: link gallium nine with pthreads</li>
<li>meson: fix libatomic tests</li>
</ul>
<p>Emil Velikov (2):</p>
<ul>
<li>egl/glvnd: correctly report errors when vendor cannot be found</li>
<li>m4: add Werror when checking for compiler flags</li>
</ul>
<p>Eric Engestrom (6):</p>
<ul>
<li>svga: add missing meson build dependency</li>
<li>clover: add missing meson build dependency</li>
<li>wsi/wayland: use proper VkResult type</li>
<li>wsi/wayland: only finish() a successfully init()ed display</li>
<li>configure: install KHR/khrplatform.h when needed</li>
<li>meson: install KHR/khrplatform.h when needed</li>
</ul>
<p>Gert Wollny (1):</p>
<ul>
<li>virgl/vtest-winsys: Use virgl version of bind flags</li>
</ul>
<p>Jonathan Gray (1):</p>
<ul>
<li>intel/tools: include stdarg.h in error2aub</li>
</ul>
<p>Juan A. Suarez Romero (4):</p>
<ul>
<li>docs: add sha256 checksums for 18.2.4</li>
<li>cherry-ignore: add explicit 18.3 only nominations</li>
<li>cherry-ignore: i965/batch: avoid reverting batch buffer if saved state is an empty</li>
<li>Update version to 18.2.5</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>anv/android: mark gralloc allocated BOs as external</li>
</ul>
<p>Marek Olšák (3):</p>
<ul>
<li>ac: fix ac_build_fdiv for f64</li>
<li>st/va: fix incorrect use of resource_destroy</li>
<li>include: update GL &amp; GLES headers (v2)</li>
</ul>
<p>Matt Turner (2):</p>
<ul>
<li>util/ralloc: Switch from DEBUG to NDEBUG</li>
<li>util/ralloc: Make sizeof(linear_header) a multiple of 8</li>
</ul>
<p>Olivier Fourdan (1):</p>
<ul>
<li>wayland/egl: Resize EGL surface on update buffer for swrast</li>
</ul>
<p>Rhys Perry (1):</p>
<ul>
<li>glsl_to_tgsi: don't create 64-bit integer MAD/FMA</li>
</ul>
<p>Samuel Pitoiset (2):</p>
<ul>
<li>radv: disable conditional rendering for vkCmdCopyQueryPoolResults()</li>
<li>radv: only expose VK_SUBGROUP_FEATURE_ARITHMETIC_BIT for VI+</li>
</ul>
<p>Sergii Romantsov (1):</p>
<ul>
<li>autotools: library-dependency when no sse and 32-bit</li>
</ul>
<p>Timothy Arceri (4):</p>
<ul>
<li>st/mesa: calculate buffer size correctly for packed uniforms</li>
<li>st/glsl_to_nir: fix next_stage gathering</li>
<li>nir: add glsl_type_is_integer() helper</li>
<li>nir: don't pack varyings ints with floats unless flat</li>
</ul>
<p>Vadym Shovkoplias (1):</p>
<ul>
<li>glsl/linker: Fix out variables linking during single stage</li>
</ul>
<p>Vinson Lee (1):</p>
<ul>
<li>r600/sb: Fix constant logical operand in assert.</li>
</ul>
</div>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.2.6 Release Notes / November 28, 2018</h1>
<p>
Mesa 18.2.6 is a bug fix release which fixes bugs found since the 18.2.5 release.
</p>
<p>
Mesa 18.2.6 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
e0ea1236dbc6c412b02e1b5d7f838072525971a6630246fa82ae4466a6d8a587 mesa-18.2.6.tar.gz
9ebafa4f8249df0c718e93b9ca155e3593a1239af303aa2a8b0f2056a7efdc12 mesa-18.2.6.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107626">Bug 107626</a> - [SNB] The graphical corruption and GPU hang occur sometimes on the piglit test &quot;arb_texture_multisample-large-float-texture&quot; with parameter --fp16</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107856">Bug 107856</a> - i965 incorrectly calculates the number of layers for texture views (assert)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108630">Bug 108630</a> - [G965] piglit.spec.!opengl 1_2.tex3d-maxsize spins forever</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108713">Bug 108713</a> - Gallium: use after free with transform feedback</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108829">Bug 108829</a> - [meson] libglapi exports internal API</li>
</ul>
<h2>Changes</h2>
<p>Andrii Simiklit (1):</p>
<ul>
<li>i965/batch: avoid reverting batch buffer if saved state is an empty</li>
</ul>
<p>Bas Nieuwenhuizen (1):</p>
<ul>
<li>radv: Fix opaque metadata descriptor last layer.</li>
</ul>
<p>Brian Paul (1):</p>
<ul>
<li>scons/svga: remove opt from the list of valid build types</li>
</ul>
<p>Danylo Piliaiev (1):</p>
<ul>
<li>i965: Fix calculation of layers array length for isl_view</li>
</ul>
<p>Dylan Baker (2):</p>
<ul>
<li>meson: Don't set -Wall</li>
<li>meson: Don't force libva to required from auto</li>
</ul>
<p>Emil Velikov (13):</p>
<ul>
<li>bin/get-pick-list.sh: simplify git oneline printing</li>
<li>bin/get-pick-list.sh: prefix output with "[stable] "</li>
<li>bin/get-pick-list.sh: handle "typod" usecase.</li>
<li>bin/get-pick-list.sh: handle the fixes tag</li>
<li>bin/get-pick-list.sh: tweak the commit sha matching pattern</li>
<li>bin/get-pick-list.sh: flesh out is_sha_nomination</li>
<li>bin/get-pick-list.sh: handle fixes tag with missing colon</li>
<li>bin/get-pick-list.sh: handle unofficial "broken by" tag</li>
<li>bin/get-pick-list.sh: use test instead of [ ]</li>
<li>bin/get-pick-list.sh: handle reverts prior to the branchpoint</li>
<li>travis: drop unneeded x11proto-xf86vidmode-dev</li>
<li>glx: make xf86vidmode mandatory for direct rendering</li>
<li>travis: adding missing x11-xcb for meson+vulkan</li>
</ul>
<p>Eric Anholt (1):</p>
<ul>
<li>vc4: Make sure we make ro scanout resources for create_with_modifiers.</li>
</ul>
<p>Eric Engestrom (5):</p>
<ul>
<li>meson: only run vulkan's meson.build when building vulkan</li>
<li>gbm: remove unnecessary meson include</li>
<li>meson: fix wayland-less builds</li>
<li>egl: add missing glvnd entrypoint for EGL_ANDROID_blob_cache</li>
<li>glapi: add missing visibility args</li>
</ul>
<p>Erik Faye-Lund (1):</p>
<ul>
<li>mesa/main: remove bogus error for zero-sized images</li>
</ul>
<p>Gert Wollny (3):</p>
<ul>
<li>mesa: Reference count shaders that are used by transform feedback objects</li>
<li>r600: clean up the GS ring buffers when the context is destroyed</li>
<li>glsl: free or reuse memory allocated for TF varying</li>
</ul>
<p>Jason Ekstrand (2):</p>
<ul>
<li>nir/lower_alu_to_scalar: Don't try to lower unpack_32_2x16</li>
<li>anv: Put robust buffer access in the pipeline hash</li>
</ul>
<p>Juan A. Suarez Romero (6):</p>
<ul>
<li>cherry-ignore: add explicit 18.3 only nominations</li>
<li>cherry-ignore: intel/aub_viewer: fix dynamic state printing</li>
<li>cherry-ignore: intel/aub_viewer: Print blend states properly</li>
<li>cherry-ignore: mesa/main: fix incorrect depth-error</li>
<li>docs: add sha256 checksums for 18.2.5</li>
<li>Update version to 18.2.6</li>
</ul>
<p>Karol Herbst (1):</p>
<ul>
<li>nir/spirv: cast shift operand to u32</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>i965: Add PCI IDs for new Amberlake parts that are Coffeelake based</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>egl/dri: fix error value with unknown drm format</li>
</ul>
<p>Marek Olšák (2):</p>
<ul>
<li>winsys/amdgpu: fix a buffer leak in amdgpu_bo_from_handle</li>
<li>winsys/amdgpu: fix a device handle leak in amdgpu_winsys_create</li>
</ul>
<p>Rodrigo Vivi (4):</p>
<ul>
<li>i965: Add a new CFL PCI ID.</li>
<li>intel: aubinator: Adding missed platforms to the error message.</li>
<li>intel: Introducing Amber Lake platform</li>
<li>intel: Introducing Whiskey Lake platform</li>
</ul>
</div>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.2.7 Release Notes / December 13, 2018</h1>
<p>
Mesa 18.2.7 is a bug fix release which fixes bugs found since the 18.2.6 release.
</p>
<p>
Mesa 18.2.7 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
092351cfbcd430ec595fbd3a3d8d253fd62c29074e1740d7198b00289ab400f8 mesa-18.2.7.tar.gz
9c7b02560d89d77ca279cd21f36ea9a49e9ffc5611f6fe35099357d744d07ae6 mesa-18.2.7.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106577">Bug 106577</a> - broken rendering with nine and nouveau (GM107)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108245">Bug 108245</a> - RADV/Vega: Low mip levels of large BCn textures get corrupted by vkCmdCopyBufferToImage</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108311">Bug 108311</a> - Query buffer object support is broken on r600.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108894">Bug 108894</a> - [anv] vkCmdCopyBuffer() and vkCmdCopyQueryPoolResults() write-after-write hazard</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108909">Bug 108909</a> - Vkd3d test failure test_resolve_non_issued_query_data()</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108914">Bug 108914</a> - blocky shadow artifacts in The Forest with DXVK, RADV_DEBUG=nohiz fixes this</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108925">Bug 108925</a> - vkCmdCopyQueryPoolResults(VK_QUERY_RESULT_WAIT_BIT) for timestamps with large query count hangs</li>
</ul>
<h2>Changes</h2>
<p>Alex Smith (1):</p>
<ul>
<li>radv: Flush before vkCmdWriteTimestamp() if needed</li>
</ul>
<p>Bas Nieuwenhuizen (4):</p>
<ul>
<li>radv: Align large buffers to the fragment size.</li>
<li>radv: Clamp gfx9 image view extents to the allocated image extents.</li>
<li>radv/android: Mark android WSI image as shareable.</li>
<li>radv/android: Use buffer metadata to determine scanout compat.</li>
</ul>
<p>Dave Airlie (2):</p>
<ul>
<li>r600: make suballocator 256-bytes align</li>
<li>radv: use 3d shader for gfx9 copies if dst is 3d</li>
</ul>
<p>Emil Velikov (2):</p>
<ul>
<li>egl/wayland: bail out when drmGetMagic fails</li>
<li>egl/wayland: plug memory leak in drm_handle_device()</li>
</ul>
<p>Eric Anholt (3):</p>
<ul>
<li>v3d: Fix a leak of the transfer helper on screen destroy.</li>
<li>vc4: Fix a leak of the transfer helper on screen destroy.</li>
<li>v3d: Fix a leak of the disassembled instruction string during debug dumps.</li>
</ul>
<p>Eric Engestrom (3):</p>
<ul>
<li>anv: correctly use vulkan 1.0 by default</li>
<li>wsi/display: fix mem leak when freeing swapchains</li>
<li>vulkan/wsi: fix s/,/;/ typo</li>
</ul>
<p>Gurchetan Singh (3):</p>
<ul>
<li>virgl: quadruple command buffer size</li>
<li>virgl: avoid large inline transfers</li>
<li>virgl: don't mark buffers as unclean after a write</li>
</ul>
<p>Juan A. Suarez Romero (4):</p>
<ul>
<li>docs: add sha256 checksums for 18.2.6</li>
<li>cherry-ignore: freedreno: Fix autotools build.</li>
<li>cherry-ignore: mesa: Revert INTEL_fragment_shader_ordering support</li>
<li>Update version to 18.2.7</li>
</ul>
<p>Karol Herbst (1):</p>
<ul>
<li>nv50,nvc0: Fix gallium nine regression regarding sampler bindings</li>
</ul>
<p>Lionel Landwerlin (2):</p>
<ul>
<li>anv: flush pipeline before query result copies</li>
<li>anv/query: flush render target before copying results</li>
</ul>
<p>Michal Srb (2):</p>
<ul>
<li>gallium: Constify drisw_loader_funcs struct</li>
<li>drisw: Use separate drisw_loader_funcs for shm</li>
</ul>
<p>Nicolai Hähnle (2):</p>
<ul>
<li>egl/wayland: rather obvious build fix</li>
<li>meson: link LLVM 'native' component when LLVM is available</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>radv: rework the TC-compat HTILE hardware bug with COND_EXEC</li>
</ul>
<p>Thomas Hellstrom (2):</p>
<ul>
<li>st/xa: Fix a memory leak</li>
<li>winsys/svga: Fix a memory leak</li>
</ul>
<p>Tobias Klausmann (1):</p>
<ul>
<li>amd/vulkan: meson build - use radv_deps for libvulkan_radeon</li>
</ul>
<p>Vinson Lee (1):</p>
<ul>
<li>st/xvmc: Add X11 include path.</li>
</ul>
</div>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.2.8 Release Notes / December 27, 2018</h1>
<p>
Mesa 18.2.8 is a bug fix release which fixes bugs found since the 18.2.7 release.
</p>
<p>
Mesa 18.2.8 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
77512edc0a84e19c7131a0e2e5ebf1beaf1494dc4b71508fcc92d06d65f9f4f5 mesa-18.2.8.tar.gz
1d2ed9fd435d86d95b7215b287258d3e6b1180293a36f688e5a2efc18298d863 mesa-18.2.8.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108114">Bug 108114</a> - [vulkancts] new VK_KHR_16bit_storage tests fail.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108116">Bug 108116</a> - [vulkancts] stencil partial clear tests fail.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108910">Bug 108910</a> - Vkd3d test failure test_multisample_array_texture()</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108911">Bug 108911</a> - Vkd3d test failure test_clear_render_target_view()</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109081">Bug 109081</a> - [bisected] [HSW] Regression in clipping.user_defined.clip_* vulkancts tests</li>
</ul>
<h2>Changes</h2>
<p>Alex Deucher (3):</p>
<ul>
<li>pci_ids: add new vega10 pci ids</li>
<li>pci_ids: add new vega20 pci id</li>
<li>pci_ids: add new VegaM pci id</li>
</ul>
<p>Axel Davy (3):</p>
<ul>
<li>st/nine: Fix volumetexture dtor on ctor failure</li>
<li>st/nine: Bind src not dst in nine_context_box_upload</li>
<li>st/nine: Add src reference to nine_context_range_upload</li>
</ul>
<p>Caio Marcelo de Oliveira Filho (1):</p>
<ul>
<li>nir: properly clear the entry sources in copy_prop_vars</li>
</ul>
<p>Dylan Baker (1):</p>
<ul>
<li>meson: Fix ppc64 little endian detection</li>
</ul>
<p>Emil Velikov (9):</p>
<ul>
<li>glx: mandate xf86vidmode only for "drm" dri platforms</li>
<li>bin/get-pick-list.sh: rework handing of sha nominations</li>
<li>bin/get-pick-list.sh: warn when commit lists invalid sha</li>
<li>meson: don't require glx/egl/gbm with gallium drivers</li>
<li>pipe-loader: meson: reference correct library</li>
<li>TODO: glx: meson: build dri based glx tests, only with -Dglx=dri</li>
<li>glx: meson: drop includes from a link-only library</li>
<li>glx: meson: wire up the dispatch-index-check test</li>
<li>glx/test: meson: assorted include fixes</li>
</ul>
<p>Eric Anholt (2):</p>
<ul>
<li>v3d: Make sure that a thrsw doesn't split a multop from its umul24.</li>
<li>v3d: Add missing flagging of SYNCB as a TSY op.</li>
</ul>
<p>Erik Faye-Lund (2):</p>
<ul>
<li>virgl: wrap vertex element state in a struct</li>
<li>virgl: work around bad assumptions in virglrenderer</li>
</ul>
<p>Iago Toral Quiroga (1):</p>
<ul>
<li>intel/compiler: do not copy-propagate strided regions to ddx/ddy arguments</li>
</ul>
<p>Ian Romanick (2):</p>
<ul>
<li>i965/vec4/dce: Don't narrow the write mask if the flags are used</li>
<li>Revert "nir/lower_indirect: Bail early if modes == 0"</li>
</ul>
<p>Jan Vesely (1):</p>
<ul>
<li>clover: Fix build after clang r348827</li>
</ul>
<p>Jason Ekstrand (1):</p>
<ul>
<li>nir/constant_folding: Fix source bit size logic</li>
</ul>
<p>Jon Turney (1):</p>
<ul>
<li>glx: Fix compilation with GLX_USE_WINDOWSGL</li>
</ul>
<p>Juan A. Suarez Romero (7):</p>
<ul>
<li>docs: add sha256 checksums for 18.2.7</li>
<li>cherry-ignore: add explicit 18.3 only nominations</li>
<li>cherry-ignore: meson: libfreedreno depends upon libdrm (for fence support)</li>
<li>cherry-ignore: radv: Fix multiview depth clears</li>
<li>cherry-ignore: nir: properly find the entry to keep in copy_prop_vars</li>
<li>cherry-ignore: intel/compiler: move nir_lower_bool_to_int32 before nir_lower_locals_to_regs</li>
<li>Update version to 18.2.8</li>
</ul>
<p>Kirill Burtsev (1):</p>
<ul>
<li>loader: free error state, when checking the drawable type</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>anv: don't do partial resolve on layer &gt; 0</li>
</ul>
<p>Rhys Perry (2):</p>
<ul>
<li>radv: don't set surf_index for stencil-only images</li>
<li>ac: split 16-bit ssbo loads that may not be dword aligned</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>mesa/st/nir: fix missing nir_compact_varyings</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>radv: switch on EOP when primitive restart is enabled with triangle strips</li>
</ul>
<p>Vinson Lee (2):</p>
<ul>
<li>meson: Fix typo.</li>
<li>meson: Fix libsensors detection.</li>
</ul>
</div>
</body>
</html>

View File

@@ -1,283 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.3.0 Release Notes / December 7, 2018</h1>
<p>
Mesa 18.3.0 is a new development release. People who are concerned
with stability and reliability should stick with a previous release or
wait for Mesa 18.3.1.
</p>
<p>
Mesa 18.3.0 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<p>
libwayland-egl is now distributed by Wayland (since 1.15,
<a href="https://lists.freedesktop.org/archives/wayland-devel/2018-April/037767.html">see announcement</a>),
and has been removed from Mesa in this release. Make sure you're using
an up-to-date version of Wayland to keep the functionality.
</p>
<h2>SHA256 checksums</h2>
<pre>
17a124d4dbc712505d22a7815c9b0cee22214c96c8abb91539a2b1351e38a000 mesa-18.3.0.tar.gz
b63f947e735d6ef3dfaa30c789a9adfbae18aea671191eaacde95a18c17fc38a mesa-18.3.0.tar.xz
</pre>
<h2>New features</h2>
<p>
Note: some of the new features are only available with certain drivers.
</p>
<ul>
<li>GL_AMD_depth_clamp_separate on r600, radeonsi.</li>
<li>GL_AMD_framebuffer_multisample_advanced on radeonsi.</li>
<li>GL_AMD_gpu_shader_int64 on i965, nvc0, radeonsi.</li>
<li>GL_AMD_multi_draw_indirect on all GL 4.x drivers.</li>
<li>GL_AMD_query_buffer_object on i965, nvc0, r600, radeonsi.</li>
<li>GL_EXT_disjoint_timer_query on radeonsi and most other Gallium drivers (ES extension)</li>
<li>GL_EXT_texture_compression_s3tc on all drivers (ES extension)<li>
<li>GL_EXT_vertex_attrib_64bit on i965, nvc0, radeonsi.</li>
<li>GL_EXT_window_rectangles on radeonsi.</li>
<li>GL_KHR_texture_compression_astc_sliced_3d on radeonsi.</li>
<li>GL_NV_fragment_shader_interlock on i965.</li>
<li>EGL_EXT_device_base for all drivers.</li>
<li>EGL_EXT_device_drm for all drivers.</li>
<li>EGL_MESA_device_software for all drivers.</li>
</ul>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=13728">Bug 13728</a> - [G965] Some objects in Neverwinter Nights Linux version not displayed correctly</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91433">Bug 91433</a> - piglit.spec.arb_depth_buffer_float.fbo-depth-gl_depth_component32f-copypixels fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=93355">Bug 93355</a> - [BXT,SKLGT4e] intermittent ext_framebuffer_multisample.accuracy fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=94957">Bug 94957</a> - dEQP failures on llvmpipe</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98699">Bug 98699</a> - &quot;float[a+++4 ? 1:1] f;&quot; crashes glsl_compiler</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99507">Bug 99507</a> - Corrupted frame contents with Vulkan version of DOTA2, Talos Principle and Sascha Willems' demos when they're run Vsynched in fullscreen</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99730">Bug 99730</a> - Metro Redux game(s) needs override for midshader extension declaration</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100200">Bug 100200</a> - Default Unreal Engine 4 frag shader fails to compile</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101247">Bug 101247</a> - Mesa fails to link GLSL programs with unused output blocks</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102597">Bug 102597</a> - [Regression] mpv, high rendering times (two to three times higher)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103241">Bug 103241</a> - Anv crashes when using 64-bit vertex inputs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104602">Bug 104602</a> - [apitrace] Graphical artifacts in Civilization VI on RX Vega</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104809">Bug 104809</a> - anv: DOOM 2016 and Wolfenstein II:The New Colossus crash due to not having depthBoundsTest</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104926">Bug 104926</a> - swrast: Mesa 17.3.3 produces: HW cursor for format 875713089 not supported</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105333">Bug 105333</a> - [gallium-nine] missing geometry after commit ac: replace ac_build_kill with ac_build_kill_if_false</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105371">Bug 105371</a> - r600_shader_from_tgsi - GPR limit exceeded - shader requires 360 registers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105731">Bug 105731</a> - linker error &quot;fragment shader input ... has no matching output in the previous stage&quot; when previous stage's output declaration in a separate shader object</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105904">Bug 105904</a> - Needed to delete mesa shader cache after driver upgrade for 32 bit wine vulkan programs to work.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105975">Bug 105975</a> - i965 always reports 0 viewport subpixel bits</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106231">Bug 106231</a> - llvmpipe blends produce bad code after llvm patch https://reviews.llvm.org/D44785</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106283">Bug 106283</a> - Shader replacements works only for limited use cases</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106577">Bug 106577</a> - broken rendering with nine and nouveau (GM107)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106833">Bug 106833</a> - glLinkProgram is expected to fail when vertex attribute aliasing happens on ES3.0 context or later</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106865">Bug 106865</a> - [GLK] piglit.spec.ext_framebuffer_multisample.accuracy stencil tests fail</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106980">Bug 106980</a> - Basemark GPU vulkan benchmark hangs on GFX9</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106997">Bug 106997</a> - [Regression]. Dying light game is crashing on latest mesa</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107088">Bug 107088</a> - [GEN8+] Hang when discarding a fragment if dual source blending is enabled but shader doesn't support it</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107098">Bug 107098</a> - Segfault after munmap(kms_sw_dt-&gt;ro_mapped)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107212">Bug 107212</a> - Dual-Core CPU E5500 / G45: RetroArch with reicast core results in corrupted graphics</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107223">Bug 107223</a> - [GEN9+] 50% perf drop in SynMark Fill* tests (E2E RBC gets disabled?)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107276">Bug 107276</a> - radv: OpBitfieldUExtract returns incorrect result when count is zero</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107280">Bug 107280</a> - [DXVK] Batman: Arkham City with tessellation enabled hangs on SKL GT4</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107313">Bug 107313</a> - Meson instructions on web site are non-optimal</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107359">Bug 107359</a> - [Regression] [bisected] [OpenGL CTS] [SKL,BDW] KHR-GL46.texture_barrier*-texels, GTF-GL46.gtf21.GL2FixedTests.buffer_corners.buffer_corners, and GTF-GL46.gtf21.GL2FixedTests.stencil_plane_corners.stencil_plane_corners fail with some configuration</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107460">Bug 107460</a> - radv: OpControlBarrier does not always work correctly (bisected)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107477">Bug 107477</a> - [DXVK] Setting high shader quality in GTA V results in LLVM error</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107483">Bug 107483</a> - DispatchSanity_test.GL31_CORE regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107487">Bug 107487</a> - [intel] [tools] intel gpu tools don't honor -D tools=[]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107488">Bug 107488</a> - gl.h:2090: error: redefinition of typedef GLeglImageOES</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107510">Bug 107510</a> - [GEN8+] up to 10% perf drop on several 3D benchmarks</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107511">Bug 107511</a> - KHR/khrplatform.h not always installed when needed</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107524">Bug 107524</a> - Broken packDouble2x32 at llvmpipe</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107544">Bug 107544</a> - intel/decoder: out of bounds group_iter</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107547">Bug 107547</a> - shader crashing glsl_compiler (uniform block assigned to vec2, then component substraced by 1)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107550">Bug 107550</a> - &quot;0[2]&quot; as function parameter hits assert</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107563">Bug 107563</a> - [RADV] Broken rendering in Unity demos</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107565">Bug 107565</a> - TypeError: __init__() got an unexpected keyword argument 'future_imports'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107579">Bug 107579</a> - [SNB] The graphic corruption when we reuse the GS compiled and used for TFB when statebuffer contain magic trash in the unused space</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107601">Bug 107601</a> - Rise of the Tomb Raider Segmentation Fault when the game starts</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107610">Bug 107610</a> - Dolphin emulator mis-renders shadow overlay in Super Mario Sunshine</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107626">Bug 107626</a> - [SNB] The graphical corruption and GPU hang occur sometimes on the piglit test &quot;arb_texture_multisample-large-float-texture&quot; with parameter --fp16</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107658">Bug 107658</a> - [Regression] [bisected] [OpenGLES CTS] KHR-GLES3.packed_pixels.*rectangle.r*8_snorm</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107734">Bug 107734</a> - [GLSL] glsl-fface-invariant, glsl-fcoord-invariant and glsl-pcoord-invariant should fail</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107745">Bug 107745</a> - [bisected] [bdw bsw] piglit.­spec.­arb_fragment_shader_interlock.­arb_fragment_shader_interlock-image-load-store failure</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107760">Bug 107760</a> - GPU Hang when Playing DiRT 3 Complete Edition using Steam Play with DXVK</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107765">Bug 107765</a> - [regression] Batman Arkham City crashes with DXVK under wine</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107772">Bug 107772</a> - Mesa preprocessor matches if(def)s &amp; endifs incorrectly</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107779">Bug 107779</a> - Access violation with some games</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107786">Bug 107786</a> - [DXVK] MSAA reflections are broken in GTA V</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107806">Bug 107806</a> - glsl_get_natural_size_align_bytes() ABORT with GfxBench Vulkan AztecRuins</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107810">Bug 107810</a> - The 'va_end' call is missed after 'va_copy' in 'util_vsnprintf' function under windows</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107832">Bug 107832</a> - Gallium picking A16L16 formats when emulating INTENSITY16 conflicts with mesa</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107843">Bug 107843</a> - 32bit Mesa build failes with meson.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107856">Bug 107856</a> - i965 incorrectly calculates the number of layers for texture views (assert)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107857">Bug 107857</a> - GPU hang - GS_EMIT without shader outputs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107865">Bug 107865</a> - swr fail to build with llvm-libs 6.0.1</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107869">Bug 107869</a> - u_thread.h:87:4: error: use of undeclared identifier 'cpu_set_t'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107870">Bug 107870</a> - Undefined symbols for architecture x86_64: &quot;_util_cpu_caps&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107879">Bug 107879</a> - crash happens when link program</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107891">Bug 107891</a> - [wine, regression, bisected] RAGE, Wolfenstein The New Order hangs in menu</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107923">Bug 107923</a> - build_id.c:126: multiple definition of `build_id_length'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107926">Bug 107926</a> - [anv] Rise of the Tomb Raider always misrendering, segfault and gpu hang.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107941">Bug 107941</a> - GPU hang and system crash with Dota 2 using Vulkan</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107971">Bug 107971</a> - SPV_GOOGLE_hlsl_functionality1 / SPV_GOOGLE_decorate_string</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108012">Bug 108012</a> - Compiler crashes on access of non-existent member incremental operations</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108024">Bug 108024</a> - [Debian Stretch]Fail to build because &quot;xcb_randr_lease_t&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108082">Bug 108082</a> - warning: unknown warning option '-Wno-format-truncation' [-Wunknown-warning-option]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108109">Bug 108109</a> - [GLSL] no-overloads.vert fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108112">Bug 108112</a> - [vulkancts] some of the coherent memory tests fail.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108113">Bug 108113</a> - [vulkancts] r32g32b32 transfer operations not implemented</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108115">Bug 108115</a> - [vulkancts] dEQP-VK.subgroups.vote.graphics.subgroupallequal.* fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108164">Bug 108164</a> - [radv] VM faults since 5d6a560a2986c9ab421b3c7904d29bb7bc35e36f</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108245">Bug 108245</a> - RADV/Vega: Low mip levels of large BCn textures get corrupted by vkCmdCopyBufferToImage</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108272">Bug 108272</a> - [polaris10] opencl-mesa: Anything using OpenCL segfaults, XFX Radeon RX 580</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108311">Bug 108311</a> - Query buffer object support is broken on r600.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108319">Bug 108319</a> - [GLK BXT BSW] Assertion in piglit.spec.arb_gpu_shader_fp64.execution.built-in-functions.vs-sign-sat-neg-abs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108491">Bug 108491</a> - Commit baa38c14 causes output issues on my VEGA with RADV</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108524">Bug 108524</a> - [RADV] GPU lockup on event synchronization</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108530">Bug 108530</a> - (mesa-18.3) [Tracker] Mesa 18.3 Release Tracker</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108532">Bug 108532</a> - make check nir_copy_prop_vars_test.store_store_load_different_components regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108560">Bug 108560</a> - Mesa 32 is built without sse</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108595">Bug 108595</a> - ir3_compiler valgrind build error</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108617">Bug 108617</a> - [deqp] Mesa fails conformance for egl_ext_device</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108630">Bug 108630</a> - [G965] piglit.spec.!opengl 1_2.tex3d-maxsize spins forever</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108635">Bug 108635</a> - Mesa master commit 68dc591af16ebb36814e4c187e4998948103c99c causes XWayland to segfault</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108713">Bug 108713</a> - Gallium: use after free with transform feedback</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108829">Bug 108829</a> - [meson] libglapi exports internal API</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108894">Bug 108894</a> - [anv] vkCmdCopyBuffer() and vkCmdCopyQueryPoolResults() write-after-write hazard</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108909">Bug 108909</a> - Vkd3d test failure test_resolve_non_issued_query_data()</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108914">Bug 108914</a> - blocky shadow artifacts in The Forest with DXVK, RADV_DEBUG=nohiz fixes this</li>
<h2>Changes</h2>
<ul>
<li>TBD</li>
</ul>
</div>
</body>
</html>

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@@ -1,63 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.3.1 Release Notes / December 11, 2018</h1>
<p>
Mesa 18.3.1 is a bug fix release which fixes bugs found since the 18.3.0 release.
</p>
<p>
Mesa 18.3.0 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
256d0c3d88e380c1b8e3fc5c6ac34001e3b7c30458b8b852407ec68b8ccd9fda mesa-18.3.1.tar.gz
5b1f827d28684a25f6657289f8b7d47ac56395988c7ac23e0ec9a62b644bdc63 mesa-18.3.1.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>None</p>
<h2>Changes</h2>
<p>Emil Velikov (2):</p>
<ul>
<li>docs: add sha256 checksums for 18.3.0</li>
<li>Update version to 18.3.1</li>
</ul>
<p>Jason Ekstrand (1):</p>
<ul>
<li>anv,radv: Disable VK_EXT_pci_bus_info</li>
</ul>
</div>
</body>
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.3.2 Release Notes / January 17, 2019</h1>
<p>
Mesa 18.3.2 is a bug fix release which fixes bugs found since the 18.3.1 release.
</p>
<p>
Mesa 18.3.2 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
1cde4fafd40cd1ad4ee3a13b364b7a0175a08b7afdd127fb46f918c1e1dfd4b0 mesa-18.3.2.tar.gz
f7ce7181c07b6d8e0132da879af1729523a6c8aa87f79a9d59dfd064024cfb35 mesa-18.3.2.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106595">Bug 106595</a> - [RADV] Rendering distortions only when MSAA is enabled</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107728">Bug 107728</a> - Wrong background in Sascha Willem's Multisampling Demo</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108114">Bug 108114</a> - [vulkancts] new VK_KHR_16bit_storage tests fail.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108116">Bug 108116</a> - [vulkancts] stencil partial clear tests fail.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108624">Bug 108624</a> - [regression][bisected] &quot;nir: Copy propagation between blocks&quot; regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108910">Bug 108910</a> - Vkd3d test failure test_multisample_array_texture()</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108911">Bug 108911</a> - Vkd3d test failure test_clear_render_target_view()</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108943">Bug 108943</a> - Build fails on ppc64le with meson</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109072">Bug 109072</a> - GPU hang in blender 2.80</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109081">Bug 109081</a> - [bisected] [HSW] Regression in clipping.user_defined.clip_* vulkancts tests</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109151">Bug 109151</a> - [KBL-G][vulkan] dEQP-VK.texture.explicit_lod.2d.sizes.31x55_nearest_linear_mipmap_nearest_repeat failed verification.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109202">Bug 109202</a> - nv50_ir.cpp:749:19: error: cannot use typeid with -fno-rtti</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109204">Bug 109204</a> - [regression, bisected] retroarch's crt-royale shader crash radv</li>
</ul>
<h2>Changes</h2>
<p>Alex Deucher (3):</p>
<ul>
<li>pci_ids: add new vega10 pci ids</li>
<li>pci_ids: add new vega20 pci id</li>
<li>pci_ids: add new VegaM pci id</li>
</ul>
<p>Alexander von Gluck IV (1):</p>
<ul>
<li>egl/haiku: Fix reference to disp vs dpy</li>
</ul>
<p>Andres Gomez (2):</p>
<ul>
<li>glsl: correct typo in GLSL compilation error message</li>
<li>glsl/linker: specify proper direction in location aliasing error</li>
</ul>
<p>Axel Davy (3):</p>
<ul>
<li>st/nine: Fix volumetexture dtor on ctor failure</li>
<li>st/nine: Bind src not dst in nine_context_box_upload</li>
<li>st/nine: Add src reference to nine_context_range_upload</li>
</ul>
<p>Bas Nieuwenhuizen (5):</p>
<ul>
<li>radv: Do a cache flush if needed before reading predicates.</li>
<li>radv: Implement buffer stores with less than 4 components.</li>
<li>anv/android: Do not reject storage images.</li>
<li>radv: Fix rasterization precision bits.</li>
<li>spirv: Fix matrix parameters in function calls.</li>
</ul>
<p>Caio Marcelo de Oliveira Filho (3):</p>
<ul>
<li>nir: properly clear the entry sources in copy_prop_vars</li>
<li>nir: properly find the entry to keep in copy_prop_vars</li>
<li>nir: remove dead code from copy_prop_vars</li>
</ul>
<p>Dave Airlie (2):</p>
<ul>
<li>radv/xfb: fix counter buffer bounds checks.</li>
<li>virgl/vtest: fix front buffer flush with protocol version 0.</li>
</ul>
<p>Dylan Baker (6):</p>
<ul>
<li>meson: Fix ppc64 little endian detection</li>
<li>meson: Add support for gnu hurd</li>
<li>meson: Add toggle for glx-direct</li>
<li>meson: Override C++ standard to gnu++11 when building with altivec on ppc64</li>
<li>meson: Error out if building nouveau and using LLVM without rtti</li>
<li>autotools: Remove tegra vdpau driver</li>
</ul>
<p>Emil Velikov (12):</p>
<ul>
<li>docs: add sha256 checksums for 18.3.1</li>
<li>bin/get-pick-list.sh: rework handing of sha nominations</li>
<li>bin/get-pick-list.sh: warn when commit lists invalid sha</li>
<li>cherry-ignore: meson: libfreedreno depends upon libdrm (for fence support)</li>
<li>glx: mandate xf86vidmode only for "drm" dri platforms</li>
<li>meson: don't require glx/egl/gbm with gallium drivers</li>
<li>pipe-loader: meson: reference correct library</li>
<li>TODO: glx: meson: build dri based glx tests, only with -Dglx=dri</li>
<li>glx: meson: drop includes from a link-only library</li>
<li>glx: meson: wire up the dispatch-index-check test</li>
<li>glx/test: meson: assorted include fixes</li>
<li>Update version to 18.3.2</li>
</ul>
<p>Eric Anholt (6):</p>
<ul>
<li>v3d: Fix a leak of the transfer helper on screen destroy.</li>
<li>vc4: Fix a leak of the transfer helper on screen destroy.</li>
<li>v3d: Fix a leak of the disassembled instruction string during debug dumps.</li>
<li>v3d: Make sure that a thrsw doesn't split a multop from its umul24.</li>
<li>v3d: Add missing flagging of SYNCB as a TSY op.</li>
<li>gallium/ttn: Fix setup of outputs_written.</li>
</ul>
<p>Erik Faye-Lund (2):</p>
<ul>
<li>virgl: wrap vertex element state in a struct</li>
<li>virgl: work around bad assumptions in virglrenderer</li>
</ul>
<p>Francisco Jerez (5):</p>
<ul>
<li>intel/fs: Handle source modifiers in lower_integer_multiplication().</li>
<li>intel/fs: Implement quad swizzles on ICL+.</li>
<li>intel/fs: Fix bug in lower_simd_width while splitting an instruction which was already split.</li>
<li>intel/eu/gen7: Fix brw_MOV() with DF destination and strided source.</li>
<li>intel/fs: Respect CHV/BXT regioning restrictions in copy propagation pass.</li>
</ul>
<p>Ian Romanick (2):</p>
<ul>
<li>i965/vec4/dce: Don't narrow the write mask if the flags are used</li>
<li>Revert "nir/lower_indirect: Bail early if modes == 0"</li>
</ul>
<p>Jan Vesely (1):</p>
<ul>
<li>clover: Fix build after clang r348827</li>
</ul>
<p>Jason Ekstrand (6):</p>
<ul>
<li>nir/constant_folding: Fix source bit size logic</li>
<li>intel/blorp: Be more conservative about copying clear colors</li>
<li>spirv: Handle any bit size in vector_insert/extract</li>
<li>anv/apply_pipeline_layout: Set the cursor in lower_res_reindex_intrinsic</li>
<li>spirv: Sign-extend array indices</li>
<li>intel/peephole_ffma: Fix swizzle propagation</li>
</ul>
<p>Karol Herbst (1):</p>
<ul>
<li>nv50/ir: fix use-after-free in ConstantFolding::visit</li>
</ul>
<p>Kirill Burtsev (1):</p>
<ul>
<li>loader: free error state, when checking the drawable type</li>
</ul>
<p>Lionel Landwerlin (5):</p>
<ul>
<li>anv: don't do partial resolve on layer &gt; 0</li>
<li>i965: include draw_params/derived_draw_params for VF cache workaround</li>
<li>i965: add CS stall on VF invalidation workaround</li>
<li>anv: explictly specify format for blorp ccs/mcs op</li>
<li>anv: flush fast clear colors into compressed surfaces</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>st/mesa: don't leak pipe_surface if pipe_context is not current</li>
</ul>
<p>Mario Kleiner (1):</p>
<ul>
<li>radeonsi: Fix use of 1- or 2- component GL_DOUBLE vbo's.</li>
</ul>
<p>Nicolai Hähnle (1):</p>
<ul>
<li>meson: link LLVM 'native' component when LLVM is available</li>
</ul>
<p>Rhys Perry (3):</p>
<ul>
<li>radv: don't set surf_index for stencil-only images</li>
<li>ac/nir,radv,radeonsi/nir: use correct indices for interpolation intrinsics</li>
<li>ac: split 16-bit ssbo loads that may not be dword aligned</li>
</ul>
<p>Rob Clark (2):</p>
<ul>
<li>freedreno/drm: fix memory leak</li>
<li>mesa/st/nir: fix missing nir_compact_varyings</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>radv: switch on EOP when primitive restart is enabled with triangle strips</li>
</ul>
<p>Timothy Arceri (2):</p>
<ul>
<li>tgsi/scan: fix loop exit point in tgsi_scan_tess_ctrl()</li>
<li>tgsi/scan: correctly walk instructions in tgsi_scan_tess_ctrl()</li>
</ul>
<p>Vinson Lee (2):</p>
<ul>
<li>meson: Fix typo.</li>
<li>meson: Fix libsensors detection.</li>
</ul>
</div>
</body>
</html>

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@@ -1,208 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.3.3 Release Notes / January 31, 2019</h1>
<p>
Mesa 18.3.3 is a bug fix release which fixes bugs found since the 18.3.2 release.
</p>
<p>
Mesa 18.3.3 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
6b9893942fe8011c7736d51448deb6ef80ece2257e0fac27b02e997a6605d5e4 mesa-18.3.3.tar.gz
2ab6886a6966c532ccbcc3b240925e681464b658244f0cbed752615af3936299 mesa-18.3.3.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108877">Bug 108877</a> - OpenGL CTS gl43 test cases were interrupted due to segment fault</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109023">Bug 109023</a> - error: inlining failed in call to always_inline __m512 _mm512_and_ps(__m512, __m512): target specific option mismatch</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109129">Bug 109129</a> - format_types.h:1220: undefined reference to `_mm256_cvtps_ph'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109229">Bug 109229</a> - glLinkProgram locks up for ~30 seconds</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109242">Bug 109242</a> - [RADV] The Witcher 3 system freeze</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109488">Bug 109488</a> - Mesa 18.3.2 crash on a specific fragment shader (assert triggered) / already fixed on the master branch.</li>
</ul>
<h2>Changes</h2>
<p>Andres Gomez (2):</p>
<ul>
<li>bin/get-pick-list.sh: fix the oneline printing</li>
<li>bin/get-pick-list.sh: fix redirection in sh</li>
</ul>
<p>Axel Davy (1):</p>
<ul>
<li>st/nine: Immediately upload user provided textures</li>
</ul>
<p>Bas Nieuwenhuizen (3):</p>
<ul>
<li>radv: Only use 32 KiB per threadgroup on Stoney.</li>
<li>radv: Set partial_vs_wave for pipelines with just GS, not tess.</li>
<li>nir: Account for atomics in copy propagation.</li>
</ul>
<p>Bruce Cherniak (1):</p>
<ul>
<li>gallium/swr: Fix multi-context sync fence deadlock.</li>
</ul>
<p>Carsten Haitzler (Rasterman) (2):</p>
<ul>
<li>vc4: Use named parameters for the NEON inline asm.</li>
<li>vc4: Declare the cpu pointers as being modified in NEON asm.</li>
</ul>
<p>Danylo Piliaiev (1):</p>
<ul>
<li>glsl: Fix copying function's out to temp if dereferenced by array</li>
</ul>
<p>Dave Airlie (3):</p>
<ul>
<li>dri_interface: add put shm image2 (v2)</li>
<li>glx: add support for putimageshm2 path (v2)</li>
<li>gallium: use put image shm2 path (v2)</li>
</ul>
<p>Dylan Baker (4):</p>
<ul>
<li>meson: allow building dri driver without window system if osmesa is classic</li>
<li>meson: fix swr KNL build</li>
<li>meson: Fix compiler checks for SWR with ICC</li>
<li>meson: Add warnings and errors when using ICC</li>
</ul>
<p>Emil Velikov (4):</p>
<ul>
<li>docs: add sha256 checksums for 18.3.2</li>
<li>cherry-ignore: radv: Fix multiview depth clears</li>
<li>cherry-ignore: spirv: Handle arbitrary bit sizes for deref array indices</li>
<li>cherry-ignore: WARNING: Commit XXX lists invalid sha</li>
</ul>
<p>Eric Anholt (2):</p>
<ul>
<li>vc4: Don't leak the GPU fd for renderonly usage.</li>
<li>vc4: Enable NEON asm on meson cross-builds.</li>
</ul>
<p>Eric Engestrom (2):</p>
<ul>
<li>configure: EGL requirements only apply if EGL is built</li>
<li>meson/vdpau: add missing soversion</li>
</ul>
<p>Iago Toral Quiroga (1):</p>
<ul>
<li>anv/device: fix maximum number of images supported</li>
</ul>
<p>Jason Ekstrand (3):</p>
<ul>
<li>anv/nir: Rework arguments to apply_pipeline_layout</li>
<li>anv: Only parse pImmutableSamplers if the descriptor has samplers</li>
<li>nir/xfb: Fix offset accounting for dvec3/4</li>
</ul>
<p>Karol Herbst (2):</p>
<ul>
<li>nv50/ir: disable tryCollapseChainedMULs in ConstantFolding for precise instructions</li>
<li>glsl/lower_output_reads: set invariant and precise flags on temporaries</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>anv: fix invalid binding table index computation</li>
</ul>
<p>Marek Olšák (4):</p>
<ul>
<li>radeonsi: also apply the GS hang workaround to draws without tessellation</li>
<li>radeonsi: fix a u_blitter crash after a shader with FBFETCH</li>
<li>radeonsi: fix rendering to tiny viewports where the viewport center is &gt; 8K</li>
<li>st/mesa: purge framebuffers when unbinding a context</li>
</ul>
<p>Niklas Haas (1):</p>
<ul>
<li>radv: correctly use vulkan 1.0 by default</li>
</ul>
<p>Pierre Moreau (1):</p>
<ul>
<li>meson: Fix with_gallium_icd to with_opencl_icd</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>loader: fix the no-modifiers case</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>radv: clean up setting partial_es_wave for distributed tess on VI</li>
</ul>
<p>Timothy Arceri (5):</p>
<ul>
<li>ac/nir_to_llvm: fix interpolateAt* for arrays</li>
<li>ac/nir_to_llvm: fix clamp shadow reference for more hardware</li>
<li>radv/ac: fix some fp16 handling</li>
<li>glsl: use remap location when serialising uniform program resource data</li>
<li>glsl: Copy function out to temp if we don't directly ref a variable</li>
</ul>
<p>Tomeu Vizoso (1):</p>
<ul>
<li>etnaviv: Consolidate buffer references from framebuffers</li>
</ul>
<p>Vinson Lee (1):</p>
<ul>
<li>meson: Fix typo.</li>
</ul>
</div>
</body>
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@@ -1,180 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.3.4 Release Notes / February 18, 2019</h1>
<p>
Mesa 18.3.4 is a bug fix release which fixes bugs found since the 18.3.3 release.
</p>
<p>
Mesa 18.3.4 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
e22e6fe4c3aca80fe872a0a7285b6c5523e0cfc0bfb57ffcc3b3d66d292593e4 mesa-18.3.4.tar.gz
32314da4365d37f80d84f599bd9625b00161c273c39600ba63b45002d500bb07 mesa-18.3.4.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109107">Bug 109107</a> - gallium/st/va: change va max_profiles when using Radeon VCN Hardware</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109401">Bug 109401</a> - [DXVK] Project Cars rendering problems</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109543">Bug 109543</a> - After upgrade mesa to 19.0.0~rc1 all vulkan based application stop working [&quot;vulkan-cube&quot; received SIGSEGV in radv_pipeline_init_blend_state at ../src/amd/vulkan/radv_pipeline.c:699]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109603">Bug 109603</a> - nir_instr_as_deref: Assertion `parent &amp;&amp; parent-&gt;type == nir_instr_type_deref' failed.</li>
</ul>
<h2>Changes</h2>
<p>Bart Oldeman (1):</p>
<ul>
<li>gallium-xlib: query MIT-SHM before using it.</li>
</ul>
<p>Bas Nieuwenhuizen (2):</p>
<ul>
<li>radv: Only look at pImmutableSamples if the descriptor has a sampler.</li>
<li>amd/common: Use correct writemask for shared memory stores.</li>
</ul>
<p>Dylan Baker (2):</p>
<ul>
<li>get-pick-list: Add --pretty=medium to the arguments for Cc patches</li>
<li>meson: Add dependency on genxml to anvil</li>
</ul>
<p>Emil Velikov (5):</p>
<ul>
<li>docs: add sha256 checksums for 18.3.3</li>
<li>cherry-ignore: nv50,nvc0: add explicit settings for recent caps</li>
<li>cherry-ignore: add more 19.0 only nominations from Ilia</li>
<li>cherry-ignore: radv: fix using LOAD_CONTEXT_REG with old GFX ME firmwares on GFX8</li>
<li>Update version to 18.3.4</li>
</ul>
<p>Eric Anholt (1):</p>
<ul>
<li>vc4: Fix copy-and-paste fail in backport of NEON asm fixes.</li>
</ul>
<p>Eric Engestrom (2):</p>
<ul>
<li>xvmc: fix string comparison</li>
<li>xvmc: fix string comparison</li>
</ul>
<p>Ernestas Kulik (2):</p>
<ul>
<li>vc4: Fix leak in HW queries error path</li>
<li>v3d: Fix leak in resource setup error path</li>
</ul>
<p>Iago Toral Quiroga (1):</p>
<ul>
<li>intel/compiler: do not copy-propagate strided regions to ddx/ddy arguments</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>nvc0: we have 16k-sized framebuffers, fix default scissors</li>
</ul>
<p>Jason Ekstrand (3):</p>
<ul>
<li>intel/fs: Handle IMAGE_SIZE in size_read() and is_send_from_grf()</li>
<li>intel/fs: Do the grf127 hack on SIMD8 instructions in SIMD16 mode</li>
<li>nir/deref: Rematerialize parents in rematerialize_derefs_in_use_blocks</li>
</ul>
<p>Juan A. Suarez Romero (1):</p>
<ul>
<li>anv/cmd_buffer: check for NULL framebuffer</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>st/mesa: Limit GL_MAX_[NATIVE_]PROGRAM_PARAMETERS_ARB to 2048</li>
</ul>
<p>Kristian H. Kristensen (1):</p>
<ul>
<li>freedreno/a6xx: Emit blitter dst with OUT_RELOCW</li>
</ul>
<p>Leo Liu (2):</p>
<ul>
<li>st/va: fix the incorrect max profiles report</li>
<li>st/va/vp9: set max reference as default of VP9 reference number</li>
</ul>
<p>Marek Olšák (4):</p>
<ul>
<li>meson: drop the xcb-xrandr version requirement</li>
<li>gallium/u_threaded: fix EXPLICIT_FLUSH for flush offsets &gt; 0</li>
<li>radeonsi: fix EXPLICIT_FLUSH for flush offsets &gt; 0</li>
<li>winsys/amdgpu: don't drop manually added fence dependencies</li>
</ul>
<p>Mario Kleiner (2):</p>
<ul>
<li>egl/wayland: Allow client-&gt;server format conversion for PRIME offload. (v2)</li>
<li>egl/wayland-drm: Only announce formats via wl_drm which the driver supports.</li>
</ul>
<p>Oscar Blumberg (1):</p>
<ul>
<li>radeonsi: Fix guardband computation for large render targets</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>freedreno: stop frob'ing pipe_resource::nr_samples</li>
</ul>
<p>Rodrigo Vivi (1):</p>
<ul>
<li>intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.</li>
</ul>
<p>Samuel Pitoiset (2):</p>
<ul>
<li>radv: fix compiler issues with GCC 9</li>
<li>radv: always export gl_SampleMask when the fragment shader uses it</li>
</ul>
</div>
</body>
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@@ -1,271 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.3.5 Release Notes / March 18, 2019</h1>
<p>
Mesa 18.3.5 is a bug fix release which fixes bugs found since the 18.3.4 release.
</p>
<p>
Mesa 18.3.5 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
5f40a336cb2af9b1d66fa243bb03c2c8a3f9b3f067aab6aaaad4316d1bc0e58b mesa-18.3.5.tar.gz
4027aea82cc63240b3fcf60eec9eea882955f098c989b29357b01d1695747953 mesa-18.3.5.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104297">Bug 104297</a> - [i965] Downward causes GPU hangs and misrendering on Haswell</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104602">Bug 104602</a> - [apitrace] Graphical artifacts in Civilization VI on RX Vega</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107052">Bug 107052</a> - [Regression][bisected]. Crookz - The Big Heist Demo can't be launched despite the &quot;true&quot; flag in &quot;drirc&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107563">Bug 107563</a> - [RADV] Broken rendering in Unity demos</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108457">Bug 108457</a> - [OpenGL CTS] KHR-GL46.tessellation_shader.single.xfb_captures_data_from_correct_stage fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108999">Bug 108999</a> - Calculating the scissors fields when the y is flipped (0 on top) can generate negative numbers that will cause assertion failure later on.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109328">Bug 109328</a> - [BSW BXT GLK] dEQP-VK.subgroups.arithmetic.subgroup regressions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109443">Bug 109443</a> - Build failure with MSVC when using Scons &gt;= 3.0.2</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109451">Bug 109451</a> - [IVB,SNB] LINE_STRIPs following a TRIANGLE_FAN fail to use primitive restart</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109594">Bug 109594</a> - totem assert failure: totem: src/intel/genxml/gen9_pack.h:72: __gen_uint: La declaración `v &lt;= max' no se cumple.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109597">Bug 109597</a> - wreckfest issues with transparent objects &amp; skybox</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109601">Bug 109601</a> - [Regression] RuneLite GPU rendering broken on 18.3.x</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109698">Bug 109698</a> - dri.pc contents invalid when built with meson</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109735">Bug 109735</a> - [Regression] broken font with mesa_vulkan_overlay</li>
</ul>
<h2>Changes</h2>
<p>Alok Hota (1):</p>
<ul>
<li>swr/rast: bypass size limit for non-sampled textures</li>
</ul>
<p>Andrii Simiklit (1):</p>
<ul>
<li>i965: re-emit index buffer state on a reset option change.</li>
</ul>
<p>Axel Davy (2):</p>
<ul>
<li>st/nine: Ignore window size if error</li>
<li>st/nine: Ignore multisample quality level if no ms</li>
</ul>
<p>Bas Nieuwenhuizen (4):</p>
<ul>
<li>radv: Sync ETC2 whitelisted devices.</li>
<li>radv: Fix float16 interpolation set up.</li>
<li>radv: Allow interpolation on non-float types.</li>
<li>radv: Interpolate less aggressively.</li>
</ul>
<p>Carlos Garnacho (1):</p>
<ul>
<li>wayland/egl: Ensure EGL surface is resized on DRI update_buffers()</li>
</ul>
<p>Danylo Piliaiev (1):</p>
<ul>
<li>glsl/linker: Fix unmatched TCS outputs being reduced to local variable</li>
</ul>
<p>David Shao (1):</p>
<ul>
<li>meson: ensure that xmlpool_options.h is generated for gallium targets that need it</li>
</ul>
<p>Eleni Maria Stea (1):</p>
<ul>
<li>i965: fixed clamping in set_scissor_bits when the y is flipped</li>
</ul>
<p>Emil Velikov (7):</p>
<ul>
<li>docs: add sha256 checksums for 18.3.4</li>
<li>meson: egl: correctly manage loader/xmlconfig</li>
<li>cherry-ignore: add 19.0 only anv/push buffer nominations</li>
<li>cherry-ignore: add gitlab-ci fixup commit</li>
<li>cherry-ignore: ignore glsl_types memory cleanup patch</li>
<li>cherry-ignore: add explicit 19.0 performance optimisations</li>
<li>Update version to 18.3.5</li>
</ul>
<p>Eric Engestrom (1):</p>
<ul>
<li>egl: fix libdrm-less builds</li>
</ul>
<p>Francisco Jerez (1):</p>
<ul>
<li>intel/fs: Implement extended strides greater than 4 for IR source regions.</li>
</ul>
<p>Ian Romanick (2):</p>
<ul>
<li>intel/fs: nir_op_extract_i8 extracts a byte, not a word</li>
<li>intel/fs: Fix extract_u8 of an odd byte from a 64-bit integer</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>glsl: fix recording of variables for XFB in TCS shaders</li>
</ul>
<p>Jason Ekstrand (10):</p>
<ul>
<li>intel/fs: Bail in optimize_extract_to_float if we have modifiers</li>
<li>compiler/types: Add a contains_64bit helper</li>
<li>nir/xfb: Properly align 64-bit values</li>
<li>nir/xfb: Work in terms of components rather than slots</li>
<li>nir/xfb: Handle compact arrays in gather_xfb_info</li>
<li>anv: Count surfaces for non-YCbCr images in GetDescriptorSetLayoutSupport</li>
<li>spirv: OpImageQueryLod requires a sampler</li>
<li>spirv: Pull offset/stride from the pointer for OpArrayLength</li>
<li>glsl/list: Add a list variant of insert_after</li>
<li>glsl/lower_vector_derefs: Don't use a temporary for TCS outputs</li>
</ul>
<p>Jose Maria Casanova Crespo (1):</p>
<ul>
<li>glsl: TCS outputs can not be transform feedback candidates on GLES</li>
</ul>
<p>José Fonseca (1):</p>
<ul>
<li>scons: Workaround failures with MSVC when using SCons 3.0.[2-4].</li>
</ul>
<p>Juan A. Suarez Romero (3):</p>
<ul>
<li>genxml: add missing field values for 3DSTATE_SF</li>
<li>anv: advertise 8 subpixel precision bits</li>
<li>anv: destroy descriptor sets when pool gets reset</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>intel/fs: Fix opt_peephole_csel to not throw away saturates.</li>
</ul>
<p>Kevin Strasser (1):</p>
<ul>
<li>egl/dri: Avoid out of bounds array access</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>intel: fix urb size for CFL GT1</li>
</ul>
<p>Marek Olšák (5):</p>
<ul>
<li>radeonsi: add driconf option radeonsi_enable_nir</li>
<li>radeonsi: always enable NIR for Civilization 6 to fix corruption</li>
<li>driconf: add Civ6Sub executable for Civilization 6</li>
<li>tgsi: don't set tgsi_info::uses_bindless_images for constbufs and hw atomics</li>
<li>radeonsi: compile clear and copy buffer compute shaders on demand</li>
</ul>
<p>Mauro Rossi (2):</p>
<ul>
<li>android: anv: fix generated files depedencies (v2)</li>
<li>android: anv: fix libexpat shared dependency</li>
</ul>
<p>Ray Zhang (1):</p>
<ul>
<li>glx: fix shared memory leak in X11</li>
</ul>
<p>Rhys Perry (2):</p>
<ul>
<li>radv: bitcast 16-bit outputs to integers</li>
<li>radv: ensure export arguments are always float</li>
</ul>
<p>Samuel Pitoiset (8):</p>
<ul>
<li>radv: write the alpha channel of MRT0 when alpha coverage is enabled</li>
<li>radv: fix writing the alpha channel of MRT0 when alpha coverage is enabled</li>
<li>radv: fix clearing attachments in secondary command buffers</li>
<li>radv: fix out-of-bounds access when copying descriptors BO list</li>
<li>radv: don't copy buffer descriptors list for samplers</li>
<li>radv: properly align the fence and EOP bug VA on GFX9</li>
<li>radv: fix pointSizeRange limits</li>
<li>radv: always initialize HTILE when the src layout is UNDEFINED</li>
</ul>
<p>Sergii Romantsov (2):</p>
<ul>
<li>dri: meson: do not prefix user provided dri-drivers-path</li>
<li>d3d: meson: do not prefix user provided d3d-drivers-path</li>
</ul>
<p>Tapani Pälli (3):</p>
<ul>
<li>nir: initialize value in copy_prop_vars_block</li>
<li>anv: retain the is_array state in create_plane_tex_instr_implicit</li>
<li>anv: destroy descriptor sets when pool gets destroyed</li>
</ul>
<p>Timothy Arceri (1):</p>
<ul>
<li>glsl: fix shader cache for packed param list</li>
</ul>
<p>Yevhenii Kolesnikov (1):</p>
<ul>
<li>i965: Fix allow_higher_compat_version workaround limited by OpenGL 3.0</li>
</ul>
<p>pal1000 (1):</p>
<ul>
<li>scons: Compatibility with Scons development version string</li>
</ul>
</div>
</body>
</html>

View File

@@ -35,9 +35,9 @@ You may access the repository either as an
<p>
You may also
<a href="https://gitlab.freedesktop.org/mesa/mesa"
<a href="https://cgit.freedesktop.org/mesa/mesa/"
>browse the main Mesa git repository</a> and the
<a href="https://gitlab.freedesktop.org/mesa/demos"
<a href="https://cgit.freedesktop.org/mesa/demos"
>Mesa demos and tests git repository</a>.
</p>
@@ -52,7 +52,7 @@ To get the Mesa sources anonymously (read-only):
<li>Install the git software on your computer if needed.<br><br>
<li>Get an initial, local copy of the repository with:
<pre>
git clone https://gitlab.freedesktop.org/mesa/mesa.git
git clone git://anongit.freedesktop.org/git/mesa/mesa
</pre>
<li>Later, you can update your tree from the master repository with:
<pre>
@@ -60,7 +60,7 @@ To get the Mesa sources anonymously (read-only):
</pre>
<li>If you also want the Mesa demos/tests repository:
<pre>
git clone https://gitlab.freedesktop.org/mesa/demos.git
git clone git://anongit.freedesktop.org/git/mesa/demos
</pre>
</ol>
@@ -98,17 +98,24 @@ on a particular driver, add a new extension, etc.) in the bugzilla record.
</ol>
<p>
Once your account is established, you can update your push url to use SSH:
<pre>
git remote set-url --push <em>origin</em> git@gitlab.freedesktop.org:mesa/mesa.git
</pre>
Once your account is established:
</p>
You can also use <a href="https://gitlab.freedesktop.org/profile/personal_access_tokens">personal access tokens</a>
to push over HTTPS instead (useful for people behind strict proxies).
In this case, create a token, and put it in the url as shown here:
<pre>
git remote set-url --push <em>origin</em> https://<em>USER</em>:<em>TOKEN</em>@gitlab.freedesktop.org/mesa/mesa.git
</pre>
<ol>
<li>Get an initial, local copy of the repository with:
<pre>
git clone git+ssh://username@git.freedesktop.org/git/mesa/mesa
</pre>
Replace <em>username</em> with your actual login name.<br><br>
<li>Later, you can update your tree from the master repository with:
<pre>
git pull origin
</pre>
<li>If you also want the Mesa demos/tests repository:
<pre>
git clone git+ssh://username@git.freedesktop.org/git/mesa/demos
</pre>
</ol>
<h2>Windows Users</h2>
@@ -142,12 +149,12 @@ code while a branch has the latest stable code.
</p>
<p>
The command <code>git branch</code> will list all available branches.
The command <code>git-branch</code> will list all available branches.
</p>
<p>
Questions about branch status/activity should be posted to the
mesa-dev mailing list.
mesa3d-dev mailing list.
</p>
<h2>Developer Git Tips</h2>

View File

@@ -85,7 +85,7 @@ should match the filenames of the corresponding dumped shaders.
<p>
Setting <b>MESA_SHADER_CAPTURE_PATH</b> to a directory will cause the compiler
to write <tt>.shader_test</tt> files for use with
<a href="https://gitlab.freedesktop.org/mesa/shader-db">shader-db</a>, a tool
<a href="https://cgit.freedesktop.org/mesa/shader-db">shader-db</a>, a tool
which compiler developers can use to gather statistics about shaders
(instructions, cycles, memory accesses, and so on).
</p>

View File

@@ -31,7 +31,7 @@ the <code>doxygen</code> directory and run <code>make</code>.
<p>
For an example of Doxygen usage in Mesa, see a recent source file
such as <a href="https://gitlab.freedesktop.org/mesa/mesa/blob/master/src/mesa/main/bufferobj.c">bufferobj.c</a>.
such as <a href="https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/main/bufferobj.c">bufferobj.c</a>.
</p>

View File

@@ -1,82 +0,0 @@
Name
MESA_device_software
Name Strings
EGL_MESA_device_software
Contributors
Adam Jackson <ajax@redhat.com>
Emil Velikov <emil.velikov@collabora.com>
Contacts
Adam Jackson <ajax@redhat.com>
Status
DRAFT
Version
Version 2, 2018-10-03
Number
EGL Extension #TODO
Extension Type
EGL device extension
Dependencies
Requires EGL_EXT_device_query.
This extension is written against the EGL 1.5 Specification.
Overview
This extension defines a software EGL "device". The device is not backed by
any actual device node and simply renders into client memory.
By defining this as an extension, EGL_EXT_device_enumeration is able to
sanely enumerate a software device.
New Types
None
New Procedures and Functions
None
New Tokens
None
Additions to the EGL Specification
None
New Behavior
The device list produced by eglQueryDevicesEXT will include a software
device. This can be distinguished from other device classes in the usual
way by calling eglQueryDeviceStringEXT(EGL_EXTENSIONS) and matching this
extension's string in the result.
Issues
None
Revision History
Version 2, 2018-10-03 (Emil Velikov)
- Drop "fallback" from "software fallback device"
- Add Emil Velikov as contributor
Version 1, 2017-07-06 (Adam Jackson)
- Initial version

View File

@@ -1,200 +0,0 @@
Name
INTEL_shader_atomic_float_minmax
Name Strings
GL_INTEL_shader_atomic_float_minmax
Contact
Ian Romanick (ian . d . romanick 'at' intel . com)
Contributors
Status
In progress
Version
Last Modified Date: 06/22/2018
Revision: 4
Number
TBD
Dependencies
OpenGL 4.2, OpenGL ES 3.1, ARB_shader_storage_buffer_object, or
ARB_compute_shader is required.
This extension is written against version 4.60 of the OpenGL Shading
Language Specification.
Overview
This extension provides GLSL built-in functions allowing shaders to
perform atomic read-modify-write operations to floating-point buffer
variables and shared variables. Minimum, maximum, exchange, and
compare-and-swap are enabled.
New Procedures and Functions
None.
New Tokens
None.
IP Status
None.
Modifications to the OpenGL Shading Language Specification, Version 4.60
Including the following line in a shader can be used to control the
language features described in this extension:
#extension GL_INTEL_shader_atomic_float_minmax : <behavior>
where <behavior> is as specified in section 3.3.
New preprocessor #defines are added to the OpenGL Shading Language:
#define GL_INTEL_shader_atomic_float_minmax 1
Additions to Chapter 8 of the OpenGL Shading Language Specification
(Built-in Functions)
Modify Section 8.11, "Atomic Memory Functions"
(add a new row after the existing "atomicMin" table row, p. 179)
float atomicMin(inout float mem, float data)
Computes a new value by taking the minimum of the value of data and
the contents of mem. If one of these is an IEEE signaling NaN (i.e.,
a NaN with the most-significant bit of the mantissa cleared), it is
always considered smaller. If one of these is an IEEE quiet NaN
(i.e., a NaN with the most-significant bit of the mantissa set), it is
always considered larger. If both are IEEE quiet NaNs or both are
IEEE signaling NaNs, the result of the comparison is undefined.
(add a new row after the exiting "atomicMax" table row, p. 179)
float atomicMax(inout float mem, float data)
Computes a new value by taking the maximum of the value of data and
the contents of mem. If one of these is an IEEE signaling NaN (i.e.,
a NaN with the most-significant bit of the mantissa cleared), it is
always considered larger. If one of these is an IEEE quiet NaN (i.e.,
a NaN with the most-significant bit of the mantissa set), it is always
considered smaller. If both are IEEE quiet NaNs or both are IEEE
signaling NaNs, the result of the comparison is undefined.
(add to "atomicExchange" table cell, p. 180)
float atomicExchange(inout float mem, float data)
(add to "atomicCompSwap" table cell, p. 180)
float atomicCompSwap(inout float mem, float compare, float data)
Interactions with OpenGL 4.6 and ARB_gl_spirv
If OpenGL 4.6 or ARB_gl_spirv is supported, then
SPV_INTEL_shader_atomic_float_minmax must also be supported.
The AtomicFloatMinmaxINTEL capability is available whenever the OpenGL or
OpenGL ES implementation supports INTEL_shader_atomic_float_minmax.
Issues
1) Why call this extension INTEL_shader_atomic_float_minmax?
RESOLVED: Several other extensions already set the precedent of
VENDOR_shader_atomic_float and VENDOR_shader_atomic_float64 for extensions
that enable floating-point atomic operations. Using that as a base for
the name seems logical.
There already exists NV_shader_atomic_float, but the two extensions have
nearly zero overlap in functionality. NV_shader_atomic_float adds
atomicAdd and image atomic operations that currently shipping Intel GPUs
do not support. Calling this extension INTEL_shader_atomic_float would
likely have been confusing.
Adding something to describe the actual functions added by this extension
seemed reasonable. INTEL_shader_atomic_float_compare was considered, but
that name was deemed to be not properly descriptive. Calling this
extension INTEL_shader_atomic_float_min_max_exchange_compswap is right
out.
2) What atomic operations should we support for floating-point targets?
RESOLVED. Exchange, min, max, and compare-swap make sense, and these are
all supported by the hardware. Future extensions may add other functions.
For buffer variables and shared variables it is not possible to bit-cast
the memory location in GLSL, so existing integer operations, such as
atomicOr, cannot be used. However, the underlying hardware implementation
can do this by treating the memory as an integer. It would be possible to
implement atomicNegate using this technique with atomicXor. It is unclear
whether this provides any actual utility.
3) What should be said about the NaN behavior?
RESOLVED. There are several aspects of NaN behavior that should be
documented in this extension. However, some of this behavior varies based
on NaN concepts that do not exist in the GLSL specification.
* atomicCompSwap performs the comparison as the floating-point equality
operator (==). That is, if either 'mem' or 'compare' is NaN, the
comparison result is always false.
* atomicMin and atomicMax implement the IEEE specification with respect to
NaN. IEEE considers two different kinds of NaN: signaling NaN and quiet
NaN. A quiet NaN has the most significant bit of the mantissa set, and
a signaling NaN does not. This concept does not exist in SPIR-V,
Vulkan, or OpenGL. Let qNaN denote a quiet NaN and sNaN denote a
signaling NaN. atomicMin and atomicMax specifically implement
- fmin(qNaN, x) = fmin(x, qNaN) = fmax(qNaN, x) = fmax(x, qNaN) = x
- fmin(sNaN, x) = fmin(x, sNaN) = fmax(sNaN, x) = fmax(x, sNaN) = sNaN
- fmin(sNaN, qNaN) = fmin(qNaN, sNaN) = fmax(sNaN, qNaN) =
fmax(qNaN, sNaN) = sNaN
- fmin(sNaN, sNaN) = sNaN. This specification does not define which of
the two arguments is stored.
- fmax(sNaN, sNaN) = sNaN. This specification does not define which of
the two arguments is stored.
- fmin(qNaN, qNaN) = qNaN. This specification does not define which of
the two arguments is stored.
- fmax(qNaN, qNaN) = qNaN. This specification does not define which of
the two arguments is stored.
Further details are available in the Skylake Programmer's Reference
Manuals available at
https://01.org/linuxgraphics/documentation/hardware-specification-prms.
4) What about atomicMin and atomicMax with (+0.0, -0.0) or (-0.0, +0.0)
arguments?
RESOLVED. atomicMin should store -0.0, and atomicMax should store +0.0.
Due to a known issue in shipping Skylake GPUs, the incorrectly signed 0 is
stored. This behavior may change in later GPUs.
Revision History
Rev Date Author Changes
--- ---------- -------- ---------------------------------------------
1 04/19/2018 idr Initial version
2 05/05/2018 idr Describe interactions with the capabilities
added by SPV_INTEL_shader_atomic_float_minmax.
3 05/29/2018 idr Remove mention of 64-bit float support.
4 06/22/2018 idr Resolve issue #2.
Add issue #3 (regarding NaN behavior).
Add issue #4 (regarding atomicMin(-0, +0).

View File

@@ -251,9 +251,6 @@ If you are not the author of the original patch, please Cc: them in your
nomination request.
</p>
<p>
The current patch status can be observed in the <a href="releasing.html#stagingbranch">staging branch</a>.
</p>
<h3 id="thetag">The stable tag</h3>

View File

@@ -17,7 +17,7 @@
<h1>Development Utilities</h1>
<dl>
<dt><a href="https://gitlab.freedesktop.org/mesa/demos">Mesa demos collection</a></dt>
<dt><a href="https://cgit.freedesktop.org/mesa/demos">Mesa demos collection</a></dt>
<dd>includes several utility routines in the <code>src/util/</code>
directory.</dd>

View File

@@ -43,23 +43,6 @@ This requires:
Otherwise, OpenGL 2.1 is supported.
</p>
<p>
With the Fall 2018 Workstation 15 / Fusion 11 releases, additional
features are supported in the driver:
<ul>
<li>Multisample antialiasing (2x, 4x)
<li>GL_ARB/AMD_draw_buffers_blend
<li>GL_ARB_sample_shading
<li>GL_ARB_texture_cube_map_array
<li>GL_ARB_texture_gather
<li>GL_ARB_texture_query_lod
<li>GL_EXT/OES_draw_buffers_indexed
</ul>
<p>
This requires version 2.15.0 or later of the vmwgfx kernel module and
the VM must be configured for hardware version 16 or later.
</p>
<p>
OpenGL 3.3 support can be disabled by setting the environment variable
SVGA_VGPU10=0.
@@ -143,7 +126,7 @@ Begin by saving your current directory location:
<ul>
<li>Mesa/Gallium master branch. This code is used to build libGL, and the direct rendering svga driver for libGL, vmwgfx_dri.so, and the X acceleration library libxatracker.so.x.x.x.
<pre>
git clone https://gitlab.freedesktop.org/mesa/mesa.git
git clone git://anongit.freedesktop.org/git/mesa/mesa
</pre>
<li>VMware Linux guest kernel module. Note that this repo contains the complete DRM and TTM code. The vmware-specific driver is really only the files prefixed with vmwgfx.
<pre>
@@ -153,7 +136,7 @@ Begin by saving your current directory location:
Most distros ship with this but it's safest to install a newer version.
To get the latest code from git:
<pre>
git clone https://gitlab.freedesktop.org/mesa/drm.git
git clone git://anongit.freedesktop.org/git/mesa/drm
</pre>
<li>xf86-video-vmware. The chainloading driver, vmware_drv.so, the legacy driver vmwlegacy_drv.so, and the vmwgfx driver vmwgfx_drv.so.
<pre>

View File

@@ -33,12 +33,12 @@ extern "C" {
** used to make the header, and the header can be found at
** http://www.khronos.org/registry/egl
**
** Khronos $Git commit SHA1: bae3518c48 $ on $Git commit date: 2018-05-17 10:56:57 -0700 $
** Khronos $Git commit SHA1: a732b061e7 $ on $Git commit date: 2017-06-17 23:27:53 +0100 $
*/
#include <EGL/eglplatform.h>
#define EGL_EGLEXT_VERSION 20180517
#define EGL_EGLEXT_VERSION 20170627
/* Generated C header for:
* API: egl
@@ -495,47 +495,6 @@ EGLAPI EGLClientBuffer EGLAPIENTRY eglCreateNativeClientBufferANDROID (const EGL
#define EGL_FRONT_BUFFER_AUTO_REFRESH_ANDROID 0x314C
#endif /* EGL_ANDROID_front_buffer_auto_refresh */
#ifndef EGL_ANDROID_get_frame_timestamps
#define EGL_ANDROID_get_frame_timestamps 1
typedef khronos_stime_nanoseconds_t EGLnsecsANDROID;
#define EGL_TIMESTAMP_PENDING_ANDROID EGL_CAST(EGLnsecsANDROID,-2)
#define EGL_TIMESTAMP_INVALID_ANDROID EGL_CAST(EGLnsecsANDROID,-1)
#define EGL_TIMESTAMPS_ANDROID 0x3430
#define EGL_COMPOSITE_DEADLINE_ANDROID 0x3431
#define EGL_COMPOSITE_INTERVAL_ANDROID 0x3432
#define EGL_COMPOSITE_TO_PRESENT_LATENCY_ANDROID 0x3433
#define EGL_REQUESTED_PRESENT_TIME_ANDROID 0x3434
#define EGL_RENDERING_COMPLETE_TIME_ANDROID 0x3435
#define EGL_COMPOSITION_LATCH_TIME_ANDROID 0x3436
#define EGL_FIRST_COMPOSITION_START_TIME_ANDROID 0x3437
#define EGL_LAST_COMPOSITION_START_TIME_ANDROID 0x3438
#define EGL_FIRST_COMPOSITION_GPU_FINISHED_TIME_ANDROID 0x3439
#define EGL_DISPLAY_PRESENT_TIME_ANDROID 0x343A
#define EGL_DEQUEUE_READY_TIME_ANDROID 0x343B
#define EGL_READS_DONE_TIME_ANDROID 0x343C
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETCOMPOSITORTIMINGSUPPORTEDANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLint name);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETCOMPOSITORTIMINGANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLint numTimestamps, const EGLint *names, EGLnsecsANDROID *values);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETNEXTFRAMEIDANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLuint64KHR *frameId);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETFRAMETIMESTAMPSUPPORTEDANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLint timestamp);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETFRAMETIMESTAMPSANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLuint64KHR frameId, EGLint numTimestamps, const EGLint *timestamps, EGLnsecsANDROID *values);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglGetCompositorTimingSupportedANDROID (EGLDisplay dpy, EGLSurface surface, EGLint name);
EGLAPI EGLBoolean EGLAPIENTRY eglGetCompositorTimingANDROID (EGLDisplay dpy, EGLSurface surface, EGLint numTimestamps, const EGLint *names, EGLnsecsANDROID *values);
EGLAPI EGLBoolean EGLAPIENTRY eglGetNextFrameIdANDROID (EGLDisplay dpy, EGLSurface surface, EGLuint64KHR *frameId);
EGLAPI EGLBoolean EGLAPIENTRY eglGetFrameTimestampSupportedANDROID (EGLDisplay dpy, EGLSurface surface, EGLint timestamp);
EGLAPI EGLBoolean EGLAPIENTRY eglGetFrameTimestampsANDROID (EGLDisplay dpy, EGLSurface surface, EGLuint64KHR frameId, EGLint numTimestamps, const EGLint *timestamps, EGLnsecsANDROID *values);
#endif
#endif /* EGL_ANDROID_get_frame_timestamps */
#ifndef EGL_ANDROID_get_native_client_buffer
#define EGL_ANDROID_get_native_client_buffer 1
struct AHardwareBuffer;
typedef EGLClientBuffer (EGLAPIENTRYP PFNEGLGETNATIVECLIENTBUFFERANDROIDPROC) (const struct AHardwareBuffer *buffer);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLClientBuffer EGLAPIENTRY eglGetNativeClientBufferANDROID (const struct AHardwareBuffer *buffer);
#endif
#endif /* EGL_ANDROID_get_native_client_buffer */
#ifndef EGL_ANDROID_image_native_buffer
#define EGL_ANDROID_image_native_buffer 1
#define EGL_NATIVE_BUFFER_ANDROID 0x3140
@@ -555,6 +514,7 @@ EGLAPI EGLint EGLAPIENTRY eglDupNativeFenceFDANDROID (EGLDisplay dpy, EGLSyncKHR
#ifndef EGL_ANDROID_presentation_time
#define EGL_ANDROID_presentation_time 1
typedef khronos_stime_nanoseconds_t EGLnsecsANDROID;
typedef EGLBoolean (EGLAPIENTRYP PFNEGLPRESENTATIONTIMEANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLnsecsANDROID time);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglPresentationTimeANDROID (EGLDisplay dpy, EGLSurface surface, EGLnsecsANDROID time);
@@ -618,16 +578,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurfacePointerANGLE (EGLDisplay dpy, EGLSu
#define EGL_EXT_client_extensions 1
#endif /* EGL_EXT_client_extensions */
#ifndef EGL_EXT_client_sync
#define EGL_EXT_client_sync 1
#define EGL_SYNC_CLIENT_EXT 0x3364
#define EGL_SYNC_CLIENT_SIGNAL_EXT 0x3365
typedef EGLBoolean (EGLAPIENTRYP PFNEGLCLIENTSIGNALSYNCEXTPROC) (EGLDisplay dpy, EGLSync sync, const EGLAttrib *attrib_list);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglClientSignalSyncEXT (EGLDisplay dpy, EGLSync sync, const EGLAttrib *attrib_list);
#endif
#endif /* EGL_EXT_client_sync */
#ifndef EGL_EXT_compositor
#define EGL_EXT_compositor 1
#define EGL_PRIMARY_COMPOSITOR_CONTEXT_EXT 0x3460
@@ -773,11 +723,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQueryDmaBufModifiersEXT (EGLDisplay dpy, EGLint
#endif
#endif /* EGL_EXT_image_dma_buf_import_modifiers */
#ifndef EGL_EXT_image_gl_colorspace
#define EGL_EXT_image_gl_colorspace 1
#define EGL_GL_COLORSPACE_DEFAULT_EXT 0x314D
#endif /* EGL_EXT_image_gl_colorspace */
#ifndef EGL_EXT_image_implicit_sync_control
#define EGL_EXT_image_implicit_sync_control 1
#define EGL_IMPORT_SYNC_TYPE_EXT 0x3470
@@ -913,14 +858,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffersWithDamageEXT (EGLDisplay dpy, EGLSu
#endif
#endif /* EGL_EXT_swap_buffers_with_damage */
#ifndef EGL_EXT_sync_reuse
#define EGL_EXT_sync_reuse 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLUNSIGNALSYNCEXTPROC) (EGLDisplay dpy, EGLSync sync, const EGLAttrib *attrib_list);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglUnsignalSyncEXT (EGLDisplay dpy, EGLSync sync, const EGLAttrib *attrib_list);
#endif
#endif /* EGL_EXT_sync_reuse */
#ifndef EGL_EXT_yuv_surface
#define EGL_EXT_yuv_surface 1
#define EGL_YUV_ORDER_EXT 0x3301
@@ -1051,11 +988,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffersRegion2NOK (EGLDisplay dpy, EGLSurfa
#define EGL_AUTO_STEREO_NV 0x3136
#endif /* EGL_NV_3dvision_surface */
#ifndef EGL_NV_context_priority_realtime
#define EGL_NV_context_priority_realtime 1
#define EGL_CONTEXT_PRIORITY_REALTIME_NV 0x3357
#endif /* EGL_NV_context_priority_realtime */
#ifndef EGL_NV_coverage_sample
#define EGL_NV_coverage_sample 1
#define EGL_COVERAGE_BUFFERS_NV 0x30E0
@@ -1123,9 +1055,9 @@ EGLAPI EGLBoolean EGLAPIENTRY eglPostSubBufferNV (EGLDisplay dpy, EGLSurface sur
#define EGL_YUV_PLANE0_TEXTURE_UNIT_NV 0x332C
#define EGL_YUV_PLANE1_TEXTURE_UNIT_NV 0x332D
#define EGL_YUV_PLANE2_TEXTURE_UNIT_NV 0x332E
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMCONSUMERGLTEXTUREEXTERNALATTRIBSNVPROC) (EGLDisplay dpy, EGLStreamKHR stream, const EGLAttrib *attrib_list);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMCONSUMERGLTEXTUREEXTERNALATTRIBSNVPROC) (EGLDisplay dpy, EGLStreamKHR stream, EGLAttrib *attrib_list);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerGLTextureExternalAttribsNV (EGLDisplay dpy, EGLStreamKHR stream, const EGLAttrib *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerGLTextureExternalAttribsNV (EGLDisplay dpy, EGLStreamKHR stream, EGLAttrib *attrib_list);
#endif
#endif /* EGL_NV_stream_consumer_gltexture_yuv */
@@ -1165,14 +1097,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerGLTextureExternalAttribsNV (EGLDi
#define EGL_STREAM_FIFO_SYNCHRONOUS_NV 0x3336
#endif /* EGL_NV_stream_fifo_synchronous */
#ifndef EGL_NV_stream_flush
#define EGL_NV_stream_flush 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMFLUSHNVPROC) (EGLDisplay dpy, EGLStreamKHR stream);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglStreamFlushNV (EGLDisplay dpy, EGLStreamKHR stream);
#endif
#endif /* EGL_NV_stream_flush */
#ifndef EGL_NV_stream_frame_limits
#define EGL_NV_stream_frame_limits 1
#define EGL_PRODUCER_MAX_FRAME_HINT_NV 0x3337

View File

@@ -2086,7 +2086,7 @@ typedef void (APIENTRYP PFNGLBLENDEQUATIONSEPARATEATIPROC) (GLenum modeRGB, GLen
/* GL_OES_EGL_image */
#if !defined(GL_OES_EGL_image) && !defined(GL_EXT_EGL_image_storage)
#ifndef GL_OES_EGL_image
typedef void* GLeglImageOES;
#endif

View File

@@ -589,7 +589,7 @@ struct __DRIdamageExtensionRec {
* SWRast Loader extension.
*/
#define __DRI_SWRAST_LOADER "DRI_SWRastLoader"
#define __DRI_SWRAST_LOADER_VERSION 5
#define __DRI_SWRAST_LOADER_VERSION 4
struct __DRIswrastLoaderExtensionRec {
__DRIextension base;
@@ -649,23 +649,6 @@ struct __DRIswrastLoaderExtensionRec {
void (*getImageShm)(__DRIdrawable *readable,
int x, int y, int width, int height,
int shmid, void *loaderPrivate);
/**
* Put shm image to drawable (v2)
*
* The original version fixes srcx/y to 0, and expected
* the offset to be adjusted. This version allows src x,y
* to not be included in the offset. This is needed to
* avoid certain overflow checks in the X server, that
* result in lost rendering.
*
* \since 5
*/
void (*putImageShm2)(__DRIdrawable *drawable, int op,
int x, int y,
int width, int height, int stride,
int shmid, char *shmaddr, unsigned offset,
void *loaderPrivate);
};
/**
@@ -763,8 +746,7 @@ struct __DRIuseInvalidateExtensionRec {
#define __DRI_ATTRIB_BIND_TO_TEXTURE_TARGETS 46
#define __DRI_ATTRIB_YINVERTED 47
#define __DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE 48
#define __DRI_ATTRIB_MUTABLE_RENDER_BUFFER 49 /* EGL_MUTABLE_RENDER_BUFFER_BIT_KHR */
#define __DRI_ATTRIB_MAX 50
#define __DRI_ATTRIB_MAX (__DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE + 1)
/* __DRI_ATTRIB_RENDER_TYPE */
#define __DRI_ATTRIB_RGBA_BIT 0x01
@@ -1906,57 +1888,9 @@ struct __DRI2rendererQueryExtensionRec {
* Image Loader extension. Drivers use this to allocate color buffers
*/
/**
* See __DRIimageLoaderExtensionRec::getBuffers::buffer_mask.
*/
enum __DRIimageBufferMask {
__DRI_IMAGE_BUFFER_BACK = (1 << 0),
__DRI_IMAGE_BUFFER_FRONT = (1 << 1),
/**
* A buffer shared between application and compositor. The buffer may be
* simultaneously accessed by each.
*
* A shared buffer is equivalent to an EGLSurface whose EGLConfig contains
* EGL_MUTABLE_RENDER_BUFFER_BIT_KHR and whose active EGL_RENDER_BUFFER (as
* opposed to any pending, requested change to EGL_RENDER_BUFFER) is
* EGL_SINGLE_BUFFER.
*
* If buffer_mask contains __DRI_IMAGE_BUFFER_SHARED, then must contains no
* other bits. As a corollary, a __DRIdrawable that has a "shared" buffer
* has no front nor back buffer.
*
* The loader returns __DRI_IMAGE_BUFFER_SHARED in buffer_mask if and only
* if:
* - The loader supports __DRI_MUTABLE_RENDER_BUFFER_LOADER.
* - The driver supports __DRI_MUTABLE_RENDER_BUFFER_DRIVER.
* - The EGLConfig of the drawable EGLSurface contains
* EGL_MUTABLE_RENDER_BUFFER_BIT_KHR.
* - The EGLContext's EGL_RENDER_BUFFER is EGL_SINGLE_BUFFER.
* Equivalently, the EGLSurface's active EGL_RENDER_BUFFER (as
* opposed to any pending, requested change to EGL_RENDER_BUFFER) is
* EGL_SINGLE_BUFFER. (See the EGL 1.5 and
* EGL_KHR_mutable_render_buffer spec for details about "pending" vs
* "active" EGL_RENDER_BUFFER state).
*
* A shared buffer is similar to a front buffer in that all rendering to the
* buffer should appear promptly on the screen. It is different from
* a front buffer in that its behavior is independent from the
* GL_DRAW_BUFFER state. Specifically, if GL_DRAW_FRAMEBUFFER is 0 and the
* __DRIdrawable's buffer_mask is __DRI_IMAGE_BUFFER_SHARED, then all
* rendering should appear promptly on the screen if GL_DRAW_BUFFER is not
* GL_NONE.
*
* The difference between a shared buffer and a front buffer is motivated
* by the constraints of Android and OpenGL ES. OpenGL ES does not support
* front-buffer rendering. Android's SurfaceFlinger protocol provides the
* EGL driver only a back buffer and no front buffer. The shared buffer
* mode introduced by EGL_KHR_mutable_render_buffer is a backdoor though
* EGL that allows Android OpenGL ES applications to render to what is
* effectively the front buffer, a backdoor that required no change to the
* OpenGL ES API and little change to the SurfaceFlinger API.
*/
__DRI_IMAGE_BUFFER_SHARED = (1 << 2),
__DRI_IMAGE_BUFFER_FRONT = (1 << 1)
};
struct __DRIimageList {
@@ -1981,8 +1915,7 @@ struct __DRIimageLoaderExtensionRec {
* \param stamp Address of variable to be updated when
* getBuffers must be called again
* \param loaderPrivate The loaderPrivate for driDrawable
* \param buffer_mask Set of buffers to allocate. A bitmask of
* __DRIimageBufferMask.
* \param buffer_mask Set of buffers to allocate
* \param buffers Returned buffers
*/
int (*getBuffers)(__DRIdrawable *driDrawable,
@@ -2096,85 +2029,4 @@ struct __DRIbackgroundCallableExtensionRec {
GLboolean (*isThreadSafe)(void *loaderPrivate);
};
/**
* The driver portion of EGL_KHR_mutable_render_buffer.
*
* If the driver creates a __DRIconfig with
* __DRI_ATTRIB_MUTABLE_RENDER_BUFFER, then it must support this extension.
*
* To support this extension:
*
* - The driver should create at least one __DRIconfig with
* __DRI_ATTRIB_MUTABLE_RENDER_BUFFER. This is strongly recommended but
* not required.
*
* - The driver must be able to handle __DRI_IMAGE_BUFFER_SHARED if
* returned by __DRIimageLoaderExtension:getBuffers().
*
* - When rendering to __DRI_IMAGE_BUFFER_SHARED, it must call
* __DRImutableRenderBufferLoaderExtension::displaySharedBuffer() in
* response to glFlush and glFinish. (This requirement is not documented
* in EGL_KHR_mutable_render_buffer, but is a de-facto requirement in the
* Android ecosystem. Android applications expect that glFlush will
* immediately display the buffer when in shared buffer mode, and Android
* drivers comply with this expectation). It :may: call
* displaySharedBuffer() more often than required.
*
* - When rendering to __DRI_IMAGE_BUFFER_SHARED, it must ensure that the
* buffer is always in a format compatible for display because the
* display engine (usually SurfaceFlinger or hwcomposer) may display the
* image at any time, even concurrently with 3D rendering. For example,
* display hardware and the GL hardware may be able to access the buffer
* simultaneously. In particular, if the buffer is compressed then take
* care that SurfaceFlinger and hwcomposer can consume the compression
* format.
*
* \see __DRI_IMAGE_BUFFER_SHARED
* \see __DRI_ATTRIB_MUTABLE_RENDER_BUFFER
* \see __DRI_MUTABLE_RENDER_BUFFER_LOADER
*/
#define __DRI_MUTABLE_RENDER_BUFFER_DRIVER "DRI_MutableRenderBufferDriver"
#define __DRI_MUTABLE_RENDER_BUFFER_DRIVER_VERSION 1
typedef struct __DRImutableRenderBufferDriverExtensionRec __DRImutableRenderBufferDriverExtension;
struct __DRImutableRenderBufferDriverExtensionRec {
__DRIextension base;
};
/**
* The loader portion of EGL_KHR_mutable_render_buffer.
*
* Requires loader extension DRI_IMAGE_LOADER, through which the loader sends
* __DRI_IMAGE_BUFFER_SHARED to the driver.
*
* \see __DRI_MUTABLE_RENDER_BUFFER_DRIVER
*/
#define __DRI_MUTABLE_RENDER_BUFFER_LOADER "DRI_MutableRenderBufferLoader"
#define __DRI_MUTABLE_RENDER_BUFFER_LOADER_VERSION 1
typedef struct __DRImutableRenderBufferLoaderExtensionRec __DRImutableRenderBufferLoaderExtension;
struct __DRImutableRenderBufferLoaderExtensionRec {
__DRIextension base;
/**
* Inform the display engine (that is, SurfaceFlinger and/or hwcomposer)
* that the __DRIdrawable has new content.
*
* The display engine may ignore this call, for example, if it continually
* refreshes and displays the buffer on every frame, as in
* EGL_ANDROID_front_buffer_auto_refresh. On the other extreme, the display
* engine may refresh and display the buffer only in frames in which the
* driver calls this.
*
* If the fence_fd is not -1, then the display engine will display the
* buffer only after the fence signals.
*
* The drawable's current __DRIimageBufferMask, as returned by
* __DRIimageLoaderExtension::getBuffers(), must be
* __DRI_IMAGE_BUFFER_SHARED.
*/
void (*displaySharedBuffer)(__DRIdrawable *drawable, int fence_fd,
void *loaderPrivate);
};
#endif

View File

@@ -76,8 +76,18 @@ Configuration macro:
#endif
/* Visual Studio 2015 and later */
#ifdef _MSC_VER
#if _MSC_VER >= 1900
#define HAVE_TIMESPEC
#define HAVE_TIMESPEC_GET
#elif defined(__MINGW32__)
#define HAVE_TIMESPEC
#endif
#ifndef HAVE_TIMESPEC
struct timespec {
time_t tv_sec;
long tv_nsec;
};
#endif
/*---------------------------- macros ----------------------------*/

View File

@@ -36,8 +36,8 @@
*/
#if defined(_MSC_VER)
# if _MSC_VER < 1900
# error "Microsoft Visual Studio 2015 or higher required"
# if _MSC_VER < 1800 || (_MSC_FULL_VER < 180031101 && !defined(__clang__))
# error "Microsoft Visual Studio 2013 Update 4 or higher required"
# endif
/*

View File

@@ -125,7 +125,7 @@ struct ID3DPresent
#define ID3DPresent_SetCursorPos(p,a) (p)->lpVtbl->SetCursorPos(p,a)
#define ID3DPresent_SetCursor(p,a,b,c) (p)->lpVtbl->SetCursor(p,a,b,c)
#define ID3DPresent_SetGammaRamp(p,a,b) (p)->lpVtbl->SetGammaRamp(p,a,b)
#define ID3DPresent_GetWindowInfo(p,a,b,c,d) (p)->lpVtbl->GetWindowInfo(p,a,b,c,d)
#define ID3DPresent_GetWindowInfo(p,a,b,c,d) (p)->lpVtbl->GetWindowSize(p,a,b,c,d)
#define ID3DPresent_GetWindowOccluded(p) (p)->lpVtbl->GetWindowOccluded(p)
#define ID3DPresent_ResolutionMismatch(p) (p)->lpVtbl->ResolutionMismatch(p)
#define ID3DPresent_CreateThread(p,a,b) (p)->lpVtbl->CreateThread(p,a,b)

View File

@@ -171,7 +171,6 @@ CHIPSET(0x3185, glk_2x6, "Intel(R) UHD Graphics 600 (Geminilake 2x6)")
CHIPSET(0x3E90, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
CHIPSET(0x3E93, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
CHIPSET(0x3E99, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
CHIPSET(0x3E9C, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
CHIPSET(0x3E91, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
CHIPSET(0x3E92, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
@@ -204,10 +203,6 @@ CHIPSET(0x5A54, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
CHIPSET(0x8A50, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A51, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A52, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A56, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A57, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A58, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A59, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A5A, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A5B, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A5C, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")

View File

@@ -24,10 +24,6 @@
#include "vulkan_android.h"
#endif
#ifdef VK_USE_PLATFORM_FUCHSIA
#include <zircon/types.h>
#include "vulkan_fuchsia.h"
#endif
#ifdef VK_USE_PLATFORM_IOS_MVK
#include "vulkan_ios.h"

File diff suppressed because it is too large Load Diff

View File

@@ -1,58 +0,0 @@
#ifndef VULKAN_FUCHSIA_H_
#define VULKAN_FUCHSIA_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2018 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_FUCHSIA_imagepipe_surface 1
#define VK_FUCHSIA_IMAGEPIPE_SURFACE_SPEC_VERSION 1
#define VK_FUCHSIA_IMAGEPIPE_SURFACE_EXTENSION_NAME "VK_FUCHSIA_imagepipe_surface"
typedef VkFlags VkImagePipeSurfaceCreateFlagsFUCHSIA;
typedef struct VkImagePipeSurfaceCreateInfoFUCHSIA {
VkStructureType sType;
const void* pNext;
VkImagePipeSurfaceCreateFlagsFUCHSIA flags;
zx_handle_t imagePipeHandle;
} VkImagePipeSurfaceCreateInfoFUCHSIA;
typedef VkResult (VKAPI_PTR *PFN_vkCreateImagePipeSurfaceFUCHSIA)(VkInstance instance, const VkImagePipeSurfaceCreateInfoFUCHSIA* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkCreateImagePipeSurfaceFUCHSIA(
VkInstance instance,
const VkImagePipeSurfaceCreateInfoFUCHSIA* pCreateInfo,
const VkAllocationCallbacks* pAllocator,
VkSurfaceKHR* pSurface);
#endif
#ifdef __cplusplus
}
#endif
#endif

View File

@@ -45,14 +45,13 @@ AC_DEFUN([AX_CHECK_PYTHON_MAKO_MODULE],
try:
import sys
import mako
import distutils.version
except ImportError as err:
sys.exit(err)
else:
ver_req = distutils.version.LooseVersion('$1')
ver_act = distutils.version.LooseVersion(mako.__version__)
ver_req = map(int, '$1'.split('.'))
ver_act = map(int, mako.__version__.split('.'))
sys.exit(int(ver_req > ver_act))
" | $PYTHON -
" | $PYTHON2 -
if test $? -ne 0 ; then
AC_MSG_RESULT(no)

View File

@@ -1,4 +1,4 @@
# Copyright © 2017-2019 Intel Corporation
# Copyright © 2017-2018 Intel Corporation
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
@@ -25,8 +25,8 @@ project(
[find_program('python', 'python2', 'python3'), 'bin/meson_get_version.py']
).stdout(),
license : 'MIT',
meson_version : '>= 0.45',
default_options : ['buildtype=debugoptimized', 'b_ndebug=if-release', 'c_std=c99', 'cpp_std=c++11']
meson_version : '>= 0.44.1',
default_options : ['buildtype=debugoptimized', 'c_std=c99', 'cpp_std=c++11']
)
cc = meson.get_compiler('c')
@@ -54,7 +54,6 @@ with_valgrind = get_option('valgrind')
with_libunwind = get_option('libunwind')
with_asm = get_option('asm')
with_glx_read_only_text = get_option('glx-read-only-text')
with_glx_direct = get_option('glx-direct')
with_osmesa = get_option('osmesa')
with_swr_arches = get_option('swr-arches')
with_tools = get_option('tools')
@@ -64,11 +63,11 @@ endif
dri_drivers_path = get_option('dri-drivers-path')
if dri_drivers_path == ''
dri_drivers_path = join_paths(get_option('prefix'), get_option('libdir'), 'dri')
dri_drivers_path = join_paths(get_option('libdir'), 'dri')
endif
dri_search_path = get_option('dri-search-path')
if dri_search_path == ''
dri_search_path = dri_drivers_path
dri_search_path = join_paths(get_option('prefix'), dri_drivers_path)
endif
with_gles1 = get_option('gles1')
@@ -103,15 +102,13 @@ if _drivers.contains('auto')
elif ['arm', 'aarch64'].contains(host_machine.cpu_family())
_drivers = []
else
error('Unknown architecture @0@. Please pass -Ddri-drivers to set driver options. Patches gladly accepted to fix this.'.format(
host_machine.cpu_family()))
error('Unknown architecture. Please pass -Ddri-drivers to set driver options. Patches gladly accepted to fix this.')
endif
elif ['darwin', 'windows', 'cygwin', 'haiku'].contains(host_machine.system())
# only swrast would make sense here, but gallium swrast is a much better default
_drivers = []
else
error('Unknown OS @0@. Please pass -Ddri-drivers to set driver options. Patches gladly accepted to fix this.'.format(
host_machine.system()))
error('Unknown OS. Please pass -Ddri-drivers to set driver options. Patches gladly accepted to fix this.')
endif
endif
@@ -138,14 +135,12 @@ if _drivers.contains('auto')
'tegra', 'virgl', 'swrast',
]
else
error('Unknown architecture @0@. Please pass -Dgallium-drivers to set driver options. Patches gladly accepted to fix this.'.format(
host_machine.cpu_family()))
error('Unknown architecture. Please pass -Dgallium-drivers to set driver options. Patches gladly accepted to fix this.')
endif
elif ['darwin', 'windows', 'cygwin', 'haiku'].contains(host_machine.system())
_drivers = ['swrast']
else
error('Unknown OS @0@. Please pass -Dgallium-drivers to set driver options. Patches gladly accepted to fix this.'.format(
host_machine.system()))
error('Unknown OS. Please pass -Dgallium-drivers to set driver options. Patches gladly accepted to fix this.')
endif
endif
with_gallium_pl111 = _drivers.contains('pl111')
@@ -165,14 +160,6 @@ with_gallium_svga = _drivers.contains('svga')
with_gallium_virgl = _drivers.contains('virgl')
with_gallium_swr = _drivers.contains('swr')
if cc.get_id() == 'intel'
if meson.version().version_compare('< 0.49.0')
error('Meson does not have sufficient support of ICC before 0.49.0 to compile mesa')
elif with_gallium_swr and meson.version().version_compare('== 0.49.0')
warning('Meson as of 0.49.0 is sufficient for compiling mesa with ICC, but there are some caveats with SWR. 0.49.1 should resolve all of these')
endif
endif
with_gallium = _drivers.length() != 0 and _drivers != ['']
if with_gallium and system_has_kms_drm
@@ -188,18 +175,14 @@ if _vulkan_drivers.contains('auto')
if system_has_kms_drm
if host_machine.cpu_family().startswith('x86')
_vulkan_drivers = ['amd', 'intel']
elif ['arm', 'aarch64'].contains(host_machine.cpu_family())
_vulkan_drivers = []
else
error('Unknown architecture @0@. Please pass -Dvulkan-drivers to set driver options. Patches gladly accepted to fix this.'.format(
host_machine.cpu_family()))
error('Unknown architecture. Please pass -Dvulkan-drivers to set driver options. Patches gladly accepted to fix this.')
endif
elif ['darwin', 'windows', 'cygwin', 'haiku'].contains(host_machine.system())
# No vulkan driver supports windows or macOS currently
_vulkan_drivers = []
else
error('Unknown OS @0@. Please pass -Dvulkan-drivers to set driver options. Patches gladly accepted to fix this.'.format(
host_machine.system()))
error('Unknown OS. Please pass -Dvulkan-drivers to set driver options. Patches gladly accepted to fix this.')
endif
endif
@@ -232,6 +215,8 @@ elif system_has_kms_drm
else
# FIXME: haiku doesn't use dri, and xlib doesn't use dri, probably should
# assert here that one of those cases has been met.
# FIXME: GNU (hurd) ends up here as well, but meson doesn't officially
# support Hurd at time of writing (2017/11)
# FIXME: illumos ends up here as well
with_dri_platform = 'none'
endif
@@ -245,8 +230,7 @@ if _platforms.contains('auto')
elif ['haiku'].contains(host_machine.system())
_platforms = ['haiku']
else
error('Unknown OS @0@. Please pass -Dplatforms to set platforms. Patches gladly accepted to fix this.'.format(
host_machine.system()))
error('Unknown OS. Please pass -Dplatforms to set platforms. Patches gladly accepted to fix this.')
endif
endif
@@ -323,7 +307,7 @@ elif _egl == 'true'
elif not with_shared_glapi
error('EGL requires shared-glapi')
elif not with_platforms
error('No platforms specified, consider -Dplatforms=drm,x11,surfaceless at least')
error('No platforms specified, consider -Dplatforms=drm,x11 at least')
elif not ['disabled', 'dri'].contains(with_glx)
error('EGL requires dri, but a GLX is being built without dri')
elif ['darwin', 'windows'].contains(host_machine.system())
@@ -377,6 +361,9 @@ if with_glvnd
endif
endif
# TODO: toggle for this
with_glx_direct = true
if with_vulkan_icd_dir == ''
with_vulkan_icd_dir = join_paths(get_option('datadir'), 'vulkan/icd.d')
endif
@@ -393,8 +380,8 @@ if with_any_vk and (with_platform_x11 and not with_dri3)
error('Vulkan drivers require dri3 for X11 support')
endif
if with_dri
if with_glx == 'disabled' and not with_egl and not with_gbm and with_osmesa != 'classic'
error('building dri drivers require at least one windowing system or classic osmesa')
if with_glx == 'disabled' and not with_egl and not with_gbm
error('building dri drivers require at least one windowing system')
endif
endif
@@ -615,7 +602,7 @@ with_gallium_xa = _xa != 'false'
d3d_drivers_path = get_option('d3d-drivers-path')
if d3d_drivers_path == ''
d3d_drivers_path = join_paths(get_option('prefix'), get_option('libdir'), 'd3d')
d3d_drivers_path = join_paths(get_option('libdir'), 'd3d')
endif
with_gallium_st_nine = get_option('gallium-nine')
@@ -659,7 +646,6 @@ if get_option('power8') != 'false'
endif
_opencl = get_option('gallium-opencl')
clover_cpp_std = []
if _opencl != 'disabled'
if not with_gallium
error('OpenCL Clover implementation requires at least one gallium driver.')
@@ -668,18 +654,10 @@ if _opencl != 'disabled'
dep_clc = dependency('libclc')
with_gallium_opencl = true
with_opencl_icd = _opencl == 'icd'
if host_machine.cpu_family().startswith('ppc') and cpp.compiles('''
#if !defined(__VEC__) || !defined(__ALTIVEC__)
#error "AltiVec not enabled"
#endif''',
name : 'Altivec')
clover_cpp_std += ['cpp_std=gnu++11']
endif
else
dep_clc = null_dep
with_gallium_opencl = false
with_opencl_icd = false
with_gallium_icd = false
endif
gl_pkgconfig_c_flags = []
@@ -727,16 +705,10 @@ if with_platform_haiku
pre_args += '-DHAVE_HAIKU_PLATFORM'
endif
prog_python = import('python3').find_python()
has_mako = run_command(
prog_python, '-c',
'''
from distutils.version import StrictVersion
import mako
assert StrictVersion(mako.__version__) > StrictVersion("0.8.0")
''')
prog_python2 = find_program('python2')
has_mako = run_command(prog_python2, '-c', 'import mako')
if has_mako.returncode() != 0
error('Python (3.x) mako module >= 0.8.0 required to build mesa.')
error('Python (2.x) mako module required to build mesa.')
endif
if cc.get_id() == 'gcc' and cc.version().version_compare('< 4.4.6')
@@ -799,26 +771,22 @@ if cc.compiles('int foo(void) __attribute__((__noreturn__));',
endif
# TODO: this is very incomplete
if ['linux', 'cygwin', 'gnu'].contains(host_machine.system())
if ['linux', 'cygwin'].contains(host_machine.system())
pre_args += '-D_GNU_SOURCE'
endif
# Check for generic C arguments
c_args = []
foreach a : ['-Werror=implicit-function-declaration',
'-Werror=missing-prototypes', '-Werror=return-type',
'-fno-math-errno',
'-Werror=missing-prototypes', '-fno-math-errno',
'-fno-trapping-math', '-Qunused-arguments']
if cc.has_argument(a)
c_args += a
endif
endforeach
foreach a : ['missing-field-initializers', 'format-truncation']
if cc.has_argument('-W' + a)
c_args += '-Wno-' + a
endif
endforeach
if cc.has_argument('-Wmissing-field-initializers')
c_args += '-Wno-missing-field-initializers'
endif
c_vis_args = []
if cc.has_argument('-fvisibility=hidden')
@@ -827,8 +795,7 @@ endif
# Check for generic C++ arguments
cpp_args = []
foreach a : ['-Werror=return-type',
'-fno-math-errno', '-fno-trapping-math',
foreach a : ['-fno-math-errno', '-fno-trapping-math',
'-Qunused-arguments']
if cpp.has_argument(a)
cpp_args += a
@@ -838,7 +805,7 @@ endforeach
# For some reason, the test for -Wno-foo always succeeds with gcc, even if the
# option is not supported. Hence, check for -Wfoo instead.
foreach a : ['non-virtual-dtor', 'missing-field-initializers', 'format-truncation']
foreach a : ['non-virtual-dtor', 'missing-field-initializers']
if cpp.has_argument('-W' + a)
cpp_args += '-Wno-' + a
endif
@@ -958,7 +925,7 @@ endif
with_asm_arch = ''
if with_asm
if host_machine.cpu_family() == 'x86'
if system_has_kms_drm or host_machine.system() == 'gnu'
if system_has_kms_drm
with_asm_arch = 'x86'
pre_args += ['-DUSE_X86_ASM', '-DUSE_MMX_ASM', '-DUSE_3DNOW_ASM',
'-DUSE_SSE_ASM']
@@ -1097,13 +1064,6 @@ pre_args += '-DHAVE_ZLIB'
dep_thread = dependency('threads')
if dep_thread.found() and host_machine.system() != 'windows'
pre_args += '-DHAVE_PTHREAD'
if cc.has_function(
'pthread_setaffinity_np',
dependencies : dep_thread,
prefix : '#include <pthread.h>',
args : '-D_GNU_SOURCE')
pre_args += '-DHAVE_PTHREAD_SETAFFINITY'
endif
endif
dep_expat = dependency('expat')
# this only exists on linux so either this is linux and it will be found, or
@@ -1118,12 +1078,14 @@ dep_libdrm_amdgpu = null_dep
dep_libdrm_radeon = null_dep
dep_libdrm_nouveau = null_dep
dep_libdrm_etnaviv = null_dep
dep_libdrm_freedreno = null_dep
dep_libdrm_intel = null_dep
_drm_amdgpu_ver = '2.4.95'
_drm_amdgpu_ver = '2.4.91'
_drm_radeon_ver = '2.4.71'
_drm_nouveau_ver = '2.4.66'
_drm_etnaviv_ver = '2.4.89'
_drm_freedreno_ver = '2.4.92'
_drm_intel_ver = '2.4.75'
_drm_ver = '2.4.75'
@@ -1134,6 +1096,7 @@ _libdrm_checks = [
with_gallium_r300 or with_gallium_r600)],
['nouveau', (with_gallium_nouveau or with_dri_nouveau)],
['etnaviv', with_gallium_etnaviv],
['freedreno', with_gallium_freedreno],
]
# VC4 only needs core libdrm support of this version, not a libdrm_vc4
@@ -1191,40 +1154,45 @@ if with_gallium_opencl
'all-targets', 'linker', 'coverage', 'instrumentation', 'ipo', 'irreader',
'lto', 'option', 'objcarcopts', 'profiledata',
]
llvm_optional_modules += ['coroutines']
llvm_optional_modules += ['coroutines', 'opencl']
endif
if with_amd_vk or with_gallium_radeonsi
_llvm_version = '>= 6.0.0'
elif with_gallium_swr
_llvm_version = '>= 6.0.0'
if with_amd_vk or with_gallium_radeonsi or with_gallium_swr
_llvm_version = '>= 5.0.0'
elif with_gallium_opencl or with_gallium_r600
_llvm_version = '>= 3.9.0'
else
_llvm_version = '>= 3.3.0'
endif
_shared_llvm = get_option('shared-llvm')
_llvm = get_option('llvm')
dep_llvm = null_dep
with_llvm = false
if _llvm != 'false'
if _llvm == 'auto'
dep_llvm = dependency(
'llvm',
version : _llvm_version,
modules : llvm_modules,
optional_modules : llvm_optional_modules,
required : (
with_amd_vk or with_gallium_radeonsi or with_gallium_swr or
with_gallium_opencl or _llvm == 'true'
),
static : not _shared_llvm,
required : with_amd_vk or with_gallium_radeonsi or with_gallium_swr or with_gallium_opencl,
)
with_llvm = dep_llvm.found()
elif _llvm == 'true'
dep_llvm = dependency(
'llvm',
version : _llvm_version,
modules : llvm_modules,
optional_modules : llvm_optional_modules,
)
with_llvm = true
else
dep_llvm = null_dep
with_llvm = false
endif
if with_llvm
_llvm_version = dep_llvm.version().split('.')
# Development versions of LLVM have an 'svn' or 'git' suffix, we don't want
# that for our version checks.
# svn suffixes are stripped by meson as of 0.43, and git suffixes are
# strippped as of 0.44, but we support older meson versions.
# 3 digits versions in LLVM only started from 3.4.1 on
if dep_llvm.version().version_compare('>= 3.4.1')
@@ -1233,6 +1201,11 @@ if with_llvm
_llvm_patch = '0'
endif
if _llvm_patch.endswith('svn')
_llvm_patch = _llvm_patch.split('s')[0]
elif _llvm_patch.contains('git')
_llvm_patch = _llvm_patch.split('g')[0]
endif
pre_args += [
'-DHAVE_LLVM=0x0@0@0@1@'.format(_llvm_version[0], _llvm_version[1]),
'-DMESA_LLVM_VERSION_PATCH=@0@'.format(_llvm_patch),
@@ -1242,9 +1215,6 @@ if with_llvm
# programs, so we need to build all C++ code in mesa without rtti as well to
# ensure that linking works.
if dep_llvm.get_configtool_variable('has-rtti') == 'NO'
if with_gallium_nouveau
error('The Nouveau driver requires rtti. You either need to turn off nouveau or use an LLVM built with LLVM_ENABLE_RTTI.')
endif
cpp_args += '-fno-rtti'
endif
elif with_amd_vk or with_gallium_radeonsi or with_gallium_swr
@@ -1319,13 +1289,7 @@ endif
# TODO: symbol mangling
if with_platform_wayland
dep_wl_scanner = dependency('wayland-scanner', native: true)
prog_wl_scanner = find_program(dep_wl_scanner.get_pkgconfig_variable('wayland_scanner'))
if dep_wl_scanner.version().version_compare('>= 1.15')
wl_scanner_arg = 'private-code'
else
wl_scanner_arg = 'code'
endif
prog_wl_scanner = find_program('wayland-scanner')
dep_wl_protocols = dependency('wayland-protocols', version : '>= 1.8')
dep_wayland_client = dependency('wayland-client', version : '>=1.11')
dep_wayland_server = dependency('wayland-server', version : '>=1.11')
@@ -1407,7 +1371,7 @@ if with_platform_x11
dep_xcb_xfixes = dependency('xcb-xfixes')
endif
if with_xlib_lease
dep_xcb_xrandr = dependency('xcb-randr')
dep_xcb_xrandr = dependency('xcb-randr', version : '>= 1.12')
dep_xlib_xrandr = dependency('xrandr', version : '>= 1.3')
endif
endif

View File

@@ -25,7 +25,7 @@ option(
choices : [
'', 'auto', 'x11', 'wayland', 'drm', 'surfaceless', 'haiku', 'android',
],
description : 'window systems to support. If this is set to `auto`, all platforms applicable will be enabled.'
description : 'comma separated list of window systems to support. If this is set to auto all platforms applicable to the OS will be enabled.'
)
option(
'dri3',
@@ -237,12 +237,6 @@ option(
choices : ['auto', 'true', 'false'],
description : 'Build with LLVM support.'
)
option(
'shared-llvm',
type : 'boolean',
value : true,
description : 'Whether to link llvm shared or statically.'
)
option(
'valgrind',
type : 'combo',
@@ -301,8 +295,8 @@ option(
'tools',
type : 'array',
value : [],
choices : ['freedreno', 'glsl', 'intel', 'intel-ui', 'nir', 'nouveau', 'xvmc', 'all'],
description : 'List of tools to build. (Note: `intel-ui` selects `intel`)',
choices : ['freedreno', 'glsl', 'intel', 'nir', 'nouveau', 'xvmc', 'all'],
description : 'List of tools to build.',
)
option(
'power8',
@@ -318,9 +312,3 @@ option(
choices : ['auto', 'true', 'false'],
description : 'Enable VK_EXT_acquire_xlib_display.'
)
option(
'glx-direct',
type : 'boolean',
value : true,
description : 'Enable direct rendering in GLX and EGL for DRI',
)

View File

@@ -48,12 +48,7 @@ import source_list
# a path directly. We want to support both, so we need to detect the SCons version,
# for which no API is provided by SCons 8-P
# Scons version string has consistently been in this format:
# MajorVersion.MinorVersion.Patch[.alpha/beta.yyyymmdd]
# so this formula should cover all versions regardless of type
# stable, alpha or beta.
# For simplicity alpha and beta flags are removed.
scons_version = tuple(map(int, SCons.__version__.split('.')[:3]))
scons_version = tuple(map(int, SCons.__version__.split('.')))
def quietCommandLines(env):
# Quiet command lines

View File

@@ -29,7 +29,6 @@ Frontend-tool for Gallium3D architecture.
# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#
from __future__ import print_function
import distutils.version
import os
@@ -222,6 +221,10 @@ def generate(env):
env['suncc'] = env['platform'] == 'sunos' and os.path.basename(env['CC']) == 'cc'
env['icc'] = 'icc' == os.path.basename(env['CC'])
if env['msvc'] and env['toolchain'] == 'default' and env['machine'] == 'x86_64':
# MSVC x64 support is broken in earlier versions of scons
env.EnsurePythonVersion(2, 0)
# shortcuts
machine = env['machine']
platform = env['platform']
@@ -308,20 +311,7 @@ def generate(env):
if env.GetOption('num_jobs') <= 1:
env.SetOption('num_jobs', num_jobs())
# Speed up dependency checking. See
# - https://github.com/SCons/scons/wiki/GoFastButton
# - https://bugs.freedesktop.org/show_bug.cgi?id=109443
# Scons version string has consistently been in this format:
# MajorVersion.MinorVersion.Patch[.alpha/beta.yyyymmdd]
# so this formula should cover all versions regardless of type
# stable, alpha or beta.
# For simplicity alpha and beta flags are removed.
scons_version = distutils.version.StrictVersion('.'.join(SCons.__version__.split('.')[:3]))
if scons_version < distutils.version.StrictVersion('3.0.2') or \
scons_version > distutils.version.StrictVersion('3.0.4'):
env.Decider('MD5-timestamp')
env.Decider('MD5-timestamp')
env.SetOption('max_drift', 60)
# C preprocessor options
@@ -689,18 +679,6 @@ def generate(env):
env.PkgCheckModules('XF86VIDMODE', ['xxf86vm'])
env.PkgCheckModules('DRM', ['libdrm >= 2.4.75'])
if not os.path.exists("src/util/format_srgb.c"):
print("Checking for Python Mako module (>= 0.8.0)... ", end='')
try:
import mako
except ImportError:
print("no")
exit(1)
if distutils.version.StrictVersion(mako.__version__) < distutils.version.StrictVersion('0.8.0'):
print("no")
exit(1)
print("yes")
if env['x11']:
env.Append(CPPPATH = env['X11_CPPPATH'])

View File

@@ -99,6 +99,9 @@ def generate(env):
return
env.Prepend(CPPPATH = [os.path.join(llvm_dir, 'include')])
env.AppendUnique(CPPDEFINES = [
'HAVE_STDINT_H',
])
env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')])
# LIBS should match the output of `llvm-config --libs engine mcjit bitwriter x86asmprinter irreader`
if llvm_version >= distutils.version.LooseVersion('5.0'):

View File

@@ -20,13 +20,13 @@
# IN THE SOFTWARE.
.PHONY: git_sha1.h
git_sha1.h:
git_sha1.h: $(top_srcdir)/src/git_sha1.h.in
@echo "updating $@"
@$(PYTHON) $(top_srcdir)/bin/git_sha1_gen.py --output $@
@$(PYTHON2) $(top_srcdir)/bin/git_sha1_gen.py --output $@
BUILT_SOURCES = git_sha1.h
CLEANFILES = $(BUILT_SOURCES)
EXTRA_DIST = meson.build
EXTRA_DIST = git_sha1.h.in meson.build
SUBDIRS = . gtest util mapi/glapi/gen mapi
@@ -39,7 +39,6 @@ gl_HEADERS = \
$(top_srcdir)/include/GL/gl_mangle.h
endif
# TODO: When building with glvnd, glvnd itself should be providing gl.pc and the headers
if HAVE_GLX
glxdir = $(includedir)/GL
glx_HEADERS = \

View File

@@ -42,6 +42,10 @@ env.Append(CPPPATH = ["#" + env['build_dir']])
if env['platform'] != 'windows':
SConscript('loader/SConscript')
# When env['gles'] is set, the targets defined in mapi/glapi/SConscript are not
# used. libgl-xlib and libgl-gdi adapt themselves to use the targets defined
# in mapi/glapi-shared/SConscript. mesa/SConscript also adapts itself to
# enable OpenGL ES support.
SConscript('mapi/glapi/gen/SConscript')
SConscript('mapi/glapi/SConscript')
@@ -57,5 +61,8 @@ if not env['embedded']:
if env['platform'] == 'haiku':
SConscript('egl/SConscript')
if env['gles']:
SConscript('mapi/shared-glapi/SConscript')
SConscript('gallium/SConscript')

View File

@@ -24,7 +24,6 @@ ADDRLIB_LIBS = addrlib/libamdgpu_addrlib.la
addrlib_libamdgpu_addrlib_la_CPPFLAGS = \
$(DEFINES) \
-I$(top_srcdir)/src/ \
-I$(top_srcdir)/include \
-I$(srcdir)/common \
-I$(srcdir)/addrlib \
-I$(srcdir)/addrlib/core \

View File

@@ -66,6 +66,6 @@ common_libamd_common_la_LIBADD = $(LIBELF_LIBS)
common/sid_tables.h: $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h
$(AM_V_at)$(MKDIR_P) $(@D)
$(AM_V_GEN) $(PYTHON) $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h > $@
$(AM_V_GEN) $(PYTHON2) $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h > $@
BUILT_SOURCES = $(AMD_GENERATED_FILES)

View File

@@ -36,8 +36,6 @@
#include "addrcommon.h"
#include "util/macros.h"
using namespace Addr;
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -834,7 +832,7 @@ BOOL_32 ADDR_API ElemGetExportNorm(
Addr::Lib* pLib = Lib::GetLib(hLib);
BOOL_32 enabled = FALSE;
MAYBE_UNUSED ADDR_E_RETURNCODE returnCode = ADDR_OK;
ADDR_E_RETURNCODE returnCode = ADDR_OK;
if (pLib != NULL)
{

View File

@@ -90,7 +90,6 @@
#define AMDGPU_VEGA20_RANGE 0x28, 0xFF
#define AMDGPU_RAVEN_RANGE 0x01, 0x81
#define AMDGPU_RAVEN2_RANGE 0x81, 0xFF
#define AMDGPU_EXPAND_FIX(x) x
#define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max))
@@ -133,6 +132,5 @@
#define ASICREV_IS_VEGA20_P(r) ASICREV_IS(r, VEGA20)
#define ASICREV_IS_RAVEN(r) ASICREV_IS(r, RAVEN)
#define ASICREV_IS_RAVEN2(r) ASICREV_IS(r, RAVEN2)
#endif // _AMDGPU_ASIC_ADDR_H

View File

@@ -37,8 +37,6 @@
#include "amdgpu_asic_addr.h"
#include "util/macros.h"
////////////////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1291,7 +1289,7 @@ ChipFamily Gfx9Lib::HwlConvertChipFamily(
break;
case FAMILY_RV:
m_settings.isArcticIsland = 1;
m_settings.isRaven = ASICREV_IS_RAVEN(uChipRevision) || ASICREV_IS_RAVEN2(uChipRevision);
m_settings.isRaven = ASICREV_IS_RAVEN(uChipRevision);
if (m_settings.isRaven)
{
@@ -2472,7 +2470,7 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeBlock256Equation(
// Post validation
if (ret == ADDR_OK)
{
MAYBE_UNUSED Dim2d microBlockDim = Block256_2d[elementBytesLog2];
Dim2d microBlockDim = Block256_2d[elementBytesLog2];
ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 0)) ==
(microBlockDim.w * (1 << elementBytesLog2)));
ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 1)) == microBlockDim.h);
@@ -3878,7 +3876,7 @@ ADDR_E_RETURNCODE Gfx9Lib::ComputeStereoInfo(
const UINT_32 numBankBits = GetBankXorBits(blkSizeLog2);
const UINT_32 bppLog2 = Log2(pIn->bpp >> 3);
const UINT_32 maxYCoordBlock256 = Log2(Block256_2d[bppLog2].h) - 1;
MAYBE_UNUSED const ADDR_EQUATION *pEqToCheck = &m_equationTable[eqIndex];
const ADDR_EQUATION *pEqToCheck = &m_equationTable[eqIndex];
ADDR_ASSERT(maxYCoordBlock256 ==
GetMaxValidChannelIndex(&pEqToCheck->addr[0], GetBlockSizeLog2(ADDR_SW_256B), 1));

View File

@@ -57,7 +57,7 @@ libamdgpu_addrlib = static_library(
include_directories(
'core', 'inc/chip/gfx9', 'inc/chip/r800', 'gfx9/chip', 'r800/chip',
),
inc_amd_common, inc_common, inc_src,
inc_amd_common, inc_src,
],
cpp_args : cpp_vis_args,
)

View File

@@ -33,8 +33,6 @@
#include "egbaddrlib.h"
#include "util/macros.h"
namespace Addr
{
namespace V1
@@ -981,7 +979,7 @@ BOOL_32 EgBasedLib::SanityCheckMacroTiled(
) const
{
BOOL_32 valid = TRUE;
MAYBE_UNUSED UINT_32 numPipes = HwlGetPipes(pTileInfo);
UINT_32 numPipes = HwlGetPipes(pTileInfo);
switch (pTileInfo->banks)
{
@@ -4110,7 +4108,7 @@ UINT_64 EgBasedLib::HwlGetSizeAdjustmentMicroTiled(
) const
{
UINT_64 logicalSliceSize;
MAYBE_UNUSED UINT_64 physicalSliceSize;
UINT_64 physicalSliceSize;
UINT_32 pitch = *pPitch;
UINT_32 height = *pHeight;

View File

@@ -99,7 +99,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
struct drm_amdgpu_info_device device_info = {};
struct amdgpu_buffer_size_alignments alignment_info = {};
struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {};
struct drm_amdgpu_info_hw_ip uvd_enc = {}, vce = {}, vcn_dec = {}, vcn_jpeg = {};
struct drm_amdgpu_info_hw_ip uvd_enc = {}, vce = {}, vcn_dec = {};
struct drm_amdgpu_info_hw_ip vcn_enc = {}, gfx = {};
struct amdgpu_gds_resource_info gds = {};
uint32_t vce_version = 0, vce_feature = 0, uvd_version = 0, uvd_feature = 0;
@@ -186,14 +186,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
}
}
if (info->drm_major == 3 && info->drm_minor >= 27) {
r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_VCN_JPEG, 0, &vcn_jpeg);
if (r) {
fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(vcn_jpeg) failed.\n");
return false;
}
}
r = amdgpu_query_firmware_version(dev, AMDGPU_INFO_FW_GFX_ME, 0, 0,
&info->me_fw_version,
&info->me_fw_feature);
@@ -263,6 +255,9 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
info->gart_size = meminfo.gtt.total_heap_size;
info->vram_size = meminfo.vram.total_heap_size;
info->vram_vis_size = meminfo.cpu_accessible_vram.total_heap_size;
info->max_alloc_size = MAX2(meminfo.vram.max_allocation,
meminfo.gtt.max_allocation);
} else {
/* This is a deprecated interface, which reports usable sizes
* (total minus pinned), but the pinned size computation is
@@ -294,6 +289,11 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
info->gart_size = gtt.heap_size;
info->vram_size = vram.heap_size;
info->vram_vis_size = vram_vis.heap_size;
/* The kernel can split large buffers in VRAM but not in GTT, so large
* allocations can fail or cause buffer movement failures in the kernel.
*/
info->max_alloc_size = MAX2(info->vram_size * 0.9, info->gart_size * 0.7);
}
/* Set chip identification. */
@@ -301,11 +301,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
info->vce_harvest_config = amdinfo->vce_harvest_config;
switch (info->pci_id) {
#define CHIPSET(pci_id, cfamily) \
case pci_id: \
info->family = CHIP_##cfamily; \
info->name = #cfamily; \
break;
#define CHIPSET(pci_id, cfamily) case pci_id: info->family = CHIP_##cfamily; break;
#include "pci_ids/radeonsi_pci_ids.h"
#undef CHIPSET
@@ -314,12 +310,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
return false;
}
/* Raven2 uses the same PCI IDs as Raven1, but different revision IDs. */
if (info->family == CHIP_RAVEN && amdinfo->chip_rev >= 0x8) {
info->family = CHIP_RAVEN2;
info->name = "RAVEN2";
}
if (info->family >= CHIP_VEGA10)
info->chip_class = GFX9;
else if (info->family >= CHIP_TONGA)
@@ -337,14 +327,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
info->has_dedicated_vram =
!(amdinfo->ids_flags & AMDGPU_IDS_FLAGS_FUSION);
/* The kernel can split large buffers in VRAM but not in GTT, so large
* allocations can fail or cause buffer movement failures in the kernel.
*/
if (info->has_dedicated_vram)
info->max_alloc_size = info->vram_size * 0.8;
else
info->max_alloc_size = info->gart_size * 0.7;
/* Set hardware information. */
info->gds_size = gds.gds_total_size;
info->gds_gfx_partition_size = gds.gds_gfx_partition_size;
@@ -354,8 +336,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
info->max_se = amdinfo->num_shader_engines;
info->max_sh_per_se = amdinfo->num_shader_arrays_per_engine;
info->has_hw_decode =
(uvd.available_rings != 0) || (vcn_dec.available_rings != 0) ||
(vcn_jpeg.available_rings != 0);
(uvd.available_rings != 0) || (vcn_dec.available_rings != 0);
info->uvd_fw_version =
uvd.available_rings ? uvd_version : 0;
info->vce_fw_version =
@@ -429,8 +410,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
for (j = 0; j < info->max_sh_per_se; j++)
info->num_good_compute_units +=
util_bitcount(amdinfo->cu_bitmap[i][j]);
info->num_good_cu_per_sh = info->num_good_compute_units /
(info->max_se * info->max_sh_per_se);
memcpy(info->si_tile_mode_array, amdinfo->gb_tile_mode,
sizeof(amdinfo->gb_tile_mode));
@@ -454,7 +433,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
ib_align = MAX2(ib_align, vce.ib_start_alignment);
ib_align = MAX2(ib_align, vcn_dec.ib_start_alignment);
ib_align = MAX2(ib_align, vcn_enc.ib_start_alignment);
ib_align = MAX2(ib_align, vcn_jpeg.ib_start_alignment);
assert(ib_align);
info->ib_start_alignment = ib_align;
@@ -561,7 +539,6 @@ void ac_print_gpu_info(struct radeon_info *info)
printf("Shader core info:\n");
printf(" max_shader_clock = %i\n", info->max_shader_clock);
printf(" num_good_compute_units = %i\n", info->num_good_compute_units);
printf(" num_good_cu_per_sh = %i\n", info->num_good_cu_per_sh);
printf(" num_tcc_blocks = %i\n", info->num_tcc_blocks);
printf(" max_se = %i\n", info->max_se);
printf(" max_sh_per_se = %i\n", info->max_sh_per_se);
@@ -659,10 +636,9 @@ ac_get_gs_table_depth(enum chip_class chip_class, enum radeon_family family)
void
ac_get_raster_config(struct radeon_info *info,
uint32_t *raster_config_p,
uint32_t *raster_config_1_p,
uint32_t *se_tile_repeat_p)
uint32_t *raster_config_1_p)
{
unsigned raster_config, raster_config_1, se_tile_repeat;
unsigned raster_config, raster_config_1;
switch (info->family) {
/* 1 SE / 1 RB */
@@ -739,16 +715,8 @@ ac_get_raster_config(struct radeon_info *info,
raster_config_1 = 0x0000002a;
}
unsigned se_width = 8 << G_028350_SE_XSEL_GFX6(raster_config);
unsigned se_height = 8 << G_028350_SE_YSEL_GFX6(raster_config);
/* I don't know how to calculate this, though this is probably a good guess. */
se_tile_repeat = MAX2(se_width, se_height) * info->max_se;
*raster_config_p = raster_config;
*raster_config_1_p = raster_config_1;
if (se_tile_repeat_p)
*se_tile_repeat_p = se_tile_repeat;
}
void

View File

@@ -47,7 +47,6 @@ struct radeon_info {
uint32_t pci_func;
/* Device info. */
const char *name;
uint32_t pci_id;
enum radeon_family family;
enum chip_class chip_class;
@@ -116,7 +115,6 @@ struct radeon_info {
uint32_t r600_max_quad_pipes; /* wave size / 16 */
uint32_t max_shader_clock;
uint32_t num_good_compute_units;
uint32_t num_good_cu_per_sh;
uint32_t num_tcc_blocks;
uint32_t max_se; /* shader engines */
uint32_t max_sh_per_se; /* shader arrays per shader engine */
@@ -150,8 +148,7 @@ void ac_print_gpu_info(struct radeon_info *info);
int ac_get_gs_table_depth(enum chip_class chip_class, enum radeon_family family);
void ac_get_raster_config(struct radeon_info *info,
uint32_t *raster_config_p,
uint32_t *raster_config_1_p,
uint32_t *se_tile_repeat_p);
uint32_t *raster_config_1_p);
void ac_get_harvested_configs(struct radeon_info *info,
unsigned raster_config,
unsigned *cik_raster_config_1_p,

View File

@@ -87,8 +87,6 @@ ac_llvm_context_init(struct ac_llvm_context *ctx,
ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
ctx->i16_0 = LLVMConstInt(ctx->i16, 0, false);
ctx->i16_1 = LLVMConstInt(ctx->i16, 1, false);
ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
ctx->i64_0 = LLVMConstInt(ctx->i64, 0, false);
@@ -184,7 +182,7 @@ ac_get_type_size(LLVMTypeRef type)
case LLVMDoubleTypeKind:
return 8;
case LLVMPointerTypeKind:
if (LLVMGetPointerAddressSpace(type) == AC_ADDR_SPACE_CONST_32BIT)
if (LLVMGetPointerAddressSpace(type) == AC_CONST_32BIT_ADDR_SPACE)
return 4;
return 8;
case LLVMVectorTypeKind:
@@ -350,12 +348,6 @@ ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type,
return phi;
}
void ac_build_s_barrier(struct ac_llvm_context *ctx)
{
ac_build_intrinsic(ctx, "llvm.amdgcn.s.barrier", ctx->voidt, NULL,
0, AC_FUNC_ATTR_CONVERGENT);
}
/* Prevent optimizations (at least of memory accesses) across the current
* point in the program by emitting empty inline assembly that is marked as
* having side effects.
@@ -570,22 +562,6 @@ LLVMValueRef ac_build_expand_to_vec4(struct ac_llvm_context *ctx,
return ac_build_expand(ctx, value, num_channels, 4);
}
LLVMValueRef ac_build_round(struct ac_llvm_context *ctx, LLVMValueRef value)
{
unsigned type_size = ac_get_type_size(LLVMTypeOf(value));
const char *name;
if (type_size == 2)
name = "llvm.rint.f16";
else if (type_size == 4)
name = "llvm.rint.f32";
else
name = "llvm.rint.f64";
return ac_build_intrinsic(ctx, name, LLVMTypeOf(value), &value, 1,
AC_FUNC_ATTR_READNONE);
}
LLVMValueRef
ac_build_fdiv(struct ac_llvm_context *ctx,
LLVMValueRef num,
@@ -607,67 +583,6 @@ ac_build_fdiv(struct ac_llvm_context *ctx,
return ret;
}
/* See fast_idiv_by_const.h. */
/* Set: increment = util_fast_udiv_info::increment ? multiplier : 0; */
LLVMValueRef ac_build_fast_udiv(struct ac_llvm_context *ctx,
LLVMValueRef num,
LLVMValueRef multiplier,
LLVMValueRef pre_shift,
LLVMValueRef post_shift,
LLVMValueRef increment)
{
LLVMBuilderRef builder = ctx->builder;
num = LLVMBuildLShr(builder, num, pre_shift, "");
num = LLVMBuildMul(builder,
LLVMBuildZExt(builder, num, ctx->i64, ""),
LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
num = LLVMBuildAdd(builder, num,
LLVMBuildZExt(builder, increment, ctx->i64, ""), "");
num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
num = LLVMBuildTrunc(builder, num, ctx->i32, "");
return LLVMBuildLShr(builder, num, post_shift, "");
}
/* See fast_idiv_by_const.h. */
/* If num != UINT_MAX, this more efficient version can be used. */
/* Set: increment = util_fast_udiv_info::increment; */
LLVMValueRef ac_build_fast_udiv_nuw(struct ac_llvm_context *ctx,
LLVMValueRef num,
LLVMValueRef multiplier,
LLVMValueRef pre_shift,
LLVMValueRef post_shift,
LLVMValueRef increment)
{
LLVMBuilderRef builder = ctx->builder;
num = LLVMBuildLShr(builder, num, pre_shift, "");
num = LLVMBuildNUWAdd(builder, num, increment, "");
num = LLVMBuildMul(builder,
LLVMBuildZExt(builder, num, ctx->i64, ""),
LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
num = LLVMBuildTrunc(builder, num, ctx->i32, "");
return LLVMBuildLShr(builder, num, post_shift, "");
}
/* See fast_idiv_by_const.h. */
/* Both operands must fit in 31 bits and the divisor must not be 1. */
LLVMValueRef ac_build_fast_udiv_u31_d_not_one(struct ac_llvm_context *ctx,
LLVMValueRef num,
LLVMValueRef multiplier,
LLVMValueRef post_shift)
{
LLVMBuilderRef builder = ctx->builder;
num = LLVMBuildMul(builder,
LLVMBuildZExt(builder, num, ctx->i64, ""),
LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
num = LLVMBuildTrunc(builder, num, ctx->i32, "");
return LLVMBuildLShr(builder, num, post_shift, "");
}
/* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
* of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
* already multiplied by two. id is the cube face number.
@@ -765,7 +680,8 @@ ac_prepare_cube_coords(struct ac_llvm_context *ctx,
LLVMValueRef invma;
if (is_array && !is_lod) {
LLVMValueRef tmp = ac_build_round(ctx, coords_arg[3]);
LLVMValueRef tmp = coords_arg[3];
tmp = ac_build_intrinsic(ctx, "llvm.rint.f32", ctx->f32, &tmp, 1, 0);
/* Section 8.9 (Texture Functions) of the GLSL 4.50 spec says:
*
@@ -860,7 +776,8 @@ ac_prepare_cube_coords(struct ac_llvm_context *ctx,
if (is_array) {
/* for cube arrays coord.z = coord.w(array_index) * 8 + face */
/* coords_arg.w component - array_index for cube arrays */
coords[2] = ac_build_fmad(ctx, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), coords[2]);
LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
}
memcpy(coords_arg, coords, sizeof(coords));
@@ -896,37 +813,6 @@ ac_build_fs_interp(struct ac_llvm_context *ctx,
ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
}
LLVMValueRef
ac_build_fs_interp_f16(struct ac_llvm_context *ctx,
LLVMValueRef llvm_chan,
LLVMValueRef attr_number,
LLVMValueRef params,
LLVMValueRef i,
LLVMValueRef j)
{
LLVMValueRef args[6];
LLVMValueRef p1;
args[0] = i;
args[1] = llvm_chan;
args[2] = attr_number;
args[3] = ctx->i1false;
args[4] = params;
p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1.f16",
ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
args[0] = p1;
args[1] = j;
args[2] = llvm_chan;
args[3] = attr_number;
args[4] = ctx->i1false;
args[5] = params;
return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2.f16",
ctx->f16, args, 6, AC_FUNC_ATTR_READNONE);
}
LLVMValueRef
ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
LLVMValueRef parameter,
@@ -951,18 +837,11 @@ ac_build_gep0(struct ac_llvm_context *ctx,
LLVMValueRef index)
{
LLVMValueRef indices[2] = {
ctx->i32_0,
LLVMConstInt(ctx->i32, 0, 0),
index,
};
return LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, "");
}
LLVMValueRef ac_build_pointer_add(struct ac_llvm_context *ctx, LLVMValueRef ptr,
LLVMValueRef index)
{
return LLVMBuildPointerCast(ctx->builder,
ac_build_gep0(ctx, ptr, index),
LLVMTypeOf(ptr), "");
return LLVMBuildGEP(ctx->builder, base_ptr,
indices, 2, "");
}
void
@@ -983,39 +862,14 @@ ac_build_indexed_store(struct ac_llvm_context *ctx,
* \param uniform Whether the base_ptr and index can be assumed to be
* dynamically uniform (i.e. load to an SGPR)
* \param invariant Whether the load is invariant (no other opcodes affect it)
* \param no_unsigned_wraparound
* For all possible re-associations and re-distributions of an expression
* "base_ptr + index * elemsize" into "addr + offset" (excluding GEPs
* without inbounds in base_ptr), this parameter is true if "addr + offset"
* does not result in an unsigned integer wraparound. This is used for
* optimal code generation of 32-bit pointer arithmetic.
*
* For example, a 32-bit immediate offset that causes a 32-bit unsigned
* integer wraparound can't be an imm offset in s_load_dword, because
* the instruction performs "addr + offset" in 64 bits.
*
* Expected usage for bindless textures by chaining GEPs:
* // possible unsigned wraparound, don't use InBounds:
* ptr1 = LLVMBuildGEP(base_ptr, index);
* image = load(ptr1); // becomes "s_load ptr1, 0"
*
* ptr2 = LLVMBuildInBoundsGEP(ptr1, 32 / elemsize);
* sampler = load(ptr2); // becomes "s_load ptr1, 32" thanks to InBounds
*/
static LLVMValueRef
ac_build_load_custom(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
LLVMValueRef index, bool uniform, bool invariant,
bool no_unsigned_wraparound)
LLVMValueRef index, bool uniform, bool invariant)
{
LLVMValueRef pointer, result;
LLVMValueRef indices[2] = {ctx->i32_0, index};
if (no_unsigned_wraparound &&
LLVMGetPointerAddressSpace(LLVMTypeOf(base_ptr)) == AC_ADDR_SPACE_CONST_32BIT)
pointer = LLVMBuildInBoundsGEP(ctx->builder, base_ptr, indices, 2, "");
else
pointer = LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, "");
pointer = ac_build_gep0(ctx, base_ptr, index);
if (uniform)
LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
result = LLVMBuildLoad(ctx->builder, pointer, "");
@@ -1027,28 +881,19 @@ ac_build_load_custom(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
LLVMValueRef ac_build_load(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
LLVMValueRef index)
{
return ac_build_load_custom(ctx, base_ptr, index, false, false, false);
return ac_build_load_custom(ctx, base_ptr, index, false, false);
}
LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
LLVMValueRef base_ptr, LLVMValueRef index)
{
return ac_build_load_custom(ctx, base_ptr, index, false, true, false);
return ac_build_load_custom(ctx, base_ptr, index, false, true);
}
/* This assumes that there is no unsigned integer wraparound during the address
* computation, excluding all GEPs within base_ptr. */
LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
LLVMValueRef base_ptr, LLVMValueRef index)
{
return ac_build_load_custom(ctx, base_ptr, index, true, true, true);
}
/* See ac_build_load_custom() documentation. */
LLVMValueRef ac_build_load_to_sgpr_uint_wraparound(struct ac_llvm_context *ctx,
LLVMValueRef base_ptr, LLVMValueRef index)
{
return ac_build_load_custom(ctx, base_ptr, index, true, true, false);
return ac_build_load_custom(ctx, base_ptr, index, true, true);
}
/* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
@@ -1107,7 +952,7 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
LLVMValueRef args[] = {
ac_to_float(ctx, vdata),
LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
ctx->i32_0,
LLVMConstInt(ctx->i32, 0, 0),
offset,
LLVMConstInt(ctx->i1, glc, 0),
LLVMConstInt(ctx->i1, slc, 0),
@@ -1135,8 +980,8 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
LLVMValueRef args[] = {
vdata,
LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
ctx->i32_0,
voffset ? voffset : ctx->i32_0,
LLVMConstInt(ctx->i32, 0, 0),
voffset ? voffset : LLVMConstInt(ctx->i32, 0, 0),
soffset,
LLVMConstInt(ctx->i32, inst_offset, 0),
LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
@@ -1168,7 +1013,7 @@ ac_build_buffer_load_common(struct ac_llvm_context *ctx,
{
LLVMValueRef args[] = {
LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
vindex ? vindex : ctx->i32_0,
vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0),
voffset,
LLVMConstInt(ctx->i1, glc, 0),
LLVMConstInt(ctx->i1, slc, 0)
@@ -1263,7 +1108,7 @@ LLVMValueRef ac_build_buffer_load_format_gfx9_safe(struct ac_llvm_context *ctx,
bool can_speculate)
{
LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->builder, rsrc, LLVMConstInt(ctx->i32, 2, 0), "");
LLVMValueRef stride = LLVMBuildExtractElement(ctx->builder, rsrc, ctx->i32_1, "");
LLVMValueRef stride = LLVMBuildExtractElement(ctx->builder, rsrc, LLVMConstInt(ctx->i32, 1, 0), "");
stride = LLVMBuildLShr(ctx->builder, stride, LLVMConstInt(ctx->i32, 16, 0), "");
LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->builder,
@@ -1284,8 +1129,7 @@ ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
LLVMValueRef vindex,
LLVMValueRef voffset,
LLVMValueRef soffset,
LLVMValueRef immoffset,
LLVMValueRef glc)
LLVMValueRef immoffset)
{
const char *name = "llvm.amdgcn.tbuffer.load.i32";
LLVMTypeRef type = ctx->i32;
@@ -1297,7 +1141,7 @@ ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
immoffset,
LLVMConstInt(ctx->i32, V_008F0C_BUF_DATA_FORMAT_16, false),
LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, false),
glc,
ctx->i1false,
ctx->i1false,
};
LLVMValueRef res = ac_build_intrinsic(ctx, name, type, params, 9, 0);
@@ -1331,7 +1175,7 @@ ac_get_thread_id(struct ac_llvm_context *ctx)
LLVMValueRef tid_args[2];
tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
tid_args[1] = ctx->i32_0;
tid_args[1] = LLVMConstInt(ctx->i32, 0, false);
tid_args[1] = ac_build_intrinsic(ctx,
"llvm.amdgcn.mbcnt.lo", ctx->i32,
tid_args, 2, AC_FUNC_ATTR_READNONE);
@@ -1498,7 +1342,7 @@ ac_build_imsb(struct ac_llvm_context *ctx,
LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
LLVMValueRef cond = LLVMBuildOr(ctx->builder,
LLVMBuildICmp(ctx->builder, LLVMIntEQ,
arg, ctx->i32_0, ""),
arg, LLVMConstInt(ctx->i32, 0, 0), ""),
LLVMBuildICmp(ctx->builder, LLVMIntEQ,
arg, all_ones, ""), "");
@@ -1514,31 +1358,17 @@ ac_build_umsb(struct ac_llvm_context *ctx,
LLVMTypeRef type;
LLVMValueRef highest_bit;
LLVMValueRef zero;
unsigned bitsize;
bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(arg));
switch (bitsize) {
case 64:
if (ac_get_elem_bits(ctx, LLVMTypeOf(arg)) == 64) {
intrin_name = "llvm.ctlz.i64";
type = ctx->i64;
highest_bit = LLVMConstInt(ctx->i64, 63, false);
zero = ctx->i64_0;
break;
case 32:
} else {
intrin_name = "llvm.ctlz.i32";
type = ctx->i32;
highest_bit = LLVMConstInt(ctx->i32, 31, false);
zero = ctx->i32_0;
break;
case 16:
intrin_name = "llvm.ctlz.i16";
type = ctx->i16;
highest_bit = LLVMConstInt(ctx->i16, 15, false);
zero = ctx->i16_0;
break;
default:
unreachable(!"invalid bitsize");
break;
}
LLVMValueRef params[2] = {
@@ -2044,24 +1874,83 @@ LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
args, 2, AC_FUNC_ATTR_READNONE);
}
/* Upper 16 bits must be zero. */
static LLVMValueRef ac_llvm_pack_two_int16(struct ac_llvm_context *ctx,
LLVMValueRef val[2])
{
return LLVMBuildOr(ctx->builder, val[0],
LLVMBuildShl(ctx->builder, val[1],
LLVMConstInt(ctx->i32, 16, 0),
""), "");
}
/* Upper 16 bits are ignored and will be dropped. */
static LLVMValueRef ac_llvm_pack_two_int32_as_int16(struct ac_llvm_context *ctx,
LLVMValueRef val[2])
{
LLVMValueRef v[2] = {
LLVMBuildAnd(ctx->builder, val[0],
LLVMConstInt(ctx->i32, 0xffff, 0), ""),
val[1],
};
return ac_llvm_pack_two_int16(ctx, v);
}
LLVMValueRef ac_build_cvt_pknorm_i16(struct ac_llvm_context *ctx,
LLVMValueRef args[2])
{
LLVMValueRef res =
ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.i16",
ctx->v2i16, args, 2,
AC_FUNC_ATTR_READNONE);
return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
if (HAVE_LLVM >= 0x0600) {
LLVMValueRef res =
ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.i16",
ctx->v2i16, args, 2,
AC_FUNC_ATTR_READNONE);
return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
}
LLVMValueRef val[2];
for (int chan = 0; chan < 2; chan++) {
/* Clamp between [-1, 1]. */
val[chan] = ac_build_fmin(ctx, args[chan], ctx->f32_1);
val[chan] = ac_build_fmax(ctx, val[chan], LLVMConstReal(ctx->f32, -1));
/* Convert to a signed integer in [-32767, 32767]. */
val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
LLVMConstReal(ctx->f32, 32767), "");
/* If positive, add 0.5, else add -0.5. */
val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
LLVMBuildSelect(ctx->builder,
LLVMBuildFCmp(ctx->builder, LLVMRealOGE,
val[chan], ctx->f32_0, ""),
LLVMConstReal(ctx->f32, 0.5),
LLVMConstReal(ctx->f32, -0.5), ""), "");
val[chan] = LLVMBuildFPToSI(ctx->builder, val[chan], ctx->i32, "");
}
return ac_llvm_pack_two_int32_as_int16(ctx, val);
}
LLVMValueRef ac_build_cvt_pknorm_u16(struct ac_llvm_context *ctx,
LLVMValueRef args[2])
{
LLVMValueRef res =
ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.u16",
ctx->v2i16, args, 2,
AC_FUNC_ATTR_READNONE);
return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
if (HAVE_LLVM >= 0x0600) {
LLVMValueRef res =
ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.u16",
ctx->v2i16, args, 2,
AC_FUNC_ATTR_READNONE);
return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
}
LLVMValueRef val[2];
for (int chan = 0; chan < 2; chan++) {
val[chan] = ac_build_clamp(ctx, args[chan]);
val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
LLVMConstReal(ctx->f32, 65535), "");
val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
LLVMConstReal(ctx->f32, 0.5), "");
val[chan] = LLVMBuildFPToUI(ctx->builder, val[chan],
ctx->i32, "");
}
return ac_llvm_pack_two_int32_as_int16(ctx, val);
}
/* The 8-bit and 10-bit clamping is for HW workarounds. */
@@ -2078,9 +1967,10 @@ LLVMValueRef ac_build_cvt_pk_i16(struct ac_llvm_context *ctx,
bits != 10 ? max_rgb : ctx->i32_1;
LLVMValueRef min_alpha =
bits != 10 ? min_rgb : LLVMConstInt(ctx->i32, -2, 0);
bool has_intrinsic = HAVE_LLVM >= 0x0600;
/* Clamp. */
if (bits != 16) {
if (!has_intrinsic || bits != 16) {
for (int i = 0; i < 2; i++) {
bool alpha = hi && i == 1;
args[i] = ac_build_imin(ctx, args[i],
@@ -2090,11 +1980,15 @@ LLVMValueRef ac_build_cvt_pk_i16(struct ac_llvm_context *ctx,
}
}
LLVMValueRef res =
ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.i16",
ctx->v2i16, args, 2,
AC_FUNC_ATTR_READNONE);
return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
if (has_intrinsic) {
LLVMValueRef res =
ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.i16",
ctx->v2i16, args, 2,
AC_FUNC_ATTR_READNONE);
return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
}
return ac_llvm_pack_two_int32_as_int16(ctx, args);
}
/* The 8-bit and 10-bit clamping is for HW workarounds. */
@@ -2107,9 +2001,10 @@ LLVMValueRef ac_build_cvt_pk_u16(struct ac_llvm_context *ctx,
bits == 8 ? 255 : bits == 10 ? 1023 : 65535, 0);
LLVMValueRef max_alpha =
bits != 10 ? max_rgb : LLVMConstInt(ctx->i32, 3, 0);
bool has_intrinsic = HAVE_LLVM >= 0x0600;
/* Clamp. */
if (bits != 16) {
if (!has_intrinsic || bits != 16) {
for (int i = 0; i < 2; i++) {
bool alpha = hi && i == 1;
args[i] = ac_build_umin(ctx, args[i],
@@ -2117,23 +2012,37 @@ LLVMValueRef ac_build_cvt_pk_u16(struct ac_llvm_context *ctx,
}
}
LLVMValueRef res =
ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.u16",
ctx->v2i16, args, 2,
AC_FUNC_ATTR_READNONE);
return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
if (has_intrinsic) {
LLVMValueRef res =
ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.u16",
ctx->v2i16, args, 2,
AC_FUNC_ATTR_READNONE);
return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
}
return ac_llvm_pack_two_int16(ctx, args);
}
LLVMValueRef ac_build_wqm_vote(struct ac_llvm_context *ctx, LLVMValueRef i1)
{
assert(HAVE_LLVM >= 0x0600);
return ac_build_intrinsic(ctx, "llvm.amdgcn.wqm.vote", ctx->i1,
&i1, 1, AC_FUNC_ATTR_READNONE);
}
void ac_build_kill_if_false(struct ac_llvm_context *ctx, LLVMValueRef i1)
{
ac_build_intrinsic(ctx, "llvm.amdgcn.kill", ctx->voidt,
&i1, 1, 0);
if (HAVE_LLVM >= 0x0600) {
ac_build_intrinsic(ctx, "llvm.amdgcn.kill", ctx->voidt,
&i1, 1, 0);
return;
}
LLVMValueRef value = LLVMBuildSelect(ctx->builder, i1,
LLVMConstReal(ctx->f32, 1),
LLVMConstReal(ctx->f32, -1), "");
ac_build_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
&value, 1, AC_FUNC_ATTR_LEGACY);
}
LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
@@ -2153,20 +2062,6 @@ LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
AC_FUNC_ATTR_READNONE);
}
LLVMValueRef ac_build_imad(struct ac_llvm_context *ctx, LLVMValueRef s0,
LLVMValueRef s1, LLVMValueRef s2)
{
return LLVMBuildAdd(ctx->builder,
LLVMBuildMul(ctx->builder, s0, s1, ""), s2, "");
}
LLVMValueRef ac_build_fmad(struct ac_llvm_context *ctx, LLVMValueRef s0,
LLVMValueRef s1, LLVMValueRef s2)
{
return LLVMBuildFAdd(ctx->builder,
LLVMBuildFMul(ctx->builder, s0, s1, ""), s2, "");
}
void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16)
{
LLVMValueRef args[1] = {
@@ -2204,25 +2099,14 @@ LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0,
LLVMValueRef cmp, val, zero, one;
LLVMTypeRef type;
switch (bitsize) {
case 64:
type = ctx->i64;
zero = ctx->i64_0;
one = ctx->i64_1;
break;
case 32:
if (bitsize == 32) {
type = ctx->i32;
zero = ctx->i32_0;
one = ctx->i32_1;
break;
case 16:
type = ctx->i16;
zero = ctx->i16_0;
one = ctx->i16_1;
break;
default:
unreachable(!"invalid bitsize");
break;
} else {
type = ctx->i64;
zero = ctx->i64_0;
one = ctx->i64_1;
}
cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, zero, "");
@@ -2255,66 +2139,6 @@ LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0,
return val;
}
LLVMValueRef ac_build_bit_count(struct ac_llvm_context *ctx, LLVMValueRef src0)
{
LLVMValueRef result;
unsigned bitsize;
bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
switch (bitsize) {
case 64:
result = ac_build_intrinsic(ctx, "llvm.ctpop.i64", ctx->i64,
(LLVMValueRef []) { src0 }, 1,
AC_FUNC_ATTR_READNONE);
result = LLVMBuildTrunc(ctx->builder, result, ctx->i32, "");
break;
case 32:
result = ac_build_intrinsic(ctx, "llvm.ctpop.i32", ctx->i32,
(LLVMValueRef []) { src0 }, 1,
AC_FUNC_ATTR_READNONE);
break;
case 16:
result = ac_build_intrinsic(ctx, "llvm.ctpop.i16", ctx->i16,
(LLVMValueRef []) { src0 }, 1,
AC_FUNC_ATTR_READNONE);
break;
default:
unreachable(!"invalid bitsize");
break;
}
return result;
}
LLVMValueRef ac_build_bitfield_reverse(struct ac_llvm_context *ctx,
LLVMValueRef src0)
{
LLVMValueRef result;
unsigned bitsize;
bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
switch (bitsize) {
case 32:
result = ac_build_intrinsic(ctx, "llvm.bitreverse.i32", ctx->i32,
(LLVMValueRef []) { src0 }, 1,
AC_FUNC_ATTR_READNONE);
break;
case 16:
result = ac_build_intrinsic(ctx, "llvm.bitreverse.i16", ctx->i16,
(LLVMValueRef []) { src0 }, 1,
AC_FUNC_ATTR_READNONE);
break;
default:
unreachable(!"invalid bitsize");
break;
}
return result;
}
#define AC_EXP_TARGET 0
#define AC_EXP_ENABLED_CHANNELS 1
#define AC_EXP_OUT0 2
@@ -2603,7 +2427,7 @@ void ac_declare_lds_as_pointer(struct ac_llvm_context *ctx)
{
unsigned lds_size = ctx->chip_class >= CIK ? 65536 : 32768;
ctx->lds = LLVMBuildIntToPtr(ctx->builder, ctx->i32_0,
LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), AC_ADDR_SPACE_LDS),
LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), AC_LOCAL_ADDR_SPACE),
"lds");
}
@@ -2630,25 +2454,14 @@ LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
const char *intrin_name;
LLVMTypeRef type;
LLVMValueRef zero;
switch (src0_bitsize) {
case 64:
if (src0_bitsize == 64) {
intrin_name = "llvm.cttz.i64";
type = ctx->i64;
zero = ctx->i64_0;
break;
case 32:
} else {
intrin_name = "llvm.cttz.i32";
type = ctx->i32;
zero = ctx->i32_0;
break;
case 16:
intrin_name = "llvm.cttz.i16";
type = ctx->i16;
zero = ctx->i16_0;
break;
default:
unreachable(!"invalid bitsize");
}
LLVMValueRef params[2] = {
@@ -2663,7 +2476,7 @@ LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
*
* The hardware already implements the correct behavior.
*/
ctx->i1true,
LLVMConstInt(ctx->i1, 1, false),
};
LLVMValueRef lsb = ac_build_intrinsic(ctx, intrin_name, type,
@@ -2685,7 +2498,7 @@ LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
LLVMTypeRef ac_array_in_const_addr_space(LLVMTypeRef elem_type)
{
return LLVMPointerType(LLVMArrayType(elem_type, 0),
AC_ADDR_SPACE_CONST);
AC_CONST_ADDR_SPACE);
}
LLVMTypeRef ac_array_in_const32_addr_space(LLVMTypeRef elem_type)
@@ -2694,7 +2507,7 @@ LLVMTypeRef ac_array_in_const32_addr_space(LLVMTypeRef elem_type)
return ac_array_in_const_addr_space(elem_type);
return LLVMPointerType(LLVMArrayType(elem_type, 0),
AC_ADDR_SPACE_CONST_32BIT);
AC_CONST_32BIT_ADDR_SPACE);
}
static struct ac_llvm_flow *
@@ -2868,7 +2681,7 @@ void ac_build_uif(struct ac_llvm_context *ctx, LLVMValueRef value,
if_cond_emit(ctx, cond, label_id);
}
LLVMValueRef ac_build_alloca_undef(struct ac_llvm_context *ac, LLVMTypeRef type,
LLVMValueRef ac_build_alloca(struct ac_llvm_context *ac, LLVMTypeRef type,
const char *name)
{
LLVMBuilderRef builder = ac->builder;
@@ -2886,15 +2699,18 @@ LLVMValueRef ac_build_alloca_undef(struct ac_llvm_context *ac, LLVMTypeRef type,
}
res = LLVMBuildAlloca(first_builder, type, name);
LLVMBuildStore(builder, LLVMConstNull(type), res);
LLVMDisposeBuilder(first_builder);
return res;
}
LLVMValueRef ac_build_alloca(struct ac_llvm_context *ac,
LLVMValueRef ac_build_alloca_undef(struct ac_llvm_context *ac,
LLVMTypeRef type, const char *name)
{
LLVMValueRef ptr = ac_build_alloca_undef(ac, type, name);
LLVMBuildStore(ac->builder, LLVMConstNull(type), ptr);
LLVMValueRef ptr = ac_build_alloca(ac, type, name);
LLVMBuildStore(ac->builder, LLVMGetUndef(type), ptr);
return ptr;
}
@@ -3437,7 +3253,7 @@ ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src,
unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3)
{
unsigned mask = dpp_quad_perm(lane0, lane1, lane2, lane3);
if (ctx->chip_class >= VI) {
if (ctx->chip_class >= VI && HAVE_LLVM >= 0x0600) {
return ac_build_dpp(ctx, src, src, mask, 0xf, 0xf, false);
} else {
return ac_build_ds_swizzle(ctx, src, (1 << 15) | mask);

View File

@@ -37,20 +37,12 @@ extern "C" {
#define HAVE_32BIT_POINTERS (HAVE_LLVM >= 0x0700)
enum {
AC_ADDR_SPACE_FLAT = HAVE_LLVM >= 0x0700 ? 0 : 4, /* Slower than global. */
AC_ADDR_SPACE_GLOBAL = 1,
AC_ADDR_SPACE_GDS = HAVE_LLVM >= 0x0700 ? 2 : 5,
AC_ADDR_SPACE_LDS = 3,
AC_ADDR_SPACE_CONST = HAVE_LLVM >= 0x0700 ? 4 : 2, /* Global allowing SMEM. */
AC_ADDR_SPACE_CONST_32BIT = 6, /* same as CONST, but the pointer type has 32 bits */
/* CONST is the only address space that selects SMEM loads */
AC_CONST_ADDR_SPACE = HAVE_LLVM >= 0x700 ? 4 : 2,
AC_LOCAL_ADDR_SPACE = 3,
AC_CONST_32BIT_ADDR_SPACE = 6, /* same as CONST, but the pointer type has 32 bits */
};
/* Combine these with & instead of |. */
#define NOOP_WAITCNT 0xcf7f
#define LGKM_CNT 0xc07f
#define EXP_CNT 0xcf0f
#define VM_CNT 0x0f70 /* On GFX9, vmcnt has 6 bits in [0:3] and [14:15] */
struct ac_llvm_flow;
struct ac_llvm_context {
@@ -76,8 +68,6 @@ struct ac_llvm_context {
LLVMTypeRef v4f32;
LLVMTypeRef v8i32;
LLVMValueRef i16_0;
LLVMValueRef i16_1;
LLVMValueRef i32_0;
LLVMValueRef i32_1;
LLVMValueRef i64_0;
@@ -143,7 +133,6 @@ ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type,
unsigned count_incoming, LLVMValueRef *values,
LLVMBasicBlockRef *blocks);
void ac_build_s_barrier(struct ac_llvm_context *ctx);
void ac_build_optimization_barrier(struct ac_llvm_context *ctx,
LLVMValueRef *pvgpr);
@@ -178,30 +167,12 @@ LLVMValueRef ac_build_expand(struct ac_llvm_context *ctx,
LLVMValueRef ac_build_expand_to_vec4(struct ac_llvm_context *ctx,
LLVMValueRef value,
unsigned num_channels);
LLVMValueRef ac_build_round(struct ac_llvm_context *ctx, LLVMValueRef value);
LLVMValueRef
ac_build_fdiv(struct ac_llvm_context *ctx,
LLVMValueRef num,
LLVMValueRef den);
LLVMValueRef ac_build_fast_udiv(struct ac_llvm_context *ctx,
LLVMValueRef num,
LLVMValueRef multiplier,
LLVMValueRef pre_shift,
LLVMValueRef post_shift,
LLVMValueRef increment);
LLVMValueRef ac_build_fast_udiv_nuw(struct ac_llvm_context *ctx,
LLVMValueRef num,
LLVMValueRef multiplier,
LLVMValueRef pre_shift,
LLVMValueRef post_shift,
LLVMValueRef increment);
LLVMValueRef ac_build_fast_udiv_u31_d_not_one(struct ac_llvm_context *ctx,
LLVMValueRef num,
LLVMValueRef multiplier,
LLVMValueRef post_shift);
void
ac_prepare_cube_coords(struct ac_llvm_context *ctx,
bool is_deriv, bool is_array, bool is_lod,
@@ -217,14 +188,6 @@ ac_build_fs_interp(struct ac_llvm_context *ctx,
LLVMValueRef i,
LLVMValueRef j);
LLVMValueRef
ac_build_fs_interp_f16(struct ac_llvm_context *ctx,
LLVMValueRef llvm_chan,
LLVMValueRef attr_number,
LLVMValueRef params,
LLVMValueRef i,
LLVMValueRef j);
LLVMValueRef
ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
LLVMValueRef parameter,
@@ -236,8 +199,6 @@ LLVMValueRef
ac_build_gep0(struct ac_llvm_context *ctx,
LLVMValueRef base_ptr,
LLVMValueRef index);
LLVMValueRef ac_build_pointer_add(struct ac_llvm_context *ctx, LLVMValueRef ptr,
LLVMValueRef index);
void
ac_build_indexed_store(struct ac_llvm_context *ctx,
@@ -250,8 +211,6 @@ LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
LLVMValueRef base_ptr, LLVMValueRef index);
LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
LLVMValueRef base_ptr, LLVMValueRef index);
LLVMValueRef ac_build_load_to_sgpr_uint_wraparound(struct ac_llvm_context *ctx,
LLVMValueRef base_ptr, LLVMValueRef index);
void
ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
@@ -302,8 +261,7 @@ ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
LLVMValueRef vindex,
LLVMValueRef voffset,
LLVMValueRef soffset,
LLVMValueRef immoffset,
LLVMValueRef glc);
LLVMValueRef immoffset);
LLVMValueRef
ac_get_thread_id(struct ac_llvm_context *ctx);
@@ -442,10 +400,6 @@ void ac_build_kill_if_false(struct ac_llvm_context *ctx, LLVMValueRef i1);
LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
LLVMValueRef offset, LLVMValueRef width,
bool is_signed);
LLVMValueRef ac_build_imad(struct ac_llvm_context *ctx, LLVMValueRef s0,
LLVMValueRef s1, LLVMValueRef s2);
LLVMValueRef ac_build_fmad(struct ac_llvm_context *ctx, LLVMValueRef s0,
LLVMValueRef s1, LLVMValueRef s2);
void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16);
@@ -458,11 +412,6 @@ LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0,
LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0,
unsigned bitsize);
LLVMValueRef ac_build_bit_count(struct ac_llvm_context *ctx, LLVMValueRef src0);
LLVMValueRef ac_build_bitfield_reverse(struct ac_llvm_context *ctx,
LLVMValueRef src0);
void ac_optimize_vs_outputs(struct ac_llvm_context *ac,
LLVMValueRef main_fn,
uint8_t *vs_output_param_offset,

View File

@@ -92,7 +92,11 @@ LLVMBuilderRef ac_create_builder(LLVMContextRef ctx,
llvm::unwrap(builder)->setFastMathFlags(flags);
break;
case AC_FLOAT_MODE_UNSAFE_FP_MATH:
#if HAVE_LLVM >= 0x0600
flags.setFast();
#else
flags.setUnsafeAlgebra();
#endif
llvm::unwrap(builder)->setFastMathFlags(flags);
break;
}

View File

@@ -135,8 +135,6 @@ const char *ac_get_llvm_processor_name(enum radeon_family family)
return HAVE_LLVM >= 0x0700 ? "gfx904" : "gfx902";
case CHIP_VEGA20:
return HAVE_LLVM >= 0x0700 ? "gfx906" : "gfx902";
case CHIP_RAVEN2:
return "gfx902"; /* TODO: use gfx909 when it's available */
default:
return "";
}

View File

@@ -311,18 +311,9 @@ static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
}
static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
LLVMValueRef src0,
unsigned bitsize)
LLVMValueRef src0)
{
LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
"");
result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
if (bitsize == 32)
return result;
return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), "");
}
static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
@@ -436,7 +427,7 @@ static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx,
/* FIXME: LLVM 7 returns incorrect result when count is 0.
* https://bugs.freedesktop.org/show_bug.cgi?id=107276
*/
LLVMValueRef zero = ctx->i32_0;
LLVMValueRef zero = LLVMConstInt(ctx->i32, 0, false);
LLVMValueRef icond1 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
LLVMValueRef icond2 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], zero, "");
@@ -495,7 +486,7 @@ static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
LLVMValueRef src0)
{
LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
LLVMValueRef temps[2], val;
LLVMValueRef temps[2], result, val;
int i;
for (i = 0; i < 2; i++) {
@@ -504,7 +495,12 @@ static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
}
return ac_build_gather_values(ctx, temps, 2);
result = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), temps[0],
ctx->i32_0, "");
result = LLVMBuildInsertElement(ctx->builder, result, temps[1],
ctx->i32_1, "");
return result;
}
static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
@@ -845,10 +841,15 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
result = emit_bitfield_insert(&ctx->ac, src[0], src[1], src[2], src[3]);
break;
case nir_op_bitfield_reverse:
result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
result = ac_build_intrinsic(&ctx->ac, "llvm.bitreverse.i32", ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
break;
case nir_op_bit_count:
result = ac_build_bit_count(&ctx->ac, src[0]);
if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 32)
result = ac_build_intrinsic(&ctx->ac, "llvm.ctpop.i32", ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
else {
result = ac_build_intrinsic(&ctx->ac, "llvm.ctpop.i64", ctx->ac.i64, src, 1, AC_FUNC_ATTR_READNONE);
result = LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
}
break;
case nir_op_vec2:
case nir_op_vec3:
@@ -941,7 +942,7 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
break;
case nir_op_b2f:
result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
result = emit_b2f(&ctx->ac, src[0]);
break;
case nir_op_f2b:
result = emit_f2b(&ctx->ac, src[0]);
@@ -1003,7 +1004,10 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
case nir_op_pack_64_2x32_split: {
LLVMValueRef tmp = LLVMGetUndef(ctx->ac.v2i32);
tmp = ac_build_gather_values(&ctx->ac, src, 2);
tmp = LLVMBuildInsertElement(ctx->ac.builder, tmp,
src[0], ctx->ac.i32_0, "");
tmp = LLVMBuildInsertElement(ctx->ac.builder, tmp,
src[1], ctx->ac.i32_1, "");
result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
break;
}
@@ -1401,7 +1405,7 @@ static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
cond = LLVMBuildTrunc(ctx->ac.builder, cond, LLVMInt1Type(), "");
LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
LLVMConstInt(ctx->ac.i32, 4, false)};
@@ -1439,7 +1443,7 @@ static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueR
unsigned start, unsigned count)
{
LLVMValueRef mask[] = {
ctx->i32_0, ctx->i32_1,
LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
unsigned src_elements = ac_get_llvm_num_components(src);
@@ -1465,11 +1469,6 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
LLVMValueRef src_data = get_src(ctx, instr->src[0]);
int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
unsigned writemask = nir_intrinsic_write_mask(instr);
enum gl_access_qualifier access = nir_intrinsic_access(instr);
LLVMValueRef glc = ctx->ac.i1false;
if (access & (ACCESS_VOLATILE | ACCESS_COHERENT))
glc = ctx->ac.i1true;
LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
get_src(ctx, instr->src[1]), true);
@@ -1526,7 +1525,7 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
ctx->ac.i32_0,
LLVMConstInt(ctx->ac.i32, 2, false), // dfmt (= 16bit)
LLVMConstInt(ctx->ac.i32, 4, false), // nfmt (= uint)
glc,
ctx->ac.i1false,
ctx->ac.i1false,
};
ac_build_intrinsic(&ctx->ac, store_name,
@@ -1554,7 +1553,7 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
rsrc,
ctx->ac.i32_0, /* vindex */
offset,
glc,
ctx->ac.i1false, /* glc */
ctx->ac.i1false, /* slc */
};
ac_build_intrinsic(&ctx->ac, store_name,
@@ -1579,7 +1578,7 @@ static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
true);
params[arg_count++] = ctx->ac.i32_0; /* vindex */
params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
params[arg_count++] = ctx->ac.i1false; /* slc */
params[arg_count++] = LLVMConstInt(ctx->ac.i1, 0, false); /* slc */
switch (instr->intrinsic) {
case nir_intrinsic_ssbo_atomic_add:
@@ -1624,11 +1623,6 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
{
int elem_size_bytes = instr->dest.ssa.bit_size / 8;
int num_components = instr->num_components;
enum gl_access_qualifier access = nir_intrinsic_access(instr);
LLVMValueRef glc = ctx->ac.i1false;
if (access & (ACCESS_VOLATILE | ACCESS_COHERENT))
glc = ctx->ac.i1true;
LLVMValueRef offset = get_src(ctx, instr->src[1]);
LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
@@ -1656,8 +1650,7 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
vindex,
offset,
ctx->ac.i32_0,
immoffset,
glc);
immoffset);
} else {
const char *load_name;
LLVMTypeRef data_type;
@@ -1683,7 +1676,7 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
rsrc,
vindex,
LLVMBuildAdd(ctx->ac.builder, offset, immoffset, ""),
glc,
ctx->ac.i1false,
ctx->ac.i1false,
};
ret = ac_build_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
@@ -1727,8 +1720,7 @@ static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
ctx->ac.i32_0,
offset,
ctx->ac.i32_0,
LLVMConstInt(ctx->ac.i32, 2 * i, 0),
ctx->ac.i1false);
LLVMConstInt(ctx->ac.i32, 2 * i, 0));
}
ret = ac_build_gather_values(&ctx->ac, results, num_components);
} else {
@@ -2072,7 +2064,7 @@ visit_store_var(struct ac_nir_context *ctx,
int writemask = instr->const_index[0];
LLVMValueRef address = get_src(ctx, instr->src[0]);
LLVMValueRef val = get_src(ctx, instr->src[1]);
if (writemask == (1u << ac_get_llvm_num_components(val)) - 1) {
if (util_is_power_of_two_nonzero(writemask)) {
val = LLVMBuildBitCast(
ctx->ac.builder, val,
LLVMGetElementType(LLVMTypeOf(address)), "");
@@ -2258,8 +2250,7 @@ static void get_image_coords(struct ac_nir_context *ctx,
fmask_load_address[1],
fmask_load_address[2],
sample_index,
get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
AC_DESC_FMASK, NULL, false, false));
get_image_descriptor(ctx, instr, AC_DESC_FMASK, false));
}
if (count == 1 && !gfx9_1d) {
if (instr->src[1].ssa->num_components)
@@ -2357,7 +2348,7 @@ static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
glsl_sampler_type_is_array(type));
args.dmask = 15;
args.attributes = AC_FUNC_ATTR_READONLY;
if (var->data.image.access & (ACCESS_VOLATILE | ACCESS_COHERENT))
if (var->data.image._volatile || var->data.image.coherent)
args.cache_policy |= ac_glc;
res = ac_build_image_opcode(&ctx->ac, &args);
@@ -2378,27 +2369,17 @@ static void visit_image_store(struct ac_nir_context *ctx,
glc = ctx->ac.i1true;
if (dim == GLSL_SAMPLER_DIM_BUF) {
char name[48];
const char *types[] = { "f32", "v2f32", "v4f32" };
LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true);
LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
unsigned src_channels = ac_get_llvm_num_components(src);
if (src_channels == 3)
src = ac_build_expand(&ctx->ac, src, 3, 4);
params[0] = src; /* data */
params[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3])); /* data */
params[1] = rsrc;
params[2] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
ctx->ac.i32_0, ""); /* vindex */
params[3] = ctx->ac.i32_0; /* voffset */
snprintf(name, sizeof(name), "%s.%s",
"llvm.amdgcn.buffer.store.format",
types[CLAMP(src_channels, 1, 3) - 1]);
params[4] = glc; /* glc */
params[5] = ctx->ac.i1false; /* slc */
ac_build_intrinsic(&ctx->ac, name, ctx->ac.voidt, params, 6, 0);
ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32", ctx->ac.voidt,
params, 6, 0);
} else {
struct ac_image_args args = {};
args.opcode = ac_image_store;
@@ -2408,7 +2389,7 @@ static void visit_image_store(struct ac_nir_context *ctx,
args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
glsl_sampler_type_is_array(type));
args.dmask = 15;
if (force_glc || (var->data.image.access & (ACCESS_VOLATILE | ACCESS_COHERENT)))
if (force_glc || var->data.image._volatile || var->data.image.coherent)
args.cache_policy |= ac_glc;
ac_build_image_opcode(&ctx->ac, &args);
@@ -2562,6 +2543,10 @@ static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
return res;
}
#define NOOP_WAITCNT 0xf7f
#define LGKM_CNT 0x07f
#define VM_CNT 0xf70
static void emit_membar(struct ac_llvm_context *ac,
const nir_intrinsic_instr *instr)
{
@@ -2597,7 +2582,8 @@ void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
return;
}
ac_build_s_barrier(ac);
ac_build_intrinsic(ac, "llvm.amdgcn.s.barrier",
ac->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
}
static void emit_discard(struct ac_nir_context *ctx,
@@ -2611,7 +2597,7 @@ static void emit_discard(struct ac_nir_context *ctx,
ctx->ac.i32_0, "");
} else {
assert(instr->intrinsic == nir_intrinsic_discard);
cond = ctx->ac.i1false;
cond = LLVMConstInt(ctx->ac.i1, false, 0);
}
ctx->abi->emit_kill(ctx->abi, cond);
@@ -2669,7 +2655,7 @@ visit_first_invocation(struct ac_nir_context *ctx)
LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
/* The second argument is whether cttz(0) should be defined, but we do not care. */
LLVMValueRef args[] = {active_set, ctx->ac.i1false};
LLVMValueRef args[] = {active_set, LLVMConstInt(ctx->ac.i1, 0, false)};
LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
"llvm.cttz.i64",
ctx->ac.i64, args, 2,
@@ -2802,16 +2788,15 @@ static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
const nir_intrinsic_instr *instr)
{
LLVMValueRef result[4];
LLVMValueRef interp_param;
LLVMValueRef interp_param, attr_number;
unsigned location;
unsigned chan;
LLVMValueRef src_c0 = NULL;
LLVMValueRef src_c1 = NULL;
LLVMValueRef src0 = NULL;
nir_deref_instr *deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
nir_variable *var = nir_deref_instr_get_variable(deref_instr);
int input_base = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0];
nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
int input_index = var->data.location - VARYING_SLOT_VAR0;
switch (instr->intrinsic) {
case nir_intrinsic_interp_deref_at_centroid:
location = INTERP_CENTROID;
@@ -2841,6 +2826,7 @@ static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
}
interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
attr_number = LLVMConstInt(ctx->ac.i32, input_index, false);
if (location == INTERP_CENTER) {
LLVMValueRef ij_out[2];
@@ -2868,8 +2854,11 @@ static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
ctx->ac.f32, "");
temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
temp1 = LLVMBuildFMul(ctx->ac.builder, ddx_el, src_c0, "");
temp1 = LLVMBuildFAdd(ctx->ac.builder, temp1, interp_el, "");
temp2 = LLVMBuildFMul(ctx->ac.builder, ddy_el, src_c1, "");
temp2 = LLVMBuildFAdd(ctx->ac.builder, temp2, temp1, "");
ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
temp2, ctx->ac.i32, "");
@@ -2878,65 +2867,26 @@ static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
}
LLVMValueRef array_idx = ctx->ac.i32_0;
while(deref_instr->deref_type != nir_deref_type_var) {
if (deref_instr->deref_type == nir_deref_type_array) {
unsigned array_size = glsl_get_aoa_size(deref_instr->type);
if (!array_size)
array_size = 1;
LLVMValueRef offset;
nir_const_value *const_value = nir_src_as_const_value(deref_instr->arr.index);
if (const_value) {
offset = LLVMConstInt(ctx->ac.i32, array_size * const_value->u32[0], false);
} else {
LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
offset = LLVMBuildMul(ctx->ac.builder, indirect,
LLVMConstInt(ctx->ac.i32, array_size, false), "");
}
array_idx = LLVMBuildAdd(ctx->ac.builder, array_idx, offset, "");
deref_instr = nir_src_as_deref(deref_instr->parent);
} else {
unreachable("Unsupported deref type");
}
}
unsigned input_array_size = glsl_get_aoa_size(var->type);
if (!input_array_size)
input_array_size = 1;
for (chan = 0; chan < 4; chan++) {
LLVMValueRef gather = LLVMGetUndef(LLVMVectorType(ctx->ac.f32, input_array_size));
LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
for (unsigned idx = 0; idx < input_array_size; ++idx) {
LLVMValueRef v, attr_number;
attr_number = LLVMConstInt(ctx->ac.i32, input_base + idx, false);
if (interp_param) {
interp_param = LLVMBuildBitCast(ctx->ac.builder,
if (interp_param) {
interp_param = LLVMBuildBitCast(ctx->ac.builder,
interp_param, ctx->ac.v2f32, "");
LLVMValueRef i = LLVMBuildExtractElement(
ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
LLVMValueRef j = LLVMBuildExtractElement(
ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
LLVMValueRef i = LLVMBuildExtractElement(
ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
LLVMValueRef j = LLVMBuildExtractElement(
ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
v = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
ctx->abi->prim_mask, i, j);
} else {
v = ac_build_fs_interp_mov(&ctx->ac, LLVMConstInt(ctx->ac.i32, 2, false),
llvm_chan, attr_number, ctx->abi->prim_mask);
}
gather = LLVMBuildInsertElement(ctx->ac.builder, gather, v,
LLVMConstInt(ctx->ac.i32, idx, false), "");
result[chan] = ac_build_fs_interp(&ctx->ac,
llvm_chan, attr_number,
ctx->abi->prim_mask, i, j);
} else {
result[chan] = ac_build_fs_interp_mov(&ctx->ac,
LLVMConstInt(ctx->ac.i32, 2, false),
llvm_chan, attr_number,
ctx->abi->prim_mask);
}
result[chan] = LLVMBuildExtractElement(ctx->ac.builder, gather, array_idx, "");
}
return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
var->data.location_frac);
@@ -3032,8 +2982,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
ctx->abi->frag_pos[2],
ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
};
result = ac_to_integer(&ctx->ac,
ac_build_gather_values(&ctx->ac, values, 4));
result = ac_build_gather_values(&ctx->ac, values, 4);
break;
}
case nir_intrinsic_load_front_face:
@@ -3380,7 +3329,7 @@ static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
LLVMValueRef coord)
{
coord = ac_to_float(ctx, coord);
coord = ac_build_round(ctx, coord);
coord = ac_build_intrinsic(ctx, "llvm.rint.f32", ctx->f32, &coord, 1, 0);
coord = ac_to_integer(ctx, coord);
return coord;
}
@@ -3500,7 +3449,7 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
* It's unnecessary if the original texture format was
* Z32_FLOAT, but we don't know that here.
*/
if (args.compare && ctx->ac.chip_class >= VI && ctx->abi->clamp_shadow_reference)
if (args.compare && ctx->ac.chip_class == VI && ctx->abi->clamp_shadow_reference)
args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
/* pack derivatives */
@@ -3692,6 +3641,7 @@ static void visit_post_phi(struct ac_nir_context *ctx,
static void phi_post_pass(struct ac_nir_context *ctx)
{
struct hash_entry *entry;
hash_table_foreach(ctx->phis, entry) {
visit_post_phi(ctx, (nir_phi_instr*)entry->key,
(LLVMValueRef)entry->data);
@@ -3891,7 +3841,7 @@ ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
}
}
bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
bool is_16bit = glsl_type_is_16bit(variable->type);
LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
for (unsigned i = 0; i < attrib_count; ++i) {
for (unsigned chan = 0; chan < 4; chan++) {
@@ -3996,7 +3946,7 @@ setup_shared(struct ac_nir_context *ctx,
LLVMAddGlobalInAddressSpace(
ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
variable->name ? variable->name : "",
AC_ADDR_SPACE_LDS);
AC_LOCAL_ADDR_SPACE);
_mesa_hash_table_insert(ctx->vars, variable, shared);
}
}

View File

@@ -77,9 +77,6 @@ struct ac_shader_abi {
*/
LLVMValueRef *inputs;
/* Varying -> attribute number mapping. Also NIR-only */
unsigned fs_input_attr_indices[MAX_VARYING];
void (*emit_outputs)(struct ac_shader_abi *abi,
unsigned max_outputs,
LLVMValueRef *addrs);

View File

@@ -151,10 +151,6 @@ static void addrlib_family_rev_id(enum radeon_family family,
*addrlib_family = FAMILY_RV;
*addrlib_revid = get_first(AMDGPU_RAVEN_RANGE);
break;
case CHIP_RAVEN2:
*addrlib_family = FAMILY_RV;
*addrlib_revid = get_first(AMDGPU_RAVEN2_RANGE);
break;
default:
fprintf(stderr, "amdgpu: Unknown family.\n");
}

View File

@@ -97,7 +97,6 @@ enum radeon_family {
CHIP_VEGA12,
CHIP_VEGA20,
CHIP_RAVEN,
CHIP_RAVEN2,
CHIP_LAST,
};

View File

@@ -4457,9 +4457,6 @@
#define S_028424_OVERWRITE_COMBINER_WATERMARK(x) (((unsigned)(x) & 0x1F) << 2)
#define G_028424_OVERWRITE_COMBINER_WATERMARK(x) (((x) >> 2) & 0x1F)
#define C_028424_OVERWRITE_COMBINER_WATERMARK 0xFFFFFF83
#define S_028424_DISABLE_CONSTANT_ENCODE_REG(x) (((unsigned)(x) & 0x1) << 10) /* Raven2+ */
#define G_028424_DISABLE_CONSTANT_ENCODE_REG(x) (((x) >> 10) & 0x1)
#define C_028424_DISABLE_CONSTANT_ENCODE_REG 0xFFFFFBFF
#define R_02842C_DB_STENCIL_CONTROL 0x02842C
#define S_02842C_STENCILFAIL(x) (((unsigned)(x) & 0x0F) << 0)
#define G_02842C_STENCILFAIL(x) (((x) >> 0) & 0x0F)

View File

@@ -22,7 +22,7 @@ sid_tables_h = custom_target(
'sid_tables_h',
input : ['sid_tables.py', 'sid.h', 'gfx9d.h'],
output : 'sid_tables.h',
command : [prog_python, '@INPUT@'],
command : [prog_python2, '@INPUT@'],
capture : true,
)

View File

@@ -119,7 +119,6 @@
#define STRMOUT_OFFSET_FROM_VGT_FILLED_SIZE 1
#define STRMOUT_OFFSET_FROM_MEM 2
#define STRMOUT_OFFSET_NONE 3
#define STRMOUT_DATA_TYPE(x) (((unsigned)(x) & 0x1) << 7)
#define STRMOUT_SELECT_BUFFER(x) (((unsigned)(x) & 0x3) << 8)
#define PKT3_DRAW_INDEX_OFFSET_2 0x35
#define PKT3_WRITE_DATA 0x37
@@ -145,10 +144,7 @@
#define PKT3_MPEG_INDEX 0x3A /* not on CIK */
#define PKT3_WAIT_REG_MEM 0x3C
#define WAIT_REG_MEM_EQUAL 3
#define WAIT_REG_MEM_NOT_EQUAL 4
#define WAIT_REG_MEM_GREATER_OR_EQUAL 5
#define WAIT_REG_MEM_MEM_SPACE(x) (((unsigned)(x) & 0x3) << 4)
#define WAIT_REG_MEM_PFP (1 << 8)
#define PKT3_MEM_WRITE 0x3D /* not on CIK */
#define PKT3_INDIRECT_BUFFER_CIK 0x3F /* new on CIK */
#define R_3F0_IB_BASE_LO 0x3F0
@@ -163,30 +159,20 @@
#define PKT3_COPY_DATA 0x40
#define COPY_DATA_SRC_SEL(x) ((x) & 0xf)
#define COPY_DATA_REG 0
#define COPY_DATA_SRC_MEM 1 /* only valid as source */
#define COPY_DATA_TC_L2 2
#define COPY_DATA_GDS 3
#define COPY_DATA_MEM 1
#define COPY_DATA_PERF 4
#define COPY_DATA_IMM 5
#define COPY_DATA_TIMESTAMP 9
#define COPY_DATA_DST_SEL(x) (((unsigned)(x) & 0xf) << 8)
#define COPY_DATA_DST_MEM_GRBM 1 /* sync across GRBM, deprecated */
#define COPY_DATA_TC_L2 2
#define COPY_DATA_GDS 3
#define COPY_DATA_PERF 4
#define COPY_DATA_DST_MEM 5
#define COPY_DATA_MEM_ASYNC 5
#define COPY_DATA_COUNT_SEL (1 << 16)
#define COPY_DATA_WR_CONFIRM (1 << 20)
#define COPY_DATA_ENGINE_PFP (1 << 30)
#define PKT3_PFP_SYNC_ME 0x42
#define PKT3_SURFACE_SYNC 0x43 /* deprecated on CIK, use ACQUIRE_MEM */
#define PKT3_ME_INITIALIZE 0x44 /* not on CIK */
#define PKT3_COND_WRITE 0x45
#define PKT3_EVENT_WRITE 0x46
#define PKT3_EVENT_WRITE_EOP 0x47 /* not on GFX9 */
#define EOP_DST_SEL(x) ((x) << 16)
#define EOP_DST_SEL_MEM 0
#define EOP_DST_SEL_TC_L2 1
#define EOP_INT_SEL(x) ((x) << 24)
#define EOP_INT_SEL_NONE 0
#define EOP_INT_SEL_SEND_DATA_AFTER_WR_CONFIRM 3
@@ -195,8 +181,6 @@
#define EOP_DATA_SEL_VALUE_32BIT 1
#define EOP_DATA_SEL_VALUE_64BIT 2
#define EOP_DATA_SEL_TIMESTAMP 3
#define EOP_DATA_SEL_GDS 5
#define EOP_DATA_GDS(dw_offset, num_dwords) ((dw_offset) | ((unsigned)(num_dwords) << 16))
/* CP DMA bug: Any use of CP_DMA.DST_SEL=TC must be avoided when EOS packets
* are used. Use DST_SEL=MC instead. For prefetch, use SRC_SEL=TC and
* DST_SEL=MC. Only CIK chips are affected.
@@ -310,13 +294,11 @@
#define V_500_GDS 1 /* program SAS to 1 as well */
#define V_500_DATA 2
#define V_500_SRC_ADDR_TC_L2 3 /* new for CIK */
#define S_500_DST_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 25) /* CIK+ */
#define S_500_DST_SEL(x) (((unsigned)(x) & 0x3) << 20)
#define V_500_DST_ADDR 0
#define V_500_GDS 1 /* program DAS to 1 as well */
#define V_500_NOWHERE 2 /* new for GFX9 */
#define V_500_DST_ADDR_TC_L2 3 /* new for CIK */
#define S_500_SRC_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 13) /* CIK+ */
#define S_500_ENGINE(x) ((x) & 0x1)
#define V_500_ME 0
#define V_500_PFP 1
@@ -5300,22 +5282,6 @@
#define S_02820C_CLIP_RULE(x) (((unsigned)(x) & 0xFFFF) << 0)
#define G_02820C_CLIP_RULE(x) (((x) >> 0) & 0xFFFF)
#define C_02820C_CLIP_RULE 0xFFFF0000
#define V_02820C_OUT 0x0001
#define V_02820C_IN_0 0x0002
#define V_02820C_IN_1 0x0004
#define V_02820C_IN_10 0x0008
#define V_02820C_IN_2 0x0010
#define V_02820C_IN_20 0x0020
#define V_02820C_IN_21 0x0040
#define V_02820C_IN_210 0x0080
#define V_02820C_IN_3 0x0100
#define V_02820C_IN_30 0x0200
#define V_02820C_IN_31 0x0400
#define V_02820C_IN_310 0x0800
#define V_02820C_IN_32 0x1000
#define V_02820C_IN_320 0x2000
#define V_02820C_IN_321 0x4000
#define V_02820C_IN_3210 0x8000
#define R_028210_PA_SC_CLIPRECT_0_TL 0x028210
#define S_028210_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0)
#define G_028210_TL_X(x) (((x) >> 0) & 0x7FFF)
@@ -9156,10 +9122,6 @@
#define CIK_SDMA_PACKET_TRAP 0x6
#define CIK_SDMA_PACKET_SEMAPHORE 0x7
#define CIK_SDMA_PACKET_CONSTANT_FILL 0xb
#define CIK_SDMA_OPCODE_TIMESTAMP 0xd
#define SDMA_TS_SUB_OPCODE_SET_LOCAL_TIMESTAMP 0x0
#define SDMA_TS_SUB_OPCODE_GET_LOCAL_TIMESTAMP 0x1
#define SDMA_TS_SUB_OPCODE_GET_GLOBAL_TIMESTAMP 0x2
#define CIK_SDMA_PACKET_SRBM_WRITE 0xe
/* There is apparently an undocumented HW "feature" that
prevents the HW from copying past 256 bytes of (1 << 22) */

View File

@@ -74,8 +74,7 @@ LOCAL_C_INCLUDES := \
$(call generated-sources-dir-for,STATIC_LIBRARIES,libmesa_vulkan_util,,)/util
LOCAL_WHOLE_STATIC_LIBRARIES := \
libmesa_vulkan_util \
libmesa_git_sha1
libmesa_vulkan_util
LOCAL_GENERATED_SOURCES += $(intermediates)/radv_entrypoints.c
LOCAL_GENERATED_SOURCES += $(intermediates)/radv_entrypoints.h

View File

@@ -140,7 +140,7 @@ vulkan_api_xml = $(top_srcdir)/src/vulkan/registry/vk.xml
radv_entrypoints.c: radv_entrypoints_gen.py radv_extensions.py $(vulkan_api_xml)
$(MKDIR_GEN)
$(AM_V_GEN)$(PYTHON) $(srcdir)/radv_entrypoints_gen.py \
$(AM_V_GEN)$(PYTHON2) $(srcdir)/radv_entrypoints_gen.py \
--xml $(vulkan_api_xml) \
--outdir $(builddir)
radv_entrypoints.h: radv_entrypoints.c
@@ -148,7 +148,7 @@ radv_entrypoints.h: radv_entrypoints.c
radv_extensions.c: radv_extensions.py \
$(vulkan_api_xml)
$(MKDIR_GEN)
$(AM_V_GEN)$(PYTHON) $(srcdir)/radv_extensions.py \
$(AM_V_GEN)$(PYTHON2) $(srcdir)/radv_extensions.py \
--xml $(vulkan_api_xml) \
--out-c radv_extensions.c \
--out-h radv_extensions.h
@@ -157,7 +157,7 @@ radv_extensions.h: radv_extensions.c
vk_format_table.c: vk_format_table.py \
vk_format_parse.py \
vk_format_layout.csv
$(PYTHON) $(srcdir)/vk_format_table.py $(srcdir)/vk_format_layout.csv > $@
$(PYTHON2) $(srcdir)/vk_format_table.py $(srcdir)/vk_format_layout.csv > $@
BUILT_SOURCES = $(VULKAN_GENERATED_FILES)
CLEANFILES = $(BUILT_SOURCES) dev_icd.json radeon_icd.@host_cpu@.json
@@ -190,11 +190,11 @@ icdconf_DATA = radeon_icd.@host_cpu@.json
noinst_DATA = dev_icd.json
dev_icd.json : radv_extensions.py radv_icd.py
$(AM_V_GEN)$(PYTHON) $(srcdir)/radv_icd.py \
$(AM_V_GEN)$(PYTHON2) $(srcdir)/radv_icd.py \
--lib-path="${abs_top_builddir}/${LIB_DIR}" --out $@
radeon_icd.@host_cpu@.json : radv_extensions.py radv_icd.py
$(AM_V_GEN)$(PYTHON) $(srcdir)/radv_icd.py \
$(AM_V_GEN)$(PYTHON2) $(srcdir)/radv_icd.py \
--lib-path="${libdir}" --out $@
include $(top_srcdir)/install-lib-links.mk

View File

@@ -23,7 +23,7 @@ radv_entrypoints = custom_target(
input : ['radv_entrypoints_gen.py', vk_api_xml],
output : ['radv_entrypoints.h', 'radv_entrypoints.c'],
command : [
prog_python, '@INPUT0@', '--xml', '@INPUT1@', '--outdir',
prog_python2, '@INPUT0@', '--xml', '@INPUT1@', '--outdir',
meson.current_build_dir()
],
depend_files : files('radv_extensions.py'),
@@ -34,7 +34,7 @@ radv_extensions_c = custom_target(
input : ['radv_extensions.py', vk_api_xml],
output : ['radv_extensions.c', 'radv_extensions.h'],
command : [
prog_python, '@INPUT0@', '--xml', '@INPUT1@', '--out-c', '@OUTPUT0@',
prog_python2, '@INPUT0@', '--xml', '@INPUT1@', '--out-c', '@OUTPUT0@',
'--out-h', '@OUTPUT1@'
],
)
@@ -43,7 +43,7 @@ vk_format_table_c = custom_target(
'vk_format_table.c',
input : ['vk_format_table.py', 'vk_format_layout.csv'],
output : 'vk_format_table.c',
command : [prog_python, '@INPUT@'],
command : [prog_python2, '@INPUT@'],
depend_files : files('vk_format_parse.py'),
capture : true,
)
@@ -129,7 +129,7 @@ endif
libvulkan_radeon = shared_library(
'vulkan_radeon',
[libradv_files, radv_entrypoints, radv_extensions_c, vk_format_table_c, sha1_h],
[libradv_files, radv_entrypoints, radv_extensions_c, vk_format_table_c],
include_directories : [
inc_common, inc_amd, inc_amd_common, inc_compiler, inc_vulkan_util,
inc_vulkan_wsi,
@@ -154,7 +154,7 @@ radeon_icd = custom_target(
input : 'radv_icd.py',
output : 'radeon_icd.@0@.json'.format(host_machine.cpu()),
command : [
prog_python, '@INPUT@',
prog_python2, '@INPUT@',
'--lib-path', join_paths(get_option('prefix'), get_option('libdir')),
'--out', '@OUTPUT@',
],
@@ -169,7 +169,7 @@ radv_dev_icd = custom_target(
input : 'radv_icd.py',
output : 'dev_icd.json',
command : [
prog_python, '@INPUT@', '--lib-path', meson.current_build_dir(),
prog_python2, '@INPUT@', '--lib-path', meson.current_build_dir(),
'--out', '@OUTPUT@'
],
depend_files : files('radv_extensions.py'),

View File

@@ -196,23 +196,6 @@ radv_bind_dynamic_state(struct radv_cmd_buffer *cmd_buffer,
cmd_buffer->state.dirty |= dest_mask;
}
static void
radv_bind_streamout_state(struct radv_cmd_buffer *cmd_buffer,
struct radv_pipeline *pipeline)
{
struct radv_streamout_state *so = &cmd_buffer->state.streamout;
struct radv_shader_info *info;
if (!pipeline->streamout_shader)
return;
info = &pipeline->streamout_shader->info.info;
for (int i = 0; i < MAX_SO_BUFFERS; i++)
so->stride_in_dw[i] = info->so.strides[i];
so->enabled_stream_buffers_mask = info->so.enabled_stream_buffers_mask;
}
bool radv_cmd_buffer_uses_mec(struct radv_cmd_buffer *cmd_buffer)
{
return cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE &&
@@ -338,13 +321,13 @@ radv_reset_cmd_buffer(struct radv_cmd_buffer *cmd_buffer)
unsigned eop_bug_offset;
void *fence_ptr;
radv_cmd_buffer_upload_alloc(cmd_buffer, 8, 8,
radv_cmd_buffer_upload_alloc(cmd_buffer, 8, 0,
&cmd_buffer->gfx9_fence_offset,
&fence_ptr);
cmd_buffer->gfx9_fence_bo = cmd_buffer->upload.upload_bo;
/* Allocate a buffer for the EOP bug on GFX9. */
radv_cmd_buffer_upload_alloc(cmd_buffer, 16 * num_db, 8,
radv_cmd_buffer_upload_alloc(cmd_buffer, 16 * num_db, 0,
&eop_bug_offset, &fence_ptr);
cmd_buffer->gfx9_eop_bug_va =
radv_buffer_get_va(cmd_buffer->upload.upload_bo);
@@ -414,8 +397,6 @@ radv_cmd_buffer_upload_alloc(struct radv_cmd_buffer *cmd_buffer,
unsigned *out_offset,
void **ptr)
{
assert(util_is_power_of_two_nonzero(alignment));
uint64_t offset = align(cmd_buffer->upload.offset, alignment);
if (offset + size > cmd_buffer->upload.size) {
if (!radv_cmd_buffer_resize_upload_buf(cmd_buffer, size))
@@ -1344,7 +1325,7 @@ radv_load_ds_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
++reg_count;
radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_SRC_MEM) |
radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_MEM) |
COPY_DATA_DST_SEL(COPY_DATA_REG) |
(reg_count == 2 ? COPY_DATA_COUNT_SEL : 0));
radeon_emit(cs, va);
@@ -1474,7 +1455,7 @@ radv_load_color_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
uint32_t reg = R_028C8C_CB_COLOR0_CLEAR_WORD0 + cb_idx * 0x3c;
radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, cmd_buffer->state.predicating));
radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_SRC_MEM) |
radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_MEM) |
COPY_DATA_DST_SEL(COPY_DATA_REG) |
COPY_DATA_COUNT_SEL);
radeon_emit(cs, va);
@@ -1922,96 +1903,10 @@ radv_flush_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer,
cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_VERTEX_BUFFER;
}
static void
radv_emit_streamout_buffers(struct radv_cmd_buffer *cmd_buffer, uint64_t va)
{
struct radv_pipeline *pipeline = cmd_buffer->state.pipeline;
struct radv_userdata_info *loc;
uint32_t base_reg;
for (unsigned stage = 0; stage < MESA_SHADER_STAGES; ++stage) {
if (!radv_get_shader(pipeline, stage))
continue;
loc = radv_lookup_user_sgpr(pipeline, stage,
AC_UD_STREAMOUT_BUFFERS);
if (loc->sgpr_idx == -1)
continue;
base_reg = pipeline->user_data_0[stage];
radv_emit_shader_pointer(cmd_buffer->device, cmd_buffer->cs,
base_reg + loc->sgpr_idx * 4, va, false);
}
if (pipeline->gs_copy_shader) {
loc = &pipeline->gs_copy_shader->info.user_sgprs_locs.shader_data[AC_UD_STREAMOUT_BUFFERS];
if (loc->sgpr_idx != -1) {
base_reg = R_00B130_SPI_SHADER_USER_DATA_VS_0;
radv_emit_shader_pointer(cmd_buffer->device, cmd_buffer->cs,
base_reg + loc->sgpr_idx * 4, va, false);
}
}
}
static void
radv_flush_streamout_descriptors(struct radv_cmd_buffer *cmd_buffer)
{
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_STREAMOUT_BUFFER) {
struct radv_streamout_binding *sb = cmd_buffer->streamout_bindings;
struct radv_streamout_state *so = &cmd_buffer->state.streamout;
unsigned so_offset;
void *so_ptr;
uint64_t va;
/* Allocate some descriptor state for streamout buffers. */
if (!radv_cmd_buffer_upload_alloc(cmd_buffer,
MAX_SO_BUFFERS * 16, 256,
&so_offset, &so_ptr))
return;
for (uint32_t i = 0; i < MAX_SO_BUFFERS; i++) {
struct radv_buffer *buffer = sb[i].buffer;
uint32_t *desc = &((uint32_t *)so_ptr)[i * 4];
if (!(so->enabled_mask & (1 << i)))
continue;
va = radv_buffer_get_va(buffer->bo) + buffer->offset;
va += sb[i].offset;
/* Set the descriptor.
*
* On VI, the format must be non-INVALID, otherwise
* the buffer will be considered not bound and store
* instructions will be no-ops.
*/
desc[0] = va;
desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32);
desc[2] = 0xffffffff;
desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
}
va = radv_buffer_get_va(cmd_buffer->upload.upload_bo);
va += so_offset;
radv_emit_streamout_buffers(cmd_buffer, va);
}
cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_STREAMOUT_BUFFER;
}
static void
radv_upload_graphics_shader_descriptors(struct radv_cmd_buffer *cmd_buffer, bool pipeline_is_dirty)
{
radv_flush_vertex_descriptors(cmd_buffer, pipeline_is_dirty);
radv_flush_streamout_descriptors(cmd_buffer);
radv_flush_descriptors(cmd_buffer, VK_SHADER_STAGE_ALL_GRAPHICS);
radv_flush_constants(cmd_buffer, VK_SHADER_STAGE_ALL_GRAPHICS);
}
@@ -2102,8 +1997,7 @@ static void radv_stage_flush(struct radv_cmd_buffer *cmd_buffer,
VK_PIPELINE_STAGE_VERTEX_SHADER_BIT |
VK_PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT |
VK_PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT |
VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT |
VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT)) {
VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT)) {
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VS_PARTIAL_FLUSH;
}
}
@@ -2127,8 +2021,6 @@ radv_src_access_flush(struct radv_cmd_buffer *cmd_buffer,
for_each_bit(b, src_flags) {
switch ((VkAccessFlagBits)(1 << b)) {
case VK_ACCESS_SHADER_WRITE_BIT:
case VK_ACCESS_TRANSFORM_FEEDBACK_WRITE_BIT_EXT:
case VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT:
flush_bits |= RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2;
break;
case VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT:
@@ -2166,7 +2058,6 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer,
bool flush_CB_meta = true, flush_DB_meta = true;
enum radv_cmd_flush_bits flush_bits = 0;
bool flush_CB = true, flush_DB = true;
bool image_is_coherent = false;
uint32_t b;
if (image) {
@@ -2179,42 +2070,23 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer,
flush_CB_meta = false;
if (!radv_image_has_htile(image))
flush_DB_meta = false;
if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
if (image->info.samples == 1 &&
(image->usage & (VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) &&
!vk_format_is_stencil(image->vk_format)) {
/* Single-sample color and single-sample depth
* (not stencil) are coherent with shaders on
* GFX9.
*/
image_is_coherent = true;
}
}
}
for_each_bit(b, dst_flags) {
switch ((VkAccessFlagBits)(1 << b)) {
case VK_ACCESS_INDIRECT_COMMAND_READ_BIT:
case VK_ACCESS_INDEX_READ_BIT:
case VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT:
break;
case VK_ACCESS_UNIFORM_READ_BIT:
flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 | RADV_CMD_FLAG_INV_SMEM_L1;
break;
case VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT:
case VK_ACCESS_SHADER_READ_BIT:
case VK_ACCESS_TRANSFER_READ_BIT:
case VK_ACCESS_INPUT_ATTACHMENT_READ_BIT:
flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 |
RADV_CMD_FLAG_INV_GLOBAL_L2;
break;
case VK_ACCESS_SHADER_READ_BIT:
flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1;
if (!image_is_coherent)
flush_bits |= RADV_CMD_FLAG_INV_GLOBAL_L2;
break;
case VK_ACCESS_COLOR_ATTACHMENT_READ_BIT:
if (flush_CB)
flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
@@ -2435,6 +2307,20 @@ VkResult radv_ResetCommandBuffer(
return radv_reset_cmd_buffer(cmd_buffer);
}
static void emit_gfx_buffer_state(struct radv_cmd_buffer *cmd_buffer)
{
struct radv_device *device = cmd_buffer->device;
if (device->gfx_init) {
uint64_t va = radv_buffer_get_va(device->gfx_init);
radv_cs_add_buffer(device->ws, cmd_buffer->cs, device->gfx_init);
radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDIRECT_BUFFER_CIK, 2, 0));
radeon_emit(cmd_buffer->cs, va);
radeon_emit(cmd_buffer->cs, va >> 32);
radeon_emit(cmd_buffer->cs, device->gfx_init_size_dw & 0xffff);
} else
si_init_config(cmd_buffer);
}
VkResult radv_BeginCommandBuffer(
VkCommandBuffer commandBuffer,
const VkCommandBufferBeginInfo *pBeginInfo)
@@ -2460,6 +2346,21 @@ VkResult radv_BeginCommandBuffer(
cmd_buffer->state.predication_type = -1;
cmd_buffer->usage_flags = pBeginInfo->flags;
/* setup initial configuration into command buffer */
if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) {
switch (cmd_buffer->queue_family_index) {
case RADV_QUEUE_GENERAL:
emit_gfx_buffer_state(cmd_buffer);
break;
case RADV_QUEUE_COMPUTE:
si_init_compute(cmd_buffer);
break;
case RADV_QUEUE_TRANSFER:
default:
break;
}
}
if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY &&
(pBeginInfo->flags & VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT)) {
assert(pBeginInfo->pInheritanceInfo);
@@ -2853,7 +2754,6 @@ void radv_CmdBindPipeline(
cmd_buffer->state.prefetch_L2_mask |= RADV_PREFETCH_SHADERS;
radv_bind_dynamic_state(cmd_buffer, &pipeline->dynamic_state);
radv_bind_streamout_state(cmd_buffer, pipeline);
if (pipeline->graphics.esgs_ring_size > cmd_buffer->esgs_ring_size_needed)
cmd_buffer->esgs_ring_size_needed = pipeline->graphics.esgs_ring_size;
@@ -3276,13 +3176,12 @@ static void radv_emit_view_index(struct radv_cmd_buffer *cmd_buffer, unsigned in
static void
radv_cs_emit_draw_packet(struct radv_cmd_buffer *cmd_buffer,
uint32_t vertex_count,
bool use_opaque)
uint32_t vertex_count)
{
radeon_emit(cmd_buffer->cs, PKT3(PKT3_DRAW_INDEX_AUTO, 1, cmd_buffer->state.predicating));
radeon_emit(cmd_buffer->cs, vertex_count);
radeon_emit(cmd_buffer->cs, V_0287F0_DI_SRC_SEL_AUTO_INDEX |
S_0287F0_USE_OPAQUE(use_opaque));
S_0287F0_USE_OPAQUE(0));
}
static void
@@ -3386,12 +3285,6 @@ struct radv_draw_info {
*/
struct radv_buffer *count_buffer;
uint64_t count_buffer_offset;
/**
* Stream output parameters resource.
*/
struct radv_buffer *strmout_buffer;
uint64_t strmout_buffer_offset;
};
static void
@@ -3402,27 +3295,6 @@ radv_emit_draw_packets(struct radv_cmd_buffer *cmd_buffer,
struct radeon_winsys *ws = cmd_buffer->device->ws;
struct radeon_cmdbuf *cs = cmd_buffer->cs;
if (info->strmout_buffer) {
uint64_t va = radv_buffer_get_va(info->strmout_buffer->bo);
va += info->strmout_buffer->offset +
info->strmout_buffer_offset;
radeon_set_context_reg(cs, R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE,
info->stride);
radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_SRC_MEM) |
COPY_DATA_DST_SEL(COPY_DATA_REG) |
COPY_DATA_WR_CONFIRM);
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
radeon_emit(cs, R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE >> 2);
radeon_emit(cs, 0); /* unused */
radv_cs_add_buffer(ws, cs, info->strmout_buffer->bo);
}
if (info->indirect) {
uint64_t va = radv_buffer_get_va(info->indirect->bo);
uint64_t count_va = 0;
@@ -3507,17 +3379,14 @@ radv_emit_draw_packets(struct radv_cmd_buffer *cmd_buffer,
}
} else {
if (!state->subpass->view_mask) {
radv_cs_emit_draw_packet(cmd_buffer,
info->count,
!!info->strmout_buffer);
radv_cs_emit_draw_packet(cmd_buffer, info->count);
} else {
unsigned i;
for_each_bit(i, state->subpass->view_mask) {
radv_emit_view_index(cmd_buffer, i);
radv_cs_emit_draw_packet(cmd_buffer,
info->count,
!!info->strmout_buffer);
info->count);
}
}
}
@@ -3550,13 +3419,8 @@ static bool radv_need_late_scissor_emission(struct radv_cmd_buffer *cmd_buffer,
uint32_t used_states = cmd_buffer->state.pipeline->graphics.needed_dynamic_state | ~RADV_CMD_DIRTY_DYNAMIC_ALL;
/* Index, vertex and streamout buffers don't change context regs, and
* pipeline is handled later.
*/
used_states &= ~(RADV_CMD_DIRTY_INDEX_BUFFER |
RADV_CMD_DIRTY_VERTEX_BUFFER |
RADV_CMD_DIRTY_STREAMOUT_BUFFER |
RADV_CMD_DIRTY_PIPELINE);
/* Index & Vertex buffer don't change context regs, and pipeline is handled later. */
used_states &= ~(RADV_CMD_DIRTY_INDEX_BUFFER | RADV_CMD_DIRTY_VERTEX_BUFFER | RADV_CMD_DIRTY_PIPELINE);
/* Assume all state changes except these two can imply context rolls. */
if (cmd_buffer->state.dirty & used_states)
@@ -3616,8 +3480,6 @@ static void
radv_draw(struct radv_cmd_buffer *cmd_buffer,
const struct radv_draw_info *info)
{
struct radeon_info *rad_info =
&cmd_buffer->device->physical_device->rad_info;
bool has_prefetch =
cmd_buffer->device->physical_device->rad_info.chip_class >= CIK;
bool pipeline_is_dirty =
@@ -3687,16 +3549,6 @@ radv_draw(struct radv_cmd_buffer *cmd_buffer,
}
}
/* Workaround for a VGT hang when streamout is enabled.
* It must be done after drawing.
*/
if (cmd_buffer->state.streamout.streamout_enabled &&
(rad_info->family == CHIP_HAWAII ||
rad_info->family == CHIP_TONGA ||
rad_info->family == CHIP_FIJI)) {
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VGT_STREAMOUT_SYNC;
}
assert(cmd_buffer->cs->cdw <= cdw_max);
radv_cmd_buffer_after_draw(cmd_buffer, RADV_CMD_FLAG_PS_PARTIAL_FLUSH);
}
@@ -3927,7 +3779,7 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer,
if (loc->sgpr_idx != -1) {
for (unsigned i = 0; i < 3; ++i) {
radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_SRC_MEM) |
radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_MEM) |
COPY_DATA_DST_SEL(COPY_DATA_REG));
radeon_emit(cs, (va + 4 * i));
radeon_emit(cs, (va + 4 * i) >> 32);
@@ -4245,15 +4097,10 @@ static void radv_handle_depth_image_transition(struct radv_cmd_buffer *cmd_buffe
if (!radv_image_has_htile(image))
return;
if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED) {
uint32_t clear_value = vk_format_is_stencil(image->vk_format) ? 0xfffff30f : 0xfffc000f;
if (radv_layout_is_htile_compressed(image, dst_layout,
dst_queue_mask)) {
clear_value = 0;
}
radv_initialize_htile(cmd_buffer, image, range, clear_value);
if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED &&
radv_layout_has_htile(image, dst_layout, dst_queue_mask)) {
/* TODO: merge with the clear if applicable */
radv_initialize_htile(cmd_buffer, image, range, 0);
} else if (!radv_layout_is_htile_compressed(image, src_layout, src_queue_mask) &&
radv_layout_is_htile_compressed(image, dst_layout, dst_queue_mask)) {
uint32_t clear_value = vk_format_is_stencil(image->vk_format) ? 0xfffff30f : 0xfffc000f;
@@ -4664,8 +4511,6 @@ void radv_CmdBeginConditionalRenderingEXT(
draw_visible = false;
}
si_emit_cache_flush(cmd_buffer);
/* Enable predication for this command buffer. */
si_emit_set_predication_state(cmd_buffer, draw_visible, va);
cmd_buffer->state.predicating = true;
@@ -4688,233 +4533,3 @@ void radv_CmdEndConditionalRenderingEXT(
cmd_buffer->state.predication_type = -1;
cmd_buffer->state.predication_va = 0;
}
/* VK_EXT_transform_feedback */
void radv_CmdBindTransformFeedbackBuffersEXT(
VkCommandBuffer commandBuffer,
uint32_t firstBinding,
uint32_t bindingCount,
const VkBuffer* pBuffers,
const VkDeviceSize* pOffsets,
const VkDeviceSize* pSizes)
{
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
struct radv_streamout_binding *sb = cmd_buffer->streamout_bindings;
uint8_t enabled_mask = 0;
assert(firstBinding + bindingCount <= MAX_SO_BUFFERS);
for (uint32_t i = 0; i < bindingCount; i++) {
uint32_t idx = firstBinding + i;
sb[idx].buffer = radv_buffer_from_handle(pBuffers[i]);
sb[idx].offset = pOffsets[i];
sb[idx].size = pSizes[i];
radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs,
sb[idx].buffer->bo);
enabled_mask |= 1 << idx;
}
cmd_buffer->state.streamout.enabled_mask |= enabled_mask;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_STREAMOUT_BUFFER;
}
static void
radv_emit_streamout_enable(struct radv_cmd_buffer *cmd_buffer)
{
struct radv_streamout_state *so = &cmd_buffer->state.streamout;
struct radeon_cmdbuf *cs = cmd_buffer->cs;
radeon_set_context_reg_seq(cs, R_028B94_VGT_STRMOUT_CONFIG, 2);
radeon_emit(cs,
S_028B94_STREAMOUT_0_EN(so->streamout_enabled) |
S_028B94_RAST_STREAM(0) |
S_028B94_STREAMOUT_1_EN(so->streamout_enabled) |
S_028B94_STREAMOUT_2_EN(so->streamout_enabled) |
S_028B94_STREAMOUT_3_EN(so->streamout_enabled));
radeon_emit(cs, so->hw_enabled_mask &
so->enabled_stream_buffers_mask);
}
static void
radv_set_streamout_enable(struct radv_cmd_buffer *cmd_buffer, bool enable)
{
struct radv_streamout_state *so = &cmd_buffer->state.streamout;
bool old_streamout_enabled = so->streamout_enabled;
uint32_t old_hw_enabled_mask = so->hw_enabled_mask;
so->streamout_enabled = enable;
so->hw_enabled_mask = so->enabled_mask |
(so->enabled_mask << 4) |
(so->enabled_mask << 8) |
(so->enabled_mask << 12);
if ((old_streamout_enabled != so->streamout_enabled) ||
(old_hw_enabled_mask != so->hw_enabled_mask))
radv_emit_streamout_enable(cmd_buffer);
}
static void radv_flush_vgt_streamout(struct radv_cmd_buffer *cmd_buffer)
{
struct radeon_cmdbuf *cs = cmd_buffer->cs;
unsigned reg_strmout_cntl;
/* The register is at different places on different ASICs. */
if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) {
reg_strmout_cntl = R_0300FC_CP_STRMOUT_CNTL;
radeon_set_uconfig_reg(cs, reg_strmout_cntl, 0);
} else {
reg_strmout_cntl = R_0084FC_CP_STRMOUT_CNTL;
radeon_set_config_reg(cs, reg_strmout_cntl, 0);
}
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH) | EVENT_INDEX(0));
radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, 0));
radeon_emit(cs, WAIT_REG_MEM_EQUAL); /* wait until the register is equal to the reference value */
radeon_emit(cs, reg_strmout_cntl >> 2); /* register */
radeon_emit(cs, 0);
radeon_emit(cs, S_0084FC_OFFSET_UPDATE_DONE(1)); /* reference value */
radeon_emit(cs, S_0084FC_OFFSET_UPDATE_DONE(1)); /* mask */
radeon_emit(cs, 4); /* poll interval */
}
void radv_CmdBeginTransformFeedbackEXT(
VkCommandBuffer commandBuffer,
uint32_t firstCounterBuffer,
uint32_t counterBufferCount,
const VkBuffer* pCounterBuffers,
const VkDeviceSize* pCounterBufferOffsets)
{
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
struct radv_streamout_binding *sb = cmd_buffer->streamout_bindings;
struct radv_streamout_state *so = &cmd_buffer->state.streamout;
struct radeon_cmdbuf *cs = cmd_buffer->cs;
uint32_t i;
radv_flush_vgt_streamout(cmd_buffer);
assert(firstCounterBuffer + counterBufferCount <= MAX_SO_BUFFERS);
for_each_bit(i, so->enabled_mask) {
int32_t counter_buffer_idx = i - firstCounterBuffer;
if (counter_buffer_idx >= 0 && counter_buffer_idx >= counterBufferCount)
counter_buffer_idx = -1;
/* SI binds streamout buffers as shader resources.
* VGT only counts primitives and tells the shader through
* SGPRs what to do.
*/
radeon_set_context_reg_seq(cs, R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 + 16*i, 2);
radeon_emit(cs, sb[i].size >> 2); /* BUFFER_SIZE (in DW) */
radeon_emit(cs, so->stride_in_dw[i]); /* VTX_STRIDE (in DW) */
if (counter_buffer_idx >= 0 && pCounterBuffers && pCounterBuffers[counter_buffer_idx]) {
/* The array of counter buffers is optional. */
RADV_FROM_HANDLE(radv_buffer, buffer, pCounterBuffers[counter_buffer_idx]);
uint64_t va = radv_buffer_get_va(buffer->bo);
va += buffer->offset + pCounterBufferOffsets[counter_buffer_idx];
/* Append */
radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
radeon_emit(cs, STRMOUT_SELECT_BUFFER(i) |
STRMOUT_DATA_TYPE(1) | /* offset in bytes */
STRMOUT_OFFSET_SOURCE(STRMOUT_OFFSET_FROM_MEM)); /* control */
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, va); /* src address lo */
radeon_emit(cs, va >> 32); /* src address hi */
radv_cs_add_buffer(cmd_buffer->device->ws, cs, buffer->bo);
} else {
/* Start from the beginning. */
radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
radeon_emit(cs, STRMOUT_SELECT_BUFFER(i) |
STRMOUT_DATA_TYPE(1) | /* offset in bytes */
STRMOUT_OFFSET_SOURCE(STRMOUT_OFFSET_FROM_PACKET)); /* control */
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, 0); /* unused */
}
}
radv_set_streamout_enable(cmd_buffer, true);
}
void radv_CmdEndTransformFeedbackEXT(
VkCommandBuffer commandBuffer,
uint32_t firstCounterBuffer,
uint32_t counterBufferCount,
const VkBuffer* pCounterBuffers,
const VkDeviceSize* pCounterBufferOffsets)
{
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
struct radv_streamout_state *so = &cmd_buffer->state.streamout;
struct radeon_cmdbuf *cs = cmd_buffer->cs;
uint32_t i;
radv_flush_vgt_streamout(cmd_buffer);
assert(firstCounterBuffer + counterBufferCount <= MAX_SO_BUFFERS);
for_each_bit(i, so->enabled_mask) {
int32_t counter_buffer_idx = i - firstCounterBuffer;
if (counter_buffer_idx >= 0 && counter_buffer_idx >= counterBufferCount)
counter_buffer_idx = -1;
if (counter_buffer_idx >= 0 && pCounterBuffers && pCounterBuffers[counter_buffer_idx]) {
/* The array of counters buffer is optional. */
RADV_FROM_HANDLE(radv_buffer, buffer, pCounterBuffers[counter_buffer_idx]);
uint64_t va = radv_buffer_get_va(buffer->bo);
va += buffer->offset + pCounterBufferOffsets[counter_buffer_idx];
radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
radeon_emit(cs, STRMOUT_SELECT_BUFFER(i) |
STRMOUT_DATA_TYPE(1) | /* offset in bytes */
STRMOUT_OFFSET_SOURCE(STRMOUT_OFFSET_NONE) |
STRMOUT_STORE_BUFFER_FILLED_SIZE); /* control */
radeon_emit(cs, va); /* dst address lo */
radeon_emit(cs, va >> 32); /* dst address hi */
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, 0); /* unused */
radv_cs_add_buffer(cmd_buffer->device->ws, cs, buffer->bo);
}
/* Deactivate transform feedback by zeroing the buffer size.
* The counters (primitives generated, primitives emitted) may
* be enabled even if there is not buffer bound. This ensures
* that the primitives-emitted query won't increment.
*/
radeon_set_context_reg(cs, R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 + 16*i, 0);
}
radv_set_streamout_enable(cmd_buffer, false);
}
void radv_CmdDrawIndirectByteCountEXT(
VkCommandBuffer commandBuffer,
uint32_t instanceCount,
uint32_t firstInstance,
VkBuffer _counterBuffer,
VkDeviceSize counterBufferOffset,
uint32_t counterOffset,
uint32_t vertexStride)
{
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
RADV_FROM_HANDLE(radv_buffer, counterBuffer, _counterBuffer);
struct radv_draw_info info = {};
info.instance_count = instanceCount;
info.first_instance = firstInstance;
info.strmout_buffer = counterBuffer;
info.strmout_buffer_offset = counterBufferOffset;
info.stride = vertexStride;
radv_draw(cmd_buffer, &info);
}

View File

@@ -84,9 +84,7 @@ VkResult radv_CreateDescriptorSetLayout(
uint32_t immutable_sampler_count = 0;
for (uint32_t j = 0; j < pCreateInfo->bindingCount; j++) {
max_binding = MAX2(max_binding, pCreateInfo->pBindings[j].binding);
if ((pCreateInfo->pBindings[j].descriptorType == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER ||
pCreateInfo->pBindings[j].descriptorType == VK_DESCRIPTOR_TYPE_SAMPLER) &&
pCreateInfo->pBindings[j].pImmutableSamplers)
if (pCreateInfo->pBindings[j].pImmutableSamplers)
immutable_sampler_count += pCreateInfo->pBindings[j].descriptorCount;
}
@@ -184,9 +182,7 @@ VkResult radv_CreateDescriptorSetLayout(
set_layout->has_variable_descriptors = true;
}
if ((binding->descriptorType == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER ||
binding->descriptorType == VK_DESCRIPTOR_TYPE_SAMPLER) &&
binding->pImmutableSamplers) {
if (binding->pImmutableSamplers) {
set_layout->binding[b].immutable_samplers_offset = samplers_offset;
set_layout->binding[b].immutable_samplers_equal =
has_equal_immutable_samplers(binding->pImmutableSamplers, binding->descriptorCount);
@@ -537,7 +533,7 @@ VkResult radv_CreateDescriptorPool(
{
RADV_FROM_HANDLE(radv_device, device, _device);
struct radv_descriptor_pool *pool;
uint64_t size = sizeof(struct radv_descriptor_pool);
int size = sizeof(struct radv_descriptor_pool);
uint64_t bo_size = 0, bo_count = 0, range_count = 0;
@@ -965,11 +961,9 @@ void radv_update_descriptor_sets(
}
src_ptr += src_binding_layout->size / 4;
dst_ptr += dst_binding_layout->size / 4;
if (src_binding_layout->type != VK_DESCRIPTOR_TYPE_SAMPLER) {
/* Sampler descriptors don't have a buffer list. */
dst_buffer_list[j] = src_buffer_list[j];
}
dst_buffer_list[j] = src_buffer_list[j];
++src_buffer_list;
++dst_buffer_list;
}
}
}

View File

@@ -43,7 +43,6 @@
#include "ac_llvm_util.h"
#include "vk_format.h"
#include "sid.h"
#include "git_sha1.h"
#include "gfx9d.h"
#include "addrlib/gfx9/chip/gfx9_enum.h"
#include "util/build_id.h"
@@ -113,7 +112,6 @@ radv_get_device_name(enum radeon_family family, char *name, size_t name_len)
case CHIP_VEGA10: chip_string = "AMD RADV VEGA10"; break;
case CHIP_VEGA12: chip_string = "AMD RADV VEGA12"; break;
case CHIP_RAVEN: chip_string = "AMD RADV RAVEN"; break;
case CHIP_RAVEN2: chip_string = "AMD RADV RAVEN2"; break;
default: chip_string = "AMD RADV unknown"; break;
}
@@ -257,6 +255,8 @@ radv_physical_device_init(struct radv_physical_device *device,
if (strcmp(version->name, "amdgpu")) {
drmFreeVersion(version);
if (master_fd != -1)
close(master_fd);
close(fd);
if (instance->debug_flags & RADV_DEBUG_STARTUP)
@@ -329,7 +329,7 @@ radv_physical_device_init(struct radv_physical_device *device,
device->rad_info.chip_class > GFX9)
fprintf(stderr, "WARNING: radv is not a conformant vulkan implementation, testing use only.\n");
radv_get_driver_uuid(&device->driver_uuid);
radv_get_driver_uuid(&device->device_uuid);
radv_get_device_uuid(&device->rad_info, &device->device_uuid);
if (device->rad_info.family == CHIP_STONEY ||
@@ -337,8 +337,7 @@ radv_physical_device_init(struct radv_physical_device *device,
device->has_rbplus = true;
device->rbplus_allowed = device->rad_info.family == CHIP_STONEY ||
device->rad_info.family == CHIP_VEGA12 ||
device->rad_info.family == CHIP_RAVEN ||
device->rad_info.family == CHIP_RAVEN2;
device->rad_info.family == CHIP_RAVEN;
}
/* The mere presence of CLEAR_STATE in the IB causes random GPU hangs
@@ -364,15 +363,6 @@ radv_physical_device_init(struct radv_physical_device *device,
radv_physical_device_init_mem_types(device);
radv_fill_device_extension_table(device, &device->supported_extensions);
device->bus_info = *drm_device->businfo.pci;
if ((device->instance->debug_flags & RADV_DEBUG_INFO))
ac_print_gpu_info(&device->rad_info);
/* The WSI is structured as a layer on top of the driver, so this has
* to be the last part of initialization (at least until we get other
* semi-layers).
*/
result = radv_init_wsi(device);
if (result != VK_SUCCESS) {
device->ws->destroy(device->ws);
@@ -380,6 +370,9 @@ radv_physical_device_init(struct radv_physical_device *device,
goto fail;
}
if ((device->instance->debug_flags & RADV_DEBUG_INFO))
ac_print_gpu_info(&device->rad_info);
return VK_SUCCESS;
fail:
@@ -525,7 +518,7 @@ VkResult radv_CreateInstance(
pCreateInfo->pApplicationInfo->apiVersion != 0) {
client_version = pCreateInfo->pApplicationInfo->apiVersion;
} else {
client_version = VK_API_VERSION_1_0;
radv_EnumerateInstanceVersion(&client_version);
}
instance = vk_zalloc2(&default_alloc, pAllocator, sizeof(*instance), 8,
@@ -726,7 +719,8 @@ void radv_GetPhysicalDeviceFeatures(
.alphaToOne = true,
.multiViewport = true,
.samplerAnisotropy = true,
.textureCompressionETC2 = radv_device_supports_etc(pdevice),
.textureCompressionETC2 = pdevice->rad_info.chip_class >= GFX9 ||
pdevice->rad_info.family == CHIP_STONEY,
.textureCompressionASTC_LDR = false,
.textureCompressionBC = true,
.occlusionQueryPrecise = true,
@@ -747,7 +741,7 @@ void radv_GetPhysicalDeviceFeatures(
.shaderCullDistance = true,
.shaderFloat64 = true,
.shaderInt64 = true,
.shaderInt16 = pdevice->rad_info.chip_class >= GFX9 && HAVE_LLVM >= 0x700,
.shaderInt16 = false,
.sparseBinding = true,
.variableMultisampleRate = true,
.inheritedQueries = true,
@@ -793,7 +787,7 @@ void radv_GetPhysicalDeviceFeatures2(
features->storageBuffer16BitAccess = enabled;
features->uniformAndStorageBuffer16BitAccess = enabled;
features->storagePushConstant16 = enabled;
features->storageInputOutput16 = enabled && HAVE_LLVM >= 0x900;
features->storageInputOutput16 = enabled;
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SAMPLER_YCBCR_CONVERSION_FEATURES: {
@@ -841,13 +835,6 @@ void radv_GetPhysicalDeviceFeatures2(
features->vertexAttributeInstanceRateZeroDivisor = VK_TRUE;
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_FEATURES_EXT: {
VkPhysicalDeviceTransformFeedbackFeaturesEXT *features =
(VkPhysicalDeviceTransformFeedbackFeaturesEXT*)ext;
features->transformFeedback = true;
features->geometryStreams = true;
break;
}
default:
break;
}
@@ -935,9 +922,9 @@ void radv_GetPhysicalDeviceProperties(
2048,
2048
},
.subPixelPrecisionBits = 8,
.subTexelPrecisionBits = 8,
.mipmapPrecisionBits = 8,
.subPixelPrecisionBits = 4 /* FIXME */,
.subTexelPrecisionBits = 4 /* FIXME */,
.mipmapPrecisionBits = 4 /* FIXME */,
.maxDrawIndexedIndexValue = UINT32_MAX,
.maxDrawIndirectCount = UINT32_MAX,
.maxSamplerLodBias = 16,
@@ -976,8 +963,8 @@ void radv_GetPhysicalDeviceProperties(
.maxClipDistances = 8,
.maxCullDistances = 8,
.maxCombinedClipAndCullDistances = 8,
.discreteQueuePriorities = 2,
.pointSizeRange = { 0.0, 8192.0 },
.discreteQueuePriorities = 1,
.pointSizeRange = { 0.125, 255.875 },
.lineWidthRange = { 0.0, 7.9921875 },
.pointSizeGranularity = (1.0 / 8.0),
.lineWidthGranularity = (1.0 / 128.0),
@@ -1095,7 +1082,9 @@ void radv_GetPhysicalDeviceProperties2(
properties->shaderArraysPerEngineCount =
pdevice->rad_info.max_sh_per_se;
properties->computeUnitsPerShaderArray =
pdevice->rad_info.num_good_cu_per_sh;
pdevice->rad_info.num_good_compute_units /
(pdevice->rad_info.max_se *
pdevice->rad_info.max_sh_per_se);
properties->simdPerComputeUnit = 4;
properties->wavefrontsPerSimd =
pdevice->rad_info.family == CHIP_TONGA ||
@@ -1165,73 +1154,6 @@ void radv_GetPhysicalDeviceProperties2(
properties->maxDescriptorSetUpdateAfterBindInputAttachments = max_descriptor_set_size;
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PROTECTED_MEMORY_PROPERTIES: {
VkPhysicalDeviceProtectedMemoryProperties *properties =
(VkPhysicalDeviceProtectedMemoryProperties *)ext;
properties->protectedNoFault = false;
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CONSERVATIVE_RASTERIZATION_PROPERTIES_EXT: {
VkPhysicalDeviceConservativeRasterizationPropertiesEXT *properties =
(VkPhysicalDeviceConservativeRasterizationPropertiesEXT *)ext;
properties->primitiveOverestimationSize = 0;
properties->maxExtraPrimitiveOverestimationSize = 0;
properties->extraPrimitiveOverestimationSizeGranularity = 0;
properties->primitiveUnderestimation = VK_FALSE;
properties->conservativePointAndLineRasterization = VK_FALSE;
properties->degenerateTrianglesRasterized = VK_FALSE;
properties->degenerateLinesRasterized = VK_FALSE;
properties->fullyCoveredFragmentShaderInputVariable = VK_FALSE;
properties->conservativeRasterizationPostDepthCoverage = VK_FALSE;
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PCI_BUS_INFO_PROPERTIES_EXT: {
VkPhysicalDevicePCIBusInfoPropertiesEXT *properties =
(VkPhysicalDevicePCIBusInfoPropertiesEXT *)ext;
properties->pciDomain = pdevice->bus_info.domain;
properties->pciBus = pdevice->bus_info.bus;
properties->pciDevice = pdevice->bus_info.dev;
properties->pciFunction = pdevice->bus_info.func;
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DRIVER_PROPERTIES_KHR: {
VkPhysicalDeviceDriverPropertiesKHR *driver_props =
(VkPhysicalDeviceDriverPropertiesKHR *) ext;
driver_props->driverID = VK_DRIVER_ID_MESA_RADV_KHR;
memset(driver_props->driverName, 0, VK_MAX_DRIVER_NAME_SIZE_KHR);
strcpy(driver_props->driverName, "radv");
memset(driver_props->driverInfo, 0, VK_MAX_DRIVER_INFO_SIZE_KHR);
snprintf(driver_props->driverInfo, VK_MAX_DRIVER_INFO_SIZE_KHR,
"Mesa " PACKAGE_VERSION MESA_GIT_SHA1
" (LLVM %d.%d.%d)",
(HAVE_LLVM >> 8) & 0xff, HAVE_LLVM & 0xff,
MESA_LLVM_VERSION_PATCH);
driver_props->conformanceVersion = (VkConformanceVersionKHR) {
.major = 1,
.minor = 1,
.subminor = 2,
.patch = 0,
};
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_PROPERTIES_EXT: {
VkPhysicalDeviceTransformFeedbackPropertiesEXT *properties =
(VkPhysicalDeviceTransformFeedbackPropertiesEXT *)ext;
properties->maxTransformFeedbackStreams = MAX_SO_STREAMS;
properties->maxTransformFeedbackBuffers = MAX_SO_BUFFERS;
properties->maxTransformFeedbackBufferSize = UINT32_MAX;
properties->maxTransformFeedbackStreamDataSize = 512;
properties->maxTransformFeedbackBufferDataSize = UINT32_MAX;
properties->maxTransformFeedbackBufferDataStride = 512;
properties->transformFeedbackQueries = true;
properties->transformFeedbackStreamsLinesTriangles = false;
properties->transformFeedbackRasterizationStreamSelect = false;
properties->transformFeedbackDraw = true;
break;
}
default:
break;
}
@@ -1515,28 +1437,6 @@ static int radv_get_device_extension_index(const char *name)
return -1;
}
static int
radv_get_int_debug_option(const char *name, int default_value)
{
const char *str;
int result;
str = getenv(name);
if (!str) {
result = default_value;
} else {
char *endptr;
result = strtol(str, &endptr, 0);
if (str == endptr) {
/* No digits founs. */
result = default_value;
}
}
return result;
}
VkResult radv_CreateDevice(
VkPhysicalDevice physicalDevice,
const VkDeviceCreateInfo* pCreateInfo,
@@ -1632,13 +1532,11 @@ VkResult radv_CreateDevice(
device->pbb_allowed = device->physical_device->rad_info.chip_class >= GFX9 &&
((device->instance->perftest_flags & RADV_PERFTEST_BINNING) ||
device->physical_device->rad_info.family == CHIP_RAVEN ||
device->physical_device->rad_info.family == CHIP_RAVEN2);
device->physical_device->rad_info.family == CHIP_RAVEN);
/* Disabled and not implemented for now. */
device->dfsm_allowed = device->pbb_allowed &&
(device->physical_device->rad_info.family == CHIP_RAVEN ||
device->physical_device->rad_info.family == CHIP_RAVEN2);
device->physical_device->rad_info.family == CHIP_RAVEN;
#ifdef ANDROID
device->always_use_syncobj = device->physical_device->rad_info.has_syncobj_wait_for_submit;
@@ -1734,13 +1632,6 @@ VkResult radv_CreateDevice(
device->mem_cache = radv_pipeline_cache_from_handle(pc);
device->force_aniso =
MIN2(16, radv_get_int_debug_option("RADV_TEX_ANISO", -1));
if (device->force_aniso >= 0) {
fprintf(stderr, "radv: Forcing anisotropy filter to %ix\n",
1 << util_logbase2(device->force_aniso));
}
*pDevice = radv_device_to_handle(device);
return VK_SUCCESS;
@@ -2201,33 +2092,6 @@ radv_emit_global_shader_pointers(struct radv_queue *queue,
}
}
static void
radv_init_graphics_state(struct radeon_cmdbuf *cs, struct radv_queue *queue)
{
struct radv_device *device = queue->device;
if (device->gfx_init) {
uint64_t va = radv_buffer_get_va(device->gfx_init);
radeon_emit(cs, PKT3(PKT3_INDIRECT_BUFFER_CIK, 2, 0));
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
radeon_emit(cs, device->gfx_init_size_dw & 0xffff);
radv_cs_add_buffer(device->ws, cs, device->gfx_init);
} else {
struct radv_physical_device *physical_device = device->physical_device;
si_emit_graphics(physical_device, cs);
}
}
static void
radv_init_compute_state(struct radeon_cmdbuf *cs, struct radv_queue *queue)
{
struct radv_physical_device *physical_device = queue->device->physical_device;
si_emit_compute(physical_device, cs);
}
static VkResult
radv_get_preamble_cs(struct radv_queue *queue,
uint32_t scratch_size,
@@ -2382,18 +2246,6 @@ radv_get_preamble_cs(struct radv_queue *queue,
if (scratch_bo)
radv_cs_add_buffer(queue->device->ws, cs, scratch_bo);
/* Emit initial configuration. */
switch (queue->queue_family_index) {
case RADV_QUEUE_GENERAL:
radv_init_graphics_state(cs, queue);
break;
case RADV_QUEUE_COMPUTE:
radv_init_compute_state(cs, queue);
break;
case RADV_QUEUE_TRANSFER:
break;
}
if (descriptor_bo != queue->descriptor_bo) {
uint32_t *map = (uint32_t*)queue->device->ws->buffer_map(descriptor_bo);
@@ -3939,7 +3791,7 @@ radv_init_dcc_control_reg(struct radv_device *device,
unsigned max_compressed_block_size;
unsigned independent_64b_blocks;
if (!radv_image_has_dcc(iview->image))
if (device->physical_device->rad_info.chip_class < VI)
return 0;
if (iview->image->info.samples > 1) {
@@ -4539,26 +4391,13 @@ radv_tex_filter_mode(VkSamplerReductionModeEXT mode)
return 0;
}
static uint32_t
radv_get_max_anisotropy(struct radv_device *device,
const VkSamplerCreateInfo *pCreateInfo)
{
if (device->force_aniso >= 0)
return device->force_aniso;
if (pCreateInfo->anisotropyEnable &&
pCreateInfo->maxAnisotropy > 1.0f)
return (uint32_t)pCreateInfo->maxAnisotropy;
return 0;
}
static void
radv_init_sampler(struct radv_device *device,
struct radv_sampler *sampler,
const VkSamplerCreateInfo *pCreateInfo)
{
uint32_t max_aniso = radv_get_max_anisotropy(device, pCreateInfo);
uint32_t max_aniso = pCreateInfo->anisotropyEnable && pCreateInfo->maxAnisotropy > 1.0 ?
(uint32_t) pCreateInfo->maxAnisotropy : 0;
uint32_t max_aniso_ratio = radv_tex_aniso_filter(max_aniso);
bool is_vi = (device->physical_device->rad_info.chip_class >= VI);
unsigned filter_mode = SQ_IMG_FILTER_MODE_BLEND;
@@ -4989,122 +4828,3 @@ radv_GetDeviceGroupPeerMemoryFeatures(
VK_PEER_MEMORY_FEATURE_GENERIC_SRC_BIT |
VK_PEER_MEMORY_FEATURE_GENERIC_DST_BIT;
}
static const VkTimeDomainEXT radv_time_domains[] = {
VK_TIME_DOMAIN_DEVICE_EXT,
VK_TIME_DOMAIN_CLOCK_MONOTONIC_EXT,
VK_TIME_DOMAIN_CLOCK_MONOTONIC_RAW_EXT,
};
VkResult radv_GetPhysicalDeviceCalibrateableTimeDomainsEXT(
VkPhysicalDevice physicalDevice,
uint32_t *pTimeDomainCount,
VkTimeDomainEXT *pTimeDomains)
{
int d;
VK_OUTARRAY_MAKE(out, pTimeDomains, pTimeDomainCount);
for (d = 0; d < ARRAY_SIZE(radv_time_domains); d++) {
vk_outarray_append(&out, i) {
*i = radv_time_domains[d];
}
}
return vk_outarray_status(&out);
}
static uint64_t
radv_clock_gettime(clockid_t clock_id)
{
struct timespec current;
int ret;
ret = clock_gettime(clock_id, &current);
if (ret < 0 && clock_id == CLOCK_MONOTONIC_RAW)
ret = clock_gettime(CLOCK_MONOTONIC, &current);
if (ret < 0)
return 0;
return (uint64_t) current.tv_sec * 1000000000ULL + current.tv_nsec;
}
VkResult radv_GetCalibratedTimestampsEXT(
VkDevice _device,
uint32_t timestampCount,
const VkCalibratedTimestampInfoEXT *pTimestampInfos,
uint64_t *pTimestamps,
uint64_t *pMaxDeviation)
{
RADV_FROM_HANDLE(radv_device, device, _device);
uint32_t clock_crystal_freq = device->physical_device->rad_info.clock_crystal_freq;
int d;
uint64_t begin, end;
uint64_t max_clock_period = 0;
begin = radv_clock_gettime(CLOCK_MONOTONIC_RAW);
for (d = 0; d < timestampCount; d++) {
switch (pTimestampInfos[d].timeDomain) {
case VK_TIME_DOMAIN_DEVICE_EXT:
pTimestamps[d] = device->ws->query_value(device->ws,
RADEON_TIMESTAMP);
uint64_t device_period = DIV_ROUND_UP(1000000, clock_crystal_freq);
max_clock_period = MAX2(max_clock_period, device_period);
break;
case VK_TIME_DOMAIN_CLOCK_MONOTONIC_EXT:
pTimestamps[d] = radv_clock_gettime(CLOCK_MONOTONIC);
max_clock_period = MAX2(max_clock_period, 1);
break;
case VK_TIME_DOMAIN_CLOCK_MONOTONIC_RAW_EXT:
pTimestamps[d] = begin;
break;
default:
pTimestamps[d] = 0;
break;
}
}
end = radv_clock_gettime(CLOCK_MONOTONIC_RAW);
/*
* The maximum deviation is the sum of the interval over which we
* perform the sampling and the maximum period of any sampled
* clock. That's because the maximum skew between any two sampled
* clock edges is when the sampled clock with the largest period is
* sampled at the end of that period but right at the beginning of the
* sampling interval and some other clock is sampled right at the
* begining of its sampling period and right at the end of the
* sampling interval. Let's assume the GPU has the longest clock
* period and that the application is sampling GPU and monotonic:
*
* s e
* w x y z 0 1 2 3 4 5 6 7 8 9 a b c d e f
* Raw -_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-
*
* g
* 0 1 2 3
* GPU -----_____-----_____-----_____-----_____
*
* m
* x y z 0 1 2 3 4 5 6 7 8 9 a b c
* Monotonic -_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-
*
* Interval <----------------->
* Deviation <-------------------------->
*
* s = read(raw) 2
* g = read(GPU) 1
* m = read(monotonic) 2
* e = read(raw) b
*
* We round the sample interval up by one tick to cover sampling error
* in the interval clock
*/
uint64_t sample_interval = end - begin + 1;
*pMaxDeviation = sample_interval + max_clock_period;
return VK_SUCCESS;
}

View File

@@ -59,7 +59,6 @@ EXTENSIONS = [
Extension('VK_KHR_device_group', 1, True),
Extension('VK_KHR_device_group_creation', 1, True),
Extension('VK_KHR_draw_indirect_count', 1, True),
Extension('VK_KHR_driver_properties', 1, True),
Extension('VK_KHR_external_fence', 1, 'device->rad_info.has_syncobj_wait_for_submit'),
Extension('VK_KHR_external_fence_capabilities', 1, True),
Extension('VK_KHR_external_fence_fd', 1, 'device->rad_info.has_syncobj_wait_for_submit'),
@@ -93,9 +92,7 @@ EXTENSIONS = [
Extension('VK_KHR_display', 23, 'VK_USE_PLATFORM_DISPLAY_KHR'),
Extension('VK_EXT_direct_mode_display', 1, 'VK_USE_PLATFORM_DISPLAY_KHR'),
Extension('VK_EXT_acquire_xlib_display', 1, 'VK_USE_PLATFORM_XLIB_XRANDR_EXT'),
Extension('VK_EXT_calibrated_timestamps', 1, True),
Extension('VK_EXT_conditional_rendering', 1, True),
Extension('VK_EXT_conservative_rasterization', 1, 'device->rad_info.chip_class >= GFX9'),
Extension('VK_EXT_display_surface_counter', 1, 'VK_USE_PLATFORM_DISPLAY_KHR'),
Extension('VK_EXT_display_control', 1, 'VK_USE_PLATFORM_DISPLAY_KHR'),
Extension('VK_EXT_debug_report', 9, True),
@@ -105,11 +102,9 @@ EXTENSIONS = [
Extension('VK_EXT_external_memory_dma_buf', 1, True),
Extension('VK_EXT_external_memory_host', 1, 'device->rad_info.has_userptr'),
Extension('VK_EXT_global_priority', 1, 'device->rad_info.has_ctx_priority'),
Extension('VK_EXT_pci_bus_info', 1, False),
Extension('VK_EXT_sampler_filter_minmax', 1, 'device->rad_info.chip_class >= CIK'),
Extension('VK_EXT_shader_viewport_index_layer', 1, True),
Extension('VK_EXT_shader_stencil_export', 1, True),
Extension('VK_EXT_transform_feedback', 1, True),
Extension('VK_EXT_vertex_attribute_divisor', 3, True),
Extension('VK_AMD_draw_indirect_count', 1, True),
Extension('VK_AMD_gcn_shader', 1, True),
@@ -117,8 +112,6 @@ EXTENSIONS = [
Extension('VK_AMD_shader_core_properties', 1, True),
Extension('VK_AMD_shader_info', 1, True),
Extension('VK_AMD_shader_trinary_minmax', 1, True),
Extension('VK_GOOGLE_decorate_string', 1, True),
Extension('VK_GOOGLE_hlsl_functionality1', 1, True),
]
class VkVersion:
@@ -154,15 +147,14 @@ class VkVersion:
patch = self.patch if self.patch is not None else 0
return (self.major << 22) | (self.minor << 12) | patch
def __gt__(self, other):
def __cmp__(self, other):
# If only one of them has a patch version, "ignore" it by making
# other's patch version match self.
if (self.patch is None) != (other.patch is None):
other = copy.copy(other)
other.patch = self.patch
return self.__int_ver() > other.__int_ver()
return self.__int_ver().__cmp__(other.__int_ver())
MAX_API_VERSION = VkVersion(MAX_API_VERSION)

View File

@@ -595,14 +595,6 @@ static bool radv_is_filter_minmax_format_supported(VkFormat format)
}
}
bool
radv_device_supports_etc(struct radv_physical_device *physical_device)
{
return physical_device->rad_info.family == CHIP_VEGA10 ||
physical_device->rad_info.family == CHIP_RAVEN ||
physical_device->rad_info.family == CHIP_STONEY;
}
static void
radv_physical_device_get_format_properties(struct radv_physical_device *physical_device,
VkFormat format,
@@ -620,7 +612,9 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
}
if (desc->layout == VK_FORMAT_LAYOUT_ETC &&
!radv_device_supports_etc(physical_device)) {
physical_device->rad_info.family != CHIP_VEGA10 &&
physical_device->rad_info.family != CHIP_RAVEN &&
physical_device->rad_info.family != CHIP_STONEY) {
out_properties->linearTilingFeatures = linear;
out_properties->optimalTilingFeatures = tiled;
out_properties->bufferFeatures = buffer;
@@ -651,12 +645,9 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
if (radv_is_filter_minmax_format_supported(format))
tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_MINMAX_BIT_EXT;
/* Don't support blitting surfaces with depth/stencil. */
if (vk_format_is_depth(format) && vk_format_is_stencil(format))
tiled &= ~VK_FORMAT_FEATURE_BLIT_DST_BIT;
/* Don't support linear depth surfaces */
linear = 0;
/* GFX9 doesn't support linear depth surfaces */
if (physical_device->rad_info.chip_class >= GFX9)
linear = 0;
}
} else {
bool linear_sampling;
@@ -673,13 +664,6 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
linear |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT;
tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT;
}
/* Don't support blitting for R32G32B32 formats. */
if (format == VK_FORMAT_R32G32B32_SFLOAT ||
format == VK_FORMAT_R32G32B32_UINT ||
format == VK_FORMAT_R32G32B32_SINT) {
linear &= ~VK_FORMAT_FEATURE_BLIT_SRC_BIT;
}
}
if (radv_is_colorbuffer_format_supported(format, &blendable)) {
linear |= VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT | VK_FORMAT_FEATURE_BLIT_DST_BIT;
@@ -1104,20 +1088,6 @@ static VkResult radv_get_image_format_properties(struct radv_physical_device *ph
sampleCounts |= VK_SAMPLE_COUNT_2_BIT | VK_SAMPLE_COUNT_4_BIT | VK_SAMPLE_COUNT_8_BIT;
}
if (info->tiling == VK_IMAGE_TILING_LINEAR &&
(info->format == VK_FORMAT_R32G32B32_SFLOAT ||
info->format == VK_FORMAT_R32G32B32_SINT ||
info->format == VK_FORMAT_R32G32B32_UINT)) {
/* R32G32B32 is a weird format and the driver currently only
* supports the barely minimum.
* TODO: Implement more if we really need to.
*/
if (info->type == VK_IMAGE_TYPE_3D)
goto unsupported;
maxArraySize = 1;
maxMipLevels = 1;
}
if (info->usage & VK_IMAGE_USAGE_SAMPLED_BIT) {
if (!(format_feature_flags & VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT)) {
goto unsupported;

View File

@@ -72,8 +72,11 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device,
if (device->physical_device->rad_info.chip_class < VI)
return false;
if ((pCreateInfo->usage & VK_IMAGE_USAGE_STORAGE_BIT) ||
(pCreateInfo->flags & VK_IMAGE_CREATE_EXTENDED_USAGE_BIT_KHR))
if (pCreateInfo->usage & VK_IMAGE_USAGE_STORAGE_BIT)
return false;
if (pCreateInfo->flags & (VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT |
VK_IMAGE_CREATE_EXTENDED_USAGE_BIT_KHR))
return false;
if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR)
@@ -97,26 +100,6 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device,
pCreateInfo->format != VK_FORMAT_D16_UNORM)
return false;
if (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) {
const struct VkImageFormatListCreateInfoKHR *format_list =
(const struct VkImageFormatListCreateInfoKHR *)
vk_find_struct_const(pCreateInfo->pNext,
IMAGE_FORMAT_LIST_CREATE_INFO_KHR);
/* We have to ignore the existence of the list if viewFormatCount = 0 */
if (format_list && format_list->viewFormatCount) {
/* compatibility is transitive, so we only need to check
* one format with everything else.
*/
for (unsigned i = 0; i < format_list->viewFormatCount; ++i) {
if (pCreateInfo->format != format_list->pViewFormats[i])
return false;
}
} else {
return false;
}
}
return true;
}
@@ -931,9 +914,7 @@ radv_image_can_enable_fmask(struct radv_image *image)
static inline bool
radv_image_can_enable_htile(struct radv_image *image)
{
return image->info.levels == 1 &&
vk_format_is_depth(image->vk_format) &&
image->info.width * image->info.height >= 8 * 8;
return image->info.levels == 1 && vk_format_is_depth(image->vk_format);
}
VkResult

View File

@@ -234,12 +234,15 @@ radv_builtin_cache_path(char *path)
const char *suffix2 = "/.cache/radv_builtin_shaders";
struct passwd pwd, *result;
char path2[PATH_MAX + 1]; /* PATH_MAX is not a real max,but suffices here. */
int ret;
if (xdg_cache_home) {
ret = snprintf(path, PATH_MAX + 1, "%s%s%zd",
xdg_cache_home, suffix, sizeof(void *) * 8);
return ret > 0 && ret < PATH_MAX + 1;
if (strlen(xdg_cache_home) + strlen(suffix) > PATH_MAX)
return false;
strcpy(path, xdg_cache_home);
strcat(path, suffix);
return true;
}
getpwuid_r(getuid(), &pwd, path2, PATH_MAX - strlen(suffix2), &result);
@@ -250,25 +253,23 @@ radv_builtin_cache_path(char *path)
strcat(path, "/.cache");
mkdir(path, 0755);
ret = snprintf(path, PATH_MAX + 1, "%s%s%zd",
pwd.pw_dir, suffix2, sizeof(void *) * 8);
return ret > 0 && ret < PATH_MAX + 1;
strcat(path, suffix);
return true;
}
static bool
static void
radv_load_meta_pipeline(struct radv_device *device)
{
char path[PATH_MAX + 1];
struct stat st;
void *data = NULL;
bool ret = false;
if (!radv_builtin_cache_path(path))
return false;
return;
int fd = open(path, O_RDONLY);
if (fd < 0)
return false;
return;
if (fstat(fd, &st))
goto fail;
data = malloc(st.st_size);
@@ -277,11 +278,10 @@ radv_load_meta_pipeline(struct radv_device *device)
if(read(fd, data, st.st_size) == -1)
goto fail;
ret = radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size);
radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size);
fail:
free(data);
close(fd);
return ret;
}
static void
@@ -330,8 +330,6 @@ radv_device_init_meta(struct radv_device *device)
{
VkResult result;
memset(&device->meta_state, 0, sizeof(device->meta_state));
device->meta_state.alloc = (VkAllocationCallbacks) {
.pUserData = device,
.pfnAllocation = meta_alloc,
@@ -341,24 +339,21 @@ radv_device_init_meta(struct radv_device *device)
device->meta_state.cache.alloc = device->meta_state.alloc;
radv_pipeline_cache_init(&device->meta_state.cache, device);
bool loaded_cache = radv_load_meta_pipeline(device);
bool on_demand = !loaded_cache;
radv_load_meta_pipeline(device);
mtx_init(&device->meta_state.mtx, mtx_plain);
result = radv_device_init_meta_clear_state(device, on_demand);
result = radv_device_init_meta_clear_state(device);
if (result != VK_SUCCESS)
goto fail_clear;
result = radv_device_init_meta_resolve_state(device, on_demand);
result = radv_device_init_meta_resolve_state(device);
if (result != VK_SUCCESS)
goto fail_resolve;
result = radv_device_init_meta_blit_state(device, on_demand);
result = radv_device_init_meta_blit_state(device);
if (result != VK_SUCCESS)
goto fail_blit;
result = radv_device_init_meta_blit2d_state(device, on_demand);
result = radv_device_init_meta_blit2d_state(device);
if (result != VK_SUCCESS)
goto fail_blit2d;
@@ -366,7 +361,7 @@ radv_device_init_meta(struct radv_device *device)
if (result != VK_SUCCESS)
goto fail_bufimage;
result = radv_device_init_meta_depth_decomp_state(device, on_demand);
result = radv_device_init_meta_depth_decomp_state(device);
if (result != VK_SUCCESS)
goto fail_depth_decomp;
@@ -374,19 +369,19 @@ radv_device_init_meta(struct radv_device *device)
if (result != VK_SUCCESS)
goto fail_buffer;
result = radv_device_init_meta_query_state(device, on_demand);
result = radv_device_init_meta_query_state(device);
if (result != VK_SUCCESS)
goto fail_query;
result = radv_device_init_meta_fast_clear_flush_state(device, on_demand);
result = radv_device_init_meta_fast_clear_flush_state(device);
if (result != VK_SUCCESS)
goto fail_fast_clear;
result = radv_device_init_meta_resolve_compute_state(device, on_demand);
result = radv_device_init_meta_resolve_compute_state(device);
if (result != VK_SUCCESS)
goto fail_resolve_compute;
result = radv_device_init_meta_resolve_fragment_state(device, on_demand);
result = radv_device_init_meta_resolve_fragment_state(device);
if (result != VK_SUCCESS)
goto fail_resolve_fragment;
return VK_SUCCESS;
@@ -412,7 +407,6 @@ fail_blit:
fail_resolve:
radv_device_finish_meta_clear_state(device);
fail_clear:
mtx_destroy(&device->meta_state.mtx);
radv_pipeline_cache_finish(&device->meta_state.cache);
return result;
}
@@ -434,7 +428,6 @@ radv_device_finish_meta(struct radv_device *device)
radv_store_meta_pipeline(device);
radv_pipeline_cache_finish(&device->meta_state.cache);
mtx_destroy(&device->meta_state.mtx);
}
nir_ssa_def *radv_meta_gen_rect_vertices_comp2(nir_builder *vs_b, nir_ssa_def *comp2)

View File

@@ -58,34 +58,34 @@ struct radv_meta_saved_state {
VkRect2D render_area;
};
VkResult radv_device_init_meta_clear_state(struct radv_device *device, bool on_demand);
VkResult radv_device_init_meta_clear_state(struct radv_device *device);
void radv_device_finish_meta_clear_state(struct radv_device *device);
VkResult radv_device_init_meta_resolve_state(struct radv_device *device, bool on_demand);
VkResult radv_device_init_meta_resolve_state(struct radv_device *device);
void radv_device_finish_meta_resolve_state(struct radv_device *device);
VkResult radv_device_init_meta_depth_decomp_state(struct radv_device *device, bool on_demand);
VkResult radv_device_init_meta_depth_decomp_state(struct radv_device *device);
void radv_device_finish_meta_depth_decomp_state(struct radv_device *device);
VkResult radv_device_init_meta_fast_clear_flush_state(struct radv_device *device, bool on_demand);
VkResult radv_device_init_meta_fast_clear_flush_state(struct radv_device *device);
void radv_device_finish_meta_fast_clear_flush_state(struct radv_device *device);
VkResult radv_device_init_meta_blit_state(struct radv_device *device, bool on_demand);
VkResult radv_device_init_meta_blit_state(struct radv_device *device);
void radv_device_finish_meta_blit_state(struct radv_device *device);
VkResult radv_device_init_meta_blit2d_state(struct radv_device *device, bool on_demand);
VkResult radv_device_init_meta_blit2d_state(struct radv_device *device);
void radv_device_finish_meta_blit2d_state(struct radv_device *device);
VkResult radv_device_init_meta_buffer_state(struct radv_device *device);
void radv_device_finish_meta_buffer_state(struct radv_device *device);
VkResult radv_device_init_meta_query_state(struct radv_device *device, bool on_demand);
VkResult radv_device_init_meta_query_state(struct radv_device *device);
void radv_device_finish_meta_query_state(struct radv_device *device);
VkResult radv_device_init_meta_resolve_compute_state(struct radv_device *device, bool on_demand);
VkResult radv_device_init_meta_resolve_compute_state(struct radv_device *device);
void radv_device_finish_meta_resolve_compute_state(struct radv_device *device);
VkResult radv_device_init_meta_resolve_fragment_state(struct radv_device *device, bool on_demand);
VkResult radv_device_init_meta_resolve_fragment_state(struct radv_device *device);
void radv_device_finish_meta_resolve_fragment_state(struct radv_device *device);
void radv_meta_save(struct radv_meta_saved_state *saved_state,

View File

@@ -31,13 +31,6 @@ struct blit_region {
VkExtent3D dest_extent;
};
static VkResult
build_pipeline(struct radv_device *device,
VkImageAspectFlagBits aspect,
enum glsl_sampler_dim tex_dim,
unsigned fs_key,
VkPipeline *pipeline);
static nir_shader *
build_nir_vertex_shader(void)
{
@@ -280,20 +273,6 @@ build_nir_copy_fragment_shader_stencil(enum glsl_sampler_dim tex_dim)
return b.shader;
}
static enum glsl_sampler_dim
translate_sampler_dim(VkImageType type) {
switch(type) {
case VK_IMAGE_TYPE_1D:
return GLSL_SAMPLER_DIM_1D;
case VK_IMAGE_TYPE_2D:
return GLSL_SAMPLER_DIM_2D;
case VK_IMAGE_TYPE_3D:
return GLSL_SAMPLER_DIM_3D;
default:
unreachable("Unhandled image type");
}
}
static void
meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
struct radv_image *src_image,
@@ -307,7 +286,7 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
VkOffset2D dest_offset_0,
VkOffset2D dest_offset_1,
VkRect2D dest_box,
VkSampler sampler)
VkFilter blit_filter)
{
struct radv_device *device = cmd_buffer->device;
uint32_t src_width = radv_minify(src_iview->image->info.width, src_iview->base_mip);
@@ -331,6 +310,17 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
VK_SHADER_STAGE_VERTEX_BIT, 0, 20,
vertex_push_constants);
VkSampler sampler;
radv_CreateSampler(radv_device_to_handle(device),
&(VkSamplerCreateInfo) {
.sType = VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO,
.magFilter = blit_filter,
.minFilter = blit_filter,
.addressModeU = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
.addressModeV = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
.addressModeW = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
}, &cmd_buffer->pool->alloc, &sampler);
VkFramebuffer fb;
radv_CreateFramebuffer(radv_device_to_handle(device),
&(VkFramebufferCreateInfo) {
@@ -343,12 +333,11 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
.height = dst_height,
.layers = 1,
}, &cmd_buffer->pool->alloc, &fb);
VkPipeline* pipeline = NULL;
unsigned fs_key = 0;
VkPipeline pipeline;
switch (src_iview->aspect_mask) {
case VK_IMAGE_ASPECT_COLOR_BIT: {
unsigned fs_key = radv_format_meta_fs_key(dest_image->vk_format);
unsigned dst_layout = radv_meta_dst_layout_from_layout(dest_image_layout);
fs_key = radv_format_meta_fs_key(dest_image->vk_format);
radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
&(VkRenderPassBeginInfo) {
@@ -364,16 +353,16 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
}, VK_SUBPASS_CONTENTS_INLINE);
switch (src_image->type) {
case VK_IMAGE_TYPE_1D:
pipeline = &device->meta_state.blit.pipeline_1d_src[fs_key];
pipeline = device->meta_state.blit.pipeline_1d_src[fs_key];
break;
case VK_IMAGE_TYPE_2D:
pipeline = &device->meta_state.blit.pipeline_2d_src[fs_key];
pipeline = device->meta_state.blit.pipeline_2d_src[fs_key];
break;
case VK_IMAGE_TYPE_3D:
pipeline = &device->meta_state.blit.pipeline_3d_src[fs_key];
pipeline = device->meta_state.blit.pipeline_3d_src[fs_key];
break;
default:
unreachable("bad VkImageType");
unreachable(!"bad VkImageType");
}
break;
}
@@ -393,16 +382,16 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
}, VK_SUBPASS_CONTENTS_INLINE);
switch (src_image->type) {
case VK_IMAGE_TYPE_1D:
pipeline = &device->meta_state.blit.depth_only_1d_pipeline;
pipeline = device->meta_state.blit.depth_only_1d_pipeline;
break;
case VK_IMAGE_TYPE_2D:
pipeline = &device->meta_state.blit.depth_only_2d_pipeline;
pipeline = device->meta_state.blit.depth_only_2d_pipeline;
break;
case VK_IMAGE_TYPE_3D:
pipeline = &device->meta_state.blit.depth_only_3d_pipeline;
pipeline = device->meta_state.blit.depth_only_3d_pipeline;
break;
default:
unreachable("bad VkImageType");
unreachable(!"bad VkImageType");
}
break;
}
@@ -422,33 +411,25 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
}, VK_SUBPASS_CONTENTS_INLINE);
switch (src_image->type) {
case VK_IMAGE_TYPE_1D:
pipeline = &device->meta_state.blit.stencil_only_1d_pipeline;
pipeline = device->meta_state.blit.stencil_only_1d_pipeline;
break;
case VK_IMAGE_TYPE_2D:
pipeline = &device->meta_state.blit.stencil_only_2d_pipeline;
pipeline = device->meta_state.blit.stencil_only_2d_pipeline;
break;
case VK_IMAGE_TYPE_3D:
pipeline = &device->meta_state.blit.stencil_only_3d_pipeline;
pipeline = device->meta_state.blit.stencil_only_3d_pipeline;
break;
default:
unreachable("bad VkImageType");
unreachable(!"bad VkImageType");
}
break;
}
default:
unreachable("bad VkImageType");
}
if (!*pipeline) {
VkResult ret = build_pipeline(device, src_iview->aspect_mask, translate_sampler_dim(src_image->type), fs_key, pipeline);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
goto fail_pipeline;
}
unreachable(!"bad VkImageType");
}
radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
VK_PIPELINE_BIND_POINT_GRAPHICS, *pipeline);
VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline);
radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS,
device->meta_state.blit.pipeline_layout,
@@ -490,7 +471,6 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
fail_pipeline:
radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer));
/* At the point where we emit the draw call, all data from the
@@ -499,6 +479,8 @@ fail_pipeline:
/* TODO: above comment is not valid for at least descriptor sets/pools,
* as we may not free them till after execution finishes. Check others. */
radv_DestroySampler(radv_device_to_handle(device), sampler,
&cmd_buffer->pool->alloc);
radv_DestroyFramebuffer(radv_device_to_handle(device), fb,
&cmd_buffer->pool->alloc);
}
@@ -537,10 +519,8 @@ void radv_CmdBlitImage(
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
RADV_FROM_HANDLE(radv_image, src_image, srcImage);
RADV_FROM_HANDLE(radv_image, dest_image, destImage);
struct radv_device *device = cmd_buffer->device;
struct radv_meta_saved_state saved_state;
bool old_predicating;
VkSampler sampler;
/* From the Vulkan 1.0 spec:
*
@@ -550,16 +530,6 @@ void radv_CmdBlitImage(
assert(src_image->info.samples == 1);
assert(dest_image->info.samples == 1);
radv_CreateSampler(radv_device_to_handle(device),
&(VkSamplerCreateInfo) {
.sType = VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO,
.magFilter = filter,
.minFilter = filter,
.addressModeU = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
.addressModeV = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
.addressModeW = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE,
}, &cmd_buffer->pool->alloc, &sampler);
radv_meta_save(&saved_state, cmd_buffer,
RADV_META_SAVE_GRAPHICS_PIPELINE |
RADV_META_SAVE_CONSTANTS |
@@ -681,7 +651,7 @@ void radv_CmdBlitImage(
dest_image, &dest_iview, destImageLayout,
dest_offset_0, dest_offset_1,
dest_box,
sampler);
filter);
}
}
@@ -689,9 +659,6 @@ void radv_CmdBlitImage(
cmd_buffer->state.predicating = old_predicating;
radv_meta_restore(&saved_state, cmd_buffer);
radv_DestroySampler(radv_device_to_handle(device), sampler,
&cmd_buffer->pool->alloc);
}
void
@@ -747,188 +714,34 @@ radv_device_finish_meta_blit_state(struct radv_device *device)
state->blit.ds_layout, &state->alloc);
}
static VkResult
build_pipeline(struct radv_device *device,
VkImageAspectFlagBits aspect,
enum glsl_sampler_dim tex_dim,
unsigned fs_key,
VkPipeline *pipeline)
{
VkResult result = VK_SUCCESS;
mtx_lock(&device->meta_state.mtx);
if (*pipeline) {
mtx_unlock(&device->meta_state.mtx);
return VK_SUCCESS;
}
struct radv_shader_module fs = {0};
struct radv_shader_module vs = {.nir = build_nir_vertex_shader()};
VkRenderPass rp;
switch(aspect) {
case VK_IMAGE_ASPECT_COLOR_BIT:
fs.nir = build_nir_copy_fragment_shader(tex_dim);
rp = device->meta_state.blit.render_pass[fs_key][0];
break;
case VK_IMAGE_ASPECT_DEPTH_BIT:
fs.nir = build_nir_copy_fragment_shader_depth(tex_dim);
rp = device->meta_state.blit.depth_only_rp[0];
break;
case VK_IMAGE_ASPECT_STENCIL_BIT:
fs.nir = build_nir_copy_fragment_shader_stencil(tex_dim);
rp = device->meta_state.blit.stencil_only_rp[0];
break;
default:
unreachable("Unhandled aspect");
}
VkPipelineVertexInputStateCreateInfo vi_create_info = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
.vertexBindingDescriptionCount = 0,
.vertexAttributeDescriptionCount = 0,
};
VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
{
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(&vs),
.pName = "main",
.pSpecializationInfo = NULL
}, {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = radv_shader_module_to_handle(&fs),
.pName = "main",
.pSpecializationInfo = NULL
},
};
VkGraphicsPipelineCreateInfo vk_pipeline_info = {
.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
.stageCount = ARRAY_SIZE(pipeline_shader_stages),
.pStages = pipeline_shader_stages,
.pVertexInputState = &vi_create_info,
.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
.primitiveRestartEnable = false,
},
.pViewportState = &(VkPipelineViewportStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
.viewportCount = 1,
.scissorCount = 1,
},
.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
.cullMode = VK_CULL_MODE_NONE,
.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
},
.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
.rasterizationSamples = 1,
.sampleShadingEnable = false,
.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
},
.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
.dynamicStateCount = 4,
.pDynamicStates = (VkDynamicState[]) {
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
VK_DYNAMIC_STATE_LINE_WIDTH,
VK_DYNAMIC_STATE_BLEND_CONSTANTS,
},
},
.flags = 0,
.layout = device->meta_state.blit.pipeline_layout,
.renderPass = rp,
.subpass = 0,
};
VkPipelineColorBlendStateCreateInfo color_blend_info = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
.attachmentCount = 1,
.pAttachments = (VkPipelineColorBlendAttachmentState []) {
{
.colorWriteMask = VK_COLOR_COMPONENT_A_BIT |
VK_COLOR_COMPONENT_R_BIT |
VK_COLOR_COMPONENT_G_BIT |
VK_COLOR_COMPONENT_B_BIT },
}
};
VkPipelineDepthStencilStateCreateInfo depth_info = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
.depthTestEnable = true,
.depthWriteEnable = true,
.depthCompareOp = VK_COMPARE_OP_ALWAYS,
};
VkPipelineDepthStencilStateCreateInfo stencil_info = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
.depthTestEnable = false,
.depthWriteEnable = false,
.stencilTestEnable = true,
.front = {
.failOp = VK_STENCIL_OP_REPLACE,
.passOp = VK_STENCIL_OP_REPLACE,
.depthFailOp = VK_STENCIL_OP_REPLACE,
.compareOp = VK_COMPARE_OP_ALWAYS,
.compareMask = 0xff,
.writeMask = 0xff,
.reference = 0
},
.back = {
.failOp = VK_STENCIL_OP_REPLACE,
.passOp = VK_STENCIL_OP_REPLACE,
.depthFailOp = VK_STENCIL_OP_REPLACE,
.compareOp = VK_COMPARE_OP_ALWAYS,
.compareMask = 0xff,
.writeMask = 0xff,
.reference = 0
},
.depthCompareOp = VK_COMPARE_OP_ALWAYS,
};
switch(aspect) {
case VK_IMAGE_ASPECT_COLOR_BIT:
vk_pipeline_info.pColorBlendState = &color_blend_info;
break;
case VK_IMAGE_ASPECT_DEPTH_BIT:
vk_pipeline_info.pDepthStencilState = &depth_info;
break;
case VK_IMAGE_ASPECT_STENCIL_BIT:
vk_pipeline_info.pDepthStencilState = &stencil_info;
break;
default:
unreachable("Unhandled aspect");
}
const struct radv_graphics_pipeline_create_info radv_pipeline_info = {
.use_rectlist = true
};
result = radv_graphics_pipeline_create(radv_device_to_handle(device),
radv_pipeline_cache_to_handle(&device->meta_state.cache),
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, pipeline);
ralloc_free(vs.nir);
ralloc_free(fs.nir);
mtx_unlock(&device->meta_state.mtx);
return result;
}
static VkFormat pipeline_formats[] = {
VK_FORMAT_R8G8B8A8_UNORM,
VK_FORMAT_R8G8B8A8_UINT,
VK_FORMAT_R8G8B8A8_SINT,
VK_FORMAT_A2R10G10B10_UINT_PACK32,
VK_FORMAT_A2R10G10B10_SINT_PACK32,
VK_FORMAT_R16G16B16A16_UNORM,
VK_FORMAT_R16G16B16A16_SNORM,
VK_FORMAT_R16G16B16A16_UINT,
VK_FORMAT_R16G16B16A16_SINT,
VK_FORMAT_R32_SFLOAT,
VK_FORMAT_R32G32_SFLOAT,
VK_FORMAT_R32G32B32A32_SFLOAT
};
static VkResult
radv_device_init_meta_blit_color(struct radv_device *device, bool on_demand)
radv_device_init_meta_blit_color(struct radv_device *device,
struct radv_shader_module *vs)
{
struct radv_shader_module fs_1d = {0}, fs_2d = {0}, fs_3d = {0};
VkResult result;
for (unsigned i = 0; i < NUM_META_FS_KEYS; ++i) {
unsigned key = radv_format_meta_fs_key(radv_fs_key_format_exemplars[i]);
fs_1d.nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_1D);
fs_2d.nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_2D);
fs_3d.nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_3D);
for (unsigned i = 0; i < ARRAY_SIZE(pipeline_formats); ++i) {
unsigned key = radv_format_meta_fs_key(pipeline_formats[i]);
for(unsigned j = 0; j < RADV_META_DST_LAYOUT_COUNT; ++j) {
VkImageLayout layout = radv_meta_dst_layout_to_layout(j);
result = radv_CreateRenderPass(radv_device_to_handle(device),
@@ -936,7 +749,7 @@ radv_device_init_meta_blit_color(struct radv_device *device, bool on_demand)
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
.attachmentCount = 1,
.pAttachments = &(VkAttachmentDescription) {
.format = radv_fs_key_format_exemplars[i],
.format = pipeline_formats[i],
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
.initialLayout = layout,
@@ -965,18 +778,108 @@ radv_device_init_meta_blit_color(struct radv_device *device, bool on_demand)
goto fail;
}
if (on_demand)
continue;
VkPipelineVertexInputStateCreateInfo vi_create_info = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
.vertexBindingDescriptionCount = 0,
.vertexAttributeDescriptionCount = 0,
};
result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_1D, key, &device->meta_state.blit.pipeline_1d_src[key]);
VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
{
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(vs),
.pName = "main",
.pSpecializationInfo = NULL
}, {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = VK_NULL_HANDLE, /* TEMPLATE VALUE! FILL ME IN! */
.pName = "main",
.pSpecializationInfo = NULL
},
};
const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
.stageCount = ARRAY_SIZE(pipeline_shader_stages),
.pStages = pipeline_shader_stages,
.pVertexInputState = &vi_create_info,
.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
.primitiveRestartEnable = false,
},
.pViewportState = &(VkPipelineViewportStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
.viewportCount = 1,
.scissorCount = 1,
},
.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
.cullMode = VK_CULL_MODE_NONE,
.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
},
.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
.rasterizationSamples = 1,
.sampleShadingEnable = false,
.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
},
.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
.attachmentCount = 1,
.pAttachments = (VkPipelineColorBlendAttachmentState []) {
{ .colorWriteMask =
VK_COLOR_COMPONENT_A_BIT |
VK_COLOR_COMPONENT_R_BIT |
VK_COLOR_COMPONENT_G_BIT |
VK_COLOR_COMPONENT_B_BIT },
}
},
.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
.dynamicStateCount = 4,
.pDynamicStates = (VkDynamicState[]) {
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
VK_DYNAMIC_STATE_LINE_WIDTH,
VK_DYNAMIC_STATE_BLEND_CONSTANTS,
},
},
.flags = 0,
.layout = device->meta_state.blit.pipeline_layout,
.renderPass = device->meta_state.blit.render_pass[key][0],
.subpass = 0,
};
const struct radv_graphics_pipeline_create_info radv_pipeline_info = {
.use_rectlist = true
};
pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_1d);
result = radv_graphics_pipeline_create(radv_device_to_handle(device),
radv_pipeline_cache_to_handle(&device->meta_state.cache),
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, &device->meta_state.blit.pipeline_1d_src[key]);
if (result != VK_SUCCESS)
goto fail;
result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_2D, key, &device->meta_state.blit.pipeline_2d_src[key]);
pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_2d);
result = radv_graphics_pipeline_create(radv_device_to_handle(device),
radv_pipeline_cache_to_handle(&device->meta_state.cache),
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, &device->meta_state.blit.pipeline_2d_src[key]);
if (result != VK_SUCCESS)
goto fail;
result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_3D, key, &device->meta_state.blit.pipeline_3d_src[key]);
pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_3d);
result = radv_graphics_pipeline_create(radv_device_to_handle(device),
radv_pipeline_cache_to_handle(&device->meta_state.cache),
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, &device->meta_state.blit.pipeline_3d_src[key]);
if (result != VK_SUCCESS)
goto fail;
@@ -984,14 +887,23 @@ radv_device_init_meta_blit_color(struct radv_device *device, bool on_demand)
result = VK_SUCCESS;
fail:
ralloc_free(fs_1d.nir);
ralloc_free(fs_2d.nir);
ralloc_free(fs_3d.nir);
return result;
}
static VkResult
radv_device_init_meta_blit_depth(struct radv_device *device, bool on_demand)
radv_device_init_meta_blit_depth(struct radv_device *device,
struct radv_shader_module *vs)
{
struct radv_shader_module fs_1d = {0}, fs_2d = {0}, fs_3d = {0};
VkResult result;
fs_1d.nir = build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_1D);
fs_2d.nir = build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_2D);
fs_3d.nir = build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_3D);
for (enum radv_blit_ds_layout ds_layout = RADV_BLIT_DS_LAYOUT_TILE_ENABLE; ds_layout < RADV_BLIT_DS_LAYOUT_COUNT; ds_layout++) {
VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout);
result = radv_CreateRenderPass(radv_device_to_handle(device),
@@ -1025,30 +937,134 @@ radv_device_init_meta_blit_depth(struct radv_device *device, bool on_demand)
goto fail;
}
if (on_demand)
return VK_SUCCESS;
VkPipelineVertexInputStateCreateInfo vi_create_info = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
.vertexBindingDescriptionCount = 0,
.vertexAttributeDescriptionCount = 0,
};
result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_1D, 0, &device->meta_state.blit.depth_only_1d_pipeline);
VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
{
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(vs),
.pName = "main",
.pSpecializationInfo = NULL
}, {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = VK_NULL_HANDLE, /* TEMPLATE VALUE! FILL ME IN! */
.pName = "main",
.pSpecializationInfo = NULL
},
};
const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
.stageCount = ARRAY_SIZE(pipeline_shader_stages),
.pStages = pipeline_shader_stages,
.pVertexInputState = &vi_create_info,
.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
.primitiveRestartEnable = false,
},
.pViewportState = &(VkPipelineViewportStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
.viewportCount = 1,
.scissorCount = 1,
},
.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
.cullMode = VK_CULL_MODE_NONE,
.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
},
.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
.rasterizationSamples = 1,
.sampleShadingEnable = false,
.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
},
.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
.attachmentCount = 0,
.pAttachments = NULL,
},
.pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
.depthTestEnable = true,
.depthWriteEnable = true,
.depthCompareOp = VK_COMPARE_OP_ALWAYS,
},
.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
.dynamicStateCount = 9,
.pDynamicStates = (VkDynamicState[]) {
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
VK_DYNAMIC_STATE_LINE_WIDTH,
VK_DYNAMIC_STATE_DEPTH_BIAS,
VK_DYNAMIC_STATE_BLEND_CONSTANTS,
VK_DYNAMIC_STATE_DEPTH_BOUNDS,
VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
VK_DYNAMIC_STATE_STENCIL_REFERENCE,
},
},
.flags = 0,
.layout = device->meta_state.blit.pipeline_layout,
.renderPass = device->meta_state.blit.depth_only_rp[0],
.subpass = 0,
};
const struct radv_graphics_pipeline_create_info radv_pipeline_info = {
.use_rectlist = true
};
pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_1d);
result = radv_graphics_pipeline_create(radv_device_to_handle(device),
radv_pipeline_cache_to_handle(&device->meta_state.cache),
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, &device->meta_state.blit.depth_only_1d_pipeline);
if (result != VK_SUCCESS)
goto fail;
result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_2D, 0, &device->meta_state.blit.depth_only_2d_pipeline);
pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_2d);
result = radv_graphics_pipeline_create(radv_device_to_handle(device),
radv_pipeline_cache_to_handle(&device->meta_state.cache),
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, &device->meta_state.blit.depth_only_2d_pipeline);
if (result != VK_SUCCESS)
goto fail;
result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_3D, 0, &device->meta_state.blit.depth_only_3d_pipeline);
pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_3d);
result = radv_graphics_pipeline_create(radv_device_to_handle(device),
radv_pipeline_cache_to_handle(&device->meta_state.cache),
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, &device->meta_state.blit.depth_only_3d_pipeline);
if (result != VK_SUCCESS)
goto fail;
fail:
ralloc_free(fs_1d.nir);
ralloc_free(fs_2d.nir);
ralloc_free(fs_3d.nir);
return result;
}
static VkResult
radv_device_init_meta_blit_stencil(struct radv_device *device, bool on_demand)
radv_device_init_meta_blit_stencil(struct radv_device *device,
struct radv_shader_module *vs)
{
struct radv_shader_module fs_1d = {0}, fs_2d = {0}, fs_3d = {0};
VkResult result;
fs_1d.nir = build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_1D);
fs_2d.nir = build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_2D);
fs_3d.nir = build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_3D);
for (enum radv_blit_ds_layout ds_layout = RADV_BLIT_DS_LAYOUT_TILE_ENABLE; ds_layout < RADV_BLIT_DS_LAYOUT_COUNT; ds_layout++) {
VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout);
result = radv_CreateRenderPass(radv_device_to_handle(device),
@@ -1082,30 +1098,145 @@ radv_device_init_meta_blit_stencil(struct radv_device *device, bool on_demand)
if (result != VK_SUCCESS)
goto fail;
if (on_demand)
return VK_SUCCESS;
VkPipelineVertexInputStateCreateInfo vi_create_info = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
.vertexBindingDescriptionCount = 0,
.vertexAttributeDescriptionCount = 0,
};
result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_1D, 0, &device->meta_state.blit.stencil_only_1d_pipeline);
VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
{
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(vs),
.pName = "main",
.pSpecializationInfo = NULL
}, {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = VK_NULL_HANDLE, /* TEMPLATE VALUE! FILL ME IN! */
.pName = "main",
.pSpecializationInfo = NULL
},
};
const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
.stageCount = ARRAY_SIZE(pipeline_shader_stages),
.pStages = pipeline_shader_stages,
.pVertexInputState = &vi_create_info,
.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
.primitiveRestartEnable = false,
},
.pViewportState = &(VkPipelineViewportStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
.viewportCount = 1,
.scissorCount = 1,
},
.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
.cullMode = VK_CULL_MODE_NONE,
.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
},
.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
.rasterizationSamples = 1,
.sampleShadingEnable = false,
.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
},
.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
.attachmentCount = 0,
.pAttachments = NULL,
},
.pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
.depthTestEnable = false,
.depthWriteEnable = false,
.stencilTestEnable = true,
.front = {
.failOp = VK_STENCIL_OP_REPLACE,
.passOp = VK_STENCIL_OP_REPLACE,
.depthFailOp = VK_STENCIL_OP_REPLACE,
.compareOp = VK_COMPARE_OP_ALWAYS,
.compareMask = 0xff,
.writeMask = 0xff,
.reference = 0
},
.back = {
.failOp = VK_STENCIL_OP_REPLACE,
.passOp = VK_STENCIL_OP_REPLACE,
.depthFailOp = VK_STENCIL_OP_REPLACE,
.compareOp = VK_COMPARE_OP_ALWAYS,
.compareMask = 0xff,
.writeMask = 0xff,
.reference = 0
},
.depthCompareOp = VK_COMPARE_OP_ALWAYS,
},
.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
.dynamicStateCount = 6,
.pDynamicStates = (VkDynamicState[]) {
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
VK_DYNAMIC_STATE_LINE_WIDTH,
VK_DYNAMIC_STATE_DEPTH_BIAS,
VK_DYNAMIC_STATE_BLEND_CONSTANTS,
VK_DYNAMIC_STATE_DEPTH_BOUNDS,
},
},
.flags = 0,
.layout = device->meta_state.blit.pipeline_layout,
.renderPass = device->meta_state.blit.stencil_only_rp[0],
.subpass = 0,
};
const struct radv_graphics_pipeline_create_info radv_pipeline_info = {
.use_rectlist = true
};
pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_1d);
result = radv_graphics_pipeline_create(radv_device_to_handle(device),
radv_pipeline_cache_to_handle(&device->meta_state.cache),
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, &device->meta_state.blit.stencil_only_1d_pipeline);
if (result != VK_SUCCESS)
goto fail;
result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_2D, 0, &device->meta_state.blit.stencil_only_2d_pipeline);
pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_2d);
result = radv_graphics_pipeline_create(radv_device_to_handle(device),
radv_pipeline_cache_to_handle(&device->meta_state.cache),
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, &device->meta_state.blit.stencil_only_2d_pipeline);
if (result != VK_SUCCESS)
goto fail;
result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_3D, 0, &device->meta_state.blit.stencil_only_3d_pipeline);
pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_3d);
result = radv_graphics_pipeline_create(radv_device_to_handle(device),
radv_pipeline_cache_to_handle(&device->meta_state.cache),
&vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, &device->meta_state.blit.stencil_only_3d_pipeline);
if (result != VK_SUCCESS)
goto fail;
fail:
ralloc_free(fs_1d.nir);
ralloc_free(fs_2d.nir);
ralloc_free(fs_3d.nir);
return result;
}
VkResult
radv_device_init_meta_blit_state(struct radv_device *device, bool on_demand)
radv_device_init_meta_blit_state(struct radv_device *device)
{
VkResult result;
struct radv_shader_module vs = {0};
VkDescriptorSetLayoutCreateInfo ds_layout_info = {
.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
@@ -1142,17 +1273,20 @@ radv_device_init_meta_blit_state(struct radv_device *device, bool on_demand)
if (result != VK_SUCCESS)
goto fail;
result = radv_device_init_meta_blit_color(device, on_demand);
vs.nir = build_nir_vertex_shader();
result = radv_device_init_meta_blit_color(device, &vs);
if (result != VK_SUCCESS)
goto fail;
result = radv_device_init_meta_blit_depth(device, on_demand);
result = radv_device_init_meta_blit_depth(device, &vs);
if (result != VK_SUCCESS)
goto fail;
result = radv_device_init_meta_blit_stencil(device, on_demand);
result = radv_device_init_meta_blit_stencil(device, &vs);
fail:
ralloc_free(vs.nir);
if (result != VK_SUCCESS)
radv_device_finish_meta_blit_state(device);
return result;

View File

@@ -35,22 +35,6 @@ enum blit2d_src_type {
BLIT2D_NUM_SRC_TYPES,
};
static VkResult
blit2d_init_color_pipeline(struct radv_device *device,
enum blit2d_src_type src_type,
VkFormat format,
uint32_t log2_samples);
static VkResult
blit2d_init_depth_only_pipeline(struct radv_device *device,
enum blit2d_src_type src_type,
uint32_t log2_samples);
static VkResult
blit2d_init_stencil_only_pipeline(struct radv_device *device,
enum blit2d_src_type src_type,
uint32_t log2_samples);
static void
create_iview(struct radv_cmd_buffer *cmd_buffer,
struct radv_meta_blit2d_surf *surf,
@@ -284,14 +268,6 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
unsigned fs_key = radv_format_meta_fs_key(dst_temps.iview.vk_format);
unsigned dst_layout = radv_meta_dst_layout_from_layout(dst->current_layout);
if (device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key] == VK_NULL_HANDLE) {
VkResult ret = blit2d_init_color_pipeline(device, src_type, radv_fs_key_format_exemplars[fs_key], log2_samples);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
goto fail_pipeline;
}
}
radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
&(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
@@ -309,15 +285,6 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
bind_pipeline(cmd_buffer, src_type, fs_key, log2_samples);
} else if (aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) {
enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dst->current_layout);
if (device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type] == VK_NULL_HANDLE) {
VkResult ret = blit2d_init_depth_only_pipeline(device, src_type, log2_samples);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
goto fail_pipeline;
}
}
radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
&(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
@@ -336,15 +303,6 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
} else if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {
enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dst->current_layout);
if (device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type] == VK_NULL_HANDLE) {
VkResult ret = blit2d_init_stencil_only_pipeline(device, src_type, log2_samples);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
goto fail_pipeline;
}
}
radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
&(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
@@ -379,10 +337,26 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
if (log2_samples > 0) {
for (uint32_t sample = 0; sample < src_img->image->info.samples; sample++) {
uint32_t sample_mask = 1 << sample;
radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
device->meta_state.blit2d[log2_samples].p_layouts[src_type],
VK_SHADER_STAGE_FRAGMENT_BIT, 20, 4,
&sample);
radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
device->meta_state.blit2d[log2_samples].p_layouts[src_type],
VK_SHADER_STAGE_FRAGMENT_BIT, 24, 4,
&sample_mask);
radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
}
}
else
radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer));
fail_pipeline:
/* At the point where we emit the draw call, all data from the
* descriptor sets, etc. has been used. We are free to delete it.
*/
@@ -503,7 +477,10 @@ build_nir_texel_fetch(struct nir_builder *b, struct radv_device *device,
tex_pos_3d = nir_vec(b, chans, 3);
}
if (is_multisampled) {
sample_idx = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_sample_id);
sample_idx = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_push_constant);
nir_intrinsic_set_base(sample_idx, 20);
nir_intrinsic_set_range(sample_idx, 4);
sample_idx->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
sample_idx->num_components = 1;
nir_ssa_dest_init(&sample_idx->instr, &sample_idx->dest, 1, 32, "sample_idx");
nir_builder_instr_insert(b, &sample_idx->instr);
@@ -558,6 +535,7 @@ build_nir_buffer_fetch(struct nir_builder *b, struct radv_device *device,
nir_ssa_def *pos_y = nir_channel(b, tex_pos, 1);
pos_y = nir_imul(b, pos_y, &width->dest.ssa);
pos_x = nir_iadd(b, pos_x, pos_y);
//pos_x = nir_iadd(b, pos_x, nir_imm_int(b, 100000));
nir_ssa_def *tex_deref = &nir_build_deref_var(b, sampler)->dest.ssa;
@@ -584,6 +562,27 @@ static const VkPipelineVertexInputStateCreateInfo normal_vi_create_info = {
.vertexAttributeDescriptionCount = 0,
};
static void
build_nir_store_sample_mask(struct nir_builder *b)
{
nir_intrinsic_instr *sample_mask = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_push_constant);
nir_intrinsic_set_base(sample_mask, 24);
nir_intrinsic_set_range(sample_mask, 4);
sample_mask->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
sample_mask->num_components = 1;
nir_ssa_dest_init(&sample_mask->instr, &sample_mask->dest, 1, 32, "sample_mask");
nir_builder_instr_insert(b, &sample_mask->instr);
const struct glsl_type *sample_mask_out_type = glsl_uint_type();
nir_variable *sample_mask_out =
nir_variable_create(b->shader, nir_var_shader_out,
sample_mask_out_type, "sample_mask_out");
sample_mask_out->data.location = FRAG_RESULT_SAMPLE_MASK;
nir_store_var(b, sample_mask_out, &sample_mask->dest.ssa, 0x1);
}
static nir_shader *
build_nir_copy_fragment_shader(struct radv_device *device,
texel_fetch_build_func txf_func, const char* name, bool is_3d,
@@ -604,6 +603,10 @@ build_nir_copy_fragment_shader(struct radv_device *device,
vec4, "f_color");
color_out->data.location = FRAG_RESULT_DATA0;
if (is_multisampled) {
build_nir_store_sample_mask(&b);
}
nir_ssa_def *pos_int = nir_f2i32(&b, nir_load_var(&b, tex_pos_in));
nir_ssa_def *tex_pos = nir_channels(&b, pos_int, 0x3);
@@ -633,6 +636,10 @@ build_nir_copy_fragment_shader_depth(struct radv_device *device,
vec4, "f_color");
color_out->data.location = FRAG_RESULT_DEPTH;
if (is_multisampled) {
build_nir_store_sample_mask(&b);
}
nir_ssa_def *pos_int = nir_f2i32(&b, nir_load_var(&b, tex_pos_in));
nir_ssa_def *tex_pos = nir_channels(&b, pos_int, 0x3);
@@ -662,6 +669,10 @@ build_nir_copy_fragment_shader_stencil(struct radv_device *device,
vec4, "f_color");
color_out->data.location = FRAG_RESULT_STENCIL;
if (is_multisampled) {
build_nir_store_sample_mask(&b);
}
nir_ssa_def *pos_int = nir_f2i32(&b, nir_load_var(&b, tex_pos_in));
nir_ssa_def *tex_pos = nir_channels(&b, pos_int, 0x3);
@@ -726,12 +737,6 @@ blit2d_init_color_pipeline(struct radv_device *device,
unsigned fs_key = radv_format_meta_fs_key(format);
const char *name;
mtx_lock(&device->meta_state.mtx);
if (device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key]) {
mtx_unlock(&device->meta_state.mtx);
return VK_SUCCESS;
}
texel_fetch_build_func src_func;
switch(src_type) {
case BLIT2D_SRC_TYPE_IMAGE:
@@ -840,8 +845,7 @@ blit2d_init_color_pipeline(struct radv_device *device,
.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
.rasterizationSamples = 1 << log2_samples,
.sampleShadingEnable = log2_samples > 1,
.minSampleShading = 1.0,
.sampleShadingEnable = false,
.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
},
.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
@@ -890,7 +894,6 @@ blit2d_init_color_pipeline(struct radv_device *device,
ralloc_free(vs.nir);
ralloc_free(fs.nir);
mtx_unlock(&device->meta_state.mtx);
return result;
}
@@ -902,12 +905,6 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
VkResult result;
const char *name;
mtx_lock(&device->meta_state.mtx);
if (device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type]) {
mtx_unlock(&device->meta_state.mtx);
return VK_SUCCESS;
}
texel_fetch_build_func src_func;
switch(src_type) {
case BLIT2D_SRC_TYPE_IMAGE:
@@ -1060,7 +1057,6 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
ralloc_free(vs.nir);
ralloc_free(fs.nir);
mtx_unlock(&device->meta_state.mtx);
return result;
}
@@ -1072,12 +1068,6 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
VkResult result;
const char *name;
mtx_lock(&device->meta_state.mtx);
if (device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type]) {
mtx_unlock(&device->meta_state.mtx);
return VK_SUCCESS;
}
texel_fetch_build_func src_func;
switch(src_type) {
case BLIT2D_SRC_TYPE_IMAGE:
@@ -1246,10 +1236,24 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
ralloc_free(vs.nir);
ralloc_free(fs.nir);
mtx_unlock(&device->meta_state.mtx);
return result;
}
static VkFormat pipeline_formats[] = {
VK_FORMAT_R8G8B8A8_UNORM,
VK_FORMAT_R8G8B8A8_UINT,
VK_FORMAT_R8G8B8A8_SINT,
VK_FORMAT_A2R10G10B10_UINT_PACK32,
VK_FORMAT_A2R10G10B10_SINT_PACK32,
VK_FORMAT_R16G16B16A16_UNORM,
VK_FORMAT_R16G16B16A16_SNORM,
VK_FORMAT_R16G16B16A16_UINT,
VK_FORMAT_R16G16B16A16_SINT,
VK_FORMAT_R32_SFLOAT,
VK_FORMAT_R32G32_SFLOAT,
VK_FORMAT_R32G32B32A32_SFLOAT
};
static VkResult
meta_blit2d_create_pipe_layout(struct radv_device *device,
int idx,
@@ -1259,7 +1263,7 @@ meta_blit2d_create_pipe_layout(struct radv_device *device,
VkDescriptorType desc_type = (idx == BLIT2D_SRC_TYPE_BUFFER) ? VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER : VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE;
const VkPushConstantRange push_constant_ranges[] = {
{VK_SHADER_STAGE_VERTEX_BIT, 0, 16},
{VK_SHADER_STAGE_FRAGMENT_BIT, 16, 4},
{VK_SHADER_STAGE_FRAGMENT_BIT, 16, 12},
};
int num_push_constant_range = (idx != BLIT2D_SRC_TYPE_IMAGE || log2_samples > 0) ? 2 : 1;
@@ -1298,7 +1302,7 @@ fail:
}
VkResult
radv_device_init_meta_blit2d_state(struct radv_device *device, bool on_demand)
radv_device_init_meta_blit2d_state(struct radv_device *device)
{
VkResult result;
bool create_3d = device->physical_device->rad_info.chip_class >= GFX9;
@@ -1316,11 +1320,8 @@ radv_device_init_meta_blit2d_state(struct radv_device *device, bool on_demand)
if (result != VK_SUCCESS)
goto fail;
if (on_demand)
continue;
for (unsigned j = 0; j < NUM_META_FS_KEYS; ++j) {
result = blit2d_init_color_pipeline(device, src, radv_fs_key_format_exemplars[j], log2_samples);
for (unsigned j = 0; j < ARRAY_SIZE(pipeline_formats); ++j) {
result = blit2d_init_color_pipeline(device, src, pipeline_formats[j], log2_samples);
if (result != VK_SUCCESS)
goto fail;
}

View File

@@ -513,7 +513,7 @@ void radv_CmdUpdateBuffer(
if (!dataSize)
return;
if (dataSize < RADV_BUFFER_UPDATE_THRESHOLD) {
if (dataSize < RADV_BUFFER_OPS_CS_THRESHOLD) {
si_emit_cache_flush(cmd_buffer);
radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, dst_buffer->bo);

File diff suppressed because it is too large Load Diff

View File

@@ -200,13 +200,7 @@ create_color_renderpass(struct radv_device *device,
uint32_t samples,
VkRenderPass *pass)
{
mtx_lock(&device->meta_state.mtx);
if (*pass) {
mtx_unlock (&device->meta_state.mtx);
return VK_SUCCESS;
}
VkResult result = radv_CreateRenderPass(radv_device_to_handle(device),
return radv_CreateRenderPass(radv_device_to_handle(device),
&(VkRenderPassCreateInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
.attachmentCount = 1,
@@ -237,8 +231,6 @@ create_color_renderpass(struct radv_device *device,
},
.dependencyCount = 0,
}, &device->meta_state.alloc, pass);
mtx_unlock(&device->meta_state.mtx);
return result;
}
static VkResult
@@ -251,13 +243,6 @@ create_color_pipeline(struct radv_device *device,
struct nir_shader *vs_nir;
struct nir_shader *fs_nir;
VkResult result;
mtx_lock(&device->meta_state.mtx);
if (*pipeline) {
mtx_unlock(&device->meta_state.mtx);
return VK_SUCCESS;
}
build_color_shaders(&vs_nir, &fs_nir, frag_output);
const VkPipelineVertexInputStateCreateInfo vi_state = {
@@ -299,7 +284,6 @@ create_color_pipeline(struct radv_device *device,
device->meta_state.clear_color_p_layout,
&extra, &device->meta_state.alloc, pipeline);
mtx_unlock(&device->meta_state.mtx);
return result;
}
@@ -352,54 +336,19 @@ emit_color_clear(struct radv_cmd_buffer *cmd_buffer,
const struct radv_framebuffer *fb = cmd_buffer->state.framebuffer;
const uint32_t subpass_att = clear_att->colorAttachment;
const uint32_t pass_att = subpass->color_attachments[subpass_att].attachment;
const struct radv_image_view *iview = fb ? fb->attachments[pass_att].attachment : NULL;
uint32_t samples, samples_log2;
VkFormat format;
unsigned fs_key;
const struct radv_image_view *iview = fb->attachments[pass_att].attachment;
const uint32_t samples = iview->image->info.samples;
const uint32_t samples_log2 = ffs(samples) - 1;
unsigned fs_key = radv_format_meta_fs_key(iview->vk_format);
VkClearColorValue clear_value = clear_att->clearValue.color;
VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
VkPipeline pipeline;
/* When a framebuffer is bound to the current command buffer, get the
* number of samples from it. Otherwise, get the number of samples from
* the render pass because it's likely a secondary command buffer.
*/
if (iview) {
samples = iview->image->info.samples;
format = iview->vk_format;
} else {
samples = cmd_buffer->state.pass->attachments[pass_att].samples;
format = cmd_buffer->state.pass->attachments[pass_att].format;
}
samples_log2 = ffs(samples) - 1;
fs_key = radv_format_meta_fs_key(format);
if (fs_key == -1) {
radv_finishme("color clears incomplete");
return;
}
if (device->meta_state.clear[samples_log2].render_pass[fs_key] == VK_NULL_HANDLE) {
VkResult ret = create_color_renderpass(device, radv_fs_key_format_exemplars[fs_key],
samples,
&device->meta_state.clear[samples_log2].render_pass[fs_key]);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
return;
}
}
if (device->meta_state.clear[samples_log2].color_pipelines[fs_key] == VK_NULL_HANDLE) {
VkResult ret = create_color_pipeline(device, samples, 0,
&device->meta_state.clear[samples_log2].color_pipelines[fs_key],
device->meta_state.clear[samples_log2].render_pass[fs_key]);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
return;
}
}
pipeline = device->meta_state.clear[samples_log2].color_pipelines[fs_key];
if (!pipeline) {
radv_finishme("color clears incomplete");
@@ -500,13 +449,7 @@ create_depthstencil_renderpass(struct radv_device *device,
uint32_t samples,
VkRenderPass *render_pass)
{
mtx_lock(&device->meta_state.mtx);
if (*render_pass) {
mtx_unlock(&device->meta_state.mtx);
return VK_SUCCESS;
}
VkResult result = radv_CreateRenderPass(radv_device_to_handle(device),
return radv_CreateRenderPass(radv_device_to_handle(device),
&(VkRenderPassCreateInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
.attachmentCount = 1,
@@ -534,8 +477,6 @@ create_depthstencil_renderpass(struct radv_device *device,
},
.dependencyCount = 0,
}, &device->meta_state.alloc, render_pass);
mtx_unlock(&device->meta_state.mtx);
return result;
}
static VkResult
@@ -548,13 +489,6 @@ create_depthstencil_pipeline(struct radv_device *device,
{
struct nir_shader *vs_nir, *fs_nir;
VkResult result;
mtx_lock(&device->meta_state.mtx);
if (*pipeline) {
mtx_unlock(&device->meta_state.mtx);
return VK_SUCCESS;
}
build_depthstencil_shader(&vs_nir, &fs_nir);
const VkPipelineVertexInputStateCreateInfo vi_state = {
@@ -602,8 +536,6 @@ create_depthstencil_pipeline(struct radv_device *device,
samples, vs_nir, fs_nir, &vi_state, &ds_state, &cb_state,
device->meta_state.clear_depth_p_layout,
&extra, &device->meta_state.alloc, pipeline);
mtx_unlock(&device->meta_state.mtx);
return result;
}
@@ -614,9 +546,6 @@ static bool depth_view_can_fast_clear(struct radv_cmd_buffer *cmd_buffer,
const VkClearRect *clear_rect,
VkClearDepthStencilValue clear_value)
{
if (!iview)
return false;
uint32_t queue_mask = radv_image_queue_family_mask(iview->image,
cmd_buffer->queue_family_index,
cmd_buffer->queue_family_index);
@@ -633,7 +562,7 @@ static bool depth_view_can_fast_clear(struct radv_cmd_buffer *cmd_buffer,
iview->base_mip == 0 &&
iview->base_layer == 0 &&
radv_layout_is_htile_compressed(iview->image, layout, queue_mask) &&
radv_image_extent_compare(iview->image, &iview->extent))
!radv_image_extent_compare(iview->image, &iview->extent))
return true;
return false;
}
@@ -650,7 +579,6 @@ pick_depthstencil_pipeline(struct radv_cmd_buffer *cmd_buffer,
{
bool fast = depth_view_can_fast_clear(cmd_buffer, iview, aspects, layout, clear_rect, clear_value);
int index = DEPTH_CLEAR_SLOW;
VkPipeline *pipeline;
if (fast) {
/* we don't know the previous clear values, so we always have
@@ -660,36 +588,13 @@ pick_depthstencil_pipeline(struct radv_cmd_buffer *cmd_buffer,
switch (aspects) {
case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
pipeline = &meta_state->clear[samples_log2].depthstencil_pipeline[index];
break;
return meta_state->clear[samples_log2].depthstencil_pipeline[index];
case VK_IMAGE_ASPECT_DEPTH_BIT:
pipeline = &meta_state->clear[samples_log2].depth_only_pipeline[index];
break;
return meta_state->clear[samples_log2].depth_only_pipeline[index];
case VK_IMAGE_ASPECT_STENCIL_BIT:
pipeline = &meta_state->clear[samples_log2].stencil_only_pipeline[index];
break;
default:
unreachable("expected depth or stencil aspect");
return meta_state->clear[samples_log2].stencil_only_pipeline[index];
}
if (cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp == VK_NULL_HANDLE) {
VkResult ret = create_depthstencil_renderpass(cmd_buffer->device, 1u << samples_log2,
&cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
return VK_NULL_HANDLE;
}
}
if (*pipeline == VK_NULL_HANDLE) {
VkResult ret = create_depthstencil_pipeline(cmd_buffer->device, aspects, 1u << samples_log2, index,
pipeline, cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
return VK_NULL_HANDLE;
}
}
return *pipeline;
unreachable("expected depth or stencil aspect");
}
static void
@@ -704,22 +609,11 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer,
const uint32_t pass_att = subpass->depth_stencil_attachment.attachment;
VkClearDepthStencilValue clear_value = clear_att->clearValue.depthStencil;
VkImageAspectFlags aspects = clear_att->aspectMask;
const struct radv_image_view *iview = fb ? fb->attachments[pass_att].attachment : NULL;
uint32_t samples, samples_log2;
const struct radv_image_view *iview = fb->attachments[pass_att].attachment;
const uint32_t samples = iview->image->info.samples;
const uint32_t samples_log2 = ffs(samples) - 1;
VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
/* When a framebuffer is bound to the current command buffer, get the
* number of samples from it. Otherwise, get the number of samples from
* the render pass because it's likely a secondary command buffer.
*/
if (iview) {
samples = iview->image->info.samples;
} else {
samples = cmd_buffer->state.pass->attachments[pass_att].samples;
}
samples_log2 = ffs(samples) - 1;
assert(pass_att != VK_ATTACHMENT_UNUSED);
if (!(aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
@@ -744,8 +638,6 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer,
subpass->depth_stencil_attachment.layout,
clear_rect,
clear_value);
if (!pipeline)
return;
radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
pipeline);
@@ -786,14 +678,11 @@ emit_fast_htile_clear(struct radv_cmd_buffer *cmd_buffer,
const uint32_t pass_att = subpass->depth_stencil_attachment.attachment;
VkImageLayout image_layout = subpass->depth_stencil_attachment.layout;
const struct radv_framebuffer *fb = cmd_buffer->state.framebuffer;
const struct radv_image_view *iview = fb ? fb->attachments[pass_att].attachment : NULL;
const struct radv_image_view *iview = fb->attachments[pass_att].attachment;
VkClearDepthStencilValue clear_value = clear_att->clearValue.depthStencil;
VkImageAspectFlags aspects = clear_att->aspectMask;
uint32_t clear_word, flush_bits;
if (!iview)
return false;
if (!radv_image_has_htile(iview->image))
return false;
@@ -868,8 +757,23 @@ fail:
return false;
}
static VkFormat pipeline_formats[] = {
VK_FORMAT_R8G8B8A8_UNORM,
VK_FORMAT_R8G8B8A8_UINT,
VK_FORMAT_R8G8B8A8_SINT,
VK_FORMAT_A2R10G10B10_UINT_PACK32,
VK_FORMAT_A2R10G10B10_SINT_PACK32,
VK_FORMAT_R16G16B16A16_UNORM,
VK_FORMAT_R16G16B16A16_SNORM,
VK_FORMAT_R16G16B16A16_UINT,
VK_FORMAT_R16G16B16A16_SINT,
VK_FORMAT_R32_SFLOAT,
VK_FORMAT_R32G32_SFLOAT,
VK_FORMAT_R32G32B32A32_SFLOAT
};
VkResult
radv_device_init_meta_clear_state(struct radv_device *device, bool on_demand)
radv_device_init_meta_clear_state(struct radv_device *device)
{
VkResult res;
struct radv_meta_state *state = &device->meta_state;
@@ -902,13 +806,10 @@ radv_device_init_meta_clear_state(struct radv_device *device, bool on_demand)
if (res != VK_SUCCESS)
goto fail;
if (on_demand)
return VK_SUCCESS;
for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) {
uint32_t samples = 1 << i;
for (uint32_t j = 0; j < NUM_META_FS_KEYS; ++j) {
VkFormat format = radv_fs_key_format_exemplars[j];
for (uint32_t j = 0; j < ARRAY_SIZE(pipeline_formats); ++j) {
VkFormat format = pipeline_formats[j];
unsigned fs_key = radv_format_meta_fs_key(format);
assert(!state->clear[i].color_pipelines[fs_key]);
@@ -1091,15 +992,12 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
const uint32_t pass_att = subpass->color_attachments[subpass_att].attachment;
VkImageLayout image_layout = subpass->color_attachments[subpass_att].layout;
const struct radv_framebuffer *fb = cmd_buffer->state.framebuffer;
const struct radv_image_view *iview = fb ? fb->attachments[pass_att].attachment : NULL;
const struct radv_image_view *iview = fb->attachments[pass_att].attachment;
VkClearColorValue clear_value = clear_att->clearValue.color;
uint32_t clear_color[2], flush_bits = 0;
uint32_t cmask_clear_value;
bool ret;
if (!iview)
return false;
if (!radv_image_has_cmask(iview->image) && !radv_image_has_dcc(iview->image))
return false;
@@ -1511,10 +1409,7 @@ radv_cmd_clear_image(struct radv_cmd_buffer *cmd_buffer,
radv_get_layerCount(image, range);
for (uint32_t s = 0; s < layer_count; ++s) {
if (cs ||
(format == VK_FORMAT_R32G32B32_UINT ||
format == VK_FORMAT_R32G32B32_SINT ||
format == VK_FORMAT_R32G32B32_SFLOAT)) {
if (cs) {
struct radv_meta_blit2d_surf surf;
surf.format = format;
surf.image = image;

Some files were not shown because too many files have changed in this diff Show More